CD40106中文资料

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施密特触发器 cc40106

施密特触发器 cc40106
最小
典型
最大
Units单位
tPHL or tPLH
Propagation Delay Time from Input to Output输入输出传播延迟时间
VDD = 5V
220
400
ns
VDD = 10V
80
200
VDD = 15V
70
160
tTHL or tTLH
Transition Time过渡时间
4.95
4.95
5
4.95
V
VDD=10V
9.95
9.95
10
0.95
VDD=15V
14.95
14.95
15
14.95
VT−
Negative-Going Threshold Voltage负向阈值电压
VDD=5V,VO=4.5V
0.7
2.0
0.7
1.4
2.0
0.7
2.0
V
VDD=10V,VO =9V
CC40106由六个斯密特触发器电路组成。每个电路均为在两输入端具有斯密特触发器功能的反相器。触发器在信号的上升和下降沿的不同点开、关。上升电压(V T+)和下降电压(V T-)之差定义为滞后电6 8 10 12数据输出端
1 3 5 9 11 13数据输入端
4.2
3.4
8.8
2.4
IOH
HIGH Level Output Current输出高电平电流(Note 3)
VDD=5V,VO =4.6V
−0.64
−0.51
−0.88
−0.36
mA
VDD=10V,VO=9.5V
−1.6

CD系列引脚大全

CD系列引脚大全

常用4000系列标准数字电路的中文名称资料型号器件名称厂牌备注CD4000 双3输入端或非门+单非门 TICD4001 四2输入端或非门 HIT/NSC/TI/GOLCD4002 双4输入端或非门 NSCCD4006 18位串入/串出移位寄存器 NSCCD4007 双互补对加反相器 NSCCD4008 4位超前进位全加器 NSCCD4009 六反相缓冲/变换器 NSCCD4010 六同相缓冲/变换器 NSCCD4011 四2输入端与非门 HIT/TICD4012 双4输入端与非门 NSCCD4013 双主-从D型触发器 FSC/NSC/TOSCD4014 8位串入/并入-串出移位寄存器 NSCCD4015 双4位串入/并出移位寄存器 TICD4016 四传输门 FSC/TICD4017 十进制计数/分配器 FSC/TI/MOTCD4018 可预制1/N计数器 NSC/MOTCD4019 四与或选择器 PHICD4020 14级串行二进制计数/分频器 FSCCD4021 08位串入/并入-串出移位寄存器 PHI/NSCCD4022 八进制计数/分配器 NSC/MOTCD4023 三3输入端与非门 NSC/MOT/TICD4024 7级二进制串行计数/分频器 NSC/MOT/TICD4025 三3输入端或非门 NSC/MOT/TICD4026 十进制计数/7段译码器 NSC/MOT/TICD4027 双J-K触发器 NSC/MOT/TICD4028 BCD码十进制译码器 NSC/MOT/TICD4029 可预置可逆计数器 NSC/MOT/TICD4030 四异或门 NSC/MOT/TI/GOLCD4031 64位串入/串出移位存储器 NSC/MOT/TICD4032 三串行加法器 NSC/TICD4033 十进制计数/7段译码器 NSC/TICD4034 8位通用总线寄存器 NSC/MOT/TICD4035 4位并入/串入-并出/串出移位寄存 NSC/MOT/TI CD4038 三串行加法器 NSC/TICD4040 12级二进制串行计数/分频器 NSC/MOT/TICD4041 四同相/反相缓冲器 NSC/MOT/TICD4042 四锁存D型触发器 NSC/MOT/TICD4043 4三态R-S锁存触发器("1"触发) NSC/MOT/TI CD4044 四三态R-S锁存触发器("0"触发) NSC/MOT/TI CD4046 锁相环 NSC/MOT/TI/PHICD4047 无稳态/单稳态多谐振荡器 NSC/MOT/TICD4048 4输入端可扩展多功能门 NSC/HIT/TICD4049 六反相缓冲/变换器 NSC/HIT/TICD4050 六同相缓冲/变换器 NSC/MOT/TICD4051 八选一模拟开关 NSC/MOT/TICD4052 双4选1模拟开关 NSC/MOT/TICD4053 三组二路模拟开关 NSC/MOT/TICD4054 液晶显示驱动器 NSC/HIT/TICD4055 BCD-7段译码/液晶驱动器 NSC/HIT/TI CD4056 液晶显示驱动器 NSC/HIT/TICD4059 “N”分频计数器 NSC/TICD4060 14级二进制串行计数/分频器 NSC/TI/MOT CD4063 四位数字比较器 NSC/HIT/TICD4066 四传输门 NSC/TI/MOTCD4067 16选1模拟开关 NSC/TICD4068 八输入端与非门/与门 NSC/HIT/TICD4069 六反相器 NSC/HIT/TICD4070 四异或门 NSC/HIT/TICD4071 四2输入端或门 NSC/TICD4072 双4输入端或门 NSC/TICD4073 三3输入端与门 NSC/TICD4075 三3输入端或门 NSC/TICD4076 四D寄存器CD4077 四2输入端异或非门 HITCD4078 8输入端或非门/或门CD4081 四2输入端与门 NSC/HIT/TICD4082 双4输入端与门 NSC/HIT/TICD4085 双2路2输入端与或非门CD4086 四2输入端可扩展与或非门CD4089 二进制比例乘法器CD4093 四2输入端施密特触发器 NSC/MOT/STCD4094 8位移位存储总线寄存器 NSC/TI/PHICD4095 3输入端J-K触发器CD4096 3输入端J-K触发器CD4097 双路八选一模拟开关CD4098 双单稳态触发器 NSC/MOT/TICD4099 8位可寻址锁存器 NSC/MOT/STCD40100 32位左/右移位寄存器CD40101 9位奇偶较验器CD40102 8位可预置同步BCD减法计数器CD40103 8位可预置同步二进制减法计数器CD40104 4位双向移位寄存器CD40105 先入先出FI-FD寄存器CD40106 六施密特触发器 NSC\TICD40107 双2输入端与非缓冲/驱动器 HAR\TICD40108 4字×4位多通道寄存器CD40109 四低-高电平位移器CD40110 十进制加/减,计数,锁存,译码驱动 STCD40147 10-4线编码器 NSC\MOTCD40160 可预置BCD加计数器 NSC\MOTCD40161 可预置4位二进制加计数器 NSC\MOTCD40162 BCD加法计数器 NSC\MOTCD40163 4位二进制同步计数器 NSC\MOTCD40174 六锁存D型触发器 NSC\TI\MOTCD40175 四D型触发器 NSC\TI\MOTCD40181 4位算术逻辑单元/函数发生器CD40182 超前位发生器CD40192 可预置BCD加/减计数器(双时钟) NSC\TICD40193 可预置4位二进制加/减计数器 NSC\TICD40194 4位并入/串入-并出/串出移位寄存 NSC\MOT CD40195 4位并入/串入-并出/串出移位寄存 NSC\MOT CD40208 4×4多端口寄存器CD4501 4输入端双与门及2输入端或非门CD4502 可选通三态输出六反相/缓冲器CD4503 六同相三态缓冲器CD4504 六电压转换器CD4506 双二组2输入可扩展或非门CD4508 双4位锁存D型触发器CD4510 可预置BCD码加/减计数器CD4511 BCD锁存,7段译码,驱动器CD4512 八路数据选择器CD4513 BCD锁存,7段译码,驱动器(消隐)CD4514 4位锁存,4线-16线译码器CD4515 4位锁存,4线-16线译码器CD4516 可预置4位二进制加/减计数器CD4517 双64位静态移位寄存器CD4518 双BCD同步加计数器CD4519 四位与或选择器CD4520 双4位二进制同步加计数器CD4521 24级分频器CD4522 可预置BCD同步1/N计数器CD4526 可预置4位二进制同步1/N计数器CD4527 BCD比例乘法器CD4528 双单稳态触发器CD4529 双四路/单八路模拟开关CD4530 双5输入端优势逻辑门CD4531 12位奇偶校验器CD4532 8位优先编码器CD4536 可编程定时器CD4538 精密双单稳CD4539 双四路数据选择器CD4541 可编程序振荡/计时器CD4543 BCD七段锁存译码,驱动器CD4544 BCD七段锁存译码,驱动器CD4547 BCD七段译码/大电流驱动器CD4549 函数近似寄存器CD4551 四2通道模拟开关CD4553 三位BCD计数器CD4555 双二进制四选一译码器/分离器CD4556 双二进制四选一译码器/分离器CD4558 BCD八段译码器CD4560 "N"BCD加法器CD4561 "9"求补器CD4573 四可编程运算放大器CD4574 四可编程电压比较器CD4575 双可编程运放/比较器CD4583 双施密特触发器CD4584 六施密特触发器CD4585 4位数值比较器CD4599 8位可寻址锁存器CD22100 4×4×1交叉点开关。

CD40106中文资料

CD40106中文资料

CD40106中文资料简介:CD40106中文资料:CD40106由六个斯密特触发器电路组成。

每个电路均为在两输入端具有斯密特触发器功能的反相器。

触发器在信号的上升和下降沿的 ...CD40106由六个斯密特触发器电路组成。

每个电路均为在两输入端具有斯密特触发器功能的反相器。

触发器在信号的上升和下降沿的不同点开、关。

上升电压(V T+)和下降电压(V T-)之差定义为滞后电压。

CD40106引脚图引脚功能:2 4 6 8 10 12 数据输出端1 3 5 9 11 13 数据输入端14 电源正7 接地CD40106内部图Absolute Maximum Ratings 绝对最大额定值:DC Supply Voltage 直流供电电压(VDD) −0.5 to +18 VDC Input Voltage输入电压(VIN) −0.5 to VDD +0.5 VDC Storage Temperature Range储存温度范围(TS) −65℃ to +150℃Power Dissipation功耗(PD)Dual-In-Line 普通双列封装700 mWSmall Outline 小外形封装500 mWLead Temperature 焊接温度(TL)Soldering, 10 seconds)(焊接10秒)260℃Recommended Operating Conditions 建议操作条件:DC Supply Voltage 直流供电电压(VDD) 3 to 15 VDCInput Voltage输入电压(VIN) 0 to VDD VDC Operating Temperature Range工作温度范围(TA) −55℃ to +125℃典型应用电路。

cd40106原理 -回复

cd40106原理 -回复

cd40106原理-回复今天我来为大家解析一下cd40106原理。

首先,我们先来介绍一下cd40106。

cd40106是一种常用的六反相器芯片,它由德州仪器公司(Texas Instruments)生产。

该芯片具有多种用途,包括信号放大、信号处理、振荡器等。

它由非门(NAND)逻辑门所构成,具有6个独立的反相器(非门)。

一、cd40106结构cd40106芯片内部有6个相同的电路,每个电路都是反相器,使用相同的电源和地线。

在cd40106芯片中,每个反相器包含输入端、输出端和电路。

输入端有两个引脚,分别是A和/ A;输出端也有两个引脚,分别是Y和/ Y。

当输入端的电压改变时,输出端会根据芯片的工作原理进行相应的改变。

二、cd40106工作原理cd40106工作原理是基于电流差,通过变化电路两个输入引脚的电压来触发输出的反相变化。

当输入引脚A电压为低电平,即0V时,/ A引脚电压为高电平,即5V。

此时芯片中的晶体管关断,从而导致输出引脚Y电压为高电平,即5V;而/ Y引脚电压为低电平,即0V。

当输入引脚A电压为高电平,即5V时,/ A引脚电压为低电平,即0V。

此时芯片中的晶体管导通,从而导致输出引脚Y电压为低电平,即0V;而/ Y引脚电压为高电平,即5V。

这样,当A引脚电压发生变化时,输出引脚的电压将发生反相变化。

三、cd40106应用场景1.信号放大cd40106具有三态门电路,可以用作信号放大器。

通过引入反馈电阻,可以将输入信号放大到输出端。

2.信号处理cd40106可以用于信号处理,如频率分割、振荡、相位修正等。

通过设置不同的引脚连接方式和外部电路,可以使芯片产生不同的输出信号。

3.振荡器cd40106可以构建正弦波振荡器和方波振荡器。

通过外接电容和电阻,可以调节振荡频率和波形。

四、cd40106的应用案例1.多谐振荡器通过将多个cd40106芯片连接在一起,并适当地配置外部电路,可以构建多谐振荡器。

4000系列数字集成电路

4000系列数字集成电路
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内容来自电气自动化技术网

原文地址:/diangongdianzi/dianzijishu/2480.html
CD4022 八进制计数/分配器 NSC/MOT
型号 器件名称 厂牌 备注
CD4023 三3输入端与非门 NSC/MOT/TI
CD4024 7级二进制串行计数/分频器 NSC/MOT/TI
CD4025 三3输入端或非门 NSC/MOT/TI
CD4026 十进制计数/7段译码器 NSC/MOT/TI
CD4514 4位锁存,4线-16线译码器
CD4515 4位锁存,4线-16线译码器
CD4516 可预置4位二进制加/减计数器
CD4517 双64位静态移位寄存器
CD4518 双BCD同步加计数器
CD4519 四位与或选择器
CD4520 双4位二进制同步加计数器
CD4521 24级分频器
CD40147 10-4线编码器 NSC\MOT
CD40160 可预置BCD加计数器 NSC\MOT
CD40161 可预置4位二进制加计数器 NSC\MOT
CD40162 BCD加法计数器 NSC\MOT
CD40163 4位二进制同步计数器 NSC\MOT
CD40174 六锁存D型触发器 NSC\TI\MOT
CD4531 12位奇偶校验器
CD4532 8位优先编码器
CD4536 可编程定时器
CD4538 精密双单稳
CD4539 双四路数据选择CD4543 BCD七段锁存译码,驱动器
CD4544 BCD七段锁存译码,驱动器
CD4547 BCD七段译码/大电流驱动器

CD40106BCN中文资料

CD40106BCN中文资料

October 1987Revised January 1999CD40106BC Hex Schmitt Trigger © 1999 Fairchild Semiconductor Corporation DS005985.prf CD40106BCHex Schmitt TriggerGeneral DescriptionThe CD40106BC Hex Schmitt Trigger is a monolithic com-plementary MOS (CMOS) integrated circuit constructedwith N and P-channel enhancement transistors. The posi-tive and negative-going threshold voltages, V T+ and V T−,show low variation with respect to temperature (typ0.0005V/°C at V DD= 10V), and hysteresis, V T+− V T−≥ 0.2V DD is guaranteed.All inputs are protected from damage due to static dis-charge by diode clamps to V DD and V SS.Featuress Wide supply voltage range: 3V to 15Vs High noise immunity:0.7 V DD (typ.)s Low power TTL compatibility:Fan out of 2 driving 74L or 1 driving 74LSs Hysteresis:0.4 V DD (typ.),0.2 V DD guaranteeds Equivalent to MM74C14s Equivalent to MC14584BOrdering Code:Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.Connection DiagramPin Assignments for DIP and SOICTop ViewSchematic DiagramOrder Number Package Number Package DescriptionCD40106BCM M14A14-Lead Small Outline integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow BodyCD40106BCN N14A14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide 2C D 40106B CAbsolute Maximum Ratings (Note 1)(Note 2)Recommended Operating Conditions (Note 2)Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of “Recom-mended Operating Conditions” and “Electrical Characteristics” provides conditions for actual device operation.Note 2: V SS = 0V unless otherwise specified.DC Electrical Characteristics (Note 3)Note 3: I OH and I OL are tested one output at a time.DC Supply Voltage (V DD )−0.5 to +18 V DC Input Voltage (V IN )−0.5 to V DD +0.5 V DCStorage Temperature Range (T S )−65°C to +150°CPower Dissipation (P D )Dual-In-Line 700 mW Small Outline 500 mWLead Temperature (T L )(Soldering, 10 seconds)260°C DC Supply Voltage (V DD ) 3 to 15 V DC Input Voltage (V IN )0 toV DD V DC Operating Temperature Range (T A )−40°C to +85°CSymbol ParameterConditions−40°C +25°C +85°C Units MinMax MinTypMax MinMax I DDQuiescent Device CurrentV DD = 5V 4.0 4.030µA V DD = 10V 8.08.060µA V DD = 15V16.016.0120µA V OLLOW Level Output |I O | < 1 µA VoltageV DD = 5V 0.050.050.05V V DD = 10V 0.050.050.05V V DD = 15V0.050.050.05V V OHHIGH Level Output |I O | < 1 µA VoltageV DD = 5V 4.95 4.955 4.95V V DD = 10V 9.959.95100.95V V DD = 15V14.9514.951514.95V V T −Negative-Going Threshold V DD = 5V, V O = 4.5V 0.7 2.00.7 1.4 2.00.7 2.0V VoltageV DD = 10V , V O = 9V 1.4 4.0 1.4 3.2 4.0 1.4 4.0V V DD = 15V , V O = 13.5V 2.1 6.0 2.1 5.0 6.0 2.1 6.0V V T +Positive-Going Threshold V DD = 5V, V O = 0.5V 3.0 4.3 3.0 3.6 4.3 3.0 4.3V VoltageV DD = 10V , V O = 1V 6.08.6 6.0 6.88.66.08.6V V DD = 15V , V O = 1.5V 9.012.99.010.012.99.012.9V V HHysteresis (V T + − V T −)V DD = 5V 1.0 3.6 1.0 2.2 3.6 1.0 3.6V VoltageV DD = 10V 2.07.2 2.0 3.67.2 2.07.2V V DD = 15V3.010.83.0 5.010.83.010.8V I OLLOW Level Output V DD = 5V, V O = 0.4V 0.520.440.880.36mA Current (Note 3)V DD = 10V , V O = 0.5V 1.3 1.1 2.250.9mA V DD = 15V , V O = 1.5V 3.6 3.08.8 2.4mA I OHHIGH Level Output V DD = 5V, V O = 4.6V −0.52−0.44−0.88−0.36mA Current (Note 3)V DD = 10V , V O = 9.5V −1.3−1.1−2.25−0.9mA V DD = 15V , V O = 13.5V −3.6−3.0−8.8−2.4mAI INInput CurrentV DD = 15V , V IN = 0V −0.30−10−5−0.30−1.0µA V DD = 15V , V IN = 15V0.3010−50.30 1.0µACD40106BCAC Electrical Characteristics (Note 4)T A = 25°C, C L = 50 pF , R L = 200k, t r and t f = 20 ns, unless otherwise specifiedNote 4: AC Parameters are guaranteed by DC correlated testing.Note 5: C PD determines the no load ac power consumption of any CMOS device. For complete explanation see 74C Family Characteristics Application Note,AN-90.Switching Time Waveformst r = t f = 20 nsTypical ApplicationsLow Power OscillatorNote: The equations assume t 1 + t 2 >> t PHL + t PLHSymbolParameterConditionsMinTyp Max Units t PHL or t PLHPropagation Delay Time from V DD = 5V 220400ns Input to OutputV DD = 10V 80200ns V DD = 15V 70160ns t THL or t TLHT ransition TimeV DD = 5V 100200ns V DD = 10V 50100ns V DD = 15V4080ns C IN Average Input Capacitance Any Input 57.5pF C PDPower Dissipation CapacityAny Gate (Note 5)14pF 4C D 40106B CTypical Performance CharacteristicsTypical Transfer CharacteristicsGuaranteedGuaranteed Trip Point Range CD40106BCPhysical Dimensions inches (millimeters) unless otherwise noted16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow BodyPackage Number M14AF a irch ild d o e s n o t a ssu m e a n y re spo n sib ility fo r u se o f a n y circu itry de scrib e d , n o circu it pa ten t lice nse s a re im p lie d a nd F a irch ild re se rv e s the rig h t a t a n y tim e w ith ou t n o tice to cha n g e sa id circu itry an d sp e cifica tio n s.C D 40106B C H e x S c h m i t t T r i g g e rLIFE SUPPORT POLICYFAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systemswhich, (a) are intended for surgical implant into thebody, or (b) support or sustain life, and (c) whose failureto perform when properly used in accordance withinstructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user.2. A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system, or to affect its safety or Physical Dimensions inches (millimeters) unless otherwise noted (Continued)14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” WidePackage Number N14A。

CD40106中文资料

CD40106中文资料

CD40106中文资料pdf 引脚功能
简介:CD40106中文资料pdf 引脚功能CC40106由六个斯密特触发器电路组成。

每个电路均为在两输入端具有斯密特触发器功能的反相器。

触发器在信
号的上升和下降沿的 ...
CD40106由六个斯密特触发器电路组成。

每个电路均为在两输入端具有斯密特触发器功能的反相器。

触发器在信号的上升和下降沿的不同点开、关。

上升电压(V T+)和下降电压(V T-)之
差定义为滞后电压。

CD40106引脚图
引脚功能:
2 4 6 8 10 12 数据输出端
1 3 5 9 11 13 数据输入端
14 电源正
7 接地
CD40106内部图
Absolute Maximum Ratings 绝对最大额定值:
Recommended Operating Conditions 建议操作条件:
DC Electrical Characteristics 直流电气特性:
AC Electrical C haracteristics 交流电气特性:
典型应用电路:
切换时间波形:
成都信息工程学院通信制作
/pop.asp。

CD40106_DataSheet

CD40106_DataSheet

8.6
向阈 值电压
=1V
VDD=15V,VO= 9.0
1.5V
12. 9.0
9
10.0 12. 9.0
9
12.9
Hysteresis VDD = 5V 1.0 3.6 1.0 2.2 3.6 1.0
3.6
(VT+ − VT VDD = 10V 2.0 7.2 2.0 3.6 7.2 2.0
7.2
VH −) Voltage
−0.5 to +18 VDC
Input Voltage 输入电压 (VIN)
−0.5 to VDD +0.5 VDC
Storage Temperature Range 储存温度范围 (TS) −65℃ to +150℃
Power Dissipation 功耗 (PD)
Dual-In-Line 普通双列封装
ge 输出低电 0V VD A
平电 压
D=15
V
0.0 5 0. 05 0.0
5
0.0 5 0. 05 0.0
5
0.05 0.05 0.0 V
5
VDD= HIGH Level 5V
4.95
4.9 5
5
4.95
Output Volta VDD= |IO|<1μ 9.95
VOH
9.95 10
0.95
V
ge 输出高电 10V
tTHL or tTL
H
Transition Time 过渡时间
VDD = 5V VDD = 10V VDD = 15V
100 200 50 100 ns 40 80
CIN Average Input Capacitance 平均输入电容

最新CD4020-CD4040-CD4060中文资料(1)

最新CD4020-CD4040-CD4060中文资料(1)

C D4020-C D4040-C D4060中文资料(1)
CD4020 CD4040 CD4060中文资料
CD4020是14位二进制串行计数器。

所有的计数器为主从触发器。

计数器在时钟下降沿进行计数,CR为高电平时计数器进行清零。

由于在时钟输入端使用斯密特触发器,对脉冲上升和下降时间无限制,所有输入和输出均经过缓冲
CD4040是12位二进制串行计数器,所有计数器位为主从触发器。

计数器在时钟下降沿进行计数,CR为高电平时计数器进行清零。

由于在时钟输入端使用斯密特触发器,对脉冲上升和下降时间无限制。

所有输入和输出均经过缓冲
CD4060由一振荡器和14级二进制串行计数器位组成,振荡器的结构可以是RC或晶振电路,CR为高电平时,计清零且振荡器使用无效。

所有的计数器位均为主从触发器。

在CP1(和CP0)的下降沿计数器以二进制进行计数。

在时冲线上使用斯密特触发器对时钟上升和下降时间无限制。

CD4020引脚功能图
CD4040引脚图
CD4060引脚功能图
CD4020内部方框图
CD4040内部方框图 CD4060内部方框图CD4060B典型振荡器连接:上图-RC振荡器下图-晶体振荡器。

CD4016BM中文资料

CD4016BM中文资料

TL F 5661CD4016BM CD4016BC Quad Bilateral SwitchAugust 1989CD4016BM CD4016BC Quad Bilateral SwitchGeneral DescriptionThe CD4016BM CD4016BC is a quad bilateral switch in-tended for the transmission or multiplexing of analog or digi-tal signals It is pin-for-pin compatible with CD4066BM CD4066BCFeaturesY Wide supply voltage range 3V to 15VY Wide range of digital and analog switching g 7 5V PEAK Y ‘‘ON’’resistance for 15V operation 400X (typ )YMatched ‘‘ON’’resistance over 15V signal input D R ON e 10X (typ )YHigh degree of linearity 0 4%distortion (typ )f IS e 1kHz V IS e 5V p-p V DD b V SS e 10V R L e 10k XYExtremely low ‘‘OFF’’switch leakage 0 1nA (typ )V DD b V SS e 10VT A e 25 CY Extremely high control input impedance 1012X (typ )YLow crosstalk between switchesb 50dB (typ ) f IS e 0 9MHz R Le 1k X YFrequency response switch ‘‘ON’’40MHz (typ )ApplicationsYAnalog signal switching multiplexing Signal gating Squelch control ChopperModulator Demodulator Commutating switchY Digital signal switching multiplexing Y CMOS logic implementationY Analog-to-digital digital-to-analog conversionYDigital control of frequency impedance phase and an-alog-signal gainSchematic and Connection DiagramsDual-In-Line PackageTL F 5661–1Order Number CD4016BC 1995National Semiconductor Corporation RRD-B30M105 Printed in U S AAbsolute Maximum RatingsIf Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications (Notes1and2)V DD Supply Voltage b0 5V to a18V V IN Input Voltage b0 5V to V DD a0 5V T S Storage Temperature Range b65 C to a150 C Power Dissipation(P D)Dual-In-Line700mW Small Outline500mW Lead Temperature(Soldering 10seconds)260 C Recommended Operating Conditions(Note2)V DD Supply Voltage3V to15V V IN Input Voltage0V to V DD T A Operating Temperature RangeCD4016BM b55 C to a125 C CD4016BC b40 C to a85 CDC Electrical Characteristics CD4016BM(Note2)Symbol Parameter Conditionsb55 C25 C125 CUnits Min Max Min Typ Max Min MaxI DD Quiescent Device Current V DD e5V V IN e V DD or V SS0 250 010 257 5m AV DD e10V V IN e V DD or V SS0 50 010 515m AV DD e15V V IN e V DD or V SS1 00 011 030m A Signal Inputs and OutputsR ON‘‘ON’’Resistance R L e10k X to V DD b V SS2V C e V DD V IS e V SS or V DDV DD e10V600250660960X V DD e15V360200400600XR L e10k X to V DD b V SS2V C e V DDV DD e10V V IS e4 75to5 25V187085020002600X V DD e15V V IS e7 25to7 75V7754008501230XD R ON D‘‘ON’’Resistance R L e10k X to V DD b V SS2Between any2of VC e V DD V IS e V SS to V DD4Switches VDD e10V15X (In Same Package)VDD e15V10X I IS Input or Output Leakage V C e0 V DD e15V g50g0 1g50g500nASwitch‘‘OFF’’V IS e15V and0VV OS e0V and15VControl InputsV ILC Low Level Input Voltage V IS e V SS and V DDV OS e V DD and V SSI IS e g10m AV DD e5V0 90 70 5VV DD e10V0 90 70 5VV DD e15V0 90 70 5V V IHC High Level Input Voltage V DD e5V3 53 53 5VV DD e10V(see Note6and7 07 07 0VV DD e15V Figure8)11 011 011 0V I IN Input Current V DD b V SS e15V g0 1g10b5g0 1g1 0m AV DD t V IS t V SSV DD t V C t V SS2DC Electrical Characteristics CD4016BC (Note 2)(Continued)Symbol ParameterConditionsb 40 C 25 C85 C Units Min Max MinTyp Max MinMax I DDQuiescent Device CurrentV DD e 5V V IN e V DD or V SS 1 00 011 07 5m A V DD e 10V V IN e V DD or V SS 2 00 012 015m A V DD e 15V V IN e V DD or V SS 4 00 014 030m ASignal Inputs and Outputs R ON‘‘ON’’ResistanceR L e 10k X toV DD b V SS2V C e V DD V IS e V SS or V DD V DD e 10V 610275660840X V DD e 15V370200400520XR L e 10k X toV DD b V SS2V C e V DDV DD e 10V V IS e 4 75to 5 25V 190085020002380X V DD e 15V V IS e 7 25to 7 75V 7904008501080XD R OND ‘‘ON’’Resistance R L e 10k X to V DD b V SS2Between any 2of V C e V DD V IS e V SS to V DD 4Switches V DD e 10V 15X (In Same Package)V DD e 15V 10X I ISInput or Output Leakage V C e 0 V DD e 15V g 50g 0 1g 50g 200nASwitch ‘‘OFF’’V IS e 0V or 15V V OS e 15V or 0V Control Inputs V ILCLow Level Input VoltageV IS e V SS and V DD V OS e V DD and V SS I IS e g 10m A V DD e 5V 0 90 70 4V V DD e 10V 0 90 70 4V V DD e 15V 0 90 70 4V V IHCHigh Level Input VoltageV DD e 5V 3 53 53 5V V DD e 10V (see Note 6and7 07 07 0V V DD e 15VFigure 8)11 011 011 0VI INInput CurrentV CC b V SS e 15V g 0 3g 10b 5g 0 3g 1 0m AV DD t V IS t V SS V DD t V C t V SSAC Electrical Characteristics T A e 25 C t r e t f e 20ns and V SS e 0V unless otherwise specifiedSymbol ParameterConditionsMinTypMaxUnitst PHL t PLHPropagation Delay Time V C e V DD C L e 50pF (Figure 1)Signal Input to Signal OutputR L e 200k V DD e 5V 58100ns V DD e 10V 2750ns V DD e 15V2040nst PZH t PZLPropagation Delay Time R L e 1 0k X C L e 50pF (Figures 2Control Input to Signal and 3)Output High Impedance to V DD e 5V 2050ns Logical LevelV DD e 10V 1840ns V DD e 15V1735nst PHZ t PLZPropagation Delay Time R L e 1 0k X C L e 50pF (Figures 2Control Input to Signal and 3)Output Logical Level to V DD e 5V 1540ns High Impedance V DD e 10V 1125ns V DD e 15V1022ns Sine Wave DistortionV C e V DD e 5V V SS eb 50 4%R L e 10k X V IS e 5V P-P f e 1kHz(Figure 4)3AC Electrical Characteristics (Continued)T A e25 C t r e t f e20ns and V SS e0V unless otherwise specifiedSymbol Parameter Conditions Min Typ Max Units Frequency Response Switch V C e V DD e5V V SS eb5V 40MHz‘‘ON’’(Frequency at b3dB)R L e1k X V IS e5V P-P20Log10V OS V OS(1kHz)b dB(Figure4)Feedthrough Switch‘‘OFF’’V DD e5V V C e V SS eb5V 1 25MHz(Frequency at b50dB)R L e1k X V IS e5V P-P20Log10(V OS V IS)eb50dB(Figure4)Crosstalk Between Any Two V DD e V C(A)e5V V SS e V C(B)eb5V 0 9MHzSwitches(Frequency at b50dB)R L e1k X V IS(A)e5V P-P20Log10(V OS(B) V OS(A))eb50dB(Figure5)Crosstalk Control Input to V DD e10V R L e10k X150mV P-PSignal Output R IN e1k X V CC e10V Square WaveC L e50pF(Figure6)Maximum Control Input R L e1k X C L e50pF (Figure7)V OS(f)e V OS(1kHz)V DD e5V6 5MHzV DD e10V8 0MHzV DD e15V9 0MHz C IS Signal Input Capacitance4pF C OS Signal Output Capacitance V DD e10V4pF C IOS Feedthrough Capacitance V C e0V0 2pF C IN Control Input Capacitance57 5pF AC Paramters are guaranteed by DC correlated testingNote1 ‘‘Absolute Maximum Ratings’’are those values beyond which the safety of the device cannot be guaranteed They are not meant to imply that the devices should be operated at these limits The tables of‘‘Recommended Operating Conditions’’and‘‘Electrical Characteristics’’provide conditions for actual device operationNote2 V SS e0V unless otherwise specifiedNote3 These devices should not be connected to circuits with the power‘‘ON’’Note4 In all cases there is approximately5pF of probe and jig capacitance on the output however this capacitance is included in C L wherever it is specified Note5 V IS is the voltage at the in out pin and V OS is the voltage at the out in pin V C is the voltage at the control inputNote6 If the switch input is held at V DD V IHC is the control input level that will cause the switch output to meet the standard‘‘B’’series V OH and I OH output levels If the analog switch input is connected to V SS V IHC is the control input level which allows the switch to sink standard‘‘B’’series l I OH l high level current and still maintain a V OL s‘‘B’’series These currents are shown in Figure8AC Test Circuits and Switching Time WaveformsFigure1 t PLH t PLH Propagation Delay Time Signal Input to Signal OutputTL F 5661–2 FIGURE2 t PZH t PHZ Propagation Delay Time Control to Signal Output4AC Test Circuits and Switching Time Waveforms(Continued)FIGURE3 t PZH t PHZ Propagation Delay Time Control to Signal OutputV C e V DD for distortion and frequency response testsV C e V SS for feedthrough testFIGURE4 Sine Wave Distortion Frequency Response and FeedthroughFIGURE5 Crosstalk Between Any Two SwitchesTL F 5661–3FIGURE6 Crosstalk Control to Input Signal Output5AC Test Circuits and Switching Time Waveforms (Continued)TL F 5661–4FIGURE 7 Maximum Control Input FrequencyTemperatureSwitch InputSwitch OutputRangeV DD V ISI IS (mA)V OS (V)T LOW25 C T HIGH Min Max 500 250 20 140 455b 0 25b 0 2b 0 144 6MILITARY1000 620 50 350 51010b 0 62b 0 5b 0 359 51501 81 51 11 51515b 1 8b 1 5b 1 113 5500 20 160 120 455b 0 2b 0 16b 0 124 6COMMERCIAL1000 50 40 30 51010b 0 5b 0 4b 0 39 51501 41 21 01 51515b 1 4b 1 2b 1 013 5FIGURE 8 CD4016B Switch Test Conditions for V IHCTypical Performance Characteristics‘ON’Resistance vs Signal Voltage T A e 25 C‘ON’Resistance Temperature Variation for V DD b V SS e 10V‘ON’Resistance Temperature Variation for V DD b V SS e 15VTL F 5661–56Typical Applications4Input MultiplexerSample Hold AmplifierTL F 5661–6 Special ConsiderationsThe CD4016B is composed of4 two-transistor analog switches These switches do not have any linearization or compensation circuitry for‘‘R ON’’as do the CD4066B’s Be-cause of this the special operating considerations for the CD4066B do not apply to the CD4016B but at lowsupply voltages s5V the CD4016B’s on resistance be-comes non-linear It is recommended that at5V voltages on the in out pins be maintained within about1V of either V DD or V SS and that at3V the voltages on the in out pins should be at V DD or V SS for reliable operation7C D 4016B M C D 4016B C Q u a d B i l a t e r a l S w i t c hPhysical Dimensions inches (millimeters)Dual-In-Line PackageOrder Number CD4016CJ or CD4016MJNS Package J14ADual-In-Line Package Order Number CD4016CNNS Package N14ALIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or 2 A critical component is any component of a life systems which (a)are intended for surgical implant support device or system whose failure to perform can into the body or (b)support or sustain life and whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system or to affect its safety or with instructions for use provided in the labeling can effectivenessbe reasonably expected to result in a significant injury to the userNational Semiconductor National Semiconductor National Semiconductor National Semiconductor CorporationEuropeHong Kong LtdJapan Ltd1111West Bardin RoadFax (a 49)0-180-530858613th Floor Straight Block Tel 81-043-299-2309。

CD40106BMTE4中文资料

CD40106BMTE4中文资料

The CD40106B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,modifications,enhancements, improvements,and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by government requirements,testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design.Customers are responsible for their products and applications using TI components.To minimize the risks associated with customer products and applications,customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any TI patent right,copyright,mask work right,or other TI intellectual property right relating to any combination,machine,or process in which TI products or services are rmation published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.Reproduction of this information with alteration is an unfair and deceptive business practice.TI is not responsible or liable for such altered documentation.Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice.TI is not responsible or liable for any such statements.TI products are not authorized for use in safety-critical applications(such as life support)where a failure of the TI product would reasonably be expected to cause severe personal injury or death,unless officers of the parties have executed an agreement specifically governing such use.Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications,and acknowledge and agree that they are solely responsible for all legal,regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications,notwithstanding any applications-related information or support that may be provided by TI.Further,Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications.TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or"enhanced plastic."Only products designated by TI as military-grade meet military specifications.Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk,and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS16949requirements.Buyers acknowledge and agree that,if they use anynon-designated products in automotive applications,TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAmplifiers AudioData Converters AutomotiveDSP BroadbandInterface Digital ControlLogic MilitaryPower Mgmt Optical NetworkingMicrocontrollers SecurityLow Power TelephonyWirelessVideo&ImagingWirelessMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2007,Texas Instruments IncorporatedPACKAGING INFORMATIONOrderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)CD40106BE ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU N/A for Pkg TypeCD40106BEE4ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU N/A for Pkg Type CD40106BF ACTIVE CDIP J141TBD A42SNPB N/A for Pkg Type CD40106BF3A ACTIVE CDIP J141TBD A42SNPB N/A for Pkg Type CD40106BK OBSOLETE CFP WR14TBD Call TI Call TICD40106BM ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD40106BM96ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD40106BM96E4ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD40106BM96G4ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD40106BME4ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD40106BMG4ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD40106BMT ACTIVE SOIC D14250Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD40106BMTE4ACTIVE SOIC D14250Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD40106BMTG4ACTIVE SOIC D14250Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD40106BNSR ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD40106BNSRE4ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD40106BNSRG4ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD40106BPW ACTIVE TSSOP PW1490Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD40106BPWE4ACTIVE TSSOP PW1490Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD40106BPWG4ACTIVE TSSOP PW1490Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD40106BPWR ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD40106BPWRE4ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD40106BPWRG4ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIM(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-The planned eco-friendly classification:Pb-Free(RoHS),Pb-Free(RoHS Exempt),or Green(RoHS&no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free(RoHS Exempt):This component has a RoHS exemption for either1)lead-based flip-chip solder bumps used between the die and package,or2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free(RoHS compatible)as defined above.Green(RoHS&no Sb/Br):TI defines"Green"to mean Pb-Free(RoHS compatible),and free of Bromine(Br)and Antimony(Sb)based flame retardants(Br or Sb do not exceed0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.TAPE AND REEL INFORMATION*All dimensions are nominalDevicePackage Type Package Drawing Pins SPQReel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant CD40106BM96SOIC D 142500330.016.4 6.59.0 2.18.016.0Q1CD40106BNSR SO NS 142000330.016.48.210.5 2.512.016.0Q1CD40106BPWRTSSOPPW142000330.012.47.05.61.68.012.0Q1*All dimensions are nominalDevice Package Type Package Drawing Pins SPQ Length(mm)Width(mm)Height(mm) CD40106BM96SOIC D142500346.0346.033.0 CD40106BNSR SO NS142000346.0346.033.0 CD40106BPWR TSSOP PW142000346.0346.029.0。

CD40106BMS中文资料

CD40106BMS中文资料

8 J=D
10 K=E
Description
13 F
12 L=F
CD40106BMS consists of six Schmitt trigger circuits. Each circuit functions as an inverter with Schmitt trigger action on the input. The trigger switches at different points for positive and negative going signals. The difference between the positive going voltage (VP) and the negative going voltage (VN) is defined as hysteresis voltage (VH) (see Figure 17).
VH5 VDD = 5V VH10 VDD = 10V
VH15 VDD = 15V
GROUP A SUBGROUPS TEMPERATURE
LIMITS MIN MAX UNITS
1
+25oC
-
2
µA
2
+125oC
-
200 µA
3
-55oC
-
2
µA
1
+25oC
-100
-
nA
2
+125oC
-1000 -
VDD = 18V, VIN = VDD or GND IIL VIN = VDD or GND VDD = 20
Input Leakage Current
VDD = 18V IIH VIN = VDD or GND VDD = 20

CD4016BME4中文资料

CD4016BME4中文资料

The CD4016 “B” Series types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).PACKAGING INFORMATIONOrderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)5962-9064001CA ACTIVE CDIP J141TBD A42SNPB N/A for Pkg Type CD4016BE ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU N/A for Pkg TypeCD4016BEE4ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU N/A for Pkg Type CD4016BF ACTIVE CDIP J141TBD A42SNPB N/A for Pkg Type CD4016BF3A ACTIVE CDIP J141TBD A42SNPB N/A for Pkg Type CD4016BM ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD4016BM96ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD4016BM96E4ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD4016BM96G4ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD4016BME4ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD4016BMG4ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD4016BMT ACTIVE SOIC D14250Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD4016BMTE4ACTIVE SOIC D14250Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD4016BMTG4ACTIVE SOIC D14250Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD4016BNSR ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD4016BNSRE4ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD4016BNSRG4ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD4016BPW ACTIVE TSSOP PW1490Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD4016BPWE4ACTIVE TSSOP PW1490Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD4016BPWG4ACTIVE TSSOP PW1490Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD4016BPWR ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD4016BPWRE4ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCD4016BPWRG4ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIM(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-The planned eco-friendly classification:Pb-Free(RoHS),Pb-Free(RoHS Exempt),or Green(RoHS&no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free(RoHS Exempt):This component has a RoHS exemption for either1)lead-based flip-chip solder bumps used between the die and package,or2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free(RoHS compatible)as defined above.Green(RoHS&no Sb/Br):TI defines"Green"to mean Pb-Free(RoHS compatible),and free of Bromine(Br)and Antimony(Sb)based flame retardants(Br or Sb do not exceed0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and 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cd40106原理 -回复

cd40106原理 -回复

cd40106原理-回复什么是cd40106原理CD40106是一种常见的集成电路,也被称为HEX Schmitt触发器。

它包含了6个Schmitt触发器单元,可以用于各种数字电路应用。

CD40106的工作原理基于Schmitt触发器的特性,具有较高的噪声抵抗能力和输入信号的边沿先导特性。

本文将详细介绍CD40106的工作原理,从芯片结构到各个触发器的工作原理。

CD40106原理详解首先,我们需要了解CD40106的基本结构。

它采用了CMOS技术,即复合金属氧化物半导体技术。

CMOS技术以低功耗和较高的噪声抵抗能力而闻名,使得CD40106适用于广泛的应用。

在CD40106中,有6个Schmitt 触发器单元,每个单元包含一个输入引脚、一个输出引脚以及一些配置引脚。

接下来,我们来了解一下Schmitt触发器的工作原理。

Schmitt触发器是一种具有正反馈的比较器,具有滞后特性,可以根据输入信号的边沿先导进行触发。

它由一个比较器和一个正反馈回路组成。

当输入电压超过特定的阈值电压时,输出会翻转。

当输入电压低于另一个特定的阈值电压时,输出再次翻转,这种特性使得Schmitt触发器具有较高的噪声抵抗能力。

在CD40106中,每个Schmitt触发器单元都有一个输入引脚和一个输出引脚。

输入引脚将输入信号传输给比较器,而输出引脚则输出触发后的信号。

除了输入和输出引脚外,每个单元还有一个配置引脚。

通过配置引脚,我们可以选择触发器的工作方式,如正沿触发、负沿触发等。

在CD40106中,各个Schmitt触发器单元是独立的,彼此之间没有直接的连接。

因此,它们可以独立地工作,也可以通过输入和输出引脚进行连接,形成更复杂的电路。

这使得CD40106成为一种非常灵活和多功能的集成电路。

总结CD40106是一种常见的集成电路,具有6个Schmitt触发器单元,可用于各种数字电路应用。

它采用CMOS技术,具有低功耗和高噪声抵抗能力的特点。

CD40106中文资料_数据手册_参数

CD40106中文资料_数据手册_参数

Pb-Free (RoHS)
CU NIPDAU Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
14 250
Pb-Free (RoHS)
CU NIPDAU Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
14 2000
Pb-Free (RoHS)
CU NIPDAU Level-2-260C-1 YEAR/ Level-1-235C-UNLIM
14 90
Pb-Free (RoHS)
CU NIPDAU Level-1-250C-UNLIM
14 2000
Pb-Free (RoHS)
CU NIPDAU Level-1-250C-UNLIM
(1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

40106的资料

40106的资料
9.0
12.9
VH
Hysteresis (VT+ − VT−) Voltage滞后VT+ − VT−)电压
VDD = 5V
1.0
3.6
1.0
2.2
3.6
1.0
3.6
V
VDD = 10V
2.0
7.2
2.0
3.6
7.2
2.0
7.2
VDD = 15V
3.0
10.8
3.0
5.0
10.8
3.0
10.8
IOL
LOW Level Output Current输出低电平电流(Note 3)
0.1
10−5
0.1
1.0
Kve838电子-技术资料-电子元件-电路图-技术应用网站-基本知识-原理-维修-作用-参数-电子元器件符号
AC Electrical Characteristics交流电气特性:Kve838电子-技术资料-电子元件-电路图-技术应用网站-基本知识-原理-维修-作用-参数-电子元器件符号
15
14.95
VT−
Negative-Going Threshold Voltage负向阈值电压
VDD=5V,VO=4.5V
0.7
2.0
0.7
1.4
2.0
0.7
2.0
V
VDD=10V,VO =9V
1.4
4.0
1.4
3.2
4.0
1.4
4.0
VDD=15V,VO=13.5V
2.1
6.0
2.1
5.0
6.0
Parameter参数Kve838电子-技术资料-电子元件-电路图-技术应用网站-基本知识-原理-维修-作用-参数-电子元器件符号

cd40106原理

cd40106原理

cd40106原理CD40106是一种常见的集成电路,它是一款六反相器(hex inverter)芯片。

下面我会从多个角度来解释CD40106的原理。

1. 功能,CD40106内部包含了六个独立的反相器,每个反相器都可以将输入信号反相输出。

反相器是一种基本的逻辑门,它可以改变输入信号的逻辑状态。

CD40106的主要功能是将输入信号进行反相处理。

2. 构成,CD40106由晶体管和其他电子元件组成。

每个反相器内部由两个晶体管构成,一个是NPN型晶体管,另一个是PNP型晶体管。

这些晶体管通过特定的电路连接在一起,形成一个反相器。

3. 工作原理,CD40106的工作原理基于晶体管的放大和反相特性。

当输入信号为高电平时(一般为VDD电压),NPN型晶体管导通,PNP型晶体管截止,输出信号为低电平(一般为0V)。

当输入信号为低电平时(一般为GND电压),NPN型晶体管截止,PNP型晶体管导通,输出信号为高电平(一般为VDD电压)。

因此,CD40106的输出信号与输入信号相反。

4. 输入和输出,CD40106的每个反相器都有一个输入引脚和一个输出引脚。

输入引脚用于接收输入信号,输出引脚用于输出反相后的信号。

输入和输出信号可以是数字信号(逻辑电平)或模拟信号。

5. 应用,CD40106常用于数字电路中的信号处理、时序控制和振荡器电路等方面。

例如,它可以用作信号的放大、反相、时钟信号的处理、信号的延迟等。

总结起来,CD40106是一款六反相器芯片,内部由晶体管和其他电子元件构成。

它的工作原理是基于晶体管的放大和反相特性,能够将输入信号反相输出。

CD40106在数字电路中有广泛的应用,可以实现信号处理、时序控制和振荡器等功能。

cd40106原理 -回复

cd40106原理 -回复

cd40106原理-回复对于中括号内的内容"cd40106原理",我将会为您撰写一篇1500-2000字的文章,详细解释cd40106的工作原理并一步一步回答相关问题。

第一部分:介绍cd40106CD40106是一种六個獨立反向器的CMOS數位集成电路。

它是由工程師Robert H. Rhodes在1961年發明的。

该芯片常用于信号放大、生成频率、时序控制等各种电子电路中。

它采用CMOS技术制造,具有低功耗、高噪声抑制能力等优点。

第二部分:cd40106的基本结构CD40106包含六个独立的非门电路,每个非门电路具有两个输入端(A 和B)和一个输出端(Q)。

非门电路的输入端和输出端都是逻辑电平,可以是高电平(1)或低电平(0)。

第三部分:cd40106的工作原理每个非门电路都是由一个反相器(电流放大器)和一个滞回比较器(管级差比较器)组成。

滞回比较器实际上是一个二极管差动对比放大器,在满足一定条件下,控制着电平的变化。

当输入端A的电平高于输入端B时,输出端Q的电平为低电平(0);当输入端A的电平低于输入端B时,输出端Q的电平为高电平(1)。

第四部分:使用cd40106的场景1. 信号放大:通过非门电路的反相特性,可以将输入信号放大到更高的电平范围。

2. 频率生成:利用滞回比较器的阈值特性,可以将输入信号转化为方波信号,进而生成特定频率的信号。

3. 时序控制:将非门电路与其他元件组合,可以实现各种不同的时序控制逻辑。

第五部分:常见问题解答1. cd40106与cd4001有什么区别?CD40106和CD4001都是CMOS电路,但它们的功能不同。

CD4001是四个双端暗电沟门与非门(与非与门)组成的集成电路,而CD40106是六个独立反向器(非门)组成的集成电路。

2. cd40106的工作电压范围是多少?CD40106的工作电压范围是3V至18V,它具有广泛的供电电压适应能力。

CD40106BDMS资料

CD40106BDMS资料

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.CD40106BMSCMOS Hex Schmitt TriggersFeatures•High Voltage Type (20V Rating)•Schmitt Trigger Action with No External Components •Hysteresis Voltage (Typ.)-0.9V at VDD = 5V - 2.3V at VDD = 10V - 3.5V at VDD = 15V•Noise Immunity Greater than 50%•No Limit on Input Rise and Fall Times•Low VDD to VSS Current During Slow Input Ramp •100% Tested for Quiescent Current at 20V •5V, 10V and 15V Parametric Ratings•Maximum Input Current of 1µA at 18V Over Full Pack-age Temperature Range; 100nA at 18V and +25o C •Standardized Symmetrical Output Characteristics •Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices”Applications•Wave and Pulse Shapers•High Noise Environment Systems •Monostable Multivibrators •Astable MultivibratorsDescriptionCD40106BMS consists of six Schmitt trigger circuits. Each circuit functions as an inverter with Schmitt trigger action on the input. The trigger switches at different points for positive and negative going signals. The difference between the positive going voltage (VP) and the negative going voltage (VN) is defined as hysteresis voltage (VH) (see Figure 17).The CD40106BMS is supplied in these 14 lead outline packages:Braze Seal DIP H4Q Frit Seal DIP H1B Ceramic FlatpackH3WDecember 1992File Number3354PinoutCD40106BMS TOP VIEWFunctional DiagramLogic DiagramFIGURE 1.1 OF 6 SCHMITT TRIGGERSA G =AB H =BC I =C VSS VDD F L =FE K =E D J =D12345671413121110981A2G =A3B4H =B5C6I =C9D8J =D11E10K =E13F12L =FA*1 (3, 5, 9, 11, 13)G*2 (4, 6, 8, 10, 12)*ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORKVDDVSSAbsolute Maximum Ratings Reliability InformationDC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . .-0.5V to +20V (Voltage Referenced to VSS Terminals)Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA Operating Temperature Range. . . . . . . . . . . . . . . .-55o C to +125o C Package Types D, F, K, HStorage Temperature Range (TSTG). . . . . . . . . . .-65o C to +150o C Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . .+265o C At Distance 1/16 ± 1/32 Inch (1.59mm± 0.79mm) from case for 10s Maximum Thermal Resistance . . . . . . . . . . . . . . . .θjaθjc Ceramic DIP and FRIT Package. . . . .80o C/W20o C/W Flatpack Package . . . . . . . . . . . . . . . .70o C/W20o C/W Maximum Package Power Dissipation (PD) at +125o CFor T A = -55o C to +100o C (Package Type D, F, K) . . . . . .500mW For T A = +100o C to +125o C (Package Type D, F, K). . . . . .DerateLinearity at 12mW/o C to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . .100mW For T A = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+175o CTABLE1.DC ELECTRICAL PERFORMANCE CHARACTERISTICSPARAMETER SYMBOL CONDITIONS(NOTE 1)GROUP ASUBGROUPS TEMPERATURELIMITSUNITSMIN MAXSupply Current IDD VDD = 20V, VIN = VDD or GND1+25o C-2µA2+125o C-200µAVDD = 18V, VIN = VDD or GND3-55o C-2µA Input Leakage Current IIL VIN = VDD or GND VDD = 201+25o C-100-nA2+125o C-1000-nAVDD = 18V3-55o C-100-nA Input Leakage Current IIH VIN = VDD or GND VDD = 201+25o C-100nA2+125o C-1000nAVDD = 18V3-55o C-100nA Output Voltage VOL15VDD = 15V, No Load1, 2, 3+25o C, +125o C, -55o C-50mV Output Voltage VOH15VDD = 15V, No Load (Note 2)1, 2, 3+25o C, +125o C, -55o C14.95-V Output Current (Sink)IOL5VDD = 5V, VOUT = 0.4V1+25o C0.53-mA Output Current (Sink)IOL10VDD = 10V, VOUT = 0.5V1+25o C 1.4-mA Output Current (Sink)IOL15VDD = 15V, VOUT = 1.5V1+25o C 3.5-mA Output Current (Source)IOH5A VDD = 5V, VOUT = 4.6V1+25o C--0.53mA Output Current (Source)IOH5B VDD = 5V, VOUT = 2.5V1+25o C--1.8mA Output Current (Source)IOH10VDD = 10V, VOUT = 9.5V1+25o C--1.4mA Output Current (Source)IOH15VDD = 15V, VOUT = 13.5V1+25o C--3.5mA N Threshold Voltage VNTH VDD = 10V, ISS = -10µA1+25o C-2.8-0.7V P Threshold Voltage VPTH VSS = 0V, IDD = 10µA1+25o C0.7 2.8VFunctional F VDD = 2.8V, VIN = VDD or GND7+25o C VOH >VDD/2VOL <VDD/2VVDD = 20V, VIN = VDD or GND7+25o C VDD = 18V, VIN = VDD or GND8A+125o C VDD = 3V, VIN = VDD or GND8B-55o CPositive Trigger Threshold Voltage (See Figure 17)VP5VDD = 5V1, 2, 3+25o C, +125o C, -55o C 2.2 3.6V VP10VDD = 10V1, 2, 3+25o C, +125o C, -55o C 4.67.1V VP15VDD = 15V1, 2, 3+25o C, +125o C, -55o C 6.810.8VNegative Trigger Threshold Voltage (See Figure 17)VN5VDD = 5V1, 2, 3+25o C, +125o C, -55o C0.9 2.8V VN10VDD = 10V1, 2, 3+25o C, +125o C, -55o C 2.5 5.2V VN15VDD = 15V1, 2, 3+25o C, +125o C, -55o C47.4VHysteresis Voltage (See Figure 17)VH5VDD = 5V1, 2, 3+25o C, +125o C, -55o C0.3 1.6V VH10VDD = 10V1, 2, 3+25o C, +125o C, -55o C 1.2 3.4V VH15VDD = 15V1, 2, 3+25o C, +125o C, -55o C 1.6 5.0VNOTES: 1.All voltages referenced to device GND, 100% testing being implemented.2.Go/No Go test with limits applied to inputs.3.For accuracy, voltage is measured differentially to VDD. Limitis 0.050V max.TABLE2.AC ELECTRICAL PERFORMANCE CHARACTERISTICSPARAMETER SYMBOL CONDITIONS(NOTE 1, 2)GROUP ASUBGROUPS TEMPERATURELIMITSUNITSMIN MAXPropagation Delay TPHLTPLH VDD = 5V, VIN = VDD or GND9+25o C-280ns10, 11+125o C, -55o C-378nsTransition Time TTHLTTLH VDD = 5V, VIN = VDD or GND9+25o C-200ns10, 11+125o C, -55o C-270nsNOTES:1.CL = 50pF, RL = 200K, Input TR, TF < 20ns2.-55o C and +125o C limits guaranteed, 100% testing being implemented.TABLE3.ELECTRICAL PERFORMANCE CHARACTERISTICSPARAMETER SYMBOL CONDITIONS NOTES TEMPERATURELIMITSUNITS MIN MAXSupply Current IDD VDD = 5V, VIN = VDD or GND1, 2-55o C, +25o C-1µA+125o C-30µAVDD = 10V, VIN = VDD or GND1, 2-55o C, +25o C-2µA+125o C-60µAVDD = 15V, VIN = VDD or GND1, 2-55o C, +25o C-2µA+125o C-120µA Output Voltage VOL VDD = 5V, No Load1, 2+25o C, +125o C,-55o C-50mVOutput Voltage VOL VDD = 10V, No Load1, 2+25o C, +125o C,-55o C-50mVOutput Voltage VOH VDD = 5V, No Load1, 2+25o C, +125o C,-55o C4.95-VOutput Voltage VOH VDD = 10V, No Load1, 2+25o C, +125o C,-55o C9.95-V Output Current (Sink)IOL5VDD = 5V, VOUT = 0.4V1, 2+125o C0.36-mA-55o C0.64-mA Output Current (Sink)IOL10VDD = 10V, VOUT = 0.5V1, 2+125o C0.9-mA-55o C 1.6-mA Output Current (Sink)IOL15VDD = 15V, VOUT = 1.5V1, 2+125o C 2.4-mA-55o C 4.2-mA Output Current (Source)IOH5A VDD = 5V, VOUT = 4.6V1, 2+125o C--0.36mA-55o C--0.64mA Output Current (Source)IOH5B VDD = 5V, VOUT = 2.5V1, 2+125o C--1.15mA-55o C--2.0mA Output Current (Source)IOH10VDD = 10V, VOUT = 9.5V1, 2+125o C--0.9mA-55o C--1.6mA Output Current (Source)IOH15VDD =15V, VOUT = 13.5V1, 2+125o C--2.4mA-55o C--4.2mAPropagation Delay TPHLTPLH VDD = 10V1, 2, 3+25o C-140ns VDD = 15V1, 2, 3+25o C-120nsTransition Time TTHLTTLH VDD = 10V1, 2, 3+25o C-100ns VDD = 15V1, 2, 3+25o C-80nsInput Capacitance CINAny Input1, 2+25o C-7.5pFNOTES:1.All voltages referenced to device GND.2.The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics.3.CL = 50pF, RL = 200K., Input TR, TF < 20nsTABLE 4.POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICSPARAMETER SYMBOL CONDITIONSNOTES TEMPERATURELIMITSUNITS MIN MAX Supply Current IDD VDD = 20V, VIN = VDD or GND 1, 4+25o C -7.5µA N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1, 4+25o C -2.8-0.2V N Threshold Voltage Delta∆VTN VDD = 10V, ISS = -10µA 1, 4+25o C -±1V P Threshold Voltage VTP VSS = 0V, IDD = 10µA 1, 4+25o C 0.2 2.8V P Threshold Voltage Delta ∆VTP VSS = 0V, IDD = 10µA1, 4+25o C -±1V FunctionalFVDD = 18V, VIN = VDD or GND 1+25o CVOH >VDD/2VOL <VDD/2VVDD = 3V, VIN = VDD or GNDPropagation Delay TimeTPHL TPLHVDD = 5V1, 2, 3, 4+25o C- 1.35 x +25o C LimitnsNOTES: 1.All voltages referenced to device GND.2.CL = 50pF, RL = 200K, Input TR, TF < 20ns.3.See Table 2 for +25o C limit.4.Read and RecordTABLE 5.BURN-IN AND LIFE TEST DELTA PARAMETERS +25o C PARAMETERSYMBOL DELTA LIMITSupply Current - MSI-1IDD ± 0.2µAOutput Current (Sink)IOL5± 20% x Pre-Test Reading Output Current (Source)IOH5A± 20% x Pre-Test ReadingTABLE 6.APPLICABLE SUBGROUPSCONFORMANCE GROUP MIL-STD-883METHOD GROUP A SUBGROUPSREAD AND RECORD Initial Test (Pre Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A Interim Test 1 (Post Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A Interim Test 2 (Post Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5APDA (Note 1)100% 50041, 7, 9, DeltasInterim Test 3 (Post Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5APDA (Note 1)100% 50041, 7, 9, Deltas Final Test 100% 50042, 3, 8A, 8B, 10, 11Group ASample 50051, 2, 3, 7, 8A, 8B, 9, 10, 11TABLE 3.ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)PARAMETER SYMBOL CONDITIONSNOTES TEMPERATURELIMITSUNITS MIN MAXGroup BSubgroup B-5Sample 50051, 2, 3, 7, 8A, 8B, 9, 10, 11, DeltasSubgroups 1, 2, 3, 9, 10, 11Subgroup B-6Sample 50051, 7, 9Group DSample 50051, 2, 3, 8A, 8B, 9Subgroups 1, 2 3NOTE:1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.TABLE 7.TOTAL DOSE IRRADIATIONCONFORMANCE GROUPS MIL-STD-883METHODTESTREAD AND RECORD PRE-IRRAD POST-IRRAD PRE-IRRADPOST-IRRAD Group E Subgroup 250051, 7, 9Table 41, 9Table 4TABLE 8.BURN-IN AND IRRADIATION TEST CONNECTIONSFUNCTION OPEN GROUND VDD 9V ± -0.5VOSCILLATOR50kHz25kHzStatic Burn-In 1Note 12, 4, 6, 8, 10, 121, 3, 5, 7, 9, 11, 1314Static Burn-In 2Note 12, 4, 6, 8, 10, 1271, 3, 5, 9, 11,13, 14Dynamic Burn-In Note 1-7142, 4, 6, 8, 10, 121, 3, 5, 9, 11, 13Irradiation Note 22, 4, 6, 8, 10, 1271, 3, 5, 9, 11,13, 14NOTES:1.Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V2.Each pin except VDD and GND will have a series resistor of 47K ±5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,VDD = 10V ± 0.5VTypical Performance CharacteristicsFIGURE 2.TYPICAL OUTPUT LOW (SINK) CURRENTCHARACTERISTICS FIGURE 3.MINIMUM OUTPUT LOW (SINK) CURRENTCHARACTERISTICSTABLE 6.APPLICABLE SUBGROUPSCONFORMANCE GROUP MIL-STD-883METHOD GROUP A SUBGROUPS READ AND RECORD 10V5V AMBIENT TEMPERATURE (T A ) = +25o CGATE-TO-SOURCE VOLTAGE (VGS) = 15V51015151********DRAIN-TO-SOURCE VOLTAGE (VDS) (V)O U T P U T L O W (S I N K ) C U R R E N T (I O L ) (m A )10V5VAMBIENT TEMPERATURE (T A ) = +25o CGATE-TO-SOURCE VOLTAGE (VGS) = 15V510157.55.02.510.012.515.0DRAIN-TO-SOURCE VOLTAGE (VDS) (V)O U T P U T L O W (S I N K ) C U R R E N T (I O L ) (m A )FIGURE 4.TYPICAL OUTPUT HIGH (SOURCE) CURRENTCHARACTERISTICSFIGURE 5.MINIMUM OUTPUT HIGH (SOURCE) CURRENTCHARACTERISTICSFIGURE 6.TYPICAL CURRENT AND VOLTAGE TRANSFERCHARACTERISTICSFIGURE 7.TYPICAL VOLTAGE TRANSFER CHARACTERIS-TICS AS A FUNCTION OF TEMPERATUREFIGURE 8.TYPICAL PROPAGATION DELAY TIME AS A FUNC-TION OF LOAD CAPACITANCE FIGURE 9.TYPICAL TRANSITION TIME AS A FUNCTION OFLOAD CAPACITANCE-10V-15VAMBIENT TEMPERATURE (T A ) = +25o CGATE-TO-SOURCE VOLTAGE (VGS) = -5V0-5-10-15DRAIN-TO-SOURCE VOLTAGE (VDS) (V)-20-25-30-5-10-15O U T P U T H I G H (S O U R C E ) C U R R E N T (I O H ) (m A )-10V-15VAMBIENT TEMPERATURE (T A ) = +25o C-5-10-15DRAIN-TO-SOURCE VOLTAGE (VDS) (V)-5-10-15O U T P U T H I G H (S O U R C E ) C U R R E N T (I O H ) (m A )GATE-TO-SOURCE VOLTAGE (VGS) = -5VALL OTHERINPUTS TO VDD OR VSSVDDVINVO ID 21VOID10V5VAMBIENT TEMPERATURE (T A ) = +25o CSUPPL Y VOLTAGE (VDD) = 15V CURRENTPEAKCURRENTPEAK15.012.510.07.55.02.5015.012.510.07.55.02.501.51.00.5INPUT VOLTAGE (VI) (V)O U T P U T V O L T A G E (V O ) (V )D R A I N C U R RE N T (I D ) (m A )-55o C+125o CSUPPL Y VOLTAGE (VDD) = 15V10V5V15105O U T P U T V O L T A G E (V O ) (V )151050INPUT VOLTAGE (VI) (V)ALL OTHER INPUTS TO VDD OR VSSVDDVIN21VOAMBIENT TEMPERATURE (T A ) = +25o CLOAD CAPACITANCE (CL) (pF)40608010020050100150200SUPPL Y VOLTAGE (VDD) = 5V10V 5VP R O P A G A T I O N T I M E (t P H L , t P L H ) (n s )AMBIENT TEMPERATURE (T A ) = +25o CLOAD CAPACITANCE (CL) (pF)40608010020050100150200SUPPL Y VOLTAGE (VDD) = 5V10V15VT R A N S I T I O N T I M E (t T H L , t T L H ) (n s )FIGURE 10.TYPICAL POWER DISSIPATION PER TRIGGER ASA FUNCTION OF INPUT FREQUENCY FIGURE 11.TYPICAL TRIGGER THRESHOLD VOLTAGE AS AFUNCTION OF SUPPLY VOLTAGEFIGURE 12.TYPICAL PERCENT HYSTERESIS AS A FUNCTIONOF SUPPLY VOLTAGEFIGURE 13.TYPICAL POWER DISSIPATION AS A FUNCTIONOF RISE AND FALL TIMESApplicationsFIGURE 14.WAVE SHAPER FIGURE 15.MONOSTABLE MULTIVIBRATORINPUT FREQUENCY (f) (kHz)P O W E R D I S S I P A T I O N P E R T R I G G E R (P D ) (µW )86421058642104864210386421021010-186421864210102103104864286428642AMBIENT TEMPERATURE (T A ) = +25o CSUPPL Y VOLTAGE (VDD) = 15V10V5VCL = 50pF CL = 15pFAMBIENT TEMPERATURE (T A ) = +25o CSUPPLY VOLTAGE (VDD) (V)0101520551015VPVNT R I G G E R T H R E S H O L D V O L T A G E (V P , V N ) (V )INPUT ON TERMINALS 1, 5, 8, 12 OR 2, 6, 9, 13;OTHER INPUTS TIED TO VDD AMBIENT TEMPERATURE (T A ) = +25o CSUPPLY VOLTAGE (VDD) (V)010152050152025105H Y S T E R E S I SV H X 100P E R C E N TV D D ((8642104864210386421028642108642110-1RISE AND FALL TIME (tr, tf) (ns)0.186421864210102103104864286428642P O W E R D I S S I P A T I O N (P D ) (µW )SUPPL Y VOLTAGE (VDD) = 15pFFREQUENCY (f) = 100kHz AMBIENT TEMPERATURE (T A ) = +25o C LOAD CAPACITANCE (CL) = 15pF 15V , 10kHz15V , 1kHz 10V , 1kHz 5V , 1kHzVDD VSSFREQUENCY RANGE OF WAVE SHAPE IS FROM DC TO 1MHzVDD VSS1/6 CD40106BMSVDDVSS1/3 CD4007UBRCVSSVDDtM = RC n50k Ω≤ R ≤ 1M Ω100pF ≤ C ≤ 1µFVDD VDD-VPFOR THE RANGE OF R AND C GIVEN 5µs < tM < 1sVDDVSStM1/6 CD40106BMS21FIGURE 16.ASTABLE MULTIVIBRATORFIGURE 17.HYSTERESIS DEFINITION, CHARACTERISTICS, AND TEST SETUPFIGURE 18.INPUT AND OUTPUT CHARACTERISTICSApplications (Continued)VDDVSSR C VSStA = RC n50k Ω≤ R ≤ 1M Ω100pF ≤ C ≤ 1µFVP VNFOR THE RANGE OF R AND C GIVEN 2µs < tA < 0.4stAVDD-VN VDD-VP1/6 CD40106BMSVDD VIN VSS VDD VO VSSVPVNVHVHVNVPVOVINVH = VP - VN(a) DEFINITION OF VP , VN, VH(b)TRANSFER CHARACTERISTIC OF 1 OF 6 GATESVINVOLOGIC “1”OUTPUT REGIONLOGIC “0”OUTPUT REGIONLOGIC “1”INPUT REGIONLOGIC “0”INPUT REGIONVDDVSS VOLVNVPVOHOUTPUTCHARACTERISTICINPUTCHARACTERISTICDRIVER LOADVOLVOHAll Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.For information regarding Intersil Corporation and its products, see web site Sales Office HeadquartersNORTH AMERICAIntersil CorporationP. O. Box 883, Mail Stop 53-204 Melbourne, FL32902TEL:(321) 724-7000FAX: (321) 724-7240EUROPEIntersil SAMercure Center100, Rue de la Fusee1130 Brussels, BelgiumTEL: (32) 2.724.2111FAX: (32) 2.724.22.05ASIAIntersil (Taiwan) Ltd.Taiwan Limited7F-6, No. 101 Fu Hsing North RoadTaipei, TaiwanRepublic of ChinaTEL: (886) 2 2716 9310FAX: (886) 2 2715 3029Chip Dimensions and Pad LayoutDimensions in parenthesis are in millimeters and arederived from the basic inch dimensions as indicated.Grid graduations are in mils (10-3 inch).METALLIZATION:Thickness: 11kÅ−14kÅ, AL.PASSIVATION:10.4kÅ - 15.6kÅ, SilaneBOND PADS:0.004 inches X 0.004 inches MINDIE THICKNESS:0.0198 inches - 0.0218 inches。

CD40106施密特触发器

CD40106施密特触发器

7.1.1 5G555 定时器的电路结构
图7.1所示是国产双极型定时器5G555的逻辑图和管脚排列图。它由以下几部 分构成.
Vcc
Vco
8 5KΩC1
CO
5
U + R1
4 G1
UC1 &
Q-
Vi1 TH 6 _
5KΩ
Vi2TR
2 +
UR2 _
&
UC2 Q
G2
G3 1 OUT Vo
3
Vo’D
5KΩ
7
TD
2.脉冲整形 若输入信号是一个顶部和前后沿受干扰而发生畸变的不规则波形,我们可以适当调节施 密特触发器的回差电压,得到整齐的矩形脉冲,如图7。5所示。需要注意的是,将施 密特触发器作整形运用时,应当适当提高回差电压,才能收到较好的整形效果。如果回 差电压较小,例如ΔVT小于顶部干扰信号的幅度,不但整形效果较差,而且可能产生 错误输出。但回差电压过大,又会降低触发灵敏度,所以应当根据具体情况灵活运用。
不妨假设接通电源后定时器的输出 Vo=VOH,若 Vo=VOH,则门 G3 的输入必然为低电平,放电
管 TD 必然截止,D 端对外如同开路。这样,VCC 通过 R 对电容 C 充电,使VC 点电位升高当
VC≥2/3VCC 时,将使比较器 C1 的输出UC1 为低电平,即 UC1=0,使 Q =1,VO =VOL。Q =
Vcc D TH CO 8765
5G555
1234
GND
-
TR OUT
R-D
1
图7.1 5G555计时器
1. 分压器
由三个阻值均为5kΩ的电阻串联构成分压器,为电压比较器C1和C2提供参考电压。 若控制电压输入端(CO端,引脚5)外加控制电压VCO,则比较器C1、C2的参考电压 分别为UR1=V∽,UR2=1/2V∽;不加控制电压时,该引出端不可悬空,一般要通过 一个小电容(如0.01μF)接地,以旁路高频干扰。这时两参考电压分别为UR1=2/ 3VCC,UR2=1/3VCC。
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CD40106中文资料
简介:CD40106中文资料:CD40106由六个斯密特触发器电路组成。

每个电路均为在两输入端具有斯密特触发器功能的反相器。

触发器在信号的上升和下降沿的...
CD40106由六个斯密特触发器电路组成。

每个电路均为在两输入端具有斯密特触发器功能的反相器。

触发器在信号的上升和下降沿的不同点开、关。

上升电压(V T+)和下降电压(V T-)之差定义为滞后电压。

CD40106引脚图
引脚功能:
2 4 6 8 10 12 数据输出端
1 3 5 9 11 13 数据输入端
14 电源正
7 接地
CD40106内部图
Absolute Maximum Ratings 绝对最大额定值:
Recommended Operating Conditions 建议操作条件:
典型应用电路
/DocinViewer-50657266-144.swf
六施密特触发器,应该14脚,因为每施密特触发器两条,外加电源和地,是14脚.
一般做波形整形,将任意波形整成方波的形式.
也可以做普通的反相器用.
也可以搭建RC振荡电路时,作为反相放大器使用
CD40106由六个施密特触发器电路组成。

每个电路均为在两输入端具有斯密特触发器功能的反相器。

触发器在信号的上升和下降沿的不同点开、关。

上升电压(V T+)和下降电压(V T-)之差定义为滞后电压。

引脚功能:
2 4 6 8 10 12 数据输出端
1 3 5 9 11 13 数据输入端
14 电源正
7 接地
Absolute Maximum Ratings 绝对最大额定值:
Recommended Operating Conditions 建议操作条件:
DC Electrical Characteristics 直流电气特性:
AC Electrical Characteristics 交流电气特性:
典型应用电路:。

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