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M od ified Va lue R a n ge of ST D T es t 1 Pe rm ittivity (D k o r E r), m axim u m @ 1M H z @ 1G H z Scan ran g e 1-20 G H z Los s Tan g ent (D f), m axim u m @ 1M H z @ 1G H z Scan ran g e 1-20 G H z M ois tu re Ab so rptio n , m a xim um F lexu ral Stren gth , m inim u m Le n gth d ire ction C ro ss dire ction F lam m a b ility D e com position T em pe ratu re (T d ) Z -A xis C T E Alp ha 1 Alp ha 2 50 -260 C Yo u ng's M odu lu s T he rm a l R esista nce T2 60 T2 88 NA NA
2. Commit appropriate resources to meet project timeline
• Participate in Electrical and Material WG efforts to define technology envelope and test metrologies • Provide materials, components, test vehicles, and assist with modeling/design/assembly/test/failure analysis as needed
FR 4
Notebook Desktop Mobile Phone Other (Server, consumer)
HFR-Free FR 4
Area (Mm²) HFR-Free FR 4 Total Notebook Desktop Mobile Phone Other (Server, consumer)
2
3 4
• Establish test methods
Objective
• Align entire supply chain behind common requirements
5 6 7
8 9
5
HFR-Free Proposal
Technology Envelope Proposal
iNEMI HFR-Free Transition Program Material Work Group Electrical Work Group Client Server Add-in cards Handhelds …
Is this acceptable?
7
iNEMI HFR-Free PCB Technology Envelope Project
Stephen Tisdale, John Davignon, Stephen H. Hall Intel Corporation January 20, 2009
8
3. Agree to use the HF PCB technology envelope parameters in future designs 4. Support industry standard recommendations to IPC/JEDEC (if applicable)
• HF PCB Technology Envelope
This Project IS NOT:
An EHS assessment
Biased towards specific laminate Focused on those design attributes which suppliers, geographies, or market are of most value to the broader industry segments Build on learning from prior investigations Focused on circuit board materials and solder joint reliability – Board / Component Interaction Focused on generating data / design guidelines for development of an industry standard Repeat of prior work Focused only on materials characterization
A B C D E F G H I J K
Color Code Equal to or better than FR4 (No issue) Marginal vs FR4 (Issue not clear) Worse than FR4 (Clear Issue) No Data
Derived from iNEMI WG data
CAAGR: Compound aggregate annual growth rate
If HFR-Free supplants standard FR4, CAAGR grows to almost 70%
(Potential for significant supply chain disruptions)
electrical
Program Lead:
Martin Rausch martin.rausch@
Parameter xxxx yyyy zzzz … …
Min aa cc
Max bb dd
Electrical WG Lead:
Steve Hall, Intel
Materials WG Lead:
Material improvements will be required to meet “interchangeable with FR4” goal
(simplifies DIMM, PCIe add-in card transition)
4
HFR-Free Proposal
Technology Envelope Proposal
•
•
3 - Phase Approach:
1. 2. 3. Design Test Results
9
iNEMI HFR-Free PCB Technology Envelope Project
IS / IS NOT This Project IS:
Technical evaluation of key electrical and mechanical properties of HFR-free Materials
Halogen Flame Retardant (HFR)-Free Leadership
January 20, 2009
Agenda
• HFR-Free Transition Proposal – M. Rausch, Intel
- Market Analysis - Technology Envelope Proposal - Product Conversion Goals - Discussion of Proposal
6
HFR-Free Proposal
Participation Requirements
All Participants Must:
1. Agree on a transition date to HF PCB Materials
• Possibly by application / market segment • Full BOM enabling will be driven by OEM/ODM (This is due to the complexity of business models)
John Davignon, Intel
(electrical, thermal/mech, assembly, quality/reliability)
Keys to success
• Gain participation from all members of supply chain - OEM, ODM/EMS, PCB suppliers, Laminate suppliers, DIMM/add-in card suppliers • Member companies ensure technology envelope meets requirements - Reliability, cost, availability, performance, etc… • Envelope gets used (de-facto standard) - Specify product, drive new material development, etc…
3
HFR-Free Proposal
Market Analysis
Material Dk Df Moisture Absorption Tg CTE Flexure
LAMINATE SCORECARD
Td Peel T260 /Cu T288 /Cu Strength IST CAF UL94V0 Shock Vibe Temp Cycle
iNEMI HFR-Free PCB Technology Envelope Project
Project Objective
• Identify BFR-free PCB materials and technology envelope which allow drop in replacement capability of BFR-free Materials with standard FR-4 PCB Designs Identify technology readiness, supply capability and reliability characteristics for “BFR-free” alternatives to conventional printed wiring board materials and printed wiring board assemblies Provide Industry Standard Technology Envelope for BFR-free Materials across all market segments
2
HFR-Free Proposal
Market Analysis
MARKET AND GROWTH OF RIGID LAMINATE
Area (Mm²) FR 4 Total 2006 256.8 2007 284.4 18.0 35.3 14.7 216.4 2006 11.4 2007 20.9 3.9 1.8 7.5 7.7 2012 430.3 39.1 40.4 21.6 329.2 2012 60.9 13.8 5.2 21.4 20.5 Value CAAGR (‘07-’12) 8.6% 16.7% 2.7% 8.0% 8.8% Value CAAGR (‘07-’12) 23.9% 29.0% 23.6% 23.4% 21.6%
• Time Line and Initial Project – Steve Tisdale, Intel • Next Steps – B-Free Proposal
Objective
1. Identify BFR-free PCB technology envelope which allows drop in replacement capability with standard FR4-based designs. 2. Identify technology readiness, supply capability and reliability characteristics for “BFR-free” alternatives to conventional printed wiring board materials and assemblies. 3. Provide Industry Standard Technology Envelope for BFR-free Materials across all market segments
Pr o pe rty N ew Va lu e o r T e s t P ro po sa l Valu e M a xim u m M inim um U n it
Proposal
• Identify key parameters • Validate acceptable range of values