LINEAR TECHNOLOGY LTC1603 数据手册

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1
LTC1603
2
1603f
3
LTC1603
DY A IC ACCURACY U
W SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS S/N
Signal-to-Noise Ratio
5kHz Input Signal q
87
90dB 100kHz Input Signal 90dB S/(N + D)Signal-to-(Noise + Distortion) Ratio 5kHz Input Signal
90dB 100kHz Input Signal (Note 10)q 84
89dB
THD Total Harmonic Distortion 5kHz Input Signal –100dB Up to 5th Harmonic 100kHz Input Signal q
–94–88
dB SFDR Spurious Free Dynamic Range 100kHz Input Signal
96dB IMD
Intermodulation Distortion f IN1 = 29.37kHz, f IN2 = 32.446kHz
–88dB Full Power Bandwidth
5MHz Full Linear Bandwidth (S/(N + D) ≥ 84dB
350
kHz
PARAMETER CONDITIONS MIN TYP MAX UNITS
V REF Output Voltage I OUT = 0 2.475
2.500 2.515
V V REF Output Tempco I OUT = 0
±15ppm/°C V REF Line Regulation 4.75 ≤ V DD ≤ 5.25V 0.01LSB/V –5.25V ≤ V SS ≤ –4.75V 0.01LSB/V V REF Output Resistance 0 ≤ I OUT ≤ 1mA 7.5k ΩREFCOMP Output Voltage
I OUT = 0
4.375
V
I TER A L REFERE C E CHARACTERISTICS
U U U
SYMBOL PARAMETER
CONDITIONS MIN
TYP MAX UNITS
V IH High Level Input Voltage V DD = 5.25V q 2.4
V V IL Low Level Input Voltage V DD = 4.75V q 0.8V I IN Digital Input Current V IN = 0V to V DD
q
±10
µA C IN Digital Input Capacitance 5
pF V OH High Level Output Voltage V DD = 4.75V, I OUT = –10µA 4.5
V V DD = 4.75V, I OUT = –400µA q 4.0
V
V OL Low Level Output Voltage V DD = 4.75V, I OUT = 160µA 0.05V V DD = 4.75V, I OUT = 1.6mA q 0.10
0.4V I OZ Hi-Z Output Leakage D15 to D0V OUT = 0V to V DD , CS High q ±10µA C OZ Hi-Z Output Capacitance D15 to D0CS High (Note 11)q
15
pF I SOURCE Output Source Current V OUT = 0V –10mA I SINK
Output Sink Current
V OUT = V DD
10
mA
DIGITAL I PUTS A D DIGITAL OUTPUTS
U
U The q denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T A = 25°C. (Note 5)
(Note 5)
The q denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T A = 25°C. (Note 5)
4
LTC1603
1603f
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V DD Positive Supply Voltage (Notes 12, 13) 4.75 5.25V V SS Negative Supply Voltage (Note 12)
–4.75
–5.25
V I DD
Positive Supply Current
CS = RD = 0V
q
1830mA Nap Mode CS = 0V, SHDN = 0V 1.5 2.4mA Sleep Mode CS = 5V, SHDN = 0V 1100µA I SS
Negative Supply Current CS = RD = 0V
q
2640mA Nap Mode CS = 0V, SHDN = 0V 1100µA Sleep Mode CS = 5V, SHDN = 0V 1100µA P D
Power Dissipation CS = RD = 0V
q
220350mW Nap Mode CS = 0V, SHDN = 0V 7.512mW Sleep Mode
CS = 5V, SHDN = 0V
0.01
1
mW
POWER REQUIRE E T S
W
U TI I G CHARACTERISTICS
U
W SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS f SMPL(MAX)Maximum Sampling Frequency q 250kHz t CONV Conversion Time q
2.2
3.3
3.8µs t ACQ Acquisition Time
(Note 11)q 480ns t ACQ+CONV Throughput Time (Acquisition + Conversion)q 4
µs t 1CS to RD Setup Time (Notes 11, 12)q 0ns t 2CS ↓ to CONVST ↓ Setup Time (Notes 11, 12)q 10ns t 3SHDN ↓ to CS ↑ Setup Time (Notes 11, 12)q
10
ns
t 4SHDN ↑ to CONVST ↓ Wake-Up Time CS = Low (Note 12)400
ns t 5CONVST Low Time (Note 12)q 40
ns t 6CONVST to BUSY Delay C L = 25pF
36
ns q
80
ns t 7Data Ready Before BUSY ↑
60
ns q
32ns t 8Delay Between Conversions (Note 12)q 200ns t 9Wait Time RD ↓ After BUSY ↑(Note 12)q –5
ns t 10
Data Access Time After RD ↓
C L = 25pF
40
50ns q
60ns C L = 100pF
4560ns q
75ns t 11
Bus Relinquish Time
50
60ns LTC1603C q 70ns LTC1603I
q 75
ns t 12RD Low Time (Note 12)q t 10ns t 13CONVST High Time
(Note 12)
q
40
ns
t 14
Aperture Delay of Sample-and-Hold
2
ns
The q denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T A = 25°C. (Note 5)
The q denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T A = 25°C. (Note 5)
5
CODE
–32768
–16384
016384
32767
1603 G11
0.5
0.0–0.5CODE
–32768–163841638432767
1603 G10
6
LTC1603
1603f
PI FU CTIO S
U U U
A IN + (Pin 1): Positive Analog Input. The ADC converts the difference voltage between A IN + and A IN – with a differen-tial range of ±2.5V. A IN + has a ±2.5V input range when A IN – is grounded.
A IN – (Pin 2): Negative Analog Input. Can be grounded, tied to a DC voltage or driven differentially with A IN +.V REF (Pin 3): 2.5V Reference Output. Bypass to AGND with 2.2µF tantalum in parallel with 0.1µF ceramic.REFCOMP (Pin 4): 4.375V Reference Compensation Pin.Bypass to AGND with 47µF tantalum in parallel with 0.1µF ceramic.
AGND (Pins 5 to 8): Analog Grounds. Tie to analog ground plane.
DV DD (Pin 9): 5V Digital Power Supply. Bypass to DGND with 10µF tantalum in parallel with 0.1µF ceramic.DGND (Pin 10): Digital Ground for Internal Logic. Tie to analog ground plane.
D15 to D0 (Pins 11 to 26): Three-State Data Outputs. D15is the Most Significant Bit.
BUSY (Pin 27): The BUSY output shows the converter status. It is low when a conversion is in progress. Data is valid on the rising edge of BUSY.
OGND (Pin 28): Digital Ground for Output Drivers.OV DD (Pin 29): Digital Power Supply for Output Drivers.Bypass to OGND with 10µF tantalum in parallel with 0.1µF ceramic.
RD (Pin 30): Read Input. A logic low enables the output drivers when CS is low.
CONVST (Pin 31): Conversion Start Signal. This active low signal starts a conversion on its falling edge when CS is low.
CS (Pin 32): The Chip Select Input. Must be low for the ADC to recognize CONVST and RD inputs.
SHDN (Pin 33): Power Shutdown. Drive this pin low with CS low for nap mode. Drive this pin low with CS high for sleep mode.
V SS (Pin 34): –5V Negative Supply. Bypass to AGND with 10µF tantalum in parallel with 0.1µF ceramic.
AV DD (Pin 35): 5V Analog Power Supply. Bypass to AGND with 10µF tantalum in parallel with 0.1µF ceramic.AV DD (Pin 36): 5V Analog Power Supply. Bypass to AGND with 10µF tantalum in parallel with 0.1µF ceramic and connect this pin to Pin 35 with a 10Ω resistor.
7
LTC1603
8
9
LTC1603
10
11
12
1603f
APPLICATIO S I FOR ATIO W U
U U starts (settling time must be 200ns for full throughput rate).
Choosing an Input Amplifier
Choosing an input amplifier is easy if a few requirements are taken into consideration. First, to limit the magnitude of the voltage spike seen by the amplifier from charging the sampling capacitor, choose an amplifier that has a low output impedance (<100Ω) at the closed-loop band-width frequency. For example, if an amplifier is used in a gain of +1 and has a unity-gain bandwidth of 50MHz, then the output impedance at 50MHz should be less than 100Ω. The second requirement is that the closed-loop bandwidth must be greater than 15MHz to ensure adequate small-signal settling for full throughput rate. If slower op amps are used, more settling time can be provided by increasing the time between conversions.The best choice for an op amp to drive the LTC1603 will depend on the application. Generally applications fall into two categories: AC applications where dynamic specifi-cations are most critical and time domain applications where DC accuracy and settling time are most critical.The following list is a summary of the op amps that are suitable for driving the LTC1603. More detailed informa-tion is available in the Linear Technology databooks, the LinearView TM CD-ROM and on our web site at:www.linear-tech. com.
Figure 10. t ACQ vs Source Resistance
LT ®1007: Low Noise Precision Amplifier. 2.7mA supply current, ±5V to ±15V supplies, gain bandwidth product 8MHz, DC applications.
LT1097: Low Cost, Low Power Precision Amplifier. 300µA supply current, ±5V to ±15V supplies, gain bandwidth product 0.7MHz, DC applications.
LT1227: 140MHz Video Current Feedback Amplifier. 10mA supply current, ±5V to ±15V supplies, low noise and low distortion.
LT1360: 37MHz Voltage Feedback Amplifier. 3.8mA sup-ply current, ±5V to ±15V supplies, good AC/DC specs.LT1363: 50MHz Voltage Feedback Amplifier. 6.3mA sup-ply current, good AC/DC specs.
LT1364/LT1365: Dual and Quad 50MHz Voltage Feedback Amplifiers. 6.3mA supply current per amplifier, good AC/DC specs.Input Filtering
The noise and the distortion of the input amplifier and other circuitry must be considered since they will add to the LTC1603 noise and distortion. The small-signal band-width of the sample-and-hold circuit is 15MHz. Any noise or distortion products that are present at the analog inputs will be summed over this entire bandwidth. Noisy input circuitry should be filtered prior to the analog inputs to minimize noise. A simple 1-pole RC filter is sufficient for many applications. For example, Figure 11 shows a 3000pF capacitor from A IN + to ground and a 100Ω source resistor to limit the input bandwidth to 530kHz. The 3000pF capacitor also acts as a charge reservoir for the input sample-and-hold and isolates the ADC input from sam-pling glitch sensitive circuitry. High quality capacitors and resistors should be used since these components can add distortion. NPO and silver mica type dielectric capacitors have excellent linearity. Carbon surface mount resistors can also generate distortion from self heating and from damage that may occur during soldering. Metal film surface mount resistors are much less susceptible to both problems.
LinearView is a trademark of Linear Technology Corporation.
SOURCE RESISTANCE (Ω)
1
101001k 10k
A C Q U I S I T I O N T I M E (µs )
10
1
0.1
0.01
1603 F10
13
14
15
16
Figure 18a. This FFT of the LTC1603’s Conversion of a Full-Scale 10kHz Sine Wave Shows Outstanding Response FREQUENCY (kHz)
60
1603 F18a
20
4080100120
17
Figure 18b. Even with Inputs at 100kHz, the LTC1603’s Dymanic Linearity Remains Robust
FREQUENCY (kHz)
1603 F18b
–100–120060204080100120
18
Figure 21. Intermodulation Distortion Plot
FREQUENCY (kHz)
20
80100
1603 F21
4060120
f SAMPLE = 250kHz f IN1 = 29.3kHz f IN2 = 32.4kHz
19
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
20
LT/TP 0503 1K • PRINTED IN USA
© LINEAR TECHNOLOGY CORPORA TION 2003
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507 q 。

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