CAT4104V-GT3;CAT4104VP2-GT3;中文规格书,Datasheet资料

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CAT4139TD-GT3;中文规格书,Datasheet资料

CAT413922 V High Current Boost White LED DriverDescriptionThe CAT4139 is a DC/DC step−up converter that delivers an accurate constant current ideal for driving LEDs. Operation at a fixed switching frequency of 1 MHz allows the device to be used with small value external ceramic capacitors and inductor. LEDs connected in series are driven with a regulated current set by the external resistor R1. The CAT4139 is ideal for driving parallel strings of up to five white LEDs in series or up to 22 V.LED dimming can be done by using a DC voltage, a logic signal, or a pulse width modulation (PWM) signal. The shutdown input pin allows the device to be placed in power−down mode with “zero”quiescent current.In addition to thermal protection and overload current limiting, the device also enters a very low power operating mode during “Open LED” fault conditions. The device is housed in a low profile (1mm max height) 5−lead TSOT−23 package for space critical applications. Features•Switch Current Limit 750 mA•Drives LED Strings up to 22 V•Up to 87% Efficiency•Low Quiescent Ground Current 0.6 mA•1 MHz Fixed Frequency Low Noise Operation•Soft Start “In−rush” Current Limiting•Shutdown Current Less than 1 m A•Open LED Overvoltage Protection•Automatic Shutdown at 1.9 V (UVLO)•Thermal Overload Protection•TSOT−23 5−Lead (1 mm Max Height)•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS CompliantApplications•GPS Navigation Systems•Portable Media Players•Handheld DevicesTSOT−23TD SUFFIXCASE 419AEPIN CONNECTIONSMARKING DIAGRAMDevice Package Shipping ORDERING INFORMATIONCAT4139TD−GT3(Note 1)TSOT−23(Pb−Free)3,000/Tape & Reel TP = Specific Device CodeY = Production Year (Last Digit)M = Production Month (1−9, A, B, C)(Top View)VINSHDNSWGNDFB1TPYM1.NiPdAu Plated Finish (RoHS−compliant)Figure 1. Typical Application Circuit9 strings at D: Central CMSH1−40 (rated 40 V)Table 1. ABSOLUTE MAXIMUM RATINGSParametersRatings Units VIN, FB Voltage −0.3 to +7V SHDN Voltage −0.3 to +7V SW Voltage−0.3 to +40V Storage Temperature Range −65 to +160_C Junction Temperature Range −40 to +150_C Lead Temperature300_CStresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.Table 2. RECOMMENDED OPERATING CONDITIONS (Typical application circuit with external components is shown above.)ParametersRange Units VINup to 5.5V SW pin voltage0 to 22V Ambient Temperature Range (Note 2)−40 to +85_C2.TSOT23−5 package thermal resistance q JA = 135°C/W when mounted on board over a ground plane.Table 3. DC ELECTRICAL CHARACTERISTICS(V IN = 3.6 V, ambient temperature of 25°C (over recommended operating conditions unless otherwise specified))Symbol Parameter Test Conditions Min Typ Max UnitsI Q Operating Current V FB= 0.2 VV FB= 0.4 V (not switching)0.60.11.50.6mAI SD Shutdown Current V SHDN = 0 V0.11m A V FB FB Pin Voltage9 x 3 LEDs, I OUT = 180 mA285300315mV I FB FB pin input leakage1m AI LED Programmed LED Current R1 = 10 WR1 = 3 W 28.53010031.5mAV IH V IL SHDN Logic HighSHDN Logic LowEnable Threshold LevelShutdown Threshold Level0.40.80.71.5VF SW Switching Frequency0.8 1.0 1.3MHzI LIM Switch Current Limit V IN = 3.6 VV IN = 5 V 600750mAR SW Switch “On” Resistance I SW = 100 mA 1.0 2.0W I LEAK Switch Leakage Current Switch Off, V SW = 5 V15m A T SD Thermal Shutdown150°C T HYST Thermal Hysteresis20°C V UVLO Under−voltage lock out (UVLO) Threshold 1.9V V OV−DET Over−voltage detection threshold2324V V OCL Output Clamp voltage“Open LED”29VDC Maximum duty cycleMinimum duty cycle 9216%Figure 2. Quiescent Current vs. V IN(Not Switching)Figure 3. Quiescent Current vs. V IN(Switching)INPUT VOLTAGE (V)INPUT VOLTAGE (V)501001502005.04.54.03.53.000.51.01.52.0Figure 4. FB Pin Voltage vs. TemperatureFigure 5. FB Pin Voltage vs. Output CurrentTEMPERATURE (°C)OUTPUT CURRENT (mA)10015050−5029729830130230320018016014012010080290295300305310Figure 6. Switching Frequency vs. SupplyVoltage Figure 7. Switch ON Resistance vs.Input VoltageINPUT VOLTAGE (V)4.0 4.53.53.00.80.91.01.11.2Q U I E S C E N T C U R R E N T (m A )Q U I E S C E N T C U R R E N T (m A )F B P I N V O L T A G E (m V )F B P I N V O L T AG E (m V )S W I T C H I N G F R E Q U E N C Y (M H z )INPUT VOLTAGE (V)4.54.05.03.53.000.51.01.52.0S W I T C H R E S I S T A N C E (W )5.5299300 5.0 5.55.5Figure 8. Output Current vs. Input VoltageFigure 9. Output Current RegulationINPUT VOLTAGE (V)INPUT VOLTAGE (V)5.04.54.03.53.0100120140160180200 5.55.14.94.74.5−2.0−0.500.52.0Figure 10. Efficiency vs. Output Current Figure 11. Efficiency vs. Input VoltageOUTPUT CURRENT (mA)INPUT VOLTAGE (V)2001801601201008075808590957580859095Figure 12. Power −up at 180 mA Figure 13. Switching WaveformL E D C U R R E N T (m A )I O U T V A R I A T I O N (%)E F F I C I E N C Y (%)E F F I C I E N C Y (%)5.3140 5.5−1.0−1.51.01.5Figure 14. Maximum Output CurrentFigure 15. Shutdown VoltageINPUT VOLTAGE (V)INPUT VOLTAGE (V)501001502503000.20.61.0Figure 16. Switch Current LimitINPUT VOLTAGE (V)600650750800900M A X O U T P U T C U R R E N T (m A )S H U T D O W N V O L T A G E (V )S W I T C H C U R R E N T L I M I T (m A )0.40.8200700850VIN is the supply input for the internal logic. The device is compatible with supply voltages down to 2.8 V and up to 5.5V. It is recommended that a small bypass ceramic capacitor (4.7 m F) be placed between the VIN and GND pins near the device. If the supply voltage drops below 1.9 V, the device stops switching.SHDN is the shutdown logic input. When the pin is tied to a voltage lower than 0.4 V, the device is in shutdown mode, drawing nearly zero current. When the pin is connected to a voltage higher than 1.5 V, the device is enabled.GND is the ground reference pin. This pin should be connected directly to the ground plane on the PCB.SW pin is connected to the drain of the internal CMOS power switch of the boost converter. The inductor and the Schottky diode anode should be connected to the SW pin. Traces going to the SW pin should be as short as possible with minimum loop area. An over−voltage detection circuit is connected to the SW pin. When the voltage reaches 24V, the device enters a low power operating mode preventing the SW voltage from exceeding the maximum rating.FB feedback pin is regulated at 0.3 V. A resistor connected between the FB pin and ground sets the LED current according to the formula:I LED+0.3VR1The lower LED cathode is connected to the FB pin.Table 4. PIN DESCRIPTIONSPin #Name Function 1SW Switch pin. This is the drain of the internal power switch.2GND Ground pin. Connect the pin to the ground plane.3FB Feedback pin. Connect to the last LED cathode.4SHDN Shutdown pin (Logic Low). Set high to enable the driver.5VIN Power Supply input.The CAT4139 is a fixed frequency (1 MHz), low noise, inductive boost converter that provides a constant current with excellent line and load regulation. The device uses a high−voltage CMOS power switch between the SW pin and ground to energize the inductor. When the switch is turned off, the stored energy in the inductor is released into the load via the Schottky diode.The on/off duty cycle of the power switch is internally adjusted and controlled to maintain a constant regulated voltage of 0.3 V across the feedback resistor connected to the feedback pin (FB). The value of the resistor sets the LED current accordingly (0.3 V/R1).During the initial power−up stage, the duty cycle of the internal power switch is limited to prevent excessive in−rush currents and thereby provide a “soft−start” mode of operation.In the event of an “Open LED” fault condition, where the feedback control loop becomes open, the output voltage will continue to increase. Once this voltage exceeds 24 V, an internal protection circuit will become active and place the device into a very low power safe operating mode. Thermal overload protection circuitry has been included to prevent the device from operating at unsafe junction temperatures above 150°C. In the event of a thermal overload condition the device will automatically shutdown and wait till the junction temperatures cools to 130°C before normal operation is resumed.Application Information External Component SelectionCapacitorsThe CAT4139 only requires small ceramic capacitors of 4.7m F on the input and 1 m F on the output. Under normal condition, a 4.7 m F input capacitor is sufficient. For applications with higher output power, a larger input capacitor of 10 m F may be appropriate. X5R and X7R capacitor types are ideal due to their stability across temperature range.InductorA 22 m H inductor is recommended for most of the CAT4139 applications. In cases where the efficiency is critical, inductances with lower series resistance are preferred. Inductors with current rating of 800mA or higher are recommended for most applications. Sumida CDRH6D28−220 22 m H inductor has a rated current of 1.2A and a series resistance (D.C.R.) of 128 m W typical. Schottky DiodeThe current rating of the Schottky diode must exceed the peak current flowing through it. The Schottky diode performance is rated in terms of its forward voltage at a given current. In order to achieve the best efficiency, this forward voltage should be as low as possible. The response time is also critical since the driver is operating at 1MHz. Central Semiconductor Schottky rectifier CMSH1−40 (1A rated) is recommended for most applications.LED Current SettingThe LED current is set by the external resistor R1 connected between the feedback pin (FB) and ground. The formula below gives the relationship between the resistor and the current:R1+0.3VLED currentTable 5. RESISTOR R1 AND LED CURRENTLED Current (mA)R1 (W)20152512301010033001Open LED ProtectionIn the event of an “Open LED” fault condition, the CAT4139 will continue to boost the output voltage with maximum power until the output voltage reaches approximately 24 V . Once the output exceeds this level, the internal circuitry immediately places the device into a very low power mode where the total input power is limited to about 6 mW (about 1.6 mA input current with a 3.6V supply). The SW pin clamps at a voltage below its maximum rating of 40 V . There is no need to use an external zener diode between VOUT and the FB pin. A 35 V rated C2 capacitor is required to prevent any overvoltage damage in the open LED condition.Figure 18. Open LED Protection CircuitSchottky 40 V (Central CMSH05−4)V Figure 19. Open LED Disconnect and ReconnectFigure 20. Open LED DisconnectFigure 21. Open LED Supply Current Figure 22. Open LED Output VoltageINPUT VOLTAGE (V)INPUT VOLTAGE (V)5.55.04.54.03.53.01.01.52.02.55.55.04.54.03.53.01520253035I N P U T C U R R E N T (m A )O U T P U T V O L T A G E (V )Dimming ControlThere are several methods available to control the LED brightness.PWM Signal on the SHDN PinLED brightness dimming can be done by applying a PWM signal to the SHDN input. The LED current is repetitively turned on and off, so that the average current is proportional to the duty cycle. A 100% duty cycle, with SHDN always high, corresponds to the LEDs at nominal current. Figure23 shows a 1 kHz signal with a 50% duty cycle applied to the SHDN pin. The recommended PWM frequency range is from 100Hz to 2 kHz.Figure 23. Switching Waveform with 1 kHzPWM on SHDN Filtered PWM SignalA filtered PWM signal used as a variable DC voltage can control the LED current. Figure 24 shows the PWM control circuitry connected to the CAT4139 FB pin. The PWM signal has a voltage swing of 0 V to 2.5 V. The LED current can be dimmed within a range from 0 mA to 20 mA. The PWM signal frequency can vary from very low frequency and up to 100 kHz.Figure 24. Circuit for Filtered PWM Signal0 V2.5 VW PWMSignalVA PWM signal at 0 V DC, or a 0% duty cycle, results in a max LED current of about 22 mA. A PWM signal with a 93% duty cycle or more, results in an LED current of 0mA.Figure 25. Filtered PWM Dimming (0 V to 2.5 V)LEDCURRENT(mA)2520151050102030405060708090100PWM DUTY CYCLE (%)分销商库存信息: ONSEMICAT4139TD-GT3。

海康威视 cMT-G04 产品说明书

使用手冊目錄第一章概要 (1)1.1規格介紹 (1)1.2尺寸圖 (2)1.3恢復出廠值 (3)1.4LED 指示燈 (3)1.5CR1220 電池 (3)1.6電源連接 (3)第二章cMT-G04 系統設定 (4)2.1找尋cMT-G04 的IP位址 (4)2.2透過網路瀏覽器設定 (4)2.3System Setting (5)2.3.1Network (5)2.3.2Date/Time (6)2.3.3HMI Name (6)2.3.4History (7)2.3.5Email (7)2.3.6Project Management (8)2.3.7System Password (8)2.3.8Enhanced Security (9)2.3.9EasyAccess 2.0 (9)2.3.10OPC UA (10)2.3.11Communication (10)第三章Web package及OS更新 (12)3.1更新網頁套件 (12)3.2更新OS (13)第四章如何建立cMT-G04 工程檔案 (14)4.1 建立一個新工程檔案 (14)4.2 下載工程檔案至cMT-G04 (16)4.3 OPC UA Client監控 (17)4.4 連線模擬/離線模擬 (17)第五章cMT-G04支援的功能 (19)第六章使用網頁介面管理OPC UA (20)6.1.概要 (20)6.2.開啟/關閉OPC UA伺服器 (21)6.3.Server Settings (22)6.4.Edit Node (23)6.5.Certificates (24)6.6.Discovery (25)6.7.Advanced (26)第一章概要1.1規格介紹IIoT Gateway with Ethernet Bridge特點●內建乙太網路交換器，可節省佈線成本，SW1與SW2 方便連接現有的HMI和PLC, 不需要外加乙太網路交換器，而LAN則連接辦公室或工廠網路●支援OPC UA 及MQTT●薄型輕量設計並可使用鋁軌固定●無風扇冷卻系統●內建256 MB 儲存記憶體●內建電源隔離●寬輸入電壓範圍10.5~28VDC1.2尺寸圖adeFront View Side ViewTop View BottomViewbcadbc27mm [1.06"]1.3恢復出廠值每台cMT-G04皆有一個Default按鈕，長按此按鈕至少15秒，Gateway就會恢復成出廠預設值。

CAV24C32WE-GT3;CAV24C32YE-GT3;中文规格书,Datasheet资料

CAV24C3232-Kb I2C CMOS Serial EEPROMDescriptionThe CA V24C32 is a 32−Kb CMOS Serial EEPROM devices, internally organized as 4096 words of 8 bits each.It features a 32−byte page write buffer and supports the Standard (100kHz) and Fast (400 kHz) I2C protocol.External address pins make it possible to address up to eight CA V24C32 devices on the same bus.Features•Automotive Temperature Grade 1 (−40°C to +125°C)•Supports Standard and Fast I2C Protocol•2.5 V to 5.5 V Supply V oltage Range•32−Byte Page Write Buffer•Hardware Write Protection for Entire Memory•CA V Prefix for Automotive and Other Applications Requiring Site and Change Control•Schmitt Triggers and Noise Suppression Filters on I2C Bus Inputs (SCL and SDA)•Low Power CMOS Technology•1,000,000 Program/Erase Cycles•100 Year Data Retention•SOIC, TSSOP 8−lead Packages•This Device is Pb−Free, Halogen Free/BFR Free, and RoHS CompliantFigure 1. Functional Symbol SDASCL WPV CC SSA2, A1, APIN CONFIGURATIONSSDAWPV CCV SSA2A1A01See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet.ORDERING INFORMATIONSOIC−8W SUFFIXCASE 751BDSCLSOIC (W), TSSOP (Y)TSSOP−8Y SUFFIXCASE 948ALFor the location of Pin 1, please consult thecorresponding package drawing.Device Address Input A0, A1, A2Serial Data Input/OutputSDASerial Clock InputSCLWrite Protect InputWPPower SupplyV CCGroundV SSFunctionPin NamePIN FUNCTIONDEVICE MARKINGS(SOIC−8) (TSSOP−8)C32FAYMXXXC32F= Specific Device CodeA= Assembly LocationY= Production Year (Last Digit)M= Production Month (1-9, O, N, D)XXX= Last Three Digits of Assembly Lot Number G= Pb−Free Package 24C32F= Specific Device CodeA= Assembly LocationY= Production Year (Last Digit)M= Production Month (1-9, O, N, D)XXX= Last Three Digits of Assembly Lot Number G= Pb−Free Package24C32FAYMXXXGGTable 1. ABSOLUTE MAXIMUM RATINGSParameters Ratings Units Storage Temperature–65 to +150°C Voltage on any Pin with Respect to Ground (Note 1)–0.5 to +6.5V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.1.During input transitions, voltage undershoot on any pin should not exceed −1 V for more than 20 ns. Voltage overshoot on pins A0, A1, A2and WP should not exceed V CC + 1 V for more than 20 ns, while voltage on the I2C bus pins, SCL and SDA, should not exceed the absolute maximum ratings, irrespective of V CC.Table 2. RELIABILITY CHARACTERISTICS (Note 2)Symbol Parameter Min UnitsN END (Note 3)Endurance1,000,000Program/Erase Cycles T DR Data Retention100Years2.These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100and JEDEC test methods.3.Page Mode, V CC = 5 V, 25°C.Table 3. D.C. OPERATING CHARACTERISTICS (V CC = 2.5 V to 5.5 V, T A = −40°C to +125°C, unless otherwise speciﬁed.) Symbol Parameter Test Conditions Min Max UnitsI CCR Read Current Read, f SCL = 400 kHz1mAI CCW Write Current Write, f SCL = 400 kHz2mAI SB Standby Current All I/O Pins at GND or V CC T A = −40°C to +125°C5m AI L I/O Pin Leakage Pin at GND or V CC2m AV IL Input Low Voltage−0.50.3 x V CC V V IH Input High Voltage A0, A1, A2 and WP0.7 x V CC V CC + 0.5VSCL and SDA0.7 x V CC 5.5 V OL Output Low Voltage V CC > 2.5 V, I OL = 3 mA0.4VTable 4. PIN IMPEDANCE CHARACTERISTICS (V CC = 2.5 V to 5.5 V, T A = −40°C to +125°C, unless otherwise speciﬁed.) Symbol Parameter Conditions Max Units C IN (Note 4)SDA I/O Pin Capacitance V IN = 0 V, T A = 25°C, V CC = 5.0 V8pF C IN (Note 4)Input Capacitance (other pins)V IN = 0 V, T A = 25°C, V CC = 5.0 V6pF I WP (Note 5)WP Input Current V IN< V IH, V CC = 5.5 V130m AV IN < V IH, V CC = 3.3 V120V IN < V IH, V CC = 2.5 V80V IN < V IH2I A (Note 5)Address Input Current(A0, A1, A2)Product Rev F V IN< V IH, V CC = 5.5 V50m A V IN < V IH, V CC = 3.3 V35V IN < V IH, V CC = 2.5 V25V IN > V IH24.These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100and JEDEC test methods.5.When not driven, the WP, A0, A1 and A2 pins are pulled down to GND internally. For improved noise immunity, the internal pull−down is relativelystrong; therefore the external driver must be able to supply the pull−down current when attempting to drive the input HIGH. T o conserve power, as the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x V CC), the strong pull−down reverts to a weak current source.Table 5. A.C. CHARACTERISTICS (V CC = 2.5 V to 5.5 V, T A = −40°C to +125°C, unless otherwise specified.) (Note 6)Symbol ParameterStandard FastUnits Min Max Min MaxF SCL Clock Frequency100400kHzt HD:STA START Condition Hold Time40.6m s t LOW Low Period of SCL Clock 4.7 1.3m s t HIGH High Period of SCL Clock40.6m s t SU:STA START Condition Setup Time 4.70.6m s t HD:DAT Data In Hold Time00m s t SU:DAT Data In Setup Time250100ns t R SDA and SCL Rise Time1000300ns t F (Note 6)SDA and SCL Fall Time300300ns t SU:STO STOP Condition Setup Time40.6m s t BUF Bus Free Time Between STOP and START 4.7 1.3m s t AA SCL Low to Data Out Valid 3.50.9m s t DH Data Out Hold Time100100ns T i (Note 6)Noise Pulse Filtered at SCL and SDA Inputs100100ns t SU:WP WP Setup Time00m s t HD:WP WP Hold Time 2.5 2.5m s t WR Write Cycle Time55ms t PU (Notes 7, 8)Power−up to Ready Mode11ms6.Test conditions according to “AC Test Conditions” table.7.Tested initially and after a design or process change that affects this parameter.8.t PU is the delay between the time V CC is stable and the device is ready to accept commands.Table 6. A.C. TEST CONDITIONSInput Drive Levels0.2 x V CC to 0.8 x V CCInput Rise and Fall Time≤ 50 nsInput Reference Levels0.3 x V CC, 0.7 x V CCOutput Reference Level0.5 x V CCOutput Test Load Current Source I OL = 3 mA; C L = 100 pFPower-On Reset (POR)Each CA V24C32 incorporates Power-On Reset (POR)circuitry which protects the internal logic against powering up in the wrong state. The device will power up into Standby mode after V CC exceeds the POR trigger level and will power down into Reset mode when V CC drops below the POR trigger level. This bi-directional POR behavior protects the device against ‘brown-out’ failure following a temporary loss of power.Pin DescriptionSCL: The Serial Clock input pin accepts the clock signal generated by the Master.SDA: The Serial Data I/O pin accepts input data and delivers output data. In transmit mode, this pin is open drain. Data is acquired on the positive edge, and is delivered on the negative edge of SCL.A 0, A 1 and A 2: The Address inputs set the device address that must be matched by the corresponding Slave address bits. The Address inputs are hard-wired HIGH or LOW allowing for up to eight devices to be used (cascaded) on the same bus. When left floating, these pins are pulled LOW internally.WP: When pulled HIGH, the Write Protect input pin inhibits all write operations. When left floating, this pin is pulled LOW internally.Functional DescriptionThe CA V24C32 supports the Inter-Integrated Circuit (I 2C) Bus protocol. The protocol relies on the use of a Master device, which provides the clock and directs bus traffic, and Slave devices which execute requests. The CA V24C32operates as a Slave device. Both Master and Slave can transmit or receive, but only the Master can assign those roles.I 2C Bus ProtocolThe 2-wire I 2C bus consists of two lines, SCL and SDA,connected to the V CC supply via pull-up resistors. The Master provides the clock to the SCL line, and either the Master or the Slaves drive the SDA line. A ‘0’ is transmitted by pulling a line LOW and a ‘1’ by letting it stay HIGH. Data transfer may be initiated only when the bus is not busy (see A.C. Characteristics). During data transfer, SDA must remain stable while SCL is HIGH.START/STOP Condition An SDA transition while SCL is HIGH creates a START or STOP condition (Figure 2). The START consists of a HIGH to LOW SDA transition, while SCL is HIGH. Absent the START, a Slave will not respond to the Master. The STOP completes all commands, and consists of a LOW to HIGH SDA transition, while SCL is HIGH.Device AddressingThe Master addresses a Slave by creating a START condition and then broadcasting an 8-bit Slave address. For the CA V24C32, the first four bits of the Slave address are set to 1010 (Ah); the next three bits, A 2, A 1 and A 0, must match the logic state of the similarly named input pins. The R/W bit tells the Slave whether the Master intends to read (1) or write (0) data (Figure 3).AcknowledgeDuring the 9th clock cycle following every byte sent to the bus, the transmitter releases the SDA line, allowing the receiver to respond. The receiver then either acknowledges (ACK) by pulling SDA LOW, or does not acknowledge (NoACK) by letting SDA stay HIGH (Figure 4). Bus timing is illustrated in Figure 5.START CONDITIONSTOP CONDITIONSDASCLFigure 2. Start/Stop TimingFigure 3. Slave Address BitsDEVICE ADDRESSFigure 4. Acknowledge TimingSCL FROM MASTERDATA OUTPUTFROM TRANSMITTERDATA OUTPUT FROM RECEIVER≥ t SU:DAT )Figure 5. Bus TimingSCLSDA INSDA OUTWRITE OPERATIONSByte WriteTo write data to memory, the Master creates a START condition on the bus and then broadcasts a Slave address with the R/W bit set to ‘0’. The Master then sends two address bytes and a data byte and concludes the session by creating a STOP condition on the bus. The Slave responds with ACK after every byte sent by the Master (Figure 6). The STOP starts the internal Write cycle, and while this operation is in progress (t WR ), the SDA output is tri-stated and the Slave does not acknowledge the Master (Figure 7).Page WriteThe Byte Write operation can be expanded to Page Write,by sending more than one data byte to the Slave before issuing the STOP condition (Figure 8). Up to 32 distinct data bytes can be loaded into the internal Page Write Buffer starting at the address provided by the Master. The page address is latched, and as long as the Master keeps sending data, the internal byte address is incremented up to the end of page, where it then wraps around (within the page). New data can therefore replace data loaded earlier. Following the STOP, data loaded during the Page Write session will be written to memory in a single internal Write cycle (t WR ).Acknowledge PollingAs soon (and as long) as internal Write is in progress, the Slave will not acknowledge the Master. This feature enables the Master to immediately follow-up with a new Read or Write request, rather than wait for the maximum specified Write time (t WR ) to elapse. Upon receiving a NoACK response from the Slave, the Master simply repeats the request until the Slave responds with ACK.Hardware Write ProtectionWith the WP pin held HIGH, the entire memory is protected against Write operations. If the WP pin is left floating or is grounded, it has no impact on the Write operation. The state of the WP pin is strobed on the last falling edge of SCL immediately preceding the 1st data byte (Figure 9). If the WP pin is HIGH during the strobe interval,the Slave will not acknowledge the data byte and the Write request will be rejected.Delivery StateThe CA V24C32 is shipped erased, i.e., all bytes are FFh.SLAVE ADDRESSSA ****C KA C KA C KS T O P PST ARTA CKBUS ACTIVITY:MASTER SLAVEADDRESS BYTE ADDRESS BYTE DAT A BYTE Figure 6. Byte Write Sequence*a 15 − a 12 are don’t care bitsa 15 − a 8a 7 − a 0d 7 − d 0Figure 7. Write Cycle TimingSTOPCONDITIONSTARTCONDITIONADDRESSSCLSDASLAVE ADDRESSSA C K A C K C K ST ARTC K S T O C KC K C K BUSACTIVITY:MASTER SLAVEn = 1ADDRESS BYTE ADDRESS BYTEDATA BYTE DATA BYTE DATA BYTE Figure 8. Page Write SequenceP ≤ 31Figure 9. WP TimingADDRESS BYTE DATA BYTESCLSDA WPREAD OPERATIONSImmediate ReadTo read data from memory, the Master creates a START condition on the bus and then broadcasts a Slave address with the R/W bit set to ‘1’. The Slave responds with ACK and starts shifting out data residing at the current address.After receiving the data, the Master responds with NoACK and terminates the session by creating a STOP condition on the bus (Figure 10). The Slave then returns to Standby mode.Selective ReadTo read data residing at a speci ﬁc address, the selected address must ﬁrst be loaded into the internal address register.This is done by starting a Byte Write sequence, whereby the Master creates a START condition, then broadcasts a Slave address with the R/W bit set to ‘0’ and then sends two address bytes to the Slave. Rather than completing the ByteWrite sequence by sending data, the Master then creates a START condition and broadcasts a Slave address with the R/W bit set to ‘1’. The Slave responds with ACK after every byte sent by the Master and then sends out data residing at the selected address. After receiving the data, the Master responds with NoACK and then terminates the session by creating a STOP condition on the bus (Figure 11).Sequential ReadIf, after receiving data sent by the Slave, the Master responds with ACK, then the Slave will continue transmitting until the Master responds with NoACK followed by STOP (Figure 12). During Sequential Read the internal byte address is automatically incremented up to the end of memory, where it then wraps around to the beginning of memory.Figure 10. Immediate Read Sequence and TimingSCL SDA 8th Bit STOPNO ACKDATA OUT89SLAVE ADDRESSSA C KDATA BYTEN OA C K S T O P PS T A R T BUS ACTIVITYMASTERSLAVEFigure 11. Selective Read SequenceSLAVE ADDRESS SA C KA C KA C K ST ARTSLAVE SA C KS T A R T PS T O P ADDRESS BYTE ADDRESS BYTE ADDRESSN O A C KBYTEBUS ACTIVITY:MASTER SLAVEFigure 12. Sequential Read SequenceS T O SLAVE C KA C A C N O A C A C BYTE n BYTE n+1BYTE n+2BYTE n+xBUS ACTIVITY:MASTERSLAVESOIC 8, 150 mils CASE 751BD −01ISSUE OIDENTIFICATIONTOP VIEWSIDE VIEWEND VIEWNotes:(1) All dimensions are in millimeters. Angles in degrees.(2) Complies with JEDEC MS-012.SYMBOLMIN NOMMAX θA A1b cD E E1e h 0º8º0.100.330.190.254.805.803.801.27 BSC1.750.250.510.250.505.006.204.00L0.40 1.271.35TSSOP8, 4.4x3CASE 948AL −01ISSUE OA1TOP VIEWSIDE VIEWEND VIEWNotes:(1) All dimensions are in millimeters. Angles in degrees.(2) Complies with JEDEC MO-153.SYMBOLθMINNOM MAXA A1A2bc D E E1e L10º8ºL 0.050.800.190.090.502.906.304.300.65 BSC 1.00 REF1.200.151.050.300.200.753.106.504.500.900.603.006.404.40Example of Ordering InformationCAV24C32WE −GT3 (Note 11)Prefix Device #Suffix 9.All packages are RoHS-compliant (Lead-free, Halogen-free).10.The standard lead finish is NiPdAu.11.The device used in the above example is a CAV24C32WE −GT3 (SOIC, Automotive Temperature, NiPdAu, Tape & Reel, 3,000/Reel).12.For other package options, please contact your nearest ON Semiconductor Sales office.13.For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.ON Semiconductor is licensed by Philips Corporation to carry the I 2C Bus Protocol.PUBLICATION ORDERING INFORMATION分销商库存信息:ONSEMICAV24C32WE-GT3CAV24C32YE-GT3。

M-AUDIO_410中文说明书

M-AUDIO FireWire410中文说明书1．FireWire410 简介FireWire410 是一个4 进10 出音频接口，它通过IEEE-1394 端口（俗称"火线"）与计算机进行连接。

如果你的计算机没有火线端口，只需向计算机经销商购买一块PCI 的火线卡，便能与FireWire410 连接。

笔记本电脑通常都自备火线端口。

FireWire410 包装内带一条高质量的六针到六针1394 数据线，建议你使用它或相同品质的火线与电脑连接。

如果电脑上只有四针火线接口，则需购买一条六针到四针的1394 数据线。

另外需指出，FireWire410 使用六针的端口自供电，若使用四针的火线口，需要为FireWire410 提供外部电源。

提示：火线口即是1394 口，在Sony 设备中又称iLink 口。

FireWire410 提供两个卡侬和大三芯的复合模拟输入口，可以连接话筒，也可接电吉它、电贝司等乐器；八个大三芯模拟输出口及一对S/PDIF 的同轴、光纤输入/输出。

FireWire410提供了高品质模拟、数字输入输出，支持24 比特的采样精度、96kHz 录音采样频率和192kHz 输出采样频率，S/PDIF 端口支持AC3 和DTS 双编码。

FileWire410 还提供了一进一出MIDI端口，并有开关选择MIDI 输出或是旁通，可作为独立MIDI 接口使用。

FireWire410 具有简捷实用的软件控制系统，提供了跳线和调音台控制功能，为音频软件虚拟了10 个输出通道。

你可任意分配输入端口到输出端，每个内部通道又支持具有超大控制幅度的辅助发送。

FireWire 还提供了零延迟硬件直接监听和基于ASIO 的超低延迟软监听；具有两个独立的耳机监听输出，信号来源可选择，并有独立增益控制；两个麦克风/乐器功放提供了电平控制和监测功能、48V 幻像电源、20dB 衰减和最大66dB 的增益。

CAT2300VP2-GT3;中文规格书,Datasheet资料

CAT2300Current Mirror and Switch Controller for SENSEFET )MOSFETsDescriptionCAT2300 is a controller for SENSEFET ® MOSFET current monitoring in high-side switch applications.CAT2300 provides current mirroring and ON/OFF control for SENSEFET MOSFETs. Exact control and matching of the Sense output of the SENSEFET with the Kelvin voltage insures accurate current monitoring over many decades of current.Designed for use with NTMFS4833NST1G, NTMFS4854NST1G or similar SENSEFET MOSFETs from ON Semiconductor, CA T2300is the single chip alternative to discrete circuits for monitoring and controlling 0.9 V − 1.5 V power busses. When teamed with a SENSEFET, CAT2300 will track currents up to 25 A and resolve currents below 100 mA.CAT2300 provides logic level ON/OFF control of the power MOSFET and its own internal circuitry, reducing power consumption to virtually zero milliwatts.Packaged in a space saving low profile 2 x 3 mm TDFN, CAT2300operates over the full industrial temperature range of −40°C to +85°C.Features •Precision Current Measurement of 0.9 V − 1.5 V Power Supply Rails •ON/OFF Power FET Control with Soft −start •Sense Current Mirroring to 70 mA (equal to 25 A flowing in the power bus)•User Adjustable Current to V oltage Conversion Ratio•150 m V Typical Matching between Kelvin and Sense Leads •Less than 1 m A Current Consumption in Shutdown Mode •This Device is Pb −Free, Halogen Free/BFR Free and RoHS CompliantTypical Applications•Portable Computers •Backplane Bus Control •Power DistributionFigure 1. System ApplicationSystem LoadSee detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet.ORDERING INFORMATIONPIN CONFIGURATIONTDFN −8VP2 SUFFIX CASE 511AKSense KS Kelvin Gate1GNDV DD EN I MEAS (Top View)MARKING DIAGRAMF3T = Specific Device Code L = Assembly Location Code AA = Assembly Lot Number (Last Two Digits)Y = Production Year (Last Digit)M = Production Month (1−9, O, N, D)G= Pb −Free MicrodotF3T LAA YM GDevice Package Shipping †ORDERING INFORMATIONCAT2300TDFN3,000 / Tape &ReelMarking F3T†For information on tape and reel specifications,including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.SenseKSKelvin Gate ENFigure 2. Simplified Block DiagramI MEASV DDTable 1. PIN FUNCTION DESCRIPTIONPin No.Pin Name Function1Sense Connects to Sense pin of SENSEFET and directs sensed current to IMEAS output.2KS Kelvin Sense; a Kelvin connection for the current mirror control amplifier. This connection must be made directly to Sense on the SENSEFET package. Do not share any trace length with CAT2300’s Sense lead.3Kelvin Connects to Kelvin pin of the SENSEFET. Serves as the reference point for Sense lead biasing.4Gate Connects to Gate of the SENSEFET and controls SENSEFET operation.5GND Electrical ground for IC.6V DD External voltage supply for driving the gate of the SENSEFET and power supply for CAT2300 internal circuitry via an internal voltage regulator.7EN Enable: High true logic input. Turns ON SENSEFET and CAT2300’s internal circuitry. A logic LOW on EN grounds Gate, shutting off the SENSEFET and shuts down the internal current source and mirroring circuitry.8I MEASSensed current output. A resistor between I MEAS and ground develops a voltage proportional to the current flowing through the SENSEFET.PADBackside paddle is internally connected to GND. This pad may be left floating but if connected with PCB it must be to the ground plane of circuitry which is also grounded.Table 2. ABSOLUTE MAXIMUM RATINGS (Note 1)ParameterSymbol Value Unit V DD V DD6.5V Gate±15mA V K , EN, Sense, KS, Kelvin, I MEAS 6.5V Junction Temperature150°CStresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.1.Guaranteed by design.Table 3. RECOMMENDED OPERATING CONDITIONSParameterSymbol Value Unit V K V K 0.9 to 1.5V V DDV DD 5V Maximum Junction Temperature T JUNCTION 125°C Ambient Temperature RangeT AMBIENT−40 to +85°CTable 4. PACKAGE THERMAL PERFORMANCEPackage Symbol Test Conditions Min Typ Max UnitTDFN−8q JA1 oz Copper Thickness, 100 mm2160°C/W q JC35SOIC−8q JA1 oz Copper Thickness, 100 mm2160°C/W q JC25Table 5. DC ELECTRICAL CHARACTERISTICS(V K = 0.9 – 1.5 V; V DD = +5 V; T AMBIENT =−40°C to +85°C, T JUNCTION =−40°C to +125°C, unless otherwise specified.)Parameter Symbol Test ConditionsLimitsUnits Min Typ MaxKelvin voltage V K0.9 1.5V Gate Drive input voltage V DD 4.5 5.5V Supply Current on V DD pin I VDD EN = logic 01m AEN = logic 16577100m A Gate drive Sourcing I GATE V GATE = V DD– 1 V−235−280−330m A Gate drive Sinking V GATE = 0.6 V79.613mA Offset Voltage V OS V OS = V KELVIN− V SENSEV K = 0.9 V to 1.5 V±150±300m VInput Bias Current;Kelvin and KS inputsI K100150nA Power Supply Rejection Ratio PSRR70db I MEAS output current I MEAS070mA Output voltage of I MEAS amplifier V O_IM0V K – 0.1V LOGICLow level input voltage V IL EN0.9 1.1 1.26V High level input voltage V IH EN 1.4 1.65 1.9V Hysteresis0.55V Low level input current I IL EN, V DD = 0 V or 5.5 V2m A High level input current I IH EN, V DD = 0 V or 5.5 V2m A Table 6. AC OPERATING CHARACTERISTICS(V K = 0.9 V – 1.5 V; V DD = 5 V; T AMBIENT =−40°C to +85°C, T JUNCTION =−40°C to +125°C, unless otherwise specified.)Parameter Symbol Test ConditionsLimitsUnits Min Typ MaxI MEAS output rise time t R 20 W, 100 pF, V K = 1.5 VI SENSE : 2 mA – 70 mA 38m sI MEAS output fall time t F33m s I MEAS Settling time t S EN = Logic 0³1, I SENSE = 1 mA30m sEN = Logic 0³1, I SENSE = 70 mA50m sTYPICAL PERFORMANCE CHARACTERISTICSFigure 3. Load Step: 1 A – 10 A50 m s / divI BusV MEASPIN DESCRIPTIONSenseSense connects directly to the SENSEFET’s Sense pin and directs the sensed current to the I MEAS output. Sense is controlled by an amplifier with a FET follower stage to maintain Sense at exactly the Kelvin voltage, thus insuring accuracy of the SENSEFET’s mirror current.KSKS = Kelvin Sense; a Kelvin connection for the mirroring amplifier. Current measurement accuracy is dependent upon the voltage match between the SENSEFET’s Sense and Kelvin leads. To minimize voltage losses in the PCB trace between CA T2300 and the SENSEFET, a Kelvin connection for the control amplifier is provided. KS must be a dedicated connection, shared by no other circuitry , and tied directly to the Sense pin on of the SENSEFET.Figure 4. Current SenseSENSEFETSENSEFETSENSEFETCareful layout is critical in achieving full SENSEFET perfomance. PCB trace resistance can no longer be ignored as it can be in typical low current circuit designs. Microvolt offsets (m V) produce meaningful errors in current ratio tracking. A few milliohms of trace resistance carrying a few milliamps of current produces microvolts of potential difference between CAT2300 and the SENSEFET. To circumvent this error CA T2300 provides a Kelvin lead (KS)for monitoring the SENSEFET’s Sense pin. Under no circumstances should the KS connection share any portion of the current path between the sense pins of CAT2300 and the SENSEFET. Doing so will degrade measurement accuracy.KelvinKelvin connects directly to the SENSEFET’s Kelvin pin and acts the reference voltage for CAT2300’s mirroring circuit. It too must be a dedicated connection, shared by no other circuitry.GateGate connects to the SENSEFET’s Gate pin and controls the SENSEFET’s operation. Gate is controlled by EN: a logic 1 turns the SENSEFET ON, a logic 0 turns it OFF.When ON, voltage is applied to the SENSEFET’s gate via a current source inside CAT2300.By controlling the gate drive current a controlled turn-ON is achieved. Faster turn-on times can be done by adding a supplemental current source to augment the internal current source. Placing a resistor between V DD and Gate will provide extra current and boost turn-on speeds.For a softer turn-on characteristic, add capacitance between the SENSEFET’s Gate and Source pins;approximately 1 nF for every ms of increased delay.When switching OFF the SENSEFET, Gate provides a strong pull-down, 7.5 mA typical, so the SENSEFET will be switched off quickly.V DDV DD provides gate drive for the SENSEFET and power for CAT2300’s internal circuitry and must be +5 V .I MEAS I MEAS is the mirror current output. Placing a resistor between I MEAS and ground produces a voltage proportional to I BUS . The maximum voltage producible at IMEAS is the Kelvin voltage (V K ) – 0.1 V . This sets a limitation on the maximum value of R MEAS .R MEAS +ǒV K *0.1V ǓI SENSE+CSRǒV K *0.1V ǓI buswhere:CSR = Current Sensing Ratio taken from the SENSEFET data sheet.I bus = Max current through the SENSEFET.ENEnable is a high true logic input controlling the SENSEFET’s ON/OFF state. A logic high on EN turns the switch ON; a logic low turns it OFF.Bus turn-ON time is controlled by the FET’s input gate capacitance and the drive current applied to the gate.To minimize power consumption EN disables the internal gate drive current source and current mirroring circuitry whenever the SENSEFET is OFF.ENFigure 5. Typical ApplicationV DDV MEASPACKAGE DIMENSIONSTDFN8, 2x3CASE 511AK −01ISSUE ATOP VIEW SIDE VIEW BOTTOM VIEWFRONT VIEWA1Notes:(1) All dimensions are in millimeters.(2) Complies with JEDEC MO-229.SYMBOLMIN NOM MAX A 0.700.750.80A10.000.020.05A30.20 REFb 0.200.250.30D 1.90 2.00 2.10D2 1.30 1.40 1.50E 3.00E2 1.201.30 1.40e 2.900.50 TYP3.10L0.200.300.40A20.450.550.65Example of Ordering Information (Notes 2 − 5)Prefix Device #Suffix ORDERING INFORMATIONPart Number Temperature Range Package Quantity per Reel (Note 6)Package MarkingCAT2300VP2−GT3−40°C to +85°CTDFN3,000F3T2.All packages are RoHS −compliant (Lead −free, Halogen −free).3.The standard lead finish is NiPdAu pre −plated (PPF).4.The device used in the above example is a CAT2300VP2−GT3 (TDFN, NiPdAu, Tape & Reel, 3,000).5.For additional package and temperature options, please contact your nearest ON Semiconductor Sales office.6.For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.SENSEFET is a registered trademark of Semiconductor Components Industries, LLCPUBLICATION ORDERING INFORMATION分销商库存信息: ONSEMICAT2300VP2-GT3。

pc104工控主板说明书

pc104工控主板说明书本文旨在对PC104工控主板进行全面的介绍和说明，以帮助用户更好地了解和使用该产品。

以下是对PC104工控主板的详细说明：一、产品概述PC104工控主板是一种紧凑型的嵌入式计算机主板，采用标准的PC104规格设计，适用于各类工业控制和嵌入式应用场景。

本产品具有高性能、低功耗、稳定可靠等特点，是工业自动化领域的理想选择。

二、产品特点1. 紧凑型设计：采用PC104规格，尺寸小巧，方便安装和布线。

2. 高性能处理器：搭载XXXX处理器，功耗低，性能强悍，可以满足复杂的计算需求。

3. 多种接口：提供丰富的标准接口，包括USB、RS232、以太网等，方便与外部设备连接。

4. 良好的扩展性：支持多种扩展模块，包括扩展IO、采集卡等，可以满足不同应用场景的需求。

5. 可靠稳定：采用高质量元件，经过严格测试和质量控制，确保产品的稳定性和可靠性。

三、产品规格1. 处理器：XXXX处理器，主频XXXGHz。

2. 内存：标配4GB DDR4内存，支持最大扩展至16GB。

3. 存储：标配128GB固态硬盘，支持SATA接口。

4. 显示接口：支持VGA和HDMI双显接口，最大分辨率XXXX。

5. 网络接口：支持千兆以太网接口，可实现高速网络通信。

6. 扩展接口：提供4个USB接口、2个RS232串口、1个RS485串口、1个MINI-PCIE接口等，满足各类外设连接需求。

7. 工作温度：-20℃～70℃，适应各种恶劣环境。

四、使用说明1. 安装前请先阅读本说明书，了解产品特点和规格。

2. 安装时请确保主板与其他设备断电，并按照说明书中的接线图进行正确连线。

3. 使用时请注意产品的工作温度范围，避免高温或低温环境对产品性能产生影响。

4. 如需扩展功能，请按照本规格书提供的接口进行连接。

5. 如有故障或使用问题，请联系我们的技术支持团队寻求帮助。

五、注意事项1. 本产品严禁拆解或改装，否则将会导致保修失效。

CAT4238TD-GT3;中文规格书,Datasheet资料

CAT4238High Efficiency 10 LED Boost ConverterDescriptionThe CAT4238 is a DC/DC step−up converter that delivers an accurate constant current ideal for driving LEDs. Operation at a fixed switching frequency of 1 MHz allows the device to be used with small value external ceramic capacitors and inductor. LEDs connected in series are driven with a regulated current set by the external resistor R1. LED currents up to 40 mA can be supported over a wide range of input supply voltages up to 5.5 V, making the device ideal for battery−powered applications. The CAT4238 high−voltage output stage is perfect for driving mid−size and large panel displays containing up to ten white LEDs in series.LED dimming can be done by using a DC voltage, a logic signal, or a pulse width modulation (PWM) signal. The shutdown input pin allows the device to be placed in power−down mode with “zero”quiescent current.In addition to thermal protection and overload current limiting, the device also enters a very low power operating mode during “Open LED” fault conditions. The device is housed in a low profile (1mm max height) 5−lead thin SOT23 package for space critical applications.Features•Drives High V oltage LED Strings (38 V)•Up to 87% Efficiency•Low Quiescent Ground Current 0.6 mA•Adjustable Output Current•1 MHz Fixed Frequency Low Noise Operation•Soft Start “In−rush” Current Limiting•Shutdown Current Less than 1 m A•Open LED Overvoltage Protection•Automatic Shutdown at 1.9 V (UVLO)•Thermal Overload Protection•Thin SOT23 5−lead (1 mm Max Height)•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS CompliantApplications•GPS Navigation Systems•Portable Media Players•Handheld Devices, Digital Cameras•Portable Game MachinesTSOT−23TD SUFFIXCASE 419AEPIN CONNECTIONSMUYMMARKING DIAGRAMDevice Package Shipping ORDERING INFORMATIONCAT4238TD−GT3TSOT−23(Pb−Free)Green*3,000/Tape & Reel MU = Specific Device CodeY = Production Year (Last Digit)M = Production Month (1−9, A, B, C)(Top View)VINSHDNSWGNDFB1* Lead Finish NiPdAuFigure 1. Typical Application CircuitL: Sumida CDC5D23B −470D: Central CMDSH05−4C2: Taiyo Yuden UMK212BJ224 (rated 50 V)Table 1. ABSOLUTE MAXIMUM RATINGSParametersRatings Units V IN , FB voltage −0.3 to +7V SHDN voltage −0.3 to +7V SW voltage (Note 1)up to 60V Storage Temperature Range −65 to +160_C Junction Temperature Range −40 to +150_C Lead Temperature300_CStresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.1.The SW pin voltage is rated up to 39 V for external continuous DC voltage.Table 2. RECOMMENDED OPERATING CONDITIONSParametersRange Units V INup to 5.5V SW pin voltage0 to 38V Ambient Temperature Range −40 to +85_CNOTE:Typical application circuit with external components is shown above.Table 3. DC ELECTRICAL CHARACTERISTICS(V IN = 3.6 V, ambient temperature of 25°C (over recommended operating conditions unless otherwise specified))Symbol Parameter Test Conditions Min Typ Max UnitsI Q Operating Current V FB= 0.2 VV FB= 0.4 V (not switching)0.60.11.50.6mAI SD Shutdown Current V SHDN = 0 V0.11m A V FB FB Pin Voltage10 LEDs with I LED = 20 mA285300315mV I FB FB pin input leakage1m AI LED Programmed LED Current R1 = 10 WR1 = 15 WR1 = 20 W 28.51914.2530201531.52115.75mAV IH V IL SHDN Logic HighSHDN Logic LowEnable Threshold LevelShutdown Threshold Level0.40.80.71.5VF SW Switching Frequency0.8 1.0 1.3MHzDC Maximum Duty Cycle VIN = 3 V92%I LIM Switch Current Limit350450600mAR SW Switch “On” Resistance I SW = 100 mA 1.0 2.0WI LEAK Switch Leakage Current Switch Off, V SW = 5 V15m AThermal Shutdown150°CThermal Hysteresis20°C V UVLO Undervoltage Lockout (UVLO) Threshold 1.9V V OV-SW Overvoltage Detection Threshold40V V OCL Output Voltage Clamp“Open LED” with VIN = 5 V434548VPin DescriptionVIN is the supply input for the internal logic. The device is compatible with supply voltages down to 2.8 V and up to 5.5V. It is recommended that a small bypass ceramic capacitor (4.7 m F) be placed between the VIN and GND pins near the device. If the supply voltage drops below 1.9 V, the device stops switching.SHDN is the shutdown logic input. When the pin is tied to a voltage lower than 0.4 V, the device is in shutdown mode, drawing nearly zero current. When the pin is connected to a voltage higher than 1.5 V, the device is enabled.GND is the ground reference pin. This pin should be connected directly to the ground place on the PCB.SW pin is connected to the drain of the internal CMOS power switch of the boost converter. The inductor and the Schottky diode anode should be connected to the SW pin. Traces going to the SW pin should be as short as possible with minimum loop area. An over-voltage detection circuit is connected to the SW pin. When the voltage reaches 40V, the device enters a low power operating mode preventing the SW voltage from exceeding the maximum rating.FB feedback pin is regulated at 0.3 V. A resistor connected between the FB pin and ground sets the LED current according to the formula:I LED+0.3VR1The lower LED cathode is connected to the FB pin.Table 4. PIN DESCRIPTIONSPin #Name Function 1SW Switch pin. This is the drain of the internal power switch.2GND Ground pin. Connect the pin to the ground plane.3FB Feedback pin. Connect to the last LED cathode.4SHDN Shutdown pin (Logic Low). Set high to enable the driver.5VIN Power Supply input.Block DiagramDevice OperationThe CAT4238 is a fixed frequency (1 MHz), low noise,inductive boost converter that provides a constant current with excellent line and load regulation. The device uses a high-voltage CMOS power switch between the SW pin and ground to energize the inductor. When the switch is turned off, the stored energy in the inductor is released into the load via the Schottky diode.The on/off duty cycle of the power switch is internally adjusted and controlled to maintain a constant regulated voltage of 0.3 V across the feedback resistor connected to the feedback pin (FB). The value of the resistor sets the LED current accordingly (0.3 V/R 1).During the initial power-up stage, the duty cycle of the internal power switch is limited to prevent excessive in-rush currents and thereby provide a “soft-start” mode of operation.While operating from a Li −Ion battery, the device can deliver 20mA of load current into a string of up to 10 white LEDs. For higher input voltages, the LED current can be increased.In the event of an “Open LED” fault condition, where the feedback control loop becomes open, the output voltage will continue to increase. Once this voltage exceeds 40 V , an internal protection circuit will become active and place the device into a very low power safe operating mode where only a small amount of power is transferred to the output.This is achieved by pulsing the switch once every 6 m s and keeping it on for about 1 m s.Thermal overload protection circuitry has been included to prevent the device from operating at unsafe junction temperatures above 150°C. In the event of a thermal overload condition the device will automatically shutdown and wait till the junction temperatures cools to 130°C before normal operation is resumed.Light Load OperationUnder light load condition (under 2 mA) and with input voltage above 5.0 V , the CAT4238 driving 10 LEDs, the driver starts pulse skipping. Although the LED current remains well regulated, some lower frequency ripple may appear.Figure 3. Switching Waveform V IN = 5.0 V,I LED = 1.5 mAFigure 4. Quiescent Current vs. V IN(Not Switching)Figure 5. Quiescent Current vs. V IN(Switching)INPUT VOLTAGE (V)INPUT VOLTAGE (V)50751001251505.04.54.03.53.000.51.01.52.0Figure 6. FB Pin Voltage vs. TemperatureFigure 7. FB Pin Voltage vs. Output CurrentTEMPERATURE (°C)OUTPUT CURRENT (mA)150100500−50297298299300301302303290295300305310Figure 8. Switching Frequency vs. SupplyVoltageFigure 9. Switching WaveformsINPUT VOLTAGE (V)500 ns/div5.04.55.54.03.53.00.80.91.01.11.2Q U I E S C E N T C U R R E N T (m A )Q U I E S C E N T C U R R E N T (m A )F B P I N V O L T AG E (m V )F B P I N V O L T AG E (m V )S W I T C H I N G F R E Q U E N C Y (M H z )SW 20V/divInductor Current 100mA/divVOUT AC coupled 500mV/div5.5Figure 10. LED Current vs. Input VoltageFigure 11. LED Current Regulation (10 mA)INPUT VOLTAGE (V)INPUT VOLTAGE (V)−1.0−0.50.51.0Figure 12. Efficiency vs. Load Current(10 LEDs)Figure 13. Efficiency vs. Input Voltage(10 LEDs)LED CURRENT (mA)INPUT VOLTAGE (V)6070809010060708090100Figure 14. Power −up with 10 LEDs at 20 mAFigure 15. Switch ON Resistance vs. InputVoltageINPUT VOLTAGE (V)5.55.04.54.03.53.000.51.01.52.0L E D C U R R E N T (m A )L E D C U R R E N T V A R I A T I O N (%)E F F I C I E N C Y (%)E F F I C I E N C Y (%)S W I T C H R E S I S T A N C E (W )Figure 16. Maximum Output Current vs. InputVoltageFigure 17. Shutdown Voltage vs. Input VoltageINPUT VOLTAGE (V)INPUT VOLTAGE (V)1020304050600.20.40.60.81.0O U T P U T C U R R E N T (m A )S H U T D O W N V O L T A G E (V )Application InformationExternal Component Selection CapacitorsThe CAT4238 only requires small ceramic capacitors of 4.7m F on the input and 0.22 m F on the output. Under normal condition, a 4.7 m F input capacitor is sufficient. For applications with higher output power, a larger input capacitor of 10 m F may be appropriate. X5R and X7R capacitor types are ideal due to their stability across temperature range.InductorA 47 m H inductor is recommended for most of the CAT4238 applications. In cases where the efficiency is critical, inductances with lower series resistance are preferred. Inductors with current rating of 300 mA or higher are recommended for most applications. Sumida CDC5D23B −470 47 m H inductor has a rated current of 490mA and a series resistance (D.C.R.) of 420 m W typical.Schottky DiodeThe current rating of the Schottky diode must exceed the peak current flowing through it. The Schottky diode performance is rated in terms of its forward voltage at agiven current. In order to achieve the best efficiency, this forward voltage should be as low as possible. The response time is also critical since the driver is operating at 1MHz.Central Semiconductor Schottky diode CMDSH05−4(500mA rated) is recommended for most applications.LED Current SettingThe LED current is set by the external resistor R 1connected between the feedback pin (FB) and ground. The formula below gives the relationship between the resistor and the current:R 1+0.3VLEDcurrent Table 5. RESISTOR R 1 AND LED CURRENTLED Current (mA)R 1 (W )56010301520201525123010Open LED ProtectionIn the event of an “Open LED” fault condition, the CAT4238 will continue to boost the output voltage with maximum power until the output voltage reaches approximately 40 V . Once the output exceeds this level, the internal circuitry immediately places the device into a very low power mode where the total input power is limited to about 6 mW (about 1.6 mA input current with a 3.6 V supply). The SW pin clamps at a voltage below its maximum rating of 60 V . There is no need to use an external zener diode between V out and the FB pin. A 50 V rated C 2 capacitor is required to prevent any overvoltage damage in the open LED condition.Figure 18. Open LED Protection without ZenerSchottky 100 V(Central CMSH1−100)V INV OUTFigure 19. Open LED Switching Waveforms withoutZener2 m s/divS W 10 V /d i vFigure 20. Open LED Supply Current vs. V IN withoutZenerINPUT VOLTAGE (V)5.04.54.03.53.002.01.04.05.0S U P P L Y C U R R E N T (m A )5.53.0Figure 21. Open LED Output Voltage vs. V IN withoutZenerINPUT VOLTAGE (V)5.04.54.03.53.035404550O U T P U T V O L T A G E (V )5.555Dimming ControlThere are several methods available to control the LED brightness.PWM Signal on the SHDN PinLED brightness dimming can be done by applying a PWM signal to the SHDN input. The LED current is repetitively turned on and off, so that the average current is proportional to the duty cycle. A 100% duty cycle, with SHDN always high, corresponds to the LEDs at nominal current. Figure 22shows a 1kHz signal with a 50% duty cycle applied to the SHDN pin. The recommended PWM frequency range is from 100Hz to 2kHz.Figure 22. Switching Waveform with 1 kHz PWM onSHDN Filtered PWM SignalA filtered PWM signal used as a variable DC voltage can control the LED current. Figure 23 shows the PWM control circuitry connected to the CAT4238 FB pin. The PWM signal has a voltage swing of 0 V to 2.5 V . The LED current can be dimmed within a range from 0 mA to 20 mA. The PWM signal frequency can vary from very low frequency up to 100 kHz.Figure 23. Circuit for Filtered PWM Signal0 V2.5 V PWM Signal WA PWM signal at 0 V DC, or a 0% duty cycle, results in a max LED current of about 22 mA. A PWM signal with a 93% duty cycle or more, results in an LED current of 0mA.Figure 24. Filtered PWM Dimming (0 V to 2.5 V)L E D C U R R E N T (m A )2520151050102030405060708090100PWM DUTY CYCLE (%)Board LayoutThe CAT4238 is a high−frequency switching regulator. The traces that carry the high−frequency switching current have to be carefully layout on the board in order to minimize EMI, ripple and noise in general. The thicker lines on Figure25 show the switching current path. All these traces have to be short and wide enough to minimize the parasitic inductance and resistance. The loop shown on Figure25 corresponds to the current path when the CA T4238 internal switch is closed. On Figure 26 is shown the current loop,when the CAT4238 switch is open. Both loop areas should be as small as possible.Capacitor C1 has to be placed as close as possible to the V IN pin and GND. The capacitor C2 has to be connected separately to the top LED anode. A ground plane under the CAT4238 allows for direct connection of the capacitors to ground. The resistor R1 must be connected directly to the GND pin of the CA T4238 and not shared with the switchingcurrent loops and any other components. Figure 25. Closed−switch Current Loop Figure 26. Open−switch Current LoopFigure 27. Recommended PCB Layout分销商库存信息: ONSEMICAT4238TD-GT3。

毛家V2403系列无风扇x86工业级物联网嵌入式计算机产品介绍说明书

V2403SeriesFanless,rugged,ready-to-go x86Industrial IoT embeddedcomputersFeatures and Benefits•Intel Core-i Series processor with three performance options•-40to70°C(system and LTE)operating temperature•Dual CFast sockets for storing OS and OS backup•Triple mini-PCIe sockets for storage and wireless modules that supportmSATA,Wi-Fi,3G,LTE,GPS,and Bluetooth•Variety of interfaces:4serial ports,2Ethernet LAN ports,4DIs,4DOs,USB,HDMI,wireless•EN61000-6-2and EN61000-6-4certification;meets EMC standard for heavyindustry•Up to5Grms anti-vibration and100g/11ms anti-shock protection•Ready-to-run Debian8,Windows Embedded Standard7,and Windows10Embedded IoT Enterprise2016LTSB platforms•Moxa Proactive Monitoring utility for system hardware health monitoring•Moxa Smart Recovery utility to recover system from boot failure(W7E only)CertificationsIntroductionThe V2403Series fanless x86embedded computer is based on the Intel®3rd gen Core-i™Series processor,features the most reliable I/O design to maximize connectivity,and supports dual wireless modules,making it suitable for a diverse range of communication applications.The computer’s thermal design ensures reliable system operation in temperatures ranging from-40to70°C(with a special purpose Moxa wireless module installed).The V2403Series supports“Moxa Proactive Monitoring”for device I/O status monitoring and alerts,system temperature monitoring and alerts,and system power management.Monitoring system status closely makes it easier to recover from errors and provides the most reliable platform for your applications.Applications•Remote Terminal Unit(RTU)•Data acquisition•M2M communication(smart gateway)•Digital signage•Factory automation •In-vehicle monitor/data logger(transportation)•Programmable router•Energy usage optimization•Predictive maintenance•Asset managementAppearanceFront View Rear ViewSpecificationsComputerCPU V2403-C2Series:Intel®Celeron®Processor1047UE(2M cache,1.40GHz)V2403-C7Series:Intel®Core™i7-3517UE Processor(4M cache,up to2.80GHz) System Chipset Mobile Intel®HM65Express ChipsetGraphics Controller Intel®HD GraphicsSystem Memory Pre-installed Default4GB DDR3System Memory Slot SODIMM DDR3/DDR3L slot x1Supported OS Linux Debian8(Linux kernel v4.1)Windows Embedded Standard7(WS7E)32-bitWindows Embedded Standard7(WS7E)64-bitStorage Slot 2.5-inch HDD/SSD slots x1CFast slot x2mSATA slots x1Computer InterfaceEthernet Ports Auto-sensing10/100/1000Mbps ports(RJ45connector)x2Serial Ports RS-232/422/485ports x4,software selectable(DB9male)USB2.0USB2.0hosts x4,type-A connectorsAudio Input/Output Line in x1,Line out x1,3.5mm phone jackDigital Input DIs x4Digital Output DOs x4Expansion Slots mPCIe slot x2Video Output DVI-I x1,29-pin DVI-I connectors(female)HDMI x1,HDMI connector(type A)Wi-Fi Antenna Connector RP-SMA x2Cellular Antenna Connector SMA x2Number of SIMs2SIM Format MiniGPS Antenna Connector SMA x1Digital InputsIsolation3k VDCConnector Screw-fastened Euroblock terminalDry Contact On:short to GNDOff:openI/O Mode DISensor Type Dry contactWet Contact(NPN or PNP)Wet Contact(DI to COM)On:10to30VDCOff:0to3VDCDigital OutputsConnector Screw-fastened Euroblock terminalCurrent Rating200mA per channelI/O Type SinkVoltage24to40VDCLED IndicatorsSystem Power x1Storage x1LAN2per port(10/100/1000Mbps)Serial2per port(Tx,Rx)Serial InterfaceBaudrate50bps to921.6kbpsFlow Control RTS/CTS,XON/XOFF,ADDC®(automatic data direction control)for RS-485,RTSToggle(RS-232only)Isolation N/AParity None,Even,Odd,Space,MarkData Bits5,6,7,8Stop Bits1,1.5,2Serial SignalsRS-232TxD,RxD,RTS,CTS,DTR,DSR,DCD,GNDRS-422Tx+,Tx-,Rx+,Rx-,GNDRS-485-2w Data+,Data-,GNDRS-485-4w Tx+,Tx-,Rx+,Rx-,GNDPower ParametersInput Voltage9to36VDCPower Connector Terminal block(for DC models)Power Consumption(Max.) 3.51A@9VDC1.39A@24VDC0.93A@36VDCPower Consumption34W(max.)Physical CharacteristicsHousing AluminumIP Rating IP30Dimensions(with ears)275x63x154mm(10.83x2.47x6.06in) Dimensions(without ears)250x57x154mm(9.84x2.23x6.06in)Weight2,168g(4.82lb)Installation DIN-rail mounting(optional),Wall mounting(standard) Environmental LimitsOperating Temperature-40to70°C(-40to158°F)Storage Temperature(package included)-40to85°C(-40to185°F)Ambient Relative Humidity5to95%(non-condensing)Standards and CertificationsEMC EN55032/24,EN61000-6-2/-6-4EMI CISPR32,FCC Part15B Class AEMS IEC61000-4-2ESD:Contact:4kV;Air:8kVIEC61000-4-3RS:80MHz to1GHz:10V/mIEC61000-4-4EFT:Power:2kV;Signal:1kVIEC61000-4-5Surge:Power:2kV;Signal:1kVIEC61000-4-6CS:1VIEC61000-4-8PFMFSafety EN60950-1,UL508,UL60950-1Shock IEC60068-2-27Vibration IEC60068-2-64DeclarationGreen Product RoHS,CRoHS,WEEEMTBFTime329,398hrsStandards Telcordia(Bellcore),GBWarrantyWarranty Period3yearsDetails See /warrantyPackage ContentsDevice1x V2403Series computerInstallation Kit1x wall-mounting kitCable1x terminal block to power jack converter Documentation1x document and software CD1x quick installation guide1x warranty cardDimensionsOrdering InformationModel Name CPU Memory(Default)OS CFast(CTO)Backup CFast(CTO)SSD/HDD Tray(CTO)USIM SlotAntennaConnectorsOperatingTemp.V2403-C2-T Celeron1047UE4GB1(Optional)1(Optional)1(Optional)––-40to70°CV2403-C2-W-T Celeron1047UE4GB1(Optional)1(Optional)1(Optional)––-40to70°CV2403-C3-T i3-3217UE4GB1(Optional)1(Optional)1(Optional)––-40to70°C V2403-C3-W-T i3-3217UE4GB1(Optional)1(Optional)1(Optional)25-40to70°C V2403-C7-T i7-3517UE4GB1(Optional)1(Optional)1(Optional)25-40to70°C V2403-C7-W-T i7-3517UE4GB1(Optional)1(Optional)1(Optional)25-40to70°CV2403-C2-T-LX Celeron1047UE4GB8GB1(Optional)1(Optional)––-40to70°CV2403-C2-T-W7E Celeron1047UE4GB8GB1(Optional)1(Optional)––-40to70°CV2403-C2-T-W7E1Celeron1047UE8GB32GB1(Optional)64GB MLC––-40to70°CAccessories(sold separately)Battery KitsRTC Battery Kit Lithium battery with built-in connectorPower AdaptersPWR-24270-DT-S1Power adapter,input voltage90to264VAC,output voltage24V with2.5A DC loadPower CordsPWC-C7AU-2B-183Power cord with Australian(AU)plug,2.5A/250V,1.83mPWC-C7CN-2B-183Power cord with two-prong China(CN)plug,1.83mPWC-C7EU-2B-183Power cord with Continental Europe(EU)plug,2.5A/250V,1.83mPWC-C7UK-2B-183Power cord with United Kingdom(UK)plug,2.5A/250V,1.83mPWC-C7US-2B-183Power cord with United States(US)plug,10A/125V,1.83mDIN-Rail Mounting KitsDK-DC50131-01DIN-rail mounting kit,6screwsWall-Mounting KitsV2400Isolated Wall Mount Kit Wall-mounting kit with isolation protection,2wall-mounting brackets,4screwsStorage KitsFK-75125-02Storage bracket,4large silver screws,4soft washers,4small sliver bronze screws,1SATA powercable,4golden spacers(only for the V2406and V2426)AntennasANT-GPS-OSM-05-3M BK Active GPS antenna,26dBi,1572MHz,L1band antenna for GPSANT-LTEUS-ASM-01GSM/GPRS/EDGE/UMTS/HSPA/LTE,omni-directional rubber duck antenna,1dBiANT-WDB-ARM-02 2.4/5GHz,omni-directional rubber duck antenna,2dBi,RP-SMA(male)ANT-WCDMA-ASM-1.5GSM/GPRS/EDGE/UMTS/HSPA,omni-directional rubber duck antenna,1.5dBiANT-LTE-ASM-02GPRS/EDGE/UMTS/HSPA/LTE,omni-directional rubber duck antenna,2dBiWi-Fi Wireless ModulesV2403Wi-Fi mini Card SparkLAN WPEA-252NI Wi-Fi mini card,4black screws©Moxa Inc.All rights reserved.Updated Jun12,2019.This document and any portion thereof may not be reproduced or used in any manner whatsoever without the express written permission of Moxa Inc.Product specifications subject to change without notice.Visit our website for the most up-to-date product information.。

PT4104A;PT4106A;PT4105C;PT4105A;PT4104C;中文规格书,Datasheet资料

For technical support and more information, see inside back cover or visit /powertrends15 Watt Isolated DC-DC ConverterSLTS020A(Revised 1/15/2001)•Input Voltage Range:18V to 40V •1500 VDC Isolation •Low Profile •Current Limit•Short-Circuit Protection •Over-T emperature Shutdown •UL1950 recognized •CSA 22.2 950 certified •Meets EN60950The PT4100—24V series of dc/dc converters provide 18 Watts/in 3 of isolated power in a single low-profile module. De-signed to operate from a standard 24V telecom bus, these modules employ switching frequencies of up to 850kHz,planar magnetics, and surface-mount con-struction. They are designed for T elecom,Industrial, Computer, Medical, and other distributed power applications that require input-to-output isolation.For technical support and more information, see inside back cover or visit /powertrendsTypical Characteristics15 Watt Isolated DC-DC ConverterPACKAGAddendum-Page 1PACKAGING INFORMATIONOrderable DeviceStatus(1)Package Type PackageDrawing Pins Package QtyEco Plan(2)Lead/Ball Finish MSL PeaPT4104A NRND DIP MODULE EGD 616Pb-Free (RoHS)Call TI N / A for PkgPT4106ANRNDDIP MODULEEGD616Pb-Free (RoHS)Call TIN / A for Pkg(1)The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.(2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.t information and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable fo Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retard in homogeneous material)(3)MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate inf continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical an TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for releasIn no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Cu/IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,modifications,enhancements,improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by government requirements,testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design.Customers are responsible for their products and applications using TI components.To minimize the risks associated with customer products and applications,customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any TI patent right,copyright,mask work right, or other TI intellectual property right relating to any combination,machine,or process in which TI products or services are rmation published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI.Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.Reproduction of this information with alteration is an unfair and deceptive business practice.TI is not responsible or liable for such altered rmation of third parties may be subject to additional restrictions.Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice.TI is not responsible or liable for any such statements.TI products are not authorized for use in safety-critical applications(such as life support)where a failure of the TI product would reasonably be expected to cause severe personal injury or death,unless officers of the parties have executed an agreement specifically governing such use.Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications,and acknowledge and agree that they are solely responsible for all legal,regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications,notwithstanding any applications-related information or support that may be provided by TI.Further,Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications.TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or"enhanced plastic."Only products designated by TI as military-grade meet military specifications.Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk,and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS16949requirements.Buyers acknowledge and agree that,if they use any non-designated products in automotive applications,TI will not be responsible for any failure to meet such requirements.Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAudio /audio Communications and Telecom /communicationsAmplifiers Computers and Peripherals /computersData Converters Consumer Electronics /consumer-appsDLP®Products Energy and Lighting /energyDSP Industrial /industrialClocks and Timers /clocks Medical /medicalInterface Security /securityLogic Space,Avionics and Defense /space-avionics-defense Power Mgmt Transportation and Automotive /automotiveMicrocontrollers Video and Imaging /videoRFID OMAP Mobile Processors /omapWireless Connctivity /wirelessconnectivityTI E2E Community Home Page Mailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2011,Texas Instruments Incorporated分销商库存信息:TIPT4104A PT4106A PT4105C PT4105A PT4104C PT4104CT。

DPtech FW1000系列应用防火墙安装手册v2.01

iv
DPtech FW1000 系列应用防火墙安装手册
2.2.4 抗干扰要求............................................................................................................................... 3 2.2.5 防雷击要求............................................................................................................................... 3 2.2.6 接地要求................................................................................................................................... 3 2.2.7 布线要求................................................................................................................................... 3 2.3 安装工具......................................................................................................................................4
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Google Cloud VPN 配置指南说明书

under Networking, select the VPC Network page.
2. On the VPC network page, click on Create VPC Network. 3. Fill in a Name and, optionally, a Description.
ISAKMP peer. 14. Copy this and save it somewhere secure 15. Under Routing options, choose Policy-based. 16. Under Remote network IP ranges, enter the internal IP address range of your router. 17. Under Local IP ranges, enter the local-address-selector that you created earlier.
5. Click on Create to create the VPC network.
6. Once the VPC network has been created, you will be returned to the Home Page. On the Home Page, from the menu on the left under Networking, select Hybrid Connectivity, then VPN.
C613-02084-00 REV A
Introduction | Page 3
Google Cloud VPN
Static routing
To configure static routing to a Google Cloud VPN, use the following steps: 1. Log in to your Google Cloud Account. Navigate to the Home Page. From the menu on the left,

APM32F407 417xExG 用户手册说明书

用户手册APM32F407/417xExG基于Arm® Cortex®-M4 内核的32位微控制器版本：V 1.0目录简介及文档描述规则 (9)简介 (9)文档描述规则 (9)系统架构 (12)术语全称、缩写描述 (12)系统架构框图 (12)存储器映射 (14)启动配置 (14)FLASH存储器 (16)术语全称、缩写描述 (16)简介 (16)主要特征 (16)FLASH存储器结构 (17)FLASH存储器功能说明 (17)寄存器地址映射 (22)寄存器功能描述 (23)外部存储器控制器（EMMC） (27)术语全称、缩写描述 (27)EMMC概述 (27)SMC简介 (27)SMC结构框图 (28)SMC功能描述 (28)SMC寄存器地址映射 (33)SMC寄存器功能描述 (33)DMC简介 (42)DMC主要特征 (42)DMC结构框图 (42)DMC功能描述 (42)DMC寄存器地址映射 (44)DMC寄存器功能描述 (45)系统配置控制器（SYSCFG） (50)主要特征 (50)I/O补偿单元 (50)寄存器地址映射 (50)寄存器功能描述 (50)复位与时钟（RCM） (54)术语全称、缩写描述 (54)复位管理单元（RMU） (54)时钟管理单元（CMU） (56)寄存器地址映射 (63)寄存器功能描述 (64)电源管理单元（PMU） (92)术语全称、缩写描述 (92)简介 (92)结构框图 (93)功能描述 (93)寄存器地址映射 (98)寄存器功能描述 (98)嵌套向量中断控制器（NVIC） (101)术语全称、缩写描述 (101)简介 (101)主要特征 (101)中断和异常向量表 (101)外部中断/事件控制器（EINT） (108)简介 (108)功能描述 (108)寄存器地址映射 (110)寄存器功能描述 (111)直接存储访问（DMA） (113)简介 (113)主要特征 (113)功能描述 (113)DMA寄存器地址映射 (118)寄存器功能描述 (118)调试MCU（DBGMCU） (126)术语全称、缩写描述 (126)简介 (126)主要特征 (126)功能描述 (127)寄存器地址映射 (128)寄存器功能描述 (128)通用输入/输出引脚（GPIO） (133)术语全称、缩写描述 (133)主要特征 (133)结构框图 (134)功能描述 (134)寄存器地址映射 (137)寄存器功能描述 (137)定时器概述 (142)术语全称、缩写描述 (142)定时器类别及主要差异 (142)高级定时器（TMR1/8） (145)简介 (145)主要特征 (145)结构框图 (146)功能描述 (146)寄存器地址映射 (161)寄存器功能描述 (162)通用定时器（TMR2/3/4/5） (180)简介 (180)主要特征 (180)结构框图 (181)功能描述 (181)寄存器地址映射 (193)寄存器功能描述 (194)通用定时器（TMR9/10/11/12/13/14） (210)简介 (210)TMR10/11/13/14主要特征 (210)TMR9/12结构框图 (211)TMR10/11/13/14结构框图 (212)功能描述 (212)TMR9/12寄存器地址映射 (219)TMR9/12寄存器功能描述 (219)TMR10/11/13/14寄存器地址映射 (228)TMR10/11/13/14寄存器功能描述 (229)基本定时器（TMR6/7） (236)简介 (236)主要特征 (236)结构框图 (236)功能描述 (236)寄存器地址映射 (238)寄存器功能描述 (238)看门狗定时器（WDT） (242)简介 (242)独立看门狗定时器（IWDT） (242)窗口看门狗定时器（WWDT） (243)IWDT寄存器地址映射 (245)IWDT寄存器功能描述 (245)WWDT寄存器地址映射 (247)WWDT寄存器功能描述 (247)实时时钟（RTC） (249)术语全称、缩写描述 (249)简介 (249)主要特征 (249)结构框图 (249)功能描述 (250)寄存器地址映射 (255)寄存器功能描述 (255)HASH处理器（HASH） (271)主要特征 (271)功能描述 (271)寄存器地址映射 (272)寄存器功能描述 (272)数字摄像接口（DCI） (276)术语全称、缩写描述 (276)简介 (276)主要特征 (276)结构框图 (277)功能描述 (277)寄存器地址映射 (281)寄存器功能描述 (281)通用同步异步收发器（USART） (287)术语全称、缩写描述 (287)简介 (287)主要特征 (287)功能描述 (288)寄存器地址映射 (300)寄存器功能描述 (301)内部集成电路接口（I2C） (308)术语全称、缩写描述 (308)简介 (308)主要特征 (308)结构框图 (310)功能描述 (310)寄存器地址映射 (316)寄存器功能描述 (316)串行外设接口/片上音频接口（SPI/I2S） (325)术语全称、缩写描述 (325)简介 (325)主要特征 (325)SPI功能描述 (326)寄存器地址映射 (347)寄存器功能描述 (347)控制器局域网（CAN） (354)术语全称、缩写描述 (354)简介 (354)主要特性 (354)功能描述 (354)寄存器地址映射 (362)寄存器功能描述 (363)安全数字输入输出接口（SDIO） (380)术语全称、缩写描述 (380)简介 (380)主要特征 (380)功能描述 (380)寄存器地址映射 (399)寄存器功能描述 (400)USB_OTG (411)简介 (411)OTG_FS全局寄存器地址映射 (411)OTG_FS全局寄存器功能描述 (412)OTG_FS主机模式寄存器地址映射 (425)OTG_FS主机模式寄存器功能描述 (426)OTG_FS设备模式寄存器地址映射 (432)OTG_FS设备模式寄存器功能描述 (433)全速OTG电源和时钟门控控制寄存器（OTG_FS_PCGCTRL） (446)OTG_HS1全局寄存器地址映射 (446)OTG_HS1全局寄存器功能描述 (447)OTG_HS1主机模式寄存器地址映射 (463)OTG_HS1主机模式寄存器功能描述 (464)OTG_HS1设备模式寄存器地址映射 (471)OTG_HS1设备模式寄存器功能描述 (472)高速OTG电源和时钟门控控制寄存器（OTG_HS1_PCGCTRL） (488)OTG_HS2寄存器功能描述 (489)以太网（ETHERNET） (492)简介 (492)以太网主要特征 (492)功能描述 (494)MAC寄存器地址映射 (518)MAC寄存器功能描述 (518)MMC寄存器地址映射 (531)MMC寄存器功能描述 (532)PTP寄存器地址映射 (535)PTP寄存器功能描述 (535)DMA寄存器地址映射 (539)DMA寄存器功能描述 (540)模数转换器（ADC） (550)术语全称、缩写描述 (550)简介 (551)主要特征 (551)功能描述 (552)寄存器地址映射 (561)寄存器功能描述 (562)数模转换器（DAC） (572)术语全称、缩写描述 (572)简介 (572)结构框图 (572)功能描述 (572)寄存器地址映射 (575)寄存器功能描述 (576)随机数（RNG） (582)简介 (582)主要特征 (582)功能描述 (582)寄存器地址映射 (583)CRYP (585)简介 (585)主要特性 (585)中断 (585)DMA (585)寄存器地址映射 (586)寄存器功能描述 (586)循环冗余校验计算单元（CRC） (591)简介 (591)功能描述 (591)寄存器地址映射 (591)寄存器功能描述 (591)芯片电子签名 (593)简介 (593)寄存器功能描述 (593)版本历史 (594)简介及文档描述规则简介本用户手册向应用程序开发人员提供关于如何使用MCU（微控制器）系统架构、存储器和外设所涉及的全部信息。

模型410技术规格表说明书

T ECHNICAL S PECIFICATIONPECIFICATION :Model 410 220 40 20 10 OutputPower ( @ 100V) 4x 120Wrms 2x 240Wrms 1x 480Wrms 1x 240Wrms 1x 120Wrms THD (@ 1kHz – rated power ) <1% <1% <1% <1% <1% Frequency response @rated power (0,-3dB) 35Hz-18kHz 35Hz-18kHz 35Hz-18kHz 35Hz-18kHz 35Hz-18kHz Frequency response @rated power (0,-10dB) 20Hz-20kHz 20Hz-20kHz 20Hz-20kHz 20Hz-20kHz 20Hz-20kHz Channel separation (at 1kHz) >80dB >80dB >80dB >80dB >80dB Signal to Noise ratio >86dB >86dB >86dB >86dB >86dBInput sensitivity 1V (@ 10kΩ) 1V (@ 10kΩ) 1V (@ 10kΩ) 1V (@ 10kΩ) 1V (@ 10kΩ) Gain range ( input trimmer ) >28dB >28dB >28dB >28dB >28dB AC power supply 230VAC 50Hz 230VAC 50Hz 230VAC 50Hz 230VAC 50Hz 230VAC 50Hz AC power consumption @rated power 1280W 1280W 1280W 640W 320W AC fuse 4x 2.5A slow 2x 5A slow 1x 8A slow 1x 4A slow 1x 2A slow DC power supply 24VDC 24VDC 24VDC 24VDC 24VDC DC power consumption @rated power 30A 30A 30A 15A 7,5ADC idle current 0.6A 0.38A 0.27A 0.23A 0.16A Dimensions (WxHxD) 425x132x425 425x88x420 425x132x355 425x132x305 425x132x305 Weight 22kg 18kg 16kg 10,5kg 8,5kgManual SINUS 410 220 40 20 10 Amplifier V1.1 120725 -E-.doc SINUS 410 Amplifier SINUS 220 Amplifier SINUS 40 Amplifier SINUS 20 Amplifier SINUS 10 AmplifierProfessional 100V amplifiers 230VAC & 24VDCfor Voice Alarm andPublic address systemF RONTVIEW &I NDICATORS SINUS S ERIEERIES S100V–A MPLIFIERMPLIFIERS SSINUS 410 amplifier :SINUS 220 amplifier :SINUS 40 amplifier :SINUS 10 / 20 amplifier :Indicators per channel :•Power LED - illuminates when 230VAC/24VDC is connected•Signal LED - illuminates when input signal is present•Overload LED - illuminates when output signal is clippingR EARVIEW & CONNECTORS SINUS–S ERIES 100V-A MPLIFIERMPLIFIERS SSINUS 410 amplifier:SINUS 220 amplifier:SINUS 40/20/10 amplifier:On each model:1. AC mains connection2. Fuse (per channel)3. Power Switch (Only 230V AC)Per channel:4. MAINS ERROR (Normally open, close contact on main power or fuse failure)5. 24VDC connection (Always connect all the available 24V clamps of the amplifier)6. Loudspeaker ‘COM’ terminal7. Loudspeaker 8Ω / 70V / 100V terminal8. Audio output (pass through) - Balanced XLR(M) and unbalanced RCA jack9. Gain control10. Audio input - Balanced XLR(F) and unbalanced RCA jack1 2 3 4 5 6 7 8 9 101 2 3 4 5 6 7 8 9 101 2 3 4 5 6 7 8 9 10。

三格电子Canet-410网关说明书V5

CAN转以太网说明书型号：SG-Canet-410一、功能概述1.1快速了解本产品是用来把CAN数据转为以太网数据的网关，以下称Canet-410。

Canet-410拥有四路CAN口和一路以太网口，四路CAN口分为两组，一组为低速CAN口（1，2通道）波特率支持为5K-500K，一组为高速CAN口（3，4通道）波特率支持为10K-1000K。

网口是10M/100M自适应网口，支持交叉和直连网线。

MB 130********CAN口通信支持CAN2.0A和CAN2.0B。

网口通信支持TCP和UDP。

Canet-410需要使用软件配置。

配置软件可以在本公司官网下载。

Canet-410需要9-24V供电电源。

1.2使用场景Canet-410用来把CAN数据按一定格式（格式见附录）转发为TCP或UDP 数据，把TCP或UDP数据按一定格式转为CAN帧。

场景1：用户需要在电脑端远程控制CAN接口的设备用户可以根据数据格式开发软件和Canet-410进行网络通信，用来在电脑端控制CAN设备。

场景2：多个CAN设备（接的Canet-410称从设备）需要和一个CAN设备（接的Canet-410称主设备）进行通信，此时可以通过三种方式实现：第一种方式：主设备做TCP Server，需要设置本地端口号。

多个设备做TCP Client，设置目标IP为主设备IP，目标端口为主设备的本地端口。

第二种方式：从设备做TCP Server，需要设置本地端口号。

主设备做TCP Client，设置多个目标IP和目标端口，目标IP和端口为从设备的IP和本地端口。

第三种方式：主设备和从设备都设为UDP模式。

主设备需要设置本地端口，设置多个目标IP和端口为从设备的IP和本地端口。

从设备需要设置本地端口并设置一个目标IP和端口为主设备的IP和本地端口。

以上三种方式主设备CAN口收到的数据会通过网口按格式转发给所有从设备，从设备CAN口收到的数据会转发给主设备。

DCM-4104抄表集中器用户手册-DCM－4104抄表集中器产品简介

DCM－4104抄表集中器产品简介
DCM－4104抄表集中器是远程抄表系统的核心部件之一，具有数据采集、存储、处理和转发等功能。

产品图片
1、独特的硬件结构：
整机无风扇
网络与串口全部板载
交直流输入电源
双硬件看门狗，自恢复和切换更稳定
按照继电保护标准设计制造，电磁兼容性满足电力4级
2、创新的系统软件结构
专用的操作系统，有效阻止未经授权的应用
单进程多线程，有效防止雪崩和管理硬件看门狗
软件的冗余模块可有效的实现实时数据库同步以及双通道通讯环等功能
软件看门狗可以有效的管理因为性能下降导致响应变慢等引起的一系列问题
3、先进的故障处理能力
专用的操作系统，有效阻止未经授权的应用
单进程多线程，有效防止雪崩和管理硬件看门狗
软件的冗余模块可有效的实现实时数据库同步以及双通道通讯环等功能
软件看门狗可以有效的管理因为性能下降导致响应变慢等引起的一系列问题
4、坚实的系统保护功能
支持软件看门狗，自动监测系统CPU负载，可用物理内存等重要参数，可根据预先设定的限值，产生告警，并可自动复位系统
支持硬件看门狗，独特的单进程多线程技术确保了硬件看门狗的有效性。

CAT4104AEVB CAT4104 LED Driver Evaluation Board Us

© Semiconductor Components Industries, LLC, 20111Publication Order Number:CAT4104AEVBCAT4104 LED DriverEvaluation Board User's ManualIntroductionThis document describes the CAT4104AEVB evaluation board for the ON Semiconductor CAT4104 quad channel constant current LED driver. The functionality and major parameters of the CAT4104 can be evaluated with the CAT4104AEVB board.The CA T4104 is a LED driver with four matched current sinks capable of driving up to 175mA per channel. All current sinks are programmed by a single resistor from the RSET pin to GND. Enable and dimming control is available via the EN/PWM pin. Additional details and electrical characteristics can be found in the CAT4104 data sheet.Board HardwareThe evaluation board contains one CAT4104 in a typical application circuit. Four test points labeled T4 through T7are available to connect the cathode side of an LED string to the CAT4104.The VIN test point (T1) is connected to the VIN supply of the CAT4104. The voltage between test points VIN and GND (T2) should not exceed 6.0V .The EN/PWM test point is the enable and PWM input for the CAT4104. The control signal should be connected between test points EN/PWM and GND.Trimmer potentiometer R2 can be adjusted to change the LED current. The RSET pin of the CA T4104 is a fixed 1.2V reference and the LED current is set by changing the current through the RSET resistor (R1+R2). The CAT4104 has a typical dropout voltage of 400mV for 175mA LED current.Figure 1. CAT4104AEVB Board (SOIC Package) and CAT4104VP2 Board (TDFN Package)EVAL BOARD USER’S MANUALCAT4104AEVBFigure 2. CAT4104AEVB Board SchematicT4R210 k WT5T6T7LED1LED2LED3LED4T1T2T3VIN GNDEN/PWM VINEN/PWMTable 1. CAT4104AEVB BOARD LIST OF COMPONENTSName Manufacturer DescriptionPart NumberUnits U1ON SemiconductorQuad Channel LED Driver in SOIC −8 or TDFN −8 package CAT4104V or CAT4104VP21C1Taiyo Yuden Ceramic Capacitor 1 m F/10 V, 10%, X7R, Size 0805LMK212B7105KD −T 1R1Yageo SMT Resistor 1/8 W, 750 W , Size 0805RC0805FR −07560RL 1R2VishayTrimmer Potentiometer, 10 k WT63YB103K1ADDITIONAL INFORMATIONTECHNICAL PUBLICATIONS :Technical Library: /design/resources/technical−documentation onsemi Website: ONLINE SUPPORT : /supportFor additional information, please contact your local Sales Representative at /support/sales。

PC104采集卡光隔离数字量输入输出卡数字量采集卡

PCH2531 光隔离 DI/DO 卡硬件使用说明书阿尔泰科技发展有限公司产品研发部修订阿尔泰科技发展有限公司目录目录 (1)第一章功能概述 (2)第一节、产品应用 (2)第二节、DI 数字量输入功能 (2)第三节、DO 数字量输出功能 (2)第四节、中断功能 (2)第五节、板卡尺寸 (2)第六节、产品安装核对表 (2)第七节、安装指导 (3)一、软件安装指导 (3)二、硬件安装指导 (3)第二章元件布局图及简要说明 (4)第一节、主要元件布局图 (4)第二节、主要元件功能说明 (4)一、信号输入输出连接器 (4)二、板卡层数和物理ID 号选择 (4)第三章信号输入输出连接器 (7)第一节、DI 数字量信号输入连接器定义 (7)第二节、DO 数字量信号输出连接器定义 (7)第四章各种信号的连接方法 (9)第一节、湿接点信号输入的连接方法 (9)第二节、TTL/CMOS 信号输入的连接方法 (9)第三节、集电极开路信号输出的连接方法 (9)第五章产品的应用注意事项、校准、保修 (10)第一节、注意事项 (10)第二节、保修 (10)附录A：各种标识、概念的命名约定 (11)PCH2531 光隔离 DI/DO 卡硬件使用说明书版本：6.006第一章功能概述随着基于 PC/104 总线系统的推广应用，PC/104 总线逐渐成为嵌入式 PC 机的机械标准，其秉承了 IBM-PC 开放式总线结构的优点，与 IBM-PC 机完全兼容，具备体积小（96*90mm 栈接式结构）、低成本、高可靠性、长寿命、工作范围宽、编程调试方便、外围模块齐全等优点，所以在测试领域基于 PC/104 的智能仪器得到了广泛应用, PC/104 系列产品已广泛应用于通信设备、车辆导航、工程控制等各种领域。

第一节、产品应用PCH2531 是一种基于 PC104+总线的光隔离 DI/DO 卡，可以通过微处理器对外部信号进行采集、监测和控制。

所еди电信AT-AR410系列模块型分支机构路由器数据表说明书

A T -AR410 SERIESModular Branch Office RoutersDatasheet | RoutersA T -AR410Modular Branch Office RouterA T -AR410SSecure Modular Branch Office RouterWirespeed E1/T1 IPsec VPN OperationWith full Layer 3 multi-protocol routingcombined with wirespeed VLAN switching in one compact unit,the AT -AR410 Series re-defines business-class routing.The AT -AR410 Seriessupports an extensive range of network services using simple modular plug in cards.Offeringunprecedented flexibility and performance in such a compact unit,the AT -AR410 Series isparticularly suited to T1/E1 applications where even the most data-intensive VPN operation is supported at full E1/T1 speeds.The AT -AR410Series is designed for the Small to Medium Enterprise (SME) and the branch office where multiple workgroups will benefit from VLAN separation together with high performance VPN tunnel operation for connection to remote offices and teleworkers,across the Internet.Businesses can also enjoy the cost advantages of Frame Relay networking at wirespeed E1/T1 rates.Unique VLAN Operation With Integral 4 X 10/100MBPS SwitchUnique for a product in this price bracket,the AT -AR410 Series routers support port-based and 802.1q tagged VLAN operations across their 4 x 10/100Mbs switch ports.This capability offers a potent combination of wirespeed L2switching between VLANs as well as highperformance L3 routing between VLANs in one highly cost-effective unit*.By supporting Layer 3routing between VLANs at a sustained rate of 8,500 PPS for 64 byte packets,the AT -AR410Series is a price breakthrough for small offices that have previously found the benefits of VLAN routing to be cost prohibitive.Simple Plug-in FlexibilityA range of different Port Interface Cards (PICs)can be plugged into the external network slot,including high speed E1/T1,V35/V21 sync,BRI/PRI ISDN and Ethernet PICs.This permits simple,affordable connectivity to today's network while allowing you to protect your investment and upgrade to new,speedier services in the future.Interface cards can be swapped in seconds and are automatically detected by the routers.These interface cards are shared with the Allied T elesis AT -AR700 Series of Enterprise routers,as well as the Rapier family of Layer 3 switches.Theonboard management/async port can be used for local management or for connection to an external modem.Stateful Inspection Firewall and DMZAllied T elesis' state of the art,stateful inspection firewall provides the highest level of security possible by providing full application-layer awareness without breaking the client/server model.Stateful inspection extracts the state-related information required for security decisions from all application layers and maintains this information in dynamic state tables for evaluating subsequent connection attempts.It also protects against a wide range of Denial of Service (DoS) attacks including Ping of Death,SYN/FIN flooding,Smurf attacks,port scans,fragment attacks and IP spoofing.E-mail alerts are automatically triggered when such attacks are detected.This provides a solution that is highly secure and offers maximum performance,scalability,andextensibility.This feature is part of the optional security bundle on the AT -AR410 and is standard on the AT -AR410S.* Each AT -AR410 switch port can only be a member of one tagged or untagged VLAN.Key Features•Port Interface Card (PIC) bay supporting a range of LAN/WAN interfaces•High-performance IPsec DES & 3DES VPN •Stateful Inspection Firewall•10/100Mbps Ethernet LAN/WAN port Integral 4 x 10/100Mbps full duplex Ethernet switch•Port-based VLAN operation on 4 switch ports •8Mb Flash for storage of two software releases •OSPF•BGP-4 (Optional)•CLI & SNMPv3 management •Web GUISoftware QoSAllied T elesis’AlliedWare TM software release2.7.1 provides advanced QoS and shaping features on the AT-AR410 Series.There are five key new QoS features available in this release—Bandwidth Metering,RED Curves,Mixed Scheduling,Virtual Bandwidth,and DAR.This release also supports eight queues per interface.Dynamic Application Recognition (DAR) is used to snoop for session setup exchanges and dynamically create classifiers that match the voice and video packets in the session.For more information about these advanced QoS features,see the Allied T elesis Advanced QoS White Paper available on our website.Hardware Accelerator for VPNand IPsecThe AT-AR410 Series optional hardware accelerator cards provide high performance compression and/or DES and 3DES encryption on all PPP and Frame Relay links.By offloading this work from the central routing processor, these hardware accelerators will ensure that DES-based IPsec and VPN operation will run at true wirespeed E1/T1 rates,hence maximising costly WAN links.Configuration and Management•T elnet remote management is supported across the LAN and WAN•The AT-AR410 Series supports Secure Shell (SSH) connections,which provide authenticated and encrypted secure remote management.SSH clients are available from third parties.•The AT-AR410 Series also supports SNMPv1, SNMPv2,SNMPv3,MIB II and Enterprise MIB About Allied T elesisAbout Allied T elesisAllied T elesis was founded in 1987 and now has offices around the globe,over 2,800 employees and over $500M of worldwide annual revenue. The attributes which have led Allied T elesis to achieve its leading position in the enterprise, operator and connectivity business segments can be summarised by four key elements:its business focus on networking technology for professional markets,where Allied T elesis has proved to be the only company capable of providing a total end-to-end solution at a high price/performance ratio;the ability to handle every aspect of its own products from design to marketing;the development of components and solutions which accommodate flexible, efficient and reliable network construction;and support from sound warranty terms and quality services.Allied T elesis connects the IP world efficiently thanks to affordable and highly reliablenetwork solutions.For more information see:Service and SupportAllied T elesis provides value-added supportservices for its customers under its Net.Cover SMprograms.For more information onNet.Cover SM support programs available in yourarea,contact your Allied T elesis salesrepresentative or visit our website:Feature SummaryDial-up Networking (ISDN & analog)Calling Line ID (CLI)Dial-on-DemandCLI Call-backMultilink PPP (MPP)Bandwidth Allocation Control Protocol(BAP/BACP)Always on Dynamic ISDN (AODI)Leased LineSYNC up to 2 MbpsE1/T1/G.703 Unchannelized / ChannelizedLAN ProtocolsIPIPX/SPXIPX/SPX SpoofingPPPoERouting ProtocolsStatic RoutesRIP & RIP V2OSPFBGP-4 (option)WAN ProtocolsFrame RelayX.25DecNetIVRemote Access Dial-in SupportAsynchronous Serial Ports with Routing SupportLAN BridgingSpanning TreeCompressionSTAC CompressionIP Address ManagementIP MultihomingDynamic IP address assignmentDHCPAuthenticationCLI,PAP/CHAP AuthenticationRADIUS/TACACS AuthenticationVPN and SecurityNAT (Network Address Translation)PAT (Port address translation)IP Packet FilteringGeneric Routing Encapsulation (GRE)L2TP Access Concentrator / Network ServerICSA-certified Stateful Inspection FirewallHardware 56-bit DES Encryption (option)Triple DES Encryption (option)ICSA-certified IPsecIKESecure Shell Remote Management (SSH)Secure Socket Layer (SSL) for secure GUI,or inconjunction with the load balancerVLANsPort-based VLAN operation on 4 switch portsUp to 4 VLANsWirespeed switching between VLANsT agging supported in 'upstream' direction onlyT raffic Shaping and QoSIP Packet PrioritisationRSVPDiffServUpstream bandwidth limitingRapid Spanning Tree Protocol (RSTP)RedundancyVirtual Router Redundancy Protocol (VRRP)Configuration and ManagementConsole PortCommand Line InterfaceT elnetWeb BrowserSNMP / SNMPv2c / SNMPv3Power CharacteristicsInput Voltage:100-240vAC,50-60Hz,10WMax Power Consumption:17.6W (+3V3@2A,+5V@1A,+********)Integral universal power supplySecurity clip to retain IEC power cordPhysical CharacteristicsIU Rack mountDepth:190mmWidth:305mmWeight:1.75kg (3.75lbs)Environmental Characteristics Operating temperature range:0ºC - 40ºC (32ºF - 104ºF)Storage temperature range:-25ºC - 70ºC (-13ºF - 158ºF)Relative humidity range:5 - 95% non-condensingApprovalsEMCEmissions:EN55022 class A,FCC class A,VCCI class I,AS/NZS3548 class A Immunity:EN55024Safety:UL60950,CAN/CSA-C22.2 NO.60950-00,EN60950,AS/NZS3260Listing:UL,cULNetwork Interface (where applicable to PIC)ISDN Limited Network Protocol Analysis,FCC Part 68,Subpart D,IC CS-03 Issue 8 Part I and VI,CTR2,CTR3/A1,CTR4,ACA TS031 Hardware Features*An MDI/MDI-X selection switch is provided for port 4.Ports 1 to 3 are hard-wired in MDI-X mode** used for high performance Encryption and Compression MemoryDRAM:16MbFlash:8Mb (can store two images) ReliabilityMTBF:50,000 hours minMTTR:0.5 hours maxWarranty:2 yearsCountry of OriginChina Standards and ProtocolsSoftware Release 2.7.1BGP-4RFC 1771 Border Gateway Protocol 4RFC 3065 Autonomous System Confederations for BGP RFC 1997 BGP Communities AttributeRFC 1998 Multi-home RoutingRFC 2842 Capabilities Advertisement with BGP-4 RFC 2858 Multiprotocol Extensions for BGP-4RFC 2918 Route Refresh Capability for BGP-4RFC 2385 Protection of BGP Sessions via the TCP MD5 Signature OptionEncryptionFIPS 46-3 DESFIPS 46-3 3DESFIPS 180 SHA-1FIPS 186 RSARFC 2104 HMACEthernetIEEE 802.1D MAC BridgesIEEE 802.1G Remote MAC BridgingIEEE 802.2 Logical Link ControlIEEE 802.3u 100BASE-TIEEE 802.3x Full Duplex OperationIEEE 802.3ac VLAN TAGIEEE 802.3ad (static) Link AggregationIEEE 802.1Q Virtual LANsIEEE 802.1v VLAN Classification by Protocol and Port RFC 894 Ethernet II EncapsulationGeneral RoutingRFC 1918 IP AddressingRFC 791 IPRFC 950 Subnetting,ICMPRFC 1812 Router RequirementsRFC 1055 SLIPRFC 1122 Internet Host RequirementsRFC 1582 RIP on Demand Circuits"IPX Router Specification",v1.2,Novell,Inc.,Part Number 107-000029-001 IPX Router Specification RFC 792 ICMPRFC 1288 FingerRFC 1701 GRERFC 1702 GRE over IPv4RFC 2131 DHCPRFC 1542 BootPRFC 826 ARPRFC 925 Multi-LAN ARPRFC 3232 Assigned NumbersRFC 2661 L2TPRFC 2822 Internet Message FormatRFC 903 Reverse ARPRFC 1027 Proxy ARPRFC 793 TCPRFC 768 UDPRFC 1144 Van Jacobson's Compression AppleTalkISO 9542 End System to Intermediate System Protocol RFC 2390 Inverse Address Resolution ProtocolRFC 1142 OSI IS-IS Intra-domain Routing Protocol ISO 10589,ISO 10589 Technical Corrigendums 1,2,3, ISO Intermediate System-to-Intermediate SystemISO 8473,relevant parts of ISO 8348(X.213),ISO 8343/Add2,ISO 8648,ISO TR 9577 Open System Interconnection RFC 1332 The PPP Internet Protocol Control Protocol (IPCP) RFC 1334 PPP Authentication ProtocolsRFC 1377 The PPP OSI Network Layer Control Protocol (OSINLCP)RFC 1378 The PPP AppleTalk Control Protocol (ATCP) RFC 1552 PPP internetworking packet exchange protocol IPXCPRFC 1570 PPP LCP ExtensionsRFC 1598 PPP in X.25RFC 1618 PPP over ISDNRFC 1661 The Point-to-Point Protocol (PPP)RFC 1762 The PPP DECnet Phase IV Control Protocol (DNCP) RFC 1877 PPP Internet Protocol Control Protocol Extensions for Name Server AddressesRFC 1962 The PPP Compression Control Protocol (CCP) RFC 1968 The PPP Encryption Control Protocol (ECP) RFC 1974 PPP Stac LZS Compression ProtocolRFC 1978 PPP Predictor Compression ProtocolRFC 1989 PPP Link Quality MonitoringRFC 1990 The PPP Multilink Protocol (MP)RFC 1994 PPP Challenge Handshake Authentication Protocol (CHAP)RFC 2125 The PPP Bandwidth Allocation Protocol (BAP) / The PPP Bandwidth Allocation Control Protocol (BACP) RFC 2516 A Method for Transmitting PPP Over Ethernet (PPPoE)RFC 2878 PPP Bridging Control Protocol (BCP)RFC 3022 Traditional NATRFC 1256 ICMP Router Discovery MessagesIP MulticastingRFC 2236 IGMPv2RFC 1075 DVMRPdraft-ietf-idmr-dvmrp-v3-9 DVMRPRFC 1112 Host ExtensionsRFC 1812 Router RequirementsRFC 2715 Interoperability Rules for Multicast Routing Protocols RFC 2362 PIM-SMdraft-ietf-pim-dm-new-v2-04 PIM-DMdraft-ietf-pim-sm-v2-new-09 PIM-SMIPsecRFC 2395 IPsec Compression - LZSRFC 2401 Security Architecture for IPRFC 2402 AH - IP Authentication HeaderRFC 2403 IPsec Authentication - MD5RFC 2404 IPsec Authentication - SHA-1RFC 2405 IPsec Encryption - DESRFC 2406 ESP - IPsec encryptionRFC 2407 IPsec DOIRFC 2408 ISAKMPRFC 2409 IKERFC 2410 IPsec encryption - NULLRFC 2411 IP Security Document RoadmapRFC 2412 OAKLEYRFC 1829 IPsec algorithmRFC 2451 The ESP CBC-Mode Cipher AlgorithmsRFC 3173 IPCompRFC 1828 IP Authentication using Keyed MD5IPv6draft-ietf-ngtrans-hometun-01 IPv6 over IPv4 tunnels for home to Internet accessRFC 1981 Path MTU Discovery for IPv6RFC 2375 IPv6 Multicast Address AssignmentsRFC 2460 IPv6RFC 2080 RIPng for IPv6RFC 2461 Neighbour Discovery for IPv6RFC 2462 IPv6 Stateless Address AutoconfigurationRFC 2463 ICMPv6RFC 2464 Transmission of IPv6 Packets over Ethernet NetworksRFC 2472 IPv6 over PPPRFC draft-vida-mld-v2 Multicast Listener Discovery (MLD)for IPv6draft-ietf-ngtrans-introduction-to-ipv6-transition-06 Anoverview of the introduction of IPv6 in the InternetRFC 2526 Reserved IPv6 Subnet Anycast AddressesRFC 2711 IPv6 Router Alert OptionRFC 3056 Connection of IPv6 Domains via IPv4 CloudsRFC 3315 DHCPv6RFC 3633 IPv6 Prefix Options for Dynamic HostConfiguration ProtocolRFC 3596 DNS Extensions to support IP version 6RFC 3513 Internet Protocol Version 6 (IPv6) AddressingArchitectureRFC 3484 Default Address Selection for Internet Protocolversion 6RFC 2710 Multicast Listener Discovery (MLD) for IPv6draft-vida-mld-v2-08 Multicast Listener Discovery (MLD)for IPv6,Version 2RFC 2766 NAT-PTRFC 2529 Transmission of IPv6 over IPv4 Domainswithout Explicit TunnelsRFC 2893 Transition Mechanisms for IPv6 Hosts and RoutersRFC 3646 DNS Configuration options for Dynamic HostConfiguration Protocol for IPv6 (DHCPv6)RFC 3587 IPv6 Global Unicast Address FormatRFC 2365 Administratively Scoped IP MulticastRFC 3306 Supported IPv6 standardsRFC 3307 Allocation Guidelines for IPv6 Multicast AddressesManagementRFC 1155 MIBRFC 1157 SNMPRFC 1213 MIB-IIRFC 1643 Ethernet MIBRFC 1493 Bridge MIBRFC 2790 Host MIBRFC 1573 Evolution of the Interfaces Group of MIB-IIRFC 2338 VRRPRFC 1757 RMON (groups 1,2,3 and 9)RFC 2674 Definitions of Managed Objects for Bridgeswith Traffic Classes,Multicast Filtering and Virtual LANExtensions (VLAN)RFC 2665 Definitions of Managed Objects for theEthernet-like Interface TypesRFC 2580 Conformance Statements for SMIv2RFC 2578 Structure of Management Information Version2 (SMIv2)RFC 2096 IP Forwarding Table MIBRFC 2012 SNMPv2 MIB for TCP using SMIv2RFC 2011 SNMPv2 MIB for IP using SMIv2RFC 1657 Definitions of Managed Objects for BGP-4using SMIv2RFC 1515 Definitions of Managed Objects for IEEE802.3 MAUsRFC 2856 Textual Conventions for Additional HighCapacity Data TypesRFC 2579 Textual Conventions for SMIv2RFC 1212 Concise MIB definitionsRFC 2576 Coexistence of SNMPv1,v2 and v3 of theInternet-standard Network ManagementRFC 3410 Introduction and Applicability Statements forInternet-Standard Management FrameworkRFC 3411 An Architecture for Describing SNMPManagement Frameworks.RFC 3412 Message Processing and Dispatching for the SNMP.RFC 3413 SNMP Applications.RFC 3414 User-based Security Model (USM) for SNMPv3RFC 3415 View-based Access Control Model (VACM) forthe SNMPRFC 3416 Version 2 of the Protocol Operations for SNMPRFC 3417 Transport Mappings for the SNMPRFC 3418 MIB for SNMPRFC 3164 Syslog Protocoldraft-ietf-bridge-8021x-00.txt Port Access Control MIBOSPFRFC 1245 OSPF protocol analysisRFC 1246 Experience with the OSPF protocolRFC 1583 OSPFv2RFC 1793 Extending OSPF to Support Demand CircuitsRFC 1586 OSPF over Frame RelayRFC 2328 OSPF v2RFC 1587 The OSPF NSSA OptionQoSRFC 1349 Type of Service in the IP SuiteRFC 2205 Reservation ProtocolRFC 2211 Controlled-LoadRFC 2475 An Architecture for Differentiated ServicesIEEE 802.1p Priority TaggingRFC 2697 A Single Rate Three Color MarkerRFC 2698 A Two Rate Three Color MarkerRFC 2597 Assured Forwarding PHB GroupRFC 3246 An Expedited Forwarding PHB (Per-Hop Behavior)RIPRFC 1058 RIPv1RFC 1723 RIPv2SecurityIEEE 802.1x Port Based Network Access Controldraft-ylonen-ssh-protocol-00.txt SSH Remote Login ProtocolRFC 1779 X.500 String Representation of Distinguished NamesRFC 2459 X.509 Certificate and CRL profileRFC 2511 X.509 Certificate Request Message FormatRFC 2559 PKI X.509 LDAPv2RFC 2587 PKI X.509 LDAPv2 SchemaRFC 2510 PKI X.509 Certificate Management ProtocolsRFC 2585 PKI X.509 Operational ProtocolsPKCS #10 Certificate Request Syntax StandardDraft-IETF-PKIX-CMP-Transport-Protocols-01 TransportProtocols for CMPRFC 2865 RADIUSRFC 2866 RADIUS AccountingRFC 1492 TACACSdraft-grant-tacacs-02.txt TACACS+RFC 1413 IDPRFC 1858 FragmentationServicesRFC 959 FTPRFC 2821 SMTPRFC 2049 MIMERFC 1985 SMTP Service ExtensionRFC 1305 NTPv3RFC 1510 Network AuthenticationRFC 2156 MIXERRFC 854 Telnet Protocol SpecificationUSA Headquarters |19800 North Creek Parkway |Suite 200 |Bothell |WA 98011 |USA |T:+1 800 424 4284 |F:+1 425 481 3895European Headquarters |Via Motta 24 |6830 Chiasso |Switzerland |T:+41 91 69769.00 |F:+41 91 69769.11Asia-Pacific Headquarters |11 T ai Seng Link |Singapore |534182 |T:+65 6383 3832 |F:+65 6383 3830© 2006 Allied T elesis Inc.All rights rmation in this document is subject to change without notice.All company names,logos,and product designs that are trademarks or registered trademarks are the property of their respective owners.617-00453-00 Rev QRFC 855 Telnet Option Specifications RFC 856 Telnet Binary Transmission RFC 857 Telnet Echo OptionRFC 858 Telnet Suppress Go Ahead Option RFC 1091 Telnet terminal-type option RFC 1350 TFTPRFC 1179 Line printer daemon protocol RFC 932 Subnetwork addressing scheme RFC 1945 HTTP/1.0RFC 2217 Telnet Com Port Control Option SSLRFC 2246 The TLS Protocol Version 1.0draft-freier-ssl-version3-02.txt SSLv3STP / RSTPIEEE 802.1w - 2001 RSTPIEEE 802.1t - 2001 802.1D maintenanceX.25RFC 1356 Multiprotocol Interconnect on X.25 and ISDN in the Packet ModeITU-T Recommendations X.25 (1988),X.121 (1988),X.25ISDNANSI T1.231-1997ANSI T1.403-1995ANSI T1.408-1990AT&T TR 54016-1989Austel TS 013.1:1990Bellcore SR-3887 1997TS 013.2:1990TS 014.1:1990TS 014.2:1990ITU G.703ITU G.704ITU G.706ITU-T Recommendations G.703 (1972)ITU-T Recommendation Q.922G.794 (1988)G.706 (1988)I.120 (1988)I.121 (1988)I.411 (1988)I.430 (1988)I.431 (1988)Q.920 (1988)Q.921 (1988)Q.930 (1988) Q.931 (1988)ETSI Specifications ETS 300 011:1991ETS 300 012:1992ETS 300 102-1:1990ETS 300 1022:1990ETS 300 125:1991ETS 300 153:1992ETS 300 156:1992New Zealand Telecom TNA 134German Monopol (BAPT 221)Japan NTT I.430-aRockwell Bt8370 Fully Integrated T1/E1 Framer and Line Interface data sheetTechnical Reference of Frame Relay Interface,Ver.1,November 1993,Nippon Telegraph and Telephone CorporationFrame Relay ANSI T1S1 Frame relayRFC 1490,2427 Multiprotocol Interconnect over Frame RelayVoIP RFC 2543 SIP G.711 A/µ law G.723.1G.729 A/B (Optional)H.323 v2Ordering InformationAT -AR410-xxModular Branch Office Router AT -AR410S-xxSecure Modular Branch Office RouterWhere xx =10 for U.S.power cord 20 for no power cord 30 for U.K.power cord 40 for Australia power cord 50 for Europe power cordHardware upgrade options Port Interface CardsAT -AR020Single configurable E1/T1 interface that supports channelized/unchannelized Primary Rate ISDN/Frame RelayOrder Number:990-001304-00AT -AR021S (V2)Single Basic Rate ISDN (S/T) interface Order Number:990-001103-00AT -AR023Single Synchronous port up to 2Mbps to an external CSU/DSU (AT-V.35-DTE-00 or AT-V.21-DTE-00 cable required)Order number:990-001104-00AT -AR024Four Asynchronous RS232 interfaces to 115Kbps Order number:990-001105-00AT -AR027Two VoIP FXS portsOrder number:990-001356-00Encryption/Compression AT -AR011i ECMACProvides hardware-based DES and 3DES*encryption,hardware-based compressionOrder number:990-12278-00 (Not RoHS Compliant)Software upgrade optionsAT -AR400SSECPK(AT-AR410 only as these features are included in the Standard AlliedWare of the AT-AR410S)Provides Firewall,SMTP proxy,HTTP proxy Order number:980-10027-00AT -AR400 – ADVL3UPGRDAR400 Series Advanced Layer 3 Upgrade • IPv6• BGP-4• Server Load Balancing Order number:980-10021-00。