RT9263CGX5资料
- 1、下载文档前请自行甄别文档内容的完整性,平台不提供额外的编辑、内容补充、找答案等附加服务。
- 2、"仅部分预览"的文档,不可在线预览部分如存在完整性等问题,可反馈申请退款(可完整预览的文档不适用该条件!)。
- 3、如文档侵犯您的权益,请联系客服反馈,我们会尽快为您处理(人工客服工作时间:9:00-18:30)。
DS9263-09 March 2007
Features
z 1.0V Low Start-up Input Voltage
z
High Supply Capability to Deliver 3.3V 100mA with 1V Input Voltage
z 17μA Quiescent (Switch-off) Supply Current z 90% Efficiency
z 550kHz Fixed Switching Rate
z
Providing Flexibility for Using Internal and External Power Switches z SOT-89-5 Package
z
RoHS Compliant and 100% Lead (Pb)-Free
Pin Configurations
Applications
z PDA
z Portable Instrument z
DSC
High Efficiency, Low Supply Current, Step-Up DC/DC Converter
Ordering Information
General Description
The RT9263 is a compact, high efficient, step-up DC/DC converter with an adaptive current mode PWM control loop, providing a stable and high efficient operation over a wide range of load currents. It operates in both continuous and discontinuous current modes in stable waveforms without external compensation.
The low start-up input voltage below 1V makes RT9263suitable for 1 to 4 battery cell applications providing up to 400mA output current. The 550kHz high switching rate minimized the size of external components. Besides, the 17μA low quiescent current together with high efficiency maintains long battery lifetime.
(TOP VIEW)
RT9263CCX5SOT-89-5
Marking Information
For marking information, contact our sales representative directly or through a RichTek distributor located in your
area, otherwise visit our website for detail.
EXT GND
LX
FB
VDD RT9263ECX5
SOT-89-5
EN GND
LX
FB
VDD Note :
RichTek Pb-free and Green products are :
`RoHS compliant and compatible with the current require- ments of IPC/JEDEC J-STD-020.
`Suitable for use in SnPb or Pb-free soldering processes.`100%matte tin (Sn) plating.
E : Driver for external power devices
Typical Application Circuit
Figure 1. RT9263CCX5 Typical Application for Portable Instruments below 400mA
Figure 2. 0.4A to 1A Output Current Application
Figure 3. High Voltage Application (Rm should be added when IL > 100mA)
V IN
OUT
V OUT1
V V OUT1
15V
DS9263-09 March 2007
Function Block Diagram
Figure 4. High Voltage Application with Shutdown Control
FB
EXT LX
GND
VDD
V V OUT1
15V FB LX
GND
VDD EN
Functional Pin Description
Absolute Maximum Ratings
z Supply Voltage-----------------------------------------------------------------------------------------------------−0.3V to 7V
z LX Pin Switch Voltage--------------------------------------------------------------------------------------------−0.3V to (V DD + 0.8V) z Other I/O Pin Voltages-------------------------------------------------------------------------------------------−0.3V to (V DD + 0.3V) z LX Pin Switch Current--------------------------------------------------------------------------------------------2.5A
z EXT Pin Driver Current--------------------------------------------------------------------------------------------30mA
z Power Dissipation, P D @ T A = 25°C
SOT89-5-------------------------------------------------------------------------------------------------------------0.5W
z Package Thermal Resistance
SOT89-5, θJA----------------------------------------------------------------------------------------------------------------------------------------------------300°C/W
z Operating Junction T emperature-------------------------------------------------------------------------------150°C
z Storage T emperature Range------------------------------------------------------------------------------------−65°C to +150°C Electrical Characteristics
(V IN= 1.5V, VDD set to 3.3V, Load Current = 0, T A = 25°C, unless otherwise specified)
* Note: The EN pin shall be tied to VDD pin and inhibit to act the ON/OFF state whenever the VDD pin voltage may reach to 5.5V or above.
DS9263-09 March
Typical Operating Characteristics
Efficiency for 3.3V Output
2030
4050607080
90100
0.010.1
1
10
100
1000
I LOAD (mA)
E f f i c i e n c y (%)
Efficiency for 5.0V Output
2030
4050607080
901000.01
0.11101001000
I LOAD (mA)
E f f i c i e n c y (%)
No Load Current
0102030405060
7080901
1.2
1.5
2
2.5
3
Input Voltage (V)I
D D (u A )
No Load Current
020
406080100120
140
1
1.2
1.5
2
2.5
3
4
Input Voltage (V)
I D D (u A )
Start Up Voltage
0.8
0.91.01.11.21.3
1.40
20
40
60
80
100
I LOAD (mA)
I n p u t V o l t
a g e (V )
Start Up Voltage
0.80
0.850.900.951.001.051.101.15
1.201.250
25
50
75
100
I LOAD (mA)
I n p u t V o l t
a g e (V )
DS9263-09 March 2007
Application Information
Output Voltage Setting
Referring to application circuits Figure 1 to Figure 4 the output voltage of the switching regulator (V OUT1) can be set with Equation (1).
(1)×OUT1R1
V =(1+) 1.25V
R2Feedback Loop Design
Referring to application circuits Figure 1 to Figure 4. The selection of R1 and R2 based on the trade-off between quiescent current consumption and interference immunity is stated below:
z Follow Equation (1)
z
Higher R reduces the quiescent current (Path current = 1.25V/R2), however resistors beyond 5MW are not recommended.
z
Lower R gives better noise immunity, and is less sensitive to interference, layout parasitics, FB node leakage, and improper probing to FB pins.
z
A proper value of feed forward capacitor parallel with R1 on Figure 1 to Figure 4 can improve the noise immunity of the feedback loops, especially in an improper layout. An empirical suggestion is around 100pF ~ 1nF for feedback resistors of M Ω, and 10nF ~0.1μF for feedback resistors of tens to hundreds K Ω.
For applications without standby or suspend modes, lower values of R1, and R2 are preferred. For applications concerning the current consumption in standby or suspend modes, the higher values of R1, and R2 are needed. Such “high impedance feedback loops ” are
sensitive to any interference, which require careful layout and avoid any interference, e.g. probing to FB pins.
Layout Guide
z A full GND plane without gap break.
z
V OUT1 to GND noise bypass − Short and wide connection for C2 to Pin2 and Pin5.
z
V IN to GND noise bypass − Add a 100μF capacitor close to L1 inductor, when V IN is not an idea voltage source.z
Minimized FB node copper area and keep far away from noise sources.
z
Minimized parasitic capacitance connecting to LX and EXT nodes, which may cause additional switching loss.
FB Pin
V
Richtek Technology Corporation Headquarter
5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611Richtek Technology Corporation Taipei Office (Marketing)
8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C.
Tel: (8862)89191466 Fax: (8862)89191465
Email: marketing@
Outline Dimension
A
H
5-Lead SOT-89 Surface Mount Package。