MOS -最详细的介绍

U-MOSFET Structure
3.沟槽垂直导电型MOSFET管
V型沟槽：不容易生产，V尖角容易形成高的电场. U型沟槽： U-MOSFET结构90年代商业化应用，平面型的演变，切开翻转90度。 Silicon表 面刻沟槽，The N-type channel is formed on the side-wall of the trench at the surface of the P-base region. The channel length is determined by the difference in vertical extension of the P-base and N+ source regions as controlled by the ion-implant energies and drive times。栅 结构不与裸片表面平行而是构建在沟道之中垂直于表面，因此占用空间较少且使电流流 动真正垂直，最小化基本单元面积(cell pitch小)，在相同的占位空间中可以集成更多的 单元从而降低RDSON . U-MOSFET structure reduce the on-state resistance by elimination of the JFET component .
Double-diffused？？
D-MOSFET Structure
2. 平面垂直导电型功率MOSFET管
D-MOSFET Structure
2. 平面垂直导电型功率MOSFET管
The channel length of this device could be reduced to sub-micron dimensions by controlling the diffusion depths of the P-base and N+ source regions without resorting to expensive lithography tools. The device fabrication process relied up on the available planar gate technology used to manufacture CMOS integrated circuits.
反转层:Inversion Layer DMOS:双重扩散MOS, Double Diffused 氧化层相当于介电质 Dielectric Material (Dielectric constant) 掺杂 Doged, 高掺杂浓度区域 Heavily doped region 半导体层：依赖于门极电压，阻断或允许电流在漏极D和源极S间流 动
U-MOSFET Structure
Rounded trench bottom surface
Thicker oxide at the trench bottom surface
SGT-MOSFET Structure
The depth of the trench must be tailored to achieve the desired breakdown voltage. The surface of the trench must be smooth and free of damage in order to obtain a good MOS interface with high channel inversion layer mobility. A thick oxide is grown on the trench surface by thermal oxidation. The oxide thickness must be sufficient to provide the desired charge coupling as well as to support the entire drain blocking voltage. The trench is then refilled with highly doped N-type polysilicon (it is etched until it is recessed below the surface to a depth slightly below the depth of the P-base region).
LV MOS RDSON is constrained by the significant channel resistance due to the low channel density and the JFET region contribution.
JFET region substantially increases the internal resistance
The fast switching speed and ruggedness of the D-MOSFET structure were significant advantages compared with the performance of the available bipolar power transistor
Load
D
S
inversion layer 沟道
D-MOSFET Structure
2. 平面垂直导电型功率MOSFET管 D-MOSFET (VDMOSFET)：Vertical Double-diffused MOSFET，垂直导电双 扩散，70年代商业应用 平面Planar门极结构：n-type channel is defined by the difference in the lateral extension of the junctions under the gate electrode. The voltage blocking capability is determined by the doping and thickness of the Ndrift region. 多个单元结构。具有相同RDS(on)电阻MOSFET并联，等效电阻为一个 MOSFET单元RDS(on)的1/n，裸片面积越大其导通电阻越低。The drift region resistance increases rapidly with increasing blocking voltage。
The large electric field at the junction produces a large electric field in the gate oxide in the trenches especially at the corners in the U-MOSFET structure. This creates reliability concerns due to generation of hot-electrons. The rounded surfaces at the bottom of the trench can reduce this problem. But the electric field in the gate oxide is relatively large.
The high input capacitance and high reverse transfer capacitance offsets the benefits of the low specific on-resistance in high frequency applications. This capacitance can be reduced by selectively increasing the oxide thickness at the bottom of the trench surface. This adds significant complexity to the device fabrication process.
Power MOSFET Basic and Application
Song Liu
MOSFET Basic
MOSFET: Metal Oxide Semiconductor Field Effect Transistor is a three-terminal devices which in basic term behaves as a voltage controlled switch（压控）. 氧化层 Metal Layer ：门极(现在多晶硅Polysilicon形成门极） 氧化隔离层 Oxide Isolation Layer ：防止电流在门极和其它两电极间D、S极 流动，但并不阻断电场 Electric Field. 半导体层 Semiconductor Layer ：取决于门极电压，阻止或允许电流在D/S 间流通
SGT-MOSFET Structure
The depletion regions are formed across the horizontal junction J1 and the vertical trench sidewall. This two-dimensional depletion alters the electric field distribution from the triangular shape observed in conventional parallel-plane junctions to a uniform distribution due to the linear doping profile. This allows supporting a required blocking voltage over a shorter distance.
Drain Gate
Source
Circuit Symbol
Source Drain Gate
Package Pin Layout
MOSFET Basic
MOSFET半导体特征
MOS是多子单极型器件(无少子),受温度影响小,PMOS多子是空穴,NMOS多子 是电子, Majority Carrier.
A fresh oxide is then grown by thermal oxidation on the trench sidewalls to form the gate oxide. A thicker oxide is simultaneously formed by the thermal oxidation on the top surface of the polysilicon inside the trenches as an isolation oxide between the gate electrode and the source electrode. A second polysilicon layer is now deposited and planarized to serve as the gate electrode.
Signal MOSFET Structure
1. 平面横向（Lateral）导电型MOSFET管
增加或减少门极电压会增大或减少N沟道的大小，以此控 制器件导通
没有充分应用芯片的尺寸，电流和电压额定值有限
CMOS工艺，适合低压信号管，如微处理器，运放，数字
电路
低的电容，快的开关速度
Driver
Gቤተ መጻሕፍቲ ባይዱ
Vdd
电流流动垂直
无JFET region
U-MOSFET Structure
3.沟槽垂直导电型MOSFET管
The smaller cell pitch increases the channel density. However, the electric field at the junction J1 between the P-base region and the N-drift region is large which promotes the extension of the depletion region into the P-base region. Consequently, the channel length must be made relatively large in order to suppress reach through breakdown which increases the channel resistance.
bvusetwothreedimensionalelectricfieldshapingachievebvhigherthanbv201347devicephysicssiholesisisisisisisisisisisisisisisisintypeptypediodestructurereverse耗尽层biasforwardbiasgooddiodesoftdiodeforwardreverseavalanchebreakdownn和二边p区形成耗尽层mosfetstructure耗尽层vddmosfetstructure高掺杂n形成薄耗尽层导致中间n全部耗尽相当于本征半导体导电差具有高的耐压内部形成强的横向电场vdd电压加在d极的电场和内部横向电场方向相同具有高的耐压vdd全部耗尽g极加电压栅极表面形成正电荷吸引p区电子到表面将p区表面空穴中和栅极下面形成耗尽层mosfetstructure耗尽层g极加电压进一步增加栅极表面正电荷增强进一步吸引p区电子到表面形成n型的反型层开始流过电流mosfetstructureg极加电压进一步增加栅极表面正电荷增强p区更宽范围形成n型的反型层中间高掺杂形成低电阻通路mosfetstructure