stm32f051c8t6最小系统板V2
STM32F051C8T6开发板用户手册说明书
Open051C User ManualContentsOPEN051C USER MANUAL (1)1.OVERVIEW (2)1.1.W HAT’S ON BOARD (2)2.DEMO (4)2.1.8I OS (5)2.2.ADC+DMA (5)2.3.DAC+DMA (6)2.4.GPIO_LED (7)2.5.GPIO_LED_KEY (7)2.6.I2C (7)2.7.I2S UDA1380&SD_FATFS (8)2.8.JOYSTICK (8)2.9.LCD22 (8)2.10.LCD22-T OUCH (9)2.11.FATFS V0.08A-SD C ARD (10)2.12.NRF24L01 (10)2.13.O NE-W IRE (11)2.14.PS2 (11)2.15.RTC (12)2.16.SPI (12)2.17.U COS II (13)ART (13)3.REVISION HISTORY (14)1. Overview 1.1. What’s on board[ MCU ]1. STM32F051C8T6the high performance STM32 MCU which features：Core：Cortex-M0 32-bit RISC；Operating Frequency：48MHz；Operating Voltage：2-3.6V；Package：LQFP48；I/Os: 39;Memories：64KB Flash, 8kB RAM;Communication Interfaces: 2 x SPI, 2 x USART, 2 x I2C, 1 x I2S;[ Component ]3. Power supply switch5V DC or USB4. Power indicator5. User LEDfor indicating I/O status6. Reset key7. User LEDfor I/O input and/or interact with running code 8. Joystickfive positionAD & DA converters ： 1 x AD (12-bit, 1μs, shares 16 channels);Debugging/Programming ： supports SWD (serial wire debug) interfaces, supports IAP2. AMS1117-3.33.3V voltage regulator[ Interface ]11. 8I/Os + DAC + ADC Interfaceeasily connects to keypad, motor, etc. 12. SPI1 / SPI2 interfaceeasily connects to SPI peripherals such as FLASH (AT45DBxx), SD card, MP3, etc.convenient for connecting AD module, thanks to the SPI1 alternative AD function 13. I2C1 / I2C2 interfaceeasily connects to I2C peripherals such as I/O expander (PCF8574), EEPROM (AT24Cxx), etc.14. LCD interfaceeasily connects to the touch screen LCD 15. ONE-WIRE interfaceeasily connects to ONE-WIRE devices (TO-92 package), such as temperature sensor (DS18B20), electronic registration number (DS2401), etc. 16. USART1 interfaceeasily connects to RS232, RS485, USB TO 232 17. USART2 interfaceeasily connects to RS232, RS485, USB TO 232 18. I2S / I2C1 interfaceeasily connects to I2S peripherals such as audio module, etc. 19. PS/2 interfacefor connecting PS/2 keyboard/mouse.9. 32.768K crystal oscillatorused for internal RTC, also supports clock calibration10. 8M crystal oscillatorenables the MCU run at 48M frequency by frequency multiplication[ Other interfaces ]20. 5V DC jack21. 5V/3.3 V power input/outputusually used for power output, or common ground with other user board 22. MCU pins connectorall the MCU pins are accessible on expansion connectors for further expansion 23. SWD interfacefor debugging/programming[Jumper/switch]20. Boot mode selectionfor configuring the BOOT0 pins 21. User key jumpershort the jumper to connect the user key to I/Os used in example codeopen the jumper to connect the user key to other custom pins via jumper wires 22. Joystick jumpershort the jumper to connect the joystick to I/Os used in example codeopen the jumper to connect the joystick to other custom pins via jumper wires 23. PS/2 interface jumperI/O ；short the jumper to connect the PS/2 interface to I/Os used in example codeopen the jumper to connect the PS/2 interface to other custom pins via jumper wires 24. VBAT selection jumpershort the jumper to use system power supply open the jumper to connect the VBAT to external power, such as battery2. DemoKEIL MDK Version：4.54Programmer/Debugger: ULINK/V2Programming/Debugging interface: SWD Serial port settings:Select a proper COM portBaud rate 115200Data bits 8Stop bits 1Parity bits NoneFlow control None2.1. 8Ios◆ Overview8bit I/Os demo◆ Hardware connectionConnect the board to 5V power via 5VDCinterfaceConnect the ULINK board to the board via SWDinterfaceConnect the 8 Push Button to the board via8I/Os+DAC+DAC interface (The G pin on the module connect to the GND pin on the board) USART1 Connect a serial portconverter(RS232) to the board via UART1 interface◆ Operation and resultThe below information will be printed on the serial debugging assistant:2.2. ADC+DMA◆ OverviewADC analog voltage acquisition demo◆Hardware connectionConnect the board to 5V power via 5VDCinterfaceConnect the ULINK2 board to the board viaSWD interfaceConnect a serial port converter(RS232) to the board via UART1 interfaceConnect the Analog Test Board to the boardvia 8I/Os+DAC+DAC interface◆ Operation and resultRotate the potentiometer on the Analog Test Board, the below information will be printed on the serialdebugging assistant:2.3. DAC+DMA◆ OverviewDAC demo◆ Hardware connectionConnect the board to 5V power via 5VDCinterfaceConnect the ULINK2 board to the board viaSWD interfaceConnect the Analog Test Board to the board via 8I/Os+DAC+DAC interfaceConnect the 5V pin headers on both the mainboard and the Analog Test Board via jumper wire◆ Operation and resultYou should hear sound from the Analog Test Board.2.4. GPIO_LED◆OverviewGPIO_LED demo◆Operation and resultShort the LED JMP◆Operation and resultThe LED blinking2.5. GPIO_LED _KEY◆OverviewLED, joystick demo◆Hardware connectionShort the LED JMP◆Operation and resultPush the joystick, the LED status should keep changing accordingly.2.6. I2C◆OverviewI2C EEPROM demo◆Hardware connectioninterfaceConnect the ULINK2 board to the board viaSWD interfaceConnect a serial port converter to the boardvia UART1 interfaceConnect the AT24CXX EEPROM Board tothe board via I2CX interface( connect toI2C1 or I2C2 depends on the program)◆Operation and resultThe below information will be printed on the serial debugging assistant:2.7. I2S UDA1380 & SD_FATFS◆ OverviewAudio file placed on SD Card (with FATFS) ◆ Hardware connectionConnect the board to 5V power via 5VDCinterfaceConnect the ULINK2 board to the board viaSWD interfaceConnect the UDA1380 Board to theonboard I2S interfaceConnect an earphone to theUDA1380Board LINEOUT interfaceConnect the Micro SD Storage Board (withSD card) to the onboard SPI2 interfaceConnect the CD pin on the Micro SDStorage Board to the onboard PB0 pin using a jumper wire.◆ Operation and resultThe below information will be printed on the serial debugging assistant:2.8. JOYSTICK◆ OverviewJoystick demo◆ Hardware connectionShort the LED JMP ，JOYSTICK JMP ，KEY JMP . ◆ Operation and resultPush the joystick or the keys, the LED status should keep changing accordingly.2.9. LCD22◆ OverviewLCD demo◆Hardware connectionConnect the board to 5V power via 5VDC interface Connect the ULINK2 board to the board via SWDinterfaceConnect the "2.2inch 320x240 Touch LCD (A)" to theboard.◆ Operation and resultDisplay image on the LCD2.10. LCD22-Touch◆ OverviewLCD demo◆ Hardware connectionConnect the board to 5V power via 5VDC interfaceConnect the ULINK2 board to the board via SWD interface Connect the "2.2inch 320x240 Touch LCD (A)" to the board.◆ Operation and resultDisplay image on the LCDMessage will be displayed on the LCD◆ ApplicationHandheld device display2.11. FATFS V0.08A-SD Card◆ OverviewSD_FatFS demo ◆ Hardware connectionConnect the board to 5V power via 5VDCinterfaceConnect the ULINK2 board to the board viaSWD interfaceConnect a serial port converter to the board viaUART1Connect the Micro SD Storage Board (with SDcard) to the board via SPI2 interfaceConnect the CD pin on the Micro SD StorageBoard to the onboard PB0 pin using a jumper wire.◆ Software configuration ◆ Operation and resultThe below information will be printed on the serial debugging assistant:2.12. NRF24L01◆ OverviewNRF24L01 demo ◆ Hardware connectionConnect the board to 5V power via 5VDCinterfaceConnect the ULINK2 board to the board viaSWD interfaceConnect the ULINK2 board to the board viaSWD interfaceConnect the NRF24L01 Board to the boardvia SPI interface◆ Software configurationDownload the transmitting and receiving program to the two NRF24L01 board respectively. ◆ Operation and resultMessage will be printed on the serial debugging assistant.2.13. One-Wire◆ OverviewOne-wire demo◆ Hardware connectionConnect the board to 5V power via 5VDC interfaceConnect the ULINK2 board to the board via SWD interfaceConnect a serial port converter to the onboard USART1 interface Connect the DS18B20 to the onboard One-wire socket◆ Operation and resultThe below information will be printed on the serial debugging assistant:2.14. PS2◆ OverviewPS2 keyboard demo ◆ Hardware connectionConnect the board to 5V power via 5VDCinterfaceConnect the ULINK2 board to the board viaSWD interfaceConnect the ULINK2 board to the board viaSWD interfaceConnect the PS2 keyboard to the board via PS2interface.Short the PS2 JMP .◆ Operation and resultPress keys on the PS2 keyboard, the related key value will display on the serial debugging assistant:2.15. RTC◆ OverviewRTC demo◆ Hardware connectionConnect the board to 5V power via 5VDC interfaceConnect the ULINK2 board to the board via SWD interface◆ Operation and resultThe below information will be printed on the serial debugging assistant:2.16. SPI◆ OverviewSPI demo◆ Hardware connectionConnect the board to 5V power via 5VDC interface Connect the ULINK2 board to the board via SWDinterfaceConnect the "AT45DBXX DataFlash Board" to theonboard SPIX interface (connect to SPI1 or SPI2 depends on the program)Connect a serial port converter to the onboardUSART1 interface◆ Software connectionSoftware configuration:Launch the serial debugging assistant SSCOM32, choose related COM port, set baud rate as 115200, click to open it.◆Operation and resultThe below information will be printed on the serial debugging assistant: Array2.17. Ucos II◆OverviewUcos ii demo◆Hardware connectionConnect the board to 5V power via 5VDCinterfaceConnect the board to 5V power via 5VDCinterfaceShort the LED jumper◆Operation and resultThe two LED blinking in different frequency.2.18. USART◆OverviewUSART demo◆Hardware connectionConnect the board to 5V power via 5VDC interfaceConnect the board to 5V power via 5VDC interfaceConnect a serial port converter to the onboard USARTX interface (connect to USART1 or USART2 depends on the program)◆Operation and resultThe below information will be printed on the serial debugging assistant:3. Revision historyVersion Description Date AuthorV1.0 Initial revision 2014/05/17 Waveshare team。
51单片机最小系统
51单片机最小系统在单片机系统中，系统上电启动的时候复位一次，当按键按下的时候系统再次复位，如果释放后再按下，系统还会复位。
所以可以通过按键的断开和闭合在运行的系统中控制其复位。
开机的时候为什么为复位？在电路图中，电容的的大小是10uF，电阻的大小是10k。
所以根据公式，可以算出电容充电到电源电压的0.7倍（单片机的电源是5V，所以充电到0.7倍即为3.5V），需要的时间是10K*10UF=0.1S。
也就是说在电脑启动的0.1S内，电容两端的电压时在0~3.5V增加。
这个时候10K电阻两端的电压为从5~1.5V减少（串联电路各处电压之和为总电压）。
所以在0.1S内，RST引脚所接收到的电压是5V~1.5V。
在5V正常工作的51单片机中小于1.5V的电压信号为低电平信号，而大于1.5V的电压信号为高电平信号。
所以在开机0.1S 内，单片机系统自动复位（RST引脚接收到的高电平信号时间为0.1S左右）。
按键按下的时候为什么会复位？在单片机启动0.1S后，电容C两端的电压持续充电为5V，这是时候10K电阻两端的电压接近于0V，RST处于低电平所以系统正常工作。
当按键按下的时候，开关导通，这个时候电容两端形成了一个回路，电容被短路，所以在按键按下的这个过程中，电容开始释放之前充的电量。
随着时间的推移，电容的电压在0.1S内，从5V释放到变为了1.5V，甚至更小。
根据串联电路电压为各处之和，这个时候10K电阻两端的电压为3.5V，甚至更大，所以RST引脚又接收到高电平。
单片机系统自动复位。
总结：1、复位电路的原理是单片机RST引脚接收到2US以上的电平信号，只要保证电容的充放电时间大于2US，即可实现复位，所以电路中的电容值是可以改变的。
2、按键按下系统复位，是电容处于一个短路电路中，释放了所有的电能，电阻两端的电压增加引起的。
51单片机最小系统电路介绍1.51单片机最小系统复位电路的极性电容C1的大小直接影响单片机的复位时间，一般采用10~30uF，51单片机最小系统容值越大需要的复位时间越短。
STM32F103C8T6中文资料_引脚图_最小系统
Contents STM32F103x8,STM32F103xB Contents1Introduction (9)2Description (9)2.1Device overview (10)2.2Full compatibility throughout the family (13)2.3Overview (14)2.3.1ARM®Cortex™-M3core with embedded Flash and SRAM (14)2.3.2Embedded Flash memory (14)2.3.3CRC(cyclic redundancy check)calculation unit (14)2.3.4Embedded SRAM (14)2.3.5Nested vectored interrupt controller(NVIC) (14)2.3.6External interrupt/event controller(EXTI) (15)2.3.7Clocks and startup (15)2.3.8Boot modes (15)2.3.9Power supply schemes (15)2.3.10Power supply supervisor (15)2.3.11Voltage regulator (16)2.3.12Low-power modes (16)2.3.13DMA (17)2.3.14RTC(real-time clock)and backup registers (17)2.3.15Timers and watchdogs (17)2.3.16I²C bus (19)2.3.17Universal synchronous/asynchronous receiver transmitter(USART)..192.3.18Serial peripheral interface(SPI) (19)2.3.19Controller area network(CAN) (19)2.3.20Universal serial bus(USB) (19)2.3.21GPIOs(general-purpose inputs/outputs) (20)2.3.22ADC(analog-to-digital converter) (20)2.3.23T emperature sensor (20)2.3.24Serial wire JTAG debug port(SWJ-DP) (20)3Pinouts and pin description (21)4Memory mapping (34)2/105DocID13587Rev16STM32F103x8,STM32F103xB Contents5Electrical characteristics (35)5.1Parameter conditions (35)5.1.1Minimum and maximum values (35)5.1.2Typical values (35)5.1.3Typical curves (35)5.1.4Loading capacitor (35)5.1.5Pin input voltage (35)5.1.6Power supply scheme (36)5.1.7Current consumption measurement (37)5.2Absolute maximum ratings (37)5.3Operating conditions (38)5.3.1General operating conditions (38)5.3.2Operating conditions at power-up/power-down (39)5.3.3Embedded reset and power control block characteristics (40)5.3.4Embedded reference voltage (41)5.3.5Supply current characteristics (41)5.3.6External clock source characteristics (51)5.3.7Internal clock source characteristics (55)5.3.8PLL characteristics (57)5.3.9Memory characteristics (57)5.3.10EMC characteristics (58)5.3.11Absolute maximum ratings(electrical sensitivity) (60)5.3.12I/O current injection characteristics (61)5.3.13I/O port characteristics (62)5.3.14NRST pin characteristics (68)5.3.15TIM timer characteristics (69)5.3.16Communications interfaces (70)5.3.17CAN(controller area network)interface (75)5.3.1812-bit ADC characteristics (76)5.3.19T emperature sensor characteristics (80)6Package characteristics (81)6.1Package mechanical data (81)6.2Thermal characteristics (93)6.2.1Reference document (93)6.2.2Selecting the product temperature range (94)DocID13587Rev163/105Contents STM32F103x8,STM32F103xB7Ordering information scheme (96)8Revision history (97)4/105DocID13587Rev16STM32F103x8,STM32F103xB List of tables List of tablesT able1.Device summary (1)T able2.STM32F103xx medium-density device features and peripheral counts (10)T able3.STM32F103xx family (13)T able4.Timer feature comparison (17)T able5.Medium-density STM32F103xx pin definitions (28)T able6.Voltage characteristics (37)T able7.Current characteristics (38)T able8.Thermal characteristics (38)T able9.General operating conditions (38)T able10.Operating conditions at power-up/power-down (39)T able11.Embedded reset and power control block characteristics (40)T able12.Embedded internal reference voltage (41)T able13.Maximum current consumption in Run mode,code with data processingrunning from Flash (42)T able14.Maximum current consumption in Run mode,code with data processingrunning from RAM (42)T able15.Maximum current consumption in Sleep mode,code running from Flash or RAM (44)T able16.Typical and maximum current consumptions in Stop and Standby modes (45)T able17.Typical current consumption in Run mode,code with data processingrunning from Flash (48)T able18.Typical current consumption in Sleep mode,code running from Flash orRAM (49)T able19.Peripheral current consumption (50)T able20.High-speed external user clock characteristics (51)T able21.Low-speed external user clock characteristics (51)T able22.HSE4-16MHz oscillator characteristics (53)T able23.LSE oscillator characteristics(f LSE=32.768kHz) (54)T able24.HSI oscillator characteristics (55)T able25.LSI oscillator characteristics (56)T able26.Low-power mode wakeup timings (57)T able27.PLL characteristics (57)T able28.Flash memory characteristics (57)T able29.Flash memory endurance and data retention (58)T able30.EMS characteristics (59)T able31.EMI characteristics (59)T able32.ESD absolute maximum ratings (60)T able33.Electrical sensitivities (60)T able34.I/O current injection susceptibility (61)T able35.I/O static characteristics (62)T able36.Output voltage characteristics (66)T able37.I/O AC characteristics (67)T able38.NRST pin characteristics (68)T able39.TIMx characteristics (69)T able40.I2C characteristics (70)T able41.SCL frequency(f PCLK1=36MHz.,V DD_I2C=3.3V) (71)T able42.SPI characteristics (72)T B startup time (74)T B DC electrical characteristics (75)DocID13587Rev165/105List of tables STM32F103x8,STM32F103xBT B:Full-speed electrical characteristics (75)T able46.ADC characteristics (76)T able47.R AIN max for f ADC=14MHz (77)T able48.ADC accuracy-limited test conditions (77)T able49.ADC accuracy (78)T able50.TS characteristics (80)T able51.VFQFPN366x6mm,0.5mm pitch,package mechanical data (82)T able52.UFQFPN487x7mm,0.5mm pitch,package mechanical data (83)T able53.LFBGA100-10x10mm low profile fine pitch ball grid array packagemechanical data (85)T able54.LQPF100,14x14mm100-pin low-profile quad flat package mechanical data (87)T able55.UFBGA100-ultra fine pitch ball grid array,7x7mm,0.50mm pitch,packagemechanical data (88)T able56.LQFP64,10x10mm,64-pin low-profile quad flat package mechanical data (89)T able57.TFBGA64-8x8active ball array,5x5mm,0.5mm pitch,package mechanical data (90)T able58.LQFP48,7x7mm,48-pin low-profile quad flat package mechanical data (92)T able59.Package thermal characteristics (93)T able60.Ordering information scheme (96)T able61.Document revision history (97)6/105DocID13587Rev16STM32F103x8,STM32F103xB List of figures List of figuresFigure1.STM32F103xx performance line block diagram (11)Figure2.Clock tree (12)Figure3.STM32F103xx performance line LFBGA100ballout (21)Figure4.STM32F103xx performance line LQFP100pinout (22)Figure5.STM32F103xx performance line UFBGA100pinout (23)Figure6.STM32F103xx performance line LQFP64pinout (24)Figure7.STM32F103xx performance line TFBGA64ballout (25)Figure8.STM32F103xx performance line LQFP48pinout (26)Figure9.STM32F103xx performance line UFQFPN48pinout (26)Figure10.STM32F103xx performance line VFQFPN36pinout (27)Figure11.Memory map (34)Figure12.Pin loading conditions (36)Figure13.Pin input voltage (36)Figure14.Power supply scheme (36)Figure15.Current consumption measurement scheme (37)Figure16.Typical current consumption in Run mode versus frequency(at3.6V)-code with data processing running from RAM,peripherals enabled (43)Figure17.Typical current consumption in Run mode versus frequency(at3.6V)-code with data processing running from RAM,peripherals disabled (43)Figure18.Typical current consumption on V BAT with RTC on versus temperature at differentV BAT values (45)Figure19.Typical current consumption in Stop mode with regulator in Run mode versustemperature at V DD=3.3V and3.6V (46)Figure20.Typical current consumption in Stop mode with regulator in Low-power mode versustemperature at V DD=3.3V and3.6V (46)Figure21.Typical current consumption in Standby mode versus temperature atV DD=3.3V and3.6V (47)Figure22.High-speed external clock source AC timing diagram (52)Figure23.Low-speed external clock source AC timing diagram (52)Figure24.Typical application with an8MHz crystal (53)Figure25.Typical application with a32.768kHz crystal (55)Figure26.Standard I/O input characteristics-CMOS port (64)Figure27.Standard I/O input characteristics-TTL port (64)Figure28.5V tolerant I/O input characteristics-CMOS port (65)Figure29.5V tolerant I/O input characteristics-TTL port (65)Figure30.I/O AC characteristics definition (68)Figure31.Recommended NRST pin protection (69)Figure32.I2C bus AC waveforms and measurement circuit (71)Figure33.SPI timing diagram-slave mode and CPHA=0 (73)Figure34.SPI timing diagram-slave mode and CPHA=1(1) (73)Figure35.SPI timing diagram-master mode(1) (74)B timings:definition of data signal rise and fall time (75)Figure37.ADC accuracy characteristics (78)Figure38.Typical connection diagram using the ADC (79)Figure39.Power supply and reference decoupling(V REF+not connected to V DDA) (79)Figure40.Power supply and reference decoupling(V REF+connected to V DDA) (80)Figure41.VFQFPN366x6mm,0.5mm pitch,package outline(1) (82)Figure42.VFQFPN36recommended footprint(dimensions in mm)(1)(2) (82)DocID13587Rev167/105List of figures STM32F103x8,STM32F103xBFigure43.UFQFPN487x7mm,0.5mm pitch,package outline (83)Figure44.UFQFPN48recommended footprint (84)Figure45.LFBGA100-10x10mm low profile fine pitch ball grid array packageoutline (85)Figure46.Recommended PCB design rules(0.80/0.75mm pitch BGA) (86)Figure47.LQFP100,14x14mm100-pin low-profile quad flat package outline (87)Figure48.LQFP100recommended footprint(1) (87)Figure49.UFBGA100-ultra fine pitch ball grid array,7x7mm,0.50mm pitch,package outline (88)Figure50.LQFP64,10x10mm,64-pin low-profile quad flat package outline (89)Figure51.LQFP64recommended footprint(1) (89)Figure52.TFBGA64-8x8active ball array,5x5mm,0.5mm pitch,package outline (90)Figure53.Recommended PCB design rules for pads(0.5mm pitch BGA) (91)Figure54.LQFP48,7x7mm,48-pin low-profile quad flat package outline (92)Figure55.LQFP48recommended footprint(1) (92)Figure56.LQFP100P D max vs.T A (95)8/105DocID13587Rev16STM32F103x8,STM32F103xB Introduction 1IntroductionThis datasheet provides the ordering information and mechanical device characteristics ofthe STM32F103x8and STM32F103xB medium-density performance line microcontrollers.For more details on the whole STMicroelectronics STM32F103xx family,please refer toSection2.2:Full compatibility throughout the family.The medium-density STM32F103xx datasheet should be read in conjunction with the low-,medium-and high-density STM32F10xxx reference manual.The reference and Flash programming manuals are both available from theSTMicroelectronics website .For information on the Cortex™-M3core please refer to the Cortex™-M3T echnicalReference Manual,available from the website at the following address:/help/index.jsp?topic=/com.arm.doc.ddi0337e/2DescriptionThe STM32F103xx medium-density performance line family incorporates the high-performance ARM Cortex™-M332-bit RISC core operating at a72MHz frequency,high-speed embedded memories(Flash memory up to128Kbytes and SRAM up to20Kbytes),and an extensive range of enhanced I/Os and peripherals connected to two APB buses.Alldevices offer two12-bit ADCs,three general purpose16-bit timers plus one PWM timer,aswell as standard and advanced communication interfaces:up to two I2Cs and SPIs,threeUSART s,an USB and a CAN.The devices operate from a2.0to3.6V power supply.They are available in both the–40to+85°C temperature range and the–40to+105°C extended temperature range.Acomprehensive set of power-saving mode allows the design of low-power applications.The STM32F103xx medium-density performance line family includes devices in six differentpackage types:from36pins to100pins.Depending on the device chosen,different sets ofperipherals are included,the description below gives an overview of the complete range ofperipherals proposed in this family.These features make the STM32F103xx medium-density performance line microcontrollerfamily suitable for a wide range of applications such as motor drives,application control,medical and handheld equipment,PC and gaming peripherals,GPS platforms,industrialapplications,PLCs,inverters,printers,scanners,alarm systems,video intercoms,andHVACs.DocID13587Rev169/105TimersCommunicationDescription STM32F103x8,STM32F103xB 2.1Device overviewTable2.STM32F103xx medium-density device features and peripheral1.On the TFBGA64package only15channels are available(one analog input pin has been replaced by‘Vref+’).10/105DocID13587Rev16Peripheral STM32F103Tx STM32F103Cx STM32F103Rx STM32F103Vx Flash-Kbytes64128641286412864128SRAM-Kbytes20202020 General-purpose3333Advanced-control1111SPI12222I C1222USART2333USB1111CAN1111 GPIOs2637518012-bit synchronized ADCNumber of channels210channels210channels2(1)16channels216channels CPU frequency72MHzOperating voltage 2.0to3.6VOperating temperaturesAmbient temperatures:-40to+85°C/-40to+105°C(see Table9)Junction temperature:-40to+125°C(see Table9)Packages VFQFPN36LQFP48,UFQFPN48LQFP64,TFBGA64LQFP100,LFBGA100,UFBGA100f l a s ho b lI n t e r f a c eB u s M a t r i xA HB :F m a x =48/72M H zA PB 2:F m a x =48/72M H zA PB 1:F m a x =24/36M H zpbusPCLK2 HCLK CLOCK RTC AWUTAMPER -RTCSTM32F103x8, STM32F103xBDescriptionFigure 1. STM32F103xx performance line block diagramTRACECLKTRACED[0:3] as ASNJTRSTTRSTJTDIJTCK/SWCLK JTMS/SWDIOJTDO as AFTPIUTrace/trigSW/JTAGCortex -M3 CPUIbusF max : 7 2M Hz DbusTraceControlle rFlash 128 KB64 bitPOWERVOLT. REG. 3.3V TO 1.8V@VDDV DD = 2 to 3.6VV SSNVICSystemSRAM20 KB@VDDGP DMA7 channelsPCLK1 FCLKPLL &MANAGTXTAL OSC4-16 MHzOSC_INOSC_OUTRC 8 MHzNRST @VDDASUPPLYSUPERVISIONRC 40 kHz @VDDA@VBATIWDG Standby interfaceV BATVDDA VSSA 80AF PA[15:0] PB[15:0]POR / PDRPVDEXTIWAKEUPGPIOAGPIOBRstIntAHB2 AHB2APB2 APB1XTAL 32 kHzBackup reg Backu p i nterf ace TIM2 TIM3OSC32_IN OSC32_OUT4 Channels 4 ChannelsPC[15:0]GPIOCTIM 44 ChannelsPD[15:0]GPIOD PE[15:0] GPIOEUSART2USART3RX,TX, CTS, RTS,CK, SmartCard as AFRX,TX, CTS, RTS, CK, SmartCard as AF4 Channels3 compl. ChannelsETR and BKINMOSI,MISO, SCK,NSS as AFRX,TX, CTS, RTS,TIM1SPI12x(8x16bit)SPI2I2C1 I2C2MOSI,MISO,SCK,NSS as AFSCL,SDA,SMBA as AFSCL,SDA as AFSmartCard as AFUSART1@VDDAbxCANUSBDP/CAN_TXUSB 2.0 FSUSBDM/CAN_RX16AF V REF+ V REF -12bit ADC1 IF12bit ADC2 IFSRAM 512BWWDGTemp sensorai14390d1. T A = –40 °C to +105 °C (junction temperature up to 125 °C).2. AF = alternate function on I/O port pin.DocID13587 Rev 1611/105peripheralsIf (APB2 prescaler =1) x1 ADC /2, 4, 6, 8 ADCCLKDescriptionSTM32F103x8, STM32F103xBFigure 2. Clock treeFLITFCLKto Flash programming interface8 MHz HSI RCHSIUSBPrescaler 48 MHzUSBCLKto USB interface/2/1, 1.572 MHz maxClockHCLKto AHB bus, core, memory and DMA PLLSRCSWPLLMUL/8Enable (3 bits)to Cortex System timerFCLK Cortex..., x16 x2, x3, x4 PLLHSIPLLCLK HSESYSCLK72 MHz max AHB Prescaler /1, 2..512 APB1Prescaler/1, 2, 4, 8, 16free running clock36 MHz max PCLK1to APB1Peripheral Clock Enable (13 bits)TIM2,3, 4to TIM2, 3and 4CSSIf (APB1 prescaler =1) x1 TIMXCLKelse x2 Peripheral ClockEnable (3 bits)OSC_OUTOSC_IN4-16 MHzHSE OSCPLLXTPRE/2APB2Prescaler/1, 2, 4, 8, 16TIM1 timer 72 MHz maxPeripheral ClockEnable (11 bits) PCLK2peripherals to APB2to TIM1 TIM1CLK else x2 Peripheral ClockOSC32_INOSC32_OUTLSE OSC32.768 kHz/128LSERTCCLKto RTCPrescaler Enable (1 bit) to ADCRTCSEL[1:0]LSI RCLSIto Independent Watchdog (IWDG)40 kHzIWDGCLKLegend:HSE = high -speed external clock signalHSI = high -speed internal clock signalMCOMainClock Output/2PLLCLKHSI LSI = low -speed internal clock signal LSE = low -speed external clock signalHSESYSCLKMCOai149031. When the HSI is used as a PLL clock input, the maximum system clock frequency that can be achieved is 64 MHz.2. For the USB function to be available, both HSE and PLL must be enabled, with USBCLK running at 48 MHz.3. To have an ADC conversion time of 1 µs, APB2 must be at 14 MHz, 28 MHz or 56 MHz.12/105DocID13587 Rev 16STM32F103x8, STM32F103xBDescription2.2 Full compatibility throughout the familyThe STM32F103xx is a complete family whose members are fully pin -to -pin, software and feature compatible. In the reference manual, the STM32F103x4 and STM32F103x6 are identified as low -density devices, the STM32F103x8 and STM32F103xB are referred to as medium -density devices, and the STM32F103xC, STM32F103xD and STM32F103xE are referred to as high -density devices.Low - and high -density devices are an extension of the STM32F103x8/B devices, they are specified in the STM32F103x4/6 and STM32F103xC/D/E datasheets, respectively. Low - density devices feature lower Flash memory and RAM capacities, less timers and peripherals. High -density devices have higher Flash memory and RAM capacities, and additional peripherals like SDIO, FSMC, I 2S and DAC, while remaining fully compatible with the other members of the STM32F103xx family .The STM32F103x4, STM32F103x6, STM32F103xC, STM32F103xD and STM32F103xE are a drop -in replacement for STM32F103x8/B medium -density devices, allowing the user to try different memory densities and providing a greater degree of freedom during the development cycle.Moreover, the STM32F103xx performance line family is fully compatible with all existing STM32F101xx access line and STM32F102xx USB access line devices.1.For orderable part numbers that do not show the A internal code after the temperature range code (6 or 7),the reference datasheet for electrical characteristics is that of the STM32F103x8/B medium -density devices.DocID13587 Rev 16 13/105PinoutLow -density devicesMedium -density devices High -density devices 16 KB Flash 32 KB Flash (1) 64 KB Flash 128 KB Flash 256 KB Flash 384 KB Flash 512 KB Flash6 KB RAM 10 KB RAM 20 KB RAM 20 KB RAM 48 KB RAM 64 KB RAM 64 KB RAM144 5 × USART s 4 × 16-bit timers, 2 × basic timers2 3 × SPIs, 2 × I Ss, 2 × I2Cs USB, CAN, 2 × PWM timers 3 × ADCs, 2 × DACs, 1 × SDIOFSMC (100 and 144 pins) 100 3 × USART s 3 × 16-bit timers 2 2 × SPIs, 2 × I Cs, USB, CAN, 1 × PWM timer2 × ADCs 64 2 × USART s 2 × 16-bit timers 2 1 × SPI, 1 × I C, USB, CAN, 1 × PWM timer 2 × ADCs 48 36Description STM32F103x8,STM32F103xB 2.3Overview2.3.1ARM®Cortex™-M3core with embedded Flash and SRAMThe ARM Cortex™-M3processor is the latest generation of ARM processors for embeddedsystems.It has been developed to provide a low-cost platform that meets the needs of MCUimplementation,with a reduced pin count and low-power consumption,while deliveringoutstanding computational performance and an advanced system response to interrupts.The ARM Cortex™-M332-bit RISC processor features exceptional code-efficiency,delivering the high-performance expected from an ARM core in the memory size usuallyassociated with8-and16-bit devices.The STM32F103xx performance line family having an embedded ARM core,is thereforecompatible with all ARM tools and software.Figure1shows the general block diagram of the device family.2.3.2Embedded Flash memory64or128Kbytes of embedded Flash is available for storing programs and data.2.3.3CRC(cyclic redundancy check)calculation unitThe CRC(cyclic redundancy check)calculation unit is used to get a CRC code from a32-bitdata word and a fixed generator polynomial.Among other applications,CRC-based techniques are used to verify data transmission orstorage integrity.In the scope of the EN/IEC60335-1standard,they offer a means ofverifying the Flash memory integrity.The CRC calculation unit helps compute a signature ofthe software during runtime,to be compared with a reference signature generated at link-time and stored at a given memory location.2.3.4Embedded SRAMTwenty Kbytes of embedded SRAM accessed(read/write)at CPU clock speed with0waitstates.2.3.5Nested vectored interrupt controller(NVIC)The STM32F103xx performance line embeds a nested vectored interrupt controller able tohandle up to43maskable interrupt channels(not including the16interrupt lines ofCortex™-M3)and16priority levels.•Closely coupled NVIC gives low-latency interrupt processing•Interrupt entry vector table address passed directly to the core•Closely coupled NVIC core interface•Allows early processing of interrupts•Processing of late arriving higher priority interrupts•Support for tail-chaining•Processor state automatically saved•Interrupt entry restored on interrupt exit with no instruction overhead14/105DocID13587Rev16万联芯城专注电子元器件配单服务，只售原装现货库存，万联芯城电子元器件全国供应，专为终端生产，研发企业提供现货物料，价格优势明显，BOM配单采购可节省逐个搜索购买环节，只需提交BOM物料清单，商城即可为您报价，解决客户采购烦恼，为客户节省采购成本，点击进入万联芯城。
STM32单片机最小系统详解
STM32单片机最小系统详解STM32F103RCT6：STM32F103RCT6是一种嵌入式-微控制器的集成电路(IC)，32位Cortex-M3内核处理器，速度是72MHz，程序存储器容量是256KB，程序存储器类型是FLASH，RAM容量是48K，封装LQFP64。
STM32单片机命名规则：STM32单片机最小系统：所谓单片机最小系统，就是让单片机能够正常运行，最少且必须的器件所组成的系统。
单片机最小系统上电之后，单片机可以正常复位，下载程序，除此之外没有其他任何功能。
在最小系统保证正确的基础上，可以依次添加其他功能模块或器件，使之单片机具有实际功能。
STM32单片机最小系统包括一个复位电路和一个时钟电路。
如下图1所示。
图中复位电路使用的是上电复位电路，STM32单片机NRST引脚输入低电平，则发生复位。
图1 STM32F103单片机最小系统电源引脚：VDD是单片机的数字电源正极，VSS是数字电源负极，共有5个VDD引脚，5个VSS引脚。
VDDA是单片机的模拟电源正极，负责给内部的ADC、DAC模块供电，VSSA是模拟电源负极。
还有一个电源引脚，就是VBAT，BAT就是Battery（电池），这个引脚用来连接电池的正极的。
STM32带RTC功能（实时时钟），所以有VBAT引脚。
原理图上预留了一个CR1220纽扣锂电池，当主电源供电存在的情况下，由系统中的VCC3.3给VBAT供电；当主电源断电之后，由CR1220纽扣电池给STM32自带的RTC模块供电，从而能够保证实时时钟模块在主电源掉电的情况下还能够正常工作。
但是这样设计的话，这里有一个矛盾需要解决。
如果VBAT引脚直接与VCC3.3和CR1220连接的话，会存在下面问题：1、当电池电压高于3.3V，电池就会输出电流到AMS1117，使得芯片发烫，还会很快消耗电池电量。
2、如果电池电压低于3.3V，AMS1117产生的3.3V，就会给电池充电，而这种CR1220电池是不能够充电的。
单片机最小系统介绍及电路设计
一.什么是单片机最小系统常见的单片机最小系统为单片机能独立运行程序及控制外围电路的最简单电路，主要由单片机、晶振电路、复位电路三部分构成。
Stm32f103c8t6也不例外，构成最小的运行电路也需要以上三部分。
Stm32f103最小系统板原理图如下：二.最小系统电路Stm32单片机最小系统电路有单片机、晶振电路、复位电路。
1. 单片机Stm32f103系列单片机主要资源如图：Stm32f103c8t6工作电压为2-3.6V(一般采用3.3V)，内置64-128KBytes Flash，20KBytesSRAM，带有37个通用GPIO口(含特殊功能IO)。
在最小系统板上主要连接晶振电路、复位电路、工作电源、以及配置BOOT启动方式。
BOOT启动方式主要有三种，主闪存存储器启动、系统存储器启动、内置SRAM 启动，对应的BOOT引脚状态如下图：最常用的模式为主闪存存储器启动，即内部Flash启动，BOOT1=0，BOOT1=x(x 表示0或1均可)。
(注意三种模式的对应启动地址均不一样，内部Flash启动的地址为0x0800000)2. 晶振电路(1)主时钟晶振Stm32单片机内部自带一个8MHz的RC时钟，在符合设计需求的情况下，可通过程序在初始化时钟函数内，选择采用内部时钟。
外部主时钟晶振主要作为供单片机内核的时钟源，官方推荐晶振电路主要参数如下：Stm32单片机外部晶振为4-16MHz，常用8MHz，电路图如下：(2)RTC时钟晶振同样，RTC时钟在符合设计需求的情况下，可选用内部自带的40kHz RTC时钟。
外部晶振32.768KHz主要作为单片机内部RTC时钟的时钟源，电路图如下：3. 复位电路复位电路由RC电路及按键构成，10k电阻及1uF电容组成的RC电路;stm32单片机复位引脚为低电平有效，复位电路的作用是使单片机复位引脚在上电时，确保复位引脚至少有1ms以上的低电平状态。
复位按键的作用是当按键按下，复位引脚的被拉至低电平，单片机触发复位。
STM32--数码管显示使用
STM32--数码管显⽰使⽤STM32 – 数码管显⽰简介1.硬件部分STM32F103C8T6 最⼩系统板 ⼀位共阴数码管2.软件部分Keil软件编程 数码管码表硬件部分数码管简介数码管，也称作辉光管，是⼀种可以显⽰数字和其他信息的电⼦设备。
玻璃管中包括⼀个⾦属丝⽹制成的阳极和多个阴极。
⼤部分数码管阴极的形状为数字。
管中充以低压⽓体，通常⼤部分为氖加上⼀些汞和/或氩。
给某⼀个阴极充电，数码管就会发出颜⾊光，视乎管内的⽓体⽽定，⼀般都是橙⾊或绿⾊。
分类数码管也称LED数码管，不同⾏业⼈⼠对数码管的称呼不⼀样，其实都是同样的产品。
按发光⼆极管单元连接⽅式可分为共阳极数码管和共阴极数码管。
共阳数码管是指将所有发光⼆极管的阳极接到⼀起形成公共阳极(COM)的数码管，共阳数码管在应⽤时应将公共极COM接到+5V，当某⼀字段发光⼆极管的阴极为低电平时，相应字段就点亮，当某⼀字段的阴极为⾼电平时，相应字段就不亮。
共阴数码管是指将所有发光⼆极管的阴极接到⼀起形成公共阴极(COM)的数码管，共阴数码管在应⽤时应将公共极COM接到地线GND上，当某⼀字段发光⼆极管的阳极为⾼电平时，相应字段就点亮，当某⼀字段的阳极为低电平时，相应字段就不亮。
1.共阳数码管共阳数码管在应⽤时应将公共极COM接到+5V，当某⼀字段发光⼆极管的阴极为低电平时，相应字段就点亮，当某⼀字段的阴极为⾼电平时，相应字段就不亮。
2.共阴数码管对于共阴极数码管来说，当某个发光⼆极管的阳极为⾼电平时，发光⼆极管点亮，相应的段被显⽰。
同样，共阳极数码管的阳极连接在⼀起，公共阳极接+5V，当某个发光⼆极管的阴极接低电平时，该发光⼆极管被点亮，相应的段被显⽰数码管码表unsigned char code smgduan[17] ={0xc0, 0xf9, 0xa4, 0xb0, 0x99, 0x92, 0x82, 0xf8,0x80, 0x90, 0x88, 0x83, 0xc6, 0xa1, 0x86, 0x8e};//共阳数码管unsigned char code smgduan[17]={0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7d,0x07,0x7f,0x6f,0x77,0x7c,0x39,0x5e,0x79,0x71};共阴数码管静态数码管硬件电路设计实物软件部分/*********************************************************************** ⽂件名：smg.c* 描述：smg 应⽤函数库* 硬件连接：-----------------* | PA0 - A |* | PA1 - B |* | PA2 - C |* | PA3 - D |* | PA4 - E |* | PA5 - F |* | PA6 - G |* | PA7 - DP |* -----------------*********************************************************************/#include "smg.h"#include "delay.h"//共阳数码管断码表u8 const smg_data[]={0xc0,0xf9,0xa4,0xb0,0x99,0x92,0x82,0xf8,0x80,0x90,0x88,0x83,0xc6,0xa1,0x86,0x8e};/** 函数名：SMG_GPIO_Config* 描述：配置数码管⽤到的I/O⼝* 输⼊：⽆* 输出：⽆*/void SMG_GPIO_Config(void){GPIO_InitTypeDef GPIO_InitStructure;RCC_APB2PeriphClockCmd( RCC_APB2Periph_GPIOA, ENABLE);GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;GPIO_Init(GPIOA, &GPIO_InitStructure);GPIO_SetBits(GPIOA, GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7); // turn o ff all led}/** 函数名：SMG_Display* 描述：驱动数码管显⽰0-F* 输⼊：⽆* 输出：⽆*/void SMG_Display(void){u8 i;for(i=0;i<16;i++){GPIO_Write(GPIOA,smg_data[i]);delay_ms(1000);}}void Display_N(u8 N){GPIO_Write(GPIOA,smg_data[N]);}smg.h#ifndef __SMG_H#define __SMG_H#include "stm32f10x.h"void SMG_GPIO_Config(void);void SMG_Display(void);void Display_N(u8 N);#endif /* __SMG_H */数码管案例（基于51单⽚机四位数码管模块（74HC595））14脚：DS（SER），串⾏数据输⼊引脚13脚：OE， 输出使能控制脚，它是低电才使能输出，所以接GND12脚：RCK，存储寄存器时钟输⼊引脚。
STM32F103C8T6中文资料_引脚图_最小系统
STM32F103C8T6中⽂资料_引脚图_最⼩系统Contents STM32F103x8,STM32F103xB Contents1Introduction (9)2Description (9)2.1Device overview (10)2.2Full compatibility throughout the family (13)2.3Overview (14)2.3.1ARM?Cortex?-M3core with embedded Flash and SRAM (14)2.3.2Embedded Flash memory (14)2.3.3CRC(cyclic redundancy check)calculation unit (14)2.3.4Embedded SRAM (14)2.3.5Nested vectored interrupt controller(NVIC) (14)2.3.6External interrupt/event controller(EXTI) (15)2.3.7Clocks and startup (15)2.3.8Boot modes (15)2.3.9Power supply schemes (15)2.3.10Power supply supervisor (15)2.3.11Voltage regulator (16)2.3.12Low-power modes (16)2.3.13DMA (17)2.3.14RTC(real-time clock)and backup registers (17)2.3.15Timers and watchdogs (17)2.3.16I2C bus (19)2.3.17Universal synchronous/asynchronous receiver transmitter(USART)..192.3.18Serial peripheral interface(SPI) (19)2.3.19Controller area network(CAN) (19)2.3.20Universal serial bus(USB) (19)2.3.21GPIOs(general-purpose inputs/outputs) (20)2.3.22ADC(analog-to-digital converter) (20)2.3.23T emperature sensor (20)2.3.24Serial wire JTAG debug port(SWJ-DP) (20)3Pinouts and pin description (21)4Memory mapping (34)2/105DocID13587Rev16STM32F103x8,STM32F103xB Contents5Electrical characteristics (35)5.1Parameter conditions (35)5.1.1Minimum and maximum values (35)5.1.2Typical values (35)5.1.3Typical curves (35)5.1.4Loading capacitor (35)5.1.5Pin input voltage (35)5.1.6Power supply scheme (36)5.1.7Current consumption measurement (37)5.2Absolute maximum ratings (37)5.3Operating conditions (38)5.3.1General operating conditions (38)5.3.2Operating conditions at power-up/power-down (39)5.3.3Embedded reset and power control block characteristics (40) 5.3.4Embedded reference voltage (41)5.3.5Supply current characteristics (41)5.3.6External clock source characteristics (51)5.3.7Internal clock source characteristics (55)5.3.8PLL characteristics (57)5.3.9Memory characteristics (57)5.3.10EMC characteristics (58)5.3.11Absolute maximum ratings(electrical sensitivity) (60)5.3.12I/O current injection characteristics (61)5.3.13I/O port characteristics (62)5.3.14NRST pin characteristics (68)5.3.15TIM timer characteristics (69)5.3.16Communications interfaces (70)5.3.17CAN(controller area network)interface (75)5.3.1812-bit ADC characteristics (76)5.3.19T emperature sensor characteristics (80)6Package characteristics (81)6.1Package mechanical data (81)6.2Thermal characteristics (93)6.2.1Reference document (93)6.2.2Selecting the product temperature range (94)DocID13587Rev163/105Contents STM32F103x8,STM32F103xB7Ordering information scheme (96)8Revision history (97)4/105DocID13587Rev16STM32F103x8,STM32F103xB List of tables List of tablesT able1.Device summary (1)T able2.STM32F103xx medium-density device features and peripheral counts (10)T able3.STM32F103xx family (13)T able4.Timer feature comparison (17)T able5.Medium-density STM32F103xx pin definitions (28)T able6.Voltage characteristics (37)T able7.Current characteristics (38)T able8.Thermal characteristics (38)T able9.General operating conditions (38)T able10.Operating conditions at power-up/power-down (39)T able11.Embedded reset and power control block characteristics (40)T able12.Embedded internal reference voltage (41)T able13.Maximum current consumption in Run mode,code with data processingrunning from Flash (42)T able14.Maximum current consumption in Run mode,code with data processingrunning from RAM (42)T able15.Maximum current consumption in Sleep mode,code running from Flash or RAM (44) T able16.Typical and maximum current consumptions in Stop and Standby modes (45)T able17.Typical current consumption in Run mode,code with data processingrunning from Flash (48)T able18.Typical current consumption in Sleep mode,code running from Flash orRAM (49)T able19.Peripheral current consumption (50)T able20.High-speed external user clock characteristics (51)T able21.Low-speed external user clock characteristics (51)T able22.HSE4-16MHz oscillator characteristics (53)T able23.LSE oscillator characteristics(f LSE=32.768kHz) (54)T able24.HSI oscillator characteristics (55)T able25.LSI oscillator characteristics (56)T able26.Low-power mode wakeup timings (57)T able27.PLL characteristics (57)T able28.Flash memory characteristics (57)T able29.Flash memory endurance and data retention (58)T able30.EMS characteristics (59)T able31.EMI characteristics (59)T able32.ESD absolute maximum ratings (60)T able33.Electrical sensitivities (60)T able34.I/O current injection susceptibility (61)T able35.I/O static characteristics (62)T able36.Output voltage characteristics (66)T able37.I/O AC characteristics (67)T able38.NRST pin characteristics (68)T able39.TIMx characteristics (69)T able40.I2C characteristics (70)T able41.SCL frequency(f PCLK1=36MHz.,V DD_I2C=3.3V) (71)T able42.SPI characteristics (72)T /doc/730a8438ac51f01dc281e53a580216fc710a531c.html B startup time (74)T /doc/730a8438ac51f01dc281e53a580216fc710a531c.html B DC electrical characteristics (75) DocID13587Rev165/105List of tables STM32F103x8,STM32F103xBT /doc/730a8438ac51f01dc281e53a580216fc710a531c.html B:Full-speed electrical characteristics (75) T able46.ADC characteristics (76)T able47.R AIN max for f ADC=14MHz (77)T able48.ADC accuracy-limited test conditions (77)T able49.ADC accuracy (78)T able50.TS characteristics (80)T able51.VFQFPN366x6mm,0.5mm pitch,package mechanical data (82)T able52.UFQFPN487x7mm,0.5mm pitch,package mechanical data (83)T able53.LFBGA100-10x10mm low profile fine pitch ball grid array packagemechanical data (85)T able54.LQPF100,14x14mm100-pin low-profile quad flat package mechanical data (87)T able55.UFBGA100-ultra fine pitch ball grid array,7x7mm,0.50mm pitch,packagemechanical data (88)T able56.LQFP64,10x10mm,64-pin low-profile quad flat package mechanical data (89)T able57.TFBGA64-8x8active ball array,5x5mm,0.5mm pitch,package mechanical data (90) T able58.LQFP48,7x7mm,48-pin low-profile quad flat package mechanical data (92)T able59.Package thermal characteristics (93)T able60.Ordering information scheme (96)T able61.Document revision history (97)6/105DocID13587Rev16STM32F103x8,STM32F103xB List of figures List of figuresFigure1.STM32F103xx performance line block diagram (11)Figure2.Clock tree (12)Figure3.STM32F103xx performance line LFBGA100ballout (21)Figure4.STM32F103xx performance line LQFP100pinout (22)Figure5.STM32F103xx performance line UFBGA100pinout (23)Figure6.STM32F103xx performance line LQFP64pinout (24)Figure7.STM32F103xx performance line TFBGA64ballout (25)Figure8.STM32F103xx performance line LQFP48pinout (26)Figure9.STM32F103xx performance line UFQFPN48pinout (26)Figure10.STM32F103xx performance line VFQFPN36pinout (27)Figure11.Memory map (34)Figure12.Pin loading conditions (36)Figure13.Pin input voltage (36)Figure14.Power supply scheme (36)Figure15.Current consumption measurement scheme (37)Figure16.Typical current consumption in Run mode versus frequency(at3.6V)-code with data processing running from RAM,peripherals enabled (43)Figure17.Typical current consumption in Run mode versus frequency(at3.6V)-code with data processing running from RAM,peripherals disabled (43)Figure18.Typical current consumption on V BAT with RTC on versus temperature at different V BAT values (45)Figure19.Typical current consumption in Stop mode with regulator in Run mode versus temperature at V DD=3.3V and3.6V (46)Figure20.Typical current consumption in Stop mode with regulator in Low-power mode versus temperature at V DD=3.3V and3.6V (46)Figure21.Typical current consumption in Standby mode versus temperature atV DD=3.3V and3.6V (47)Figure22.High-speed external clock source AC timing diagram (52)Figure23.Low-speed external clock source AC timing diagram (52)Figure24.Typical application with an8MHz crystal (53)Figure25.Typical application with a32.768kHz crystal (55)Figure26.Standard I/O input characteristics-CMOS port (64)Figure27.Standard I/O input characteristics-TTL port (64)Figure28.5V tolerant I/O input characteristics-CMOS port (65)Figure29.5V tolerant I/O input characteristics-TTL port (65)Figure30.I/O AC characteristics definition (68)Figure31.Recommended NRST pin protection (69)Figure32.I2C bus AC waveforms and measurement circuit (71)Figure33.SPI timing diagram-slave mode and CPHA=0 (73)Figure34.SPI timing diagram-slave mode and CPHA=1(1) (73)Figure35.SPI timing diagram-master mode(1) (74)/doc/730a8438ac51f01dc281e53a580216fc710a531c.html B timings:definition of data signal rise and fall time (75)Figure37.ADC accuracy characteristics (78)Figure38.Typical connection diagram using the ADC (79)Figure39.Power supply and reference decoupling(V REF+not connected to V DDA) (79)Figure40.Power supply and reference decoupling(V REF+connected to V DDA) (80)Figure41.VFQFPN366x6mm,0.5mm pitch,package outline(1) (82)Figure42.VFQFPN36recommended footprint(dimensions in mm)(1)(2) (82)DocID13587Rev167/105List of figures STM32F103x8,STM32F103xBFigure43.UFQFPN487x7mm,0.5mm pitch,package outline (83)Figure44.UFQFPN48recommended footprint (84)Figure45.LFBGA100-10x10mm low profile fine pitch ball grid array packageoutline (85)Figure46.Recommended PCB design rules(0.80/0.75mm pitch BGA) (86)Figure47.LQFP100,14x14mm100-pin low-profile quad flat package outline (87)Figure48.LQFP100recommended footprint(1) (87)Figure49.UFBGA100-ultra fine pitch ball grid array,7x7mm,0.50mm pitch,package outline (88)Figure50.LQFP64,10x10mm,64-pin low-profile quad flat package outline (89)Figure51.LQFP64recommended footprint(1) (89)Figure52.TFBGA64-8x8active ball array,5x5mm,0.5mm pitch,package outline (90)Figure53.Recommended PCB design rules for pads(0.5mm pitch BGA) (91)Figure54.LQFP48,7x7mm,48-pin low-profile quad flat package outline (92)Figure55.LQFP48recommended footprint(1) (92)Figure56.LQFP100P D max vs.T A (95)8/105DocID13587Rev16STM32F103x8,STM32F103xB Introduction 1IntroductionThis datasheet provides the ordering information and mechanical device characteristics ofthe STM32F103x8and STM32F103xB medium-density performance line microcontrollers.For more details on the whole STMicroelectronics STM32F103xx family,please refer toSection2.2:Full compatibility throughout the family.The medium-density STM32F103xx datasheet should be read in conjunction with the low-,medium-and high-density STM32F10xxx reference manual.The reference and Flash programming manuals are both available from theSTMicroelectronics website /doc/730a8438ac51f01dc281e53a580216fc710a531c.html .For information on the Cortex?-M3core please refer to the Cortex?-M3T echnicalReference Manual,available from the /doc/730a8438ac51f01dc281e53a580216fc710a531c.html website at the following address:/doc/730a8438ac51f01dc281e53a580216fc710a531c.html /help/index.jsp?topic=/com.arm.doc.ddi0337e/2DescriptionThe STM32F103xx medium-density performance line family incorporates the high-performance ARM Cortex?-M332-bit RISC core operating at a72MHz frequency,high-speed embedded memories(Flash memory up to128Kbytes and SRAM up to20Kbytes),and an extensive range of enhanced I/Os and peripherals connected to two APB buses.Alldevices offer two12-bit ADCs,three general purpose16-bit timers plus one PWM timer,aswell as standard and advanced communication interfaces:up to two I2Cs and SPIs,threeUSART s,an USB and a CAN.The devices operate from a2.0to3.6V power supply.They are available in both the–40to+85°C temperature range and the–40to+105°C extended temperature range.Acomprehensive set of power-saving mode allows the design of low-power applications.The STM32F103xx medium-density performance line family includes devices in six differentpackage types:from36pins to100pins.Depending on the device chosen,different sets ofperipherals are included,the description below gives an overview of the complete range ofperipherals proposed in this family.These features make the STM32F103xx medium-density performance line microcontrollerfamily suitable for a wide range of applications such as motor drives,application control,medical and handheld equipment,PC and gaming peripherals,GPS platforms,industrialapplications,PLCs,inverters,printers,scanners,alarm systems,video intercoms,and HVACs.DocID13587Rev169/105TimersCommunicationDescription STM32F103x8,STM32F103xB 2.1Device overviewTable2.STM32F103xx medium-density device features and peripheral1.On the TFBGA64package only15channels are available(one analog input pin has been replaced by‘Vref+’).10/105DocID13587Rev16Peripheral STM32F103Tx STM32F103Cx STM32F103Rx STM32F103Vx Flash-Kbytes64128641286412864128 SRAM-Kbytes20202020 General-purpose3333Advanced-control1111SPI12222I C1222USART2333USB1111CAN1111 GPIOs2637518012-bit synchronized ADCNumber of channels210channels210channels2(1)16channels216channels CPU frequency72MHzOperating voltage 2.0to3.6VOperating temperaturesAmbient temperatures:-40to+85°C/-40to+105°C(see Table9)Junction temperature:-40to+125°C(see Table9)Packages VFQFPN36LQFP48,UFQFPN48LQFP64,TFBGA64LQFP100,LFBGA100,UFBGA100f l a s ho b lI n t e r f a c eB u s M a t r i xA HB :F m a x =48/72M H zA PB 2:F m a x =48/72M H zA PB 1:F m a x =24/36M H zpbusPCLK2 HCLK CLOCK RTC AWUTAMPER -RTCSTM32F103x8, STM32F103xBDescriptionFigure 1. STM32F103xx performance line block diagram TRACECLKTRACED[0:3] as ASNJTRSTTRSTJTDIJTCK/SWCLK JTMS/SWDIOJTDO as AFTPIUTrace/trigSW/JTAGCortex -M3 CPUIbusF max : 7 2M Hz DbusTraceControlle rFlash 128 KB64 bitPOWERVOLT. REG. 3.3V TO 1.8V@VDDV DD = 2 to 3.6VV SSNVICSystemSRAM20 KB@VDDGP DMA7 channelsPCLK1 FCLKPLL &MANAGTXTAL OSC4-16 MHzOSC_INOSC_OUTRC 8 MHzNRST @VDDASUPPLYSUPERVISIONRC 40 kHz @VDDA@VBATIWDG Standby interfaceV BATVDDA VSSA 80AF PA[15:0] PB[15:0] POR / PDRPVDEXTIWAKEUPGPIOAGPIOBRstIntAHB2 AHB2APB2 APB1XTAL 32 kHzBackup reg Backu p i nterf ace TIM2 TIM3 OSC32_IN OSC32_OUT4 Channels 4 ChannelsPC[15:0]GPIOCTIM 44 ChannelsPD[15:0]GPIOD PE[15:0] GPIOEUSART2USART3RX,TX, CTS, RTS,CK, SmartCard as AFRX,TX, CTS, RTS, CK, SmartCard as AF 4 Channels3 compl. ChannelsETR and BKINMOSI,MISO, SCK,NSS as AFRX,TX, CTS, RTS,TIM1SPI12x(8x16bit)SPI2I2C1 I2C2MOSI,MISO,SCK,NSS as AFSCL,SDA,SMBA as AFSCL,SDA as AFSmartCard as AFUSART1@VDDAbxCANUSBDP/CAN_TXUSB 2.0 FSUSBDM/CAN_RX16AF V REF+ V REF -12bit ADC1 IF12bit ADC2 IFSRAM 512BWWDGTemp sensorai14390d1. T A = –40 °C to +105 °C (junction temperature up to 125 °C).2. AF = alternate function on I/O port pin.DocID13587 Rev 1611/105peripheralsIf (APB2 prescaler =1) x1 ADC /2, 4, 6, 8 ADCCLK DescriptionSTM32F103x8, STM32F103xBFigure 2. Clock treeFLITFCLKto Flash programming interface8 MHz HSI RCHSIUSBPrescaler 48 MHzUSBCLKto USB interface/2/1, 1.572 MHz maxClockHCLKto AHB bus, core, memory and DMA PLLSRCSWPLLMUL/8Enable (3 bits)to Cortex System timer..., x16 x2, x3, x4 PLLHSIPLLCLK HSESYSCLK72 MHz max AHB Prescaler /1, 2..512 APB1 Prescaler/1, 2, 4, 8, 16free running clock36 MHz max PCLK1to APB1Peripheral Clock Enable (13 bits)TIM2,3, 4to TIM2, 3and 4CSSIf (APB1 prescaler =1) x1 TIMXCLKelse x2 Peripheral ClockEnable (3 bits)OSC_OUTOSC_IN4-16 MHzHSE OSCPLLXTPRE/2APB2Prescaler/1, 2, 4, 8, 16TIM1 timer 72 MHz maxPeripheral ClockEnable (11 bits) PCLK2peripherals to APB2to TIM1 TIM1CLK else x2 Peripheral Clock OSC32_INOSC32_OUT32.768 kHz/128LSERTCCLKto RTCPrescaler Enable (1 bit) to ADCRTCSEL[1:0]LSI RCLSIto Independent Watchdog (IWDG)40 kHzIWDGCLKLegend:HSE = high -speed external clock signalHSI = high -speed internal clock signalMCOMainClock Output/2PLLCLKHSI LSI = low -speed internal clock signal LSE = low -speed external clock signalHSESYSCLKMCOai149031. When the HSI is used as a PLL clock input, the maximum system clock frequency that can be achieved is 64 MHz.2. For the USB function to be available, both HSE and PLL must be enabled, with USBCLK running at 48 MHz.3. To have an ADC conversion time of 1 µs, APB2 must be at 14 MHz, 28 MHz or 56 MHz.12/105DocID13587 Rev 16STM32F103x8, STM32F103xBDescription2.2 Full compatibility throughout the familyThe STM32F103xx is a complete family whose members are fully pin -to -pin, software and feature compatible. In the reference manual, the STM32F103x4 and STM32F103x6 are identified as low -density devices, the STM32F103x8 andSTM32F103xB are referred to as medium -density devices, and the STM32F103xC, STM32F103xD and STM32F103xE are referred to as high -density devices.Low - and high -density devices are an extension of the STM32F103x8/B devices, they are specified in the STM32F103x4/6 and STM32F103xC/D/E datasheets, respectively. Low - density devices feature lower Flash memory and RAM capacities, less timers and peripherals. High -density devices have higher Flash memory and RAM capacities, and additional peripherals like SDIO, FSMC, I 2S and DAC, while remaining fully compatible with the other members of the STM32F103xx family .The STM32F103x4, STM32F103x6, STM32F103xC, STM32F103xD and STM32F103xE are a drop -in replacement for STM32F103x8/B medium -density devices, allowing the user to try different memory densities and providing a greater degree of freedom during the development cycle.Moreover, the STM32F103xx performance line family is fully compatible with all existing STM32F101xx access line and STM32F102xx USB access line devices.1.For orderable part numbers that do not show the A internal code after the temperature range code (6 or 7),the reference datasheet for electrical characteristics is that of the STM32F103x8/B medium -density devices.DocID13587 Rev 16 13/105PinoutLow -density devicesMedium -density devices High -density devices 16 KB Flash 32 KB Flash (1) 64 KB Flash 128 KB Flash 256 KB Flash 384 KB Flash 512 KB Flash6 KB RAM 10 KB RAM 20 KB RAM 20 KB RAM 48 KB RAM 64 KB RAM 64 KB RAM144 5 × USART s 4 × 16-bit timers, 2 × basic timers2 3 × SPIs, 2 × I Ss, 2 × I2Cs USB, CAN, 2 × PWM timers 3 × ADCs, 2 × DACs, 1 × SDIOFSMC (100 and 144 pins) 100 3 × USART s 3 × 16-bit timers 2 2 × SPIs, 2 × I Cs, USB, CAN, 1 × PWM timer2 × ADCs 64 2 × USART s 2 × 16-bit timers 2 1 × SPI, 1 × I C, USB, CAN, 1 × PWM timer 2 × ADCs 48 36Description STM32F103x8,STM32F103xB 2.3Overview2.3.1ARM?Cortex?-M3core with embedded Flash and SRAMThe ARM Cortex?-M3processor is the latest generation of ARM processors for embeddedsystems.It has been developed to provide a low-cost platform that meets the needs of MCUimplementation,with a reduced pin count and low-power consumption,while deliveringoutstanding computational performance and an advanced system response to interrupts.The ARM Cortex?-M332-bit RISC processor features exceptional code-efficiency,delivering the high-performance expected from an ARM core in the memory size usuallyassociated with8-and16-bit devices.The STM32F103xx performance line family having an embedded ARM core,is thereforecompatible with all ARM tools and software.Figure1shows the general block diagram of the device family.2.3.2Embedded Flash memory64or128Kbytes of embedded Flash is available for storing programs and data.2.3.3CRC(cyclic redundancy check)calculation unitThe CRC(cyclic redundancy check)calculation unit is used to get a CRC code from a32-bitdata word and a fixed generator polynomial.Among other applications,CRC-based techniques are used to verify data transmission orstorage integrity.In the scope of the EN/IEC60335-1standard,they offer a means ofverifying the Flash memory integrity.The CRC calculation unit helps compute a signature ofthe software during runtime,to be compared with a reference signature generated at link-time and stored at a given memory location.2.3.4Embedded SRAMTwenty Kbytes of embedded SRAM accessed(read/write)at CPU clock speed with0waitstates.2.3.5Nested vectored interrupt controller(NVIC)The STM32F103xx performance line embeds a nested vectored interrupt controller able tohandle up to43maskable interrupt channels(not including the16interrupt lines ofCortex?-M3)and16priority levels.Closely coupled NVIC gives low-latency interrupt processingInterrupt entry vector table address passed directly to the coreClosely coupled NVIC core interfaceAllows early processing of interruptsProcessing of late arriving higher priority interruptsSupport for tail-chainingProcessor state automatically savedInterrupt entry restored on interrupt exit with no instruction overhead14/105DocID13587Rev16万联芯城专注电⼦元器件配单服务，只售原装现货库存，万联芯城电⼦元器件全国供应，专为终端⽣产，研发企业提供现货物料，价格优势明显，BOM配单采购可节省逐个搜索购买环节，只需提交BOM物料清单，商城即可为您报价，解决客户采购烦恼，为客户节省采购成本，点击进⼊万联芯城。
STM32最小系统硬件组成详解
STM32最小系统硬件组成详解0组成：电源复位时钟调试接口启动1、电源：一般3.3V LDO供电加多个0.01uf去耦电容2、复位：有三种复位方式：上电复位、手动复位、程序自动复位通常低电平复位：（51单片机高电平复位，电容电阻位置调换）上电复位，在上电瞬间，电容充电，RESET出现短暂的低电平，该低电平持续时间由电阻和电容共同决定，计算方式如下：t = 1.1RC （固定计算公式） 1.1*10K*0.1uF=1.1ms需求的复位信号持续时间约在1ms左右。
手动复位：按键按下时，RESET和地导通，从而产生一个低电平，实现复位。
3、时钟：晶振+起振电容 +（反馈电阻MΩ级）如使用内部时钟：对于100脚或144脚的产品，OSC_IN应接地，OSC_OUT应悬空。
2）对于少于100脚的产品，有2种接法：i）OSC_IN和OSC_OUT分别通过10K电阻接地。
此方法可提高EMC性。
32.768KHZ：可选择只接高速外部时钟8MHZ或既多接一个32.768MHZ的外部低速时钟。
32.768KHZ时钟作用：用于精准计时电路万年历通常会选择32.768KHz的晶振，原因在于32768=2^15，而嵌入式芯片分频设置寄存器通常是2的次幂的形式，这样经过15次分频后，就很容易的1HZ的频率。
实现精准定时。
用于精准计时电路万年历晶振：一般选择8MHZ 方便倍频有源：更稳定成本更高需要接电源供电不需要外围电路 3脚单线输出无源：精度基本够方便灵活便宜最大区别：是否需要单独供电无源晶振需要外接起振电容：晶振的两侧有两个电容OSC——OUT不接，悬空有源晶振作用：1、使晶振两端的等效电容等于或接近于负载电容；2、起到一定的滤波的作用，滤除晶振波形中的高频杂波；该起振电容的大小一般选择10~40pF，当然根据不同的单片机使用手册可以具体查阅，如果手册上没有说明，一般选择20pF、30pF 即可，这是个经验值。
调整电容可微调振荡频率：一般情况下，增大电容会使振荡频率下降，而减小电容会使振荡频率升高，反馈电阻： 1M 负反馈同时也是限流1、连接晶振的芯片端内部是一个线性运算放大器，将输入进行反向180度输出，晶振处的负载电容电阻组成的网络提供另外180度的相移；整个环路的相移360度，满足振荡的相位条件，2、晶振输入输出连接的电阻作用是产生负反馈，保证放大器工作在高增益的线性区，一般在M欧级；3、限流的作用，防止反向器输出对晶振过驱动，损坏晶振，有的晶振不需要是因为把这个电阻已经集成到了晶振里面。
嵌入式单片机之STM32F103C8T6最小系统板电路设计参考
嵌入式单片机之STM32F103C8T6最小系统板电路设计参考。
STM32F103C8T6最小系统板电路设计
一。
电源部分
设计了一个XH插座，以便使用3.7V锂电池供电，接入电压不允许超过6V。
二。
指示灯部分
电源指示灯可以通过一个短路帽控制亮灭，以达到节电的目的。
三。
复位电路
四。
按键电路
KEY_1为用户自己定义
RST复位按键
WKUP为唤醒按键。
RST按键的作用：
程序下载的方式是SWD模式，BOOT0和BOOT1都接地，单片机一上电就会执行用户程序，所以不支持串口下载。
五。
OLED电路
支持IIC和SPI两种通信模式
六。
扩展口
七。
电源部分
TIM1的CH1和CH2输出PWM控制一个轮子的转速。
TIM1的CH3和CH4控制一个轮子的转速。
TIM4的CH1和CH2控制一个轮子的转速。
TIM4的CH3和CH4控制一个轮子的转速。
每一个轮子都可以独立的控制正转，反转和速度。
避障模块用3个引脚
寻迹模块用3个引脚
测速模块用4个引脚(定时器的捕获功能)用于检测每个轮子的转速PB10到PB15用于2.4G的无线通信模块
32.768K晶振，它的负载电容不能用12.5pF，推荐负载电容为6pF的晶振。
还是分享些相应的资料便于学习参考
（零基础电子产品设计）
从0到1，设计自己的开发板
PWM脉宽调制技术
（stm32串口应用）。
STM32F103C8T6最小系统地的构建（1）
STM32F103C8T6最小系统地的构建（1）2018年7月3日硬件学习笔记(1)一直没有做过什么系统性的笔记，导致很多知识学了忘，忘了又花很长时间去找资料重新学习。
干脆网络保存学习笔记好了，有愿相互探讨的可以邮件我。
最小系统了解过多次，但一直没有自己把最小系统构建出来，在准备做笔记的同时将最小系统解析一下，因为接触到最多的就是单片机了，而手上又还有一点32芯片，所以直接构建32的最小系统了。
网上百度了很久最小系统，不知道是不是我知识量跟不上，总有点理解不了。
直接就结合网络上的信息直接理解了。
最小系统由：电源部分，处理器部分，下载电路，时钟电路，复位电路，负载电路组成。
电源部分：给系统提供能源的，必不可少。
那如何设计输入电源呢。
我们所接触到的最小系统多数都是直接由电脑USB供电，作为学习版，这样是没问题的，不过我们能不能用电池供电呢。
这个肯定是能的，对我们来说，电池供电难以选择电池类型，电池的体积太大了，纽扣电池尽管体积小一点，但在对电路负载的控制上还是差了一点。
扯远了，不管怎么选电池，一正一负两个接口就对了，单单两个接口还是不够的，我们不确定使用人员使用多高电压电流的电源来对系统供电，于是我们需要对输入电源布置一个稳压电路来稳定输入电源。
参考了部分电路资料，查找了一下电源稳压的一些信息后，布置了以上的电源输入电路，输入电源电压可以达到一个比较高的状态也可以输出一个较稳定的5V电压。
电路上的电容都是对电源进行滤波的，两个二极管是用作防反接用途的，电源指示灯和电阻就不用多说了，电感是用作稳定直流作用的。
一般来说，最小系统可能用不上这么高压的电源，一些驱动器才会使用强电流的电源器件，控制器有5V的电源就足够了。
以上是对输入电源稳压的解析，之后再讲解稳压电源到芯片电源的转换。