AS13985中文资料

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美国ASTM A580 - 98不锈钢丝标准(中文翻译稿,仅供学习参考)

ASTM A580/580M-98Standard Specification for Stainless Steel Wire不锈钢丝的标准规范1. Scope 范围1.1 This specification covers stainless steel wire, except the free-machining types. It includes round, square, octagon, hexagon, and shape wire in coils only for the more commonly used types of stainless steels for general corrosion resistance and high-temperature service. For bars in straightened and cut lengths, see Specifications A276 or A479/A479M.本规范包括除了自由加工类型以外的不锈钢丝。

包括只为较常用的一般耐腐蚀和用于高温类型的（截面为）圆形、方形、八角形、六角形等钢丝型材，仅限线圈。

对于在拉直和定尺长度的棒材，见规范A276或A479/A479M。

NOTE 1 ---- For free-machining stainless wire, designed especially for optimum machinability, see Specification A581/A581M.注1：对于自由加工的不锈钢丝，尤其为优化可加工性设计的不锈钢丝，见规范A581/A581M。

1.2 The value stated in either inch-pound units or SI(metric) units are to be regarded separately as standards; within the text and tables, the SI units are shown in [brackets]. The values stated in each system are not exact equivalents; therefore, each system must be used independently of the other. Combining values from the two systems may result in nonconformance with the specification.无论是英制单位还是公制单位的值均被视作标准；在正文和表格内，公制单位显示在括号[ ]内。

MAX13085EASA+中文资料

General DescriptionThe MAX13080E–MAX13089E +5.0V, ±15kV ESD-protect-ed, RS-485/RS-422 transceivers feature one driver and one receiver. These devices include fail-safe circuitry,guaranteeing a logic-high receiver output when receiver inputs are open or shorted. The receiver outputs a logic-high if all transmitters on a terminated bus are disabled (high impedance). The MAX13080E–MAX13089E include a hot-swap capability to eliminate false transitions on the bus during power-up or hot insertion.The MAX13080E/MAX13081E/MAX13082E feature reduced slew-rate drivers that minimize EMI and reduce reflections caused by improperly terminated cables, allowing error-free data transmission up to 250kbps. The MAX13083E/MAX13084E/MAX13085E also feature slew-rate-limited drivers but allow transmit speeds up to 500kbps. The MAX13086E/MAX13087E/MAX13088E driver slew rates are not limited, making transmit speeds up to 16Mbps possible. The MAX13089E slew rate is pin selectable for 250kbps,500kbps, and 16Mbps.The MAX13082E/MAX13085E/MAX13088E are intended for half-duplex communications, and the MAX13080E/MAX13081E/MAX13083E/MAX13084E/MAX13086E/MAX13087E are intended for full-duplex communica-tions. The MAX13089E is selectable for half-duplex or full-duplex operation. It also features independently programmable receiver and transmitter output phase through separate pins.The MAX13080E–MAX13089E transceivers draw 1.2mA of supply current when unloaded or when fully loaded with the drivers disabled. All devices have a 1/8-unit load receiver input impedance, allowing up to 256transceivers on the bus.The MAX13080E/MAX13083E/MAX13086E/MAX13089E are available in 14-pin PDIP and 14-pin SO packages.The MAX13081E/MAX13082E/MAX13084E/MAX13085E/MAX13087E/MAX13088E are available in 8-pin PDIP and 8-pin SO packages. The devices operate over the com-mercial, extended, and automotive temperature ranges.ApplicationsUtility Meters Lighting Systems Industrial Control Telecom Security Systems Instrumentation ProfibusFeatures♦+5.0V Operation♦Extended ESD Protection for RS-485/RS-422 I/O Pins±15kV Human Body Model ♦True Fail-Safe Receiver While Maintaining EIA/TIA-485 Compatibility ♦Hot-Swap Input Structures on DE and RE ♦Enhanced Slew-Rate Limiting Facilitates Error-Free Data Transmission(MAX13080E–MAX13085E/MAX13089E)♦Low-Current Shutdown Mode (Except MAX13081E/MAX13084E/MAX13087E)♦Pin-Selectable Full-/Half-Duplex Operation (MAX13089E)♦Phase Controls to Correct for Twisted-Pair Reversal (MAX13089E)♦Allow Up to 256 Transceivers on the Bus ♦Available in Industry-Standard 8-Pin SO PackageMAX13080E–MAX13089E+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 Transceivers________________________________________________________________Maxim Integrated Products 1Ordering Information19-3590; Rev 1; 4/05For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at .Selector Guide, Pin Configurations, and Typical Operating Circuits appear at end of data sheet.Ordering Information continued at end of data sheet.M A X 13080E –M A X 13089E+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 Transceivers 2_______________________________________________________________________________________ABSOLUTE MAXIMUM RATINGSDC ELECTRICAL CHARACTERISTICS(V CC = +5.0V ±10%, T A = T MIN to T MAX , unless otherwise noted. Typical values are at V CC = +5.0V and T A = +25°C.) (Note 1)Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.(All Voltages Referenced to GND)Supply Voltage (V CC ).............................................................+6V Control Input Voltage (RE , DE, SLR,H/F , TXP, RXP)......................................................-0.3V to +6V Driver Input Voltage (DI)...........................................-0.3V to +6V Driver Output Voltage (Z, Y, A, B).............................-8V to +13V Receiver Input Voltage (A, B)....................................-8V to +13V Receiver Input VoltageFull Duplex (A, B)..................................................-8V to +13V Receiver Output Voltage (RO)....................-0.3V to (V CC + 0.3V)Driver Output Current.....................................................±250mAContinuous Power Dissipation (T A = +70°C)8-Pin SO (derate 5.88mW/°C above +70°C).................471mW 8-Pin Plastic DIP (derate 9.09mW/°C above +70°C).....727mW 14-Pin SO (derate 8.33mW/°C above +70°C)...............667mW 14-Pin Plastic DIP (derate 10.0mW/°C above +70°C)...800mW Operating Temperature RangesMAX1308_EC_ _.................................................0°C to +75°C MAX1308_EE_ _..............................................-40°C to +85°C MAX1308_EA_ _............................................-40°C to +125°C Junction Temperature......................................................+150°C Storage Temperature Range.............................-65°C to +150°C Lead Temperature (soldering, 10s).................................+300°CMAX13080E–MAX13089E+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 Transceivers_______________________________________________________________________________________3DC ELECTRICAL CHARACTERISTICS (continued)(V CC = +5.0V ±10%, T A = T MIN to T MAX , unless otherwise noted. Typical values are at V CC = +5.0V and T A = +25°C.) (Note 1)M A X 13080E –M A X 13089E+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 Transceivers 4_______________________________________________________________________________________DRIVER SWITCHING CHARACTERISTICSMAX13080E/MAX13081E/MAX13082E/MAX13089E WITH SRL = UNCONNECTED (250kbps)(V CC = +5.0V ±10%, T A = T MIN to T MAX , unless otherwise noted. Typical values are at V CC = +5.0V and T A = +25°C.)RECEIVER SWITCHING CHARACTERISTICSMAX13080E/MAX13081E/MAX13082E/MAX13089E WITH SRL = UNCONNECTED (250kbps)(V CC = +5.0V ±10%, T A = T MIN to T MAX , unless otherwise noted. Typical values are at V CC = +5.0V and T A = +25°C.)MAX13080E–MAX13089E+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 Transceivers_______________________________________________________________________________________5DRIVER SWITCHING CHARACTERISTICSMAX13083E/MAX13084E/MAX13085E/MAX13089E WITH SRL = V CC (500kbps)(V CC = +5.0V ±10%, T A = T MIN to T MAX , unless otherwise noted. Typical values are at V CC = +5.0V and T A = +25°C.)RECEIVER SWITCHING CHARACTERISTICSMAX13083E/MAX13084E/MAX13085E/MAX13089E WITH SRL = V CC (500kbps)(V CC = +5.0V ±10%, T A = T MIN to T MAX , unless otherwise noted. Typical values are at V CC = +5.0V and T A = +25°C.)M A X 13080E –M A X 13089E+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 Transceivers 6_______________________________________________________________________________________DRIVER SWITCHING CHARACTERISTICSMAX13086E/MAX13087E/MAX13088E/MAX13089E WITH SRL = GND (16Mbps)(V CC = +5.0V ±10%, T A = T MIN to T MAX , unless otherwise noted. Typical values are at V CC = +5.0V and T A = +25°C.)RECEIVER SWITCHING CHARACTERISTICSMAX13086E/MAX13087E/MAX13088E/MAX13089E WITH SRL = GND (16Mbps)(V CC = +5.0V ±10%, T A = T MIN to T MAX , unless otherwise noted. Typical values are at V CC = +5.0V and T A = +25°C.)Note 2:∆V OD and ∆V OC are the changes in V OD and V OC , respectively, when the DI input changes state.Note 3:The short-circuit output current applies to peak current just prior to foldback current limiting. The short-circuit foldback outputcurrent applies during current limiting to allow a recovery from bus contention.MAX13080E–MAX13089E+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 Transceivers_______________________________________________________________________________________70.800.901.501.101.001.201.301.401.60-40-10520-253550958011065125SUPPLY CURRENT vs. TEMPERATURETEMPERATURE (°C)S U P P L Y C U R R E N T (m A )0201040305060021345OUTPUT CURRENTvs. RECEIVER OUTPUT-HIGH VOLTAGEM A X 13080E -89E t o c 02OUTPUT HIGH VOLTAGE (V)O U T P U T C U R R E N T (m A )20104030605070021345OUTPUT CURRENTvs. RECEIVER OUTPUT-LOW VOLTAGEM A X 13080E -89E t o c 03OUTPUT LOW VOLTAGE (V)O U T P U T C U R R E N T (m A )4.04.44.24.84.65.25.05.4RECEIVER OUTPUT-HIGH VOLTAGEvs. TEMPERATURETEMPERATURE (°C)O U T P U T H I G H V O L T A G E (V )-40-10520-2535509580110651250.10.70.30.20.40.50.60.8RECEIVER OUTPUT-LOW VOLTAGEvs. TEMPERATURETEMPERATURE (°C)O U T P U T L O W V O L T A G E (V )-40-10520-25355095801106512502040608010012014016012345DRIVER DIFFERENTIAL OUTPUT CURRENT vs. DIFFERENTIAL OUTPUT VOLTAGEDIFFERENTIAL OUTPUT VOLTAGE (V)D I F FE R E N T I A L O U T P U T C U R R E N T (m A )2.02.82.43.63.24.44.04.8DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs. TEMPERATURED I F FE R E N T I A L O U T P U T V O L T A G E (V )-40-10520-253550958011065125TEMPERATURE (°C)40201008060120140180160200-7-5-4-6-3-2-1012354OUTPUT CURRENT vs. TRANSMITTEROUTPUT-HIGH VOLTAGEOUTPUT HIGH VOLTAGE (V)O U T P U T C U R R E N T (m A )60402080100120140160180200042681012OUTPUT CURRENT vs. TRANSMITTEROUTPUT-LOW VOLTAGEOUTPUT-LOW VOLTAGE (V)O U T P U T C U R R E N T (m A )Typical Operating Characteristics(V CC = +5.0V, T A = +25°C, unless otherwise noted.)M A X 13080E –M A X 13089E+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 Transceivers 8_______________________________________________________________________________________21543679810SHUTDOWN CURRENT vs. TEMPERATUREM A X 13080E -89E t o c 10S H U T D O W N C U R R E N T (µA )-40-10520-253550958011065125TEMPERATURE (°C)600800700100090011001200DRIVER PROPAGATION DELAY vs. TEMPERATURE (250kbps)D R I VE R P R O P A G A T I O N D E L A Y (n s )-40-10520-253550958011065125TEMPERATURE (°C)300400350500450550600DRIVER PROPAGATION DELAY vs. TEMPERATURE (500kbps)D R I VE R P R O P A G A T I O N D E L A Y (n s )-40-10520-253550958011065125TEMPERATURE (°C)1070302040506080DRIVER PROPAGATION DELAY vs. TEMPERATURE (16Mbps)D R I VE R P R O P A G A T I O N D E L A Y (n s )-40-10520-253550958011065125TEMPERATURE (°C)40201008060120140160180RECEIVER PROPAGATION DELAYvs. TEMPERATURE (250kpbs AND 500kbps)R E C E I V E R P R O P A G A T I O N D E L A Y (n s )-40-10520-253550958011065125TEMPERATURE (°C)40201008060120140160180RECEIVER PROPAGATION DELAYvs. TEMPERATURE (16Mbps)R EC E I V E R P R O P A G AT I O N D E L A Y (n s )-40-10520-253550958011065125TEMPERATURE (°C)2µs/div DRIVER PROPAGATION DELAY (250kbps)DI 2V/divV Y - V Z 5V/divR L = 100Ω200ns/divRECEIVER PROPAGATION DELAY(250kbps AND 500kbps)V A - V B 5V/divRO 2V/divTypical Operating Characteristics (continued)(V CC = +5.0V, T A = +25°C, unless otherwise noted.)MAX13080E–MAX13089E+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 Transceivers_______________________________________________________________________________________9Test Circuits and Waveforms400ns/divDRIVER PROPAGATION DELAY (500kbps)DI 2V/divR L = 100ΩV Y - V Z 5V/div10ns/div DRIVER PROPAGATION DELAY (16Mbps)DI 2V/divR L = 100ΩV Y 2V/divV Z 2V/div40ns/divRECEIVER PROPAGATION DELAY (16Mbps)V B 2V/divR L = 100ΩRO 2V/divV A 2V/divTypical Operating Characteristics (continued)(V CC = +5.0V, T A = +25°C, unless otherwise noted.)Figure 2. Driver Timing Test CircuitM A X 13080E –M A X 13089E+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 Transceivers 10______________________________________________________________________________________Test Circuits and Waveforms (continued)Figure 4. Driver Enable and Disable Times (t DHZ , t DZH , t DZH(SHDN))DZL DLZ DLZ(SHDN)MAX13080E–MAX13089E+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 TransceiversTest Circuits and Waveforms (continued)Figure 6. Receiver Propagation Delay Test CircuitM A X 13080E –M A X 13089E+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 TransceiversMAX13080E–MAX13089E+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 TransceiversMAX13080E/MAX13083E/MAX13086EMAX13081E/MAX13084E/MAX13086E/MAX13087EFunction TablesM A X 13080E –M A X 13089E+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 Transceivers MAX13082E/MAX13085E/MAX13088EFunction Tables (continued)MAX13089EDetailed Description The MAX13080E–MAX13089E high-speed transceivers for RS-485/RS-422 communication contain one driver and one receiver. These devices feature fail-safe circuit-ry, which guarantees a logic-high receiver output when the receiver inputs are open or shorted, or when they are connected to a terminated transmission line with all dri-vers disabled (see the Fail-Safe section). The MAX13080E/MAX13082E/MAX13083E/MAX13085E/ MAX13086E/MAX13088E/MAX13089E also feature a hot-swap capability allowing line insertion without erroneous data transfer (see the Hot Swap Capability section). The MAX13080E/MAX13081E/MAX13082E feature reduced slew-rate drivers that minimize EMI and reduce reflec-tions caused by improperly terminated cables, allowing error-free data transmission up to 250kbps. The MAX13083E/MAX13084E/MAX13085E also offer slew-rate limits allowing transmit speeds up to 500kbps. The MAX13086E/MAX13087E/MAX13088Es’ driver slew rates are not limited, making transmit speeds up to 16Mbps possible. The MAX13089E’s slew rate is selectable between 250kbps, 500kbps, and 16Mbps by driving a selector pin with a three-state driver.The MAX13082E/MAX13085E/MAX13088E are half-duplex transceivers, while the MAX13080E/MAX13081E/ MAX13083E/MAX13084E/MAX13086E/MAX13087E are full-duplex transceivers. The MAX13089E is selectable between half- and full-duplex communication by driving a selector pin (H/F) high or low, respectively.All devices operate from a single +5.0V supply. Drivers are output short-circuit current limited. Thermal-shutdown circuitry protects drivers against excessive power dissi-pation. When activated, the thermal-shutdown circuitry places the driver outputs into a high-impedance state.Receiver Input Filtering The receivers of the MAX13080E–MAX13085E, and the MAX13089E when operating in 250kbps or 500kbps mode, incorporate input filtering in addition to input hysteresis. This filtering enhances noise immunity with differential signals that have very slow rise and fall times. Receiver propagation delay increases by 25% due to this filtering.Fail-Safe The MAX13080E family guarantees a logic-high receiver output when the receiver inputs are shorted or open, or when they are connected to a terminated transmission line with all drivers disabled. This is done by setting the receiver input threshold between -50mV and -200mV. If the differential receiver input voltage (A - B) is greater than or equal to -50mV, RO is logic-high. If (A - B) is less than or equal to -200mV, RO is logic-low. In the case of a terminated bus with all transmitters disabled, the receiv-er’s differential input voltage is pulled to 0V by the termi-nation. With the receiver thresholds of the MAX13080E family, this results in a logic-high with a 50mV minimumnoise margin. Unlike previous fail-safe devices, the-50mV to -200mV threshold complies with the ±200mVEIA/TIA-485 standard.Hot-Swap Capability (Except MAX13081E/MAX13084E/MAX13087E)Hot-Swap InputsWhen circuit boards are inserted into a hot or powered backplane, differential disturbances to the data buscan lead to data errors. Upon initial circuit board inser-tion, the data communication processor undergoes itsown power-up sequence. During this period, the processor’s logic-output drivers are high impedanceand are unable to drive the DE and RE inputs of these devices to a defined logic level. Leakage currents up to±10µA from the high-impedance state of the proces-sor’s logic drivers could cause standard CMOS enableinputs of a transceiver to drift to an incorrect logic level. Additionally, parasitic circuit board capacitance couldcause coupling of V CC or GND to the enable inputs. Without the hot-swap capability, these factors could improperly enable the transceiver’s driver or receiver.When V CC rises, an internal pulldown circuit holds DElow and RE high. After the initial power-up sequence,the pulldown circuit becomes transparent, resetting thehot-swap tolerable input.Hot-Swap Input CircuitryThe enable inputs feature hot-swap capability. At theinput there are two NMOS devices, M1 and M2 (Figure 9). When V CC ramps from zero, an internal 7µstimer turns on M2 and sets the SR latch, which alsoturns on M1. Transistors M2, a 1.5mA current sink, andM1, a 500µA current sink, pull DE to GND through a5kΩresistor. M2 is designed to pull DE to the disabledstate against an external parasitic capacitance up to100pF that can drive DE high. After 7µs, the timer deactivates M2 while M1 remains on, holding DE low against three-state leakages that can drive DE high. M1 remains on until an external source overcomes the required input current. At this time, the SR latch resetsand M1 turns off. When M1 turns off, DE reverts to a standard, high-impedance CMOS input. Whenever V CCdrops below 1V, the hot-swap input is reset.For RE there is a complementary circuit employing two PMOS devices pulling RE to V CC. MAX13080E–MAX13089E+5.0V, ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 TransceiversM A X 13080E –M A X 13089EMAX13089E ProgrammingThe MAX13089E has several programmable operating modes. Transmitter rise and fall times are programma-ble, resulting in maximum data rates of 250kbps,500kbps, and 16Mbps. To select the desired data rate,drive SRL to one of three possible states by using a three-state driver: V CC , GND, or unconnected. F or 250kbps operation, set the three-state device in high-impedance mode or leave SRL unconnected. F or 500kbps operation, drive SRL high or connect it to V CC .F or 16Mbps operation, drive SRL low or connect it to GND. SRL can be changed during operation without interrupting data communications.Occasionally, twisted-pair lines are connected backward from normal orientation. The MAX13089E has two pins that invert the phase of the driver and the receiver to cor-rect this problem. F or normal operation, drive TXP and RXP low, connect them to ground, or leave them uncon-nected (internal pulldown). To invert the driver phase,drive TXP high or connect it to V CC . To invert the receiver phase, drive RXP high or connect it to V CC . Note that the receiver threshold is positive when RXP is high.The MAX13089E can operate in full- or half-duplex mode. Drive H/F low, leave it unconnected (internal pulldown), or connect it to GND for full-duplex opera-tion. Drive H/F high for half-duplex operation. In full-duplex mode, the pin configuration of the driver and receiver is the same as that of a MAX13080E. In half-duplex mode, the receiver inputs are internally connect-ed to the driver outputs through a resistor-divider. This effectively changes the function of the device’s outputs.Y becomes the noninverting driver output and receiver input, Z becomes the inverting driver output and receiver input. In half-duplex mode, A and B are still connected to ground through an internal resistor-divider but they are not internally connected to the receiver.±15kV ESD ProtectionAs with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electro-static discharges encountered during handling and assembly. The driver outputs and receiver inputs of the MAX13080E family of devices have extra protection against static electricity. Maxim’s engineers have devel-oped state-of-the-art structures to protect these pins against ESD of ±15kV without damage. The ESD struc-tures withstand high ESD in all states: normal operation,shutdown, and powered down. After an ESD event, the MAX13080E–MAX13089E keep working without latchup or damage.ESD protection can be tested in various ways. The transmitter outputs and receiver inputs of the MAX13080E–MAX13089E are characterized for protec-tion to the following limits:•±15kV using the Human Body Model•±6kV using the Contact Discharge method specified in IEC 61000-4-2ESD Test ConditionsESD performance depends on a variety of conditions.Contact Maxim for a reliability report that documents test setup, test methodology, and test results.Human Body ModelFigure 10a shows the Human Body Model, and Figure 10b shows the current waveform it generates when dis-charged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest,which is then discharged into the test device through a 1.5k Ωresistor.IEC 61000-4-2The IEC 61000-4-2 standard covers ESD testing and performance of finished equipment. However, it does not specifically refer to integrated circuits. The MAX13080E family of devices helps you design equip-ment to meet IEC 61000-4-2, without the need for addi-tional ESD-protection components.+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 TransceiversThe major difference between tests done using the Human Body Model and IEC 61000-4-2 is higher peak current in IEC 61000-4-2 because series resistance is lower in the IEC 61000-4-2 model. Hence, the ESD with-stand voltage measured to IEC 61000-4-2 is generally lower than that measured using the Human Body Model. Figure 10c shows the IEC 61000-4-2 model, and Figure 10d shows the current waveform for IEC 61000-4-2 ESD Contact Discharge test.Machine Model The machine model for ESD tests all pins using a 200pF storage capacitor and zero discharge resis-tance. The objective is to emulate the stress caused when I/O pins are contacted by handling equipment during test and assembly. Of course, all pins require this protection, not just RS-485 inputs and outputs.Applications Information256 Transceivers on the BusThe standard RS-485 receiver input impedance is 12kΩ(1-unit load), and the standard driver can drive up to 32-unit loads. The MAX13080E family of transceivers has a1/8-unit load receiver input impedance (96kΩ), allowingup to 256 transceivers to be connected in parallel on one communication line. Any combination of these devices,as well as other RS-485 transceivers with a total of 32-unit loads or fewer, can be connected to the line.Reduced EMI and ReflectionsThe MAX13080E/MAX13081E/MAX13082E feature reduced slew-rate drivers that minimize EMI and reduce reflections caused by improperly terminated cables, allowing error-free data transmission up to250kbps. The MAX13083E/MAX13084E/MAX13085Eoffer higher driver output slew-rate limits, allowing transmit speeds up to 500kbps. The MAX13089E withSRL = V CC or unconnected are slew-rate limited. WithSRL unconnected, the MAX13089E error-free data transmission is up to 250kbps. With SRL connected toV CC,the data transmit speeds up to 500kbps. MAX13080E–MAX13089E+5.0V, ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 TransceiversM A X 13080E –M A X 13089ELow-Power Shutdown Mode (Except MAX13081E/MAX13084E/MAX13087E)Low-power shutdown mode is initiated by bringing both RE high and DE low. In shutdown, the devices typically draw only 2.8µA of supply current.RE and DE can be driven simultaneously; the devices are guaranteed not to enter shutdown if RE is high and DE is low for less than 50ns. If the inputs are in this state for at least 700ns, the devices are guaranteed to enter shutdown.Enable times t ZH and t ZL (see the Switching Characteristics section) assume the devices were not in a low-power shutdown state. Enable times t ZH(SHDN)and t ZL(SHDN)assume the devices were in shutdown state. It takes drivers and receivers longer to become enabled from low-power shutdown mode (t ZH(SHDN), t ZL(SHDN))than from driver/receiver-disable mode (t ZH , t ZL ).Driver Output ProtectionTwo mechanisms prevent excessive output current and power dissipation caused by faults or by bus contention.The first, a foldback current limit on the output stage,provides immediate protection against short circuits over the whole common-mode voltage range (see the Typical Operating Characteristics ). The second, a thermal-shut-down circuit, forces the driver outputs into a high-imped-ance state if the die temperature exceeds +175°C (typ).Line LengthThe RS-485/RS-422 standard covers line lengths up to 4000ft. F or line lengths greater than 4000ft, use the repeater application shown in Figure 11.Typical ApplicationsThe MAX13082E/MAX13085E/MAX13088E/MAX13089E transceivers are designed for bidirectional data commu-nications on multipoint bus transmission lines. F igures 12 and 13 show typical network applications circuits. To minimize reflections, terminate the line at both ends in its characteristic impedance, and keep stub lengths off the main line as short as possible. The slew-rate-lim-ited MAX13082E/MAX13085E and the two modes of the MAX13089E are more tolerant of imperfect termination.Chip InformationTRANSISTOR COUNT: 1228PROCESS: BiCMOS+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 TransceiversFigure 11. Line Repeater for MAX13080E/MAX13081E/MAX13083E/MAX13084E/MAX13086E/MAX13087E/MAX13089E in Full-Duplex Mode+5.0V, ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 TransceiversMAX13080E–MAX13089EM A X 13080E –M A X 13089E+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 TransceiversPin Configurations and Typical Operating CircuitsMAX13080E–MAX13089E+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 Transceivers______________________________________________________________________________________21Pin Configurations and Typical Operating Circuits (continued)M A X 13080E –M A X 13089E+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 Transceivers 22______________________________________________________________________________________Ordering Information (continued)MAX13080E–MAX13089E+5.0V , ±15kV ESD-Protected, Fail-Safe, Hot-Swap, RS-485/RS-422 Transceivers______________________________________________________________________________________23Package Information (continued)(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to /packages .)。

STY139N65M5;中文规格书,Datasheet资料

This is information on a product in full production.April 2012Doc ID 022826 Rev 31/12STY139N65M5N-channel 650 V , 0.014 Ω, 130 A, MDmesh™ V Power MOSFETin Max247 packageDatasheet — production dataFeatures■Max247 worldwide best R DS(on)■Higher V DSS rating ■Higher dv/dt capability■Excellent switching performance ■Easy to drive■100% avalanche testedApplications■Switching applicationsDescriptionThe device is an N-channel MDmesh™ V Power MOSFET based on an innovative proprietary vertical process technology, which is combined with STMicroelectronics’ well-knownPowerMESH™ horizontal layout structure. The resulting product has extremely low on-resistance, which is unmatched among silicon-based Power MOSFETs, making it especially suitable for applications which require superior power density and outstanding efficiency.Order code V DSS @T jMAX R DS(on) max I D STY139N65M5710 V< 0.017 Ω130 ATable 1.Device summaryOrder code Marking Package Packaging STY139N65M5139N65M5Max247TubeContents STY139N65M5Contents1Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42.1Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122/12Doc ID 022826 Rev 3STY139N65M5Electrical ratingsDoc ID 022826 Rev 33/121 Electrical ratingsTable 2.Absolute maximum ratingsSymbol ParameterValue Unit V GS Gate- source voltage± 25V I D Drain current (continuous) at T C = 25 °C 130A I D Drain current (continuous) at T C = 100 °C 78A I DM (1)1.Pulse width limited by safe operating area.Drain current (pulsed)520A P TOT Total dissipation at T C = 25 °C625W I AR Max current during repetitive or single pulse avalanche(pulse width limited by T JMAX )15A E AS Single pulse avalanche energy(starting T j = 25°C, I D = I AR , V DD = 50V)2000mJ dv/dt (2)2.I SD ≤ 130 A, di/dt = 400 A/µs, V DD = 400 V, peak V DS < V (BR)DSS.Peak diode recovery voltage slope 15V/ns T stg Storage temperature- 55 to 150°C T jMax. operating junction temperature150°CTable 3.Thermal dataSymbolParameterValue Unit R thj-case Thermal resistance junction-case max 0.2°C/W R thj-amb Thermal resistance junction-ambient max 30°C/W T lMaximum lead temperature for soldering purpose300°CElectrical characteristics STY139N65M54/12Doc ID 022826 Rev 32 Electrical characteristics(T C = 25 °C unless otherwise specified)Table 4.On /off statesSymbol Parameter Test conditionsMin.Typ.Max.Unit V (BR)DSS Drain-sourcebreakdown voltageI D = 1 mA, V GS = 0650V I DSS Zero gate voltage drain current (V GS = 0)V DS = 650 VV DS = 650 V , T C =125 °C 10100µA µA I GSS Gate-body leakage current (V DS = 0)V GS = ± 25 V±100nA V GS(th)Gate threshold voltage V DS = V GS , I D = 250 µA 345V R DS(on)Static drain-source onresistanceV GS = 10 V , I D = 65 A0.0140.017ΩTable 5.DynamicSymbol Parameter Test conditionsMin.Typ.Max.Unit C iss C oss C rss Input capacitance Output capacitance Reverse transfer capacitance V DS = 100 V , f = 1 MHz, V GS = 0-156003659-pF pF pFC o(tr)(1)1.C o(tr) is a constant capacitance value that gives the same charging time as C oss while V DS is rising from 0to 80% V DSS .Equivalentcapacitance time relatedV GS = 0, V DS = 0 to 520 V-1559-pFC o(er)(2)2.C o(er) is a constant capacitance value that gives the same stored energy as C oss while V DS is rising from 0to 80% V DSS .Equivalentcapacitance energy related V GS = 0, V DS = 0 to 520 V -360-pFR GIntrinsic gate resistancef = 1 MHz open drain - 1.2-ΩQg Q gs Q gdT otal gate charge Gate-source charge Gate-drain chargeV DD = 520 V , I D = 65 A,V GS = 10 V (see Figure 15)-36388164-nC nC nCSTY139N65M5Electrical characteristicsDoc ID 022826 Rev 35/12Table 6.Switching timesSymbol ParameterTest conditions Min.Typ.Max.Unitt d(v)t r(v)t f(i)t c(off)Voltage delay time Voltage rise time Current fall time Crossing timeV DD = 400 V , I D = 80 A, R G = 4.7 Ω, V GS = 10 V (see Figure 16)(see Figure 19)-295563784-ns ns ns nsTable 7.Source drain diodeSymbol ParameterTest conditionsMin.Typ.Max.Unit I SD I SDM (1)1.Pulse width limited by safe operating area.Source-drain currentSource-drain current (pulsed)-130520A A V SD (2)2.Pulsed: pulse duration = 300 µs, duty cycle 1.5%Forward on voltage I SD = 130 A, V GS = 0- 1.5V t rr Q rr I RRM Reverse recovery time Reverse recovery charge Reverse recovery current I SD = 130 A, di/dt = 100 A/µs V DD = 100 V (see Figure 16)-5701553ns µC A t rr Q rr I RRMReverse recovery time Reverse recovery charge Reverse recovery currentI SD = 130 A, di/dt = 100 A/µs V DD = 100 V , T j = 150 °C (see Figure 16)-7202468ns µC AElectrical characteristics STY139N65M5 2.1 Electrical characteristics (curves)6/12Doc ID 022826 Rev 3STY139N65M5Electrical characteristicsDoc ID 022826 Rev 37/12Figure 10.Normalized gate threshold voltageFigure 11.Normalized on resistance vsFigure 12.Output capacitance stored energyFigure 13.Switching losses vs gate resistance(1)1.Eon including reverse recovery of a SiC diode.Test circuits STY139N65M58/12Doc ID 022826 Rev 33 Test circuitsFigure 14.Switching times test circuit forFigure 15.Gate charge test circuitFigure 16.Test circuit for inductive loadFigure 17.Unclamped inductive load testFigure 18.Unclamped inductive waveformFigure 19.Switching time waveformSTY139N65M5Package mechanical data 4 Package mechanical dataIn order to meet environmental requirements, ST offers these devices in different grades ofECOP ACK® packages, depending on their level of environmental compliance. ECOPACK®specifications, grade definitions and product status are available at: .ECOP ACK® is an ST trademark.Table 8.Max247 mechanical datammDim.Min.Typ.Max.A 4.70 5.30A1 2.20 2.60b 1.00 1.40b1 2.00 2.40b2 3.00 3.40c0.400.80D19.7020.30e 5.35 5.55E15.3015.90L14.2015.20L1 3.70 4.30Doc ID 022826 Rev 39/12Package mechanical data STY139N65M510/12Doc ID 022826 Rev 3分销商库存信息: STMSTY139N65M5。

L9953XP;L9953XPTR;L9953TR;L9953;中文规格书,Datasheet资料

May 2010Doc ID 14278 Rev 31/38L9953L9953XPDoor actuator driverFeatures■One full bridge for 6A load (R on =150m Ω)■Three half bridges for 1.5A load (R on =800m Ω)■One highside driver for 6A load (R on =100m Ω)■Two highside drivers for 1.5A load (R on =800m Ω)■Programmable softstart function to drive loads with higher inrush currents (i.e. current >6A, >1.5A)■Very low current consumption in stand-by mode (I S < 6µA typ; T j ≤ 85 °C)■All outputs short circuit protected■Current monitor output for highside OUT1, OUT4, OUT5 and OUT8■All outputs over temperature protected ■Open load diagnostic for all outputs ■Overload diagnostic for all outputs ■Separated half bridges for door lock motor ■PWM control of all outputs■Charge pump output for reverse polarity protectionApplications■Door actuator driver with bridges for door lock , mirror axis control, mirror fold and highside driver for mirror defroster and two 10W-light bulbs.DescriptionThe L9953 and L9953XP are microcontroller driven multifunctional door actuator driver for automotive applications. Up to three DC motors and three grounded resistive loads can be driven with five half bridges and three highside drivers. The integrated standard serial peripheral interface (SPI) controls all operation modes (forward, reverse, brake and high impedance). All diagnostic informations are available via SPI.PowerSSO-36Table 1.Device summaryPackageOrder codesTubeTape and reel PowerSO-36L9953L9953TR PowerSSO-36L9953XPL9953XPTRContents L9953 / L9953XPContents1Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92.1Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92.2ESD protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92.3Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92.4Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.5SPI - electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193.1Dual power supply: VS and VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193.2Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193.3Inductive loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193.4Diagnostic functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193.5Overvoltage and under voltage detection . . . . . . . . . . . . . . . . . . . . . . . . . 203.6Charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203.7Temperature warning and thermal shutdown . . . . . . . . . . . . . . . . . . . . . . 203.8Open load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203.9Over load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203.10Current monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213.11PWM inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213.12Cross-current protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213.13Programmable softstart function to drive loads with higher inrush current 214Functional description of the SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234.1Serial Peripheral Interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234.2Chip Select Not (CSN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234.3Serial Data In (DI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234.4Serial Data Out (DO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244.5Serial clock (CLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244.6Input data register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244.7Status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 2/38 Doc ID 14278 Rev 3L9953 / L9953XP Contents4.8Scan mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244.9Test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254.10SPI - input data and Status registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 265Packages thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 306Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 316.1ECOP ACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 316.2PowerSO-36™ package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 316.3PowerSSO-36™ package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 336.4PowerSO-36™ packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 346.5PowerSSO-36™ packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 7Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37Doc ID 14278 Rev 33/38List of tables L9953 / L9953XP List of tablesTable 1.Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2.Pin definitions and functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 3.Absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 4.ESD protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 5.Operating junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 6.Temperature warning and thermal shutdown. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 7.Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 8.Overvoltage and under voltage detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 9.Current monitor output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 10.Charge pump output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 11.OUT1 - OUT8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 12.Delay time from standby to active mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 13.Inputs: CSN, CLK, PWM1/2 and DI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 14.DI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 15.DO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 16.DO timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 17.CSN timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 18.Test mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 19.SPI - input data and Status registers 0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 20.SPI - input data and status registers 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 21.PowerSO-36™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 22.PowerSSO-36™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 23.Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 4/38 Doc ID 14278 Rev 3L9953 / L9953XP List of figures List of figuresFigure 1.Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2.Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 3.SPI - transfer timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 4.SPI - input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 5.SPI - DO valid data delay time and valid time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 6.SPI - DO enable and disable time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 7.SPI - driver turn-on/off timing, minimum CSN hi time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 8.SPI - timing of status bit 0 (fault condition). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 9.Example of programmable softstart function for inductive loads . . . . . . . . . . . . . . . . . . . . 22 Figure 10.Packages thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 11.PowerSO-36™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 12.PowerSSO-36™ package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 13.PowerSO-36™tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Figure 14.PowerSO-36™tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 15.PowerSSO-36™tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 16.PowerSSO-36™tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36Doc ID 14278 Rev 35/38Block diagram and pin description L9953 / L9953XP6/38 Doc ID 14278 Rev 31 Block diagram and pin descriptionTable 2.Pin definitions and functionsPinSymbolFunction1, 18, 19, 36GNDGround:Reference potentialImportant: for the capability of driving the full current at the outputs all pins of GND must be externally connected.2, 35OUT8Highside driver output 8The output is built by a highside switch and is intended for resistive loads, hence the internal reverse diode from GND to the output is missing. For ESD reason a diode to GND is present but the energy which can be dissipated is limited. The highside driver is a power DMOS transistor with an internal parasitic reverse diode from the output to VS (bulk-drain-diode). The output is over-current and open load protected.Important: for the capability of driving the full current at the outputs both pins of OUT8 must be externally connected.345OUT1 OUT2OUT3Half-bridge-output 1,2,3The output is built by a highside and a lowside switch, which are internally connected. The output stage of both switches is a power DMOS transistor. Each driver has an internal parasitic reverse diode (bulk-drain-diode: highside driver from output to VS, lowside driver from GND to output). This output is over-current and open load protected.L9953 / L9953XPBlock diagram and pin descriptionDoc ID 14278 Rev 37/386, 7, 14, 15, 23, 25, 28, 32VSPower supply voltage (external reverse protection required)For this input a ceramic capacitor as close as possible to GND is recommended.Important: for the capability of driving the full current at the outputs all pins of VS must be externally connected.8DISerial data inputThe input requires CMOS logic levels and receives serial data from the microcontroller. The data is an 24bit control word and the least significant bit (LSB, bit 0) is transferred first.9CM/PWM2Current monitor output/PWM2 inputDepending on the selected multiplexer bits of Input Data Register thisoutput sources an image of the instant current through thecorresponding highside driver with a ratio of 1/10.000. This pin is bidirectional. The microcontroller can overdrive the current monitor signal to provide a second PWM input for the output OUT7.10CSNChip select not input / test modeThis input is low active and requires CMOS logic levels. The serial data transfer between L9953 and micro controller is enabled by pulling the input CSN to low level. If an input voltage of more than 7.5V is applied to CSN pin the L9953 will be switched into a test mode.11DOSerial data outputThe diagnosis data is available via the SPI and this tristate-output. The output will remain in tristate, if the chip is not selected by the input CSN (CSN = high)12VCCLogic supply voltageFor this input a ceramic capacitor as close as possible to GND is recommended.13CLKSerial clock inputThis input controls the internal shift register of the SPI and requires CMOS logic levels.16,17, 20,21,OUT4 OUT5Half-bridge-output 4,5: see OUT1 (pin 3).Important: for the capability of driving the full current at the outputs both pins of OUT4 (OUT5, respectively) must be externally connected.26CPCharge pump outputThis output is provided to drive the gate of an external n-channel power MOS used for reverse polarity protection27PWM1PWM1 input:This input signal can be used to control the drivers OUT1-OUT6 and OUT8 by an external PWM signal.Table 2.Pin definitions and functions (continued)PinSymbolFunctionBlock diagram and pin descriptionL9953 / L9953XP8/38 Doc ID 14278 Rev 33133OUT6, OUT7Highside driver output 6,7:Each output is built by a highside switch and is intended for resistive loads, hence the internal reverse diode from GND to the output is missing. For ESD reason a diode to GND is present but the energy which can be dissipated is limited. Each highside driver is a power DMOS transistor with an internal parasitic reverse diode from each output to VS (bulk-drain-diode). Each output is over-current and open load protected.22, 24, 29,30, 34NCNot connected pins.Table 2.Pin definitions and functions (continued)PinSymbolFunctionL9953 / L9953XP Electrical specificationsDoc ID 14278 Rev 39/382 Electrical specifications2.1Absolute maximum ratingsStressing the device above the rating listed in the “Absolute maximum ratings” table maycause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions forextended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document2.2 ESD protection2.3 Thermal dataTable 3.Absolute maximum ratingsSymbol ParameterValue Unit V S DC supply voltage -0.3 to28V Single pulse t max < 400ms40V V CCStabilized supply voltage, logic supply -0.3 to 5.5V V DI , V DO, V CLK , V CSN, V pwm1Digital input / output voltage -0.3 to V CC + 0.3V V CM Current monitor output -0.3 to V CC + 0.3V V CP Charge pump output -25 to V S + 11V I OUT1,2,3,6,7Output current ±5A I OUT4,5,8Output current±10ATable 4.ESD protectionParameterValue Unit All pins± 2(1)1.HBM according to MIL 883C, Method 3015.7 or EIA/JESD22-A114-A.kV Output pins: OUT1 - OUT8± 8(2)2.HBM with all unzapped pins grounded.kVTable 5.Operating junction temperatureSymbol ParameterValue Unit T jOperating junction temperature-40 to 150°CElectrical specificationsL9953 / L9953XP10/38 Doc ID 14278 Rev 32.4 Electrical characteristicsV S = 8 to 16V , V CC = 4.5 to 5.3V , T j = - 40 to 150°C, unless otherwise specified.The voltages are referred to GND and currents are assumed positive, when the currentflows into the pin.Table 6.Temperature warning and thermal shutdownSymbol ParameterMin.Typ.Max.Unit T jTW ON Temperature warning threshold junction temperatureT j 130150°C T jSD ON Thermal shutdown threshold junction temperatureT j increasing 170°C T jSD OFFThermal shutdown threshold junction temperatureT jdecreasing150°C T jSD HYS Thermal shutdown hysteresis5°KTable 7.SupplySymbol ParameterTest conditionMin.Typ.Max.Unit V SOperating supply voltage range728VI SV S DC supply currentV S = 16V , V CC = 5.3V active modeOUT1 - OUT8 floating 720mAV S quiescent supply currentV S = 16V , V CC = 0V standby modeOUT1 - OUT8 floating T test = -40°C, 25°C 412µAT test = 85°C (1)1.Guaranteed by design.625µA I CCV CC DC supply currentV S = 16V , V CC = 5.3V CSN = V CC , active mode 13mAV CC quiescent supply currentV S = 16V , V CC = 5.3V CSN = V CC standby mode OUT1 - OUT8 floating 2550µAI S + I CCSum quiescent supply currentV S = 16V , V CC = 5.3V CSN = V CC standby modeOUT1 - OUT8 floating T test = 130°C50100µA分销商库存信息:STML9953XP L9953XPTR L9953TR L9953。

PA85中文资料

容性负载AV = +1全温度范围470pF
.建立时间1％CC = 10pf, 2V step1μs
电阻，空载RCL = 050Ω
电源
电压6全温度范围±15±150±225V
电流，静态2125mA
热
电阻，交流，
结到外壳5全温度范围F > 60Hz2.5°C/W
电阻，直流
结到外壳5全温度范围F < 60Hz4.2
4。+ VS和-比表示正，负电源轨分别。
5。评级适用于如果两者之间的输出电流输出晶体管候补的增长率高于60赫兹。
6。减额最大电源评级.625第V /低于25°C案℃。无降容需要25℃以上的情况。
注意
从构造的PA85 MOSFET晶体管。防静电处理程序必须得到遵守。内部基板包含氧化铍（BeO）。不要拆封。如不慎损坏，请不要挤压，机，或须在850℃，以避免产生有毒气体以上的温度。
共模抑制，直流VCM =±90V90110dB
噪声100kHz BW, RS = 1KΩ,
CC = 10pf1μVrms
增益
开环，@15HzRL = 2KΩ,CC = OPEN96111dB
增益带宽积在1MHzRL = 2KΩCC = 3.3pf100MHz
功率带宽CC = 10pf300kHz
CC = 3.3pf500kHz
输入保护
虽然PA85可承受的差分电压高达±25V的，额外的外部保护建议。由于在PA85是一种高速放大器，低漏电，低电容
作为二极管连接JFETs建议（例如2N4416，第一至第四季度在图2）。差分输入电压钳位到±1.4V时。这足以产生超速最大功率带宽。
电源保护
齐纳二极管的瞬态抑制器单向建议由于在电源引脚保护。该齐纳二极管钳位瞬变内的电源电压和额定还钳电源逆转到地面。无论是齐纳二极管使用与否，系统电源应评估包括瞬态性能上电过冲和关闭电源极性反转以及电压调节。条件，可能会导致开路或极性反转在任一电源轨应避免或保护反对。转回或打开上负电源轨众所周知，导致输入级失败。单向transzorbs防止这种情况，这是可取的，他们既电并尽量靠近身体尽可能放大器。

SNJ54AS138J中文资料

PACKAGING INFORMATIONOrderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)5962-86866012A ACTIVE LCCC FK201TBD Call TI Level-NC-NC-NC 5962-8686601FA ACTIVE CFP W161TBD Call TI Level-NC-NC-NC JM38510/37701B2A ACTIVE LCCC FK201TBD Call TI Level-NC-NC-NC JM38510/37701BEA ACTIVE CDIP J161TBD Call TI Level-NC-NC-NC SN54ALS138AJ ACTIVE CDIP J161TBD Call TI Level-NC-NC-NC SN54AS138J ACTIVE CDIP J161TBD Call TI Level-NC-NC-NC SN74ALS138AD ACTIVE SOIC D1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74ALS138ADG4ACTIVE SOIC D1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74ALS138ADR ACTIVE SOIC D162500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74ALS138ADRG4ACTIVE SOIC D162500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74ALS138AN ACTIVE PDIP N1625Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCSN74ALS138ANE4ACTIVE PDIP N1625Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCSN74ALS138ANSR ACTIVE SO NS162000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74ALS138ANSRE4ACTIVE SO NS162000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AS138D ACTIVE SOIC D1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AS138DE4ACTIVE SOIC D1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AS138DR ACTIVE SOIC D162500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AS138DRE4ACTIVE SOIC D162500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AS138N ACTIVE PDIP N1625Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NC SN74AS138N3OBSOLETE PDIP N16TBD Call TI Call TISN74AS138NE4ACTIVE PDIP N1625Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCSN74AS138NSR ACTIVE SO NS162000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AS138NSRE4ACTIVE SO NS162000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SNJ54ALS138AFK ACTIVE LCCC FK201TBD Call TI Level-NC-NC-NC SNJ54ALS138AJ ACTIVE CDIP J161TBD Call TI Level-NC-NC-NC SNJ54ALS138AW ACTIVE CFP W161TBD Call TI Level-NC-NC-NC SNJ54AS138FK ACTIVE LCCC FK201TBD Call TI Level-NC-NC-NC SNJ54AS138J ACTIVE CDIP J161TBD Call TI Level-NC-NC-NC (1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-The planned eco-friendly classification:Pb-Free(RoHS)or Green(RoHS&no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Green(RoHS&no Sb/Br):TI defines"Green"to mean Pb-Free(RoHS compatible),and free of Bromine(Br)and Antimony(Sb)based flame retardants(Br or Sb do not exceed0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.元器件交易网IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. T esting and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. T o minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI.Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation.Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAmplifiers Audio /audioData Converters Automotive /automotiveDSP Broadband /broadbandInterface Digital Control /digitalcontrolLogic Military /militaryPower Mgmt Optical Networking /opticalnetwork Microcontrollers Security /securityTelephony /telephonyVideo & Imaging /videoWireless /wirelessMailing Address:Texas InstrumentsPost Office Box 655303 Dallas, Texas 75265Copyright 2005, Texas Instruments Incorporated。

镍合金油套管产品手册

油管/Tubing
Grade 110
Burst
Collapse
Joint
resistance strength
MPa
MPa
Байду номын сангаасKN
100.2 100.3
882
127.4 142.2
131.6 145.1
1097.6 1251.2
81.9
67.1 1087.8
96.3
93.3 1264.2
109.6
114.9
Min
20.5 33.0 4.0
BG2235
Max 0.03 0.75 1.0 23.5 38.0 5.0 0.7
Min
24.0 29.0 2.5
BG2532
Max 0.03 0.5 1.0 27.0 36.5 4.0 1.5
力学性能
Mechanical properties
grade
110 125 140
80 109.2
Joint strength
KN
1009.4 1254.4 1381.8 1234.8 1440.6 1617 2048.2 1489.6 1705.2 2116.8 1852.2 1999.2 2126.6 2450
Burst
MPa
76 89 109 132 144 75.4 83 99 114 131 68.3 78 88 98 107 116 64.9 74.2 85.1 98.9
宝山钢铁股份有限公司
BAOSHAN IRON & STEEL CO., LTD.
镍基合金油套管产品
Ni-based Alloy Tubing & Casing

ADS8555SPM;ADS8555SPMR;中文规格书,Datasheet资料

BUSY/INTRANGE/XCLKHW/SWREF/WRRESETENSTBYCSRD/DB[15:0]WORD/BYTEPAR/SERFSCH_A0CONVST_AAGNDREFC_AREF_IOAGNDCH_A1AGNDCH_B0CONVST_BAGNDREFC_BCH_B1AGNDCH_C0CONVST_CAGNDREFC_CCH_C1AGNDADS8555 SBAS531B–DECEMBER2010–REVISED FEBRUARY201116-Bit,Six-Channel,Simultaneous SamplingANALOG-TO-DIGITAL CONVERTERCheck for Samples:ADS8555FEATURES DESCRIPTION•Six SAR ADCs Grouped in Three Pairs The ADS8555contains six low-power,16-bit,successive approximation register(SAR)-based •Maximum Data Rate Per Channel with Internalanalog-to-digital converters(ADCs)with true bipolar Clock and Reference:inputs.Each channel contains a sample-and-hold 630kSPS(Parallel)or450kSPS(Serial)circuit that allows simultaneous high-speed •Maximum Data Rate Per Channel with External multi-channel signal acquisition.Clock and Reference:The ADS8555supports data rates of up to630kSPS 800kSPS(Parallel)or500kSPS(Serial)in parallel interface mode or up to450kSPS if the •Pin-Selectable or Programmable Input Voltageserial interface is used.The bus width of the parallel Ranges:Up to±12V interface can be set to eight or16bits.In serial•Excellent AC Performance:mode,up to three output channels can be activated.91.5dB SNR,–94dB THDThe ADS8555is specified over the extended •Programmable and Buffered Internal industrial temperature range of–40°C to+125°C and Reference:0.5V to2.5V and0.5V to3.0V is available in an LQFP-64package.•Comprehensive Power-Down Modes:Deep Power-Down(Standby Mode)Auto-Nap Power-Down•Selectable Parallel or Serial Interface•Operating Temperature Range:–40°C to+125°C•LQFP-64PackageAPPLICATIONS•Power Quality Measurement•Protection Relays•Multi-Axis Motor Control•Programmable Logic Controllers•Industrial Data AcquisitionPlease be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.All trademarks are the property of their respective owners.ADS8555SBAS531B–DECEMBER2010–REVISED This integrated circuit can be damaged by ESD.Texas Instruments recommends that all integrated circuits be handled with appropriate precautions.Failure to observe proper handling and installation procedures can cause damage.ESD damage can range from subtle performance degradation to complete device failure.Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.PACKAGE/ORDERING INFORMATIONFor the most current package and ordering information,see the Package Option Addendum at the end of this document,or visit the device product folder at .ABSOLUTE MAXIMUM RATINGS(1)Over operating free-air temperature range,unless otherwise noted.ADS8555UNIT Supply voltage,HVDD to AGND–0.3to+18VSupply voltage,HVSS to AGND–18to+0.3VSupply voltage,AVDD to AGND–0.3to+6VSupply voltage,BVDD to BGND–0.3to+6V Analog input voltage HVSS–0.3to HVDD+0.3V Reference input voltage with respect to AGND AGND–0.3to AVDD+0.3VDigital input voltage with respect to BGND BGND–0.3to BVDD+0.3V Ground voltage difference AGND to BGND±0.3VInput current to all pins except supply–10to+10mA Maximum virtual junction temperature,T J+150°C Human body model(HBM)±2000V JEDEC standard22,test method A114-C.01,all pinsESD ratingsCharged device model(CDM)±500V JEDEC standard22,test method C101,all pins(1)Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device.These are stress ratingsonly and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.THERMAL INFORMATIONADS8555THERMAL METRIC(1)PM UNITS64PINSθJA Junction-to-ambient thermal resistance48θJCtop Junction-to-case(top)thermal resistance16θJB Junction-to-board thermal resistance N/A°C/WψJT Junction-to-top characterization parameter N/AψJB Junction-to-board characterization parameter N/AθJCbot Junction-to-case(bottom)thermal resistance N/A(1)For more information about traditional and new thermal metrics,see the IC Package Thermal Metrics application report,SPRA953A.ADS8555 SBAS531B–DECEMBER2010–REVISED FEBRUARY2011RECOMMENDED OPERATING CONDITIONSMIN TYP MAX UNIT Supply voltage,AVDD to AGND 4.55 5.5VLow-voltage levels 2.7 3.0 3.6V Supply voltage,BVDD to BGND5V logic levels 4.55 5.5VInput range=±2×V REF2×V REF16.5VInput supply voltage,HVDD to AGNDInput range=±4×V REF4×V REF16.5VInput range=±2×V REF–16.5–2×V REF VInput supply voltage,HVSS to AGNDInput range=±4×V REF–16.5–4×V REF V Reference input voltage(V REF)0.5 2.5 3.0VInput range=±2×V REF–2×V REF2×V REF V Analog inputs(also see the Analog Inputs section)Input range=±4×V–4×V REF4×V REF VREFOperating ambient temperature range,T A–40+125°C ELECTRICAL CHARACTERISTICSOver recommended operating free-air temperature range of–40°C to+125°C,AVDD=4.5V to5.5V,BVDD=2.7V to5.5V, HVDD=10V to15V,HVSS=–15V to–10V,V REF=2.5V(internal),and f DATA=maximum,unless otherwise noted.ADS8555PARAMETER CONDITIONS MIN TYP(1)MAX UNITDC ACCURACYResolution16BitsNo missing codes16BitsAt T A=–40°C to+85°C–3±1.53LSB Integral linearity error INLAt T A=–40°C to+125°C–4±1.54LSBAt T A=–40°C to+85°C–1±0.75 1.5LSB Differential linearity error DNLAt T A=–40°C to+125°C–1±0.752LSB Offset error–4.0±0.8 4.0mV Offset error drift±3.5μV/°C Gain error Referenced to voltage at REFIO–0.75±0.250.75%FSR Gain error drift Referenced to voltage at REFIO±6ppm/°C Power-supply rejection ratio PSRR At output code FFFFh,related to AVDD60dB SAMPLING DYNAMICSAcquisition time t ACQ280ns Conversion time per ADC t CONV 1.26μs18.5t CCLK Internal conversion clock period t CCLK68.0nsParallel interface,internal clock and reference630kSPS Throughput rate f DATASerial interface,internal clock and reference450kSPSAC ACCURACYAt f IN=10kHz,T A=–40°C to+85°C9091.5dB Signal-to-noise ratio SNRAt f IN=10kHz,T A=–40°C to+125°C8991.5dBAt f IN=10kHz,T A=–40°C to+85°C8789.5dB Signal-to-noise ratio+distortion SINADAt f IN=10kHz,T A=–40°C to+125°C86.589.5dBAt f IN=10kHz,T A=–40°C to+85°C–94–90dB Total harmonic distortion(2)THDAt f IN=10kHz,T A=–40°C to+125°C–94–89.5At f IN=10kHz,T A=–40°C to+85°C9095dB Spurious-free dynamic range SFDRAt f IN=10kHz,T A=–40°C to+125°C89.595dB Channel-to-channel isolation At f IN=10kHz100dBInput Range=±4×V REF48MHz–3dB small-signal bandwidthInput Range=±2×V REF24MHz(1)All values are at T A=+25°C.(2)Calculated on the first nine harmonics of the input frequency.ADS8555SBAS531B–DECEMBER2010–REVISED ELECTRICAL CHARACTERISTICS(continued)Over recommended operating free-air temperature range of–40°C to+125°C,AVDD=4.5V to5.5V,BVDD=2.7V to5.5V, HVDD=10V to15V,HVSS=–15V to–10V,V REF=2.5V(internal),and f DATA=maximum,unless otherwise noted.ADS8555PARAMETER CONDITIONS MIN TYP(1)MAX UNIT ANALOG INPUTRANGE pin/RANGE bit=0–4×V REF4×V REF V Bipolar full-scale range CHXXRANGE pin/RANGE bit=1–2×V REF2×V REF VInput range=±4×V REF10pF Input capacitanceInput range=±2×V REF20pF Input leakage current No ongoing conversion±1μA Aperture delay5ns Aperture delay matching Common CONVST for all channels250ps Aperture jitter50ps EXTERNAL CLOCK INPUT(XCLK)External clock frequency f XCLK An external reference must be used for f XCLK>f CCLK11820MHz External clock duty cycle4555% REFERENCE VOLTAGE OUTPUT(REF OUT)2.5V operation,REFDAC=0x3FF 2.485 2.5 2.515V2.5V operation,REFDAC=0x3FF at+25°C 2.496 2.5 2.504V Reference voltage V REF3.0V operation,REFDAC=0x3FF 2.985 3.0 3.015V3.0V operation,REFDAC=0x3FF at+25°C 2.995 3.0 3.005V Reference voltage drift dV REF/dT±10ppm/°C Power-supply rejection ratio PSRR73dB Output current I REFOUT DC current–22mA Short-circuit current(3)I REFSC50mA Turn-on settling time t REFON10msAt CREF_x pins 4.710μF External load capacitanceAt REFIO pins100470nF Tuning range REFDAC Internal reference output voltage range0.2×V REF V REF V REFDAC resolution10Bits REFDAC differential nonlinearity DNL DAC–1±0.11LSB REFDAC integral nonlinearity INL DAC–2±0.12LSB REFDAC offset error V OSDAC V REF=0.5V(DAC=0x0CC)–4±0.654LSB REFERENCE VOLTAGE INPUT(REF IN)Reference input voltage V REFIN0.5 2.5 3.025VInput resistance100MΩInput capacitance5pF Reference input current1μA SERIAL CLOCK INPUT(SCLK)Serial clock input frequency f SCLK0.136MHz Serial clock period t SCLK0.027810μs Serial clock duty cycle4060% DIGITAL INPUTS(4)Logic family CMOS with Schmitt-TriggerHigh-level input voltage0.7×BVDD BVDD+0.3VLow-level input voltage BGND–0.30.3×BVDD VInput current V I=BVDD to BGND–50+50nA Input capacitance5pF(3)Reference output current is not limited internally.(4)Specified by design.ADS8555 SBAS531B–DECEMBER2010–REVISED FEBRUARY2011ELECTRICAL CHARACTERISTICS(continued)Over recommended operating free-air temperature range of–40°C to+125°C,AVDD=4.5V to5.5V,BVDD=2.7V to5.5V, HVDD=10V to15V,HVSS=–15V to–10V,V REF=2.5V(internal),and f DATA=maximum,unless otherwise noted.ADS8555PARAMETER CONDITIONS MIN TYP(1)MAX UNIT DIGITAL OUTPUTS(5)Logic family CMOSHigh-level output voltage I OH=100μA BVDD–0.6BVDD VLow-level output voltage I OH=–100μA BGND BGND+0.4VHigh-impedance-state output current–5050nA Output capacitance5pF Load capacitance30pF POWER-SUPPLY REQUIREMENTSAnalog supply voltage AVDD 4.5 5.0 5.5V Buffer I/O supply voltage BVDD 2.7 3.0 5.5VInput positive supply voltage HVDD 5.010.016.5VInput negative supply voltage HVSS–16.5–10.0–5.0Vf DATA=maximum30.036.0mAf DATA=250kSPS(auto-NAP mode)14.016.5mA Analog supply current(6)IAVDD Auto-NAP mode,no ongoing conversion,4.0 6.0mAinternal conversion clockPower-down mode0.150.0μAf DATA=maximum0.9 2.0mAf DATA=250kSPS(auto-NAP mode)0.5 1.5mA Buffer I/O supply current(7)IBVDD Auto-NAP mode,no ongoing conversion,0.110.0μAinternal conversion clockPower-down mode0.110.0μAf DATA=maximum 3.0 3.5mAf DATA=250kSPS(auto-NAP mode) 1.6 2.0mA Input positive supply current(8)IHVDD Auto-NAP mode,no ongoing conversion,0.20.3μAinternal conversion clockPower-down mode0.110.0μAf DATA=maximum 3.6 4.0mAf DATA=250kSPS(auto-NAP mode) 1.8 2.2mA Input negative supply current(9)IHVSS Auto-NAP mode,no ongoing conversion,0.20.25μAinternal conversion clockPower-down mode0.110.0μAf DATA=maximum251.7298.5mWf DATA=250kSPS(auto-NAP mode)122.5150.0mW Power dissipation(10)Auto-NAP mode,no ongoing conversion,26.038.3mWinternal conversion clockPower-down mode 3.8580.0μW(5)Specified by design.(6)At AVDD=5V.(7)At BVDD=3V,parallel mode,load capacitance=6pF/pin.(8)At HVDD=15V.(9)At HVSS=–15V.(10)At AVDD=5V,BVDD=3V,HVDD=15V,and HVSS=–15V.48474645444342414039383736353433CH_C1AVDD AVDD CH_C0AGND AGND CH_B1AVDD AVDD CH_B0AGND AGND CH_A1AVDD AVDD CH_A012345678910111213141516DB14/REFBUF ENDB13/SDIDB12DB11DB10/SDO_C DB9/SDO_B DB8/SDO_ABGND BVDDDB7/HB /DC EN EN DB6/SCLK DB5/DCIN_A DB4/DCIN_B DB3/DCIN_C DB2/SEL_C DB1/SEL_B D B 15D B 0/SE L _AR E F /W RE N B U S Y /I N TH W /S WC S F S/P A R /S E RR DA V D DC O N V S T _CA G N DC O N V S T _BR E F C _CC O N V S T _AA G N DS T B YR E F C _BA G N DA G N DA V D DR E F C _AR A N G E /X C L KA G N DR E S E TA G N DW O R D /B Y T ER E F I OH V S SA V D DH V D DA G N DA G N D6463626160595857565554171819202122232425262753525150492829303132ADS8555SBAS531B –DECEMBER 2010–REVISED FEBRUARY 2011EQUIVALENT INPUT CIRCUITSPIN CONFIGURATIONPM PACKAGE LQFP-64(TOP VIEW)ADS8555 SBAS531B–DECEMBER2010–REVISED FEBRUARY2011PIN DESCRIPTIONSDESCRIPTIONNAME PIN#TYPE(1)PARALLEL INTERFACE(PAR/SER=0)SERIAL INTERFACE(PAR/SER=1)Hardware mode(HW/SW=0):Reference buffers enable input.When low,all reference buffers are enabled(mandatory ifinternal reference is used).When high,all reference buffers DB14/REFBUF EN1DIO/DI Data bit14input/output are disabled.Software mode(HW/SW=1):Connect to BGND or BVDD.The reference buffers are controlled by bit C24(REFBUF)incontrol register(CR).Hardware mode(HW/SW=0):Connect to BGND DB13/SDI2DIO/DI Data bit13input/outputSoftware mode(HW/SW=1):Serial data input DB123DIO Data bit12input/output Connect to BGNDDB114DIO Data bit11input/output Connect to BGNDWhen SEL_C=1,data output for channel C DB10/SDO_C5DIO/DO Data bit10input/outputWhen SEL_C=0,this pin should be tied to BGNDWhen SEL_B=1,data output for channel BWhen SEL_B=0,this pin should be tied to BGND DB9/SDO_B6DIO/DO Data bit9input/outputWhen SEL_C=0,data from channel C1are also availableon this outputData output for channel AWhen SEL_C=0,data from channel C0are also available DB8/SDO_A7DIO/DO Data bit8input/output on this outputWhen SEL_C=0and SEL_B=0,SDO_A acts as the singledata output for all channelsBGND8P Buffer I/O ground,connect to digital ground planeBuffer I/O supply,connect to digital supply(2.7V to5.5V).Decouple with a1μF ceramic capacitor or a BVDD9Pcombination of100nF and10μF ceramic capacitors to BGND.Word mode(WORD/BYTE=0):Data bit7input/outputDaisy-chain enable input.Byte mode(WORD/BYTE=1):DB7/HB EN/DC EN10DIO/DI/DI When high,DB[5:3]serve as daisy-chain inputs DCIN[A:C].High byte enable input.If daisy-chain mode is not used,connect to BGND.When high,the high byte is output first onDB[15:8].When low,the low byte is output first onDB[15:8].Word mode(WORD/BYTE=0):Data bit6input/outputDB6/SCLK11DIO/DI Serial interface clock input(36MHz max)Byte mode(WORD/BYTE=1):Connect to BGND or BVDDWord mode(WORD/BYTE=0):Data bit5input/output When DCEN =1,daisy-chain data input for channel ADB5/DCIN_A12DIO/DIWhen DC EN=0,connect to BGNDByte mode(WORD/BYTE=1):Connect to BGND or BVDDWord mode(WORD/BYTE=0):When SEL_B=1and DC EN=1,daisy-chain data input forData bit4input/outputDB4/DCIN_B13DIO/DI channel BByte mode(WORD/BYTE=1):When DCEN =0,connect to BGNDConnect to BGND or BVDDWord mode(WORD/BYTE=0):When SEL_C=1and DC EN=1,daisy-chain data input forData bit3input/outputDB3/DCIN_C14DIO/DI channel CByte mode(WORD/BYTE=1):When DCEN =0,connect to BGNDConnect to BGND or BVDDWord mode(WORD/BYTE=0):Data bit2input/output Select SDO_C input.DB2/SEL_C15DIO/DIWhen high,SDO_C is active.When low,SDO_C is disabled.Byte mode(WORD/BYTE=1):Connect to BGND or BVDDWord mode(WORD/BYTE=0):Data bit1input/output Select SDO_B input.DB1/SEL_B16DIO/DIWhen high,SDO_B is active.When low,SDO_B is disabled.Byte mode(WORD/BYTE=1):Connect to BGND or BVDD(1)AI=analog input;AIO=analog input/output;DI=digital input;DO=digital output;DIO=digital input/output;and P=power supply.ADS8555SBAS531B–DECEMBER2010–REVISED PIN DESCRIPTIONS(continued)DESCRIPTIONNAME PIN#TYPE(1)PARALLEL INTERFACE(PAR/SER=0)SERIAL INTERFACE(PAR/SER=1)Word mode(WORD/BYTE=0):Select SDO_A input.Data bit0(LSB)input/outputDB0/SEL_A17DIO/DI When high,SDO_A is active.When low,SDO_A is disabled.Byte mode(WORD/BYTE=1):Should always be high.Connect to BGND or BVDDWhen CR bit C21=0(BUSY/INT),converter busy status output.Transitions high when a conversion has beenstarted and remains high during the entire process.Transitions low when the conversion data of all six channelsare latched to the output register and remains low thereafter.In sequential mode(SEQ=1in the CR),the BUSY output transitions high when a conversion has been started BUSY/INT18DOand goes low for a single conversion clock cycle(t CCLK)whenever a channel pair conversion is completed.When bit C21=1(BUSY/INT in CR),interrupt output.This bit transitions high after a conversion has beencompleted and goes low with the first read data access.The polarity of BUSY/INT output can be changed using bit C20(BUSY L/H)in the control register.Chip select input.Frame synchronization.CS/FS19DI/DI When low,the parallel interface is enabled.WhenThe falling edge of FS controls the frame transfer.high,the interface is disabled.Read data input.RD20DI When low,the parallel data output is enabled.Connect to BGNDWhen high,the data output is disabled.Hardware mode(HW/SW=0):Conversion start of channel pair C.The rising edge of this signal initiates simultaneous conversion of analog signals at inputs CH_C[1:0].CONVST_C21DISoftware mode(HW/SW=1):Conversion start of channel pair C in sequential mode(CR bit C23=1)only;connect to BGND or BVDD otherwiseHardware mode(HW/SW=0):Conversion start of channel pair B.The rising edge of this signal initiates simultaneous conversion of analog signals at inputs CH_B[1:0].CONVST_B22DISoftware mode(HW/SW=1):Conversion start of channel pair B in sequential mode(CR bit C23=1)only;connect to BGND or BVDD otherwiseHardware mode(HW/SW=0):Conversion start of channel pair A.The rising edge of this signal initiates simultaneous conversion of analog signals at inputs CH_A[1:0].CONVST_A23DISoftware mode(HW/SW=1):Conversion start of all selected channels except in sequential mode(CR bit C23=1):Conversion start of channel pair A onlyStandby mode input.When low,the entire device is powered down(including the internal clock and reference).STBY24DIWhen high,the device operates in normal mode.25,32,37,38,Analog ground,connect to analog ground plane43,44,AGND P Pin25may have a dedicated ground if the difference between its potential and AGND is always kept within 49,52,±300mV.53,55,57,5926,34,Analog power supply(4.5V to5.5V).Decouple each pin with a100nF ceramic capacitor to e an 35,40,additional10μF capacitor to AGND close to the device but without compromising the placement of the smaller AVDD41,46,Pcapacitor.Pin26may have a dedicated power supply if the difference between its potential and AVDD is always 47,50,kept within±300mV.60Hardware mode(HW/SW=0):Input voltage range select input.When low,the analog input range is±4V REF.When high,the analog input range is±2V REF.RANGE/XCLK27DI/DIOSoftware mode(HW/SW=1):External conversion clock input,if CR bit C11(CLKSEL)is set high or internalconversion clock output,if CR bit C10(CLKOUT_EN)is set high.If not used,connect to BVDD or BGND.Reset input,active high.Aborts any ongoing conversions.Resets the internal control register to0x000003FF.The RESET28DIRESET pulse should be at least50ns long.Output mode selection input.When low,data are transferred in word mode usingDB[15:0].When high,data are transferred in byteWORD/BYTE29DI Connect to BGNDmode using DB[15:8]with the byte order controlledby HB EN pin while two accesses are required for acomplete16-bit transfer.Negative supply voltage for the analog inputs(–16.5V to–5V).HVSS30P Decouple with a100nF ceramic capacitor to AGND placed next to the device and a10μF capacitor to AGND closeto the device but without compromising the placement of the smaller capacitor.Positive supply voltage for the analog inputs(5V to16.5V).Decouple with a100nF ceramic capacitor to AGND HVDD31P placed next to the device and a10μF capacitor to AGND close to the device but without compromising theplacement of the smaller capacitor.Analog input of channel A0.The input voltage range is controlled by RANGE pin in hardware mode or CR bit C26 CH_A033AI(RANGE_A)in software mode.Analog input of channel A1.The input voltage range is controlled by RANGE pin in hardware mode or CR bit C26 CH_A136AI(RANGE_A)in software mode.ADS8555 SBAS531B–DECEMBER2010–REVISED FEBRUARY2011PIN DESCRIPTIONS(continued)DESCRIPTIONNAME PIN#TYPE(1)PARALLEL INTERFACE(PAR/SER=0)SERIAL INTERFACE(PAR/SER=1)Analog input of channel B0.The input voltage range is controlled by RANGE pin in hardware mode or CR bit C27 CH_B039AI(RANGE_B)in software mode.Analog input of channel B1.The input voltage range is controlled by RANGE pin in hardware mode or CR bit C27 CH_B142AI(RANGE_B)in software mode.Analog input of channel C0.The input voltage range is controlled by RANGE pin in hardware mode or CR bit C28 CH_C045AI(RANGE_C)in software mode.Analog input of channel C1.The input voltage range is controlled by RANGE pin in hardware mode or CR bit C28 CH_C148AI(RANGE_C)in software mode.Reference voltage input/output(0.5V to3.025V).The internal reference is enabled via REF EN/WR pin in hardware mode or CR bit C25(REF EN)in software mode.REFIO51AIOThe output value is controlled by the internal DAC(CR bits C[9:0]).Connect a470nF ceramic decouplingcapacitor between this pin and pin52.Decoupling capacitor for reference of channels A.REFC_A54AIConnect a10μF ceramic decoupling capacitor between this pin and pin53.Decoupling capacitor for reference of channels B.REFC_B56AIConnect a10μF ceramic decoupling capacitor between this pin and pin55.Decoupling capacitor for reference of channels C.REFC_C58AIConnect a10μF ceramic decoupling capacitor between this pin and pin57.Interface mode selection input.PAR/SER61DIWhen low,the parallel interface is selected.When high,the serial interface is enabled.Mode selection input.HW/SW62DI When low,the hardware mode is selected and part works according to the settings of external pins.When high,the software mode is selected in which the device is configured by writing into the control register.Hardware mode(HW/SW=0):Hardware mode(HW/SW=0):Internal reference enable input.Internal reference enable input.When high,the internal reference is enabled(the When high,the internal reference is enabled(the referencereference buffers are to be enabled).When low,buffers are to be enabled).When low,the internal referencethe internal reference is disabled and an external is disabled and an external reference should be applied at REF EN/WR63DI reference is applied at REFIO.REFIO.Software mode(HW/SW=1):Write input.The parallel data input is enabled,when CS and Software mode(HW/SW=1):Connect to BGND or BVDD.WR are low.The internal reference is enabled by The internal reference is enabled by CR bit C25(REF EN).the CR bit C25(REF EN).DB1564DIO Data bit15(MSB)input/output Connect to BGNDADS8555SBAS531B–DECEMBER2010–REVISED TIMING CHARACTERISTICSFigure1.Serial Operation Timing Diagram(All Three SDOs Active)SERIAL INTERFACE TIMING REQUIREMENTS(1)Over recommended operating free-air temperature range at–40°C to+125°C,AVDD=5V,and BVDD=2.7V to5.5V,unless otherwise noted.ADS8555PARAMETER MIN MAX UNITt ACQ Acquisition time280nst CONV Conversion time 1.26µst1CONVST_x low time20nst2BUSY low to FS low time0nst3Bus access finished to next conversion start time40nst D1CONVST_x high to BUSY high delay520nst D2FS low to SDO_x active delay512nst D3SCLK rising edge to new data valid delay15nst D4FS high to SDO_x3-state delay10nst H1Input data to SCLK falling edge hold time5nst H2Output data to SCLK rising edge hold time5nst S1Input data to SCLK falling edge setup time3nst S3CONVST_x high to XCLK falling or rising edge setup time6nst SCLK Serial clock period0.027810μs(1)All input signals are specified with t R=t F=1.5ns(10%to90%of BVDD)and timed from a voltage level of(V IL+V IH)/2.分销商库存信息:TIADS8555SPM ADS8555SPMR。

2SC2655中文资料

2SC2655中文资料TOSHIBA Transistor Silicon NPN Epitaxial Type (PCT Process) 2SC2655Power Amplifier Applications Power Switching Applications Low saturation voltage: V CE (sat) = 0.5 V (max) (I C = 1 A) ? High collector power dissipation: P C = 900 mW ? High-speed switching: t stg = 1.0 μs (typ.) ? Complementary to 2SA1020.Absolute Maximum Ratings (Ta = 25°C)Characteristics Symbol Rating UnitCollector-base voltage V CBO 50 V Collector-emitter voltage V CEO 50 V Emitter-base voltage V EBO5 VCollector current I C 2 A Base currentI B 0.5 ACollector power dissipation P C 900 mWJunction temperature T j 150 °C Storage temperature range T stg55 to 150°CNote: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change intemperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook(“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).Industrial ApplicationsUnit: mmJEDEC TO-92MOD JEITA ―TOSHIBA 2-5J1AWeight: 0.36 g (typ.)Electrical Characteristics (Ta = 25°C)Note: h FE (1) classification O: 70 to 140, Y: 120 to 240Markinglead (Pb)-free package or lead (Pb)-free finish.indicatorC o l l e c t oCollector current I C (A)V CE – I CC o l l e c t o r -em i t t e r v o lt a g e V C E (V )Collector current I C (A)V CE (sat) – I CC o l l e c t o r -e m i t t e r s a t u r a t i on v o l t a g e VC E (s a t ) (V )Collector current I C (A)h FE – I CD C c u r r e n tg a i n h F E Collector current I C (A) V CE – I CC o l l e c t o r -e m itt e r v o l t a g eV C E (V )Collector current I C (A) V CE – I CC o l l e c t o r -em i t t e r v o l t a g e V C E (V )0.010.03 0.1 14 6 8 10V BE (sat) – I CB a s e -e m i t t e r s a t u r a t io n v ol t a g e V B E (s a t ) (V ) I C – V BEC ol l e c t or c ur r e n t I C (A )Base-emitter voltage V BE (V) C o l l e c t o rc ur r e nt I C (A )Collector-emitter voltage V CE (V)Safe Operating AreaAmbient temperature Ta (°C)P C – TaC o l l e c t o r p o w e r d i s s i p a t i o n P C (m W ) 20040080010000.2 1 3 10 300.5 100RESTRICTIONS ON PRODUCT USE20070701-EN ?The information contained herein is subject to change without notice.TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property.In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc.The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.).These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medicalinstruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in his document shall be made at the customer’s own risk.The products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations.The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patents or other rights of TOSHIBA or the third parties.Please contact your sales representative for product-by-product details in this document regarding RoHS compatibility. Please use these products in this document in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances. Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations.。

Powermanagement 电源管理基础知识

17
strictly confidential · ©2007 · austriamicrosystems AG
VDD 3.3V, 500mA for 8 32Gbits
DC/DC降压转换路线图
DC/DC 直流/直流降压转换器优化的SSD
Dual DCDC 1A and 0.3A
DCDC 1.5A Output current
strictly confidential · ©2007 · austriamicrosystems AG
200.34$ 1kAS1358 竞争优势
MAX 提供 TDFN 2x2 package Outweigh / Explain away: AS1358有TSOT23封装，适合用于低噪声性能。如果大小确实是一个问题可提到微型大小的LDO AS1369 （ 1x1mm ） LP5900 是提供 6.5µ Vrms Outweigh / Explain away: 其实这已经是一个过度，而不是需要的射频。诺基亚规格30μ Vrms LDO设计始终是一个贸易平衡问题。例如LP5900输入电压范围为2.5V 至5.5V 与AS1358 2V至5.5V PSRR性能没有1359好
DCDC 2A Output current
AS1334
DCDC 0.650A Output current
Q3/09
Q3/09
Q1/10
AS1324
DCDC 0.6A Output current
Now
Now
strictly confidential · ©2007 · austriamicrosystems AG
主要特点 • 92dB PSRR @ 1kHz 有益于 • 提高射频连接灵敏度

SAE AS85485A-2011

__________________________________________________________________________________________________________________________________________ SAE Technical Standards Board Rules provide that: “This report is published by SAE to advance the state of technical and engineering sciences. The use of this report is entirely voluntary, and its applicability and suitability for any particular use, including any patent infringement arising therefrom, is the sole responsibility of the user.”SAE reviews each technical report at least every five years at which time it may be reaffirmed, revised, or cancelled. SAE invites your written comments and suggestions. Copyright © 2011 SAE InternationalAll rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical,photocopying, recording, or otherwise, without the prior written permission of SAE.TO PLACE A DOCUMENT ORDER: Tel: 877-606-7323 (inside USA and Canada)Tel: +1 724-776-4970 (outside USA)Fax: 724-776-0790Email: CustomerService@SAE WEB ADDRESS: h ttp://AS85485Issued 2004-06 RevisedRATIONALERevision required to incorporate AS85485-A2, update references, update government related terminology, and address technical requirements.1. SCOPE1.1 ScopeThis specification covers the requirements for radio frequency absorptive component wires and finished cables which function electrically as distributed low-pass filters. Materials and construction details are specified in the detail specification.1.2 ClassificationProducts in accordance with this specification shall be of the following types, as specified in the detail specification.Component Wire - A single conductor, insulated as specified in the detail specification.Finished Cable - Any construction other than component wire, utilizing a wire or wires with or without shielding, or with or without an outer jacket.1.2.1 CurrentRatingThe current rating shall be determined in accordance with AS50881.1.2.2 TemperatureRatingThe maximum conductor temperature of the component wire or finished cable for continuous use shall be as specified in the detail specification.1.2.3 VoltageRatingThe maximum voltage rating of the component wire or finished cable for continuous use shall be as specified in the detail specification.1.2.4 Component Wire and Finished Cable DesignationComponent wire and finished cable shall be identified by a combination of digits and letters (not to exceed 15).1.2.4.1Component wire: Component wire designation shall be as shown in the following example:1.2.4.1.1 Basic specification: The basic specification shall describe the performance requirements of components and finished cable.1.2.4.1.2 Detail specification: The detail specification shall describe the material and construction details of finished cable and components.1.2.4.1.3 Wire size: The component wire size shall be identified. All component wire used in a cable shall be of the same size.1.2.4.1.4 Color: The component wire color shall be designated in accordance with MIL-STD-681. The preferred color of component wire is light violet, designated 7L.1.2.4.2Finished cable: Finished cable designation shall be as shown in the following example:1.2.4.2.1 Construction: A letter symbol shall be used to designate the construction in accordance with the following: (a) Shielded, jacketed cable constructionLetter CodeConductor Type Shield Type T Tin-coated copper Tin-coated copper S Silver-coated copper Silver-coated copper NNickel-coated copperNickel-coated copperM Silver-coated high-strength copper alloy Silver-coated high-strengthcopper alloy P Nickel-coated high-strength copper alloy Nickel-coated high-strength copper alloy U Silver-coated-high-strength copper alloy Tin-coated copper V Silver-coated-high-strength copper alloy Silver-coated copperW Nickel-coated high-strength copper alloyNickel-coated copper(b) Unshielded, unjacketed cable constructionLetter Code Conductor TypecopperT Tin-coatedcopperS Silver-coatedN Nickel-coatedcopperM Silver-coated high-strength copper alloyP Nickel-coated high-strength copper alloy1.2.4.2.2 Number of components: A single digit shall be used to designate the number of component wires in thefinished cable.1.2.4.2.3 Color code designator: The letter symbol A shall be used to designate the component color code described in3.6.3.2. APPLICABLE DOCUMENTSThe following publications form a part of this document to the extent specified herein. The latest issue of SAE publications shall apply. The applicable issue of the other publications shall be the issue in effect on the date of the purchase order. In the event of conflict between the text of this document and references cited herein, the text of this document takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.2.1 SAE PublicationsAvailable from SAE International, 400 Commonwealth Drive, Warrendale, PA 15096-0001, Tel: 877-606-7323 (inside USA and Canada) or 724-776-4970 (outside USA), .AS1241 Fire Resistant Phosphate Ester Hydraulic Fluid for AircraftAMS1424 Fluid, Deicing/Anti-Icing, Aircraft, SAE Type IAS50881 Wiring, Aerospace VehicleAS85485/5* Cable, Electric, Filter Line, Component Wire, Tin-Coated Copper Conductor, Radio Frequency Absorptive, 150 °C, 600-VoltAS85485/6* Cable, Electric, Filter Line, Component Wire, Silver-Coated High Strength Copper Alloy Conductor, Radio Frequency Absorptive, 150 °C, 600-VoltAS85485/7* Cable, Electric, Filter Line, Unshielded, Unjacketed, Multiple-Component, Radio Frequency Absorptive, 150 °C, 600-VoltAS85485/8* Cable, Electric, Filter Line, Shielded, Jacketed, Radio Frequency Absorptive, 150 °C, 600-VoltAS95485/9* Cable, Electric, Filter Line, Component Wire, Tin-Coated Copper Conductor, Radio Frequency, Absorptive, 150ºC, 600-VoltAS85485/10* Cable, Electric, Filter Line, Component Wire, Silver-Coated High-Strength Copper Alloy Conductor, Radio Frequency Absorptive, 150ºC, 600-VoltAS85485/11* Cable, Electric, Filter Line, Unshielded, Unjacketed, Multiple-Component, Radio Frequency Absorptive, 150ºC, 600-VoltAS85485/12* Cable, Electric, Filter Line, Shielded, Jacketed, Radio Frequency Absorptive, 150ºC, 600-Volt*AS85485 detail specification2.3 ASQ PublicationsAvailable from American Society for Quality, 600 North Plankinton Avenue, Milwaukee, WI 53203, Tel: 800-248-1946 (United States or Canada)) or +1-414-272-8575 (International), ..ASQC Z1.4 Sampling Procedures and Tables for Inspection by Attributes2.4 ASTM PublicationsAvailable from ASTM International, 100 Barr Harbor Drive, P.O. Box C700, West Conshohocken, PA 19428-2959, Tel: 610-832-9585,.B33-78 Standard Specification for Tinned Soft or Annealed Copper Wire for Electrical PurposesB63-49 (1975) Standard Test Method for Resistivity of Metallically Conducting Resistance and Contact MaterialsE104-51 Standard Recommended Practice for Maintaining Constant Relative Humidity by Means of Aqueous SolutionsB298-74a Standard Specification for Silver-Coated Soft or Annealed Copper WireB355-74 Standard Specification for Nickel-Coated Soft or Annealed Copper WireD471 Standard Test Method for Rubber Property-Effect of LiquidsE595-77 Standard Test Method for Total Mass Loss and Collected Volatile Condensable Materials From Outgassing in a Vacuum EnvironmentB624-77 Standard Specification for High-Strength, High-Conductivity Copper-Alloy Wire for Electronic ApplicationD1153-77 Standard Specification for Methyl Isobutyl KetoneD3032 Standard Test Methods for Hookup Wire InsulationD4814 Standard Specification for Automotive Spark-Ignition Engine Fuel2.5NEMA PublicationsAvailable from National Electrical Manufacturers Association, 1300 North 17th Street, Suite 1752, Roslyn, VA 22209, Tel: 703-841-3200,.NEMA HP1-1979 High-Temperature Insulated Wire – Impulse Dielectric Testing2.5 U.S. Government PublicationsAvailable from the Document Automation and Production Service (DAPS), Building 4/D, 700 Robbins Avenue, Philadelphia, PA 19111-5094, Tel: 215-697-6257, /quicksearch/.H4/H8 Catalog of Commercial and Government Entities (CAGE)(Battle Creek Customer Contact Center, Defense Logistics Information Service, 74 Washington AvenueN., Battle Creek, MI 49017-3084) https:///ccr/default.aspxSD-6 Provisions Governing QualificationMIL-STD-104 Limits for Electrical Insulation ColorMIL-STD-129 Military Marking for Shipment and StorageFED-STD-228 Cable and Wire, Insulated; Methods of TestingMIL-STD-681 Identification Coding and Application of Hook Up and Lead WireTT-I-735 IsopropylAlcoholMIL-DTL-915 Cable and Cord Electrical, for Shipboard Use, General Specification forMIL-PRF-5606 Hydraulic Fluid, Petroleum Base; Aircraft, Missile, and OrdnanceMIL-DTL-5624 Turbine Fuel, Aviation, Grades JP-4 and JP-5MIL-PRF-7808 Lubricating Oil, Aircraft Turbine Engine, Synthetic BaseMIL-DTL-12000 Cable, Cord, and Wire, Electric, Packaging ofMIL-PRF-23699 Lubricating Oil, Aircraft Turbine Engine, Synthetic BaseMIL-DTL-29606 Wire, Electrical, Stranded, Uninsulated Copper, Copper Alloy, or Aluminum, or Thermocouple Extension, General Specification ForMIL-C-43616 Cleaning Compound, Aircraft SurfaceMIL-DTL-83133 Turbine Fuel, Aviation, Kerosene Types, NATO F-34 (JP-8) and NATO F-35MIL-PRF-87937 Cleaning Compound, Aerospace Equipment3. REQUIREMENTS3.1 Detail SpecificationsThe requirements for the component wire and finished cable furnished under this specification shall be as specified herein and in accordance with the detail specification. In the event of discrepancy between this specification and the requirements of the detail specification, the requirements of the detail specification shall govern.3.2 Classification of RequirementsThe applicable requirements are classified herein as follows:Requirement ParagraphQualification 3.3Materials 3.4 Construction 3.5 Component Wire and Finished Cable 3.63.3 Qualification:The component wire or finished cable furnished under this specification shall be a product which is qualified for listing on the applicable qualified products (see 4.3 and 6.3). The provisions of 4.6 for retention of qualification are included in this requirement.3.4 MaterialsMaterial3.4.1 ConductorAll strands used in the manufacture of the conductors shall be soft annealed copper conforming to ASTM B33, B298, or B355, as applicable, or shall be high-strength copper alloy conforming to ASTM B624. Strands shall be free from lumps, kinks, splits, scraped or corroded surfaces and skin impurities. In addition, the strands shall conform to the following requirements as applicable.3.4.1.1 Tin-coated copper strands: No additional requirements. The tin coating shall be as specified in ASTM B33.3.4.1.2 Silver-coated copper strands: The strands shall have a coating thickness of not less than 40 micro-inches ofsilver when tested in accordance with ASTM B298.3.4.1.3 Nickel-coated copper strands: The strands shall have a coating thickness of not less than 50 micro-inches ofnickel when tested in accordance with ASTM B355. Adhesion of the nickel coating shall be such that, after subjection to the procedures of 4.7.7.1, the strands shall still pass the continuity of coating test in ASTM B355.3.4.1.4 High-strength copper alloy: The strands shall be of the applicable AWG gage specified in Table 1 and of suchtensile properties that the conductor from the finished wire conforms to the requirements of 3.5.1.3.2 for elongation and breaking strength. The strands shall be silver-coated or nickel-coated in accordance with 3.4.1.2 or 3.4.1.3 as applicable.Material3.4.2 Shield3.4.2.1 Braided round wire strands: Braided round wire strands shall meet all the applicable conductor materialrequirements of 3.4.1 prior to braiding.3.4.2.2 Braided flattened wire strands: Braided flattened wire strands shall meet all the applicable conductor materialrequirements of 3.4.1 prior to flattening and braiding.Material3.4.3 InsulationAll insulating and filter layer materials shall be in accordance with the detail specification and shall meet all applicable requirements of Table 3 and the detail specification.3.5 ConstructionConstruction of the component wire and finished cable shall be as specified herein and in the detail specification.3.5.1 Conductor3.5.1.1 Stranding3.5.1.1.1 Concentric-lay stranding: The conductors of wire sizes 30 through 10 shall be concentric-lay conductorsconstructed as specified in Table 1. Concentric-lay shall be interpreted to be a central strand surrounded byone or more layers of helically wound strands. It is optional for the direction of lay of the successive layers tobe alternately reversed (true concentric lay) or to be in the same direction (unidirectional lay). The strandsshall be assembled in a geometric arrangement of concentric layers, so as to produce a smooth and uniformconductor, circular in cross-section and free of any crossovers, high strands, or other irregularities. Thedirection of lay of the individual strands in the outer layer of the concentrically stranded conductors shall beleft hand. The length of lay of the outer layer shall not be less than 8 nor more than 16 times the maximumconductor diameter as specified in the detail specification.3.5.1.2 Splices: Splices in individual strands or members shall be butt brazed. There shall not be more than one strand-splice in any two lay lengths of a stranded concentric-lay conductor. In no case shall the whole conductor be spliced at one point.3.5.1.3 Conductor elongation and breaking strength:3.5.1.3.1 Soft or annealed copper: The individual strands removed from component wires with soft or annealed copperconductors, wire sizes 20 and larger, or the whole soft or annealed copper conductor removed from component wire, sizes 22 and smaller, shall have the following minimum elongation when tested in accordance with 4.7.6.1:Sizes 24 and smaller – 6 percent (minimum)Sizes 22 and larger – 10 percent (minimum)There shall be no breaking strength requirements for soft or annealed copper conductors.3.5.1.3.2 High-strength copper alloy: The whole conductor removed from component wires with high-strength copperalloy conductors shall exhibit elongation of 6 percent, minimum, and a breaking strength conforming withTable 1, when tested in accordance with 4.7.6.2.TABLE 1 - DETAILS OF CONDUCTORS3.5.1.4 Conductor diameter: The diameter of the conductor shall be as specified in Table 1. Applicability of the “generalpurpose” or of the “small diameter” Table 1 requirements for maximum conductor diameter shall be as indicated in the detail specification .3.5.2 ShieldThe shield shall be constructed as specified in the detail specification.3.5.3 InsulationThe insulating and filter layers shall be constructed as specified in the detail specification. All component insulation shall be readily removable by conventional wire stripping devices without damage to the conductor.3.6 Component Wire and Finished CableThe component wire and finished cable shall conform to the requirements of Table 3 and those of the detail specification. The requirements of 3.6.1 through 3.6.10 also apply. Unless otherwise specified, component wire shall conform to all applicable requirements prior to assembly into the finished cable.3.6.1 BlockingAdjacent turns or layers of the component wire or cable jacket shall not stick to one another when tested as specified in 4.7.4 at the temperature specified in the detail specification. 3.6.2 CablingThe required number of component wires as specified in the detail specification shall be cabled together with a left hand lay. For cables having multiple layers, the outer layer shall be left hand and the inner layer or layers may be either right hand or left hand lay. The lay length of the individual component wires shall be not less than 8 times nor more than 16 times the diameter of the applicable layer. Fillers and binders shall be used only as specified in the detail specification. 3.6.3 ColorUnless otherwise specified in the contract or purchase order, the color of component wire shall be light violet, designated by 7L. The preferred colors for components in a finished cable shall be light violet for component number 1 and light violetwith stripe designators for remaining component wires as follows:All solid colors and the colors of all striping shall be in accordance with MIL-STD-104, Class 1, unless otherwise specified. Color striping, if applicable, shall conform to MIL-STD-681 and shall be capable of withstanding the striping durability test of 4.7.11 for the number of strokes and with the weight specified in the detail specification. 3.6.4Crosslinking Proof Test and Life CycleWhen samples are tested in accordance with 4.7.10, there shall be no cracking of the insulation or jacket and no dielectric breakdown, as applicable. 3.6.5Conductor and Shield ContinuityOne hundred percent of all finished cable shall be tested for continuity prior to shipment. There shall be no indication of discontinuity in any of the component wires or shields. 3.6.6 Continuous LengthsThe individual continuous lengths of component wire or finished cable in each inspection lot shall be of such footage that, when inspected in accordance with 4.7.9, the inspection lot shall conform to the continuous length requirements of Table 2. Unless otherwise specified in the contract or order, the footage of the individual continuous lengths in each spool or reel shall be marked on the spool or reel in the sequence in which the lengths will be unwound by the user.TABLE 2 - MINIMUM CONTINUOUS LENGTHSPRODUCT DESCRIPTION REQUIRED MINIMUM PERCENT OF THE TOTAL INSPECTION LOT FOOTAGE IN CONTINUOUS LENGTHS GREATER THAN250 feet 100 feet 50 feet Component Wire 85% 100% -- Finished Cable--85%100%3.6.7 Identification of ProductThe component wire or finished cable shall be identified by a printed marking applied to the outer surface, or visible through the outer surface, of the wire or cable insulation. Identification marking of unshielded, unjacketed cable shall be located on component number 1. Identification marking of components of finished cable shall not be required. Printing of the color code designator on surface of wire insulation or jacket is not required. The printing marking shall consist of the following information:Detail specification part numberManufacturer’s code as specified in publications H4/H8For finished shielded and jacketed cable, the words “FILTER LINE” shall follow the manufacturer’s code.3.6.7.1 Identification intervals: For the component wire, the identification shall be at intervals of 9 inches to 60 inches,as measured from the beginning of one complete marking to the beginning of the succeeding completed marking. For finished cable, the distance between the end of one complete marking and the beginning of the next complete marking shall not be greater than 12 inches.3.6.7.2 Identification color: The printing shall be white in color in accordance with MIL-STD-104, Class 1. Identificationprinting shall be applied with the vertical axes of the printed characters lengthwise of the component wire or finished cable when the nominal diameter is 0.050 inch or smaller. The vertical axes of the printed characters may be either crosswise or lengthwise of the component wire or finished cable when the nominal diameter exceeds 0.050 inch. All printed characters shall be complete and legible.3.6.7.3 Durability of identification: Identification printing, when applied to the outer surface of the component wire orfinished cable, where applicable, shall be capable of withstanding the durability test specified in 4.7.11 for the number of cycles and with the weight specified in the detail specification.3.6.8 Insulation and Jacket FlawsWhen required by the detail specification, one hundred percent of the component wire and finished cable shall pass the spark test of 4.7.17.1 or the impulse dielectric test of 4.7.17.2. Testing of finished component wire or cable shall be performed during the final winding on shipment spools or reels. Component wire intended for finished cable shall be tested prior to cabling.3.6.9 WorkmanshipAll details of workmanship shall be in accordance with high grade wire and cable manufacturing practice. The insulation shall be free of cracks, splits, irregularities, and imbedded foreign material.3.6.10 Wrap TestWhen component wires are tested in accordance with 4.7.29, there shall be no cracking of insulation.3.6.11 Jacket ResistivityWhen tested in accordance with 4.7.1, the jacket resistivity for conductive jackets shall be 150 ohm-cm, maximum.3.6.12 Low Temperature (cold bend)When samples are tested in accordance with 4.7.19, there shall be no cracking of the insulation or jacket and no dielectric breakdown.4. QUALITY ASSURANCE PROVISIONS4.1 Responsibility for InspectionUnless otherwise specified in the contract or purchase order, the supplier is responsible for the performance of all inspection requirements as specified herein. Except as otherwise specified, the supplier may use his own or any other facilities suitable for the performance of the inspection requirements specified herein, unless disapproved by the qualifying activity. The qualifying activity reserves the right to perform any of the inspections set forth in the specification where such inspections are deemed necessary to assure that supplies and services conform to prescribed requirements.4.2 Classification of InspectionsThe examinations and tests of component wire and finished cable under this specification shall be divided into the following classifications:Classification ParagraphQualification inspection 4.3Quality conformance inspection 4.4Process control inspection 4.5Periodic qualification re-evaluation 4.64.3 Initial Qualification InspectionInitial Qualification inspection shall consist of the examination and tests listed in Table 3 of this specification as applicable to the component wire or finished cable. Qualification approval for finished cable must be obtained both for the component wire and for the finished construction. The qualifying activity (see 6.3) is required to perform tests as indicated in Table 3 as noted. Upon request (see 4.3.2), the qualifying activity shall provide a data package to the manufacturer for inclusion in the final test report.4.3.1 Sampling for Qualification InspectionExcept as provided in 4.3.1.1, a component wire or finished cable sample of the required length shall be tested for each range of component wire or finished cable sizes for which qualification is desired. The sample may be any size of component wire or finished cable within the size range specified below. Within each size range for which qualification is desired for shielded, jacketed cable, both a single-conductor and a multiple-conductor finished cable sample must be tested if they fall within that size range. Ten linear feet of the coated conductor strand used in the manufacture of the finished wire sample shall be submitted with the finished wire sample.Component Wire Size Range Required Length of Sample (Feet)24 and smaller 200 22 through 18 200 16 and larger 200Finished Cable Size Range Nominal Overall Diameter (Inch) Required Length of Sample (Feet)0.100 100 > 0.100 and 0.150 100 > 0.150 and 0.225 100 > 0.225 1004.3.1.1 Optional qualification samples: In cases where two or more detail specifications cover component wire orfinished cable identical in materials and construction except for conductor and/or shield material (i.e., the specified conductor or shield may be tin-coated copper, silver-coated high strength copper alloy or as specified in the detail specification), the component wire or finished cable sample in accordance with 4.3.1 may qualify any one of the detail specification components. For those detail specifications so qualified by similarity, a conductor and/or strand shall be tested in accordance with the applicable conductor and/or strand requirements in Table 3. One conductor and/or strand shall be tested for each size range specified in 4.3.1. Approval of the qualification sample shall also qualify the same component wire or finished cable size range or ranges in each of the other detail specifications. Ten linear feet of the conductor strand and shield strand applicable to the same wire or cable size range as the finished wire or cable samples shall be submitted when qualification by similarity is requested. (Note: For purposes of determining identity of construction in detail specifications under this provision, small differences in specified component wire or finished cable diameter or weight which are due to differences in the specified conductor or shield shall not be considered as constituting differences in construction of the component wire or finished cable.)TABLE 3 - PROPERTIES OF COMPONENT WIRE AND FINISHED CABLETABLE 3 - PROPERTIES OF COMPONENT WIRE AND FINISHED CABLE (CONT’D)EXAMINATION OR TEST REQUIREMENT METHODspecification 4.7.25 Thermal shock resistance 1/ Detailspecification 4.7.26 Thermal stability 1/ DetailVacuum stability Detail specification ASTM E595-77Detail specification 4.7.27.2Voltage withstand(post-environmental)4.7.28specificationWeight DetailWorkmanship 3.6.9 4.7.12 Wrap test 1/ Detail specification and 3.6.10 4.7.29FINISHED CABLEBlocking 1/ 3.6.1 4.7.4 Cabling Detail specification and 3.6.2 4.7.12Color 3.6.3 4.7.124.7.5Concentricity DetailspecificationConductor and shield continuity 3.6.5 4.7.12Construction and materials Detail specification, 3.4 and 3.5 4.7.12Continuous lengths 3.6.6 4.7.9Crosslinking proof test 1/ 3.6.4 4.7.103.6.3 and 3.6.7.34.7.11Durability of marking and colorstriping 1/Finished cable diameter 1/ Detailspecification 4.7.124.7.13Flammability DetailspecificationIdentification of product 1/ 3.6.7 4.7.124.7.15specificationImmersion DetailJacket elongation and tensileDetail specification 4.7.16strength 1/Insulation and jacket flaws Detail specification and 3.6.8 4.7.17Jacket resistivity 1/ 3.6.11 4.7.1specification 4.7.12 Jacket thickness 1/ DetailLife cycle 1/ 3.6.4 4.7.10 Low temperature (cold bend) 1/ 3.6.12 4.7.19specification 4.7.20 Shield coverage and angle 1/ DetailDetail specification 4.7.24Surface transfer impedance,effective 1/specification 4.7.26 Thermal stability 1/ DetailVacuum stability Detail specification ASTM E595-77Voltage withstand (dielectric) Detail specification 4.7.27.1Voltage withstandDetail specification 4.7.27.2(post-environmental)4.7.28Weight 1/ DetailspecificationWorkmanship 3.6.9 4.7.121/ Tests shall be performed by the qualifying activity.4.3.2 Forwarding of Qualification Samples:Samples and the manufacturer’s certified test report (excluding the qualifying activity test data except when required by the supplier) shall be forwarded to the testing laboratory designated in the letter of authorization from the activity responsible for qualification (see 6.3), plainly identified by securely attached, durable tags marked with the following information:Sample for qualification testCABLE, ELECTRIC, FILTER LINE, RADIO FREQUENCY ABSORPTIVEDetail specification part numberManufacturer’s name and code number (Publication H4/H8)Manufacturer’s part numberComprehensive description and manufacturer’s name and formulation number of the base materials from which the product is made. (This information will not be divulged by the Government.)Place and date of manufacture of sampleSubmitted by (name) (date) for qualification tests in accordance with the requirements of AS85485 under authorization (reference authorizing letter).The tags or spools must be stamped by the government inspector as representative samples of the manufacturer’s normal production capability. Samples submitted without the stamp will not be accepted.4.4 Quality Conformance InspectionQuality conformance inspection shall consist of the examinations and tests listed in Table 4 and described under “Test Methods” (4.7). Quality conformance inspection shall be performed on every lot of component wire or finished cable procured under this specification.4.4.1 Sampling for Quality Conformance InspectionANSI/ASQC Z1.4. shall apply for definitions of inspection terms used herein. For purposes of this specification, the following shall apply.4.4.1.1 Lot: The inspection lot shall include all component wire or finished cable of one part number subjected toinspection at one time.4.4.1.2 Unit of product: The unit of product for determining lot size for sampling shall be one continuous length ofcomponent wire or finished cable as offered for inspection.。

特瑞堡中文泛塞密封

最新资料请访问 2008年5月版
2
特康® 泛塞®
■ 概述
特康® 泛塞® 是一种单作用，弹簧施力的密封件，用于动态和静态运动。
泛塞® 在广泛的应用中是十分有效的。适用于要求具有较好的耐化学介质的性能时，或者要求密封件工作在极端温度下，以及用于需要良好的挤压和压缩性能的场合。
最新资料请访问 2008年5月版
1
特康® 泛塞®
■ 选择正确的密封件
特康® 泛塞® 在所有工业领域的诸如液压缸和气缸之类的元件设计中提供非常重要的作用，包括: - 极好的密封性能 - 非常耐磨损 - 抗间隙挤出性好 - 良好的耐腐蚀和耐磨性能 - 非常好的温度性能 - 摩擦系数小 - 结构紧凑 - 安装简单特康® 泛塞® 有各种几何形状和结构，允许针对每种用途选择最佳的形状。它们能够由各种特康® 材料（我们的专利PTFE基复合物）制成，这些复合物是专门针对密封件的配方，并且提供上乘的特性，专门满足我们客户的要求。当需要时，也能够用佐康® 材料（我们的专利聚乙烯基复合物）制成。为了针对您的用途，选择最好的特康® 泛塞® ，您必须首先确定功能参数，第4页的表I和表II，以及第5页的表III则能够用来对密封件和材料进行初选。这些表中详细给出了在样本的何处能够找到进一步的细节。考虑配合面的质量也是重要的，它对密封系统的使用寿命和功能有重大的影响，有关这方面的指南在13页和14页给出。如果就有关密封件的技术规格需要帮助，请联系特瑞堡密封系统公司，可以找您当地的市场部门，或登陆
下面列出泛塞在高达15ms49英尺s的速度下能够密封能够承受200mpa2000bar29000psi以上的高压能够安装在符合milg5514f和din3771的沟槽中弹簧力系统压力varisealvariseal选择表动态mpabapsi静态mpabapsim215454506527606008702709426050015m2s1645450652760600870270942605001005t40202002900606008702709423044615404005801808001160312018426050001t05hf28404005801808001160320032826050001t05roto2815150217525250362510014826050010c满足表ii外套材料选择指南turcont05turcont24turcont24turcont40turcont40turcont01zurconz80turcont78turcont01turcont01最新资料请访问wwwtsstrelleborgcom2008年5月版密封件接触的介质或工作条件静态或稍微动态往复旋转技术数据用途材料型式页码最高压力用途的类型工作温度最高速度标准材料空气气体水蒸气油原油普通化学品石油化学品食品药品真空材料选择指南t012500mm2500mm2500mm2500mm2500mm2500mm2500mm2500mm特殊材料适合较高的辐射负载有关这方面的进一步详细资料请联系特瑞堡密封系统公司

AS5045中文资料

图 1：AS5045 和磁铁的典型布置方式
1.1 优点
- 完整的片上系统 - 灵活的系统解决方案，同时提供绝对值串行输
出和PWM输出 - 由于采用无接触式位置检测原理，十分适合于
苛刻环境下的应用 - 无需校准
1.2 主要特点
- 整个 360°范围内的无接触式、高分辨率、旋转位置编码
- 2 种数字式 12 位绝对值输出： - 串行接口输出以及 - 脉宽调制（PWM）输出
Tamb
-40
Isupp
VDD5V 4.5 VDD3V3 3.0
VDD5V 3.0 VDD3V3 3.0
125 °C -40°F…+257°F
16
21 mA
5.0
5.5
V 5V工作方式
3.3
3.6 V
3.3
3.6 V 3.3V工作方式
3.3
3.6 V （引脚VDD5V和VDD3V3相连）
3.4 数字输入和输出的直流特性
100
mA 规范：JEDEC 78
ESD
±2
kV 规范：MIL 883 E method 3015
Tstrg
-55
125
°C 最小值–67°F；最大值+257°F
t=20至40s，规范：IPC/JEDEC J-Std-020C
TBody
260
°C 引脚镀层为100%的锡 “雾锡式”
H
5
85
%
Revision 1.3
3.4.1 CMOS 施密特触发器输入：CLK, CSn. (CSn = 内部上拉)
(工作条件：Tamb = -40 至 +125°C, VDD5V = 3.0-3.6V (3V 工作方式) VDD5V = 4.5-5.5V (5V 工作方式)，除非另有规定)

2SC2235中文资料(toshiba)中文数据手册「EasyDatasheet - 矽搜」

• 虽然东芝的作品不断地提高产品的质量和可靠性,产品会发生故障或失败.顾客是负责符合安全标准,并用于提供适当的设计和保障其硬件,软件和这最大限度地降低风险,并避免出现在产品的故障或失效可能导致生命损失,身体系统人身伤害或财产损失,包括数据丢失或损坏.在客户使用的产品,创造设计包括产品,或者将产品变成自己的应用程序,用户还必须参考和符合（一）中的所有相关东芝信息的最新版本,包括但不限于本文件,规格,数据表和应用笔记产品和中所规定的“东芝半导体可靠性手册”等预防措施及条件（b）与该产品将用于与或应用程序的说明.客户全权负责自己的产品设计和应用的所有方面, 包括但不限于：（一）决定采用在这样的设计还是应用此产品的适当性; （b）评价和确定本文档中包含的任何信息的适用性,或图表, 图表,程序,算法,示例应用电路,或任何其他引用文件; （三）验证了这样的设计和应用的所有工作参数.
芯片中文手册,看全文,戳
东芝晶体管
音频功率放大器应用驱动级放大器的应用
硅NPN外延型（厘进程）
2SC2235
2SC2235
单位：mm
• 为了补充2SA965.
绝对最大额定值
（TA = 25°C）
特点
符
评级
Unit
集电极基极电压
集电极 - 发射极电压
发射极基极电压集电极电流基极电流集电极耗散功率结温存储温度范围
100 ms*
10 ms*
50
30 Collector current I
*: Single nonrepetitive 10
pulse Ta = 25°C
5 Curves must be derated
3 linearly with increase in

AS5045-ASST;AS5045-ASSU;AS5045 PB;AS5045 DB V2;AS5045 AB;中文规格书,Datasheet资料

1 General DescriptionThe AS5045 is a contactless magnetic rotary encoder for accurate angular measurement over a full turn of 360°. It is a system-on-chip, combining integrated Hall elements, analog front end and digital signal processing in a single device.To measure the angle, only a simple two-pole magnet, rotating over the center of the chip, is required. The magnet may be placed above or below the IC.The absolute angle measurement provides instant indication of the magnet’s angular position with a resolution of 0.0879° = 4096 positions per revolution. This digital data is available as a serial bit stream and as a PWM signal.An internal voltage regulator allows the AS5045 to operate at either 3.3 V or 5 V supplies.2 BenefitsComplete system-on-chipFlexible system solution provides absolute andPWM outputs simultaneously Ideal for applications in harsh environments due tocontactless position sensing No calibration required3 Key FeaturesContactless high resolution rotational positionencoding over a full turn of 360 degrees Two digital 12bit absolute outputs:- Serial interface and- Pulse width modulated (PWM) output User programmable zero positionFailure detection mode for magnet placementmonitoring and loss of power supply “red-yellow-green” indicators display placement ofmagnet in Z-axis Serial read-out of multiple interconnected AS5045devices using Daisy Chain mode Tolerant to magnet misalignment and airgapvariations Wide temperature range: - 40°C to + 125°CSmall Pb-free package: SSOP 16 (5.3mm x 6.2mm)4 ApplicationsIndustrial applications:- Contactless rotary position sensing - Robotics Automotive applications:- Steering wheel position sensing - Transmission gearbox encoder - Headlight position control - Torque sensing- Valve position sensing Replacement of high end potentiometersFigure 1. Typical Arrangement of AS5045 and MagnetAS504512 Bit Programmable Magnetic Rotary Encoder Data SheetTable of Contents1General Description (1)2Benefits (1)3Key Features (1)4Applications (1)5Pinout (4)5.1Pin Configuration (4)5.2Pin Description (4)6Electrical Characteristics (5)6.1AS5045 Differences to AS5040 (5)6.2Absolute Maximum Ratings (non operating) (6)6.3Operating Conditions (6)6.4DC Characteristics for Digital Inputs and Outputs (7)6.4.1CMOS Schmitt-Trigger Inputs: CLK, CSn. (CSn = internal Pull-up) (7)6.4.2CMOS / Program Input: Prog (7)6.4.3CMOS Output Open Drain: MagINCn, MagDECn (7)6.4.4CMOS Output: PWM (7)6.4.5Tristate CMOS Output: DO (8)6.5Magnetic Input Specification (8)6.6Electrical System Specifications (9)6.7Timing Characteristics (10)6.7.1Synchronous Serial Interface (SSI) (10)6.7.2Pulse Width Modulation Output (11)6.8Programming Conditions (11)7Functional Description (12)8Mode Input Pin (13)8.1Synchronous Serial Interface (SSI) (13)8.1.1Data Content (14)8.1.2Z-axis Range Indication (Push Button Feature, Red/Yellow/Green Indicator) (14)8.2Daisy Chain Mode (15)9Pulse Width Modulation (PWM) Output (16)9.1Changing the PWM Frequency (17)10Analog Output (17)11Programming the AS5045 (18)11.1Zero Position Programming (18)11.2Repeated OTP Programming (18)11.3Non-permanent Programming (19)11.4Analog Readback Mode (20)12Alignment Mode (21)13 3.3V / 5V Operation (22)14Choosing the Proper Magnet (23)14.1Physical Placement of the Magnet (24)15Simulation Modeling (25)16Failure Diagnostics (26)16.1Magnetic Field Strength Diagnosis (26)16.2Power Supply Failure Detection (26)17Angular Output Tolerances (26)17.1Accuracy (26)17.2Transition Noise (28)17.3High Speed Operation (28)17.3.1Sampling Rate (28)17.4Propagation Delays (29)17.4.1Angular Error Caused by Propagation Delay (29)17.5Internal Timing Tolerance (29)17.6Temperature (30)17.6.1Magnetic Temperature Coefficient (30)17.7Accuracy over Temperature (30)17.7.1Timing Tolerance over Temperature (30)18Package Drawings and Markings (31)19Ordering Information (31)20Recommended PCB Footprint (32)5 Pinout5.1 Pin ConfigurationFigure 2. Pin Configuration SSOP165.2 Pin DescriptionTable 1 shows the description of each pin of the standard SSOP16 package (Shrink Small Outline Package, 16 leads, body size: 5.3mm x 6.2mmm; see Figure 2).Pins 7, 15 and 16 supply pins, pins 3, 4, 5, 6, 13 and 14 are for internal use and must not be connected.Pins 1 and 2 MagINCn and MagDECn are the magnetic field change indicators (magnetic field strength increase or decrease through variation of the distance between the magnet and the device). These outputs can be used to detect the valid magnetic field range. Furthermore those indicators can also be used for contact-less push-button functionality.Pin 6 Mode allows switching between filtered (slow) and unfiltered (fast mode). This pin must be tied to VSS or VDD5V, and must not be switched after power up. See chapter 8 Mode Input Pin.Pin 8 Prog is used to program the zero-position into the OTP (see chapter 11.1 Zero Position Programming).This pin is also used as digital input to shift serial data through the device in Daisy Chain configuration, (see chapter 8.2 Daisy Chain Mode).Pin 11 Chip Select (CSn; active low) selects a device within a network of AS5045 encoders and initiates serial data transfer. A logic high at CSn puts the data output pin (DO) to tri-state and terminates serial data transfer. This pin is also used for alignment mode (Figure 14) and programming mode (Figure 10).Pin 12 PWM allows a single wire output of the 10-bit absolute position value. The value is encoded into a pulse width modulated signal with 1µs pulse width per step (1µs to 4096µs over a full turn). By using an external low pass filter, the digital PWM signal is converted into an analog voltage, making a direct replacement of potentiometers possible.Table 1. Pin DescriptionPin Symbol Type Description1MagINCn DO_OD Magnet Field Mag nitude INC rease; active low, indicates a distance reduction between the magnet and the device surface. See Table 52MagDECn DO_OD Magnet Field Mag nitude DEC rease; active low, indicates a distance increase between the device and the magnet. See Table 53 NC - Must be left unconnected4 NC - Must be left unconnectedPin Symbol Type Description 5 NC - Must be left unconnected6Mode - Select between slow (low, VSS) and fast (high, VDD5V) mode. Internal pull-down resistor.7 VSS S Negative Supply Voltage (GND)8Prog_DI DI_PD OTP Prog ramming Input and Data Input for Daisy Chain mode. Internal pull-down resistor (~74kΩ). Connect to VSS if not used9 DO DO_TD ata O utput of Synchronous Serial Interface10 CLK DI,ST Cl oc k Input of Synchronous Serial Interface; Schmitt-Trigger input11 CSn DI_PU,STC hip S elect, active low; Schmitt-Trigger input, internal pull-up resistor (~50kΩ)12 PWM DO P ulse W idth M odulation of approx. 244Hz; 1µs/step (opt. 122Hz; 2µs/step)13 NC - Must be left unconnected14 NC - Must be left unconnected15VDD3V3 S 3V-Regulator Output, internally regulated from VDD5V. Connect to VDD5V for 3V supply voltage. Do not load externally.16 VDD5V S Positive Supply Voltage, 3.0 to 5.5 VDO_OD digital output open drain S supply pinDO digital output DI digital inputDI_PD digital input pull-down DO_T digital output /tri-stateDI_PU digital input pull-up ST Schmitt-Trigger input6 Electrical Characteristics6.1 AS5045 Differences to AS5040All parameters are according to AS5040 datasheet except for the parameters shown below: Building Block AS5045 AS5040Resolution 12bits, 0.088°/step. 10bit, 0.35°/stepData length Read: 18bits(12bits data + 6 bits status)OTP write: 18 bits(12bits zero position + 6 bits mode selection) Read: 16bits(10bits data + 6 bits status)OTP write: 16 bits(10bits zero position + 6 bits mode selection)Incremental encoder Not usedPin 3: not usedPin 4:not usedQuadrature, step/direction and BLDC motorcommutation modesPin 3:incremental output A_LSB_UPin 4:incremental output B_DIR_VPins 1 and 2 MagINCn, MagDECn: same feature asAS5040, additional OTP option for red-yellow-green magnetic range MagINCn, MagDECn indicate in-range or out-of-range magnetic field plus movement of magnet in z-axisPin 6 MODE pin, switch between fast and slowmodePin 6:Index outputPin 12 PWM output: frequency selectable by OTP:1µs / step, 4096 steps per revolution,f=244Hz 2µs/ step, 4096 steps perrevolution, f=122Hz PWM output:1µs / step, 1024 steps per revolution, 976Hz PWM frequencySampling frequency Selectable by MODE input pin:2.5kHz, 10kHzFixed at 10kHz @10bit resolutionBuilding Block AS5045AS5040 Propagation delay 384µs (slow mode) 96µs (fast mode)48µs Transition noise (rms; 1sigma) 0.03 degrees max. (slow mode) 0.06 degrees max. (fast mode)0.12 degreesOTP programming options Zero position, rotational direction, PWMdisable, 2 Magnetic Field indicator modes, 2 PWM frequenciesZero position, rotational direction, incremental modes, index bit width6.2 Absolute Maximum Ratings (non operating)Stresses beyond those listed under “Absolute Maximum Ratings“ may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under “Operating Conditions” is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ParameterSymbol Min Max Unit Note DC supply voltage at pin VDD5V VDD5V -0.3 7 V DC supply voltage at pin VDD3V3 VDD3V35VInput pin voltageV in -0.3VDD5V+0.3 V Except VDD3V3 Input current (latchup immunity) I scr -100 100 mA Norm: JEDEC 78Electrostatic discharge ESD ± 2 kV Norm: MIL 883 E method 3015 Storage temperature T strg-55125°CMin – 67°F ; Max +257°FBody temperature (Lead-free package)T Body 260°C t=20 to 40s,Norm: IPC/JEDEC J-Std-020 Lead finish 100% Sn “matte tin” Humidity non-condensing H585%6.3 Operating ConditionsParameterSymbol Min Typ Max UnitNoteAmbient temperature T amb -40125 °C -40°F…+257°FSupply currentI supp 1621 mA Supply voltage at pin VDD5V Voltage regulator output voltage at pin VDD3V3VDD5V VDD3V3 4.53.0 5.03.3 5.5 3.6 V 5V operationSupply voltage at pin VDD5V Supply voltage at pin VDD3V3 VDD5V VDD3V33.03.03.33.33.6 3.6V3.3V operation(pin VDD5V and VDD3V3 connected)6.4 DC Characteristics for Digital Inputs and Outputs6.4.1 CMOS Schmitt-Trigger Inputs: CLK, CSn. (CSn = internal Pull-up)(operating conditions: T amb = -40 to +125°C, VDD5V = 3.0-3.6V (3V operation) VDD5V = 4.5-5.5V (5V operation) unless otherwise noted) ParameterSymbol Min Max Unit NoteHigh level input voltage V IH 0.7 * VDD5VV Normal operation Low level input voltage V IL0.3 * VDD5VVSchmitt Trigger hysteresis V Ion- V Ioff 1V-1 1 CLK only Input leakage current Pull-up low level input current I LEAK I iL-30 -100µA µA CSn only, VDD5V: 5.0V6.4.2 CMOS / Program Input: Prog(operating conditions: T amb = -40 to +125°C, VDD5V = 3.0-3.6V (3V operation) VDD5V = 4.5-5.5V (5V operation)unless otherwise noted) ParameterSymbol Min Max Unit Note High level input voltage VIH 0.7 * VDD5VVDD5VVHigh level input voltage VPROG See Programming ConditionsV During programming Low level input voltage VIL 0.3 * VDD5VVHigh level input current IiL30100µAVDD5V: 5.5V6.4.3 CMOS Output Open Drain: MagINCn, MagDECn(operating conditions: T amb = -40 to +125°C, VDD5V = 3.0-3.6V (3V operation) VDD5V = 4.5-5.5V (5V operation)unless otherwise noted) ParameterSymbolMinMax UnitNote Low level output voltage V OL VSS+0.4 V Output currentI O4 2mAVDD5V: 4.5V VDD5V: 3VOpen drain leakage current I OZ 1 µA6.4.4 CMOS Output: PWM(operating conditions: T amb = -40 to +125°C, VDD5V = 3.0-3.6V (3V operation) VDD5V = 4.5-5.5V (5V operation)unless otherwise noted) ParameterSymbolMinMax UnitNoteHigh level output voltage V OH VDD5V-0.5 V Low level output voltage V OL VSS+0.4 V Output current I O4 2mA mAVDD5V: 4.5V VDD5V: 3V6.4.5 Tristate CMOS Output: DO(operating conditions: T amb = -40 to +125°C, VDD5V = 3.0-3.6V (3V operation) VDD5V = 4.5-5.5V (5V operation) unless otherwise noted) ParameterSymbolMinMax UnitNoteHigh level output voltage V OH VDD5V –0.5VLow level output voltage V OL VSS+0.4 VOutput currentI O4 2mAmAVDD5V: 4.5V VDD5V: 3VTri-state leakage current I OZ 1 µA6.5 Magnetic Input Specification(operating conditions: T amb = -40 to +125°C, VDD5V = 3.0-3.6V (3V operation) VDD5V = 4.5-5.5V (5V operation)unless otherwise noted)Two-pole cylindrical diametrically magnetised source: ParameterSymbolMinTypMaxUnitNoteDiameter d mag 4 6 mm Thickness t mag 2.5 mm Recommended magnet: Ø 6mm x 2.5mm forcylindrical magnets Magnetic input fieldamplitude B pk 4575 mTRequired vertical component of the magnetic field strength on the die’s surface, measured along a concentric circle with a radius of 1.1mm Magnetic offset B off ± 10mT Constant magnetic stray field Field non-linearity5 %Including offset gradient2.44146 rpm @ 4096 positions/rev.; fast modeInput frequency (rotational speed of magnet)f mag_abs0.61Hz36.6rpm @ 4096 positions/rev.; slow mode Displacement radiusDisp0.25mmMax. offset between defined device center and magnet axis (see Figure 18) Eccentricity Ecc 100µm Eccentricity of magnet center to rotational axis-0.12NdFeB (Neodymium Iron Boron) Recommended magnetmaterial andtemperature drift -0.035%/KSmCo (Samarium Cobalt)6.6 Electrical System Specifications(operating conditions: T amb = -40 to +125°C, VDD5V = 3.0~3.6V (3V operation) VDD5V = 4.5~5.5V (5V operation) unless otherwise noted) ParameterSymbolMinTypMaxUnitNoteResolution RES 12 bit 0.088 deg Integral non-linearity (optimum)INL opt± 0.5 deg Maximum error with respect to the best line fit. Centered magnet without calibration, T amb =25 °C. Integral non-linearity (optimum)INL temp± 0.9 degMaximum error with respect to the best line fit. Centered magnetwithout calibration, T amb = -40 to +125°CIntegral non-linearity INL ± 1.4 degBest line fit =(Err max – Err min ) / 2Over displacement tolerance with 6mm diameter magnet, without calibration,T amb = -40 to +125°C Differential non-linearity DNL ±0.044 deg 12bit, no missing codes 0.06 1 sigma, fast mode (MODE = 1)Transition noiseTN0.03deg RMS1 sigma, slow mode (MODE=0 or open)Power-on reset thresholds On voltage; 300mV typ. hysteresisOff voltage; 300mV typ. hysteresisV on V off 1.37 1.08 2.2 1.9 2.9 2.6VDC supply voltage 3.3V (VDD3V3)DC supply voltage 3.3V (VDD3V3)20Fast mode (Mode = 1); until status bit OCF = 1Power-up timet PwrUp80msSlow mode (Mode = 0 or open); until OCF = 196Fast mode (MODE=1)System propagation delay absolute output : delay of ADC, DSP and absolute interfacet delay384µsSlow mode (MODE=0 or open) 2.48 2.61 2.74T amb = 25°C, slow mode (MODE=0 or open)Internal sampling rate for absolute output:f S2.35 2.61 2.87 kHzT amb = -40 to +125°C, slow mode (MODE=0 or open) 9.90 10.42 10.94T amb = 25°C, fast mode (MODE = 1)Internal sampling rate forabsolute outputf S9.38 10.42 11.46kHz T amb = -40 to +125°C, : fast mode (MODE = 1)Read-out frequency CLK1MHz Max. clock frequency to read out serial dataFigure 3. Integral and Differential Non-linearity (example)Integral Non-Linearity (INL) is the maximum deviation between actual position and indicated position. Differential Non-Linearity (DNL) is the maximum deviation of the step length from one position to the next. Transition Noise (TN) is the repeatability of an indicated position6.7 Timing Characteristics6.7.1Synchronous Serial Interface (SSI)(operating conditions: T amb = -40 to +125°C, VDD5V = 3.0~3.6V (3V operation) VDD5V = 4.5~5.5V (5V operation) unless otherwise noted) ParameterSymbol MinTypMaxUnitNoteData output activated (logic high)t DO active 100 nsTime between falling edge of CSn and dataoutput activated First data shifted to output registert CLK FE500 nsTime between falling edge of CSn and firstfalling edge of CLKStart of data output T CLK / 2 500nsRising edge of CLK shifts out one bit at a timeData output valid t DO valid357 375 394 nsTime between rising edge of CLK and dataoutput validData output tristate t DO tristate100 nsAfter the last bit DO changes back to“tristate”Pulse width of CSn t CSn 500ns CSn = high; To initiate read-out of next angular position Read-out frequencyf CLK>01MHzClock frequency to read out serial data分销商库存信息:AMSAS5045-ASST AS5045-ASSU AS5045 PB AS5045 DB V2AS5045 AB。

AS1580中文资料

ew
Rev. 10/2/00
元器件交易网
AS1580
ABSOLUTE MAXIMUM RATINGS
Power Dissipation.................................................... Internally Limited Lead Temp (soldering, 10 seconds)........................................... 300°C Storage Temperature Range ...................................... -65ºC to +150ºC Operating Junction Temperature Range AS1580 Control Section................................................0ºC to +125ºC AS1580 Power Transistor .............................................0ºC to +150ºC Input Supply Voltage ..........................................................6V VCTRL Input Voltage ..........................................................13V
2.8V Version Output Voltage 2.744 2.688 2.8 2.8 2.856 2.912 V
3.3V Version Output Voltage 3.234 3.168 3.3 3.3 3.366 3.432 V

as3555标准

AS3555标准技术报告1.概述AS3555标准是一个针对电子设备中的热管理材料的标准，由美国材料与试验协会（ASTM）制定。

该标准规定了电子设备中使用的导热材料、散热器和散热材料的性能要求、测试方法以及标记和包装等方面的要求。

本文将对AS3555标准进行详细介绍，并分析其在电子设备中的应用和意义。

2.标准简介AS3555标准规定了导热材料、散热器和散热材料的性能要求，包括导热系数、比热容、热膨胀系数、外观、尺寸稳定性、长期耐热性等指标。

同时，该标准还规定了这些材料的测试方法，包括热导率测试、比热容测试、热膨胀系数测试等。

此外，AS3555标准还规定了这些材料的标记和包装等方面的要求。

3.应用和意义AS3555标准在电子设备中的应用非常广泛，主要涉及电子设备的热管理。

随着电子设备的功能越来越强大，其产生的热量也越来越多，因此需要更好的散热方案来保证设备的正常运行。

导热材料、散热器和散热材料是电子设备中常用的散热方案，而AS3555标准则为这些材料的性能提供了规范和依据。

首先，AS3555标准可以保证导热材料、散热器和散热材料的性能和质量，从而提高电子设备的稳定性和可靠性。

其次，该标准可以促进散热方案的创新和优化，推动电子设备的发展。

最后，该标准还有助于提高电子设备的安全性，防止因过热而引起的火灾等安全事故。

4.结论AS3555标准是电子设备中热管理材料的重要标准，其规定了导热材料、散热器和散热材料的性能要求、测试方法以及标记和包装等方面的要求。

该标准的实施有助于保证电子设备的稳定性和可靠性，促进散热方案的创新和优化，提高电子设备的安全性。

因此，在电子设备领域中，应该加强对AS3555标准的宣传和推广，促进相关企业和研究机构对热管理材料的研发和应用。

同时，随着电子设备技术的不断发展，AS3555标准也需要不断更新和完善，以适应新的需求和挑战。

西部磁性材料有限公司产品说明书：紧凑型电路板电源电路电压稳定器

1 West Coast Magnetics Advancing Power ElectronicsFOIL WINDINGS FOR SMPS INDUCTORS AND TRANSFORMERS Weyman Lundquist, CEO and Engineering Manager2•Solid wire⏹Litz wire⏹FoilTYPES OF WINDINGSLowest costLow DC resistance High AC winding lossEasy to wind Highest costHigher DC resistancePotential for low AC winding lossPractical limitation of 500 kHz due to lossInexpensiveVery Low DC resistancePotential for low AC winding loss3proximityskin dc rmsac dc dctotal P P R IR I P +++=2,22,rmsac ac ac IP R =dcdcdc R I P 2=Resistive lossEddy-currentlossdc lossac lossacrmsac ac R IP 2,=“ac resistance”WINDING LOSS COMPONENTS4PROXIMITY EFFECTJxOriginal drawing from SnellingB-Fieldxxx xxx xxx xxxx oo ooo ooo ooo ooCurrent DensityInduced CurrentMain Current⏹Proximity Effect⏹An isolated conductor is placed in an uniform external field ⏹External field results from other wires and windings near the conductor (transformer) and from the field present in the core winding window (inductor)PROXIMITY EFFECT55TransformerInductor Conductor Complexity Core gap Wave form Dowell yes yes Solid wire, foil 1 D No Sinusoidal Litz opt yes no Litz 2D Yes Sinusoidal Shape Opt no yes Litz 2D Yes Any Transformer Inductor Conductor Complexity Core gap Wave form Dowell Yes yes Solid wire, foil 1 D No Sinusoidal Litz opt Yes No Litz 2D Yes Sinusoidal Shape Opt No Yes Litz 2D Yes Any AnsysYesYesAll2D 3DYesYes•Design and Test Verification•Measure DCR (high accuracy)•Thermal measurement under load•Measure ESR (good for comparison of different windings, includes core loss induced by LCR meter)•Isolate winding loss using Network Analyzer *•Simulation Software* C.R. Sullivan, “A Step by Step Guide to Extracting Winding Resistance from an Impedance Measurement”, IEEE Apec 20176•Strategies for Loss Minimization in Foil Windings6Optimize foil thickness Minimize number of layersShape foil to take advantage of core geometry effects (WCM, Dartmouth Patent)Use multiple parallel foils and swap layersUse different foil thicknesses for different turns.Use a parallel litz or thin foil winding in the vicinity of a gap Interleave winding (transformers only)Use a low permeability material for core legSTUDYOPTIMIZATIONDesign and Test Verification:Model litz options: Litz optTest ESR from 100 kHz to 500 kHz to comparefoil and litz.Choose lowest loss option.Litz opt result:48 awg litz is lowest loss option.46 awg litz chosen due to cost.100 kHz: optimal number of strands: 3210500 kHz: optional number of strands: 871Choose 2700 strands, single layer, position asindicated in cross sectional view.9TRANSFORMER WINDING LOSS –CASE STUDY10RESULTS –TRANSFORMER10 DESIGNLitz is lowest loss optionTransformer constructed with 2700/46.Leakage L not sufficiently high.Bench testing indicates acceptable performance with room for loss reduction. NEXT STEPUse leakage layer to reduce space between windings, increase leakage L, and reduce loss. Investigate lower capacitance foil winding.1111INDUCTOR WINDING LOSS –CASE STUDY Inductance: 700 nHDC Current: 10 ampsRipple: 23 AppFrequency: 500 kHzDesign: 4 turns on EP13, gap of 1 mmSolution: Shape opt optimization, test ESR and DCR to estimate lossCompare to full foil and shaped foil.Shaped foil/cutout foil patent issued and second patent pendingWCM and DartmouthInductor Window Cross Section –Center Leg Gap12 Field Lines: Shape Opt Foil Cutout Cross Section Wire Placement: ShapeoptESR vs. Frequency Measurement 700 nH Inductor13Cutout: patent pendingInductor Total Winding Loss Including DC15Ripple magnitude above which litz has lower loss than copper foil for a 4 turn boost inductor100 kHz 63%6300200 kHz 37% 7400300 kHz 26%7800400 kHz 23% 9200500 kHz 20% 100001 MHz 18% 180002 MHz 15% 30000FrequencyPercent ProductWCM Shaped16 Foil InductorsLow loss gapped ferrite core, shaped foilwinding.Patent pending: Dartmouthand WCM17 Comparison of 10 uH, 55amp inductorsShaped Foil IronNickelToroidHighIronToroidHelicalCoilBased on 2015 WCM study, copies availableWinding Loss: Gapped Ferrite18 Cutout Patent issued: Dartmouth and WCMCONCLUSIONS19 Cut out foil for gapped inductor designs is the lowest loss option for inductors with DC current upto a ripple frequency product of about 7000. (% ripple * kHz)Both foil and litz are usable for inductors at frequencies up to 2 MHz as long as the ripple is lessthan 20%.Litz is very expensive with the cost increasing exponentially with frequency. In the cases noted inthe presentation the litz wire cost was 60% to 70% of the total material cost.For transformers, many high power applications require more turns, making foil windingoptimization critical.For gapped inductors shaped cutout foil has lower loss than full width foil, provided copper crosssection is the same.Future work to further examine effect of foil thickness as well as methods of reducing windingcapacitance in foil windings to extend performance to higher ripple and frequency values andto windings with more layers.Shaped foil/cutout foil patent issued and second patent pending WCM and Dartmouth20Thank you.。

ss-p118-cn-翻译

ss-p118-cn-翻译资产管理标准规范—防护涂层防护涂层系统SS-P1187.3 有危险部分 (15)Section 8 –涂覆体系选择 (16)8.1 沿海气候 (16)8.2 内陆气候 (18)8.3 海洋气候(受冲击区域与浸没部分) (19)8.4 内部表面–贮水容器 (19)8.5 潮湿车间/湿热环境 (20)Section 9 –涂层系统 (21)Section 10 –色彩编码 (24)10.1 加工处理设备 (24)10.2 管线、沟渠、通风管道 (24)Section 1 –范围本规格书适用于皮尔巴拉铁矿石业务,这一业务属力拓公司旗下，包括皮尔巴拉铁矿,哈默斯利铁矿，若伯河床开采，哈默斯利HMS。

它制定了对制备，应用，涂覆材料，涂覆体系，颜色规格，涂覆材料检测的最低要求，同时也适用于下列项目：•钢结构，电镀和甲板•机械设备（例如，槽，箱，料斗，等）•管道和阀门•热浸镀锌。

本规范不适用于下列项目：•混凝土地面防护涂层•家用及办公室保护涂层。

任何与本规范不符的方面需事先从RT公司代表处获得书面许可。

Section 2 –总体要求所有的表面处理，涂料的制备及涂料使用应按照制造商的指示，本规范和本规范第3节规定的有关标准进行。

2.1 非喷漆项目不得喷涂下列项目：•轨道，卧枕板和导轨压道板•由耐腐蚀材料，如不锈钢和3CR12材料制成的设备或管道•有色金属，如铝和铜合金制成的设备或管道•加工面不需喷漆部分需能够组装与拆卸，这些表面只能涂覆经批准的防锈剂•摩擦夹钳连接的对应面•焊缝坡口•需要添加融合焊接螺栓或附件的钢材表面•仪器，仪表和油嘴•防紫外线橡胶以外的橡胶材料•塑料，玻璃和玻璃纤维增强塑料。

Section 3 –适用文件下列为适用于此标准规范的文件3.1 澳大利亚标准规范No. TitleAS 1318 SAA 工业安全颜色代码AS 1345 内容鉴定或管线、沟渠、通风管道AS 1580 喷漆以及相关材料的检测方法AS 1627 金属加工准备与表面预处理AS/NZ 2312 钢材保护防腐指南AS 2700 普通颜色标准AS 2812 焊接，铜焊，金属切割–术语表AS 3750 钢结构喷漆–说明与标准AS 3884 金属表面预处理磷化底漆(单组与双组)AS 3894 防护涂料检测AS 4089 钢材头道底漆–单个部件通用AS 4680 铁组件表面热浸镀锌3.2 国际标准Standard No. TitleISO 8501-1 喷漆之前对基板的处理产品表面清洁度的目测评估Section 4 –表面处理需喷漆的部件应遵守表面处理方法，涂覆体系以及此规范第九部份澳洲标准的要求。

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AS13985Micropower 150mA Low-Noise LDOaustria micro systemsP r o d uc t B r i e f 1 General DescriptionThe AS13985 is a high-performance low-dropout 150mAvoltage regulator designed for use with very-low ESR out-put capacitors. The device can deliver superior perfor-mance in all specifications critical to battery-powered designs, and is perfectly suited for mobile phones, PDAs, MP3 players, and other battery powered devices.Stability is guaranteed with a ceramic output capacitor of from 1 to 22µF. The low equivalent series resistance (5Ω) of these capacitors ensures low output impedance at high fre-quencies.Automatic sleep mode requires less than 1µA quiescent current when pin EN is pulled low.Regulation performance is excellent even under low drop-out conditions, when the power transistor has to operate in linear mode.A 10nF bypass capacitor can be added to reduce output noise to 30µV. The low-noise performance allows direct connection of noise sensitive circuits without additional fil-tering networks.Multiple output voltage options are available as standard products. Contact austriamicrosystems, AG for details.The AS13985 is available in a 5-bump WLP package and a 5-pin SOT23 package.Figure 1. Block Diagram2 Key Features! Ultra-Low Dropout Voltage: (typically45mV @ 150mA, 0.3mV @ 1mA)! Supply Range: 2.5 to 5.5V! Output Voltage Range: 1.2 to 5.0V (in 25mV Steps)! Output Current: 150mA (Guaranteed)! Stable with Low-ESR Output Capacitor ! Integrated Over-Temperature/Over-Current Protection ! Low GND Pin Current (only 95µA)! Output Voltage Accuracy: 1%! Minimal External Components Required ! High Peak-Current Capability ! Low Shutdown Current: ≤1µA! Operating Temperature Junction Range: -40 to +125°C ! Smallest Available Packages:-5-bump WLP -5-pinSOT233 ApplicationsThe AS13985 is ideal for powering cordless and mobilephones, MP3 players, CD and DVD players, PDAs, hand-held computers, digital cameras, and any other hand-held battery-powered device.V REFAS13985Over-Current/Over-TemperatureProtection+–3EN1V IN 5V OUT4BYPASS2GND元器件交易网元器件交易网AS13985austria micro systemsProduct BriefCopyrightsCopyright © 1997-2006, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe.Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, trans-lated, stored, or used without the prior written consent of the copyright owner.All products and companies mentioned are trademarks or registered trademarks of their respective companies.DisclaimerDevices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearingin its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regardingthe information set forth herein or regarding the freedom of the described devices from patent infringement. austriami-crosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, priorto designing this product into a system, it is necessary to check with austriamicrosystems AG for current information.This product is intended for use in normal commercial applications. Applications requiring extended temperaturerange, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG foreach application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standardproduction flow, such as test flow or test location.The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However,austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited topersonal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental orconsequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the tech-nical data herein. No obligation or liability to recipient or any third party shall arise or flow out ofaustriamicrosystems AG rendering of technical or other services.Contact InformationHeadquartersaustriamicrosystems AGA-8141 Schloss Premstaetten, AustriaTel: +43 (0) 3136 500 0Fax: +43 (0) 3136 525 01e-mail: info@For Sales Offices, Distributors and Representatives, please visit:austria micro systems– a leap ahead。