EDS6416CHBH-75-E资料
合集下载
- 1、下载文档前请自行甄别文档内容的完整性，平台不提供额外的编辑、内容补充、找答案等附加服务。
- 2、"仅部分预览"的文档,不可在线预览部分如存在完整性等问题,可反馈申请退款(可完整预览的文档不适用该条件!)。
- 3、如文档侵犯您的权益，请联系客服反馈,我们会尽快为您处理(人工客服工作时间：9:00-18:30)。
C
DQ14
VSSQ
VDDQ
DQ1
DQ13 VDDQ
VSSQ
DQ2
D
DQ12 DQ11 DQ4 DQ3
E
DQ10 VSSQ VDDQ DQ5
F
DQ9 VDDQ VSSQ DQ6
G
DQ8 NC NC DQ7
H
NC VSS VDD NC
J
NC UDQM LDQM /WE
K
NC CLK /RAS /CAS
L
Data Sheet E0442E40 (Ver. 4.0)
3
EDS6416AHBH, EDS6416CHBH
Electrical Specifications
Speed 6B: 166MHz/CL3 100MHz/CL2 75: 133MHz/CL3 100MHz/CL2
Package BH: FBGA (Board Type)
Data Sheet E0442E40 (Ver. 4.0)
2
EDS6416AHBH, EDS6416CHBH
CONTENTS Description.....................................................................................................................................................1 Features.........................................................................................................................................................1 Pin Configurations .........................................................................................................................................1 Ordering Information......................................................................................................................................2 Part Number ..................................................................................................................................................2 Electrical Specifications.................................................................................................................................4 Block Diagram .............................................................................................................................................10 Pin Function.................................................................................................................................................11 Command Operation ...................................................................................................................................12 Simplified State Diagram .............................................................................................................................20 Mode Register Configuration.......................................................................................................................21 Power-up sequence.....................................................................................................................................23 Operation of the SDRAM.............................................................................................................................24 Timing Waveforms.......................................................................................................................................40 Package Drawing ........................................................................................................................................46 Recommended Soldering Conditions..........................................................................................................47
Document No. E0442E40 (Ver. 4.0) Date Published June 2005 (K) Japan Printed in Japan URL: Elpida Memory, Inc. 2004-2005
EDS6416AHBH, EDS6416CHBH
DATA SHEET
64M bits SDRAM
EDS6416AHBH, EDS6416CHBH (4M words × 16 bits)
Description
The EDS6416AHBH, EDS6416CHBH are 64M bits SDRAMs organized as 1,048,576 words × 16 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. Supply voltages are 3.3V (EDS6416AHBH) and 2.5V (EDS6416CHBH). It is packaged in 60-ball FBGA.
CKE NC NC /CS
M
A11 A9 BA1 BA0
N
A8 P A6 R VSS A4 A3 VDD A5 A2 A1 A7 A to A11 BA0, BA1 DQ0 to DQ15 /CS /RAS /CAS /WE LDQM, UDQM Address input Bank select address Data-input/output Chip select Row address strobe Column address strobe Write enable Input/output mask CKE CLK VDD VSS VDDQ VSSQ NC Clock enable Clock input Power for internal circuit Ground for internal circuit Power for DQ circuit Ground for DQ circuit No connection
Part Number
E D S 64 16 A H BH - 6B - E
Elpida Memory
Type
D: Monolithic Device
Environment Code E: Lead Free
Product Family S: SDRAM
Density / Bank 64: 64M/4-bank Organization 16: x16 Power Supply, Interface A: 3.3V, LVTTL C: 2.5V, LVTTL Die Rev.
Pin Configurations
/xxx indicate active low signal.
60-ball FBGA
1 A VSS B
DQ15 DQ0 VDD
2
3
4
5
6
7
Features
• • • • • 3.3V and 2.5V power supply Clock frequency: 166MHz/133MHz (max.) Single pulsed /RAS ×16 organization 4 banks can operate simultaneously and independently • Burst read/write operation and burst read/single write operation capability • 2 variations of burst sequence Sequential (BL = 1, 2, 4, 8, full page) Interleave (BL = 1, 2, 4, 8) • Programmable /CAS latency (CL): 2, 3 • Byte control by UDQM and LDQM • Refresh cycles: 4096 refresh cycles/64ms • 2 variations of refresh Auto refresh Self refresh • FBGA package with lead free solder (Sn-Ag-Cu) RoHS compliant
Ordering Information
Part number EDS6416AHBH-6B-E EDS6416AHBH-75-E EDS6416CHBH-75-E 2.5V 4M × 16 4 Supply voltage 3.3V Organization (words × bits) Internal Banks 4M × 16 4 Clock frequency MHz (max.) 166 100 133 100 133 100 /CAS latency 3 2 3 2 3 2 Package 60-ball FBGA
DQ14
VSSQ
VDDQ
DQ1
DQ13 VDDQ
VSSQ
DQ2
D
DQ12 DQ11 DQ4 DQ3
E
DQ10 VSSQ VDDQ DQ5
F
DQ9 VDDQ VSSQ DQ6
G
DQ8 NC NC DQ7
H
NC VSS VDD NC
J
NC UDQM LDQM /WE
K
NC CLK /RAS /CAS
L
Data Sheet E0442E40 (Ver. 4.0)
3
EDS6416AHBH, EDS6416CHBH
Electrical Specifications
Speed 6B: 166MHz/CL3 100MHz/CL2 75: 133MHz/CL3 100MHz/CL2
Package BH: FBGA (Board Type)
Data Sheet E0442E40 (Ver. 4.0)
2
EDS6416AHBH, EDS6416CHBH
CONTENTS Description.....................................................................................................................................................1 Features.........................................................................................................................................................1 Pin Configurations .........................................................................................................................................1 Ordering Information......................................................................................................................................2 Part Number ..................................................................................................................................................2 Electrical Specifications.................................................................................................................................4 Block Diagram .............................................................................................................................................10 Pin Function.................................................................................................................................................11 Command Operation ...................................................................................................................................12 Simplified State Diagram .............................................................................................................................20 Mode Register Configuration.......................................................................................................................21 Power-up sequence.....................................................................................................................................23 Operation of the SDRAM.............................................................................................................................24 Timing Waveforms.......................................................................................................................................40 Package Drawing ........................................................................................................................................46 Recommended Soldering Conditions..........................................................................................................47
Document No. E0442E40 (Ver. 4.0) Date Published June 2005 (K) Japan Printed in Japan URL: Elpida Memory, Inc. 2004-2005
EDS6416AHBH, EDS6416CHBH
DATA SHEET
64M bits SDRAM
EDS6416AHBH, EDS6416CHBH (4M words × 16 bits)
Description
The EDS6416AHBH, EDS6416CHBH are 64M bits SDRAMs organized as 1,048,576 words × 16 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. Supply voltages are 3.3V (EDS6416AHBH) and 2.5V (EDS6416CHBH). It is packaged in 60-ball FBGA.
CKE NC NC /CS
M
A11 A9 BA1 BA0
N
A8 P A6 R VSS A4 A3 VDD A5 A2 A1 A7 A to A11 BA0, BA1 DQ0 to DQ15 /CS /RAS /CAS /WE LDQM, UDQM Address input Bank select address Data-input/output Chip select Row address strobe Column address strobe Write enable Input/output mask CKE CLK VDD VSS VDDQ VSSQ NC Clock enable Clock input Power for internal circuit Ground for internal circuit Power for DQ circuit Ground for DQ circuit No connection
Part Number
E D S 64 16 A H BH - 6B - E
Elpida Memory
Type
D: Monolithic Device
Environment Code E: Lead Free
Product Family S: SDRAM
Density / Bank 64: 64M/4-bank Organization 16: x16 Power Supply, Interface A: 3.3V, LVTTL C: 2.5V, LVTTL Die Rev.
Pin Configurations
/xxx indicate active low signal.
60-ball FBGA
1 A VSS B
DQ15 DQ0 VDD
2
3
4
5
6
7
Features
• • • • • 3.3V and 2.5V power supply Clock frequency: 166MHz/133MHz (max.) Single pulsed /RAS ×16 organization 4 banks can operate simultaneously and independently • Burst read/write operation and burst read/single write operation capability • 2 variations of burst sequence Sequential (BL = 1, 2, 4, 8, full page) Interleave (BL = 1, 2, 4, 8) • Programmable /CAS latency (CL): 2, 3 • Byte control by UDQM and LDQM • Refresh cycles: 4096 refresh cycles/64ms • 2 variations of refresh Auto refresh Self refresh • FBGA package with lead free solder (Sn-Ag-Cu) RoHS compliant
Ordering Information
Part number EDS6416AHBH-6B-E EDS6416AHBH-75-E EDS6416CHBH-75-E 2.5V 4M × 16 4 Supply voltage 3.3V Organization (words × bits) Internal Banks 4M × 16 4 Clock frequency MHz (max.) 166 100 133 100 133 100 /CAS latency 3 2 3 2 3 2 Package 60-ball FBGA