Flip-flop circuit having CMOS hysteresis inverter
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专利内容由知识产p circuit having CMOS hysteresis inve r t e r
发明人：Asazawa, Hiroshi 申请号：EP91311207.4 申请日：19911202 公开号：EP 04 88826B 1 公开日：19960731
摘要：A flip-flop circuit includes a hysteresis inverter (100), a data input terminal (4), a data output terminal (5), a clock input terminal (6) and a transfer gate (3). The hysteresis inverter has a first inverter (1) whose input and output nodes are connected respectively to the data input and output terminals, and a second inverter (2) whose input and output node are connected respectively to the data output and input terminals. The transfer gate is connected between the data input and output terminals, and turns on and off in response to a clock signal applied to the clock input terminal, thereby changing hysteresis area or effects of the hysteresis inverter. The transfer gate causes the area of hysteresis to be variable, so that the circuit requires only a small number of gate stages, can operate at a high speed, and can operate at a low power supply voltage.
申请人：NEC CORP 地址：JP 国籍：JP 代理机构：Moir, Michael Christopher 更多信息请下载全文后查看
发明人：Asazawa, Hiroshi 申请号：EP91311207.4 申请日：19911202 公开号：EP 04 88826B 1 公开日：19960731
摘要：A flip-flop circuit includes a hysteresis inverter (100), a data input terminal (4), a data output terminal (5), a clock input terminal (6) and a transfer gate (3). The hysteresis inverter has a first inverter (1) whose input and output nodes are connected respectively to the data input and output terminals, and a second inverter (2) whose input and output node are connected respectively to the data output and input terminals. The transfer gate is connected between the data input and output terminals, and turns on and off in response to a clock signal applied to the clock input terminal, thereby changing hysteresis area or effects of the hysteresis inverter. The transfer gate causes the area of hysteresis to be variable, so that the circuit requires only a small number of gate stages, can operate at a high speed, and can operate at a low power supply voltage.
申请人：NEC CORP 地址：JP 国籍：JP 代理机构：Moir, Michael Christopher 更多信息请下载全文后查看