SG75474中文资料

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AO4704中文资料

AO4704AO4704SymbolTyp Max 28405475R θJL 2130SymbolTyp Max 36406775R θJL 2530Maximum Junction-to-LeadCSteady-State°C/WParameterUnits Maximum Junction-to-AmbientAt ≤ 10s R θJA °C/W Maximum Junction-to-AmbientASteady-State °C/W °C/W Maximum Junction-to-AmbientASteady-State Thermal Characteristics: Schottky Maximum Junction-to-Lead CSteady-State°C/WThermal Characteristics ParameterUnits Maximum Junction-to-AmbientAt ≤ 10s R θJA °C/W A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The value in any given application depends on the user's specific board design. The current rating is based on the t ≤ 10s thermal resistance rating.B: Repetitive rating, pulse width limited by junction temperature.C. The R θJA is the sum of the thermal impedence from junction to lead R θJL and lead to ambient.D. The static characteristics in Figures 1 to 6 are obtained using 80 µs pulses, duty cycle 0.5% max.E. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The SOA curve provides a single pulse rating.F. The Schottky appears in parallel with the MOSFET body diode, even though it is a separate chip. Therefore, we provide the net forward drop, capacitance and recovery characteristics of the MOSFET and Schottky. However, the thermal resistance is specified for each chip separately.Rev5: August 2005THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISINGOUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE.AO4704SymbolMin TypMaxUnits BV DSS 30V0.0070.053.2101220I GSS 100nA V GS(th)0.6 1.12V I D(ON)40A 9.111.5T J =125°C13.316.510.513m Ωg FS 3037S V SD 0.450.5V I S5A DYNAMIC PARAMETERS C iss 36564050pF C oss 322pF C rss 168pF R g0.86 1.1ΩSWITCHING PARAMETERS Q g (4.5V)30.536nC Q gs 4.6nC Q gd 8.6nC t D(on) 6.29ns t r 4.87ns t D(off)5575ns t f 7.311ns t rr 20.325ns Q rr8.412.5nCTHIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE.Gate resistanceGate Drain Charge Body Diode+Schottky Reverse Recovery ChargeI F =13A, dI/dt=100A/µsBody Diode+Schottky Reverse Recovery Time Turn-Off DelayTime V GS =10V, V DS =15V, R L =1.1Ω, R GEN =0ΩTurn-Off Fall TimeTotal Gate Charge Gate Source Charge I F =13A, dI/dt=100A/µs On state drain currentForward TransconductanceDiode + Schottky Forward Voltage I S =1A,V GS =0VV GS =4.5V, V DS =5V Turn-On DelayTime V GS =10V, V DS =15V, I D =13AV GS =0V, V DS =0V, f=1MHzTurn-On Rise Time Electrical Characteristics (T J =25°C unless otherwise noted)STATIC PARAMETERS Parameter Conditions I DSS mA Gate Threshold Voltage Drain-Source Breakdown Voltage I D =250µA, V GS =0VZero Gate Voltage Drain Current.(Set by Schottky leakage)Gate-Body leakage current V DS =V GS I D =250µA V R =30VV DS =0V, V GS = ±12V R DS(ON)Static Drain-Source On-Resistancem ΩV GS =4.5V, I D =12.2AV GS =10V, ID=13AV R =30V, T J =125°CV R =30V, T J =150°C Reverse Transfer Capacitance V DS =5V, I D =13AOutput Capacitance (FET+Schottky)Maximum Body-Diode + Schottky Continuous CurrentV GS =0V, V DS =15V, f=1MHz Input Capacitance A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The value in any given application depends on the user's specific board design. The current rating is based on the t ≤ 10s thermal resistance rating.B: Repetitive rating, pulse width limited by junction temperature.C. The R θJA is the sum of the thermal impedence from junction to lead R θJL and lead to ambient.D. The static characteristics in Figures 1 to 6 are obtained using 80 µs pulses, duty cycle 0.5% max.E. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The SOA curve provides a single pulse rating.F. The Schottky appears in parallel with the MOSFET body diode, even though it is a separate chip. Therefore, we provide the net forward drop, capacitance and recovery characteristics of the MOSFET and Schottky. However, the thermal resistance is specified for each chip separately Rev5: August 2005.AO4704AO4704。

3474AN资料

元器件交易网Technical Data Sheet3474AN/BADB-AFGA/XR/MSFeatures․High luminous intensity output ․Oval Shape ․Well defined spatial radiation ․Wide viewing angle (2θ1/2) : 110o / 50o ․UV resistant epoxy ․The product itself will remain within RoHS compliant versionDescriptions․This precision optical performance oval LED is specifically designed for passenger information signs ․This lamp has matched radiation patterns with red and green mixing color applicationsApplications․Color graphic signs ․Message boards ․Variable message signs (VMS) ․Commercial outdoor advertisingDevice Selection GuideLED Part No. 3474AN/BADB-AFGA/R/MS 3474AN/BADB-AFGA/PR/MS Chip Material Emitted Color InGaN Blue Lens Color Blue Diffused Stopper No YesEverlight Electronics Co., Ltd. Device Number :DT1-347-023http\\: Prepared date: 03-24-2008Rev 1Page: 1 of 10Prepared by: Grace Shen元器件交易网Technical Data Sheet3474AN/BADB-AFGA/XR/MSPackage Dimensions Stopper Type No Stopper TypeNotes: ․All dimensions are in millimeters, tolerance is 0.25mm except being specified. ․Protruded resin under flange is 1.5mm Max LED. ․Bare copper alloy is exposed at tie-bar portion after cutting.Everlight Electronics Co., Ltd. Device Number :DT1-347-023 http\\: Prepared date: 03-24-2008 Rev 1 Page: 2 of 10Prepared by: Grace Shen元器件交易网Technical Data Sheet3474AN/BADB-AFGA/XR/MSAbsolute Maximum Rating (Ta=25℃)Parameter Forward Current Pulse Forward Current (Duty1/10@ 1KHz) Operating Temperature Storage Temperature Soldering Temperature Power Dissipation Reverse Voltage Electrostatic Discharge Symbol IF IFP Topr Tstg Tsol Pd VR ESD Absolute Maximum Rating 30 100 -40 ~ +85 -40 ~ +100 260 100 5 1K Unit mA mA ℃ ℃ ℃ mW V VNotes: Soldering time≦5 seconds.Electro-Optical Characteristics (Ta=25℃)Parameter Luminous Intensity Viewing Angle Peak Wavelength Dominant Wavelength Spectrum Half width Forward Voltage Reverse Current Symbol IV 2θ1/2 λp λd Δλ VF IR Min. 430 --465 -2.8 -Typ. -X:110Y:50 468 470 26 --Max. 860 --475 -3.6 50 Unit mcd deg nm V μA ConditionIF=20mAVR=5VRank Combination (IF=20mA)Rank F1 F2 G1 600~720 G2 720~860 Unit:mcd Luminous Intensity 430~520 520~600 *Measurement Uncertainty of Luminous Intensity: ±10% Rank 1 2 Unit:nmDominant Wavelength 465~470 470~475 *Measurement Uncertainty of Dominant Wavelength ±1.0nmEverlight Electronics Co., Ltd. Device Number :DT1-347-023http\\: Prepared date: 03-24-2008Rev 1Page: 3 of 10Prepared by: Grace Shen元器件交易网Technical Data Sheet3474AN/BADB-AFGA/XR/MSTypical Electro-Optical Characteristics CurvesEverlight Electronics Co., Ltd. Device Number :DT1-347-023http\\: Prepared date: 03-24-2008Rev 1Page: 4 of 10Prepared by: Grace Shen元器件交易网Technical Data Sheet3474AN/BADB-AFGA/XR/MSTaping DimensionsEverlight Electronics Co., Ltd. Device Number :DT1-347-023http\\: Prepared date: 03-24-2008Rev 1Page: 5 of 10Prepared by: Grace Shen元器件交易网Technical Data Sheet3474AN/BADB-AFGA/XR/MSTaping Sizes Specifications Symbol Items Tape Feed Hole Diameter Component Lead Pitch Front-to-Read Deflection Feed Hole to Button of Component Feed Hole to Overall Component Height Lead Length after Component Removal Feed Hole Pitch Lead Location Center of Component Location Overall Taped Package Thickness Feed Hole Location Adhesive Tape Width Adhesive Tape Position Tape Width Symbol mm D F △H H1 H2 L P P1 P2 T W0 W1 W2 W3 4.00 2.54 2.0 18.5 24.6 11.00 12.70 5.10 6.35 1.42 9.00 13.00 4.00 18.00 Avg. Inch 0.157 0.100 0.078 0.729 0.969 0.433 0.500 0.200 0.250 0.056 0.354 0.512 0.157 0.709 Tolerance (mm) ±0.2 ±0.3 Max ±1.0 ±1.0 Max ±0.3 ±0.7 ±1.2 Max ±0.5 ±0.5 Max ±0.75Everlight Electronics Co., Ltd. Device Number :DT1-347-023http\\: Prepared date: 03-24-2008Rev 1Page: 6 of 10Prepared by: Grace Shen元器件交易网Technical Data Sheet3474AN/BADB-AFGA/XR/MSPacking Specification■Inner Carton EVERLIGHT CPN: P/N:XXXXXXXXXXRoHSXXX/XXXX-XXXX QTY：XXXXCAT:XX HUE:XX REF:XXLOT NO： MADE IN TAIWAN■Label Form Specification CPN: Customer’s Production Number P/N : Production Number QTY: Packing Quantity CAT: Rank of Luminous Intensity HUE: Rank of Dominant Wavelength REF: Reference LOT No: Lot Number MADE IN TAIWAN: Production Place■Outside Carton■Packing Quantity 1. 2500 PCS/1 Inner Carton 2. 10Inner Cartons/1 Outside CartonEverlight Electronics Co., Ltd. Device Number :DT1-347-023http\\: Prepared date: 03-24-2008Rev 1Page: 7 of 10Prepared by: Grace Shen元器件交易网Technical Data Sheet3474AN/BADB-AFGA/XR/MSNotes1. Lead Forming During lead formation, the leads should be bent at a point at least 3mm from the base of the epoxy bulb. Lead forming should be done before soldering. Avoid stressing the LED package during leads forming. The stress to the base may damage the LED’s characteristics or it may break the LEDs. Cut the LED leadframes at room temperature. Cutting the leadframes at high temperatures may cause failure of the LEDs. When mounting the LEDs onto a PCB, the PCB holes must be aligned exactly with the lead position of the LED. If the LEDs are mounted with stress at the leads, it causes deterioration of the epoxy resin and this will degrade the LEDs. 2. Storage The LEDs should be stored at 30°C or less and 70%RH or less after being shipped from Everlight and the storage life limits are 3 months. If the LEDs are stored for 3 months or more, they can be stored for a year in a sealed container with a nitrogen atmosphere and moisture absorbent material. Please avoid rapid transitions in ambient temperature, especially, in high humidity environments where condensation can occur. 3. Soldering Careful attention should be paid during soldering. When soldering, leave more then 3mm from solder joint to epoxy bulb, and soldering beyond the base of the tie bar is recommended. Recommended soldering conditions: Hand Soldering Temp. at tip of iron Soldering time Distance 300℃ Max. (30W Max.) 3 sec Max. 3mm Min.(From solder joint to epoxy bulb) Preheat temp. Bath temp. & time Distance DIP Soldering 100℃ Max. (60 sec Max.) 260 Max., 5 sec Max 3mm Min. (From solder joint to epoxy bulb)Rev 1 Page: 8 of 10Everlight Electronics Co., Ltd. Device Number :DT1-347-023http\\: Prepared date: 03-24-2008Prepared by: Grace Shen元器件交易网Technical Data Sheet3474AN/BADB-AFGA/XR/MSRecommended soldering profilelaminar waveFluxingPreheadAvoiding applying any stress to the lead frame while the LEDs are at high temperature particularly when soldering. Dip and hand soldering should not be done more than one time After soldering the LEDs, the epoxy bulb should be protected from mechanical shock or vibration until the LEDs return to room temperature. A rapid-rate process is not recommended for cooling the LEDs down from the peak temperature. Although the recommended soldering conditions are specified in the above table, dip or handsoldering at the lowest possible temperature is desirable for the LEDs. Wave soldering parameter must be set and maintain according to recommended temperature and dwell time in the solder wave. 4. Cleaning When necessary, cleaning should occur only with isopropyl alcohol at room temperature for a duration of no more than one minute. Dry at room temperature before use. Do not clean the LEDs by the ultrasonic. When it is absolutely necessary, the influence of ultrasonic cleaning on the LEDs depends on factors such as ultrasonic power and the assembled condition. Ultrasonic cleaning shall be pre-qualified to ensure this will not cause damage to the LED.Everlight Electronics Co., Ltd. Device Number :DT1-347-023http\\: Prepared date: 03-24-2008Rev 1Page: 9 of 10Prepared by: Grace Shen元器件交易网Technical Data Sheet3474AN/BADB-AFGA/XR/MS5. Heat Management Heat management of LEDs must be taken into consideration during the design stage of LED application. The current should be de-rated appropriately by referring to the de-rating curve found in each product specification. The temperature surrounding the LED in the application should be controlled. Please refer to the data sheet de-rating curve. 6. ESD (Electrostatic Discharge) Electrostatic discharge (ESD) or surge current (EOS) can damage LEDs. An ESD wrist strap, ESD shoe strap or antistatic gloves must be worn whenever handling LEDs. All devices, equipment and machinery must be properly grounded. Use ion blower to neutralize the static charge which might have built up on surface of the LEDs plastic lens as a result of friction between LEDs during storage and handing. 7. Other Above specification may be changed without notice. EVERLIGHT will reserve authority on material change for above specification. When using this product, please observe the absolute maximum ratings and the instructions for using outlined in these specification sheets. EVERLIGHT assumes no responsibility for any damage resulting from use of the product which does not comply with the absolute maximum ratings and the instructions included in these specification sheets. These specification sheets include materials protected under copyright of EVERLIGHT corporation. Please don’t reproduce or cause anyone to reproduce them without EVERLIGHT’s consent.EVERLIGHT ELECTRONICS CO., LTD. Office: No 25, Lane 76, Sec 3, Chung Yang Rd, Tucheng, Taipei 236, Taiwan, R.O.CTel: 886-2-2267-2000, 2267-9936 Fax: 886-2267-6244, 2267-6189, 2267-6306 http:\\Everlight Electronics Co., Ltd. Device Number :DT1-347-023http\\: Prepared date: 03-24-2008Rev 1Page: 10 of 10Prepared by: Grace Shen。

744731471;中文规格书,Datasheet资料

4.1 4.0 3.02012-06-282012-05-102011-04-07SStSStCZSStCZWürth Elektronik eiSos GmbH & Co. KGEMC & Inductive SolutionsMax-Eyth-Str. 174638 WaldenburgGermanyTel. +49 (0) 79 42 945 - 0A Dimensions: [mm]F Typical Inductance vs. Current Characteristics:H4: Classification Wave Soldering Profile:H5: Classification Wave ProfileProfile FeaturePreheat- Temperature Min (T smin )- Temperature Typical (T stypical ) - Temperature Max (T smax ) - Time (t s ) from (T smin to T smax )Δ preheat to max Temperature Peak temperature (T p )Time of actual peak temperature (t p )Ramp-down rate - Min - Typical - MaxTime 25°C to 25°C Pb-Free Assembly 100°C 120°C 130°C 70 seconds 150°C max.250°C - 260°C max. 10 secondsmax. 5 second each wave ~ 2 K/s ~ 3.5 K/s ~ 5 K/s 4 minutesSn-Pb Assembly 100°C 120°C 130°C 70 seconds 150°C max.235°C - 260°C max. 10 secondsmax. 5 second each wave ~ 2 K/s ~ 3.5 K/s ~ 5 K/s 4 minutesrefer to EN 61760-1:2006H Soldering Specifications:I Cautions and Warnings:The following conditions apply to all goods within the product series of WE-TISof Würth Elektronik eiSos GmbH & Co. KG:General:All recommendations according to the general technical specifications of the data-sheet have to be complied with.The disposal and operation of the product within ambient conditions which probably alloy or harm the wire isolation has to be avoided.If the product is potted in customer applications, the potting material might shrink during and after hardening. Accordingly to this the product is exposed to the pressure of the potting material with the effect that the core, wire and termination is possibly damaged by this pressure and so the electrical as well as the mechanical characteristics are endanger to be affected. After the potting material is cured, the core, wire and termination of the product have to be checked if any reduced electrical or mechanical functions or destructions have occurred.The responsibility for the applicability of customer specific products and use in a particular customer design is always within the authority of the customer. All technical specifications for standard products do also apply for customer specific products.Washing varnish agent that is used during the production to clean the application might damage or change the characteristics of the wire in-sulation, the marking or the plating. The washing varnish agent could have a negative effect on the long turn function of the product.Direct mechanical impact to the product shall be prevented as the ferrite material of the core could flake or in the worst case it could break. Product specific:Follow all instructions mentioned in the datasheet, especially:•The solder profile has to be complied with according to the technical wave soldering specification, otherwise no warranty will be sustai-ned.•All products are supposed to be used before the end of the period of 12 months based on the product date-code, if not a 100% solderabi-lity can´t be warranted.•Violation of the technical product specifications such as exceeding the nominal rated current will result in the loss of warranty.1. General Customer ResponsibilitySome goods within the product range of Würth Elektronik eiSos GmbH & Co. KG contain statements regarding general suitability for certain application areas. These statements about suitability are based on our knowledge and experience of typical requirements concerning the are-as, serve as general guidance and cannot be estimated as binding statements about the suitability for a customer application. The responsibi-lity for the applicability and use in a particular customer design is always solely within the authority of the customer. Due to this fact it is up to the customer to evaluate, where appropriate to investigate and decide whether the device with the specific product characteristics described in the product specification is valid and suitable for the respective customer application or not.2. Customer Responsibility related to Specific, in particular Safety-Relevant ApplicationsIt has to be clearly pointed out that the possibility of a malfunction of electronic components or failure before the end of the usual lifetime can-not be completely eliminated in the current state of the art, even if the products are operated within the range of the specifications.In certain customer applications requiring a very high level of safety and especially in customer applications in which the malfunction or failure of an electronic component could endanger human life or health it must be ensured by most advanced technological aid of suitable design of the customer application that no injury or damage is caused to third parties in the event of malfunction or failure of an electronic component.3. Best Care and AttentionAny product-specific notes, warnings and cautions must be strictly observed.4. Customer Support for Product SpecificationsSome products within the product range may contain substances which are subject to restrictions in certain jurisdictions in order to serve spe-cific technical requirements. Necessary information is available on request. In this case the field sales engineer or the internal sales person in charge should be contacted who will be happy to support in this matter.5. Product R&DDue to constant product improvement product specifications may change from time to time. As a standard reporting procedure of the Product Change Notification (PCN) according to the JEDEC-Standard inform about minor and major changes. In case of further queries regarding the PCN, the field sales engineer or the internal sales person in charge should be contacted. The basic responsibility of the customer as per Secti-on 1 and 2 remains unaffected.6. Product Life CycleDue to technical progress and economical evaluation we also reserve the right to discontinue production and delivery of products. As a stan-dard reporting procedure of the Product Termination Notification (PTN) according to the JEDEC-Standard we will inform at an early stage about inevitable product discontinuance. According to this we cannot guarantee that all products within our product range will always be available. Therefore it needs to be verified with the field sales engineer or the internal sales person in charge about the current product availability ex-pectancy before or when the product for application design-in disposal is considered.The approach named above does not apply in the case of individual agreements deviating from the foregoing for customer-specific products.7. Property RightsAll the rights for contractual products produced by Würth Elektronik eiSos GmbH & Co. KG on the basis of ideas, development contracts as well as models or templates that are subject to copyright, patent or commercial protection supplied to the customer will remain with Würth Elektronik eiSos GmbH & Co. KG.8. General Terms and ConditionsUnless otherwise agreed in individual contracts, all orders are subject to the current version of the “General Terms and Conditions of Würth Elektronik eiSos Group”, last version available at .J Important Notes:The following conditions apply to all goods within the product range of Würth Elektronik eiSos GmbH & Co. KG:分销商库存信息: WURTH-ELECTRONICS 744731471。

744043151;中文规格书,Datasheet资料

description :A mmB mmC mmD mm Emm= Start of winding Marking = Inductance codeEigenschaften / properties Wert / valueEinheit / unittol.Induktivität /inductanceDC-Widerstand /DC-resistance DC-Widerstand /DC-resistance Nennstrom /rated currentSättigungsstrom /saturation current Eigenres.-Frequenz /self-res.-fequency33% Umgebungstemperatur / temperature:+20°CFerrit Endoberfläche / finishing electrode:CZ10-08-01ME 09-01-15MST08-04-11SSt08-05-20SST05-10-10Name Datum / dateKunde / customerFreigabe erteilt / general release:C Lötpad / soldering spec.:B Elektrische Eigenschaften / electrical properties:E Testbedingungen / test conditions:Luftfeuchtigkeit / humidity:It is recommended that the temperature of the part does F Werkstoffe & Zulassungen / material & approvals:Draht / wire:Class HG Eigenschaften / general specifications:Betriebstemp. / operating temperature: -40°C - + 125°C Sn/Ag/Cu - 96.5/3.0/0.5%DATUM / DATE : 2010-08-01max.mA Datum / date.................................................................................Unterschrift / signature Kontrolliert / approvedTestbedingungen / test conditions D-74638 Waldenburg · Max-Eyth-Strasse 1 - 3 · Germany · Telefon (+49) (0) 7942 - 945 - 0 · Telefax (+49) (0) 7942 - 945 - 400Geprüft / checked SRFMHzUmgebungstemp. / ambient temperature: -40°C - + 85°C Basismaterial / base material:not exceed 125°C under worst case operating conditions.POWER-CHOKE WE-TPCA Mechanische Abmessungen / dimensions:1,60 typ.1,60typ.2,8 ± 0,2HP 34401 A für/for R DC und I DC0,860± 30%150,00µH220R DC typ 0,770I DC D Prüfgeräte / test equipment:HP 4274 A für/for L und/and Q @ 20°C @ 20°C ∆T=30 K 100 kHZ / 0,1V4207,0I sat |ΔL/L|<35%Version 5.....................................................................................................................................................................................................................................................Würth Elektroniktyp.R DC max typ.L max.mA typ.Version 44,8 ± 0,24,8 ± 0,2Type 4828Änderung / modificationVersion 1Version 2Version 6[mm]5,302,001,502,001,80MarkingABCDDEdescription :CZ10-08-01ME 09-01-15MST08-04-11SSt08-05-20SST05-10-10Name Datum / dateFreigabe erteilt / general release:Kontrolliert / approvedDATUM / DATE : 2010-08-01Würth ElektronikKunde / customer...................................................................................................................................................................POWER-CHOKE WE-TPCH Induktivitätskurve / Inductance curve :Version 4Version 5Änderung / modificationVersion 1Version 2D-74638 Waldenburg · Max-Eyth-Strasse 1 - 3 · Germany · Telefon (+49) (0) 7942 - 945 - 0 · Telefax (+49) (0) 7942 - 945 - 400Datum / dateUnterschrift / signature Version 6 ...................................................................................................................................................................Geprüft / checked 0,0020,0040,0060,0080,00100,00120,00140,00160,000,000,100,200,300,400,500,600,70L (µH )Current (A)Induktivität vs Strom (typ.) / Inductance vs Current (typ.)description :I Rollenspezifikation / tape and reel specification:A 8,0± 1,0mm B4,00± 0,1mma178± 0,5mm b 20,20± 0,1mm+ 0,5- 1,0d 50,0± 1,0mmCZ10-08-01ME 09-01-15MST08-04-11SSt08-05-20SST05-10-10Name Datum / dateWürth Elektronik...................................................................................................................................................................Würth Elektronik eiSos GmbH & Co.KGD-74638 Waldenburg · Max-Eyth-Strasse 1 - 3 · Germany · Telefon (+49) (0) 7942 - 945 - 0 · Telefax (+49) (0) 7942 - 945 - 400Geprüft / checked Kontrolliert / approvedÄnderung / modification...................................................................................................................................................................Datum / dateUnterschrift / signature Gurtspezifikation / Tape specification: Rollenspezifikation / Reel specification:Freigabe erteilt / general release:Kunde / customermm 13,00POWER-CHOKE WE-TPCDATUM / DATE : 2010-08-01Version 5c Version 1Version 2Version 4Version 6Ø cadbThe force for tearing off cover tape is 20 to 70 grams in arrow direction150feeding directionThis electronic component has been designed and developed for usage in general electronic equipment. Before incorporating this component into any equipment where higher safety and reliability is especially required or if there is the possibility of direct damage or injury to human body, for example in the range of aerospace, aviation, nuclear control, submarine, transportation, (automotive control, train control, ship control),transportation signal, disaster prevention, medical, public information network etc, Würth Elektronik eiSos GmbH must be informed before the design-in stage. In addition, sufficient reliability evaluation checks for safety must be performed on every electronic component which is used in electrical circuits that require high safety and reliability functions or performance.分销商库存信息: WURTH-ELECTRONICS 744043151。

CY5474FCT240T中文资料

Power Dissipation .......................................................... 0.5W
Static Discharge Voltage............................................>2001V (per MIL-STD-883, Method 3015)
Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
Min. Typ.[5] Max. Unit
VOH
VOL
VIH VIL VH VIK II IIH IIL IOZH
Output HIGH Voltage
OEB OA0 DB0 OA1 DB1 OA2 DB2 OA3 DB3 FCT240T–1
FCT244T
OEA
OEB
DA0
OA0
OB0
DB0
DA1
OA1
OB1 DA2 OB2 DA3
DB1 OA2 DB2 OA3
OB3
DB3
FCT240T–4
Pin Configurations
LCC Top View
DA3
OB3 GND
DB3 OA3 DB2
8 7 654
9
3
10
2
11 FCT244T 1
12
20
13
19
14 1516 17 18
OB0 DA0 OEA VCC OEB
OA0
DB0
OA1

安寰科技 ADRF5474 芯片载板数据手册说明书

Data SheetADRF5474 Die on Carrier, Silicon Digital Attenuator, 2 dB LSB, 4-Bit, 10 MHz to 60 GHzFEATURES►Ultrawideband frequency range: 10 MHz to 60 GHz►Attenuation range: 22 dB with 2 dB steps►Bond pads for wire bond and ribbon bond►Low insertion loss►1.3 dB typical up to 20 GHz►2.0 dB typical up to 44 GHz►2.7 dB typical up to 55 GHz►Attenuation accuracy►±(0.3 + 1.0% of attenuation state) typical up to 20 GHz ►±(0.4 + 4.0% of attenuation state) typical up to 44 GHz ►±(0.4 + 6.0% of attenuation state) typical up to 55 GHz ►Typical step error►±0.30 dB typical up to 20 GHz►±0.65 dB typical up to 44 GHz►±1.10 dB typical up to 55 GHz►High input linearity►P0.1dB: 25.5 dBm typical►IP3: 45 dBm typical►High RF power handling►23 dBm steady state and hot switching, average►24 dBm steady state and hot switching, peak►Tight distribution in relative phase►No low frequency spurious signals►Parallel mode control, CMOS/LVTTL compatible►RF amplitude settling time (0.1 dB of final RF output): 175 ns ►16-pad, 2.770 mm × 1.620 mm, die on carrier [CHIP] APPLICATIONS►Industrial scanners►Test and instrumentation►Cellular infrastructure: 5G millimeterwave►Military radios, radars, electronic counter measures (ECMs)►Microwave radios and very small aperture terminals (VSATs)FUNCTIONAL BLOCK DIAGRAMFigure 1.GENERAL DESCRIPTIONThe ADRF5474 is a 4-bit digital attenuator with 22 dB attenuation control range in 2 dB steps manufactured in a silicon process attached on a gallium arsenide (GaAs) carrier substrate. The sub-strate incorporates the bond pads for chip and wire assembly, and the bottom of the device is metalized and connected to ground. This device operates from 10 MHz to 60 GHz with better than2.7 dB of insertion loss and excellent attenuation accuracy at55 GHz. The ADRF5474 has a RF input power handling capability of 23 dBm average and 24 dBm peak for all states.The ADRF5474 requires a dual-supply voltage of +3.3 V and−3.3 V. The device features parallel mode control, and complemen-tary metal-oxide semiconductor (CMOS)-/low voltage transistor to transistor logic (LVTTL)-compatible controls.The ADRF5474 is designed to match a characteristic impedance of 50 Ω.TABLE OF CONTENTSFeatures (1)Applications (1)Functional Block Diagram (1)General Description (1)Specifications (3)Electrical Specifications (3)Timing Specifications (4)Absolute Maximum Ratings (5)Thermal Resistance (5)Power Derating Curves (5)Electrostatic Discharge (ESD) Ratings (5)ESD Caution (6)Pad Configuration and Function Descriptions (7)Interface Schematics..........................................7Typical Performance Characteristics (8)Insertion Loss, Return Loss, State Error,Step Error, and Relative Phase (8)Input Power Compression and Third-OrderIntercept (10)Theory of Operation (11)Power Supply (11)RF Input and Output (11)Parallel Mode Interface (12)Applications Information (13)Die Assembly (13)Handling, Mounting and Epoxy Die Attach (13)Outline Dimensions (14)Ordering Guide (14)REVISION HISTORY5/2022—Revision 0: Initial VersionELECTRICAL SPECIFICATIONSV DD = 3.3 V, V SS = −3.3 V, control voltages = 0 V or V DD, die temperature (T DIE) = 25°C, and 50 Ω system, unless otherwise noted.S-parameters are measured with microstrip launchers and 3 mil width ribbon bonds using ground-signal-ground (GSG) probes. The launchers are deembeded. See the Applications Information section for assembly details.Table 1.Parameter Test Conditions/Comments Min Typ Max Unit FREQUENCY RANGE1060,000MHz INSERTION LOSS10 MHz to 20 GHz 1.3dB20 GHz to 44 GHz 2.0dB44 GHz to 55 GHz 2.7dB55 GHz to 60 GHz 4.0dB RETURN LOSS ATTIN and ATTOUT, all attenuation states10 MHz to 20 GHz13dB20 GHz to 44 GHz11dB44 GHz to 55 GHz9dB55 GHz to 60 GHz6dB ATTENUATIONRange Between minimum and maximum attenuation states22dBStep Size Between any successive attenuation states2dB Accuracy Referenced to insertion loss10 MHz to 20 GHz±(0.3 + 1.0% of state)dB20 GHz to 44 GHz±(0.4 + 4.0% of state)dB44 GHz to 55 GHz±(0.4 + 6.0% of state)dB55 GHz to 60 GHz±(0.4 + 12.0% of state)dBStep Error Between any successive state10 MHz to 20 GHz±0.30dB20 GHz to 44 GHz±0.65dB44 GHz to 55 GHz±1.10dB55 GHz to 60 GHz±1.30dB RELATIVE PHASE Referenced to insertion loss10 MHz to 20 GHz25Degrees20 GHz to 44 GHz60Degrees44 GHz to 55 GHz75Degrees55 GHz to 60 GHz85Degrees SWITCHING CHARACTERISTICS All attenuation states at input power (P IN) = 10 dBmRise and Fall Time (t RISE and t FALL)10% to 90% of RF output50nsOn and Off Time (t ON and t OFF)50% triggered control to 90% of RF output100nsRF Amplitude Settling Time0.1 dB50% triggered control to 0.1 dB of final RF output175ns0.05 dB50% triggered control to 0.05 dB of final RF output225ns Overshoot2dB Undershoot0.75dBRF Phase Settling Time Frequency = 40 GHz5°50% triggered control to 5° of final RF output105ns 1°50% triggered control to 1° of final RF output120ns INPUT LINEARITY1100 MHz to 50 GHz0.1 dB Power Compression (P0.1dB)25.5dbmTable 1.Parameter Test Conditions/Comments Min Typ Max Unit45dBm Third-Order Intercept (IP3)Two-tone P IN = 12 dBm per tone, Δf = 1 MHz, allattenuation statesDIGITAL CONTROL INPUTS LE, D2, D3, D4, and D5VoltageLow (V INL)00.8V High (V INH) 1.2 3.3V CurrentLow (I INL)–10µA High (I INH)<1µA SUPPLY CURRENTPositive Supply CurrentBias Low LE, D2, D3, D4, and D5 = 0 V52µA Bias High LE, D2, D3, D4, and D5 = 3.3 V2µA Negative Supply Current–110μA RECOMMENDED OPERATING CONDITIONSSupply VoltagePositive (V DD) 3.15 3.45V Negative (V SS)−3.45−3.15V Digital Control Voltage0V DD V RF Power Handling 2Frequency = 100 MHz to 50 GHz, T DIE3 = 85°C,4 allattenuation statesInput at ATTIN Steady state, average23dBmSteady state, peak24dBmHot switching, average23dBmHot switching, peak24dBm Input at ATTOUT Steady state, average15dBmSteady state, peak16dBmHot switching, average15dBmHot switching, peak16dBm T DIE3−40+105°C 1Input linearity performance degrades over frequency, see Figure 19 and Figure 22.2For power derating over frequency, see Figure 2 to Figure 3. Applicable for all ATTIN and ATTOUT power specifications.3T DIE refers to the bottom of the die on carrier.4For 105°C operation, the power handling degrades from the T DIE = 85°C specifications by 3 dB.TIMING SPECIFICATIONSSee Figure 24 for the timing diagrams.Table 2.Parameter Description Min Typ Max Unit t LEW Minimum LE pulse width, see Figure 2410ns t PH Hold time, see Figure 2410ns t PS Setup time, see Figure 242nsTable 3.Parameter RatingPositive Supply Voltage−0.3 V to +3.6 V Negative Supply Voltage−3.6 V to +0.3 VDigital Control InputsVoltage−0.3 V to V DD + 0.3 V Current 3 mARF Power1 (Frequency = 100 MHz to 50 GHz,T DIE = 85°C2)Input at ATTINSteady State, Average24 dBmSteady State, Peak25 dBmHot Switching, Average24 dBmHot Switching, Peak25 dBmInput at ATTOUTSteady State, Average16 dBmSteady State, Peak17 dBmHot Switching, Average16 dBmHot Switching, Peak17 dBmRF Power Under Unbiased Condition (V DD andV SS = 0 V)Input at ATTIN17 dBmInput at ATTOUT9 dBmTemperatureJunction (T J)135°CStorage−55°C to +150°C Processing170°CContinuous Power Dissipation (P DISS)0.20 W1For power derating over frequency, see Figure 2 and Figure 3. Applicable for all ATTIN and ATTOUT power specifications.2For 105°C operation, the power handling degrades from the T DIE = 85°C specifications by 3 dB.Stresses at or above those listed under absolute maximum ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operat-ing conditions for extended periods may affect product reliability.THERMAL RESISTANCEThermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required.θJC is the junction to case bottom (channel to carrier bottom) thermal resistance.Table 4. Thermal ResistancePackage TypeθJCUnitC-16-5250°C/W POWER DERATING CURVESFigure 2. Power Derating vs. Frequency, Low Frequency Detail, T DIE= 85°CFigure 3. Power Derating vs. Frequency, High Frequency Detail, T DIE = 85°C ELECTROSTATIC DISCHARGE (ESD) RATINGS The following ESD information is provided for handling of ESD-sen-sitive devices in an ESD protected area only.Human body model (HBM) per ANSI/ESDA/JEDEC JS-001.ESD Ratings for ADRF5474Table 5. ADRF5474, 16-Pad Die on Carrier [CHIP]ESD Model Withstand Threshold (V) Human Body Model (HBM)±250±250 for ATTIN and ATTOUT Pads±2000 for Supply and Control PadsESD CAUTIONP IN CONFIGURATION AND FUNCTION DESCRIPTIONSFigure 4. Pad ConfigurationTable 6. Pad Function Descriptions Pad No.Mnemonic Description1, 3, 4, 6, 7, 11, 16GND Ground. Bonding of these ground pads are optional. See the Applications Information section.2ATTIN Attenuator Input. No dc blocking capacitor is necessary when the RF line potential is equal to 0 V dc. See Figure 5 for the interface schematic.5ATTOUT Attenuator Output. No dc blocking capacitor is necessary when the RF line potential is equal to 0 V dc. See Figure 5 for the interface schematic.8V SS Negative Supply Input. See Figure 8 for the interface schematic.9V DD Positive Supply Input. See Figure 7 for the interface schematic.10LE Latch Enable Input. See the Theory of Operation section for more information. See Figure 6 for the interface schematic.12D2Parallel Control Input for 2 dB Attenuator Bit. See the Theory of Operation section for more information. See Figure 6 for the interface schematic.13D3Parallel Control Input for 4 dB Attenuator Bit. See the Theory of Operation section for more information. See Figure 6 for the interface schematic.14D4Parallel Control Input for 8 dB Attenuator Bit.See the Theory of Operation section for more information. See Figure 6 for the interface schematic.15D5Parallel Control Input for 8 dB Attenuator Bit. See the Theory of Operation section for more information. See Figure 6 for the interface schematic.Carrier BottomThe carrier bottom is gold metalized and must be directly attached to the ground plane using conductive epoxy.INTERFACE SCHEMATICSFigure 5. ATTIN and ATTOUT Interface SchematicFigure 6. Digital Input Interface Schematic (LE, D2, D3, D4, and D5)Figure 7. V DD Input Interface SchematicFigure 8. V SS Input Interface SchematicINSERTION LOSS, RETURN LOSS, STATE ERROR, STEP ERROR, AND RELATIVE PHASE V DD = 3.3 V, V SS = −3.3 V, control voltages = 0 V or V DD , T DIE = 25°C, and a 50 Ω system, unless otherwise noted.S-parameters are measured with microstrip launchers and 3 mil width ribbon bonds using GSG probes. The launchers are deembedded. See the Applications Informationsection for assembly details.Figure 9. Insertion Loss vs. Frequency over TemperatureFigure 10. Input Return Loss vs. FrequencyFigure 11. Normalized Attenuation vs. Frequency for All StatesFigure 12. Output Return Loss vs. FrequencyFigure 13. Step Error vs. FrequencyFigure 14. State Error vs. FrequencyFigure 15. Relative Phase vs. FrequencyFigure 16. Step Error vs. Attenuation State over FrequencyFigure 17. State Error vs. Attenuation State over FrequencyFigure 18. Relative Phase vs. Attenuation State over FrequencyINPUT POWER COMPRESSION AND THIRD-ORDER INTERCEPTV DD = 3.3 V, V SS = −3.3 V, control voltages = 0 V or V DD , T DIE= 25°C, and a 50 Ω system, unless otherwise noted.Figure 19. Input P0.1dB vs. FrequencyFigure 20. Input IP3 vs. FrequencyFigure 21. Input P0.1dB vs. Frequency, Low Frequency DetailFigure 22. Input IP3 vs. Frequency, Low Frequency DetailThe ADRF5474 incorporates a 4-bit fixed attenuator array that offers an attenuation range of 22 dB in 2 dB steps. An integrated driver provides parallel mode control of the attenuator array.The ADRF5474 has four digital control inputs, D2 (LSB) to D5 (MSB), to select the desired attenuation state in parallel mode, as shown in Figure 23. Internally, there are two 8 dB stages, and these stages can be controlled by the D4 and D5 pins.POWER SUPPLYThe ADRF5474 requires a positive supply voltage applied to theV DD pad and a negative supply voltage applied to the V SS pad. Bypassing capacitors are recommended on the supply lines to filter high frequency noise.The power-up sequence is as follows:1.Connect GND.2.Power up the V DD and V SS voltages. Power up V SS after V DD toavoid current transients on V DD during ramp up.3.Power up the digital control inputs. The order of the digitalcontrol inputs is not important. However, powering the digitalcontrol inputs before the V DD voltage supply can inadvertently forward bias and damage the internal ESD structures. To avoidthis damage, use a series 1 kΩ resistor to limit the currentflowing into the control pad.4.Apply an RF input signal to ATTIN or ATTOUT.The power-down sequence is the reverse order of the power-up sequence.Power-Up StateThe ADRF5474 has an internal pull-up resistor (see Figure 6). The internal pull-up resistor sets the attenuator to the maximum attenuation state (22 dB) when the V DD and V SS voltages are applied.RF INPUT AND OUTPUTBoth RF ports (ATTIN and ATTOUT) are dc-coupled to 0 V. No dc blocking is required at the RF ports when the RF line potential is equal to 0 V.The ADRF5474 supports bidirectional operation at a lower power level. The power handling of the ATTIN and ATTOUT ports are different. Therefore, the bidirectional power handling is defined by the ATTOUT port. Refer to the RF input power specifications in Table 1.Table 7. Truth TableDigital Control Input1Attenuation State (dB)D52D42D3D2Low Low Low Low0 (reference)Low Low Low High 2.0Low Low High Low 4.0Low Low High High 6.0Low High Low Low8.0Low High Low High10.0Low High High Low12.0Low High High High14.0High High Low Low16.0High High Low High18.0High High High Low20.0High High High High22.01Any combination of the control voltage input states shown in this table provides an attenuation equal to the sum of the bits selected. 2D4 and D5 both correspond to the 8 dB state. D4 has slightly better state accuracy at higher frequencies.Figure 23. Simplified Circuit DiagramPARALLEL MODE INTERFACEThe ADRF5474 has four digital control inputs, D2 (LSB) to D5 (MSB), to select the desired attenuation state in parallel mode, as shown in Table 7.There are two modes of parallel operation: direct parallel and latched parallel.Direct Parallel ModeTo enable direct parallel mode, keep the LE pad high. To change the attenuation state, use the control voltage inputs (D2 to D5) directly. Direct parallel mode is for manual control of the tched Parallel ModeTo enable latched parallel mode, the LE pad must be kept low when changing the control voltage inputs (D2 to D5) to set the attenuation state. When the desired state is set, toggle LE high to transferthe 4-bit data to the bypass switches of the attenuator array, and then toggle LE low to latch the change into the device until the next desired attenuation change (see Figure 24 and Table 2 foradditional information).Figure 24. Latched Parallel Mode Timing DiagramAPPLICATIONS INFORMATION DIE ASSEMBLYAn assembly diagram of the ADRF5474 is shown in Figure 25.Figure 25. Die Assembly DiagramThe ADRF5474 is designed to have the optimum RF input and output impedance match with 3 mil × 0.5 mil gold ribbon wire and 3 mil loop height typical. The bonding diagrams are shown in Figure 26 and Figure 27. Alternatively, using multiple wire bonds with equivalent inductance yields similar performance. For RF rout-ing from the device, coplanar wave guide or microstrip transmission lines can be used. No impedance matching is required on the transmission line pad because the device is designed to match internally to the recommended ribbon bond. A spacing of 3 mils from the RF transmission line to the device edge is recommended for optimum performance.DC pads can be connected using standard 1 mil diameter wire by keeping the wire lengths as short as possible to minimize the para-sitic inductance. The dc pads are large enough to accommodate ribbon bonds, if preferred.All bonds must be thermosonically bonded at a nominal stage temperature of 150°C, and a minimum amount of ultrasonic energy must be applied to achieve reliable bonds.The device is metalized on the backside, and the ground connec-tion can be done by attaching the device directly to the RF ground plane using a conductive epoxy. In this case, connecting the ground pads is optional but still recommended to ensure a solid groundconnection.Figure 26. Bonding Diagram Top ViewFigure 27. Bonding Diagram Side ViewHANDLING, MOUNTING AND EPOXY DIE ATTACHKeep devices in ESD protective sealed bags for shipment, and store all bare die in a dry nitrogen environment.For manual picking, it is a common practice to use a pair oftweezers for GaAs devices. However, for die on carrier devices, the use of a vacuum tool is recommended to avoid any damage on the device substrate. Handle these devices in clean environment.To attach the die with epoxy, apply an amount of epoxy to the mounting surface so that a thin epoxy fillet is observed around the perimeter of the chip after it is placed into position. Set epoxy cure temperatures per the recommendations of the manufacturer and the maximum ratings of the device to minimize accumulated mechanical stress after assembly.Because both dies are attached with solder joints, users must follow best practices for the thermomechanical design of their module assemblies. The temperature expansion coefficient of the substrate material must match the thermal expansion coefficient of the GaAs and silicon (Si) die. Do not allow warpage or other mechanical deformation on the substrate. Set the die attach process and the epoxy cure temperatures to lower the accumulated stress after assembly.OUTLINE DIMENSIONSFigure 28. 16-Pad Die on Carrier [CHIP](C-16-5)Dimensions shown in millimeters ORDERING GUIDEModel1Temperature Range Package Description Packing Information Package OptionADRF5474BCZ–40°C to +105°C16-Pad Die on Carrier [CHIP]Waffle Pack, 50C-16-5 ADRF5474BCZ-GP–40°C to +105°C16-Pad Die on Carrier [CHIP]Gel Pack, 50C-16-5 ADRF5474BCZ-SX–40°C to +105°C16-Pad Die on Carrier [CHIP]Waffle Pack, 2C-16-51Z = RoHS Compliant Part.。

7-36149-1资料

7-36149-1 Product DetailsHome | Customer Support | Suppliers | Site Map | Privacy Policy | Browser Support© 2008 Tyco Electronics Corporation All Rights Reserved SearchProducts Documentation Resources My Account Customer Support Home > Products > By Type > Product Feature Selector > Product Details7-36149-1Active View 3D PDF Ring and Spade Tongue TerminalsAlways EU RoHS/ELV Compliant (Statement of Compliance)Product Highlights:?Terminal Shape = Ring Tongue?Receptacle Style = Straight?Body Style = PIDG?Barrel Type = Closed Barrel?Wire/Cable Type = Regular WireView all Features | Find SimilarProductsCheck Pricing &AvailabilitySearch for ToolingProduct FeatureSelectorContact Us AboutThis ProductQuick LinksDocumentation & Additional InformationProduct Drawings:?TERMINAL, RING TONGUE, PIDG, WIRE SIZE, 22-16 AWG(PDF, English)Catalog Pages/Data Sheets:?STANDARD TERMINALS AND SPLICES(PDF, English)Product Specifications:?None AvailableApplication Specifications:?Pre-Insulated Diamond Grip (PIDG) Terminals, Splices...(PDF, English)Instruction Sheets:?None AvailableCAD Files: (CAD Format & Compression Information)?2D Drawing (DXF, Version U)?3D Model (IGES, Version U)?3D Model (STEP, Version U)List all Documents Additional Information:?Product Line InformationRelated Products:?ToolingProduct Features (Please use the Product Drawing for all design activity)Product Type Features:?Terminal Shape = Ring Tongue?Receptacle Style = Straight?Body Style = PIDG?Barrel Type = Closed Barrel?Wire/Cable Type = Regular Wire?Insulation = Yes?Insulation Support = Insulation Support?Insulation Diameter (mm [in]) = 3.18 [.125]Max.?Stud Size = 6 [M3.5]?Stud Diameter (mm [in]) = 3.68 [0.145]?Shape = RING-041?Heavy Duty = No?Material = Copper?Finish = Tin?Tongue Material Thickness (mm [in]) = 0.79[0.031]?Color Code = Red Electrical Characteristics:?Voltage (VAC) = 300Body Related Features:?Wire Range (mm [AWG]) = 0.50-0.60²[20] ?Wire Range (CMA) = 509 –3,260?Insulation Sleeve Material = NylonIndustry Standards:?Government/Industry Qualification = No?RoHS/ELV Compliance = RoHS compliant, ELVcompliant?Lead Free Solder Processes = Not relevant forlead free process?RoHS/ELV Compliance History = Always wasRoHS compliantPackaging Related Features:?Packaging Method = Loose PieceOther:?Brand = AMPProvide Website Feedback | Contact Customer Support。

74437349022;中文规格书,Datasheet资料

1.2 1.1 1.02012-06-282012-02-292011-10-01SStSStSStSStBDBDWürth Elektronik eiSos GmbH & Co. KGEMC & Inductive SolutionsMax-Eyth-Str. 174638 WaldenburgGermanyTel. +49 (0) 79 42 945 - 0A Dimensions: [mm]F Typical Inductance vs. Current Characteristics: F Typical Temperature rise vs. Current Characteristics:H1: Classification Reflow Profile for SMT components:H2: Classification Reflow ProfilesProfile FeaturePreheat- Temperature Min (T smin ) - Temperature Max (T smax ) - Time (t s ) from (T smin to T smax )Ramp-up rate (T L to T P )Liquidous temperature (T L )Time (t L ) maintained above T L Peak package body temperature (T p )Time within 5°C of actual peak temperature (t p )Ramp-down rate (T P to T L )Time 25°C to peak temperature Pb-Free Assembly 150°C 200°C60-180 seconds 3°C/ second max.217°C60-150 seconds See Table H320-30 seconds 6°C/ second max.8 minutes max.refer to IPC/JEDEC J-STD-020DH3: Package Classification Reflow TemperaturePB-Free Assembly PB-Free Assembly PB-Free Assembly Package Thickness< 1.6 mm 1.6 - 2.5 mm ≥ 2.5 mmVolume mm³<350260°C 260°C 250°CVolume mm³350 - 2000260°C 250°C 245°CVolume mm³>2000260°C 245°C 245°Crefer to IPC/JEDEC J-STD-020DH Soldering Specifications:I Cautions and Warnings:The following conditions apply to all goods within the product series of WE-LHMIof Würth Elektronik eiSos GmbH & Co. KG:General:All recommendations according to the general technical specifications of the data-sheet have to be complied with.The disposal and operation of the product within ambient conditions which probably alloy or harm the wire isolation has to be avoided.If the product is potted in customer applications, the potting material might shrink during and after hardening. Accordingly to this the product is exposed to the pressure of the potting material with the effect that the core, wire and termination is possibly damaged by this pressure and so the electrical as well as the mechanical characteristics are endanger to be affected. After the potting material is cured, the core, wire and termination of the product have to be checked if any reduced electrical or mechanical functions or destructions have occurred.The responsibility for the applicability of customer specific products and use in a particular customer design is always within the authority of the customer. All technical specifications for standard products do also apply for customer specific products.Washing varnish agent that is used during the production to clean the application might damage or change the characteristics of the wire in-sulation, the marking or the plating. The washing varnish agent could have a negative effect on the long turn function of the product.Direct mechanical impact to the product shall be prevented as the iron powder material of the core could flake or in the worst case it could break.Product specific:Follow all instructions mentioned in the datasheet, especially:•The solder profile has to be complied with according to the technical reflow soldering specification, otherwise no warranty will be sustai-ned.•All products are supposed to be used before the end of the period of 12 months based on the product date-code, if not a 100% solderabi-lity can´t be warranted.•Violation of the technical product specifications such as exceeding the nominal rated current will result in the loss of warranty.1. General Customer ResponsibilitySome goods within the product range of Würth Elektronik eiSos GmbH & Co. KG contain statements regarding general suitability for certain application areas. These statements about suitability are based on our knowledge and experience of typical requirements concerning the are-as, serve as general guidance and cannot be estimated as binding statements about the suitability for a customer application. The responsibi-lity for the applicability and use in a particular customer design is always solely within the authority of the customer. Due to this fact it is up to the customer to evaluate, where appropriate to investigate and decide whether the device with the specific product characteristics described in the product specification is valid and suitable for the respective customer application or not.2. Customer Responsibility related to Specific, in particular Safety-Relevant ApplicationsIt has to be clearly pointed out that the possibility of a malfunction of electronic components or failure before the end of the usual lifetime can-not be completely eliminated in the current state of the art, even if the products are operated within the range of the specifications.In certain customer applications requiring a very high level of safety and especially in customer applications in which the malfunction or failure of an electronic component could endanger human life or health it must be ensured by most advanced technological aid of suitable design of the customer application that no injury or damage is caused to third parties in the event of malfunction or failure of an electronic component.3. Best Care and AttentionAny product-specific notes, warnings and cautions must be strictly observed.4. Customer Support for Product SpecificationsSome products within the product range may contain substances which are subject to restrictions in certain jurisdictions in order to serve spe-cific technical requirements. Necessary information is available on request. In this case the field sales engineer or the internal sales person in charge should be contacted who will be happy to support in this matter.5. Product R&DDue to constant product improvement product specifications may change from time to time. As a standard reporting procedure of the Product Change Notification (PCN) according to the JEDEC-Standard inform about minor and major changes. In case of further queries regarding the PCN, the field sales engineer or the internal sales person in charge should be contacted. The basic responsibility of the customer as per Secti-on 1 and 2 remains unaffected.6. Product Life CycleDue to technical progress and economical evaluation we also reserve the right to discontinue production and delivery of products. As a stan-dard reporting procedure of the Product Termination Notification (PTN) according to the JEDEC-Standard we will inform at an early stage about inevitable product discontinuance. According to this we cannot guarantee that all products within our product range will always be available. Therefore it needs to be verified with the field sales engineer or the internal sales person in charge about the current product availability ex-pectancy before or when the product for application design-in disposal is considered.The approach named above does not apply in the case of individual agreements deviating from the foregoing for customer-specific products.7. Property RightsAll the rights for contractual products produced by Würth Elektronik eiSos GmbH & Co. KG on the basis of ideas, development contracts as well as models or templates that are subject to copyright, patent or commercial protection supplied to the customer will remain with Würth Elektronik eiSos GmbH & Co. KG.8. General Terms and ConditionsUnless otherwise agreed in individual contracts, all orders are subject to the current version of the “General Terms and Conditions of Würth Elektronik eiSos Group”, last version available at .J Important Notes:The following conditions apply to all goods within the product range of Würth Elektronik eiSos GmbH & Co. KG:分销商库存信息: WURTH-ELECTRONICS 74437349022。

建龙软件全套表格

施工单位用表指南工程质量事故报告/SG-001填写说明一、本表为发生工程质量事故时施工单位向建设、监理、质量监督机构报告所用表格。

二、本报表由施工单位项目负责人部填写。

三、填写要求：1.本表中的工程名称、地点、建设单位、施工单位应填写全称，应和《工程质量监督登记表》相一致。

2.事故发生的时间及部位应详细准确，估计经济损失为初步估计的直接经济损失。

3.伤亡人数应按轻伤、重伤、死亡人数分别填写。

4.最后一栏施工单位名称应写明项目负责人部全称，且盖上施工单位（项目负责人部）公章，负责人由项目负责人签名。

5.施工单位应在工程事故发生后及时填写，并采取必要措施防止事故扩大。

施工单位应如实填写、不得隐瞒。

四、如事故中发生了人员伤亡，还应按安全事故有关程序报告。

五、本表一工四份，分别报当地建设、监理、质量监督机构，施工单位各存一份。

单位工程开工报告编号：第册施工日志施工日志技术核定单SG-004填写说明一、该表适用于施工单位提出的技术修改和工程变更。

二、工程变更的要求可能来自建设单位、设计单位或施工单位。

为保证工程质量，不同情况下，工程变更的实施、设计图纸的澄清、修改、具有不同的工作程序。

三、施工单位提出的要求及处理：在施工过程中，施工单位的工程变更可能是：1.要求作某些技术修改：这里是指施工单位根据施工现场的具体条件和自身技术、经验和施工设备及条件，在不改变原设计图纸原则的前提下，提出的对设计图纸某些技术上的修改要求，如对某种规格的钢筋采用替代规格的钢筋，这种变更需通过监理、建设、设计同意并按程序批准后才能实施。

2.要求作设计变更：这里是指施工期间，对于设计单位在设计图纸中所表达的设计标准状态的改变和修改。

这种修改，一般均会涉及重新出图的问题，必须待修改图出来以后才能实施。

四、需要注意的是，不论是建设单位或者施工单位提出的工程变更或图纸修改，均要按规定程序通过监理工程师审查并经有关各方研究，确认其必要性后，才能实施。

COP8SGA544N7资料

COP8SG Family8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory,Two Comparators and USARTGeneral DescriptionThe COP8SG Family ROM and OTP based microcontrollers are highly integrated COP8™Feature core devices with 8k to 32k memory and advanced features including Analog comparators,and zero external components.These single-chip CMOS devices are suited for more complex applica-tions requiring a full featured controller with larger memory,low EMI,two comparators,and a full-duplex USART.COP8SGx7devices are 100%form-fit-function compatible OTP (One Time Programmable)versions for use in produc-tion or development of the COP8SGx5ROM.Erasable windowed versions (Q3)are available for use with a range of COP8software and hardware development tools.Family features include an 8-bit memory mapped architec-ture,15MHz CKI with 0.67µs instruction cycle,14inter-rupts,three multi-function 16-bit timer/counters with PWM,full duplex USART,MICROWIRE/PLUS ™,two analog com-parators,two power saving HALT/IDLE modes,MIWU,idle timer,on-chip R/C oscillator,high current outputs,user se-lectable options (WATCHDOG ™,4clock/oscillator modes,power-on-reset),2.7V to 5.5V operation,program code se-curity,and 28/40/44pin packages.Devices included in this datasheet are:Device Memory (bytes)RAM (bytes)I/O Pins Packages Temperature COP8SGE58k ROM 25624/36/4028DIP/SOIC,40DIP ,44PLCC/QFP/CSP -40to +85˚C,-40to +125˚C COP8SGG516k ROM 51224/36/4028DIP/SOIC,40DIP ,44PLCC/QFP/CSP -40to +85˚C,-40to +125˚C COP8SGH520k ROM 51224/36/4028DIP/SOIC,40DIP ,44PLCC/QFP/CSP -40to +85˚C,-40to +125˚C COP8SGK524k ROM 51224/36/4028DIP/SOIC,40DIP ,44PLCC/QFP/CSP -40to +85˚C,-40to +125˚C COP8SGR532k ROM 51224/36/4028DIP/SOIC,40DIP ,44PLCC/QFP/CSP -40to +85˚C,-40to +125˚C COP8SGE78k OTP EPROM 25624/36/4028DIP/SOIC,40DIP ,44PLCC/QFP/CSP -40to +85˚C,-40to +125˚C COP8SGR732k OTP EPROM 51224/36/4028DIP/SOIC,40DIP ,44PLCC/QFP/CSP -40to +85˚C,-40to +125˚C COP8SGR7-Q332k EPROM51224/36/4028DIP ,40DIP ,44PLCCRoom Temp.Key Featuresn Low cost 8-bit microcontrollern Quiet Design (low radiated emissions)n Multi-Input Wakeup pins with optional interrupts (8pins)nMask selectable clock options —Crystal oscillator—Crystal oscillator option with on-chip bias resistor —External oscillator —Internal R/C oscillatorn Internal Power-On-Reset —user selectablen WATCHDOG and Clock Monitor Logic —user selectable n Eight high current outputsn 256or 512bytes on-board RAMn8k to 32k ROM or OTP EPROM with security featureCPU Featuresn Versatile easy to use instruction set n 0.67µs instruction cycle timen Fourteen multi-source vectored interrupts servicing —External interrupt /Timers T0—T3—MICROWIRE/PLUS Serial Interface —Multi-Input Wake Up —Software Trap—USART (2;1receive and 1transmit)—Default VIS (default interrupt)n 8-bit Stack Pointer SP (stack in RAM)n Two 8-bit Register Indirect Data Memory Pointers n True bit manipulationn BCD arithmetic instructionsPeripheral Featuresn Multi-Input Wakeup Logicn Three 16-bit timers (T1—T3),each with two 16-bit registers supporting:—Processor Independent PWM mode —External Event Counter mode —Input Capture modeCOP8™is a trademark of National Semiconductor Corporation.October 2001COP8SG Family,8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory,Two Comparators and USART©2001National Semiconductor Corporation Peripheral Features(Continued)n Idle Timer (T0)n MICROWIRE/PLUS Serial Interface (SPI Compatible)n Full Duplex USARTnTwo Analog ComparatorsI/O Featuresn Software selectable I/O options (TRI-STATE ®Output,Push-Pull Output,Weak Pull-Up Input,and High Impedance Input)n Schmitt trigger inputs on ports G and L n Eight high current outputsn Packages:28SO with 24I/O pins,40DIP with 36I/O pins,44PLCC,PQFP and CSP with 40I/O pinsFully Static CMOS Designn Low current drain (typically <4µA)n Two power saving modes:HALT and IDLETemperature Rangen −40˚C to +85˚C,−40˚C to +125˚CDevelopment Supportn Windowed packages for DIP and PLCCn Real time emulation and debug tools availableBlock Diagram10131744FIGURE 1.COP8SGx Block DiagramC O P 8S G F a m i l y 21.0Device Description1.1ARCHITECTUREThe COP8family is based on a modified Harvard architec-ture,which allows data tables to be accessed directly from program memory.This is very important with modern microcontroller-based applications,since program memory is usually ROM or EPROM,while data memory is usually RAM.Consequently data tables need to be contained in non-volatile memory,so they are not lost when the micro-controller is powered down.In a modified Harvard architec-ture,instruction fetch and memory data transfers can be overlapped with a two stage pipeline,which allows the next instruction to be fetched from program memory while the current instruction is being executed using data memory. This is not possible with a Von Neumann single-address bus architecture.The COP8family supports a software stack scheme that allows the user to incorporate many subroutine calls.This capability is important when using High Level Languages. With a hardware stack,the user is limited to a small fixed number of stack levels.1.2INSTRUCTION SETIn today’s8-bit microcontroller application arena cost/ performance,flexibility and time to market are several of the key issues that system designers face in attempting to build well-engineered products that compete in the marketplace. Many of these issues can be addressed through the manner in which a microcontroller’s instruction set handles process-ing tasks.And that’s why COP8family offers a unique and code-efficient instruction set—one that provides the flexibil-ity,functionality,reduced costs and faster time to market that today’s microcontroller based products require.Code efficiency is important because it enables designers to pack more on-chip functionality into less program memory space.Selecting a microcontroller with less program memory size translates into lower system costs,and the added security of knowing that more code can be packed into the available program memory space.1.2.1Key Instruction Set FeaturesThe COP8family incorporates a unique combination of in-struction set features,which provide designers with optimum code efficiency and program memory utilization.Single Byte/Single Cycle Code ExecutionThe efficiency is due to the fact that the majority of instruc-tions are of the single byte variety,resulting in minimum program space.Because compact code does not occupy a substantial amount of program memory space,designers can integrate additional features and functionality into the microcontroller program memory space.Also,the majority instructions executed by the device are single cycle,result-ing in minimum program execution time.In fact,77%of the instructions are single byte single cycle,providing greater code and I/O efficiency,and faster code execution.1.2.2Many Single-Byte,Multifunction InstructionsThe COP8instruction set utilizes many single-byte,multi-function instructions.This enables a single instruction to accomplish multiple functions,such as DRSZ,DCOR,JID, LD(Load)and X(Exchange)instructions with post-incrementing and post-decrementing,to name just a fewexamples.In many cases,the instruction set can simulta-neously execute as many as three functions with the samesingle-byte instruction.JID:(Jump Indirect);Single byte instruction;decodes exter-nal events and jumps to corresponding service routines(analogous to“DO CASE”statements in higher level lan-guages).LAID:(Load Accumulator-Indirect);Single byte look up tableinstruction provides efficient data path from the programmemory to the CPU.This instruction can be used for tablelookup and to read the entire program memory for checksumcalculations.RETSK:(Return Skip);Single byte instruction allows returnfrom subroutine and skips next instruction.Decision tobranch can be made in the subroutine itself,saving code.AUTOINC/DEC:(Auto-Increment/Auto-Decrement);Theseinstructions use the two memory pointers B and X to effi-ciently process a block of data(analogous to“FOR NEXT”inhigher level languages).1.2.3Bit-Level ControlBit-level control over many of the microcontroller’s I/O portsprovides a flexible means to ease layout concerns and saveboard space.All members of the COP8family provide theability to set,reset and test any individual bit in the datamemory address space,including memory-mapped I/O portsand associated registers.1.2.4Register SetThree memory-mapped pointers handle register indirect ad-dressing and software stack pointer functions.The memorydata pointers allow the option of post-incrementing or post-decrementing with the data movement instructions(LOAD/EXCHANGE).And15memory-maped registers allow de-signers to optimize the precise implementation of certainspecific instructions.1.3EMI REDUCTIONThe COP8SGx5family of devices incorporates circuitry thatguards against electromagnetic interference—an increasingproblem in today’s microcontroller board designs.National’spatented EMI reduction technology offers low EMI clockcircuitry,gradual turn-on output drivers(GTOs)and internalICCsmoothing filters,to help circumvent many of the EMI issues influencing embedded control designs.National hasachieved15dB–20dB reduction in EMI transmissions whendesigns have incorporated its patented EMI reducing cir-cuitry.1.4PACKAGING/PIN EFFICIENCYReal estate and board configuration considerations demandmaximum space and pin efficiency,particularly given today’shigh integration and small product form factors.Microcon-troller users try to avoid using large packages to get the I/Orge packages take valuable board space andincreases device cost,two trade-offs that microcontrollerdesigns can ill afford.The COP8family offers a wide range of packages and do notwaste pins:up to90.9%(or40pins in the44-pin package)are devoted to useful I/O.COP8SGFamily3Connection Diagrams10131704Top ViewOrder Number COP8SGXY28M8See NS Package Number M28B Order Number COP8SGXY28N8See NS Package Number N28B Order Number COP8SGR728Q3See NS Package Number D28JQ10131753Top ViewOrder Number COP8SGR7HLQ8See NS Package Number LQA44A10131705Top ViewOrder Number COP8SGXY40N8See NS Package Number N40A Order Number COP8SGR5740Q3See NS Package Number D40KQ10131706Top ViewOrder Number COP8SGXY44V8See NS Package Number V44A Order Number COP8SGR744J3See NS Package Number EL44C10131743Top ViewOrder Number COP8SGXYVEJ8See NS Package Number VEJ44ANote 1:X =E for 8k,G for 16k,H for 20k,K for 24k,R for 32k Y =5for ROM,7for OTPC O P 8S G F a m i l y 4Pinouts for28-,40-and44-Pin PackagesPort Type Alt.Fun 28-PinSO40-Pin DIP44-PinPLCC44-Pin PQFP44-Pin CSPL0I/O MIWU1117171112 L1I/O MIWU or CKX1218181213 L2I/O MIWU or TDX1319191314 L3I/O MIWU or RDX1420201415 L4I/O MIWU or T2A1521251920 L5I/O MIWU or T2B1622262021 L6I/O MIWU or T3A1723272122 L7I/O MIWU or T3B1824282223 G0I/O INT2535393334 G1I/O WDOUT*2636403435 G2I/O T1B2737413536 G3I/O T1A2838423637 G4I/O SO1334142 G5I/O SK2444243 G6I SI3554344 G7I CKO466441 D0O1925292324 D1O2026302425 D2O2127312526 D3O2228322627 D4O29332728 D5O30342829 D6O31352930 D7O32363031 F0I/O79934 F1I/O COMP1IN−8101045 F2I/O COMP1IN+9111156 F3I/O COMP1OUT10121267 F4I/O COMP2IN−131378 F5I/O COMP2IN+141489 F6I/O COMP2OUT1515910 F7I/O16161011 C0I/O39433738 C1I/O40443839 C2I/O113940 C3I/O224041 C4I/O211516 C5I/O221617 C6I/O231718 C7I/O241819 VCC68823 GND2333373132 CKI I57712 RESET I2434383233 *G1operation as WDOUT is controlled by ECON bit2.COP8SG Family 52.1Ordering Information10131708FIGURE 2.Part Numbering SchemeC O P 8S G F a m i l y 63.0Electrical CharacteristicsAbsolute Maximum Ratings(Note2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.Supply Voltage(V CC)7VVoltage at Any Pin−0.3V to V CC+0.3VTotal Current into V CCPin(Source)100mATotal Current out ofGND Pin(Sink)110mAStorage TemperatureRange−65˚C to+140˚CESD Protection Level2kV(Human BodyModel) Note2:Absolute maximum ratings indicate limits beyond which damage to the device may occur.DC and AC electrical specifications are not ensured when operating the device at absolute maximum ratings.DC Electrical Characteristics−40˚C≤T A≤+85˚C unless otherwise specified.Parameter Conditions Min Typ Max Units Operating Voltage 2.7 5.5V Power Supply Rise Time1050x106ns V CC Start Voltage to Guarantee POR00.25V Power Supply Ripple(Note4)Peak-to-Peak0.1V cc V Supply Current(Note5)CKI=15MHz V CC=5.5V,t C=0.67µs9.0mA CKI=10MHz V CC=5.5V,t C=1µs 6.0mA CKI=4MHz V CC=4.5V,t C=2.5µs 2.1mA HALT Current(Note6)V CC=5.5V,CKI=0MHz<410µA IDLE Current(Note5)CKI=15MHz V CC=5.5V,t C=0.67µs 2.25mA CKI=10MHz V CC=5.5V,t C=1µs 1.5mA CKI=4MHz V CC=4.5V,t C=2.5µs0.8mA Input Levels(V IH,V IL)RESETLogic High0.8V cc V Logic Low0.2V cc V CKI,All Other InputsLogic High0.7V cc V Logic Low0.2V cc V Internal Bias Resistor for theCrystal/Resonator Oscillator0.512MΩCKI Resistance to V CC or GND when R/COscillator is selectedV CC=5.5V5811kΩHi-Z Input Leakage V CC=5.5V−2+2µA Input Pullup Current V CC=5.5V,V IN=0V−40−250µA G and L Port Input Hysteresis V CC=5.5V0.25V cc V COP8SG Family 7DC Electrical Characteristics(Continued)−40˚C ≤T A ≤+85˚C unless otherwise specified.ParameterConditionsMinTypMaxUnitsOutput Current Levels D Outputs Source V CC =4.5V,V OH =3.3V −0.4mA V CC =2.7V,V OH =1.8V -0.2mA Sink V CC =4.5V,V OL =1.0V 10mA V CC =2.7V,V OL =0.4V 2mA All OthersSource (Weak Pull-Up Mode)V CC =4.5V,V OH =2.7V −10.0−110µA V CC =2.7V,V OH =1.8V -2.5-33µA Source (Push-Pull Mode)V CC =4.5V,V OH =3.3V −0.4mA V CC =2.7V,V OH =1.8V -0.2mA Sink (Push-Pull Mode)V CC =4.5V,V OL =0.4V V CC =2.7V,V OL =0.4V 1.60.7mA mA TRI-STATE LeakageV CC =5.5V−2+2µA Allowable Sink Current per Pin (Note 9)D Outputs and L0to L315mA All Others3mA Maximum Input Current without Latchup (Note 7)Room Temp.±200mA RAM Retention Voltage,Vr 2.0V V CC Rise Time from a V CC ≥2.0V (Note 10)12µsEPROM Data Retenton (Note 8),(Note 9)T A =55˚C >29years Input Capacitance (Note 9)7pF Load Capacitance on D2(Note 9)1000pFAC Electrical Characteristics−40˚C ≤T A ≤+85˚C unless otherwise specified.ParameterConditionsMin Typ Max Units Instruction Cycle Time (t C )Crystal/Resonator,External 4.5V ≤V CC ≤5.5V 0.67µs 2.7V ≤V CC ≤4.5V 2µsR/C Oscillator (Internal) 4.5V ≤V CC ≤5.5V 2µs Frequency Variation (Note 9) 4.5V ≤V CC ≤5.5V ±35%External CKI Clock Duty Cycle (Note 9)fr =Max4555%Rise Time (Note 9)fr =10MHz Ext Clock 8ns Fall Time (Note 9)fr =10MHz Ext Clock5ns MICROWIRE Setup Time (t UWS )(Note 11)20ns MICROWIRE Hold Time (t UWH )(Note 11)56nsMICROWIRE Output Propagation Delay (t UPD )(Note 11)220nsInput Pulse Width (Note 9)Interrupt Input High Time 1t C Interrupt Input Low Time 1t C Timer 1,2,3,Input High Time 1t C Timer 12,3,Input Low Time 1t C Reset Pulse Width1µsNote 3:t C =Instruction cycle time.C O P 8S G F a m i l y 8AC Electrical Characteristics(Continued)Note4:Maximum rate of voltage change must be<0.5V/ms.Note5:Supply and IDLE currents are measured with CKI driven with a square wave Oscillator,External Oscillator,inputs connected to V CC and outputs driven low but not connected to a load.Note6:The HALT mode will stop CKI from oscillating in the R/C and the Crystal configurations.In the R/C configuration,CKI is forced high internally.In the crystal or external configuration,CKI is TRI-STATE.Measurement of I DD HALT is done with device neither sourcing nor sinking current;with L.F,C,G0,and G2–G5 programmed as low outputs and not driving a load;all outputs programmed low and not driving a load;all inputs tied to V CC;clock monitor disabled.Parameter refers to HALT mode entered via setting bit7of the G Port data register.Note7:Pins G6and RESET are designed with a high voltage input network.These pins allow input voltages>V CC and the pins will have sink current to V CC when biased at voltages>V CC(the pins do not have source current when biased at a voltage below V CC).The effective resistance to V CC is750Ω(typical).These two pins will not latch up.The voltage at the pins must be limited to<14V.WARNING:Voltages in excess of14V will cause damage to the pins.This warning excludes ESD transients.Note8:National Semiconductor uses the High Temperature Storage Life(HTSL)test to evaluate the data retention capabilities of the EPROM memory cells used in our OTP microcontrollers.Qualification devices have been stressed at150˚C for1000hours.Under these conditions,our EPROM cells exhibit data retention capabilities in excess of29years.This is based on an activation energy of0.7eV derated to55˚C.Note9:Parameter characterized but not tested.Note10:Rise times faster than the minimum specification may trigger an internal power-on-reset.Note11:MICROWIRE Setup and Hold Times and Propagation Delays are referenced to the appropriate edge of the MICROWIRE clock.See and the MICROWIRE operation description.Comparators AC and DC CharacteristicsV CC=5V,−40˚C≤T A≤+85˚C.Parameter Conditions Min Typ Max Units Input Offset Voltage(Note12)0.4V≤V IN≤V CC−1.5V±5±15mV Input Common Mode Voltage Range0.4V CC−1.5V Voltage Gain100dB Low Level Output Current V OL=0.4V−1.6mA High Level Output Current V OH=V CC−0.4V 1.6mA DC Supply Current per Comparator(When Enabled)150µAResponse Time(Note13)200mV step input100mV Overdrive,100pF Load600nsComparator Enable Time(Note14)600ns Note12:The comparator inputs are high impedance port inputs and,as such,input current is limited to port input leakage current.Note13:Response time is measured from a step input to a valid logic level at the comparator output.software response time is dependent of instruction execution. Note14:Comparator enable time is that delay time required between the end of the instruction cycle that enables the comparator and using the output of the comparator,either by hardware or by software.10131709FIGURE3.MICROWIRE/PLUS Timing COP8SG Family 9Absolute Maximum Ratings(Note 2)If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications.Supply Voltage (V CC )7VVoltage at Any Pin −0.3V to V CC +0.3VTotal Current into V CC Pin (Source)100mA Total Current out of GND Pin (Sink)110mAStorage Temperature Range−65˚C to +140˚C ESD Protection Level2kV (Human BodyModel)Note 15:Absolute maximum ratings indicate limits beyond which damage to the device may occur.DC and AC electrical specifications are not ensured when operating the device at absolute maximum ratings.DC Electrical Characteristics−40˚C ≤T A ≤+125˚C unless otherwise specified.ParameterConditionsMin TypMax Units Operating Voltage 4.5 5.5V Power Supply Rise Time1050x 106ns V CC Start Voltage to Guarantee POR 00.25V Power Supply Ripple (Note 4)Peak-to-Peak0.1V ccVSupply Current (Note 5)CKI =10MHz V CC =5.5V,t C =1µs 6.0mA CKI =4MHz V CC =4.5V,t C =2.5µs 2.1mA HALT Current (Note 6)V CC =5.5V,CKI =0MHz<410µAIDLE Current (Note 5)CKI =10MHz V CC =5.5V,t C =1µs 1.5mA CKI =4MHz V CC =4.5V,t C =2.5µs0.8mAInput Levels (V IH ,V IL )RESET Logic High 0.8V ccV Logic Low 0.2V ccVCKI,All Other Inputs Logic High 0.7V ccV Logic Low0.2V ccV Internal Bias Resistor for the Crystal/Resonator Oscillator0.512M ΩCKI Resistance to V CC or GND when R/C Oscillator is selected V CC =5.5V 5811k ΩHi-Z Input Leakage V CC =5.5V−5+5µA Input Pullup CurrentV CC =5.5V,V IN =0V −35−400µA G and L Port Input Hysteresis V CC =5.5V0.25V ccVOutput Current Levels D Outputs Source V CC =4.5V,V OH =3.3V −0.4mA Sink V CC =4.5V,V OL =1.0V9mAAll OthersSource (Weak Pull-Up Mode)V CC =4.5V,V OH =2.7V −9−140µA Source (Push-Pull Mode)V CC =4.5V,V OH =3.3V −0.4mA Sink (Push-Pull Mode)V CC =4.5V,V OL =0.4V 1.4mA TRI-STATE LeakageV CC =5.5V−5+5µAAllowable Sink Current per Pin (Note 9)D Outputs and L0to L31515mA All Others33mAC O P 8S G F a m i l y 10DC Electrical Characteristics(Continued)−40˚C≤T A≤+125˚C unless otherwise specified.Parameter Conditions Min Typ Max UnitsMaximum Input Current without Latchup (Note7)Room Temp.±200mARAM Retention Voltage,Vr 2.0V V CC Rise Time from a V CC≥2.0V(Note10)12µs EPROM Data Retenton(Note8),(Note9)T A=55˚C>29years Input Capacitance(Note9)7pF Load Capacitance on D2(Note9)1000pF COP8SG FamilyAC Electrical Characteristics−40˚C ≤T A ≤+125˚C unless otherwise specified.ParameterConditionsMinTypMaxUnitsInstruction Cycle Time (t C )Crystal/Resonator,External 4.5V ≤V CC ≤5.5V 1µs R/C Oscillator (Internal) 4.5V ≤V CC ≤5.5V 2µs Frequency Variation (Note 9) 4.5V ≤V CC ≤5.5V ±35%External CKI Clock Duty Cycle (Note 9)fr =Max4555%Rise Time (Note 9)fr =10MHz Ext Clock 12ns Fall Time (Note 9)fr =10MHz Ext Clock8ns MICROWIRE Setup Time (t UWS )(Note 11)20ns MICROWIRE Hold Time (t UWH )(Note 11)56ns MICROWIRE Output Propagation Delay (t UPD )(Note 11)220nsInput Pulse Width (Note 9)Interrupt Input High Time 1t C Interrupt Input Low Time 1t C Timer 1,2,3,Input High Time 1t C Timer 12,3,Input Low Time 1t C Reset Pulse Width1µsComparators AC and DC CharacteristicsV CC =5V,−40˚C ≤T A ≤+125˚C.ParameterConditionsMinTypMaxUnits Input Offset Voltage (Note 12)0.4V ≤V IN ≤V CC −1.5V±5±25mV Input Common Mode Voltage Range 0.4V CC −1.5V Voltage Gain100dB Low Level Output Current V OL =0.4V −1.6mA High Level Output CurrentV OH =V CC −0.4V1.6mA DC Supply Current per Comparator (When Enabled)150µAResponse Time (Note 13)200mV step input 100mV Overdrive,600ns Comparator Enable Time600nsC O P 8S G F a m i l yTypical Performance Characteristics TA=25˚C(unless otherwise specified)10131749101317501013175110131752COP8SG Family4.0Pin DescriptionsThe COP8SGx I/O structure enables designers to reconfig-ure the microcontroller’s I/O functions with a single instruc-tion.Each individual I/O pin can be independently configured as output pin low,output high,input with high impedance or input with weak pull-up device.A typical example is the use of I/O pins as the keyboard matrix input lines.The input lines can be programmed with internal weak pull-ups so that the input lines read logic high when the keys are all open.With a key closure,the corresponding input line will read a logic zero since the weak pull-up can easily be overdriven.When the key is released,the internal weak pull-up will pull the input line back to logic high.This eliminates the need for external pull-up resistors.The high current options are avail-able for driving LEDs,motors and speakers.This flexibility helps to ensure a cleaner design,with less external compo-nents and lower costs.Below is the general description of all available pins.V CC and GND are the power supply pins.All V CC and GND pins must be connected.CKI is the clock input.This can come from the Internal R/C oscillator,external,or a crystal oscillator (in conjunction with CKO).See Oscillator Description section.RESET is the master reset input.See Reset description section.Each device contains four bidirectional 8-bit I/O ports (C,G,L and F),where each individual bit may be independently configured as an input (Schmitt trigger inputs on ports L and G),output or TRI-STATE under program control.Three data memory address locations are allocated for each of these I/O ports.Each I/O port has two associated 8-bit memory mapped registers,the CONFIGURATION register and the output DATA register.A memory mapped address is also reserved for the input pins of each I/O port.(See the memory map for the various addresses associated with the I/O ports.)Figure 4shows the I/O port configurations.The DATA and CONFIGURATION registers allow for each port bit to be individually configured under software control as shown be-low:CONFIGURATIONRegisterDATA RegisterPort Set-Up00Hi-Z Input(TRI-STATE Output)01Input with Weak Pull-Up 10Push-Pull Zero Output 11Push-Pull One OutputPort L is an 8-bit I/O port.All L-pins have Schmitt triggers on the inputs.Port L supports the Multi-Input Wake Up feature on all eight pins.Port L has the following alternate pin functions:L7Multi-input Wakeup or T3B (Timer T3B Input)L6Multi-input Wakeup or T3A (Timer T3A Input)L5Multi-input Wakeup or T2B (Timer T2B Input)L4Multi-input Wakeup or T2A (Timer T2A Input)L3Multi-input Wakeup and/or RDX (USART Receive)L2Multi-input Wakeup or TDX (USART Transmit)L1Multi-input Wakeup and/or CKX (USART Clock)L0Multi-input WakeupPort G is an 8-bit port.Pin G0,G2–G5are bi-directional I/O ports.Pin G6is always a general purpose Hi-Z input.All pins have Schmitt Triggers on their inputs.Pin G1serves as thededicated WATCHDOG output with weak pullup if WATCHDOG feature is selected by the Mask Option reg-ister.The pin is a general purpose I/O if WATCHDOG feature is not selected.If WATCHDOG feature is selected,bit 1of the Port G configuration and data register does not have any effect on Pin G1setup.Pin G7is either input or output depending on the oscillator option selected.With the crystal oscillator option selected,G7serves as the dedicated output pin for the CKO clock output.With the internal R/C or the external oscillator option selected,G7serves as a gen-eral purpose Hi-Z input pin and is also used to bring the device out of HALT mode with a low to high transition on G7.Since G6is an input only pin and G7is the dedicated CKO clock output pin (crystal clock option)or general purpose input (R/C or external clock option),the associated bits in the data and configuration registers for G6and G7are used for special purpose functions as outlined below.Reading the G6and G7data bits will return zeroes.Each device will be placed in the HALT mode by writing a “1”to bit 7of the Port G Data Register.Similarly the device will be placed in the IDLE mode by writing a “1”to bit 6of the Port G Data Register.Writing a “1”to bit 6of the Port G Configuration Register enables the MICROWIRE/PLUS to operate with the alter-nate phase of the SK clock.The G7configuration bit,if set high,enables the clock start up delay after HALT when the R/C clock configuration is used.Config.Reg.Data Reg.G7CLKDLY HALT G6Alternate SKIDLEPort G has the following alternate features:G7CKO Oscillator dedicated output or general purposeinputG6SI (MICROWIRE Serial Data Input)G5SK (MICROWIRE Serial Clock)G4SO (MICROWIRE Serial Data Output)G3T1A (Timer T1I/O)G2T1B (Timer T1Capture Input)G1WDOUT WATCHDOG and/or CLock Monitor if WATCH-DOG enabled,otherwise it is a general purpose I/O G0INTR (External Interrupt Input)Port C is an 8-bit I/O port.The 40-pin device does not have a full complement of Port C pins.The unavailable pins are not terminated.A read operation on these unterminated pins will return unpredictable values.The 28pin device do not offer Port C.On this device,the associated Port C Data and Configuration registers should not be used.Port F is an 8-bit I/O port.The 28--pin device does not have a full complement of Port F pins.The unavailable pins are not terminated.A read operation on these unterminated pins will return unpredictable values.Port F1–F3are used for Comparator 1.Port F4–F6are used for Comparator 2.The Port F has the following alternate features:F6COMP2OUT (Comparator 2Output)F5COMP2+IN (Comparator 2Positive Input)F4COMP2-IN (Comparator 2Negative Input)F3COMP1OUT (Comparator 1Output)F2COMP1+IN (Comparator 1Positive Input)F1COMP1-IN (Comparator 1Negative Input)C O P 8S G F a m i l y。

CS5344-CZZR中文资料

元器件交易网
CS5343/4
98 dB, 96 kHz, Multi-Bit Audio A/D Converter
Features
! Advanced Multi-Bit ∆Σ Architecture ! 24-bit Conversion ! Supports Audio Sample Rates Up to 108 kHz ! 98 dB Dynamic Range at 5 V ! -90 dB THD+N ! Low-Latency Digital Filter ! High-Pass Filter to Remove DC Offsets ! Single +3.3 V or +5 V Power Supply ! Power Consumption Less Than 50 mW ! Master or Slave Operation ! Slave Mode Speed Auto-Detect ! Master Mode Default Settings ! 256x or 384x MCLK/LRCK Ratio ! CS5343 Supports I²S Audio Format ! CS5344 Supports Left-Justified Audio Format
4.1.1 Slave Mode Operation ........................................................................................................... 13 4.1.2 Master Mode Operation ......................................................................................................... 14

74AHC574中文资料

_white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...
Philips Semiconductors
Octal D-type ﬂip-ﬂop; positive edge-trigger; 3-state
handbook, full pagewidth
1999 Jun 16
5
D0
D1
D2
D3
D4
D5
D6
D7
DQ FF1
CP
DQ FF2
CP
DQ FF3
CP
元器件交易网
INTEGRATED CIRCUITS
DATA SHEET
74AHC574; 74AHCT574 Octal D-type flip-flop; positive edge-trigger; 3-state
Product speciﬁcation File under Integrated Circuits, IC06
• 3-state non-inverting outputs for bus oriented applications
• 8-bit positive, edge-triggered register

SN54LS74AJ中文资料

Copyright © 1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date.PACKAGING INFORMATIONOrderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)JM38510/00205BCA OBSOLETE CDIP J14TBD Call TI Call TIJM38510/00205BDA OBSOLETE CFP W14TBD Call TI Call TIJM38510/00205BDA OBSOLETE CFP W14TBD Call TI Call TIJM38510/07101BCA ACTIVE CDIP J141TBD Call TI Level-NC-NC-NCJM38510/07101BCA ACTIVE CDIP J141TBD Call TI Level-NC-NC-NCJM38510/07101BDA ACTIVE CFP W141TBD Call TI Level-NC-NC-NCJM38510/07101BDA ACTIVE CFP W141TBD Call TI Level-NC-NC-NCJM38510/30102B2A ACTIVE LCCC FK201TBD Call TI Level-NC-NC-NCJM38510/30102B2A ACTIVE LCCC FK201TBD Call TI Level-NC-NC-NCJM38510/30102BCA ACTIVE CDIP J141TBD Call TI Level-NC-NC-NCJM38510/30102BCA ACTIVE CDIP J141TBD Call TI Level-NC-NC-NCJM38510/30102BDA ACTIVE CFP W141TBD Call TI Level-NC-NC-NCJM38510/30102BDA ACTIVE CFP W141TBD Call TI Level-NC-NC-NCJM38510/30102SCA ACTIVE CDIP J141TBD Call TI Level-NC-NC-NCJM38510/30102SCA ACTIVE CDIP J141TBD Call TI Level-NC-NC-NCJM38510/30102SDA ACTIVE CFP W141TBD Call TI Level-NC-NC-NCJM38510/30102SDA ACTIVE CFP W141TBD Call TI Level-NC-NC-NC SN5474J OBSOLETE CDIP J14TBD Call TI Call TISN5474J OBSOLETE CDIP J14TBD Call TI Call TISN54LS74AJ ACTIVE CDIP J141TBD Call TI Level-NC-NC-NC SN54LS74AJ ACTIVE CDIP J141TBD Call TI Level-NC-NC-NC SN54S74J ACTIVE CDIP J141TBD Call TI Level-NC-NC-NC SN54S74J ACTIVE CDIP J141TBD Call TI Level-NC-NC-NC SN7474DR OBSOLETE SOIC D14TBD Call TI Call TISN7474DR OBSOLETE SOIC D14TBD Call TI Call TISN7474N OBSOLETE PDIP N14TBD Call TI Call TISN7474N OBSOLETE PDIP N14TBD Call TI Call TISN7474N3OBSOLETE PDIP N14TBD Call TI Call TISN7474N3OBSOLETE PDIP N14TBD Call TI Call TISN74LS74AD ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LS74AD ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LS74ADBR ACTIVE SSOP DB142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LS74ADBR ACTIVE SSOP DB142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LS74ADBRE4ACTIVE SSOP DB142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LS74ADBRE4ACTIVE SSOP DB142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LS74ADE4ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS74ADE4ACTIVE SOIC D1450Green(RoHS&CU NIPDAU Level-1-260C-UNLIMOrderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)no Sb/Br)SN74LS74ADR ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LS74ADR ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LS74ADRE4ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LS74ADRE4ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS74AJ OBSOLETE CDIP J14TBD Call TI Call TISN74LS74AJ OBSOLETE CDIP J14TBD Call TI Call TISN74LS74AN ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCSN74LS74AN ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NC SN74LS74AN3OBSOLETE PDIP N14TBD Call TI Call TISN74LS74AN3OBSOLETE PDIP N14TBD Call TI Call TISN74LS74ANE4ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCSN74LS74ANE4ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCSN74LS74ANSR ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LS74ANSR ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LS74ANSRG4ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74LS74ANSRG4ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74S74D ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74S74D ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74S74DE4ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74S74DE4ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74S74DR ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74S74DR ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74S74DRE4ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74S74DRE4ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74S74N ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCSN74S74N ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCSN74S74N3OBSOLETE PDIP N14TBD Call TI Call TIOrderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)SN74S74N3OBSOLETE PDIP N14TBD Call TI Call TISN74S74NE4ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCSN74S74NE4ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCSN74S74NSR ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74S74NSR ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74S74NSRE4ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74S74NSRE4ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SNJ5474J OBSOLETE CDIP J14TBD Call TI Call TISNJ5474J OBSOLETE CDIP J14TBD Call TI Call TISNJ5474W OBSOLETE CFP W14TBD Call TI Call TISNJ5474W OBSOLETE CFP W14TBD Call TI Call TI SNJ54LS74AFK ACTIVE LCCC FK201TBD Call TI Level-NC-NC-NC SNJ54LS74AFK ACTIVE LCCC FK201TBD Call TI Level-NC-NC-NC SNJ54LS74AJ ACTIVE CDIP J141TBD Call TI Level-NC-NC-NC SNJ54LS74AJ ACTIVE CDIP J141TBD Call TI Level-NC-NC-NC SNJ54LS74AW ACTIVE CFP W141TBD Call TI Level-NC-NC-NC SNJ54LS74AW ACTIVE CFP W141TBD Call TI Level-NC-NC-NC SNJ54S74FK ACTIVE LCCC FK201TBD Call TI Level-NC-NC-NC SNJ54S74FK ACTIVE LCCC FK201TBD Call TI Level-NC-NC-NCSNJ54S74J ACTIVE CDIP J141TBD Call TI Level-NC-NC-NCSNJ54S74J ACTIVE CDIP J141TBD Call TI Level-NC-NC-NCSNJ54S74W ACTIVE CFP W141TBD Call TI Level-NC-NC-NCSNJ54S74W ACTIVE CFP W141TBD Call TI Level-NC-NC-NC (1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-The planned eco-friendly classification:Pb-Free(RoHS)or Green(RoHS&no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Green(RoHS&no Sb/Br):TI defines"Green"to mean Pb-Free(RoHS compatible),and free of Bromine(Br)and Antimony(Sb)based flame retardants(Br or Sb do not exceed0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it isprovided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.元器件交易网IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,enhancements, improvements, and other changes to its products and services at any time and to discontinueany product or service without notice. Customers should obtain the latest relevant information before placingorders and should verify that such information is current and complete. All products are sold subject to TI’s termsand conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. T esting and other quality control techniques are used to the extent TIdeems necessary to support this warranty. Except where mandated by government requirements, testing of allparameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design. Customers are responsible fortheir products and applications using TI components. T o minimize the risks associated with customer productsand applications, customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or processin which TI products or services are used. Information published by TI regarding third-party products or servicesdoes not constitute a license from TI to use such products or services or a warranty or endorsement thereof.Use of such information may require a license from a third party under the patents or other intellectual propertyof the third party, or a license from TI under the patents or other intellectual property of TI.Reproduction of information in TI data books or data sheets is permissible only if reproduction is withoutalteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproductionof this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable forsuch altered documentation.Resale of TI products or services with statements different from or beyond the parameters stated by TI for thatproduct or service voids all express and any implied warranties for the associated TI product or service andis an unfair and deceptive business practice. TI is not responsible or liable for any such statements.Following are URLs where you can obtain information on other Texas Instruments products and applicationsolutions:Products ApplicationsAmplifiers Audio /audioData Converters Automotive /automotiveDSP Broadband /broadbandInterface Digital Control /digitalcontrolLogic Military /militaryPower Mgmt Optical Networking /opticalnetworkMicrocontrollers Security /securityTelephony /telephonyVideo & Imaging /videoWireless /wirelessMailing Address:Texas InstrumentsPost Office Box 655303 Dallas, Texas 75265Copyright 2005, Texas Instruments Incorporated。

S-80745SL-A9-X中文资料

S-80728AN S-80728AN-DR-X S-80728SN-DR-X S-80729AN-DS-X
S-80730AN S-80730AN-DT-X S-80730SN-DT-X S-80731AH S-80731AH-BV-X S-80731AN S-80731AN-DV-X S-80732AN S-80732AN-DW-X
S-80742AN S-80742AN-D6-X S-80742SN-D6-X S-80743AN S-80743AN-D7-X
VSS 3 * Parasitic diode Figure 2
2
Seiko Instruments Inc.
元器件交易网
2.0 V±2.4% 2.1 V±2.4% 2.2 V±2.4% 2.3 V±2.4% 2.4 V±2.4% 2.5 V±2.4% 2.6 V±2.4% 2.7 V±2.4% 2.8 V±2.4% 2.9 V±2.4% 3.0 V±2.4% 3.1 V±2.4% 3.2 V±2.4% 3.3 V±2.4% 3.4 V±2.4% 3.5 V±2.4% 3.6V±2.4% 3.7V±2.4% 3.8 V±2.4% 3.9 V±2.4% 4.0 V±2.4% 4.1 V±2.4% 4.2 V±2.4% 4.3 V±2.4% 4.4 V±2.4% 4.295 to 4.605 4.5 V±2.4% 4.6 V±2.4% 4.7 V±2.4% 4.8 V±2.4% 4.9 V±2.4% 5.0 V±2.4% 5.1 V±2.4% 5.2 V±2.4% 5.3 V±2.4% 5.5 V±2.4% 6.1 V±2.4% 6.3 V±2.4% 7.7V±2.4%
S-80733AN S-80733AN-DX-X S-80733SN-DX-X S-80734AN S-80734AN-DY-X

ZXTN07045EFFTA;中文规格书,Datasheet资料

A Product Line ofDiodes Incorporated45V NPN MEDIUM POWER PLANAR TRANSISTOR IN SOT23FFeatures and Benefits• BV CEO > 45V•I C = 4A Continuous Collector Current•Low Saturation Voltage V CE(sat) < 80mV @ 1A•R CE(sat) = 50mΩ•h FE characterised up to 4A• Highh FE min 400 @ 1A• 1.5Wpowerdissipation•Complementary part number ZXTP07040DFF•Totally Lead-Free & Fully RoHS compliant (Note 1) •Halogen and Antimony Free. “Green” Device (Note 2) •Qualified to AEC-Q101 Standards for High ReliabilityDescriptionThis low voltage NPN transistor has been designed for applications requiring high gain and very low saturation voltage. The SOT23F package is pin compatible with the industry standard SOT23 footprint but offers lower profile and higher dissipation for applications where power density is of utmost importance. Mechanical Data• Case:SOT23F•Case material: Molded Plastic. “Green” Molding Compound (Note 2) UL Flammability Classification Rating 94V-0 •Moisture Sensitivity: Level 1 per J-STD-020 •Terminals: Matte Tin Finish; Solderable per MIL-STD-202, Method 208•Weight: 0.008 grams (Approximate)Applications• Boostconverters•MOSFET and IGBT gate drivers•Lamp and relay driver• Motordrive• SirendriverOrdering Information (Note 3)Product Marking Reel size (inches) Tape width (mm) Quantity per reel ZXTN07045EFFTA 1D4 7 8 3,000 Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.2. Halogen and Antimony free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and<1000ppm antimony compounds.3. For packaging details, go to our website at .Marking Information1D4 = Product Type Marking CodeSOT23FDevice symbolTop ViewPin ConfigurationTop ViewB CEB1D4Maximum Ratings @T A = 25°C unless otherwise specifiedCharacteristic Symbol Value UnitCollector-Base Voltage V CBO 45 V Collector-Emitter Voltage V CEO 45 V Emitter-Collector Voltage (Reverse Blocking) V ECO 6 V Emitter-Base Voltage V EBO 7 V Continuous Collector Current (Note 6) I C 4 A Peak Pulse Current I CM 6 A Base Current I B 1 AThermal Characteristics @T A = 25°C unless otherwise specifiedCharacteristic Symbol Value UnitPower DissipationLinear Derating Factor (Note 4)P D - 0.846.72 W mW/°C (Note 5) 1.3410.72 (Note 6) 1.50 12.0(Note 7) 2.016.0 Thermal Resistance, Junction to Ambient (Note 4) R θJA149 °C/W (Note 5)93(Note 6)83 (Note 7)60Thermal Resistance, Junction to Lead (Note 8) R θJL 43.77 °C/W Operating and Storage Temperature Range T J, T STG-55 to +150 °C Notes:4. For a device surface mounted on 15mm X 15mm X 1.6mm FR4 PCB with high coverage of single sided 1 oz copper, in still air conditions; the device ismeasured when operating in a steady-state condition. 5. For a device surface mounted on 25mm X 25mm X 1.6mm FR4 PCB with high coverage of single sided 2 oz copper, in still air conditions; the device is measured when operating in a steady-state condition. 6. For a device surface mounted on 50mm X 50mm X 1.6mm FR4 PCB with high coverage of single sided 2 oz copper, in still air conditions; the device is measured when operating in a steady-state condition.7. As note 6 above, measured at t < 5 seconds 8. Thermal resistance from junction to solder-point (at the end of the collector lead).Typical Thermal CharacteristicsDerating CurveTemperature (°C)Transient Thermal Impedance T h Pulse Width (s)Pulse Power DissipationPulse Width (s)Electrical Characteristics @T A = 25°C unless otherwise specifiedCharacteristic Symbol Min Typ Max Unit Test ConditionOFF CHARACTERISTICSCollector-Base Breakdown Voltage BV CBO45 160 - V I C = 100µA Collector-Emitter Breakdown Voltage (base open) (Note 9)BV CEO 45 60 - V I C = 10mAEmitter-Base Breakdown Voltage BV EBO7 8.3 - V I E = 100µA Emitter-collector breakdown voltage(reverse blocking) BV ECX6 8.2 - V I E = 100µA; R BC < 1k Ω or -0.25V < V BC < 0.25V Emitter-collector breakdown voltage(base open)BV ECO 6 7.2 - V I E = 100µA Collector-base Cut-off Current I CBO- <1 - 50 20 nAµA V CB = 35V V CB = 35V, T A = 100°CEmitter-base Cut-off Current I EBO- <1 50 nA V EB = 5.6V ON CHARACTERISTICS (Note 9)Static Forward Current Transfer Ratio h FE500400250 70 800 710 530 125 1500 - - - - I C = 100mA, V CE = 2V I C = 1A, V CE = 2V I C = 2A, V CE = 2V I C = 4A, V CE = 2VCollector-Emitter Saturation Voltage V CE(sat) - 4516060 200 230 70 230 80 270 280 mV I C = 0.1A, I B = 0.5mA I C = 1A, I B = 5mA I C = 1A, I B = 100mAI C = 2A, I B = 20mA I C = 4A, I B = 80mABase-Emitter Saturation Voltage V BE(sat)- 1000 1100 mV I C = 4A, I B = 80mA Base-Emitter On Voltage V BE(on)- 875 1000 mV I C = 4A, V CE = 2V SMALL SIGNAL CHARACTERISTICS (Note 9)Transition Frequency f T150 190 - MHz I C = 50mA, V CE = 5V,f = 50MHzInput Capacitance C ibo - 225 - pF V EB = 0.5V, f = 1MHz Output Capacitance C obo - 18.4 25 pF V CB = 10V, f = 1MHz Delay time t d- 22.3 - ns V CC = 10V,I C = 500mA,I B1 = I B2 = 50mARise time t r- 10.6 - ns Storage time t s- 613 - ns Fall time t f- 146 - ns Notes: 9. Measured under pulsed conditions. Pulse width ≤ 300µs. Duty cycle ≤ 2%Typical Electrical CharacteristicsV CE(SAT) v I CV (V )I C Collector Current (A)V BE(SAT) v I CI C Collector Current (A)I C Collector Current (A)V CE(SAT) v I CV (V )I C Collector Current (A)V BE(ON) v I CI C Collector Current (A)T y p i c a l G a i n (h F E )A Product Line of Diodes IncorporatedPackage Outline Dimensionsb 3Dim. Millimeters InchesDim. MillimetersInchesMin. Max. Min. Max.Min. Max. Min. Max. A-1.12-0.044e11.90 NOM0.075 NOMA1 0.01 0.10 0.0004 0.004 E 2.10 2.64 0.083 0.104 b 0.30 0.50 0.012 0.020 E1 1.20 1.40 0.047 0.055 c 0.085 0.20 0.003 0.008 L0.25 0.60 0.0098 0.0236D 2.80 3.04 0.110 0.120 L1 0.45 0.62 0.018 0.024 e 0.95 NOM 0.037 NOM - - - - -Note: Controlling dimensions are in millimeters. Approximate dimensions are provided in inchesSuggested Pad LayoutA Product Line ofDiodes IncorporatedIMPORTANT NOTICEDIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated website, harmless against all damages.Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel. Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized application.Products described herein may be covered by one or more United States, international or foreign patents pending. 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1#变配电室出线柜号表

月用电量
月用电量

月用电量
月用电量
月用电量
月用电量
5456 人防事故电源
RF2
APE-B4-RF(10路) 低压二段D15柜
开关编号 5457 5458 5459 5460 5461 5462 5463
出线终端配电箱号站用电备用消防中心 1-2SG 13F避难区 1-2BN A座事故动力 1-10SG 备用 A座地下事故动力 1-10MG
1#变配电室出现柜号低压一段D01柜月用电量 ALE-A-BD ALE-5-J(5-10F) ALE-17-J(17-21F)
开关编号 5411 5412 5413
出线终端配电箱号变电站 1-3SG A座机房电源1-2JG A座机房电源1-6JG
月用电量
月用电量
1-1bLG原AP-B1-A 图示应为 APE-(B3-B4)-A 5414 AP-B2-A供一路、供一路1-1bLG 5415 A座机房电源1-4JG ALE-11-J(11-16F) 低压一段D02柜开关编号 5416 5417 5418 5419 5420 5421 5422 5423 开关编号 5424 54125 5426 5427 5428 5429 出线终端配电箱号 A座事故动力1-9SG 备用厨房 3KC 厨房 5KC A座事故照明1-4MG A座事故照明1-6MG 备用人防事故电源 RF1 出线终端配电箱号站用直流屏消防中心 1-1SG 13F避难区 1-1BN 备用 A座地下事故照明备用月用电量 APE-13-A(消防风机) AP-1-A-咖啡 AP-4-A-厨房2 ALE-B1-A(B1-4F母线) ALE-5-A(5-21F母线) 月用电量月用电量
低压一段D03柜月用电量 ALE-1-X1 APE-13-A-BN 1-9MG ALE-B2-A(B2-B4) 月用电量月用电量

SN75454BD中文资料

元器件交易网IMPORTANT NOTICETexas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinueany product or service without notice, and advise customers to obtain the latest version of relevant informationto verify, before placing orders, that information being relied on is current and complete. All products are soldsubject to the terms and conditions of sale supplied at the time of order acknowledgement, including thosepertaining to warranty, patent infringement, and limitation of liability.TI warrants performance of its semiconductor products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extentTI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarilyperformed, except those mandated by government requirements.CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OFDEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICALAPPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, ORWARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHERCRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TOBE FULLY AT THE CUSTOMER’S RISK.In order to minimize risks associated with the customer’s applications, adequate design and operatingsafeguards must be provided by the customer to minimize inherent or procedural hazards.TI assumes no liability for applications assistance or customer product design. TI does not warrant or representthat any license, either express or implied, is granted under any patent right, copyright, mask work right, or otherintellectual property right of TI covering or relating to any combination, machine, or process in which suchsemiconductor products or services might be or are used. TI’s publication of information regarding any thirdparty’s products or services does not constitute TI’s approval, warranty or endorsement thereof.Copyright © 1999, Texas Instruments Incorporated。

1N4754中文资料

at IZK mA 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 0.5 0.5 0.5 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25 0.25
Test current
Maximum Zener impedance(1)
Maximum reverse leakage current at VR V 1 1 1 1 1 1 2 3 4 5 6 7 7.6 8.4 9.1 9.9 11.4 12.2 13.7 15.2 16.7 18.2 20.6 22.8 25.1 27.4 29.7 32.7 35.8 38.8 42.6 47.1 51.7 56.0 62.2 69.2 76.0
max. .161 (4.1) min. 1.102 (28.0)
max. ∅ 0.102 (2.6)
Cathode Mark
min. 1.102 (28.0)
max. ∅ 0.034 (0.86)
MECHANICAL DATA
Case: DO-41 Glass Case Weight: approx. 0.35 g
–
1.2
Volts
NOTES: (1) Valid provided that electrodes at a distance of 10mm from case are kept at ambient temperature
12/3/98
元器件交易网
1N4728 THRU 1N4764