MC-7725_datasheet
OV7725
4.内置IRCUT切换器，使得画质色彩更加清晰，细腻，通透！
技术参数:
OV7725图像板+IRCUT切换
图像传感器（DPS）
1/4"CMOS OV7725彩色摄像机
水平解析度
420线
扫描系统
Progressive Scan
名称ov7725图像板ircut切换图像传感器dps14cmosov7725彩色摄像机水平解析度420扫描系统progressivescan最低照度03lux镜头类型36mm6mm电子快门automaticfrom1601501100000sec
功能特性：
1.提供方案，模块，IRCUT！
2.低照非常度，噪点非常小，白天/夜视效果非常好！
最低照度
0.3 Lux
镜头类型
3.6mm/6mm
电子快门
Automatic from 1/60 (1/50) ~ 1/100,000 Sec.
自动增益控制
Auto
背光补偿
Auto
白平衡
Auto
同步模式
nal
信噪比
More Than 52dB (AGC off)
视频输出
1.0 Vp-p Composite / 75Ω
电源功耗
DC12V, 35mA
工作环境
-10℃~+50℃, RH85% Max.
图像板尺寸
32x32，38X38
英飞凌 ICE5QRxx80BG 第五代准谐振集成电源IC 数据表
采用 DSO-12 封装的准谐振 800 V CoolSET ™产品亮点• 集成 800 V CoolMOS ™，雪崩能力强 • 创新型准谐振操作，其专有设计可降低 EMI• 可选进入和退出待机功率电平的增强型主动突发模式 • 主动突发模式，最低待机功率可小于 100 mW • 借助共源共栅配置实现快速启动 • 数字降频模式，提高整体系统效率 • 支持输入过压和欠压保护的可靠线路保护 • 完善的保护机制•无铅电镀、无卤模塑化合物，符合 RoHS 标准特性• 集成 800 V CoolMOS ™，雪崩能力强• 显著缩小高低压线路间的开关频率差，实现高效率和良好的 EMI 性能• 可选进入和退出待机功率电平的增强型主动突发模式 • 主动突发模式，最低待机功率可小于 100 mW • 借助共源共栅配置实现快速启动 • 数字降频技术，过零点可达 10 个 • 内置数字软启动 • 逐周期峰值电流限制• 最大导通/关断时间限制，以避免在启动和断电时产生噪音 • 支持输入过压和欠压保护的可靠线路保护•针对 VCC 过压、VCC 欠压、过载/开路、输入/输出过压及过温状况的自动重启模式保护• 受限的 VCC 短接至地的充电电流• 无铅电镀、无卤模塑化合物，符合 RoHS 标准应用• 适用于家用电器/白色家电、电视、电脑及服务器的辅助电源• 蓝光播放器、机顶盒和 LCD/LED 显示器描述准谐振 CoolSET ™ - (ICE5QRxx80BG) 是第五代准谐振集成电源 IC ，支持共源共栅配置，并针对离线开关模式电源进行了优化。
产品在单一封装中搭载了两个独立芯片，分别为控制器芯片和高压 MOSFET 芯片。
借助经改善的数字降频技术和专有的创新型准谐振操作，IC 可在实现低 EMI 效果时兼顾更高效率。
而增强型主动突发模式更是为待机功率范围的选择提供了灵活性。
此外， ICE5QRxx80BG 有宽的供电电压工作范围 (10.0～25.5 V)， 功耗较低。
TCS34725 Color Sensor User Manual
TCS34725 Color SensorUser Manual OVERVIEWThis is a color sensor module based on TCS34725, will output RGB data and light intensity through the I2C interface. Its advantages include high sensitivity, wide dynamic range, accurate measuring, etc.SPECIFICATIONWorking voltage： 3.3V/5VController: TCS34725FNIO voltage： 3.3V/5VInterface：I2CDimension：27 x 20(mm)INTERFACEPIN DescriptionVCC 3.3V/5VGND GroundSDA I2C Data InputSCL I2C Clock InputINT Interrupt Output（Open drain output）LED LEDOverview (1)Specification (1)Interface (1)Hardware (3)Controller (3)Communication protocol (3)I2C write (3)I2C Read (4)I2C address (4)How to use (5)Download examples (5)examples (5)Raspberry Pi (5)STM32 (10)Arduino (12)FAQ (14)CONTROLLERTCS34725 is used for color sensing. TCS34725 is an I2C bus-based color light-to-digital converter with IR filter, provides a digital return of red, green , blue (RGB) and clear light sensing values. The high sensitivity, wide dynamic range and IR blocking filter make the TCS34725 an ideal color sensor solution for use under varying lighting conditions and through attenuating materials.COMMUNICATION PROTOCOLI2C bus has two lines, one is data line (SDA) and another is lock line (SDL). There are three kinds of signals when communicating, Start signal, Stop signal and Answer signal.Start signal: When SCL is High, SDA change from High to Low, it start to transmit data Stop signal: When SCL is High, SDA change from Low to High, it stop transmitting. Answer signal: Every time IC send back a certain Low plus to sender after it receives 8 bits data.I2C WRITEWhen working, Raspberry Pi (hereafter named as Master) will first send a Start signal, then send a byte to TCS34725(hereafter named as Slaver), whose first 7bits are address of Slaver and 1 bit write bit. Slave response with Answer signal every time it receives any data. Master send command register address to Slaver, then data of command register. Stop signals is sent to slave to stop communicating.I2C READWhen working, Master will first send a Start signal, then send a byte to Slaver, whose first 7bits are address of Slaver and 1 bit write bit. Slave response with Answer signal every time it receives any data. Master send command register address to Slave. After that, Mater will send a Start signal again, and then send a byte (7bits address and 1bit read bit) to Slaver. Slaver response and send data of the register to Master, master answer as well. Stop signals will be sent to stop communicating.I2C ADDRESSThe I2C device address of TCS34725 is 0x29TCS3472 datasheet page 34Note: 0x29 is 7bit in fact, therefore, when you set the I2C address, you should left-shift one bit, turn it to 0x52HOW TO USEDOWNLOAD EXAMPLESFind and download examples from Waveshare wiki:Extract the 7z you get:Arduino: examples for ArduinoRaspberry Pi: examples for Raspberry Pi(wiringPi, python, bcm2835)EXAMPLESRASPBERRY PIInsert the SD card (Raspbian installed)Copy the Raspberry Pi examples to SD card:Insert SD card to Raspberry Pi and power on, you can find the folder is listed in /bootCopy the examples to /home/pi and change its permission:INSTALL LIBRARIESTo run the examples, you need to first install libraries (wiringPi, bcm2835 and python) and enable I2C interface, otherwise example cannot work properly.BCM2835/mikem/bcm2835/Download the library from bcm2835 libraries and install:Note: The xx is the version number you download, for example, if the version you download is bcm2835-1.52. then the command you should execute is sudo tar zxvf bcm2835-1.52.tar.gzwiringPi libraries:Python libraries:Enable I2C interface:sudo raspi-configReboot Raspberry Pi and check I2C devices:HARDWARE CONNECTIONRUNNING EXAMPLEBCM2835 exampleWiringPi examplepython exampleNote: If you get error information that files are not exist when running BCM2835 or wiringpi example, please execute make command and try again.EXPECTED RESULTThe expected result of three examples are similar, here we take python codes as example:R, G, B value are printed in RGB888 format (DEC), C is light value without processing, RGB565 and RGB888 are HEX data printed in certain format. LUX is light value processed. CT is color temperature. (https:///wiki/Color_temperature) If you want to measure CT, please turn off LED. INT is interrupt, 1: light value is over threshold.You can turn the RGB value to color with tools below:https:///w/upload/5/53/Infrared-Temperature-Sensor-Code.7zSTM32Open STM32 project with Keil uVision5. The example is based on HAL libraries. Development board used is Waveshare XNUCLEO-F103RB, the chip isSTM32F103RBT6. Example uses UART2 (PA2, PA3) to print data, 115200, 8N1. HARDWARE CONNECTIONEXPECTED RESULTThis is the output when testing redYou can turn the RGB value to color with tools below:https:///w/upload/5/53/Infrared-Temperature-Sensor-Code.7zARDUINOThe development board used is Waveshare UNO PLUS(Compatible with Arduino UNO ), set serial monitor to 115200HARDWARE CONNECTIONEXPECTED RESULTThis is the output when testing redYou can turn the RGB value to color with tools below:https:///w/upload/5/53/Infrared-Temperature-Sensor-Code.7z1.Q: Raspberry Pi example initializing failed?A: Please check if you connect sensor correctly, and check i2C device withcommand i2cdetect -y 1Please correct connecting and restart2.Q: What happened when running example by mistake?A: If you find that python or bcm2835 examples cannot work properly afterrunning wiringpi codes, please just restart Raspberry Pi can test again3.Q: Data output are incorrect when using STM32 and Arduino examples?A: Please check if you choose the correct COM port (according to device manager).If all the setting are correct, please exchange RXD and TXD and try again.4.Q: Why the RGB data outputted are all 0A: Please check if you connect device correctly then press reset button5.Q: The RGB data output are all 253?A: The light intensity value is over measure range, you can try to modify the gain parameter in initial codes, or add statementTCS34725_Set_Gain(TCS34725_GAIN_16X)）following initialize part.6.Q: Color detect is abnormal after modifying integrate timeA: The integrate time is relate to maximum data of RGB channels. If the color turns darker or lighter after modification, please try to change the brightness of LED 7.Q: Why interrupt cannot be triggered or be triggered all the time after modifyingintegrate timeA: Interrupt is relate to data of Clear channel. Data of Clear channel is influenced by integrate time. When gain is 60:Therefore, you should modify the threshold value if sample rate is fast. And please increase brightness of LED when you set integrate time to 2.4ms.。
OV7725 datasheet
© 2006 OmniVision Technologies, Inc.VarioPixel, OmniVision, and the OmniVision logo are registered trademarks of OmniVision Technologies, Inc.Version 1.0, September 12, 2006OmniPixel2 and CameraChip are trademarks of OmniVision Technologies, Inc.These specifications are subject to change without notice.Advanced Information Preliminary DatasheetOV7725 Color CMOS VGA (640x480) C AMERA C HIP TM SensorO mniision®with OmniPixel2TM TechnologyGeneral DescriptionThe OV7725 C AMERA C HIP ™ image sensor is a low voltage CMOS device that provides the full functionality of a single-chip VGA camera and image processor in a small footprint package. The OV7725 provides full-frame,sub-sampled or windowed 8-bit/10-bit images in a wide range of formats, controlled through the Serial CameraApplications•Cellular and picture phones •Toys•PC Multimedia•Digital still camerasKey SpecificationsOV7725Color CMOS VGA OmniPixel2™C AMERA C HIP™ Sensor OFunctional DescriptionFigure2 shows the functional block diagram of the OV7725 image sensor. The OV7725 includes:•Image Sensor Array (total array of 656 x 488 pixels, with active pixels 640 x 480 in YUV mode)•Analog Signal Processor•A/D Converters•Test Pattern Generator•Digital Signal Processor (DSP)•Image Scaler•Timing Generator2Proprietary to OmniVision Technologies, Inc.Version 1.0, September 12, 2006Functional DescriptionVersion 1.0, September 12, 2006Proprietary to OmniVision Technologies, Inc.3OImage Sensor ArrayThe OV7725 sensor has an image array of 656x 488pixels for a total of 320,128 pixels, of which 640x 480pixels are active (307,200 pixels). Figure 3 shows a cross-section of the image sensor array.Figure 3 Image Sensor ArrayIn addition to the A/D conversion, this block also has the following functions:•Digital Black-Level Calibration (BLC)•Optional U/V channel delay •Additional A/D range controlsIn general, the combination of the A/D Range Multiplier and A/D Range Control sets the A/D range and maximum value to allow the user to adjust the final image brightness as a function of the individual application.Test Pattern GeneratorOL /I OH drive currentthe C AMERA C HIP sensor operation. Refer to OmniVision Technologies Serial Camera Control Bus (SCCB)Specification for detailed usage of the serial control port.4Proprietary to OmniVision Technologies, Inc.Version 1.0, September 12, 2006OV7725Color CMOS VGA OmniPixel2™ C AMERA C HIP ™ SensorOPin DescriptionTable 1Pin DescriptionPin NumberName Pin Type Function/DescriptionA1ADVDD Power ADC power supplyA2RSTB Input System reset input, active lowA3VREFH Reference Reference voltage - connect to ground using a 0.1 µF capacitor A4FSIN Input Frame synchronize input A5SCL Input SCCB serial interface clock input A6D0a a. D[9:0] for 10-bit Raw RGB data (D[9] MSB, D[0] LSB)Output Data output bit[0]B1ADGND Power ADC groundB2VREFN Reference Reference voltage - connect to ground using a 0.1 µF capacitor B3AVDD Power Analog power supply B4AGND Power Analog groundB5SDA I/O SCCB serial interface data I/O B6HREF Output HREF outputC1PWDN Input (0)b b. Input (0) represents an internal pull-down resistor.Power Down Mode Selection0:Normal mode1:Power down mode C6VSYNC Output Vertical sync output D1D5Output Data output bit[5]D6D4Output Data output bit[4]E1D7Output Data output bit[7]E2D1Output Data output bit[1]E3DVDD Power Power supply (+1.8 VDC) for digital logic core E4PCLK Output Pixel clock outputE5DOVDD Power Digital power supply for I/O (1.7V ~ 3.3V)E6D6Output Data output bit[6]F1D9c c. D[9:2] for 8-bit YUV or RGB565/RGB555 (D[9] MSB, D[2] LSB)Output Data output bit[9]F2D3Output Data output bit[3]F3XCLK Input System clock input F4DOGND Power Digital ground F5D2Output Data output bit[2]F6D8OutputData output bit[8]Electrical CharacteristicsVersion 1.0, September 12, 2006Proprietary to OmniVision Technologies, Inc.5OElectrical CharacteristicsNOTE:Exceeding the Absolute Maximum ratings shown above invalidates all AC and DC electrical specifications and may result in permanent device damage.Table 2Operating ConditionsParameterMin Max Operating temperature -20°C +70°C Storage temperature a a.Exceeding the stresses listed may permanently damage the device. This is a stress rating only and functional operation of the sensor at these and any other condition above those indicated in this specification is not implied. Exposure to absolute maximum rating conditions for any extended period may affect reliability.-40°C+125°CTable 3 Absolute Maximum RatingsAmbient Storage Temperature-40ºC to +95ºCSupply Voltages (with respect to Ground)V DD-A4.5 V V DD-C 3 V V DD-IO4.5 VAll Input/Output Voltages (with respect to Ground)-0.3V to V DD-IO +0.5V Lead-free Temperature, Surface-mount process 245ºCTable 4DC Characteristics (-20°C < T A < 70°C)Symbol ParameterConditionMin Typ Max Unit V DD-A DC supply voltage – Analog – 3.0 3.3 3.6V V DD-C DC supply voltage – Digital Core – 1.62 1.8 1.98V V DD-IO DC supply voltage – I/O power – 2.5– 3.3V I DDA Active (Operating) Current See Note a a. V DD-A = 3.3V, V DD-C = 1.8V, V DD-IO = 3.3VI DDA = ∑{I DD-IO + I DD-C + I DD-A }, f CLK = 24MHz at 30 fps YUV output, no I/O loading 10 + 8bb. I DD-C = 10mA, I DD-A = 8mA, without loading mA I DDS-SCCB Standby Current See Note cc. V DD-A = 3.3V, V DD-C = 1.8V, V DD-IO = 3.3VI DDS-SCCB refers to a SCCB-initiated Standby, while I DDS-PWDN refers to a PWDN pin-initiated Standby 1mA I DDS-PWDN Standby Current 1020µA V IH Input voltage HIGH CMOS0.7 x V DD-IOV V IL Input voltage LOW 0.3 x V DD-IOV V OH Output voltage HIGH CMOS0.9 x V DD-IOV V OL Output voltage LOW 0.1 x V DD-IOV I OH Output current HIGH See Note dd. Standard Output Loading = 25pF, 1.2K Ω8mA I OL Output current LOW 15mA I LInput/Output LeakageGND to V DD-IO ± 1µAOV7725Color CMOS VGA OmniPixel2™C AMERA C HIP™ Sensor OTable 5 Functional and AC Characteristics (-20°C < T A < 70°C)Symbol Parameter Min Typ Max Unit Functional CharacteristicsA/D Differential Non-Linearity+ 1/2LSBA/D Integral Non-Linearity+1LSBAGC Range30dBRed/Blue Adjustment Range12dB Inputs (PWDN, CLK, RESET#)f CLK Input Clock Frequency102448MHzt CLK Input Clock Period2142100ns t CLK:DC Clock Duty Cycle455055% t S:RESET Setting time after software/hardware reset1ms t S:REG Settling time for register change (10 frames required)300ms SCCB Timing (see Figure4)f SCL Clock Frequency400KHzt LOW Clock Low Period 1.3μs t HIGH Clock High Period600ns t AA SCL low to Data Out valid100900ns t BUF Bus free time before new START 1.3μs t HD:STA START condition Hold time600ns t SU:STA START condition Setup time600ns t HD:DAT Data-in Hold time0μs t SU:DAT Data-in Setup time100ns t SU:STO STOP condition Setup time600ns t R, t F SCCB Rise/Fall times300ns t DH Data-out Hold time50ns Outputs (VSYNC, HREF, PCLK, and D[9:0] (see Figure5, Figure6, Figure7, and Figure8)t PDV PCLK[↓] to Data-out Valid5ns t SU D[9:0] Setup time15ns t HD D[9:0] Hold time8ns t PHH PCLK[↓] to HREF[↑]05ns t PHL PCLK[↓] to HREF[↓]05nsAC Conditions:• V DD: V DD-C = 1.8V, V DD-A = 3.3V, V DD-IO = 3.3V • Rise/Fall Times: I/O: 5ns, MaximumSCCB: 300ns, Maximum • Input Capacitance: 10pf• Output Loading: 25pF, 1.2KΩ to 3.3V• f CLK: 24MHz6Proprietary to OmniVision Technologies, Inc.Version 1.0, September 12, 2006Timing SpecificationsVersion 1.0, September 12, 2006Proprietary to OmniVision Technologies, Inc.7OTiming SpecificationsFigure 4 SCCB Timing DiagramOV7725Color CMOS VGA OmniPixel2™C AMERA C HIP™ Sensor OFigure 7 QVGA Frame Timing8Proprietary to OmniVision Technologies, Inc.Version 1.0, September 12, 2006Timing SpecificationsVersion 1.0, September 12, 2006Proprietary to OmniVision Technologies, Inc.9OFigure 9 RGB 565 Output Timing DiagramOV7725Color CMOS VGA OmniPixel2™C AMERA C HIP™ Sensor OFigure 11 RGB 444 Output Timing Diagram10Proprietary to OmniVision Technologies, Inc.Version 1.0, September 12, 2006Register Set Table6 provides a list and description of the Device Control registers contained in the OV7725. For all register Enable/Disable bits, ENABLE = 1 and DISABLE = 0. The device slave addresses are 42 for write and 43 for read.Table 6 Device Control Register List (Sheet 1 of 11)Address (Hex)RegisterNameDefault(Hex)R/W Description00GAIN00RW AGC – Gain control gain settingBit[7:0]:AGC[7:0] (see GREEN[7:6] (0x03) for AGC[9:8])•Range: [00] to [FF]01BLUE80RW AWB – Blue channel gain setting •Range: [00] to [FF]02RED80RW AWB – Red channel gain setting •Range: [00] to [FF]03GREEN00RW AWB – Green channel gain setting •Range: [00] to [FF]04COM100RW Common Control 1Bit[7:2]:ReservedBit[1:0]:AGC 2 MSBs, AGC[9:8]05BAVG00RW U/B Average LevelAutomatically updated based on chip output format06GAVG00RW Y/Gb Average LevelAutomatically updated based on chip output format07RAVG00RW V/R Average LevelAutomatically updated based on chip output format08AECH00RW Exposure Value – AEC MSBsBit[7:5]:AEC[15:8] (see register AEC for AEC[7:0]} Automatically updated based on chip output format09COM201RW Common Control 2Bit[7:5]:ReservedBit[4]:Soft sleep modeBit[3:2]:Pixel clock output delay control•Range: [00] to [11]Bit[1:0]:Output drive capability00:1x01:2x10:3x11:4x0A PID77R Product ID Number MSB (Read only) 0B VER21R Product ID Number LSB (Read only)0C COM310RW Common Control 3Bit[7]:Vertical flip image ON/OFF selectionBit[6]:Horizontal mirror image ON/OFF selectionBit[5]:Swap B/R output sequence in RGB output modeBit[4]:Swap Y/UV output sequence in YUV output modeBit[3]:Swap output MSB/LSBBit[2]:Tri-state option for output clock at power-down period 0:Tri-state at this period1:No tri-state at this periodBit[1]:Tri-state option for output data at power-down period 0:Tri-state at this period1:No tri-state at this periodBit[0]:Sensor color bar test pattern output enable0D COM441RW Common Control 4Bit[7:6]:PLL frequency control00:Bypass PLL01:PLL 4x10:PLL 6x11:PLL 8xBit[5:4]:AEC evaluate window00:Full window01:1/2 window10:1/4 window11:Low 2/3 window Bit[3:0]:Reserved0E COM501RW Common Control 5Bit[7]:Auto frame rate control ON/OFF selectionBit[6]:Auto frame rate control speed selectionBit[5:4]:Auto frame rate max rate control00:No reduction of frame rate01:Max reduction to 1/2 frame rate10:Max reduction to 1/4 frame rate11:Max reduction to 1/8 frame rate Bit[3:2]:Auto frame rate active point control00:Add frame when AGC reaches 2x gain01:Add frame when AGC reaches 4x gain10:Add frame when AGC reaches 8x gain11:Add frame when AGC reaches 16x gain Bit[1]:ReservedBit[0]:AEC max step control0:AEC increase step has limit1:No limit to AEC increase step0F COM643RW Common Control 6Bit[7:1]:ReservedBit[0]:Auto window setting ON/OFF selection when format changes(Hex)Name(Hex)R/W Description10AEC40RW Exposure ValueBit[7:0]:AEC[7:0] (see register AECH for AEC[15:8])11CLKRC80RW Internal ClockBit[7]:ReservedBit[6]:Use external clock directly (no clock pre-scale available)Bit[5:0]:Internal clock pre-scalarF(internal clock) = F(input clock)/(Bit[5:0]+1)•Range: [0 0000] to [1 1111]12COM700RW Common Control 7Bit[7]:SCCB Register Reset0:No change1:Resets all registers to default values Bit[6]:Resolution selection0:VGA1:QVGABit[5]:ITU656 protocol ON/OFF selectionBit[4]:ReservedBit[3:2]:RGB output format control00:GBR4:2:201:RGB56510:RGB55511:RGB444Bit[1:0]:Output format control00:YUV01:Processed Bayer RAW10:RGB11:Bayer RAW13COM88F RW Common Control 8Bit[7]:Enable fast AGC/AEC algorithmBit[6]:AEC - Step size limit0:Step size is limited to vertical blank1:Unlimited step sizeBit[5]:Banding filter ON/OFFBit[4]:Enable AEC below banding valueBit[3]:Fine AEC ON/OFF controlBit[2]:AGC EnableBit[1]:AWB EnableBit[0]:AEC Enable(Hex)Name(Hex)R/W Description14COM94A RW Common Control 9Bit[7]:Histogram or average based AEC/AGC selection Bit[6:4]:Automatic Gain Ceiling - maximum AGC value000:2x001:4x010:8x011:16x100:32x10164x110:128x111:Not allowedBit[3]:ReservedBit[2]:Drop VSYNC output of corrupt frameBit[1]:Drop HREF output of corrupt frameBit[0]:Reserved15COM1000RW Common Control 10Bit[7]:Output negative dataBit[6]:HREF changes to HSYNCBit[5]:PCLK output option0:Free running PCLK1:PCLK does not toggle during horizontal blank Bit[4]:PCLK reverseBit[3]:HREF reverseBit[2]:VSYNC option0:VSYNC changes on falling edge of PCLK1:VSYNC changes on rising edge of PCLK Bit[1]:VSYNC negativeBit[0]:Output data range selection0:Full range1:Data from [10] to [F0] (8 MSBs)16RSVD XX–Reserved17HSTART23 (VGA)3F (QVGA)RW Horizontal Sensor Size18HSIZEA0 (VGA)50 (QVGA)RWHorizontal Frame (HREF column) end high 8-bit (low 2bits are atHREF[1:0])19VSTRT07 (VGA)03 (QVGA)RW Vertical Frame (row) start high 8-bit (low 1 bit is at HREF[6])1A VSIZEF0 (VGA)78 (QVGA)RW Vertical Sensor Size1B PSHFT40RW Data Format - Pixel Delay Select (delays timing of the D[9:0] data relative to HREF in pixel units)•Range: [00] (no delay) to [FF] (256 pixel delay which accounts for whole array)1C MIDH7F R Manufacturer ID Byte – High(Read only = 0x7F) 1D MIDL A2R Manufacturer ID Byte – Low(Read only = 0xA2) 1E RSVD XX–Reserved(Hex)Name(Hex)R/W Description1F LAEC00RW Fine AEC Value - defines exposure value less than one line period20COM1110RW Common Control 11Bit[7:2]:ReservedBit[1]:Single frame ON/OFF selection Bit[0]:Single frame transfer trigger21RSVD XX–Reserved22BDBase FF RW Banding Filter Minimum AEC Value23DBStep01RW Banding Filter Maximum Step24AEW75RW AGC/AEC - Stable Operating Region (Upper Limit) 25AEB63RW AGC/AEC - Stable Operating Region (Lower Limit)26VPT D4RW AGC/AEC Fast Mode Operating RegionBit[7:4]:High nibble of upper limit of fast mode control zone Bit[3:0]:High nibble of lower limit of fast mode control zone27RSVD XX–Reserved28REG28??RW Register 28Bit[7:2]:ReservedBit[1]:Frame sync option (in external frame sync mode, set this bit to 1)Bit[0]:Auto frame adjust option0:Always decrease frame rate by 21:Decrease frame rate by inserting dummy verticalsync equal to maximum exposure lines29HOutSize A0 (VGA)50 (QVGA)RW Horizontal Data Output Size MSBs (2 LSBs at register EXHCH[1:0])2A EXHCH00RW Dummy Pixel Insert MSBBit[7:4]: 4 MSB for dummy pixel insert in horizontal direction Bit[3]:ReservedBit[2]:Vertical data output size LSBBit[1:0]:Horizontal data output size 2 LSBs2B EXHCL00RW Dummy Pixel Insert LSB8 LSB for dummy pixel insert in horizontal direction2C VOutSize F0 (VGA)78 (QVGA)RW Vertical Data Output Size MSBs (LSB at register EXHCH[2])2D ADVFL00RW LSB of Insert Dummy Lines in Vertical Direction (1 bit equals 1 line) 2E ADVFH00RW MSB of Insert Dummy Lines in Vertical Direction2F YAVE00RW Y/G Channel Average Value30LumHTh80RW Histogram AEC/AGC Luminance High Level Threshold31LumLTh60RW Histogram AEC/AGC Luminance Low Level Threshold(Hex)Name(Hex)R/W Description32HREF00RW Image Start and Size ControlBit[7]:Mirror image edge alignmentBit[6]:Vertical HREF window start control LSBBit[5:4]:Horizontal HREF window start control LSBsBit[3]:Data output bit shift test pattern ON/OFF control Bit[2]:Vertical sensor size LSBBit[1:0]:Horizontal sensor size 2 LSBs33DM_LNL00RW Dummy Line Low 8 Bits34DM_LNH00RW Dummy Line High 8 Bits35ADoff_B80RW AD Offset Compensation Value for B Channel36ADoff_R80RW AD Offset Compensation Value for R Channel37ADoff_Gb80RW AD Offset Compensation Value for Gb Channel38ADoff_Gr80RW AD Offset Compensation Value for Gr Channel39Off_B80RW Analog Process B Channel Offset Compensation Value 3A Off_R80RW Analog Process R Channel Offset Compensation Value 3B Off_Gb80RW Analog Process Gb Channel Offset Compensation Value 3C Off_Gr80RW Analog Process Gr Channel Offset Compensation Value3D COM1280RW Common Control 12Bit[7:6]:ReservedBit[5:0]:DC offset compensation for analog process3E COM13E2RW Common Control 13Bit[7]:Analog processing channel BLC ON/OFF control Bit[6]:ADC channel BLC ON/OFF controlBit[5:0]:Reserved3F COM141F RW Edge Enhancement AdjustmentBit[7:4]:ReservedBit[3:2]:AD offset compensation optionx0:Use R/Gr channel value for B/Gb01:Use B/Gb channel value for R/Gr11:Use B/Gb/R/Gr channel value independently Bit[1:0]:Analog processing offset compensation optionx0:Use R/Gr channel value for B/Gb01:Use B/Gb channel value for R/Gr11:Use B/Gb/R/Gr channel value independently40COM15C0RW Common Control 15Bit[7:4]:ReservedBit[3]:AD add 128 bit offsetBit[2:0]:Reserved41COM1608RW Common Control 16Bit[7:2]:ReservedBit[1:0]:BLC target 2 LSBs42TGT_B80RW BLC Blue Channel Target Value (Hex)Name(Hex)R/W Description43TGT_R80RW BLC Red Channel Target Value 44TGT_Gb80RW BLC Gb Channel Target Value 45TGT_Gr80RW BLC Gr Channel Target Value46LCC000RW Lens Correction Control 0Bit[7:3]:ReservedBit[2]:Lens correction control select0:R, G, and B channel compensation coefficient isset by registers LCC3 (0x49)1:R, G, and B channel compensation coefficient isset by registers LCC5 (0x4B), LCC3 (0x49), andLCC6 (0x4C), respectivelyBit[1]:ReservedBit[0]:Lens correction enable0:Disable1:Enable47LCC100RW Lens Correction Option 1 – X Coordinate of Lens Correction Center Relative to Array Center48LCC200RW Lens Correction Option 2 – Y Coordinate of Lens Correction Center Relative to Array Center49LCC350–Lens Correction Option 3G channel compensation coefficient when LCC0[2] (0x46) is 1 R, G, and B channel compensation coefficient when LCC0[2] is 04A LCC430–Lens Correction Option 4 – radius of the circular section where no compensation applies4B LCC550RW Lens Correction Option 5 (effective only when LCC0[2] is high) 4C LCC650RW Lens Correction Option 6 (effective only when LCC0[2] is high)4D FixGain00RW Analog Fix Gain AmplifierBit[7:6]:Gb channel fixed gainBit[5:4]:Gr channel fixed gainBit[3:2]: B channel fixed gainBit[1:0]:R channel fixed gain4E AREF0EF RW Sensor Reference Control •Range: [00] to [FF]4F AREF110RW Sensor Reference Current ControlBit[7:4]:Sensor reference current controlBit[3]:Internal regulator ON/OFF selection Bit[2]:ReservedBit[1:0]:Analog reference control50AREF260RW Analog Reference Control •Range: [00] to [FF]51AREF300RW ADC Reference Control •Range: [00] to [FF]52AREF400RW ADC Reference Control •Range: [00] to [FF](Hex)Name(Hex)R/W Description53AREF524RW ADC Reference Control •Range: [00] to [FF]54AREF67A RW Analog Reference Control •Range: [00] to [FF]55AREF7FC RW Analog Reference Control •Range: [00] to [FF]56-5F RSVD XX–Reserved60UFix80RW U Channel Fixed Value Output 61VFix80RW V Channel Fixed Value Output 62AWBb_blk FF RW AWB Option for Advanced AWB63AWB_Ctrl0F0RW AWB Control Byte 0Bit[7]:AWB gain enableBit[6]:AWB calculate enableBit[5]:ReservedBit[4:0]:WBC threshold 264DSP_Ctrl11F RW DSP Control Byte 1Bit[7]:FIFO enable/disable selectionBit[6]:UV adjust function ON/OFF selectionBit[5]:YUV444 to 422 UV channel option selection Bit[4]:Color matrix ON/OFF selectionBit[3]:Interpolation ON/OFF selectionBit[2]:Gamma function ON/OFF selectionBit[1]:Black defect auto correction ON/OFFBit[0]:White defect auto correction ON/OFF65DSP_Ctrl200RW DSP Control Byte 2Bit[7:4]:ReservedBit[3:0]:Scaling control66DSP_Ctrl310RW DSP Control Byte 3Bit[7]:UV output sequence optionBit[6]:ReservedBit[5]:DSP color bar ON/OFF selectionBit[4]:ReservedBit[3]:FIFO power down ON/OFF selectionBit[2]:Scaling module power down control 1Bit[1]:Scaling module power down control 2Bit[0]:Interpolation module power down control67DSP_Ctrl400RW DSP Control Byte 468AWB_bias00RW AWB BLC Level Clip69AWBCtrl15C RW AWB Control 16A AWBCtrl211RW AWB Control 26B AWBCtrl3A2RW AWB Control 36C AWBCtrl401RW AWB Control 4(Hex)Name(Hex)R/W Description6D AWBCtrl550RW AWB Control 56E AWBCtrl680RW AWB Control 66F AWBCtrl780RW AWB Control 770AWBCtrl80F RW AWB Control 871AWBCtrl900RW AWB Control 972AWBCtrl1000RW AWB Control 1073AWBCtrl110F RW AWB Control 1174AWBCtrl120F RW AWB Control 1275AWBCtrl13FF RW AWB Control 1376AWBCtrl14FF RW AWB Control 1477AWBCtrl15FF RW AWB Control 1578AWBCtrl1610RW AWB Control 1679AWBCtrl1770RW AWB Control 177A AWBCtrl1870RW AWB Control 187B AWBCtrl19F0RW AWB Control 197C AWBCtrl20F0RW AWB Control 207D AWBCtrl21F0RW AWB Control 217E GAM10E RW Gamma Curve 1st Segment Input End Point 0x04 Output Value 7F GAM21A RW Gamma Curve 2nd Segment Input End Point 0x08 Output Value 80GAM331RW Gamma Curve 3rd Segment Input End Point 0x10 Output Value 81GAM45A RW Gamma Curve 4th Segment Input End Point 0x20 Output Value 82GAM569RW Gamma Curve 5th Segment Input End Point 0x28 Output Value 83GAM675RW Gamma Curve 6th Segment Input End Point 0x30 Output Value 84GAM77E RW Gamma Curve 7th Segment Input End Point 0x38 Output Value 85GAM888RW Gamma Curve 8th Segment Input End Point 0x40 Output Value 86GAM98F RW Gamma Curve 9th Segment Input End Point 0x48 Output Value 87GAM1096RW Gamma Curve 10th Segment Input End Point 0x50 Output Value 88GAM11A3RW Gamma Curve 11th Segment Input End Point 0x60 Output Value 89GAM12AF RW Gamma Curve 12th Segment Input End Point 0x70 Output Value 8A GAM13C4RW Gamma Curve 13th Segment Input End Point 0x90 Output Value 8B GAM14D7RW Gamma Curve 14th Segment Input End Point 0xB0 Output Value 8C GAM15E8RW Gamma Curve 15th Segment Input End Point 0xD0 Output Value8D SLOP20RW Gamma Curve Highest Segment Slope - calculated as follows: SLOP[7:0] = (0x100 - GAM15[7:0]) x 4/38E DNSTh00RW De-noise Threshold(Hex)Name(Hex)R/W Description8F EDGE000RW Edge Enhancement Control 0Bit[7:5]:ReservedBit[4:0]:Edge enhancement strength control90EDGE108RW Edge Enhancement Control 1Bit[7:4]:ReservedBit[3:0]:Edge enhancement threshold control91DNSOff10RW Auto De-noise Threshold Control92EDGE21F RW Edge Enhancement Strength Low Point Control 93EDGE301RW Edge Enhancement Strength High Point Control 94MTX12C RW Matrix Coefficient 195MTX224RW Matrix Coefficient 296MTX308RW Matrix Coefficient 397MTX414RW Matrix Coefficient 498MTX524RW Matrix Coefficient 599MTX638RW Matrix Coefficient 69A MTX_Ctrl9E RW Matrix ControlBit[7]:Matrix double ON/OFF selection Bit[6]:ReservedBit[5]:Sign bit for MTX6Bit[4]:Sign bit for MTX5Bit[3]:Sign bit for MTX4Bit[2]:Sign bit for MTX3Bit[1]:Sign bit for MTX2Bit[0]:Sign bit for MTX19B BRIGHT00RW Brightness Control9C CNST40RW Contrast Control9D CNST_ctr00RW Contrast Control Center9E UVADJ011RW Auto UV Adjust Control 0Bit[7:4]:Auto UV adjust offset control 4 LSBs Bit[3:0]:Auto UV adjust threshold control9F UVADJ102RW Auto UV Adjust Control 1Bit[7:3]:Auto UV adjust valueBit[2]:ReservedBit[1]:Auto UV adjust stop controlBit[0]:Auto UV adjust offset control MSBA0SCAL000RW Scaling Control 0A1SCAL140RW Scaling Control 1 – for horizontal scaling control A2SCAL240RW Scaling Control 2 – for vertical scaling controlA3FIFOdlyM06RW FIFO Manual Mode Delay ControlA4FIFOdlyA00RW FIFO Auto Mode Delay Control(Hex)Name(Hex)R/W DescriptionRegister SetOA5RSVD XX –ReservedA6SDE 00RW Special Digital Effect Control A7USAT 40RW U Component Saturation Control A8VSAT 40RW V Component Saturation Control A9HUE080RW Hue Control 0AAHUE180RWHue Control 1AB SIGN 06RWSign Bit for Hue and ContrastBit[7:4]:ReservedBit[3:2]:Contrast sign bit Bit[1:0]:Hue sign bitAC DSPAuto FF RWDSP Auto Function ON/OFF ControlBit[7]:AWB auto threshold control Bit[6]:De-noise auto threshold controlBit[5]:Edge enhancement auto strength control Bit[4]:UV adjust auto slope controlBit[3]:Auto scaling factor control (register SCAL0 (0xA0))Bit[2]:Auto scaling factor control (registers SCAL1 (0xA1 and SCAL2 (0xA2))Bit[1:0]:ReservedNOTE: All other registers are factory-reserved. Please contact OmniVision Technologies for reference register settings.Table 6Device Control Register List (Sheet 11 of 11)Address (Hex)Register Name Default (Hex)R/W DescriptionOV7725Color CMOS VGA OmniPixel2™ C AMERA C HIP ™ SensorOPackage SpecificationsThe OV7725 uses a 28-ball Chip Scale Package 2 (CSP2). Refer to Figure 12 for package information, Table 7 for package dimensions and Figure 13 for the array center on the chip.Figure 12 OV7725-CSP2 Package SpecificationsNote: For OVT devices that are lead-free, all part marking letters are lower case. Underlining the last digit of the lot number indicates CSP2 is used.Package SpecificationsOSensor Array CenterFigure 13 OV7725 Sensor Array CenterOV7725Color CMOS VGA OmniPixel2™C AMERA C HIP™ Sensor OChief Ray AngleFigure 14 OV7725 Chief Ray AnglePackage SpecificationsOIR Reflow Ramp Rate Requirements OV7725 Lead-Free Packaged DevicesFigure 15 IR Reflow Ramp Rate RequirementsNote: For OVT devices that are lead-free, all part marking letters are lower caseOV7725Color CMOS VGA OmniPixel2™C AMERA C HIP™ Sensor ONote:•All information shown herein is current as of the revision and publication date. Please refer to the OmniVision web site () to obtain the current versions of alldocumentation.•OmniVision Technologies, Inc. reserves the right to make changes to their products or to discontinue any product or service without further notice (It is advisable to obtain current product documentation prior to placing orders).•Reproduction of information in OmniVision product documentation and specifications is permissible only if reproduction is without alteration and is accompanied by all associatedwarranties, conditions, limitations and notices. In such cases, OmniVision is not responsibleor liable for any information reproduced.•This document is provided with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any warrantyotherwise arising out of any proposal, specification or sample. Furthermore, OmniVisionTechnologies, Inc. disclaims all liability, including liability for infringement of any proprietary rights, relating to use of information in this document. No license, expressed or implied, byestoppels or otherwise, to any intellectual property rights is granted herein.•‘OmniVision’, ’VarioPixel’ and the OmniVision logo are registered trademarks of OmniVision Technologies, Inc. ’OmniPixel2’ and ’CameraChip’ are trademarks of OmniVision Technologies, Inc. All other trade, product or service names referenced in this release may be trademarks or registered trademarks of their respective holders. Third-party brands, names, and trademarks are the property of their respective owners.For further information, please feel free to contact OmniVision at info@.OmniVision Technologies, Inc.1341 Orleans DriveSunnyvale, CA USA(408) 542-3000。
MC8755_65 Datasheet rev 1.2
MC8755: 2100 MHz UMTS MC8765: 850/1900 MHz UMTS Power class 3 (+23dBm) MC8755 and MC8765: 850MHz GSM/GPRS/EDGE 900MHz GSM/GPRS/EDGE 1800MHz GSM/GPRS/EDGE 1900MHz GSM/GPRS/EDGE EDGE – Power Class E2 PCS/DCS Power Class 1 GSM – GMSK Power Class 4
AirCard EnabledTM
.Typical download rates of 600-800kbps, peak speeds up to 1.8Mbps* .Uses MSM6275™ chipset from QUALCOMM .MC8755 supports single band UMTS (HSDPA): 2100 MHz .MC8765 supports dual-band UMTS (HSDPA): 850/1900 MHz .Both MC8755 and MC8765 support quadband EDGE/GPRS/GSM: 850/900/1800/1900 MHz .Support third generation (3G) digital cellular standards .Enable rapid development of exceptional highspeed data products .Comprehensive WHQL-certified USB software driver
PCI Express Mini Card Standard
Superior Integration Support
MIC22705YML EV评估板1MHz，7A集成开关高效同步斜坡调压电源MLF和MicroLea
MIC22705YML EV Evaluation Board1MHz, 7A Integrated Switch High-Efficiency Synchronous Buck RegulatorMLF and Micro Lead Frame are registered trademarks of Amkor Technology, Inc.Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 •General DescriptionThe Micrel MIC22705 is a high-efficiency, 7A, integrated switch, synchronous buck (step-down) regulator. The MIC22705 achieves more than 95% efficiency andswitches at 1MHz. The ultra-high speed control loop keepsthe output voltage within regulation even under the extreme transient load swings commonly found in FPGAs and low-voltage ASICs. The output voltage is pre-bias safeand is adjustable down to 0.7V. The MIC22705 offers a full range of sequencing and tracking options. The Enable/Delay (EN/DLY) and Power Good (PG) inputs allow versatile turn-on and turn-off sequencing across multiple devices. The Ramp Control™ (RC) input allows start-up voltage tracking, either directly or ratio-metrically. The MIC22705 is available in a 24-pin 4mm x 4mm MLF ®with a junction operating range from –40°C to +125°C. Data sheets and support documentation are found on the Micrel web site: . RequirementsThe MIC22705YML EV requires a power supply of 2.9V to 5.5V, and a test load. Ensure that the power supply can provide the wattage required for the chosen test load. Theload can be active (electronic load) or passive (resistor).Additionally, monitor the Power Good output (PG) with a multimeter or an oscilloscope if desired.PrecautionsThere is no reverse input protection on this board. When connecting supplies and signals ensure that correct polarities are observed.Getting Started 1. V INSuppliesConnect the V IN supply (2.9V to 5.5V) across the PVIN and PGND terminals. Monitor V IN at the PVIN and PGND terminals with a voltmeter.2. Enable/SHDN Inputs The enable input EN is internally pulled up with a 1µA current source. When external on/off control is desired, install Q1 and R5, and connect a logic level control signal to the SHDN input. When SHDN is high, the output is off, and when SHDN is low, the output is on.3. Monitor Outputs Monitor the output V OUT with a scope or DVM connectedacross the VOUT and PGND terminals. 4. Output LoadConnect a load across the VOUT and PGND terminals. Use an active or passive load.5. Turn On the Power Turn on the power supply and verify that V OUT = 1.8V. Ordering Information Part Number Description MIC22705YML EVEvaluation Board for the MIC22705YMLEV Board FeaturesSee the MIC22705YML datasheet for detailed explanations of these functions.Enable/Delay (EN/DLY)Enable/Delay allows delayed turn on of the MIC22705. Install a capacitor in location C6 to increase the start-up delay of the MIC22705.Shutdown Input (SHDN)SHDN allows enable/disable of the MIC22705 with an external logic signal. To activate the shutdown feature, install components into the locations labeled Q1 and R5 (component recommendations are listed in the Bill of Materials later in this document). With the components installed, force SHDN high to disable the MIC22705, and low to allow the MIC22705 to operate normally.Delay (DELAY)DELAY allows a delayed Power Good output (PG) indication. Install a capacitor in location C8 to increase the Power Good delay timing of the MIC22705. Ramp Control (RC)Ramp control allows slowing the slew rate of the MIC22705 output. Increase the value of capacitor C7 to reduce the slew rate.Power Good Output (PG)Open drain output PG pulls low when the output voltage of the MIC22705 is out of specification. PG is pulled up to V IN by a 47.5kΩ resistor.Switch Voltage (V SW)Test point V SW is provided to monitor the internal switching node. V SW is isolated from the switch node by 49.9Ωresistor R6.Typical CharacteristicsEvaluation Board SchematicBill of MaterialsItem Part Number Manufacturer DescriptionQty. C2012X5R0J226M TDK (1) 08056D226MAT AVX (2) C1, C2, C3, C4GRM21BR60J226ME39L Murata (3) 22µF/6.3V, 0805, Ceramic Capacitor506036D225TAAT2A AVX (2)2.2µF/6.3V, Ceramic Capacitor, X5R, Size 0805 GRM188R7160J225M Murata (3) 2.2µF/6.3V, Ceramic Capacitor, X7R, Size 0805 C5C1608X5R0J225M TDK (1)1C13 GRM188R71H103KA01D Murata (3)10nF, 0603, Ceramic Capacitor 1 Open(VJ0603Y102KXQCW1BC) Vishay (4) 1nF, 0603, Ceramic CapacitorOpen(GRM188R71H102KA01D) Murata (3) 1nF/50V, X7R, 0603, Ceramic Capacitor C7 Open(C1608C0G1H102J) TDK (1) 1nF/50V, COG, 0603, Ceramic Capacitor 1 C6, C8 OpenGRM1555C1H390JZ01D Murata (3) 39pF/50V, COG, 0402, Ceramic Capacitor C9VJ0402A390KXQCW1BCBCComponents (5)39pF /10V, 0402, Ceramic Capacitor 1 C3216X5R0J476M TDK (1)47µF/6.3V, X5R, 1206, Ceramic Capacitor GRM31CR60J476ME19 Murata (3)47µF/6.3V, X5R, 1206, Ceramic Capacitor C10, C11GRM31CC80G476ME19L Murata (3)47µF/4V, X6S, 1206, Ceramic Capacitor 2 VJ0402A101KXQCW1BC Vishay (4) 100pF, 0603, Ceramic CapacitorC12 GRM1555C1H101JZ01D Murata (3) 100pF/50V, COG, 0402, Ceramic Capacitor 1 SPM6530T-1R0M120 TDK (1) 1µH, 12A, size 7x6.5x3mm L1HCP0704-1R0-R Coiltronics (6)1µH, 12A, size 6.8x6.8x4.2mm 1 C IN BA1851A3477MEpcos (7) 470µF/10V, Elect., 8×11.5 1 R1 CRCW06031101FKEYE3 Vishay (4) Resistor, 1.10k, 0603, 1% 1 R2 CRCW04026980FKEYE3 Vishay (4) Resistor, 698Ω, 0603, 1%1 R3 CRCW06034752FKEYE3 Vishay (4) Resistor, 47.5k, 0603, 1% 1 R4 CRCW04022002FKEYE3 Vishay (4)Resistor, 20k, 0402, 1% 1 R5 Open(CRCW06031003FRT1) Vishay (4)Resistor, 100k, 0603, 1%1 R6 CRCW060349R9FKEA Vishay (4)49.9Ω Resistor, 1%, Size 0603 1 R7 CRCW06032R20FKEA Vishay (4) 2.2Ω Resistor, 1%, Size 06031 Open(2N7002E)Q1Open(CMDPM7002A) CentralSemiconductor (8)Signal MOSFET − SOT23-6 1 U1 MIC22705YMLMicrel, Inc.(6)1MHz, 7A Integrated Switch High-EfficiencySynchronous Buck Regulator1Notes:1. TDK: .2. AVX.: .3. Murata: .4. Vishay Tel: .5. BC Components: .6. Coiltronics: .7. Epcos: .8. Central Semiconductor: . 9. Micrel, Inc.: .Evaluation Board PCB LayoutMIC22705 Evaluation Board Top LayerMIC22705 Evaluation Board Top SilkMIC22705 Evaluation Board Mid-Layer 1 (Ground Plane)MIC22705 Evaluation Board Mid-Layer 2MIC22705 Evaluation Board Bottom LayerMIC22705 Evaluation Board Bottom Silk。
DAC7724
No Oscillation To VSS, VCC, or GND
VREFL ±5
VREFH
T
T
500
±20
–40°C to +85°C q RESET TO MID-SCALE (DAC7724) OR
ZERO-SCALE (DAC7725) q DATA READBACK q DOUBLE-BUFFERED DATA INPUTS
APPLICATIONS
q PROCESS CONTROL q CLOSED-LOOP SERVO-CONTROL q MOTOR CONTROL q DATA ACQUISITION SYSTEMS
+15.75
T
–14.25
–15.75
T
50
6
8.5
–8
–6
T
180
250
TEMPERATURE RANGE Specified Performance
–40
+85
T
±1
LSB(1)
±1
LSB
±1
LSB
Bits
T
LSB
T
ppm/°C
±1
LSB
T
LSB
±1
LSB
T
ppm / V
T
V
T
mA
T
pF
T
mA
T
®
DAC7724, 7725
2
SPECIFICATION (SINGLE SUPPLY)
mc40p5004_datasheet_v0.0_090323
ABOV SEMICONDUCTOR Co., Ltd.4-BIT SINGLE-CHIP MICROCONTROLLERS MC40P5X04 SERIES•MC40P5004•MC40P5104•MC40P5204•MC40P5304•MC40P5404 User’s Manual (Ver. 0.0)REVISION HISTORY ( I ) VERSION 1.00 (Nov 21, 2008) This bookREVISION HISTORY ( II )VERSION 1.00 (Nov 21, 2008) This bookVersion 0.00Published by FAE Team2008 ABOV Semiconductor Co., Ltd. All rights reserved.Additional information of this manual may be served by ABOV Semiconductor offices in Korea or Distributors.ABOV Semiconductor reserves the right to make changes to any information here in at any time without notice.The information, diagrams and other data in this manual are correct and reliable; however, ABOV Semiconductor is in no way responsible for any violations of patents or other rights of the third party generated by the use of this manual.Table of Contents1. OVERVIEW (5)1.1 Description (5)1.2 Features (6)1.3 Ordering Information (6)2. BLOCK DIAGRAM (7)2.1 MC40P5004D (20 pin package) (7)2.2 MC40P5104D (20 pin package) (8)2.3 MC40P5204D (24 pin package) (9)2.4 MC40P5304D (24 pin package) (10)2.5 MC40P5404D (20 pin package) (11)3. PIN ASSIGNMENT (12)4. PACKAGE DIAGRAM (14)5. PIN DESCRIPTION (16)5.1 PIN DESCRIPTION (MC40P5004D, 20pins) (16)5.2 PIN DESCRIPTION (MC40P5104D, 20pins) (17)5.3 PIN DESCRIPTION (MC40P5404D, 20pins) (18)6. PORT STRUCTURES (19)7. ELECTRICAL CHARACTERISTICS (21)7.1 Absolute Maximum Ratings (Ta = 25℃) (21)7.2 Recommended Operating Conditions (21)7.3 Electrical characteristics (Ta=25℃, V DD= 3V) (21)8. Architecture (25)8.1 Program Memory (EPROM) (25)8.2 EPROM Address Register (26)8.3 Data memory (RAM) (27)8.4 X-register (X) (28)8.5 Y-register (Y) (28)8.6 Accumulator (Acc) (28)8.7 Arithmetic and Logic Unit (ALU) (28)8.8 State Counter (SC) (28)8.9 Clock Generator (29)8.10 Pulse Generator (30)8.11 Reset Operation (31)8.12 STOP Operation (33)8.13 Port Operation (33)9. Instruction (34)9.1 Instruction Table (35)9.2 DETAILS OF INSTRUCTION SYSTEM (37)9.3 Assembler Macro (48)10. SPGM(Serial Program) (49)10.1 Summary of Protocol (49)11. APPLICATION (53)11.1 Circuit Diagram (53)MC40P5004CMOS SINGLE-CHIP 4-BIT MICROCONTROLLER1. OVERVIEW1.1 DescriptionThe MC40P5x04D series is 4-bit remote control MCU which uses CMOS technology and the 4K bytes EPROM version. This enables transmission code outputs of different configurations, multiple customcode output, and double push key output for easy fabrication. The MC40P5x04D series is suitable for remote control of TV, VCR, FANS, Air-conditioners, Audio Equipments, Toys, Games etc.1.2 Features∙Program memory : 4,096 bytesMTP : 1K * 4, 2K * 2, 4K * 1∙Data memory : 32 × 4 bits∙43 types of instruction set∙ 3 levels of subroutine nesting∙Operating frequency : 2.4MHz ~ 4MHz2. BLOCK DIAGRAM2.1 MC40P5004D (20 pin package)ALUY-reg4 4 444 88 12124 4 44164 6422.2 MC40P5104D (20 pin package)ALUY-reg4 4 444 88 12124 444164 7422.3 MC40P5204D (24 pin package)ALUY-reg4 4 444 88 12124 4 44164 1010422.4 MC40P5304D (24 pin package)ALUY-reg4 4 444 88 12124 4 44164 1010422.5 MC40P5404D (20 pin package)ALUY-reg4 4 444 88 12124 4 44164 6423. PIN ASSIGNMENTFig 3-3 MC40P5204D Pin Assignment(24 PIN)REMDRV : open drain outputVPP : K3 ( PIN No.8) Fig 3-4 MC40P5304D Pin Assignment(24 PIN)REMOUT : Push Pull outputVPP : K3 ( PIN No.8)4. PACKAGE DIAGRAMFig 4-1 20SOP (209MIL)Fig 4-2 20SOP (300MIL)Fig 4-3 24SOP (300MIL)5. PIN DESCRIPTION5.1 PIN DESCRIPTION (MC40P5004D, 20pins)5.2 PIN DESCRIPTION (MC40P5104D, 20pins)5.3 PIN DESCRIPTION (MC40P5404D, 20pins)6. PORT STRUCTURES- Built in feedback-resistor Note: at 24 pins, D0 ~D5 is changed to D0 ~ D9 (MC40P5204D, 24pins) D8, D9 pin is automatically “L” at STOP mode. There is REMDRV at MC40P5204D and REMOUT at MC40P5304D.7. ELECTRICAL CHARACTERISTICS 7.1 Absolute Maximum Ratings (Ta = 25℃)Fig 7-1. I OH1 vs V OH1 Graph (REMOUT Port)Fig 7-2. I vs. V Graph. ( D, R Port )Fig 7-3. I OL1 vs V OL1 Graph (REMOUT Port without built-in Transistor of MC40P5104D and MC40P5304D )Fig 7-4. I OL4 vs. V OL4 Graph ( REMDRV Port with built-in Transistor of MC40P5004D,MC40P5204D and MC40P5404)8. Architecture8.1 Program Memory (EPROM)The MC40P5x04D series can incorporate maximum 4,096 words (4 bank x 64 words x 16 page x 8bits) for program memory. Program counter PC (A0~A5), Page address register (A6~A9) and Bank address register (A10, A11) are used to address the whole area of program memory having an instruction (8bits) to be next executed.The program memory consists of 64 words on each page, and thus each page can hold up to 64 steps ofFig 8-1 Configuration of Program Memory8.2 EPROM Address RegisterThe following registers are used to address the EPROM.ㆍPage address register (PA)Holds EPROM’s page number (0~Fh) and bank address (0 ~ 3h)to be addressed.ㆍPage buffer register (PB)Value of PB is loaded by an LPBI command when newly addressing a page. Then it is shifted into the PAAvailable for addressing word on each page.ㆍStack register (SR)Stores returned-word address in the subroutine call mode.(1) Page address register and page buffer registerAddress one of pages #0 to #15 in the EPROM by the 4-bit binary counter. Unlike the program counter, the page address register is usually unchanged so that the program will repeat on the same page unless a page changing command is issued. To change the page address, take two steps such as (1) writing in the page buffer what page to jump (execution of LPBI) and (2) execution of BR or CAL, because instruction code is of eightbits so that page and word can not be specified at the same time.In case a return instruction (RTN) is executed within the subroutine that has been called In the other page, the page address will be changed at the same time.(2) Program counterThis 6-bit binary counter increments for each fetch to address a word in the currently addressed page having an instruction to be next executed. For easier programming, at turning on the power, the program counter is reset to the zero location. The PA is also set to "0". Then the program counter specifies the next EPROM address in random sequence. When BR, CAL or RTN instructions are decoded, the switches on each step are turned off notFig 8-2 Configuration of Data Memory8.4 X-register (X)X-register is consist of 2bit, X0 is a data pointer of page in the RAM, X1 is only used for selecting of D8~D9 with value of Y-registerTable 8-1 Mapping table between X and Y register8.5 Y-register (Y)Y-register has 4 bits. It operates as a data pointer or a general-purpose register.Y-register specifies and address (a0~a3) in a page of data memory, as well as it is used to specify an output port. Further it is used to specify a mode of carrier signal outputted from the REMOUT port. It can also be treated as a general-purpose register on a program.8.6 Accumulator (Acc)The 4-bit register for holding data and calculation results.8.7 Arithmetic and Logic Unit (ALU)In this unit, 4bits of adder/comparator are connected in parallel as it's main components and they are combined with status latch and status logic (flag.)(1) Operation circuit (ALU)The adder/comparator serves fundamentally for full addition and data comparison. It executes subtraction by making a complement by processing an inversed output of Acc (Acc +1)(2) Status logicThis is to bring an ST, or flag to control the flow of a program. It occurs when a specified instruction is executed in three cases such as overflow or underflow in operation and two inputs unequal.8.8 State Counter (SC)A fundamental machine cycle timing chart is shown below. Every instruction is one byte length. Its execution time is the same. Execution of one instruction takes 48 clocks for fetch cycle and 48clocks for execute cycle (96 clocks in total).Virtually these two cycles proceed simultaneously, and thus it is apparently completed in 48clocks (one machine cycle). Exceptionally BR, CAL and RTN instructions is normal execution time since they change an addressing sequentially. Therefore, the next instruction is prefetched so that its execution is completed within the fetch cycle.Figure 8-4 Oscillator circuit with external capacitor8.10 Pulse GeneratorThe following frequency and duty ratio are selected for carrier signal outputted from the REMOUT port depending on a PMR (Pulse Mode Register) value set in a program.*Default value is “0”* f PUL = Pulse frequency, f OSC = Oscillation frequencyTable 8-2 PMR selection table8.11 Reset OperationMC40P5x04D series have three reset sources. One is a built-in Power-on reset circuit,Another is a built-in Low VDD Detection circuit, the other is the overflow of Watch Dog Timer WDT). All reset operations are internal in the MC40P5x04D series.8.11.1 Built-in Power On Reset CircuitMC40P5x04D series has a built-in Power-on reset circuit consisting of an about 1㏁Resistor and a 3pFreset f osc = 3.64MHzFig8-5 Power –On Reset Circuit and Timing Chart8.11.2 Built-in Low VDD Reset CircuitMC40P5x04D series have a Low VDD detection circuit.If VDD become Reset Voltage of Low VDD Detection circuit at a active status, system reset occur and WDT is cleared.After VDD is increased upper Reset Voltage again, WDT is re-counted and if WDT is overflowed, system reset is released.8.12 STOP OperationStop mode can be achieved by STOP instructions.In stop mode1. Oscillator is stopped, the operating current is low.2. Watch dog timer is reset, D8~D9 output and REMOUT output are "L".3. Part of output pin other than WDT,D0~D3, D8~D9 output and REMOUT output have a value beforecome into stop mode.Stop mode is released when one of K or R input is going to "L".1. State of D0~D7 output and REMOUT output is return to state of before stop mode is achieved.9. InstructionINSTRUCTION FORMATAll of the 43 instruction in MC40P5x04D series is format in two fields of OP code and operand which consist of eight bits. The following formats are available with different types of operands.*FormatⅠAll eight bits are for OP code without operand.*FormatⅡTwo bits are for operand and six bits for OP code. Two bits of operand are used for specifying bits of RAM and X-register (bit 1 and bit 7 are fixed at ″0″)*FormatⅢFour bits are for operand and the others are OP code. Four bits of operand are used for specifying a constant loaded in RAM or Y-register, a comparison value of compare command, or page addressing in ROM.*Format ⅣSix bits are for operand and the others are OP code. Six bits of operand are used for word addressing in the ROM.9.1 Instruction TableThe MC40P5x04D series provides the following 43 basic instructions.*2 Operation is settled by a value of Y-register..9.2 DETAILS OF INSTRUCTION SYSTEMAll 43 basic instructions of the MC40P5X04D Series are one by one described in detail below.Description Form.Each instruction is headlined with its mnemonic symbol according to the instructions table given earlier. Then, for quick reference, it is described with basic items as shown below. After that, detailed comment follows.*Items :- Naming : Full spelling of mnemonic symbol- Status : Check of status function- Format :Categorized into Ⅰto Ⅳ- Operand : Omitted for Format Ⅰ- Function(1) LAYNaming : Load Accumulator from Y-RegisterStatus : SetFormat : IFunction : A ←Y<Comment> Data of four bits in the Y-register is unconditionally transferred to the accumulator. Data in the Y-register is left unchanged.(2) LYANaming : Load Y-register from AccumulatorStatus : SetFormat : IFunction : Y ← A<Comment> Load Y-register from Accumulator(3) LAZNaming : Clear AccumulatorStatus : SetFormat : IFunction : A ←0<Comment> Data in the accumulator is unconditionally reset to zero.(4) LMANaming : Load Memory from AccumulatorStatus : SetFormat : IFunction : M(X,Y) ← A<Comment> Data of four bits from the accumulator is stored in the RAM location addressed by the X-register and Y-register. Such data is left unchanged.(5) LMAIYNaming : Load Memory from Accumulator and Increment Y-RegisterStatus : SetFormat : IFunction : M(X,Y) ←A, Y ←Y+1<Comment> Data of four bits from the accumulator is stored in the RAM location addressed by the X register and Y-register. Such data is left unchanged.(6) LYMNaming : Load Y-Register form MemoryStatus : SetFormat : IFunction : Y ←M(X,Y)<Comment> Data from the RAM location addressed by the X-register and Y-register is loaded into the Y-register. Data in the memory is left unchanged.(7) LAMNaming : Load Accumulator from MemoryStatus : SetFormat : IFunction : A ←M(X,Y)<Comment> Data from the RAM location addressed by the X-register and Y-register is loaded into the Y-register. Data in the memory is left unchanged.(8) XMANaming : Exchanged Memory and AccumulatorStatus : SetFormat : IFunction : M(X,Y) ↔ A<Comment> Data from the memory addressed by X-register and Y-register is exchanged with data from the accumulator. For example, this instruction is useful to fetch a memory word into theaccumulator for operation and store current data from the accumulator into the RAM. Theaccumulator can be restored by another XMA instruction.(9) LYI iNaming : Load Y-Register from ImmediateStatus : SetFormat : ⅢOperand : Constant 0 ≤i ≤15Function : Y ←i<Purpose> To load a constant in Y-register. It is typically used to specify Y-register in a particular RAM word address, to specify the address of a selected output line, to set Y-register forspecifying a carrier signal outputted from OUT port, and to initialize Y-register for loopcontrol. The accumulator can be restored by another XMA instruction.<Comment> Data of four bits from operand of instruction is transferred to the Y-register.(10) LMIIY iNaming : Load Memory from Immediate and Increment Y-RegisterStatus : SetFormat : ⅢOperand : Constant 0 ≤i ≤15Function : M(X,Y) ←i, Y ←Y + 1<Comment> Data of four bits from operand of instruction is stored into the RAM location addressed by the X-register and Y-register. Then data in the Y-register is incremented by one.(11) LXI nNaming : Load X-Register from ImmediateStatus : SetFormat : ⅡOperand : X file address 0 ≤n ≤3Function : X ←n<Comment> A constant is loaded in X-register. It is used to set X-register in an index of desired RAM page. Operand of 1 bit of command is loaded in X-register.(12) SEM nNaming : Set Memory BitStatus : SetFormat : ⅡOperand : Bit address 0 ≤n ≤3Function : M(X,Y,n) ← 1<Comment> Depending on the selection in operand of operand, one of four bits is set as logic 1 in the RAM memory addressed in accordance with the data of the X-register and Y-register.(13) REM nNaming : Reset Memory BitStatus : SetFormat : ⅡOperand : Bit address 0 ≤n ≤3Function : M(X,Y,n) ←0<Comment> Depending on the selection in operand of operand, one of four bits is set as logic 0 in the RAM memory addressed in accordance with the data of the X-register and Y-register.(14) TM nNaming : Test Memory BitStatus : Comparison results to statusFormat : ⅡOperand : Bit address 0 ≤n ≤3Function : M(X,Y,n) ←1?ST ← 1 when M(X,Y,n)=1, ST ←0 when M(X,Y,n)=0<Purpose> A test is made to find if the selected memory bit is logic. 1 Status is set depending on the result.(15) BR aNaming : Branch on status 1Status : Conditional depending on the statusFormat : ⅣOperand : Branch address a (Addr)Function : When ST =1 , PA ←PB, PC ←a(Addr)When ST = 0, PC ←PC + 1, ST ← 1Note : PC indicates the next address in a fixed sequence that is actually pseudo-randomcount.<Purpose> For some programs, normal sequential program execution can be change. A branch is conditionally implemented depending on the status of results obtained by executing theprevious instruction.<Comment> • Branch instruction is always conditional depending on the status.a. If the status is reset (logic 0), a branch instruction is not rightly executed but the nextinstruction of the sequence is executed.b. If the status is set (logic 1), a branch instruction is executed as follows.• Branch is available in two types - short and long. The former is for addressing in thecurrent page and the latter for addressing in the other page. Which type of branch toexecute is decided according to the PB register. To execute a long branch, data of the PBregister should in advance be modified to a desired page address through the LPBIinstruction.(16) CAL aNaming : Subroutine Call on status 1Status : Conditional depending on the statusFormat : ⅣOperand : Subroutine code address a(Addr)Function : When ST =1 , PC ←a(Addr) PA ←PBSR1 ←PC + 1, PSR1 ←PASR2 ←SR1 PSR2 ←PSR1SR3 ←SR2 PSR3 ←PSR2When ST = 0, PC ←PC + 1 PB ←PS ST ← 1Note : PC actually has pseudo-random count against the next instruction.<Comment> • In a program, control is allowed to be transferred to a mutual subroutine. Since a call instruction preserves the return address, it is possible to call the subroutine from differentlocations in a program, and the subroutine can return control accurately to the address that ispreserved by the use of the call return instruction (RTN).Such calling is always conditional depending on the status.a. If the status is reset, call is not executed.b. If the status is set, call is rightly executed.The subroutine stack (SR) of three levels enables a subroutine to be manipulated on threelevels. Besides, a long call (to call another page) can be executed on any level.• For a long call, an LPBI instruction should be executed before the CAL. When LPBI isomitted (and when PA=PB), a short call (calling in the same page) is executed.(17) RTNNaming : Return from SubroutineStatus : SetFormat : ⅠFunction : PC ←SR1 PA, PB ←PSR1SR1 ←SR2 PSR1 ←PSR2SR2 ←SR3 PSR2 ←PSR3SR3 ←SR3 PSR3 ←PSR2ST ←1<Purpose> Control is returned from the called subroutine to the calling program.<Comment> Control is returned to its home routine by transferring to the PC the data of the return address that has been saved in the stack register (SR1). At the same time, data of the pagestack register (PSR1) is transferred to the PA and PB.(18) LPBI iNaming : Load Page Buffer Register from ImmediateStatus : SetFormat : ⅢOperand : ROM page address 0 ≤i ≤15Function : PB ←i<Purpose> A new ROM page address is loaded into the page buffer register (PB). This loading is necessary for a long branch or call instruction.<Comment> The PB register is loaded together with three bits from 4 bit operand.(19) AMNaming : Add Accumulator to Memory and Status 1 on CarryStatus : Carry to statusFormat : ⅠFunction : A ←M(X,Y)+A, ST ←1(when total>15),ST ←0 (when total ≤15)<Comment> Data in the memory location addressed by the X and Y-register is added to data of the accumulator. Results are stored in the accumulator. Carry data as results is transferred tostatus. When the total is more than 15, a carry is caused to put ″1″in the status. Data in thememory is not changed.(20) SMNaming : Subtract Accumulator to Memory and Status 1 Not BorrowStatus : Carry to statusFormat : ⅠFunction : A ←M(X,Y) - A ST ←1(when A ≤M(X,Y))ST ←0(when A > M(X,Y))<Comment> Data of the accumulator is, through a 2`s complemental addition, subtracted from the memory word addressed by the Y-register. Results are stored in the accumulator. If dataof the accumulator is less than or equal to the memory word, the status is set to indicate thata borrow is not caused. If more than the memory word, a borrow occurs to reset the statusto ″0″.(21) IMNaming : Increment Memory and Status 1 on CarryStatus : Carry to statusFormat : ⅠFunction : A ←M(X,Y) + 1 ST ←1(when M(X,Y) ≥15)ST ←0(when M(X,Y) < 15)<Comment> Data of the memory addressed by the X and Y-register fetched. Adding 1 to this word, results are stored in the accumulator. Carry data as results is transferred to the status.When the total is more than 15, the status is set. The memory is left unchanged.(22) DMNaming : Decrement Memory and Status 1 on Not BorrowStatus : Carry to statusFormat : ⅠFunction : A ←M(X,Y) - 1 ST ←1(when M(X,Y) ≥1)ST ←0 (when M(X,Y) = 0)<Comment> Data of the memory addressed by the X and Y-register is fetched, and one is subtracted from this word (addition of Fh)> Results are stored in the accumulator. Carry data asresults is transferred to the status. If the data is more than or equal to one, the status is setto indicate that no borrow is caused. The memory is left unchanged.(23) IANaming : Increment AccumulatorStatus : SetFormat : ⅠFunction : A ←A+1<Comment> Data of the accumulator is incremented by one. Results are returned to the accumulator.A carry is not allowed to have effect upon the status.(24) IYNaming : Increment Y-Register and Status 1 on CarryStatus : Carry to statusFormat : ⅠFunction : Y ←Y + 1 ST ←1 (when Y = 15)ST ←0 (when Y < 15)<Comment> Data of the Y-register is incremented by one and results are returned to the Y-register. Carry data as results is transferred to the status. When the total is more than 15, the status is set.(25) DANaming : Decrement Accumulator and Status 1 on BorrowStatus : Carry to statusFormat : ⅠFunction : A ← A - 1 ST ←1(when A ≥1)ST ←0 (when A = 0)<Comment> Data of the accumulator is decremented by one. As a result (by addition of Fh), if a orrow is caused, the status is reset to ″0″by logic. If the data is more than one, no borrowoccurs and thus the status is set to ″1″.(26) DYNaming : Decrement Y-Register and Status 1 on Not BorrowStatus : Carry to statusFormat : ⅠFunction : Y ←Y -1 ST ←1 (when Y ≥1)ST ←0 (when Y = 0)<Purpose> Data of the Y-register is decremented by one.<Comment> Data of the Y-register is decremented by one by addition of minus 1 (Fh). Carry data as results is transferred to the status. When the results is equal to 15, the status is set toindicate that no borrow has not occurred.(27) EORMNaming : Exclusive or Memory and AccumulatorStatus : SetFormat : ⅠFunction : A ←M(X,Y) + A<Comment> Data of the accumulator is, through a Exclusive OR, subtracted from the memory word addressed by X and Y-register. Results are stored into the accumulator.(28) NEGANaming : Negate Accumulator and Status 1 on ZeroStatus : Carry to statusFormat : ⅠFunction : A ← A + 1 ST ←1(when A = 0)ST ←0 (when A != 0)<Purpose> The 2`s complement of a word in the accumulator is obtained.<Comment> The 2`s complement in the accumulator is calculated by adding one to the 1`s complement in the accumulator. Results are stored into the accumulator. Carry data is transferred to thestatus. When data of the accumulator is zero, a carry is caused to set the status to ″1″.(29) ALEMNaming : Accumulator Less Equal MemoryStatus : Carry to statusFormat : ⅠFunction : A ≤M(X,Y) ST ←1 (when A ≤M(X,Y))ST ←0 (when A > M(X,Y))<Comment> Data of the accumulator is, through a complemental addition, subtracted from data in the memory location addressed by the X and Y-register. Carry data obtained is transferred to thestatus. When the status is ″1″, it indicates that the data of the accumulator is less than orequal to the data of the memory word. Neither of those data is not changed.(30) ALEINaming : Accumulator Less Equal ImmediateStatus : Carry to statusFormat : ⅢFunction : A ≤i ST ←1 (when A ≤i)ST ←0 (when A > i)<Purpose> Data of the accumulator and the constant are arithmetically compared.<Comment> Data of the accumulator is, through a complemental addition, subtracted from the constant that exists in 4bit operand. Carry data obtained is transferred to the status. The status isset when the accumulator value is less than or equal to the constant. Data of theaccumulator is left unchanged.(31) MNEZNaming : Memory Not Equal ZeroStatus : Comparison results to statusFormat : ⅠFunction : M(X,Y) ≠0 ST ←1(when M(X,Y) ≠0)ST ←0 (when M(X,Y) = 0)<Purpose> A memory word is compared with zero.<Comment> Data in the memory addressed by the X and Y-register is logically compared with zero.Comparison data is transferred to the status. Unless it is zero, the status is set.(32) YNEANaming : Y-Register Not Equal AccumulatorStatus : Comparison results to statusFormat : ⅠFunction : Y ≠A ST ←1 (when Y ≠A)ST ←0 (when Y = A)<Purpose> Data of Y-register and accumulator are compared to check if they are not equal.<Comment> Data of the Y-register and accumulator are logically compared. Results are transferred to the status. Unless they are equal, the status is set.(33) YNEINaming : Y-Register Not Equal ImmediateStatus : Comparison results to statusFormat : ⅢOperand : Constant 0 ≤i ≤15Function : Y ≠i ST ←1 (when Y ≠i)ST ←0 (when Y = i)<Comment> The constant of the Y-register is logically compared with 4bit operand. Results aretransferred to the status. Unless the operand is equal to the constant, the status is set.(34) KNEZNaming : K Not Equal ZeroStatus : The status is set only when not equalFormat : ⅠFunction : When K ≠0, ST ←1<Purpose> A test is made to check if K is not zero.<Comment> Data on K are compared with zero. Results are transferred to the status. For input data not equal to zero, the status is set.(35) RNEZNaming : R Not Equal ZeroStatus : The status is set only when not equalFormat : ⅠFunction : When R ≠0, ST ←1<Purpose> A test is made to check if R is not zero.<Comment> Data on R are compared with zero. Results are transferred to the status. For input data not equal to zero, the status is set.(36) LAKNaming : Load Accumulator from KStatus : SetFormat : ⅠFunction : A ←K<Comment> Data on K are transferred to the accumulator(37) LARNaming : Load Accumulator from RStatus : SetFormat : ⅠFunction : A ←R<Comment> Data on R are transferred to the accumulator(38) SONaming : Set Output Register LatchStatus : SetFormat : ⅠFunction : D(Y) ←1 0 ≤Y ≤7REMOUT ←1(PMR=5) Y = 8D0~D9 ←1 (High-Z) Y = 9R(Y) ←1 Ah ≤Y ≤DhR ←1 Y = EhD0~D9, R ←1 Y = Fh<Purpose> A single D output line is set to logic 1, if data of Y-register is between 0 to 7. Carrier frequency comes out from REMOUT port, if data of Y-register is 8.All D output line is set to logic 1, if data of Y-register is 9. It is no operation, if data of Y-register between 10 to 15.When Y is between Ah and Dh, one of R output lines is set at logic 1.When Y is Eh, the output of R is set at logic 1.When Y is Fh, the output D0~D9 and R are set at logic 1.<Comment> Data of Y-register is between 0 to 7, selects appropriate D output.Data of Y-register is 8, selects REMOUT port.Data of Y-register is 9, selects all D port.Data in Y-register, when between Ah and Dh, selects an appropriate R output (R0~R3).Data in Y-register, when it is Eh, selects all of R0~R3.Data in Y-register, when it is Fh, selects all of D0~D9 and R0~R3.(39) RONaming : Reset Output Register LatchStatus : SetFormat : ⅠFunction : D(Y) ←0 0 ≤Y ≤7REMOUT ←0 Y = 8D0~D9 ←0 Y = 9R(Y) ←0 Ah ≤Y ≤DhR ←0 Y = EhD0~D9, R ←0 Y = Fh<Purpose> A single D output line is set to logic 0, if data of Y-register is between 0 to 9.REMOUT port is set to logic 0, if data of Y-register is 9.All D output line is set to logic 0, if data of Y-register is 9.。
P87C552SBAA,512;中文规格书,Datasheet资料
• Two standard 16-bit timer/counters • 256 × 8 RAM, expandable externally to 64k bytes • Capable of producing eight synchronized, timed outputs • A 10-bit ADC with eight multiplexed analog inputs • Fast 8-bit ADC option • Two 8-bit resolution, pulse width modulation outputs • Five 8-bit I/O ports plus one 8-bit input port shared with analog
– OTP/EPROM – 3 bits
• Encryption array – 64 bytes • 4 level priority interrupt • 15 interrupt sources • Full-duplex enhanced UART
– Framing error detection – Automatic address recognition
INTEGRATED CIRCUITS
P87C552 80C51 8-bit microcontroller
8K/256 OTP, 8 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, low voltage (2.7 V to 5.5 V), low power
Product data
80C51 8-bit microcontroller
8K/256 OTP, 8 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, low voltage (2.7 V to 5.5 V), low power
MIC45205评估板：26V 6A DC-到-DC电源模块，超轻负载和超速控制是Micrel公司的
MIC45205 Evaluation Board26V/6A DC-to-DC Power ModuleGeneral DescriptionMicrel’s MIC45205 is a synchronous step-down regulatormodule, featuring a unique adaptive ON-time controlarchitecture. The module incorporates a DC-to-DCcontroller, power MOSFETs, bootstrap diode, bootstrapcapacitor, and an inductor in a single package; simplifyingthe design and layout process for the end user.This highly integrated solution expedites system designand improves product time-to-market. The internalMOSFETs and inductor are optimized to achieve highefficiency at a low output voltage. The fully optimizeddesign can deliver up to 6A current under a wide inputvoltage range of 4.5V to 26V, without requiring additionalcooling.The MIC45205-1 uses Micrel’s HyperLight Load®(HLL)MIC45205-2 uses Micrel’s Hyper Speed Control™architecture which enables ultra-fast load transientresponse, allowing for a reduction of output capacitance.The MIC45205 offers 1% output accuracy that can beadjusted from 0.8V to 5.5V with two external resistors.The basic parameters of the evaluation board are:•Input: 4.5V to 26V•Output 0.8V to 5V at 6A•600kHz Switching Frequency−Adjustable 200kHz to 600kHzDatasheets and support documentation are available onMicrel’s web site at: .RequirementsThe MIC45205-1 and MIC45205-2 evaluation boardrequires only a single power supply with at least 10Acurrent capability. No external linear regulator is requiredto power the internal biasing of the IC because theMIC45205 has an internal PVDD LDO. In the applicationswith VIN < +5.5V, PVDD should be tied to VIN to bypassthe internal linear regulator. The output load can either bea passive or an active load.PrecautionsThe MIC45205 evaluation board does not have reversepolarity protection. Applying a negative voltage to the VINand GND terminals may damage the device. Themaximum VIN of the board is rated at 26V. Exceeding 30Von the VIN could damage the device.Getting Started1. VIN SupplyConnect a supply to the VIN and GND terminals,paying careful attention to the polarity and the supplyrange (4.5V < VIN < 26V). Monitor IIN with a currentmeter and monitor input voltage at VIN and GNDterminals with a voltmeter. Do not apply power untilStep 4.2. Connect Load and Monitor OutputConnect a load to the VOUT and GND terminals. Theload can be either a passive (resistive) or an active (asin an electronic load) type. A current meter may beplaced between the VOUT terminal and load tomonitor the output current. Ensure the output voltageis monitored at the VOUT terminal.3. Enable InputThe EN pin has an on board 100kΩpull-up resistor(R10) to VIN, which allows the output to be turned onwhen PVDD exceeds its UVLO threshold. An ENconnector is provided on the evaluation board forusers to easily access the enable feature. Applying anexternal logic signal on the EN pin to pull it low orusing a jumper to short the EN pin to GND will shut offthe output of the MIC45205 evaluation board.4. Turn PowerTurn on the VIN supply and verify that the outputvoltage is regulated to 5V.Ordering InformationPart Number DescriptionMIC45205-1YMP EV MIC45205-1 Evaluation BoardMIC45205-2YMP EV MIC45205-2 Evaluation BoardFeaturesFeedback ResistorsThe output voltage on the MIC45205 evaluation board, which is preset to 5.0V, is determined by the feedback divider, as illustrated in Equation 1:+×=BOTTOMREF OUT R R141V V Eq. 1where V REF = 0.8V, and R BOTTOM is one of R3 thru R9. Leaving the R BOTTOM open by removing all jumpers on the feedback headers gives a 0.8V output voltage. All other voltages not listed above can be set by modifying R BOTTOM value according to Equation 2:REFOUT REFBOTTOM V V V R1R −×=Eq. 2Note that the output voltage should not be set to exceed 5V.Table 1. Typical Values of Some Components V OUT VIN R14(Top Feedback Resistor)R(Bottom Feedback Resistor)C14 (C ff ) C OUT 1.0V 5V to 26V 10kΩ 40.2kΩ 2.2nF 100µF/6.3V 1.2V 5V to 26V 10kΩ 20.0kΩ 2.2nF 100µF/6.3V 1.5V 5V to 26V 10kΩ 11.5kΩ 2.2nF 100µF/6.3V 1.8V 5V to 26V 10kΩ 8.06kΩ 2.2nF 100µF/6.3V 2.5V 5V to 26V 10kΩ 4.75kΩ 2.2nF 100µF/6.3V 3.3V 5V to 26V 10kΩ 3.24kΩ 2.2nF 100µF/6.3V 5V7V to 26V10kΩ1.91kΩ2.2nF100µF/6.3VSW NodeA test pad is placed for monitoring the switching waveform, which is one of the most critical waveforms for the converter.Current LimitThe MIC45205 uses the R DS(ON) of the low-side MOSFET and external resistor connected from the ILIM pin to the SW node to decide the current limit.Figure 1. MIC45205 Current-Limiting CircuitIn each switching cycle of the MIC45205, the inductor current is sensed by monitoring the low-side MOSFET in the OFF period. The sensed voltage V(ILIM)is compared with the power ground (PGND) after a blanking time of 150ns. In this way the drop voltage over the resistor R15 (V CL) is compared with the drop over the bottom FET generating the short current limit. The small capacitor (C15) connected from ILIM pin to PGND filters the switching node ringing during the off-time allowing a better short-limit measurement. The time constant created by R15 and C15 should be much less than the minimum off time.The V CL drop allows programming of short limit through the value of the resistor (R15) if the absolute value of the voltage drop on the bottom FET is greater than V CL. In that case the V(ILIM)is lower than PGND and a short circuit event is triggered. A hiccup cycle to treat the short event is generated. The hiccup sequence including the soft-start reduces the stress on the switching FETs and protects the load and supply for severe short conditions. The short-circuit current limit can be programmed by using Equation 3:()CLCL)ON(DSPPLCLIMIVR)5.0II(R15+××D−=Eq. 3 where:I CLIM = Desired current limitR DS(ON) = On-resistance of low-side power MOSFET, 16mΩ typicallyV CL= Current-limit threshold (typical absolute value is 14mV per Electrical Characteristics in the MIC45205 data sheet)I CL= Current-limit source current (typical value is 80µA, per Electrical Characteristics in the MIC45205 data sheet). ΔI L(PP)= Inductor current peak-to-peak, since the inductor is integrated, use Equation 4 to calculate the inductor ripple current.The peak-to-peak inductor current ripple is:LfV)V(VVIswIN(MAX)OUTIN(MAX)OUTL(PP)××−×=D Eq. 4The MIC45205 has 1.0µH inductor integrated into the module. In case of hard short, the short limit is folded down to allow an indefinite hard short on the output without any destructive effect. It is mandatory to make sure that the inductor current used to charge the output capacitance during soft start is under the folded short limit; otherwise the supply will go in hiccup mode and may not be finishing the soft start successfully.The MOSFET R DS(ON) varies 30 to 40% with temperature. Therefore, it is recommended to add a 50% margin to I CLIM in the above equation to avoid false current limiting due to increased MOSFET junction temperature rise. With R15 = 1.37kΩ and C15 = 15pF, the typical output current limit is 8A.Setting the Switching FrequencyThe MIC45205 switching frequency can be adjusted by changing the value of resistors R1 and R2. The switching frequency also depends on VIN, V OUT and load conditions.Figure 2. Switching Frequency AdjustmentEquation 5 gives the estimated switching frequency:2R 1R 2R f f O SW +×=Eq. 5where: f O = 600kHzR1 = 100k Ω (recommended)R2 is selected to set the required switching frequency as shown in Figure 3:Figure 3. Switching Frequency vs. R2MIC45205 Evaluation Board SchematicFigure 4. Schematic of MIC45205 Evaluation BoardBill of MaterialsItem Part Number Manufacturer Description Qty. C1 B41125A7227M TDK(1)220µF/35V, ALE Capacitor (optional) 1 C1X, C6, C9,C10, C7, C13Open 6 C3 C3216X5R1H106M160AB TDK 10uF/50V, 1206, X5R, 10%, MLCC 1 C2, C4, C8 GRM188R71H104KA93D Murata(2)0.1µF/50V, X7R, 0603, 10%, MLCC 3 C5 C3216X5R0J107M160AB TDK 100µF/6.3V, X5R, 1206, 20%, MLCC 1 C12 C1608C0G1H222JT TDK 2.2nF/50V, NP0, 0603, 5%, MLCC 1 C11 GRM1885C1H150JA01D Murata 15pF/50V, NP0, 0603, 5%, MLCC 3 CON1, CON2,CON3, CON48174 Keystone(3)15A, 4-Prong Through-Hole Screw Terminal 4 J1 M50-3500742 Harwin(4)Header 2x7 1 J2, J3, J4,TP3 − TP590120-0122 Molex(5)Header 2 6 JPx1, JPx2 Open 2 R1, R10 CRCW0603100K0FKEA Vishay Dale(6)100kΩ, 1%, 1/10W, 0603, Thick Film 2 R2, R12,R13, R16Open 4 R3 CRCW060340K2FKEA Vishay Dale 40.2kΩ, 1%, 1/10W, 0603, Thick Film 1 R4 CRCW06020K0FKEA Vishay Dale 20kΩ, 1%, 1/10W, 0603, Thick Film 1 R5 CRCW060311K5FKEA Vishay Dale 11.5kΩ, 1%, 1/10W, 0603, Thick Film 1 R6 CRCW06038K06FKEA Vishay Dale 8.06kΩ, 1%, 1/10W, 0603, Thick Film 1 R7 CRCW06034K75FKEA Vishay Dale 4.75kΩ, 1%, 1/10W, 0603, Thick Film 1 R8 CRCW06033K24FKEA Vishay Dale 3.24kΩ, 1%, 1/10W, 0603, Thick Film 1 R9 CRCW06031K91FKEA Vishay Dale 1.91kΩ, 1%, 1/10W, 0603, Thick Film 1 R11 CRCW060349K9FKEA Vishay Dale 49.9kΩ, 1%, 1/10W, 0603, Thick Film 1 R14 CRCW060310K0FKEA Vishay Dale 10kΩ, 1%, 1/10W, 0603, Thick Film 1 R15 CRCW06031K37FKEA Vishay Dale 1.37kΩ, 1%, 1/10W, 0603, Thick Film 1 R17, R18, R19 RCG06030000Z0EA Vishay Dale 0Ω Resistor, 1%, 1/10W, 0603, Thick Film 3 TP6 − TP9,JPx3, JPx41502-2 Keystone Single-End, Through-Hole Terminal 6U1 MIC45205-1YMPMicrel, Inc.(7)26V/6A DC-to-DC Power Module 1 MIC45205-2YMPNotes:1. TDK: .2. Murata: .3. Keystone: .4. Harwin: 5. Molex: .6. Vishay-Dale: .7. Micrel: .PCB Layout RecommendationsMIC45205 Evaluation Board Top LayerMIC45205 Evaluation Board Copper Layer 2PCB Layout Recommendations (Continued)MIC45205 Evaluation Board Copper Layer 3MIC45205 Evaluation Board Bottom LayerMICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USATEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB Micrel, Inc. is a leading global manufacturer of IC solutions for the worldwide high-performance linear and power, LAN, and timing & communications markets. The Company’s products include advanced mixed-signal, analog & power semiconductors; high-performance communication, clock management, MEMs-based clock oscillators & crystal-less clock generators,Ethernet switches, and physical layer transceiver ICs. Company customers include leading manufacturers of enterprise, consumer, industrial, mobile, telecommunications, automotive, and computer products. Corporation headquarters and state-of-the-art wafer fabrication facilities are located in San Jose, CA, with regional sales and support offices and advanced technology design centers situated throughout the Americas, Europe, and Asia. Additionally, the Company maintains an extensive network of distributors and reps worldwide.Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this datasheet. This information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.© 2014 Micrel, Incorporated.。
ov7725新规格书
300Kpixels OV7725 Camera Module
Customer module NO:YA080912
Version:1.0
YA080912
Version1.0
General Specification
Sensor Type Active Array Size Pixel Size 1/4’’ CMOS sensor 640(H)x480(V) 6.0umx6.0um YUV/YCbCr4:2:2 RGB565/555/444 RGB4:2:2 Raw RGB Data Max Frame Rate External Clock Rate Digital core Power Supply Analog I/O Active Standby SVGA 60fps for VGA 10~48MHZ (24MHZ for Typ.) 1.8VDC +/- 10% 3.0V-3.6VDC 1.7V-3.3V 120mW typical(60fps,VGA, yuv) 20uA typical 3.0V(Lux.sec) 50dB 60dB Progressive Operation Stable Image -1-20℃-70℃ 0℃-50℃
-4-
FRONT VIEW
SIDE VIEW
BOTTOM VIEW
注：1.未彪锐角处皆为R0.2mm. 2.未标注公差处采用A级公差。 3.SENSOR:OV7725 4.UNIT:mm
Output Format
Power Consumption
Sensitivity S/N Ratio Dynamic Range Scan Mode
Temperature Range
MC14526BCPG,MC14526BDWR2G,MC14526BDWG,MC14526BDW,MC14526BDWR2,MC14526BFG, 规格书,Datasheet 资料
high, causes the “0” output to go high. “0” (Pin 12) — The “0” (Zero) output issues a pulse one
VSS (Pin 8) — The most negative power supply potential. This pin is usually ground.
MC14526BCP AWLYYWWG
1
PDIP−16 1
P SUFFIX
CASE 648
14526B AWLYWWG
1 SOIC−16 WB DW SUFFIX 1 CASE 751G
MC14526B ALYWG
1 SOEIAJ−16 F SUFFIX 1 CASE 966
A
= Assembly Location
X
L
X
H
X
L Asynchronous preset
L
H
L
X
L Decrement inhibited
L
L
L
X
L Decrement inhibited
L
L
L
L
L No change** (inactive edge)
H
L
L
L
L No change** (inactive edge)
L
L
L
L
L Decrement**
input.
output depends on the Preset Enable input level. See the
Clock (Pin 6) — The counter decrements by one for each Function Table.
Maxim_Integrated-DS32KHZ_DIP-datasheet.1.pdf - DS
DS32kHz32.768kHz Temperature-CompensatedCrystal OscillatorGENERAL DESCRIPTIONThe DS32kHz is a temperature-compensated crystal oscillator (TCXO) with an output frequency of 32.768kHz. This device addresses applications requiring better timekeeping accuracy, and can be used to drive the X1 input of most Dallas Semiconductor real-time clocks (RTCs), chipsets, and other ICs containing RTCs. This device is available in commercial (DS32kHz) and industrial (DS32kHz-N) temperature versions.APPLICATIONSGPS Receivers TelematicsNetwork Timing and Synchronization in Servers, Routers, Hubs, and Switches Automatic Power MetersFEATURESAccurate to ±4 Minutes/Year (-40°C to +85°C) Accurate to ±1 Minute/Year (0°C to +40°C) Battery Backup for Continuous Timekeeping V BAT Operating Voltage: 2.7V to 5.5V with V CCGroundedV CC Operating Voltage: 4.5V to 5.5V Operating Temperature Range:0°C to +70°C (Commercial) -40°C to +85°C (Industrial)No Calibration Required Low-Power ConsumptionSurface Mountable Using BGA Package UL RecognizedORDERING INFORMATIONPARTTEMP RANGEPIN-PACKAGETOP MARK*DS32KHZ/DIP 0ºC to +70ºC 14 DIP DS32KHZ DS32KHZN/DIP -40ºC to +85ºC 14 DIPDS32KHZ-N DS32KHZS 0ºC to +70ºC 16 SO (0.300”) DS32KHZS DS32KHZS# 0ºC to +70ºC 16 SO (0.300”) DS32KHZS DS32KHZSN -40ºC to +85ºC 16 SO (0.300”) DS32KHZSN DS32KHZSN# -40ºC to +85ºC 16 SO (0.300”) DS32KHZSN DS32KHZ/WBGA 0ºC to +70ºC 36 BGA DS32KHZ DS32KHZN/WBGA-40ºC to +85ºC36 BGADS32KHZ-N#Denotes a RoHS-compliant device that may include lead that is exempt under the RoHS requirements. The lead finish is JESD97 category e3, and is compatible with both lead-based and lead-free soldering processes.*A “#” anywhere on the top mark denotes a RoHS-compliant device. An “N” denotes an industrial device.PIN CONFIGURATIONSABSOLUTE MAXIMUM RATINGSVoltage Range on Any Pin Relative to Ground………………………………………………………………-3.0V to +7.0V Operating Temperature Range (Noncondensing)Commercial:…………………………………………………………………………………………………..0°C to +70°CIndustrial:……………………………………………………………………………………………………-40°C to +85°CStorage Temperature Range………………………………………………………………………………….-40°C to +85°C Soldering Temperature (BGA, SO)……………………….See the Handling, PC Board Layout, and Assembly section. Soldering Temperature, Leads (DIP)……………………………………………………..+260°C for 10 seconds (Note 1)Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only,and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications isnot implied. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability.RECOMMENDED DC OPERATING CONDITIONS(T A = -40°C to +85°C) (Note 1)PARAMETER SYMBOL CONDITIONS MINTYPMAXUNITS Power-Supply Voltage V CC(Note2) 4.5 5.0 5.5 VBattery Voltage V BAT(Notes 2, 3) 2.7 3.0 3.5,5.5VDC ELECTRICAL CHARACTERISTICS(Over the operating range, unless otherwise specified.) (Note 1)PARAMETER SYMBOL CONDITIONS MINTYPMAXUNITSActive Supply Current I CC V BAT = 0V or2.7V ≤ V BAT≤3.5V(Notes 3, 4)150 220 μABattery Input-Leakage Current I BATLKG V CC MIN≤ V CC≤ V CC MAX -50 +50 nAHigh Output Voltage (V CC) V OH I OH = -1.0mA (Note 2) 2.4 VLow Output Voltage V OL I OL = 2.1mA (Note 2) 0.4 VHigh Output Voltage (V BAT) V OH I OH = -0.1mA (Note 2) 2.4 VBattery Switch Voltage V SW(Note 2) V BAT V(V CC = 0V, T A = -40°C to +85°C.) (Note 1)PARAMETER SYMBOL CONDITIONS MINTYPMAXUNITS Active Battery Current I BAT V BAT = 3.3V (Notes 4, 5, 6) 1 4 μABattery Current DuringTemperature MeasurementI BATCNV V BAT = 3.3V (Notes 4, 5, 7) 450 μANote 1:Limits at -40°C are guaranteed by design and are not production tested.Note 2:All voltages are referenced to ground.Note 3:V BAT must be no greater than 3.5V when the device is used in the dual-supply operating modes.Note 4:Typical values are at +25°C and 5.0V V CC, 3.0 V BAT, unless otherwise indicated.Note 5:These parameters are measured under no output load conditions.Note 6:This current is the active-mode current sourced from the backup supply/battery.Note 7: A temperature conversion lasts 122ms (typ) and occurs on power-up and then once every 64 seconds.AC TIMING CHARACTERISTICS(Over the operating range, unless otherwise specified.)PARAMETER SYMBOLCONDITIONSMINTYPMAXUNITSOutput Frequency f OUT32.768kHz0°C to +40°C -2.0 +2.0Frequency Stability vs. Temperature ∆f/f O-40°C to +85°C or0°C to +70°C-7.5 +7.5ppmDuty Cycle t W/t 45 50 55 % Cycle Time t CYC(Note 8) 30.518 μsHigh/Low Time t H/t L(Note8) 15.06 μsRise Time t R(Note 8) 200 nsFall Time t F(Note8) 60 ns Oscillator Startup Time t OSC(Note 8) 1 secondsFrequency Stability vs. Operating Voltage ∆f/VV CC = 5.0V orV BAT = 3.0V, V CC = 0V(Notes 4, 9)+2.5 ppm/VCrystal Aging (First Year) ∆f/f O(Notes 4, 10) ±1.0 ppmNote 8:These parameters are measured using a 15pF load.Note 9:Error is measured from the nominal supply voltage of whichever supply is powering the device.Note 10:After reflow.TYPICAL OPERATING CHARACTERISTICSPIN DESCRIPTIONPINSO BGA DIPNAME FUNCTION1 C4, C5, D4, D5 12 32kHz 32.768kHz Push-Pull Output2 C2, C3, D2, D3 13 V CC Primary Power Supply3–12, 15, 16 A7, A8, B7, B8,C7, C8, D7, D81, 6–11, 14 N.C. No Connection (Must be grounded)13 All remainingballs4 GNDGround14 A4, A5, B4, B5 5 V BAT +3V Nominal Supply Input. Used to operate the device when V CC is absent.Figure 2. Delta Time and Frequency vs. TemperatureFUNCTIONAL DESCRIPTIONThe DS32kHz is a temperature-compensated crystal oscillator (TCXO) that outputs a 32,768Hz square wave. While the DS32kHz is powered by either supply input, the device measures the temperature every 64 seconds and adjusts the output frequency. The device requires four pins for operation: V CC, GND, V BAT, and 32kHz. (See Figure 4 for connection schemes.) Power is applied through V CC and GND, while V BAT is used to maintain the 32kHz output in the absence of power. Once every 64 seconds, the DS32kHz measures the temperature and adjusts the output frequency. The output is accurate to ±2ppm (±1 min/yr) from 0°C to +40°C and to ±7.5ppm (±4 min/year) from -40°C to 0°C and from +40°C to +85°C.The DS32kHz is packaged in a 36-pin ball grid array (BGA). It also is available in a 16-pin 0.300” SO and a 14-pin encapsulated DIP (EDIP) module.The additional PC board space required to add the DS32kHz as an option for driving a RTC is negligible in many applications (see Figure 6) Therefore, adding the DS32kHz to new designs and future board revisions allows the use of the DS32kHz where applications require improved timekeeping accuracy.Figure 3. Block DiagramOPERATIONThe DS32kHz module contains a quartz tuning-fork crystal and an IC. When power is first applied, and when the device switches between supplies, the DS32kHz measures the temperature and adjusts the crystal load to compensate the frequency. The power supply must remain at a valid level whenever a temperature measurement is made, including when V CC is first applied. While powered, the DS32kHz measures the temperature once every 64 seconds and adjusts the crystal load.The DS32kHz is designed to operate in two modes. In the dual-supply mode, a comparator circuit, powered by V CC, monitors the relationship between the V CC and V BAT input levels. When V CC drops below a certain level compared to V BAT, the device switches over to V BAT (Figure 4A). This mode uses V CC to conserve the battery connected to V BAT while V CC is applied.In the single-supply mode, V CC is grounded and the unit is powered by V BAT. Current consumption is less than V CC, because the comparator circuit is unpowered (Figure 4B).Figure 4A shows how the DS32kHz should be connected when using two power supplies. V CC should be between 4.5V and 5.5V, and V BAT should be between 2.7V and 3.5V. Figure 4B shows how the DS32kHz can be used when only a single-supply system is available. V CC should be grounded and V BAT should then be held between 2.7V and 5.5V. The V BAT pin should be connected directly to a battery. Figure 4C shows a single-supply mode where V CC is held at +5V. See the frequency stability vs. operating voltage for information about frequency error vs. supply voltage.Figure 4. Power-Supply ConnectionsFigure 5 illustrates how a standard 32.768kHz crystal and the DS32kHz should be connected to address the interchangeable option. Using this connection scheme and the recommended layout provides a solution, which requires no hardware modifications. Only one device should be used at a time, and both layouts should be located very close together if the recommended layout is not used.The DS32kHz I CC and I BAT currents are specified with no output loads. Many RTC oscillator circuits use a quartz crystal or resonator. Driving the oscillator circuit with the rail-to-rail output of the DS32kHz can increase the I CC and I BAT currents significantly and increase the current consumption of the RTC as well. Figure 6 shows one circuit that can be used to reduce the current consumption of a DS32kHz and an RTC. The values of R1 and C1 may vary depending on the RTC used. However, values of 1.0MΩ and 100pF are recommended as a starting point. R2 is used to shift the input waveform to the proper level. The recommended value for R2 is 33kΩ.Figure 5. DS32kHz ConnectionsFigure 6. DS32kHz and RTC ConnectionsRELATED APPLICATION NOTES(Go to /RTCapps to find these application notes and more.)Application Note 58: Crystal Considerations with Dallas Real-Time ClocksApplication Note 701: Using the DS32kHz with Dallas RTCsHANDLING, PC BOARD LAYOUT, AND ASSEMBLYThese packages contain a quartz tuning-fork crystal. Pick-and-place equipment may be used, but precautions should be taken to ensure that excessive shocks are avoided. Ultrasonic cleaning should be avoided to prevent damage to the crystal.Avoid running signal traces under the package, unless a ground plane is placed between the package and the signal line. All N.C. (no connect) pins must be connected to ground.The BGA package may be reflowed as long as the peak temperature does not exceed 240°C. Peak reflow temperature (≥230°C) duration should not exceed 10 seconds, and the total time above 200°C should not exceed 40 seconds (30 seconds nominal). For the SO package, refer to the IPC/JEDEC J-STD-020 specification for reflow profiles. Exposure to reflow is limited to 2 times maximum. The DIP package can be wave-soldered, provided that the internal crystal is not exposed to temperatures above 150°C.Moisture sensitive packages are shipped from the factory dry-packed. Handling instructions listed on the package label must be followed to prevent damage during reflow. Refer to IPC/JEDEC J-STD-020 standard for moisture-sensitive device (MSD) classifications.PACKAGE INFORMATION(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package information,o to /DallasPackInfo.)gPACKAGE TYPE DOCUMENT NUMBER THETA-J A(°C/W)THETA-J C(°C/W)14-pin Encapsulated DIP 56-G0001-00216-pin SO (300 mils) 56-G4009-00173 23 36-pin BGA 56-G6023-00143.9 18.48 of 8Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product. No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time. Maxim In tegrated P roducts, 120 S an Gabriel D rive, Sun nyvale, CA94086 408-737-7600。
PMIC-稳压器-线性+切换式热门型号
PMIC-稳压器-线性+切换式热门型号PMIC - 稳压器 - 线性 + 切换式热门型号MAX786CAI[中文MAX786CAI Datasheet]HIP6019BCB[中文HIP6019BCB Datasheet]HIP6021CB[中文HIP6021CB Datasheet]HIP6018BCB[中文HIP6018BCB Datasheet]HIP6521CB[中文HIP6521CB Datasheet]ISL6529CB[中文ISL6529CB Datasheet]ISL6528CB-T[中文ISL6528CB-T Datasheet]ISL6528CB[中文ISL6528CB Datasheet]ISL6529CB-T[中文ISL6529CB-T Datasheet]ISL6534CV[中文ISL6534CV Datasheet]ISL6549CBZ[中文ISL6549CBZ Datasheet]TPS5130PT[中文TPS5130PT Datasheet]ISL6549CB[中文ISL6549CB Datasheet]ISL6549CRZ[中文ISL6549CRZ Datasheet]NCP1500DMR2[中文NCP1500DMR2 Datasheet] ISL6442IAZ[中文ISL6442IAZ Datasheet]LTC3700EMS[中文LTC3700EMS Datasheet]ISL6534CRZ[中文ISL6534CRZ Datasheet]ISL6402AIR[中文ISL6402AIR Datasheet]TPS61100PW[中文TPS61100PW Datasheet]A8450KLB[中文A8450KLB Datasheet]ISL6529CR-T[中文ISL6529CR-T Datasheet]ISL6534CR-T[中文ISL6534CR-T Datasheet]TPS61130PW[中文TPS61130PW Datasheet]HIP6019BCB-T[中文HIP6019BCB-T Datasheet]TPS51221RTVR[中文TPS51221RTVR Datasheet] ISL6529CBZ[中文ISL6529CBZ Datasheet]ISL6534CRZ-T[中文ISL6534CRZ-T Datasheet]ISL6529CR[中文ISL6529CR Datasheet]ISL6529CBZ-T[中文ISL6529CBZ-T Datasheet]ISL6402IV[中文ISL6402IV Datasheet]ISL6413IR[中文ISL6413IR Datasheet]ISL6534CR[中文ISL6534CR Datasheet]ISL6534CVZ[中文ISL6534CVZ Datasheet]AAT2500IWP-AW-T1[中文AAT2500IWP-AW-T1 Datasheet] HIP6019BCBZ[中文HIP6019BCBZ Datasheet]TPS61130RSAR[中文TPS61130RSAR Datasheet]NCP1501DMR2[中文NCP1501DMR2 Datasheet]FAN5069MTCX[中文FAN5069MTCX Datasheet]TPS61106PW[中文TPS61106PW Datasheet]TPS61132PW[中文TPS61132PW Datasheet]SC2463TSTRT[中文SC2463TSTRT Datasheet]ISL6534CVZ-T[中文ISL6534CVZ-T Datasheet]TPS61131PW[中文TPS61131PW Datasheet]TPS61103PW[中文TPS61103PW Datasheet]NCP1500DMR2G[中文NCP1500DMR2G Datasheet]ISL6521CBZ[中文ISL6521CBZ Datasheet]NCP1501DMR2G[中文NCP1501DMR2G Datasheet]TPS51511RHLR[中文TPS51511RHLR Datasheet]TPS5300DAP[中文TPS5300DAP Datasheet]ISL8501IRZ[中文ISL8501IRZ Datasheet]ISL6402IR[中文ISL6402IR Datasheet]TPS61132RSAR[中文TPS61132RSAR Datasheet]MAX1765EUE[中文MAX1765EUE Datasheet]HIP6521CBZ[中文HIP6521CBZ Datasheet]TPS51511RHLT[中文TPS51511RHLT Datasheet]ISL6529ACB-T[中文ISL6529ACB-T Datasheet]ISL6402IVZ[中文ISL6402IVZ Datasheet]SC417MLTRT[中文SC417MLTRT Datasheet]ISL6534CV-T[中文ISL6534CV-T Datasheet]ISL6528CBZ-T[中文ISL6528CBZ-T Datasheet]ISL6529ACB[中文ISL6529ACB Datasheet]TPS61107PW[中文TPS61107PW Datasheet]TPS65030YZKT[中文TPS65030YZKT Datasheet]MAX1765EEE[中文MAX1765EEE Datasheet]ISL6402IVZ-TK[中文ISL6402IVZ-TK Datasheet]SC414MLTRT[中文SC414MLTRT Datasheet]FAN5099MTCX[中文FAN5099MTCX Datasheet]ISL8112IRZ[中文ISL8112IRZ Datasheet]XRP7714ILB-F[中文XRP7714ILB-F Datasheet]TPS51123RGER[中文TPS51123RGER Datasheet]TPS51123RGET[中文TPS51123RGET Datasheet]FAN5069EMTCX[中文FAN5069EMTCX Datasheet]ISL6549CAZA[中文ISL6549CAZA Datasheet]MAX5093BATE+[中文MAX5093BATE+ Datasheet]LX1673-06CPW[中文LX1673-06CPW Datasheet] NCV8855BMNR2G[中文NCV8855BMNR2G Datasheet] SC418ULTRT[中文SC418ULTRT Datasheet]ISL6528CBZ[中文ISL6528CBZ Datasheet]ISL6442IA[中文ISL6442IA Datasheet]ISL6521IBZ[中文ISL6521IBZ Datasheet]FAN5099MX[中文FAN5099MX Datasheet]HIP6021CBZ[中文HIP6021CBZ Datasheet]A4402ELPTR-T[中文A4402ELPTR-T Datasheet]MAX15022ATI+[中文MAX15022ATI+ Datasheet] MAX8896EREE+T[中文MAX8896EREE+T Datasheet] MAX15015BATX+[中文MAX15015BATX+ Datasheet]SIC417CD-T1-E3[中文SIC417CD-T1-E3 Datasheet]LX1673-03CLQ[中文LX1673-03CLQ Datasheet]ISL6529ACR[中文ISL6529ACR Datasheet]MAX5092AATE+[中文MAX5092AATE+ Datasheet] MAX5093AATE+[中文MAX5093AATE+ Datasheet] MAX8667ETEAA+[中文MAX8667ETEAA+ Datasheet] MAX5092BATE+[中文MAX5092BATE+ Datasheet] MAX15016BATX+[中文MAX15016BATX+ Datasheet] MAX15014AATX+[中文MAX15014AATX+ Datasheet] TC1313-ZS0EMF[中文TC1313-ZS0EMF Datasheet] TPS51221RTVT[中文TPS51221RTVT Datasheet]ISL6402AIRZ[中文ISL6402AIRZ Datasheet]ISL6521IBZ-T[中文ISL6521IBZ-T Datasheet]XRP7708ILB-F[中文XRP7708ILB-F Datasheet]TC1313-ZP0EMFTR[中文TC1313-ZP0EMFTR Datasheet] TC1313-ZP0EUN[中文TC1313-ZP0EUN Datasheet]TC1313-ZS0EMFTR[中文TC1313-ZS0EMFTR Datasheet] TC1313-ZS0EUN[中文TC1313-ZS0EUN Datasheet] MAX15017AATX+[中文MAX15017AATX+ Datasheet] SIC414CD-T1-GE3[中文SIC414CD-T1-GE3 Datasheet] IPM6220ACAZ[中文IPM6220ACAZ Datasheet]ISL6549IBZ[中文ISL6549IBZ Datasheet]TPS54120RGYR[中文TPS54120RGYR Datasheet]LX1673-06CLQ[中文LX1673-06CLQ Datasheet]ISL6549CR[中文ISL6549CR Datasheet]NCP1578MNR2G[中文NCP1578MNR2G Datasheet] MAX8667ETEAB+[中文MAX8667ETEAB+ Datasheet] TC1313-ZS0EUNTR[中文TC1313-ZS0EUNTR Datasheet] TC1313-ZP0EUNTR[中文TC1313-ZP0EUNTR Datasheet] TPS51225CRUKR[中文TPS51225CRUKR Datasheet]NCV8851DBR2G[中文NCV8851DBR2G Datasheet]TPS65030YZKR[中文TPS65030YZKR Datasheet]LX1673-09CLQ[中文LX1673-09CLQ Datasheet]MAX15017BATX+[中文MAX15017BATX+ Datasheet]ISL6402IR-T[中文ISL6402IR-T Datasheet]TPS61130PWR[中文TPS61130PWR Datasheet]MAX15014BATX+[中文MAX15014BATX+ Datasheet]TC1303B-AG0EMF[中文TC1303B-AG0EMF Datasheet]TC1303B-1H0EMFTR[中文TC1303B-1H0EMFTR Datasheet] TC1303B-AG0EUNTR[中文TC1303B-AG0EUNTR Datasheet] TC1303B-DG0EMF[中文TC1303B-DG0EMF Datasheet]TC1303B-DG0EMFTR[中文TC1303B-DG0EMFTR Datasheet] TC1303B-PG0EMF[中文TC1303B-PG0EMF Datasheet]TC1303B-PG0EMFTR[中文TC1303B-PG0EMFTR Datasheet] TC1303B-AD0EMF[中文TC1303B-AD0EMF Datasheet]TC1303B-AD0EMFTR[中文TC1303B-AD0EMFTR Datasheet] TC1313-DG0EMF[中文TC1313-DG0EMF Datasheet]TC1303B-1H0EMF[中文TC1303B-1H0EMF Datasheet]TC1313-1H0EMFTR[中文TC1313-1H0EMFTR Datasheet] TC1313-1P0EMFTR[中文TC1313-1P0EMFTR Datasheet] TC1303B-AG0EMFTR[中文TC1303B-AG0EMFTR Datasheet] TC1303B-AG0EUN[中文TC1303B-AG0EUN Datasheet]ISL9440BIRZ[中文ISL9440BIRZ Datasheet]ISL6549IAZ[中文ISL6549IAZ Datasheet]MAX8884ZEREKE+T[中文MAX8884ZEREKE+T Datasheet] TC1313-1P0EUN[中文TC1313-1P0EUN Datasheet]TC1313-1P0EMF[中文TC1313-1P0EMF Datasheet]TC1313-DG0EMFTR[中文TC1313-DG0EMFTR Datasheet] TC1313-1H0EMF[中文TC1313-1H0EMF Datasheet]TC1303B-DF0EMF[中文TC1303B-DF0EMF Datasheet]ISL6549CA[中文ISL6549CA Datasheet]ISL6402IRZ[中文ISL6402IRZ Datasheet]TPS54120RGYT[中文TPS54120RGYT Datasheet]ADP5022ACBZ-4-R7[中文ADP5022ACBZ-4-R7 Datasheet] ADP5022ACBZ-1-R7[中文ADP5022ACBZ-1-R7 Datasheet] TC1303B-DF0EMFTR[中文TC1303B-DF0EMFTR Datasheet] TC1313-1H0EUNTR[中文TC1313-1H0EUNTR Datasheet] TC1313-1P0EUNTR[中文TC1313-1P0EUNTR Datasheet] MAX8667ETEAC+[中文MAX8667ETEAC+ Datasheet] MAX15015AATX+[中文MAX15015AATX+ Datasheet] NCV8851DBG[中文NCV8851DBG Datasheet]LX1673-09CPW[中文LX1673-09CPW Datasheet]TC1303B-PG0EUN[中文TC1303B-PG0EUN Datasheet]TC1303B-PG0EUNTR[中文TC1303B-PG0EUNTR Datasheet] ADP5023ACPZ-R7[中文ADP5023ACPZ-R7 Datasheet] ADP5034ACPZ-1-R7[中文ADP5034ACPZ-1-R7 Datasheet] ISL6402IRZ-TK[中文ISL6402IRZ-TK Datasheet]MAX15016AATX+[中文MAX15016AATX+ Datasheet]RT9259AGS[中文RT9259AGS Datasheet]TPS61131PWR[中文TPS61131PWR Datasheet]ADP5033ACBZ-1-R7[中文ADP5033ACBZ-1-R7 Datasheet] PM6675AS[中文PM6675AS Datasheet]TPS61132PWR[中文TPS61132PWR Datasheet]XRP7714ILB-0X10-F[中文XRP7714ILB-0X10-F Datasheet] RT9206GS[中文RT9206GS Datasheet]TPS51225BRUKR[中文TPS51225BRUKR Datasheet]ADP5022ACBZ-2-R7[中文ADP5022ACBZ-2-R7 Datasheet] HIP6018BCBZ[中文HIP6018BCBZ Datasheet]ADP5040ACPZ-1-R7[中文ADP5040ACPZ-1-R7 Datasheet] TC1313-ZG0EMFTR[中文TC1313-ZG0EMFTR Datasheet] TC1313-ZG0EMF[中文TC1313-ZG0EMF Datasheet]ISL6402IVZ-T[中文ISL6402IVZ-T Datasheet]IPM6220ACAZ-T[中文IPM6220ACAZ-T Datasheet]TPS51225CRUKT[中文TPS51225CRUKT Datasheet]PM6681A[中文PM6681A Datasheet]SC403MLTRT[中文SC403MLTRT Datasheet]SC427MLTRT[中文SC427MLTRT Datasheet]ISL6549IRZ[中文ISL6549IRZ Datasheet]XRP7714ILB-0X14-F[中文XRP7714ILB-0X14-F Datasheet] XRP7714ILB-0X18-F[中文XRP7714ILB-0X18-F Datasheet] XRP7714ILB-0X1C-F[中文XRP7714ILB-0X1C-F Datasheet] LX1673-03CPW[中文LX1673-03CPW Datasheet]ISL6402IRZ-T[中文ISL6402IRZ-T Datasheet]MAX8667ETECQ+[中文MAX8667ETECQ+ Datasheet] MAX8884YEREKE+T[中文MAX8884YEREKE+T Datasheet] PM6675S[中文PM6675S Datasheet]TPS51225RUKT[中文TPS51225RUKT Datasheet]ADP5034ACPZ-2-R7[中文ADP5034ACPZ-2-R7 Datasheet] ISL6402AIRZ-T[中文ISL6402AIRZ-T Datasheet]ISL6402AIR-T[中文ISL6402AIR-T Datasheet]ISL6402IV-T[中文ISL6402IV-T Datasheet]TPS51225BRUKT[中文TPS51225BRUKT Datasheet]TPS51225RUKR[中文TPS51225RUKR Datasheet]ISL6402AIR-TK[中文ISL6402AIR-TK Datasheet]ISL6402IR-TK[中文ISL6402IR-TK Datasheet]ADP5023ACPZ-1-R7[中文ADP5023ACPZ-1-R7 Datasheet] IPM6220ACAZA-T[中文IPM6220ACAZA-T Datasheet]ADP5034ACPZ-R7[中文ADP5034ACPZ-R7 Datasheet]ISL6402IV-TK[中文ISL6402IV-TK Datasheet]ISL8112IRZ-T[中文ISL8112IRZ-T Datasheet]ISL9305IRTBFNCZ-T[中文ISL9305IRTBFNCZ-T Datasheet]RT9218GS[中文RT9218GS Datasheet]ISL9305IRTWCNYZ-T[中文ISL9305IRTWCNYZ-T Datasheet] ISL9305IRTWLNCZ-T[中文ISL9305IRTWLNCZ-T Datasheet] ISL9305IRTHAANLZ-T[中文ISL9305IRTHAANLZ-T Datasheet] ISL9305IRTHWCNLZ-T[中文ISL9305IRTHWCNLZ-T Datasheet]ISL9305IRTHWCNYZ-T[中文ISL9305IRTHWCNYZ-T Datasheet]ISL9305IRTHWLNCZ-T[中文ISL9305IRTHWLNCZ-T Datasheet]ISL9305IRTWBNLZ-T[中文ISL9305IRTWBNLZ-T Datasheet] ISL9305IRTWCLBZ-T[中文ISL9305IRTWCLBZ-T Datasheet]ISL9305IRTWCNLZ-T[中文ISL9305IRTWCNLZ-T Datasheet] ISL9305IRTHBCNLZ-T[中文ISL9305IRTHBCNLZ-T Datasheet] ISL9305IRTHBFNCZ-T[中文ISL9305IRTHBFNCZ-T Datasheet] ISL9305IRTHWBNLZ-T[中文ISL9305IRTHWBNLZ-T Datasheet] ISL9305IRTHWCLBZ-T[中文ISL9305IRTHWCLBZ-T Datasheet] ISL9305IRTAANLZ-T[中文ISL9305IRTAANLZ-T Datasheet]ISL9305IRTBCNLZ-T[中文ISL9305IRTBCNLZ-T Datasheet]ISL9440CIRZ[中文ISL9440CIRZ Datasheet]。
ams 7725d标准
ams 7725d标准一、简介AMS 7725D标准是一种电子元件性能测试标准，用于对电子元件的电气性能进行测试和评估。
该标准由美国电子制造协会（AMEE）制定，旨在提供一个统一的测试方法，以确保电子元件的可靠性和性能。
二、测试范围AMS 7725D标准适用于各种类型的电子元件，包括电阻、电容、电感、晶体管、集成电路等。
测试范围涵盖了电子元件的电气性能、温度特性、老化性能等多个方面。
该标准旨在为制造商和用户提供了一个可靠的参考标准，以确保电子元件的质量和性能。
三、测试方法AMS 7725D标准规定了多种测试方法，包括直流测试、交流测试、瞬态响应测试、温度循环测试等。
测试方法根据电子元件的类型和规格进行分类，并为每种类型和规格提供了详细的测试步骤和要求。
四、测试结果评估AMS 7725D标准对测试结果进行了详细的评估，包括电气性能指标、温度特性指标、老化性能指标等。
评估方法包括定量分析和定性分析，以确保电子元件的性能符合标准要求。
对于不符合标准的电子元件，标准还规定了相应的处理措施，如退货、返工或报废等。
五、应用领域AMS 7725D标准广泛应用于电子制造、汽车工业、航空航天等领域。
在电子制造领域，该标准是生产线上电子元件性能测试的重要依据，确保了产品的质量和性能。
在汽车工业和航空航天领域，该标准用于确保关键电子元件的可靠性和性能，保障安全和可靠性。
六、总结AMS 7725D标准是一个重要的电子元件性能测试标准，为电子元件的电气性能提供了可靠的评估方法和处理措施。
该标准适用于各种类型的电子元件，涵盖了电气性能、温度特性和老化性能等多个方面。
在电子制造、汽车工业和航空航天等领域得到了广泛应用。
AD7721ARZ-REEL;AD7721ARZ;AD7721AR;中文规格书,Datasheet资料
AD7721
12-BIT A/D CONVERTER ⌺-⌬ MODULATOR FIR FILTER REFIN
STBY/DB0 CAL/DB1 UNI/DB2
GENERAL DESCRIPTION
The AD7721 is a complete low power, 12-/16-bit, sigma-delta ADC. The part operates from a +5 V supply and accepts a differential input of 0 V to 2.5 V or ± 1.25 V. The analog input is continuously sampled by an analog modulator at twice the clock frequency eliminating the need for external sample-andhold circuitry. The modulator output is processed by two finite impulse response (FIR) digital filters in series. The on-chip filtering reduces the external antialias requirements to first order in most cases. Settling time for a step input is 97.07 µs while the group delay for the filter is 48.53 µs when the master clock equals 15 MHz. The AD7721 can be operated with input bandwidths up to 229.2 kHz. The corresponding output word rate is 468.75 kHz. The part can be operated with lower clock frequencies also. The sample rate, filter corner frequency and output word rate will be reduced also, as these are proportional to the external clock frequency. The maximum clock frequencies in parallel mode and serial mode are 10 MHz and 15 MHz respectively.
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MC-7725
30万像素JPEG串口摄像头模块
●全天候工作
●嵌入式成像应用的低成本，
低功耗串口相机
●串口通讯协议可设置，或用
户定制
●UART：2400 -115200bps的
传输JPEG静止图片
●支持640*480，320* 240，
160 *120的图像分辨率
●压缩比可以由用户设置
●不需要外部DRAM
●自动红外，自动白平衡，自
动增益控制
简介
MC-7725是内置图像传感器，JPEG压缩的串口摄像头模块，可以连接到计算机和任何其他的嵌入式设备作为一台摄像机或一个JPEG压缩相机成像应用。
它采用 Omni Vision CMOS OV7725传感器（OV7725也使用iPhone相机，它是比别人更好）与JPEG 压缩芯片，该芯片提供了一种低成本和低功率摄像系统。
其板上的串行接口，适用于直接连接到任何主机微控制器的UART。
用户通过串行命令获取JPEG图片，方便用户集成使用。
镜头选择
2.5毫米，2.8毫米，
3.6毫米，6毫米，12毫米的红外镜头或彩色镜片。
应用
∙通用嵌入式成像和控制
∙安全系统
∙访问控制系统
∙机器人视觉，目标检测与识别
∙工业控制系统
∙汽车系统
∙医疗系统等
尺寸图
引脚图
规格
外形
尺寸：38 x 38 mm
重量：100 g
分辨率
压缩算法：JPEG
分辨率：640x480，320x240，160x120
串口界面
RS232、RS485、TTL
串口参数
校验位：None, Even, Odd, Space, Mark
数据位：7, 8
停止位：1, 2
波特率：1,200 bps ~ 115,200 Kbps (支持非标准波特率)工作环境
工作温度：-40~85°C, 5~95%RH湿度
存储温度：-65~150°C, 5~95%RH湿度
电源需求
电源输入：5 VDC, ±5%
电源功耗：70 mA@5 VDC max.
可靠性
自动重新启动定时器：内建WDT。