TC74VHCT244AFT(EL),TC74VHCT244AFW,TC74VHCT240AFT(EL),TC74VHCT240AFW, 规格书,Datasheet 资料

TOSHIBA CMOS Digital Integrated Circuit Silicon MonolithicTC74VHCT240AF,TC74VHCT240AFT,TC74VHCT240AFK TC74VHCT244AF,TC74VHCT244AFT,TC74VHCT244AFKOctal Bus BufferTC74VHCT240AF/AFT/AFK Inverted, 3-State Outputs TC74VHCT244AF/AFT/AFK Non-Inverted, 3-State OutputsThe TC74VHCT240A and 244A are advanced high speed CMOS OCTAL BUS BUFFERs fabricated with silicon gate C 2MOS technology. They achieve the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.The TC74VHCT240A is an inverting 3-state buffer having two active-low output enables. The TC74VHCT244A is anon-inverting 3-state buffer, and has two active-low output enables.These devices are designed to be used with 3-state memory address drivers, etc.The input voltage are compatible with TTL output voltage. These devices may be used as a level converter for interfacing 3.3 V to 5 V system.Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and input/output voltages such as battery back up, hot board insertion, etc.Note: Output in off-stateFeatures• High speed: t pd = 6.1 ns (typ.) at V CC = 5 V• Low power dissipation: I CC = 4 μA (max) at Ta = 25°C • Compatible with TTL inputs: V IL = 0.8 V (max)V IH = 2.0 V (min)• Power down protection is provided on all inputs and outputs• Balanced propagation delays: t pLH∼ − t pHL• Low noise: V OLP = 1.0 V (max)• Pin and function compatible with the 74 series(74AC/HC/F/ALS/LS etc.) 240/244 type.TC74VHCT240AF, TC74VHCT244AFTC74VHCT240AFT, TC74VHCT244AFTTC74VHCT240AFK, TC74VHCT244AFKWeightSOP20-P-300-1.27A: 0.22 g (typ.) TSSOP20-P-0044-0.65A: 0.08 g (typ.) VSSOP20-P-0030-0.50: 0.03 g (typ.)Pin AssignmentIEC Logic SymbolTruth TableX: Don’t care Z: High impedance Yn: TC74VHCT244A n Y : TC74VHCT240AV CC162A42Y 12A315 14 13 12 11201A3 2Y 2 1A4 1Y 21A13Y 11Y 119 2A2G 21A2 3Y 218 4Y 2 GND 2A1174Y 1(top view)G 1V CC 16 2A415 14 13 12 1120 12345672Y21A41Y381Y119 2A2G 21A218 92Y4GND 102A117 1Y4(top view)1Y22A32Y11A32Y31A1G 1(1) (2) (6) (4) 1A21A41A3(8)(18) (14) 2Y 14Y 1(16) (12)3Y 1ENG 11Y 11A1TC74VHCT240A(19) (11) (15) (13) 2A22A42A3(17)(9) (5) 2Y 24Y 2(7) (3)3Y 2ENG 21Y 22A1(1)(2)(6)(4)1A21A41A3(8)(18) (14) 1Y21Y4(16) (12)1Y3ENG 11Y11A1TC74VHCT244A (19)(11)(15)(13)2A22A42A3(17)(9) (5) 2Y22Y4(7) (3)2Y3ENG 22Y12A1Absolute Maximum Ratings (Note 1)Characteristics SymbolRatingUnit Supply voltage range V CC −0.5 to 7.0 V DC input voltage V IN −0.5 to 7.0 V−0.5 to 7.0 (Note 2)DC output voltage V OUT −0.5 to V CC + 0.5(Note 3)VInput diode current I IK −20 mA Output diode current I OK ±20 (Note 4)mADC output current I OUT ±25 mA DC V CC /ground current I CC±75 mAPower dissipation P D 180 mW Storage temperatureT stg−65 to 150°CNote 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance oreven destruction.Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges.Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: Output in off-stateNote 3: High or low state. I OUT absolute maximum rating must be observed. Note 4: V OUT < GND, V OUT > V CCOperating Ranges (Note 1)Characteristics SymbolRating Unit Supply voltage V CC 4.5 to 5.5 V Input voltage V IN 0 to 5.5 V0 to 5.5(Note 2)Output voltage V OUT 0 to V CC (Note3)VOperating temperature T opr −40 to 85°C Input rise and fall timedt/dV0 to 20ns/VNote 1: The operating ranges must be maintained to ensure the normal operation of the device.Unused inputs must be tied to either V CC or GND. Note 2: Output in off-state Note 3: High or low stateElectrical CharacteristicsDC CharacteristicsTest ConditionTa = 25°CTa = −40 to 85°CCharacteristics SymbolV CC (V)Min Typ.Max Min MaxUnitHigh-level input voltage V IH ⎯ 4.5 to 5.5 2.0⎯⎯ 2.0 ⎯ VLow-level input voltageV IL ⎯4.5 to5.5⎯⎯ 0.8 ⎯ 0.8 VI OH = −50 μA 4.5 4.40 4.50⎯ 4.40 ⎯ High-level output voltageV OHV IN= V IH or V IL I OH = −8 mA4.53.94⎯⎯ 3.80 ⎯VI OL = 50 μA 4.5 ⎯ 0.0 0.10 ⎯ 0.10Low-level output voltage V OLV IN= V IH or V ILI OL = 8 mA4.5 ⎯ ⎯ 0.36 ⎯ 0.44V3-state output off-state current I OZ V IN = V IH or V IL V OUT = V CC or GND 5.5⎯⎯±0.25⎯±2.50μAInput leakage currentI IN V IN = 5.5 V or GND 0 to 5.5⎯ ⎯ ±0.1 ⎯ ±1.0μA I CC V IN = V CC or GND 5.5 ⎯ ⎯ 4.0 ⎯ 40.0μAQuiescent supply current I CCT Per input: V IN = 3.4 V Other input: V CC or GND 5.5 ⎯ ⎯ 1.35 ⎯ 1.50mAOutput leakage currentI OPDV OUT = 5.5 V⎯⎯ 0.5 ⎯ 5.0 μAAC Characteristics (input: t r = t f = 3 ns)Test ConditionTa = 25°CTa =−40 to 85°CCharacteristics SymbolV CC (V)C L (pF)Min Typ.Max Min MaxUnit15⎯ 5.6 7.8 1.0 9.0Propagation delay time(TC74VHCT240A) t pLH t pHL ⎯ 5.0 ± 0.550 ⎯ 6.1 8.8 1.0 10.0ns15⎯ 5.4 7.4 1.0 8.5Propagation delay time(TC74VHCT244A) t pLH t pHL ⎯ 5.0 ± 0.550⎯ 5.9 8.4 1.0 9.5 ns15 ⎯ 7.7 10.4 1.0 12.03-state output enable timet pZL t pZH R L = 1 k Ω 5.0 ± 0.550⎯ 8.2 11.4 1.0 13.0ns3-state output disable timet pLZ t pHZ R L = 1 k Ω 5.0 ± 0.550⎯ 8.8 11.4 1.0 13.0nsOutput to output skew t osLH t osHL (Note 1) 5.0 ± 0.550 ⎯ ⎯ 1.0 ⎯ 1.0 nsInput capacitance C IN ⎯ ⎯ 4 10 ⎯ 10 pF Output capacitance C OUT ⎯⎯ 9 ⎯ ⎯ ⎯ pF TC74VHCT240A ⎯19 ⎯⎯ ⎯ Power dissipation capacitance (Note 2)C PDTC74VHCT244A⎯ 18 ⎯⎯⎯pFNote 1: Parameter guaranteed by design. t osLH = |t pLHm − t pLHn |, t osHL = |t pHLm − t pHLn |Note 2: C PD is defined as the value of the internal equivalent capacitance which is calculated from the operatingcurrent consumption without load. Average operating current can be obtained by the equation:I CC (opr) = C PD ·V CC ·f IN + I CC /8 (per bit)Noise Characteristics (input: t r = t f = 3 ns)Test ConditionTa = 25°CCharacteristics SymbolV CC (V) Typ. Limit Unit Quiet output maximum dynamic V OL V OLP C L = 50 pF 5.0 0.81.0V Quiet output minimum dynamic V OL V OLV C L = 50 pF 5.0 −0.8 −1.0VMinimum high level dynamic input voltageV IHD C L = 50 pF 5.0 ⎯2.0 VMaximum low level dynamic input voltageV ILDC L = 50 pF5.0⎯ 0.8 VWeight: 0.22 g (typ.)Weight: 0.08 g (typ.)Weight: 0.03 g (typ.)RESTRICTIONS ON PRODUCT USE•Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively “Product”) without notice.•This document and any information herein may not be reproduced without prior written permission from TOSHIBA. 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