MAX4420ESA-T中文资料

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MAX4460中文资料

MAX4460中文资料

General DescriptionThe MAX4460/MAX4461/MAX4462 are instrumentation amplifiers with precision specifications, low-power con-sumption, and excellent gain-bandwidth product.Proprietary design techniques allow ground-sensing capability combined with ultra-low input current and increased common-mode rejection performance. These Rail-to-Rail ®output instrumentation amplifiers are offered in fixed or adjustable gains and the option for either a shutdown mode or a pin to set the output voltage relative to an external reference (see Ordering Information and Selector Guide ).The MAX4460 has an adjustable gain and uses ground as its reference voltage. The MAX4461 is offered in fixed gains of 1, 10, and 100, uses ground as its reference volt-age, and has a logic-controlled shutdown input. The MAX4462 is offered in fixed gains of 1, 10, and 100 and has a reference input pin (REF). REF sets the output volt-age for zero differential input to allow bipolar signals in single-supply applications.The MAX4460/MAX4461/MAX4462 have high-impedance inputs optimized for small-signal differential voltages. The MAX4461/MAX4462 are factory trimmed to gains of 1, 10,or 100 (suffixed U, T, and H) with ±0.1% accuracy. The typical offset of the MAX4460/MAX4461/MAX4462 is 100µV. All devices have a gain-bandwidth product of 2.5MHz.These amplifiers operate with a single-supply voltage from 2.85V to 5.25V and with a quiescent current of only 700µA (less than 1µA in shutdown for the MAX4461). The MAX4462 can also be operated with dual supplies.Smaller than most competitors, the MAX4460/MAX4461/MAX4462 are available in space-saving 6-pin SOT23 packages.________________________ApplicationsIndustrial Process Control Strain-Gauge Amplifiers Transducer InterfacePrecision Low-Side Current Sense Low-Noise Microphone Preamplifier Differential Voltage Amplification Battery-Powered Medical EquipmentFeatureso Tiny 6-Pin SOT23 Package o Input Negative Rail Sensing o 1pA (typ) Input Bias Current o 100µV Input Offset Voltage o Rail-to-Rail Outputo 2.85V to 5.25V Single Supply o 700µA Supply Current o ±0.1% Gain Erroro 2.5MHz Gain-Bandwidth Product o 18nV/√Hz Input-Referred NoiseMAX4460/MAX4461/MAX4462SOT23, 3V/5V , Single-Supply, Rail-to-RailInstrumentation Amplifiers________________________________________________________________Maxim Integrated Products119-2279; Rev 2; 11/02For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at .Ordering InformationRail-to-Rail is a registered trademark of Nippon Motorola, Ltd.Pin Configurations appear at end of data sheet.Typical Application CircuitsSelector Guide appears at end of data sheet.M A X 4460/M A X 4461/M A X 4462SOT23, 3V/5V , Single-Supply, Rail-to-Rail Instrumentation Amplifiers 2_______________________________________________________________________________________ABSOLUTE MAXIMUM RATINGSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.Supply Voltage (V DD to V SS ) ...................................-0.3V to +6V All Other Pins...................................(V SS - 0.3V) to (V DD + 0.3V)Output Short-Circuit Duration to Either Supply.........................1s Continuous Power Dissipation (T A = +70°C)6-Pin SOT23 (derate 8.7mW/°C above +70°C)............695mW 8-Pin SO (derate 5.9mW/°C above +70°C)..................470mWOperating Temperature Range ...........................-40°C to +85°C Junction Temperature......................................................+150°C Storage Temperature Range.............................-65°C to +150°C Lead Temperature (soldering, 10s)....................................300°CELECTRICAL CHARACTERISTICS—MAX4460/MAX4461(V DD = 5V, V CM = 0V, V DIFF = V IN+- V IN-= 50mV to 100mV for G = 1, 20mV to 100mV for G = 10, 2mV to 48mV for G =100,MAX4460 is configured for G = 10, R L = 200k Ωto GND, T A = +25°C , unless otherwise noted.)MAX4460/MAX4461/MAX4462SOT23, 3V/5V , Single-Supply, Rail-to-RailInstrumentation AmplifiersELECTRICAL CHARACTERISTICS —MAX4460/MAX4461 (continued)ELECTRICAL CHARACTERISTICS —MAX4460/MAX4461M A X 4460/M A X 4461/M A X 4462SOT23, 3V/5V , Single-Supply, Rail-to-Rail Instrumentation Amplifiers 4_______________________________________________________________________________________ELECTRICAL CHARACTERISTICS —MAX4460/MAX4461 (continued)(V DD = 5V, V CM = 0V, V DIFF = V IN+- V IN-= 50mV to 100mV for G = 1, 20mV to 100mV for G = 10, 2mV to 48mV for G = 100,MAX4460 is configured for G = 10, R L = 200k Ωto GND, T A = T MIN to T MAX , unless otherwise noted.)MAX4460/MAX4461/MAX4462SOT23, 3V/5V , Single-Supply, Rail-to-RailInstrumentation Amplifiers_______________________________________________________________________________________5ELECTRICAL CHARACTERISTICS —MAX4462(V DD = 5V, V SS = 0V, V CM = V REF = V DD /2, R L = 100k Ωto V DD /2, T A = +25°C , unless otherwise noted. V DIFF = V IN+- V IN-= -100mVM A X 4460/M A X 4461/M A X 4462SOT23, 3V/5V , Single-Supply, Rail-to-Rail Instrumentation Amplifiers 6_______________________________________________________________________________________ELECTRICAL CHARACTERISTICS —MAX4462 (continued)ELECTRICAL CHARACTERISTICS —MAX4462MAX4460/MAX4461/MAX4462SOT23, 3V/5V , Single-Supply, Rail-to-RailInstrumentation Amplifiers_______________________________________________________________________________________7ELECTRICAL CHARACTERISTICS —MAX4462 (continued)Specifications section).Note 2:Guaranteed by design, not production tested.Note 3:Output swing high is measured only on G = 100 devices. Devices with G = 1 and G = 10 have output swing high limited bythe range of V REF , V CM , and V DIFF (see Output Swing section).Note 4:Short-circuit duration limited to 1s (see Absolute Maximum Ratings).Note 5:SOT23 units are 100% production tested at +25°C. Limits over temperature are guaranteed by design.M A X 4460/M A X 4461/M A X 4462SOT23, 3V/5V , Single-Supply, Rail-to-Rail Instrumentation Amplifiers 8_______________________________________________________________________________________Typical Operating Characteristics(V DD = 5V, V SS = 0V, V IN + = V IN-= V REF = V DD /2, R L = 100k Ωto V DD /2, T A = +25°C, unless otherwise noted. V DIFF = V IN+- V IN-= -100mV to +100mV for G = 1 and G = 10, -20mV to +20mV for G = 100.)10,00010001001010.11001101k10k100kINPUT VOLTAGE NOISE vs. FREQUENCYM A X 4460 t o c 07FREQUENCY (Hz)I N P U T V O L T A G E N O I S E (n V /H z )PEAK-TO-PEAK NOISE (0.1Hz TO 10Hz)1s/div2µV/divINPUT REFERRED G = 1, 10, OR 1000.0100.0050.0150.0200.0250.0300.0350.0400.045101001k 10k100kTOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCYFREQUENCY (Hz)T H D + N (%)042108612141618-300-200-150-250-100-5050100150200250300VOLTAGE OFFSET HISTOGRAMVOLTAGE OFFSET (µV)P E R C E N T A G E O F U N I T S42612141081600.020.030.040.050.010.060.070.080.090.10GAIN-LINEARITY HISTOGRAMLINEARITY (%)P E R C E N T A G E O F U N I T S426121410816-5-3-2-10-412345VOLTAGE OFFSET DRIFT HISTOGRAMVOLTAGE OFFSET DRIFT (µV/°C)P E R C E N T A G E O F U N I T S42861012-0.50GAIN ERROR HISTOGRAMGAIN ERROR (%)P E R C E N T A G E O F U N I TS-0.4-0.2-0.10.10.20.30.40.5-0.3-130-120-90-100-110-80-70-60-50-40-30-200.11011001k10kCOMMON-MODE REJECTION RATIOvs. FREQUENCYFREQUENCY (Hz)C M R R (d B )POWER-SUPPLY REJECTION RATIOVS. FREQUENCYFREQUENCY (Hz)0.01101001k 0.1110kP S R R (d B )-120-100-80-60-20-40MAX4460/MAX4461/MAX4462SOT23, 3V/5V , Single-Supply, Rail-to-RailInstrumentation Amplifiers_______________________________________________________________________________________930065040080075070090095085010002.75 3.503.753.003.25 4.004.254.504.755.00SUPPLY CURRENTVS. SUPPLY VOLTAGESUPPLY VOLTAGE (V)S U P P L Y C U R R E N T (µA )60055050045035004286121014SHUTDOWN CURRENT VS. SUPPLY VOLTAGESUPPLY VOLTAGE (V)S U P P L Y C U R R E N T (n A )2.753.503.753.003.254.004.254.504.755.0000.040.020.080.060.120.100.140.180.160.200.20.30.40.10.50.60.70.90.8 1.0MAX4462HNORMALIZED OUTPUT ERROR vs. COMMON-MODE VOLTAGEV CM (V)N O R M A L I Z E D O U T P U T E R R O R (%)-0.30-0.16-0.18-0.20-0.22-0.24-0.26-0.28-0.12-0.14-0.08-0.10-0.06-0.02-0.040-2.7-2.1-1.8-2.4-1.5-1.2-0.9-0.60-0.3MAX4462HNORMALIZED OUTPUT ERROR vs. COMMON-MODE VOLTAGEV CM (V)N O R M A L I Z E D O U T P U T E R R O R (%)040208060120100140180160200023415679810OUTPUT SWING HIGHVS. OUTPUT CURRENTOUTPUT CURRENT (mA)V D D - V O U T (m V )10050200150300250350450400500023*********OUTPUT SWING LOW vs. OUTPUT CURRENTOUTPUT CURRENT (mA)V O U T - V S S (m V )Typical Operating Characteristics (continued)(V DD = 5V, V SS = 0V, V IN + = V IN-= V REF = V DD /2, R L = 100k Ωto V DD /2, T A = +25°C, unless otherwise noted. V DIFF = V IN+- V IN-= -100mV to +100mV for G = 1 and G = 10, -20mV to +20mV for G = 100.)-1010030204050GAIN vs. FREQUENCYFREQUENCY (Hz)G A I N (d B)0.011100.11001k10k 222325242627-4010-15356085GAIN BANDWIDTH vs. TEMPERATURETEMPERATURE (°C)-3d B B A N D W I D T H (k H z )SETTLING TIME (GAIN = 100)MAX4460 toc1840µs/divINPUT 10mV/divOUTPUT 500mV/divOUTPUT 10mV/divM A X 4460/M A X 4461/M A X 4462SOT23, 3V/5V , Single-Supply, Rail-to-Rail Instrumentation Amplifiers 10______________________________________________________________________________________Typical Operating Characteristics (continued)(V DD = 5V, V SS = 0V, V IN + = V IN-= V REF = V DD /2, R L = 100k Ωto V DD /2, T A = +25°C, unless otherwise noted. V DIFF = V IN+- V IN-= -100mV to +100mV for G = 1 and G = 10, -20mV to +20mV for G = 100.)LARGE-SIGNAL PULSE RESPONSE(GAIN = 1V/V)MAX4460 toc19INPUTOUTPUT50mV/div1µs/div LARGE-SIGNAL PULSE RESPONSE(GAIN = 100V/V)MAX4460 toc20INPUT 10mV/divOUTPUT 1V/div20µs/divSMALL-SIGNAL PULSE RESPONSE(GAIN = 1V/V)MAX4460 toc21INPUTOUTPUT10mV/div1µs/divSMALL-SIGNAL PULSE RESPONSE(GAIN = 1V/V)1µs/divINPUT 10mV/divOUTPUTC L = 100pFSMALL-SIGNAL PULSE RESPONSE(GAIN = 100V/V)MAX4460 toc23INPUT 1mV/div OUTPUT 100mV/div20µs/divSMALL-SIGNAL PULSE RESPONSE(GAIN = 100V/V)X 4460 t o c 2420µs/divINPUT 1mV/divOUTPUT 100mV/divGAIN = +100V/V C L = 100pFC L = 100pFMAX4460/MAX4461/MAX4462SOT23, 3V/5V , Single-Supply, Rail-to-RailInstrumentation Amplifiers______________________________________________________________________________________11Pin DescriptionsM A X 4460/M A X 4461/M A X 4462SOT23, 3V/5V , Single-Supply, Rail-to-Rail Instrumentation Amplifiers 12______________________________________________________________________________________Detailed DescriptionThe MAX4460/MAX4461/MAX4462 family of instrumen-tation amplifiers implements Maxim ’s proprietary indi-rect current-feedback design to achieve a precision specification and excellent gain-bandwidth product.These new techniques allow ground-sensing capability combined with an ultra-low input current and an increased common-mode rejection.The differential input signal is converted to a current by an input transconductance stage. An output transcon-ductance stage converts a portion of the output voltage (equal to the output voltage divided by the gain) into another precision current. These two currents are sub-tracted and the result is fed to a loop amplifier with a class AB output stage with sufficient gain to minimize errors (Figure 1).The MAX4461U/T/H and MAX4462U/T/H have factory-trimmed gains of 1, 10, and 100, respectively. The MAX4460 has an adjustable gain, set with an external pair of resistors between pins OUT, FB, and GND (Figure 2).The MAX4462U/T/H has a reference input (REF) which is connected to an external reference for bipolar opera-tion of the device. The range for V REF is 0.1V to (V DD -1.7V). For full output-swing capability, optimal perfor-mance is usually obtained with V REF = V DD /2.The MAX4460/MAX4461/MAX4462 operate with single-supply voltages of 2.85V to 5.25V. It is possible to use the MAX4462U/T/H in a dual-supply configuration with up to ±2.6V at V DD and V SS , with REF connected to ground.The MAX4461U/T/H has a shutdown feature to reduce the supply current to less than 1µA. The MAX4461U/T/H output is internally referenced to ground, making the part suitable for unipolar operations.The MAX4460 has an FB pin that can be used to exter-nally set the gain through a pair of resistors (see Setting the Gain (MAX4460) section). The MAX4460 output is internally referenced to ground, making the part suitable for unipolar operations.Figure 1. Functional DiagramsFigure 2. MAX4460 External Resistor ConfigurationFunctional DiagramsMAX4460/MAX4461/MAX4462SOT23, 3V/5V , Single-Supply, Rail-to-RailInstrumentation Amplifiers______________________________________________________________________________________13Input Common-Mode and OutputReference RangesMAX4460/MAX4461/MAX4462 have an input common-mode range of 100mV below the negative supply to 1.7V below the positive supply.The output reference voltage of MAX4462U/T/H is set by REF and ranges from 100mV above the negative supply to 1.7V below the positive supply. For maximum voltage swing in a bipolar operation, connect REF to V DD /2. The output voltages of the MAX4460 and MAX4461U/T/H are referenced to ground. Unlike the traditional three-op-amp configuration of common instrumentation amplifiers, the MAX4460/MAX4461/MAX4462 have ground-sensing capability (or to V SS in dual-supply configuration) in addition to the extremely high input impedances of MOS input differential pairs.Input Differential Signal RangeThe MAX4460/MAX4461/MAX4462 feature a proprietary input structure optimized for small differential signals.The unipolar output of the MAX4460/MAX4461 is nomi-nally zero-for-zero differential input. However, these devices are specified for inputs of 50mV to 100mV for the unity-gain devices, 20mV to 100mV for gain of 10devices, and 2mV to 48mV for gain of 100 devices. The MAX4460/MAX4461 can be used with differential inputs approaching zero, albeit with reduced accuracy.The bipolar output of the MAX4462 allows bipolar input ranges. The output voltage is equal to the reference voltage for zero differential input. The MAX4462 is specified for inputs of ±100mV for the unity gain and gain of 10 devices, and ±20mV for gain of 100 devices.The gain of 100 devices (MAX4462H) can be operated beyond 20mV signal provided the reference is chosen for unsymmetrical swing.Output SwingThe MAX4460/MAX4461/MAX4462 are designed to have rail-to-rail output voltage swings. However,depending on the selected gain and supply voltage (and output reference level of the MAX4462), the rail-to-rail output swing is not required.For example, consider the MAX4461U, a unity-gain device with its ground pin as the output reference level.The input voltage range is 0 to 100mV (50mV minimum to meet accuracy specifications). Because the device is unity gain and the output reference level is ground,the output only sees excursions from ground to 100mV.Devices with higher gain and with bipolar output such as the MAX4462, can be configured to swing to higherlevels. In these cases, as the output approaches either supply, accuracy may degrade, especially under heavy output loading.Shutdown ModeThe MAX4461U/T/H features a low-power shutdown mode. When the SHDN pin is pulled low, the internal transconductance and amplifier blocks are switched off and supply current drops to typically less than 0.1µA (Figure 1).I n shutdown, the amplifier output is high impedance.The output transistors are turned off, but the feedback resistor network remains connected. If the external load is referenced to GND, the output drops to approximate-ly GND in shutdown. The output impedance in shut-down is typically greater than 100k Ω. Drive SHDN high or connect to V CC for normal operation.A User Guide to Instrumentation Amplifier Accuracy SpecificationsAs with any other electronic component, a complete understanding of instrumentation amplifier specifica-tions is essential to successfully employ these devices in their application circuits. Most of the specifications for these differential closed-loop gain blocks are similar to the well-known specifications of operational ampli-fiers. However, there are a few accuracy specifications that could be confusing to first-time users. Therefore,some explanations and examples may be helpful.Accuracy specifications are measurements of close-ness of an actual output response to its ideal expected value. There are three main specifications in this category:G Gain errorG Gain nonlinearity errorGOffset errorIn order to understand these terms, we must look at the transfer function of an ideal instrumentation amplifier. As expected, this must be a straight line passing through origin with a slope equal to the ideal gain (Figure 3). I f the ideal gain is equal to 10 and the extreme applied input voltages are -100mV and +100mV, then the value of the output voltages are -1V and +1V, respectively.Note that the line passes through the origin and therefore a zero input voltage gives a zero output response.The transfer function of a real instrumentation amplifier is quite different from the ideal line pictured in Figure 3.Rather, it is a curve such as the one indicated as the typical curve in Figure 4, connecting end points A and B.M A X 4460/M A X 4461/M A X 4462SOT23, 3V/5V , Single-Supply, Rail-to-Rail Instrumentation Amplifiers 14______________________________________________________________________________________Looking at this curve, one can immediately identify three types of errors.First, there is an obvious nonlinearity (curvature) when this transfer function is compared to a straight line.More deviation is measured as greater nonlinearity error. This is explained in more detail below.Second, even if there was no nonlinearity error, i.e., the actual curve in Figure 4 was a straight line connecting end points A and B, there exists an obvious slope devi-ation from that of an ideal gain slope (drawn as the “ideal ” line in Figure 4). This rotational error (delta slope) is a measure of how different the actual gain (G A ) is from the expected ideal gain (G I)and is called gain error (GE) (see the equation below).Third, even if the actual curve between points A and B was a straight line (no nonlinearity error) and had the same slope as the ideal gain line (no gain error), there is still another error called the end-point offset error (OE on vertical axis), since the line is not passing through the origin.Figure 5 is the same as Figure 4, but the ideal line (CD)is shifted up to pass through point E (the Y intercept of end-points line AB).This is done to better visualize the rotational error (GE),which is the difference between the slopes of end points line AB and the shifted ideal line CD. Mathematically:GE (%) = 100 x (G A - G I ) / G IFigure 5. Typical Transfer Function for a Real Instrumentation Amplifier (Ideal Line (CD) Is Shifted by the End-Points Offset (OE) to Visualize Gain Error)MAX4460/MAX4461/MAX4462SOT23, 3V/5V , Single-Supply, Rail-to-RailInstrumentation Amplifiers______________________________________________________________________________________15The rotational nature of gain error, and the fact that it is pivoted around point E in Figure 5, shows that gain-error contribution to the total output voltage error is directly proportional to the input voltage. At zero input voltage, the error contribution of gain error is zero, i.e.,the total deviation from the origin (the expected zero output value) is only due to end-points OE and nonlin-earity error at zero value of input (segment EZ on the vertical axis).The nonlinearity is the maximum deviation from a straight line, and the end-point nonlinearity is the devia-tion from the end-point line. As shown in Figure 5, it is likely that two nonlinearities are encountered, one posi-tive and the other a negative nonlinearity error, shown as NL+ and NL- in Figure 5.Generally, NL+ and NL- have different values and this remains the case if the device is calibrated (trimmed)for end-points errors (which means changing the gain of the instrumentation amplifier in such a way that the slope of line AB becomes equal to that of CD, and the offset becomes trimmed such that OE vanishes to zero). This is an undesirable situation when nonlinearity is of prime interest.The straight line shown in Figure 6 is in parallel to end-points line AB and has a Y intercept of OS on the verti-cal axis. This line is a shifted end-points line such that the positive and negative nonlinearity errors with respect to this line are equal. For this reason, the line is called the best straight line (BSL). Maxim internally trims the MAX4460/MAX4461/MAX4462 with respect to this line (changing the gain slope to be as close as possible to the slope of the ideal line and trimming the offset such that OS gets as close to the origin as possi-ble) to minimize all the errors. The total accuracy error is still the summation of the gain error, nonlinearity, and offset errors.As an example, assume the following specification for an instrumentation amplifier:Gain = 10GE = 0.15%Offset (BSL) = 250µV NL = 0.05%V DIF (input) = -100mV to +100mVWhat is the maximum total error associated with the GE, offset (BSL), and NL? With a differential input range of -0.1V to +0.1V and a gain of 10, the output voltage assumes a range of -1V to +1V, i.e., a total full-scale range of 2V.The individual errors are as follows:GE = (0.15%) (10) (100mV) = 1.5mV Offset (BSL) = (250µV) (10) = 2.5mVNL = (0.05%) (2V) = 1mVMaximum Total Error = 1.5mV + 2.5mV + 1mV= 5mVSo, the absolute value of the output voltage, consider-ing the above errors, would be at worst case between 0.995V to 1.005V. Note that other important parameters such as PSRR, CMRR, and noise also contribute to the total error in instrumentation applications. They are not considered here.Figure 6. To Minimize Nonlinearity Error, the MAX4460/MAX4461/MAX4462 are Internally Trimmed to Adjust Gain and Offset for the Best Straight Line so NL- = NL+M A X 4460/M A X 4461/M A X 4462SOT23, 3V/5V , Single-Supply, Rail-to-Rail Instrumentation Amplifiers 16______________________________________________________________________________________Applications InformationSetting the Gain (MAX4460)The MAX4460 gain is set by connecting a resistive-divider from OUT to GND, with the center tap connect-ed to FB (Figure 2). The gain is calculated by:Gain = 1 + R2 / R1Because FB has less than 100pA IB, high-valued resis-tors can be used without significantly affecting the gain accuracy. The sum of resistors (R1 + R2) near 100k Ωis a good compromise. Resistor accuracy directly affects gain accuracy. Resistor sum less than 20k Ωshould not be used because their loading can slightly affect output accuracy.Capacitive-Load StabilityThe MAX4460/MAX4461/MAX4462 are capable of dri-ving capacitive loads up to 100pF.Applications needing higher capacitive drive capability may use an isolation resistor between OUT and the load to reduce ringing on the output signal. However this reduces the gain accuracy due to the voltage drop across the isolation resistor.Output LoadingFor best performance, the output loading should be to the potential seen at REF for the MAX4462 or to ground for the MAX4460/MAX4461.REF Input (MAX4462)The REF input of the MAX4462 can be connected to any voltage from (V SS + 0.1V) to (V DD - 1.7V). A buffered voltage-divider with sink and source capability works well to center the output swing at V DD /2. Unbuffered resistive dividers should be avoided because the 100k Ω(typ) input impedance of REF causes amplitude-depen-dent variations in the divider ’s output.Bandgap references, either series or shunt, can be used to drive REF. This provides a voltage and temper-ature invariant reference. This same reference voltage can be used to bias bridge sensors to eliminate supply voltage ratiometricity. For proper operation, the refer-ence must be able to sink and source at least 25µA.I n many applications, the MAX4462 is connected to a CODEC or other device with a reference voltage out-put. In this case, the receiving device ’s reference out-put makes an ideal reference voltage. Verify the reference output of the device is capable of driving the MAX4462’s REF input.Power-Supply Bypass and LayoutGood layout technique optimizes performance by decreasing the amount of stray capacitance at the instrumentation amplifier ’s gain-setting pins. Excess capacitance produces peaking in the amplifier ’s fre-quency response. To decrease stray capacitance, min-imize trace lengths by placing external components as close to the instrumentation amplifier as possible. For best performance, bypass each power supply to ground with a separate 0.1µF capacitor.Microphone AmplifierThe MAX4462’s bipolar output, along with its excellent common-mode rejection ratio, makes it suitable for pre-cision microphone amplifier applications. Figure 7 illus-trates one such circuit. I n this case, the electret microphone is resistively biased to the supply voltage through a 2.2k Ωpullup resistor. The MAX4462 directly senses the output voltage at its noninverting input, and indirectly senses the microphone ’s ground through an AC-coupling capacitor. This technique provides excel-lent rejection of common-mode noise picked up by the microphone lead wires. Furthermore, ground noise from distantly located microphones is reduced.The single-ended output of the MAX4462 is converted to differential through a single op amp, the MAX4335. The op amp forces the midpoint between OUT+ and OUT- to be equal to the reference voltage. The configuration does not change the MAX4662T ’s fixed gain of 10.MAX4460/MAX4461/MAX4462SOT23, 3V/5V , Single-Supply, Rail-to-RailInstrumentation Amplifiers______________________________________________________________________________________17Figure 7. Differential I/O Microphone AmplifierChip InformationTRANSISTOR COUNT: 421PROCESS: BiCMOSTypical Application Circuits(continued)M A X 4460/M A X 4461/M A X 4462SOT23, 3V/5V , Single-Supply, Rail-to-Rail Instrumentation Amplifiers 18______________________________________________________________________________________Pin Configurations。

MAX4211EEUE+T中文资料

MAX4211EEUE+T中文资料

High-Side Power and Current Monitors MAX4210/MAX4211
ABSOLUTE MAXIMUM RATINGS
VCC, IN, CIN1, CIN2 to GND ....................................-0.3V to +6V RS+, RS-, INHIBIT, LE, COUT1, COUT2 to GND ...-0.3V to +30V IOUT, POUT, REF to GND ..........................-0.3V to (VCC + 0.3V) Differential Input Voltage (VRS+ - VRS-) .................................±5V Maximum Current into Any Pin..........................................±10mA Output Short-Circuit Duration to VCC or GND ........................10s Continuous Power Dissipation (TA = +70°C) 6-Pin TDFN (derate 24.4mW/°C above +70°C) ..........1951mW 8-Pin µMAX (derate 4.5mW/°C above +70°C) .............362mW 16-Pin TSSOP (derate 9.4mW/°C above +70°C) ..........754mW 16-Pin Thin QFN (derate 25mW/°C above +70°C) .....2000mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C

Turck双检测面电感式传感器说明书

Turck双检测面电感式传感器说明书

T 04:43:35+02:00型号NI4-DSU26-2Y1X2-H1140货号1051007额定工作距离Sn 4 mm 安装方式非齐平修正系数37#钢 = 1; 铝 = 0.3; 不锈钢= 0.7; 黄铜 = 0.4重复精度ð 2 满量程的 %温度漂移10 %磁滞1…10 %环境温度-25…+70 °C 输出性能4线, NAMUR 阀控制Exi (max. 45 V)开关频率0.05 kHz电压Nom. 8.2 VDC 无激励电流损耗ï 2.1 mA 激励电流损耗ð 1.2 mA认证依据KEMA 02 ATEX 1090X 内置 电感(L ) / 电容 (C )150 nF / 150 µH防爆标志防爆标识为II 2 G/Ex ia IIC T6 Gb /II 1 D Ex ia D 20T95 °C Da(最大 U = 20 V, I = 60 mA, P = 200 mW)警告防静电设计用于阀位回讯检测的双检测面电感式传感器, DSU26尺寸68 x 60 x 35.4 mm外壳材料塑料, 塑料, PA12-GF20, 黄感应面材料塑料, 塑料, PA12-GF20, 黑连接接插件, M12 x 1防震动性55 Hz (1 mm)防冲击性30 g (11 ms)防护等级IP67MTTF 6198 years 符合SN 29500 (Ed.99) 40 °C认证开关状态指示2路LED指示灯 黄/红sATEX 防爆认证II 组设备,设备等级2G. 可用于气体危险1区sATEX 防爆认证,II组设备,可应用于粉尘危险0区s 满足SIL2和IEC61508标准s 长方形,外壳类型DSU26s 塑料, PP -GF30-V0s 检测旋转执行器位置两路输出s 在标准执行器上安装s 2线直流, nom. 8.2 VDCs输出遵循本安型DIN EN 60947-5-6标准(NAMUR)sM12 x 1接插件接线图功能原理电感式传感器以无磨损和非接触的方式来检测金属物体 阀位回讯是专为旋转执行器的位置检测而设计的 它将非接触式电感传感器的可靠性与模块化的外壳系统的灵活性结合起来。

MAX202EEWE+T中文资料

MAX202EEWE+T中文资料

________________________________________________________________Maxim Integrated Products 1General DescriptionThe MAX202E–MAX213E, MAX232E/MAX241E line drivers/receivers are designed for RS-232 and V.28communications in harsh environments. Each transmitter output and receiver input is protected against ±15kV electrostatic discharge (ESD) shocks, without latchup.The various combinations of features are outlined in the Selector Guide.The drivers and receivers for all ten devices meet all EIA/TIA-232E and CCITT V.28specifications at data rates up to 120kbps, when loaded in accordance with the EIA/TIA-232E specification.The MAX211E/MAX213E/MAX241E are available in 28-pin SO packages, as well as a 28-pin SSOP that uses 60% less board space. The MAX202E/MAX232E come in 16-pin TSSOP, narrow SO, wide SO, and DIP packages. The MAX203E comes in a 20-pin DIP/SO package, and needs no external charge-pump capacitors. The MAX205E comes in a 24-pin wide DIP package, and also eliminates external charge-pump capacitors. The MAX206E/MAX207E/MAX208E come in 24-pin SO, SSOP, and narrow DIP packages. The MAX232E/MAX241E operate with four 1µF capacitors,while the MAX202E/MAX206E/MAX207E/MAX208E/MAX211E/MAX213E operate with four 0.1µF capacitors,further reducing cost and board space.________________________ApplicationsNotebook, Subnotebook, and Palmtop Computers Battery-Powered Equipment Hand-Held EquipmentNext-Generation Device Featureso For Low-Voltage ApplicationsMAX3222E/MAX3232E/MAX3237E/MAX3241E/MAX3246E: ±15kV ESD-Protected Down to10nA, +3.0V to +5.5V, Up to 1Mbps, True RS-232Transceivers (MAX3246E Available in a UCSP™Package)o For Low-Power ApplicationsMAX3221/MAX3223/MAX3243: 1µA SupplyCurrent, True +3V to +5.5V RS-232 Transceivers with Auto-Shutdown™o For Space-Constrained ApplicationsMAX3233E/MAX3235E: ±15kV ESD-Protected,1µA, 250kbps, +3.0V/+5.5V, Dual RS-232Transceivers with Internal Capacitorso For Low-Voltage or Data Cable ApplicationsMAX3380E/MAX3381E: +2.35V to +5.5V, 1µA,2Tx/2Rx RS-232 Transceivers with ±15kV ESD-Protected I/O and Logic PinsMAX202E–MAX213E, MAX232E/MAX241E±15kV ESD-Protected, +5V RS-232 TransceiversSelector Guide19-0175; Rev 6; 3/05Pin Configurations and Typical Operating Circuits appear at end of data sheet.YesPARTNO. OF RS-232DRIVERSNO. OF RS-232RECEIVERSRECEIVERS ACTIVE IN SHUTDOWNNO. OF EXTERNAL CAPACITORS(µF)LOW-POWER SHUTDOWNTTL TRI-STATE MAX202E 220 4 (0.1)No No MAX203E 220None No No MAX205E 550None Yes Yes MAX206E 430 4 (0.1)Yes Yes MAX207E 530 4 (0.1)No No MAX208E 440 4 (0.1)No No MAX211E 450 4 (0.1)Yes Yes MAX213E 452 4 (0.1)Yes Yes MAX232E 220 4 (1)No No MAX241E454 (1)YesFor pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at .AutoShutdown and UCSP are trademarks of Maxim Integrated Products, Inc.Ordering InformationOrdering Information continued at end of data sheet.2_______________________________________________________________________________________M A X 202E –M A X 213E , M A X 232E /M A X 241EABSOLUTE MAXIMUM RATINGSV CC ..........................................................................-0.3V to +6V V+................................................................(V CC - 0.3V) to +14V V-............................................................................-14V to +0.3V Input VoltagesT_IN............................................................-0.3V to (V+ + 0.3V)R_IN...................................................................................±30V Output VoltagesT_OUT.................................................(V- - 0.3V) to (V+ + 0.3V)R_OUT......................................................-0.3V to (V CC + 0.3V)Short-Circuit Duration, T_OUT....................................Continuous Continuous Power Dissipation (T A = +70°C)16-Pin Plastic DIP (derate 10.53mW/°C above +70°C)....842mW 16-Pin Narrow SO (derate 8.70mW/°C above +70°C).....696mW 16-Pin Wide SO (derate 9.52mW/°C above +70°C)......762mW 16-Pin TSSOP (derate 9.4mW/°C above +70°C)...........755mW20-Pin Plastic DIP (derate 11.11mW/°C above +70°C)...889mW 20-Pin SO (derate 10.00mW/°C above +70°C).............800mW 24-Pin Narrow Plastic DIP(derate 13.33mW/°C above +70°C) ...............................1.07W 24-Pin Wide Plastic DIP(derate 14.29mW/°C above +70°C)................................1.14W 24-Pin SO (derate 11.76mW/°C above +70°C).............941mW 24-Pin SSOP (derate 8.00mW/°C above +70°C)..........640mW 28-Pin SO (derate 12.50mW/°C above +70°C)....................1W 28-Pin SSOP (derate 9.52mW/°C above +70°C)..........762mW Operating Temperature RangesMAX2_ _EC_ _.....................................................0°C to +70°C MAX2_ _EE_ _...................................................-40°C to +85°C Storage Temperature Range.............................-65°C to +165°C Lead Temperature (soldering, 10s).................................+300°CELECTRICAL CHARACTERISTICS(V CC = +5V ±10% for MAX202E/206E/208E/211E/213E/232E/241E; V CC = +5V ±5% for MAX203E/205E/207E; C1–C4 = 0.1µF for MAX202E/206E/207E/208E/211E/213E; C1–C4 = 1µF for MAX232E/241E; T A = T MIN to T MAX ; unless otherwise noted. Typical values are at T A = +25°C.)Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.ELECTRICAL CHARACTERISTICS (continued)MAX202E–MAX213E, MAX232E/MAX241E (V CC= +5V ±10% for MAX202E/206E/208E/211E/213E/232E/241E; V CC= +5V ±5% for MAX203E/205E/207E; C1–C4 = 0.1µF forMAX202E/206E/207E/208E/211E/213E; C1–C4 = 1µF for MAX232E/241E; T A= T MIN to T MAX; unless otherwise noted. Typical valuesare at T A= +25°C.)Note 1:MAX211EE_ _ tested with V CC= +5V ±5%._______________________________________________________________________________________34______________________________________________________________________________________M A X 202E –M A X 213E , M A X 232E /M A X 241E__________________________________________Typical Operating Characteristics(Typical Operating Circuits, V CC = +5V, T A = +25°C, unless otherwise noted.)5.00MAX211E/MAX213ETRANSMITTER OUTPUT VOLTAGEvs. LOAD CAPACITANCELOAD CAPACITANCE (pF)V O H , -V O L (V )5.56.06.57.07.58.0100020003000400050000MAX211E/MAX213E/MAX241E TRANSMITTER SLEW RATE vs. LOAD CAPACITANCELOAD CAPACITANCE (pF)S L E W R A T E ( V /µs )5101520253010002000300040005000_______________________________________________________________________________________5MAX202E–MAX213E, MAX232E/MAX241E____________________________Typical Operating Characteristics (continued)(Typical Operating Circuits, V CC = +5V, T A = +25°C, unless otherwise noted.)2MAX202E/MAX203E/MAX232E TRANSMITTER SLEW RATE vs. LOAD CAPACITANCELOAD CAPACITANCE (pF)S L E W R A T E ( V /µs )468101214100020003000400050005.07.5-7.53000MAX205E–MAX208ETRANSMITTER OUTPUT VOLTAGEvs. LOAD CAPACITANCE-5.02.5LOAD CAPACITANCE (pF)O U T P U T V O L T A G E (V )10002000400050000-2.54550203000MAX205E–MAX208E SUPPLY CURRENT vs. LOAD CAPACITANCE2540LOAD CAPACITANCE (pF)S U P P L Y C U R R E N T (m A )100020004000500035302.55.0-10.0180MAX205E –MAX208EOUTPUT VOLTAGE vs. DATA RATE-7.50DATA RATE (kbps)O U T P U T V O L T A G E (V )601202401503090210-2.5-5.010.07.56_______________________________________________________________________________________M A X 202E –M A X 213E , M A X 232E /M A X 241EMAX203EMAX205E_____________________________________________________________Pin DescriptionsMAX202E/MAX232E_______________________________________________________________________________________7MAX202E–MAX213E, MAX232E/MAX241EMAX208E________________________________________________Pin Descriptions (continued)MAX206EMAX207E8_______________________________________________________________________________________M A X 202E –M A X 213E , M A X 232E /M A X 241EMAX211E/MAX213E/MAX241E)(MAX205E/MAX206E/MAX211E/MAX213E/MAX241E)________________________________________________Pin Descriptions (continued)MAX211E/MAX213E/MAX241EFigure 3. Transition Slew-Rate Circuit_______________Detailed Description The MAX202E–MAX213E, MAX232E/MAX241E consist of three sections: charge-pump voltage converters, drivers (transmitters), and receivers. These E versions provide extra protection against ESD. They survive ±15kV discharges to the RS-232 inputs and outputs, tested using the Human Body Model. When tested according to IEC1000-4-2, they survive ±8kV contact-discharges and ±15kV air-gap discharges. The rugged E versions are intended for use in harsh environments or applications where the RS-232 connection is frequently changed (such as notebook computers). The standard (non-“E”) MAX202, MAX203, MAX205–MAX208, MAX211, MAX213, MAX232, and MAX241 are recommended for applications where cost is critical.+5V to ±10V Dual Charge-PumpVoltage Converter The +5V to ±10V conversion is performed by dual charge-pump voltage converters (Figure 4). The first charge-pump converter uses capacitor C1 to double the +5V into +10V, storing the +10V on the output filter capacitor, C3. The second uses C2 to invert the +10V into -10V, storing the -10V on the V- output filter capacitor, C4.In shutdown mode, V+ is internally connected to V CC by a 1kΩpull-down resistor, and V- is internally connected to ground by a 1kΩpull up resistor.RS-232 Drivers With V CC= 5V, the typical driver output voltage swing is ±8V when loaded with a nominal 5kΩRS-232 receiver. The output swing is guaranteed to meet EIA/TIA-232E and V.28 specifications that call for ±5V minimum output levels under worst-case conditions. These include a 3kΩload, minimum V CC, and maximum operating temperature. The open-circuit output voltage swings from (V+ - 0.6V) to V-.Input thresholds are CMOS/TTL compatible. The unused drivers’ inputs on the MAX205E–MAX208E, MAX211E, MAX213E, and MAX241E can be left unconnected because 400kΩpull up resistors to V CC are included on-chip. Since all drivers invert, the pull up resistors force the unused drivers’ outputs low. The MAX202E, MAX203E, and MAX232E do not have pull up resistors on the transmitter inputs._______________________________________________________________________________________9MAX202E–MAX213E, MAX232E/MAX241E10______________________________________________________________________________________M A X 202E –M A X 213E , M A X 232E /M A X 241E±15kV ESD-Protected, +5V RS-232 Transceivers When in low-power shutdown mode, the MAX205E/MAX206E/MAX211E/MAX213E/MAX241E driver outputs are turned off and draw only leakage currents—even if they are back-driven with voltages between 0V and 12V. Below -0.5V in shutdown, the transmitter output is diode-clamped to ground with a 1k Ωseries impedance.RS-232 ReceiversThe receivers convert the RS-232 signals to CMOS-logic output levels. The guaranteed 0.8V and 2.4V receiver input thresholds are significantly tighter than the ±3V thresholds required by the EIA/TIA-232E specification.This allows the receiver inputs to respond to TTL/CMOS-logic levels, as well as RS-232 levels.The guaranteed 0.8V input low threshold ensures that receivers shorted to ground have a logic 1 output. The 5k Ωinput resistance to ground ensures that a receiver with its input left open will also have a logic 1 output. Receiver inputs have approximately 0.5V hysteresis.This provides clean output transitions, even with slow rise/fall-time signals with moderate amounts of noise and ringing.In shutdown, the MAX213E’s R4 and R5 receivers have no hysteresis.Shutdown and Enable Control (MAX205E/MAX206E/MAX211E/MAX213E/MAX241E)In shutdown mode, the charge pumps are turned off,V+ is pulled down to V CC , V- is pulled to ground, and the transmitter outputs are disabled. This reduces supply current typically to 1µA (15µA for the MAX213E).The time required to exit shutdown is under 1ms, as shown in Figure 5.ReceiversAll MAX213E receivers, except R4 and R5, are put into a high-impedance state in shutdown mode (see Tables 1a and 1b). The MAX213E’s R4 and R5 receivers still function in shutdown mode. These two awake-in-shutdown receivers can monitor external activity while maintaining minimal power consumption.The enable control is used to put the receiver outputs into a high-impedance state, to allow wire-OR connection of two EIA/TIA-232E ports (or ports of different types) at the UART. It has no effect on the RS-232 drivers or the charge pumps.N ote: The enabl e control pin is active l ow for the MAX211E/MAX241E (EN ), but is active high for the MAX213E (EN). The shutdown control pin is active high for the MAX205E/MAX206E/MAX211E/MAX241E (SHDN), but is active low for the MAX213E (SHDN ).Figure 4. Charge-Pump DiagramMAX202E–MAX213E, MAX232E/MAX241EV+V-200µs/div3V 0V 10V 5V 0V -5V -10VSHDNMAX211EFigure 5. MAX211E V+ and V- when Exiting Shutdown (0.1µF capacitors)X = Don't care.*Active = active with reduced performanceSHDN E N OPERATION STATUS Tx Rx 00Normal Operation All Active All Active 01Normal Operation All Active All High-Z 1XShutdownAll High-ZAll High-ZTable 1a. MAX205E/MAX206E/MAX211E/MAX241E Control Pin ConfigurationsTable 1b. MAX213E Control Pin ConfigurationsThe MAX213E’s receiver propagation delay is typically 0.5µs in normal operation. In shutdown mode,propagation delay increases to 4µs for both rising and falling transitions. The MAX213E’s receiver inputs have approximately 0.5V hysteresis, except in shutdown,when receivers R4 and R5 have no hysteresis.When entering shutdown with receivers active, R4 and R5 are not valid until 80µs after SHDN is driven low.When coming out of shutdown, all receiver outputs are invalid until the charge pumps reach nominal voltage levels (less than 2ms when using 0.1µF capacitors).±15kV ESD ProtectionAs with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. The driver outputs and receiver inputs have extra protection against static electricity. Maxim’s engineers developed state-of-the-art structures to protect these pins against ESD of ±15kV without damage. The ESD structures withstand high ESD in all states: normal operation, shutdown, and powered down. After an ESD event, Maxim’s E versions keep working without latchup, whereas competing RS-232products can latch and must be powered down to remove latchup.ESD protection can be tested in various ways; the transmitter outputs and receiver inputs of this product family are characterized for protection to the following limits:1)±15kV using the Human Body Model2)±8kV using the contact-discharge method specifiedin IEC1000-4-23)±15kV using IEC1000-4-2’s air-gap method.ESD Test ConditionsESD performance depends on a variety of conditions.Contact Maxim for a reliability report that documents test set-up, test methodology, and test results.Human Body ModelFigure 6a shows the Human Body Model, and Figure 6b shows the current waveform it generates when discharged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the test device through a 1.5k Ωresistor.S H D N ENOPERATION STATUS Tx 1–400Shutdown All High-Z 01Shutdown All High-Z 10Normal Operation 11Normal OperationAll ActiveAll Active Active1–34, 5High-Z ActiveHigh-Z High-Z High-Z Active*High-Z RxM A X 202E –M A X 213E , M A X 232E /M A X 241EIEC1000-4-2The IEC1000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifically refer to integrated circuits. The MAX202E/MAX203E–MAX213E, MAX232E/MAX241E help you design equipment that meets level 4 (the highest level) of IEC1000-4-2, without the need for additional ESD-protection components.The major difference between tests done using the Human Body Model and IEC1000-4-2 is higher peak current in IEC1000-4-2, because series resistance is lower in the IEC1000-4-2 model. Hence, the ESD withstand voltage measured to IEC1000-4-2 is generally lower than that measured using the Human Body Model. Figure 7b shows the current waveform for the 8kV IEC1000-4-2 level-four ESD contact-discharge test.The air-gap test involves approaching the device with a charged probe. The contact-discharge method connects the probe to the device before the probe is energized.Machine ModelThe Machine Model for ESD tests all pins using a 200pF storage capacitor and zero discharge resistance. Its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing. Of course, all pins require this protection during manufacturing, not just RS-232 inputs and outputs. Therefore,after PC board assembly,theMachine Model is less relevant to I/O ports.Figure 7a. IEC1000-4-2 ESD Test ModelFigure 7b. IEC1000-4-2 ESD Generator Current WaveformFigure 6a. Human Body ESD Test ModelFigure 6b. Human Body Model Current Waveform__________Applications InformationCapacitor Selection The capacitor type used for C1–C4 is not critical for proper operation. The MAX202E, MAX206–MAX208E, MAX211E, and MAX213E require 0.1µF capacitors, and the MAX232E and MAX241E require 1µF capacitors, although in all cases capacitors up to 10µF can be used without harm. Ceramic, aluminum-electrolytic, or tantalum capacitors are suggested for the 1µF capacitors, and ceramic dielectrics are suggested for the 0.1µF capacitors. When using the minimum recommended capacitor values, make sure the capacitance value does not degrade excessively as the operating temperature varies. If in doubt, use capacitors with a larger (e.g., 2x) nominal value. The capacitors’ effective series resistance (ESR), which usually rises at low temperatures, influences the amount of ripple on V+ and V-.Use larger capacitors (up to 10µF) to reduce the output impedance at V+ and V-. This can be useful when “stealing” power from V+ or from V-. The MAX203E and MAX205E have internal charge-pump capacitors. Bypass V CC to ground with at least 0.1µF. In applications sensitive to power-supply noise generated by the charge pumps, decouple V CC to ground with a capacitor the same size as (or larger than) the charge-pump capacitors (C1–C4).V+ and V- as Power Supplies A small amount of power can be drawn from V+ and V-, although this will reduce both driver output swing and noise margins. Increasing the value of the charge-pump capacitors (up to 10µF) helps maintain performance when power is drawn from V+ or V-.Driving Multiple Receivers Each transmitter is designed to drive a single receiver. Transmitters can be paralleled to drive multiple receivers.Driver Outputs when Exiting Shutdown The driver outputs display no ringing or undesirable transients as they come out of shutdown.High Data Rates These transceivers maintain the RS-232 ±5.0V minimum driver output voltages at data rates of over 120kbps. For data rates above 120kbps, refer to the Transmitter Output Voltage vs. Load Capacitance graphs in the Typical Operating Characteristics. Communication at these high rates is easier if the capacitive loads on the transmitters are small; i.e., short cables are best.Table 2. Summary of EIA/TIA-232E, V.28 SpecificationsMAX202E–MAX213E, MAX232E/MAX241EM A X 202E –M A X 213E , M A X 232E /M A X 241E____________Pin Configurations and Typical Operating Circuits (continued)Table 3. DB9 Cable ConnectionsCommonly Used for EIA/TIAE-232E and V.24 Asynchronous Interfaces____________Pin Configurations and Typical Operating Circuits (continued)MAX202E–MAX213E, MAX232E/MAX241EM A X 202E –M A X 213E , M A X 232E /M A X 241E____________Pin Configurations and Typical Operating Circuits (continued)MAX202E–MAX213E, MAX232E/MAX241E____________Pin Configurations and Typical Operating Circuits (continued)M A X 202E –M A X 213E , M A X 232E /M A X 241E____________Pin Configurations and Typical Operating Circuits (continued)MAX202E–MAX213E, MAX232E/MAX241E____________Pin Configurations and Typical Operating Circuits (continued)M A X 202E –M A X 213E , M A X 232E /M A X 241E____________Pin Configurations and Typical Operating Circuits (continued)______________________________________________________________________________________21MAX202E–MAX213E, MAX232E/MAX241E Ordering Information (continued)*Dice are specified at T A= +25°C.M A X 202E –M A X 213E , M A X 232E /M A X 241E22________________________________________________________________________________________________________________________________________________Chip Topographies___________________Chip InformationC1-V+C1+V CC R2INT2OUT R2OUT0.117"(2.972mm)0.080"(2.032mm)V-C2+ C2-T2IN T1OUT R1INR1OUT T1INGNDR5INV-C2-C2+C1-V+C1+V CC T4OUTR3IN T3OUTT1OUT 0.174"(4.420mm)0.188"(4.775mm)T4IN R5OUT R4OUT T3IN R4IN EN (EN) SHDN (SHDN)R3OUT T2OUT GNDR1IN R1OUT T2IN R2OUTR2IN T1IN ( ) ARE FOR MAX213E ONLYTRANSISTOR COUNT: 123SUBSTRATE CONNECTED TO GNDTRANSISTOR COUNT: 542SUBSTRATE CONNECTED TO GNDMAX202E/MAX232EMAX211E/MAX213E/MAX241EMAX205E/MAX206E/MAX207E/MAX208E TRANSISTOR COUNT: 328SUBSTRATE CONNECTED TO GNDMAX202E–MAX213E, MAX232E/MAX241E Package InformationM A X 202E –M A X 213E , M A X 232E /M A X 241EPackage Information (continued)MAX202E–MAX213E, MAX232E/MAX241E±15kV ESD-Protected, +5V RS-232 TransceiversMaxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________25©2005 Maxim Integrated ProductsPrinted USAis a registered trademark of Maxim Integrated Products, Inc.Package Information (continued)(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to /packages .)。

费思FT6300A系列中小功率电子负载用户手册适用型号(FT6301A-FT6306A)

费思FT6300A系列中小功率电子负载用户手册适用型号(FT6301A-FT6306A)
仅作以上保证,不作其它明示或默示性保证,其中包括适销性、某些特定应用的合理 性与适用性等的默示保证,无论在合同中、民事过失上,或是其它方面。费思科技不对任 何特殊的、偶然或间接的损害负责。
安全摘要
在操作和维修电子负载过程中,请严格遵守以下安全须知。不遵守以下注意事项或本手册中其它章节 提示的特定警告,可能会削弱本负载所提供的保护功能。对于用户不遵守这些注意事项而造成的后果,费 思科技不负任何责任。
目录 ....................................................................................................................................................... IV
II
安全标识
在本产品外壳、用户手册所使用国际符号的解释请参见下表。
III
目录
前言........................................................................................................................................... I 通告........................................................................................................................................... I
第 2 章 安装.......................................................................................................................................... 11

TC4422_中文数据手册

TC4422_中文数据手册

2006 Microchip Technology Inc.
1.0 电气特性
绝对最大值 †
供电电压............................................................... +20V 输入电压 ...........................(VDD + 0.3V) 至 (GND - 5V) 输入电流 (VIN > VDD)...................................... 50 mA 封装功耗 (TA ≤ 70°C)
80 ns 图 4-1
3
mA VIN = 3V
0.2
VIN = 0V
18
V
温度特性
电气规范:除非另外说明,否则所有参数均为 4.5V ≤ VDD ≤ 18V 条件下的值。
参数
符号 最小值 典型值 最大值 单位
条件
温度范围 规定温度范围 (商业级) 规定温度范围 (扩展级) 规定温度范围 (汽车级) 最高结温 储存温度范围 封装热阻 热阻, 5 引脚 TO-220 热阻, 8 引脚 6x5 DFN
2006 Microchip Technology Inc.
DS21420D_CN 第 3 页
TC4421/TC4422
直流特性 (在整个工作温度范围内)
电气规范:除非另外说明,否则温度超出正常工作范围,且 4.5V ≤ VDD ≤ 18V。
参数
符号
最小值 典型值 最大值 单位
条件
输入
逻辑 “1”,高输入电压 逻辑 “0”,低输入电压 输入电流 输出
VIH
2.4

VIL

440变频器使用大全

440变频器使用大全

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 A B C D E F
MICROMASTER 440变频器 0.12kW - 250kW
系统参数 排障 MICROMASTER 440 的技术规格 可选件
使用大全 用户文件
电磁兼容性 MICROMASTER 440 变频器的参数表 功能框图 二进制互联连接(BiCo)功能 通讯 高级操作板( AOP ) 编码器 制动电阻
Email: techsupport@ad.siemens.de 星期一至星期五:上午 7: 00 至下午 5: 00 (当地时间) 西门子(中国)有限公司技术支持部 北京 电话: 传真: 010 – 64738566 010 – 64731096,647地址 用户可以在以下网址查到技术资料和一般信息: http:///products/sd。 联系地址: 如果您在阅读本手册时有什麽疑问或问题,请根据本手册封底的地址与西门子公司的办事处联 系。
本手册中对某些有效的功能可能未加说明。但是,在新的控制装置 中或进行服务时,并不因为西门子公司提供了这些功能而要承担任 未经书面许可,不得翻印、传播、或使用本手册及其相关内 何责任。 容。违者将对所造成的损害负法律责任。西门子公司保留一切 编审过程中,我们对本手册的内容与所述的硬件和软件的一致性进 权利,包括由专利许可、实用样机注册、或工程设计等所产生 行了审核。但是,仍然可能存在矛盾和谬误的地方,不可能保证它 的所有权利。 们完全一致。我们将定期检查本手册中涵盖的内容,并在以后修订 的版本中予以必要的修正。欢迎提出改进的建议。 © Siemens AG 2001。保留一切权利。 西门子公司的手册都是用无氯纸张印刷的,这种纸张的生产原料来 源于可持续生长的森林。打印和装订的过程中未使用化学溶剂。 MICROMASTER® 是西门子公司已注册的商标。 保留不予先通知而修改本手册的权利。

MAX629ESA中文资料

MAX629ESA中文资料

ELECTRICAL CHARACTERISTICS
(VCC = +5V, CREF = 0.1µF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note1) PARAMETER VCC Input Voltage (Note 2) VCC Supply Current VCC Shutdown Current VCC Undervoltage Lockout Input Supply Voltage (Note 2) SHDN, POL, ISET Logic Levels Positive Output Voltage Negative Output Voltage LX Switch-Current Limit LX On-Resistance LX Leakage Current Maximum LX On-Time POL = GND Minimum LX Off-Time POL = VCC POL = GND, VFB < 1V POL = VCC, VFB > 0.25V POL = GND (positive output) FB Set Point POL = VCC (negative output) FB Input Bias Current REF Output Voltage VCC = 2.7V to 5.5V, no load on REF TA = 0°C to +85°C TA = -40°C to +85°C 1.225 1.218 TA = 0°C to +85°C TA = -40°C to +85°C TA = 0°C to +85°C TA = -40°C to +85°C VFB = 1.3V SHDN = GND 100mV hysteresis Voltage applied to L1 (VIN) VIH VIL Circuit of Figure 2 Circuit of Figure 3 ISET = VCC ISET = GND VCC = 5V VCC = 3.3V VLX = 28V, TA = +85°C 6.5 0.7 2.0 3.0 3.0 1.225 1.218 -15 -25 5 1.250 0 -VIN 0.39 0.20 0.45 0.25 0.6 0.7 0.05 8.5 1.0 3.2 4.5 4.5 1.250 2.3 0.8 2.4 0.4 28 -28 0.51 0.33 1.2 1.4 2.5 10.0 1.3 3.8 6.0 6.0 1.275 1.282 15 25 50 1.275 1.282 V mV nA V µs CONDITIONS MIN 2.7 80 0.04 2.5 TYP MAX 5.5 120 1 2.65

MAX3087ESA中文资料

MAX3087ESA中文资料

375
256
MAX3084
Full
0.5
Yes
No
No
375
256
MAX3085
Half
0.5
Yes
Yes
Yes
375
256
MAX3086
Full
10
No
Yes
Yes
375
256
MAX3087
Full
10
No
No
No
375
256
MAX3088
Half
10
No
Yes
Yes
375
256
MAX3089 Selectable Selectable Selectable
These transceivers typically draw 375µA of supply current when unloaded, or when fully loaded with the drivers disabled.
All devices have a 1/8-unit-load receiver input impedance that allows up to 256 transceivers on the bus. The MAX3082/MAX3085/MAX3088 are intended for halfduplex communications, while the MAX3080/MAX3081/ MAX3083/MAX3084/MAX3086/MAX3087 are intended for full-duplex communications. The MAX3089 is selectable between half-duplex and full-duplex operation. It also features independently programmable receiver and transmitter output phase via separate pins.

西门子SIWAREX R称重传感器重点

西门子SIWAREX R称重传感器重点

西门子目录表:安全注意事项...................................................................................................... 3 总体信息 ............................................................................................................4 关于产品责任的说明........................................................................................... 4 1 技术描述.................................................................................................. 5 1.1 应用领域.................................................................................................. 5 1.2 结构......................................................................................................... 5 1.3 系统配置.................................................................................................. 7 2 安装/组装............................................................................................... 10 2.1 安装....................................................................................................... 10 2.2 组装....................................................................................................... 13 2.3 拆卸....................................................................................................... 16 3 调试....................................................................................................... 17 4 维护....................................................................................................... 19 4.1 管理和维护............................................................................................. 19 4.2 故障查找................................................................................................ 19 5 技术数据................................................................................................ 22 5.1 功能数据................................................................................................ 22 5.2 单元型式................................................................................................ 25 5.3 防爆....................................................................................................... 25 5.4 电磁兼容性(EMC ).............................................................................. 26 5.5 尺寸....................................................................................................... 27 6订货数据 (34)安全注意事项危险意思是:如果未能采取相应的安全预防措施,将肯定会导致死亡、严重的人身伤害、或实质性的财产损失。

AK4420ET中文资料

AK4420ET中文资料

192kHz 24-Bit Stereo ΔΣDAC with 2Vrms OutputAK4420GENERAL DESCRIPTIONThe AK4420 is a 5V 24-bit stereo DAC with an integrated 2Vrms output buffer. A charge pump in the buffer develops an internal negative power supply rail that enables a ground-referenced 2Vrms output. Using AKM’s multi bit modulator architecture, the AK4420 delivers a wide dynamic range while preserving linearity for improved THD+N performance. The AK4420 integrates a combination of switched-capacitor and continuous-time filters, increasing performance for systems with excessive clock jitter. The 24-bit word length and 192kHz sampling rate make this part ideal for a wide range of consumer audio applications, such as DVD, AV receiver system and set-top boxes. The AK4420 is offered in a space saving 16pin TSSOP package.FEATURESSampling Rate Ranging from 8kHz to 192kHz128 times Oversampling (Normal Speed Mode)64 times Oversampling (Double Speed Mode)32 times Oversampling (Quad Speed Mode)24-Bit 8 times FIR Digital FilterSwitched-Capacitor Filter with High Tolerance to Clock JitterSingle Ended 2Vrms Output BufferDigital de-emphasisSoft muteI/F format: 24-Bit MSB justified or I2SMaster clock: 512fs, 768fs or 1152fs (Normal Speed Mode)256fs or 384fs (Double Speed Mode)128fs, 192fs (Quad Speed Mode)THD+N: -92dBDynamic Range: 105dBAutomatic Power-on Reset CircuitPower supply: +4.5 ∼ +5.5VTa = -20 to 85°CSmall Package: 16pin TSSOP (6.4mm x 5.0mm)DIFBICK SDTI AOUTL AOUTR VDD VSS1 DZFSMUTE■ Ordering GuideAK4420ET -20 ∼ +85°C 16pin TSSOP (0.65mm pitch) AKD4420 Evaluation Board for AK4420■ Pin LayoutMCLK BICK SDTI VEE VSS2 CVDD DZF VSS1 VDD AOUTL AOUTRLRCKPIN/FUNCTIONNo. Pin NameI/O Function1 CNI Negative Charge Pump Capacitor Terminal PinConnect to CP with a 1.0μF capacitor that should have the low ESR(Equivalent Series Resistance ) over all temperature range. When thiscapacitor has the polarity, the positive polarity pin should be connected to the CP pin. Non polarity capacitors can also be used. 2 CPI Positive Charge Pump Capacitor Terminal PinConnect to CN with a 1.0μF capacitor that should have the low ESR(Equivalent Series Resistance ) over all temperature range. When thiscapacitor has the polarity, the positive polarity pin should be connected to the CP pin. Non polarity capacitors can also be used. 3 SMUTE ISoft Mute Enable Pin (Internal pull down: 100k Ω) “H”: Enable, “L”: Disable 4 MCLK IMaster Clock Input Pin An external TTL clock should be input on this pin.5 BICK I Audio Serial Data Clock Pin6 SDTI I Audio Serial Data Input Pin 7LRCKI L/R Clock Pin8 DIF IAudio Data Interface Format Pin “L”: Left Justified, “H”: I2S 9 AOUTR ORch Analog Output PinWhen power down, outputs VSS(0V, typ). 10 AOUTL OLch Analog Output PinWhen power down, outputs VSS(0V, typ).11 VDD - DAC Power Supply Pin: 4.5V ∼5.5V12 VSS1-Ground Pin1 13 DZF O Zero Input Detect Pin 14 CVDD - Charge Pump Power Supply Pin: 4.5V ∼5.5V 15 VSS2 - Ground Pin216 VEE O Negative Voltage Output PinConnect to VSS2 with a 1.0μF capacitor that should have the low ESR(Equivalent Series Resistance ) over all temperature range. When thiscapacitor has the polarity, the positive polarity pin should be connected to the VSS2 pin. Non polarity capacitors can also be used.Note: All input pins except for the CN pin should not be left floating.ABSOLUTE MAXIMUM RATINGS(VSS1=VSS2=0V; Note 1)Parameter SymbolminmaxUnitsPower Supply VDDCVDD -0.3-0.3+6.0+6.0VVInput Current (any pins except for supplies) IIN - ±10 mAInput Voltage VIND -0.3 VDD+0.3 VAmbient Operating Temperature Ta -20 85 °CStorage Temperature Tstg -65 150 °CNote 1. All voltages with respect to ground.Note 2. VSS1, VSS2 connect to the same analog grand.WARNING: Operation at or beyond these limits may result in permanent damage to the device.Normal operation is not guaranteed at these extremes.RECOMMENDED OPERATING CONDITIONS(VSS1=VSS2=0V; Note 1)Parameter SymbolmintypmaxUnitsPower Supply VDDCVDD +4.5 +5.0VDD+5.5 VNote 3. CVDD should be equal to VDD*AKEMD assumes no responsibility for the usage beyond the conditions in this datasheet.ANALOG CHARACTERISTICS(Ta = 25°C; VDD=CVDD = +5.0V; fs = 44.1 kHz; BICK = 64fs; Signal Frequency = 1 kHz;24bit Input Data; Measurement frequency = 20Hz ∼ 20kHz; R L ≥5kΩ)Parameter mintypmaxUnits Resolution24Bits Dynamic Characteristics (Note 4)fs=44.1kHz, BW=20kHz -92 -84 dBfs=96kHz, BW=40kHz -92 - dBTHD+N (0dBFS)fs=192kHz, BW=40kHz -92 - dBDynamic Range (-60dBFS with A-weighted. (Note 5) 98105 dBS/N (A-weighted. (Note 6) 98105dBInterchannel Isolation (1kHz) 90 100 dBInterchannel Gain Mismatch 0.2 0.5 dBDC AccuracyDC Offset (at output pin) -60 0 +60 mVGain Drift 100 - ppm/°COutput Voltage (Note 7) 1.97 2.12 2.27 VrmsLoad Capacitance (Note 8)25pFLoad Resistance 5 kΩPower SuppliesPower Supply Current: (Note 9)Normal Operation (fs≤96kHz) Normal Operation (fs=192kHz) Power-Down Mode (Note 10) 2427103640100mAmAμANote 4. Measured by Audio Precision (System Two). Refer to the evaluation board manual.Note 5. 98dB for 16bit input dataNote 6. S/N does not depend on input data size.Note 7. Full-scale voltage (0dB). Output voltage is proportional to the voltage of VDD, AOUT (typ.@0dB) = 2.12Vrms × VDD/5.Note 8. In case of driving capacitive load, inset a resistor between the output pin and the capacitive load. Note 9. The current into VDD and CVDD.Note 10. All digital inputs including clock pins (MCLK, BICK and LRCK) are fixed to VSS or VDDFILTER CHARACTERISTICS(Ta = 25°C; VDD=CVDD = +4.5 ∼ +5.5V; fs = 44.1 kHz)Parameter SymbolminTypmaxUnits Digital filterPassband ±0.05dB (Note 11) –6.0dB PB 0- 22.0520.0-kHzkHzStopband (Note 11) SB24.1 kHz Passband Ripple PR ± 0.02 dBStopband Attenuation SA 54 dBGroup Delay (Note 12) GD-19.3-1/fs Digital Filter + LPFFrequency Response 20.0kHz40.0kHz80.0kHz fs=44.1kHzfs=96kHzfs=192kHzFRFRFR---± 0.05± 0.05± 0.05---dBdBdBNote 11. The passband and stopband frequencies scale with fs(system sampling rate).For example, PB=0.4535×fs (@±0.05dB), SB=0.546×fs.Note 12. Calculated delay time caused by digital filter. This time is measured from setting the 16/24bit dataof both channels to input register to the output of the analog signal.DC CHARACTERISTICS(Ta = 25°C; VDD=CVDD = +4.5 ∼ +5.5V)Parameter SymbolmintypmaxUnitsHigh-Level Input Voltage Low-Level Input Voltage VIHVIL2.2----0.8VVHigh-Level Input Voltage (Iout = -80uA) Low-Level Input Voltage (Iout = 80uA) VIHVILVDD-0.4----0.4VVInput Leakage Current Iin - - ± 10 μA Note 13. The SMUTE pin is not included. The SMUTE pin has internal pull-up resistor (typ.100kΩ) .SWITCHING CHARACTERISTICS(Ta = 25°C; VDD=CVDD = +4.5 ∼ +5.5V)Parameter SymbolminTypmaxUnitsMaster Clock FrequencyDuty Cycle fCLKdCLK4.0963011.2896 36.86470MHz%LRCK FrequencyNormal Speed Mode Double Speed Mode Quad Speed Mode Duty CyclefsnfsdfsqDuty83212045489619255kHzkHzkHz%Audio Interface Timing BICK PeriodNormal Speed ModeDouble Speed ModeQuad Speed ModeBICK Pulse Width LowPulse Width HighBICK “↑” to LRCK Edge (Note 14) LRCK Edge to BICK “↑” (Note 14) SDTI Hold TimeSDTI Setup TimetBCKtBCKtBCKtBCKLtBCKHtBLRtLRBtSDHtSDS1/128fsn1/64fsd1/64fsq303020202020nsnsnsnsnsnsnsnsnsNote 14. BICK rising edge must not occur at the same time as LRCK edge.■ Timing DiagramVIHMCLKVILVIH LRCKVILVIH BICKVILFigure 1. Clock TimingLRCKVIH BICKVILVIH SDTIVIL VIH VILFigure 2. Serial Interface TimingOPERATION OVERVIEW■ System ClockThe external clocks required to operate the AK4420 are MCLK, LRCK and BICK. The master clock (MCLK) should be synchronized with LRCK but the phase is not critical. The MCLK is used to operate the digital interpolation filter and the delta-sigma modulator. Sampling speed and MCLK frequency are detected automatically and then the internal master clock is set to the appropriate frequency (Table 1).The AK4420 is automatically placed in power saving mode when MCLK and LRCK stop during normal operation mode, and the analog output is forced to 0V(typ). When MCLK and LRCK are input again, the AK4420 is powered up. After power-up, the AK4420 is in the power-down mode until MCLK and LRCK are input.LRCK MCLK (MHz)fs 128fs 192fs 256fs 384fs 512fs 768fs 1152fsSampling Speed 32.0kHz - - - - 16.3840 24.5760 36.864044.1kHz - - - - 22.5792 33.8688 -48.0kHz - - - - 24.5760 36.8640 - Normal 32.0kHz 8.192 12.288 44.1kHz 11.289616.9344 48.0kHz 12.288 18.432 88.2kHz - - 22.579233.8688 - - - 96.0kHz - - 24.576036.8640 - - - Double 176.4kHz 22.5792 33.8688 - - - - -Quad192.0kHz 24.5760 36.8640 - - - - -Table 1. system clock exampleWhen MCLK= 256fs/384fs, the AK4420 supports sampling rate of 32kHz~96kHz (Table 2). But, when the sampling rate is 32kHz~48kHz, DR and S/N will degrade by approximately 3dB as compared to when MCLK= 512fs/768fs.MCLK DR,S/N 256fs/384fs 102dB 512fs/768fs 105dBTable 2. Relationship between MCLK frequency and DR, S/N (fs= 44.1kHz)■ Audio Serial Interface FormatThe audio data is shifted in via the SDTI pin using the BICK and LRCK inputs. The DIF pin can select between two serial data modes as shown in Table 3. In all modes the serial data is MSB-first, two’s complement format and it is latched on the rising edge of BICK. In one cycle of LRCK, eight “H” pulses or more must not be input to the DIF pin.Mode DIF SDTI Format BICK Figure 0 L 24bit MSB justified ≥48fsFigure 31 H 24bit I 2S Figure 4≥48fsTable 3. Audio Data FormatsBICK(64fs)SDTIFigure 3. Mode 0 TimingLRCKBICK(64fs)SDTI■ Zero detect functionWhen the input data for both channels are continuously zeros for 8192 LRCK cycles, the DZF pin is set to “H”. The DZF pin immediately is set to “L” if the input data for both channels are not zero after going to DZF “H”.■ Analog output blockThe internal negative power supply generation circuit (Figure 5) provides a negative power supply for the internal 2Vrms amplifier. It allows the AK4420 to output an audio signal centered at VSS (0V, typ) as shown in Figure 6. The negative power generation circuit (Figure 5) needs 1.0uF capacitors (Ca, Cb) with low ESR (Equivalent Series Resistance). If this capacitor is polarized, the positive polarity pin should be connected to the CP and VSS2 pins. This circuit operates by clocks generated from MCLK. When MCLK stops, the AK4420 is placed in the reset mode automatically and the analogFigure 5. Negative power generation circuit0V2.12VrmsFigure 6. Audio signal output■ Soft Mute OperationSoft mute operation is performed in the digital domain. When the SMUTE pin is set “H”, the output signal is attenuated to -∞ in 1024 LRCK cycles. When the SMUTE pin is returned to “L”, the mute is cancelled and the output attenuation gradually changes to 0dB in 1024 LRCK cycles. If the soft mute is cancelled within the 1024 LRCK cycles after starting this operation, the attenuation is discontinued and it is returned to 0dB by the same cycle. Soft mute is effective for changing the signal source without stopping the signal transmission.SMUTE pin AttenuationDZF pin0dB -∞AOUTNotes:(1) The time for input data be attenuation to -∞, isNormal Speed Mode: 1024 LRCK cycles (1020/fs).Double Speed Mode: 2048 LRCK cycles (2048/fs).Quad Speed Mode : 4096 LRCK cycles (4096/fs).(2) The analog output corresponding to a specific digital input has a group delay, GD.(3) If soft mute is cancelled before attenuating to -∞ after starting the operation, the attenuation is discontinued andreturned to ATT level in the same cycle.(4) When the input data for both channels are continuously zeros for 8192 LRCK cycles, the DZF pin is set to “H”. TheDZF pin immediately is set to “L” if the input data are not zero after going to DZF “H”.Figure 7. Soft Mute and Zero detect function■ System ResetThe AK4420 is in power down mode upon power-up. The MLCK should be input after the power supplies are ramped up. The AK4420 is in power-down mode until LRCK are input.D/A Out (Analog) MCLKDZF(VDD, CVDD)DigitalCircuitAnalogCircuitCircuitCounter circuitD/A In (Digital) MUTE (D/A Out)(4)Notes:(1) Approximately 20us after a MCLK input is detected, the internal analog circuit is powered-up. (2) The digital circuit is powered-up after 2 or 3 LRCK cycles following the detection of MCLK.(3) The charge pump counter starts after the charge pump circuit is powered-up. The DAC outputs a valid analog signal after Time A.Time A = 1024/ (fs x 16): Normal speed mode Time A = 1024/ (fs x 8) : Double speed mode Time A = 1024/ (fs x 4) : Quadruple speed mode (4) No audible click noise occurs under normal conditions. (5) The DZF pin is “L” in the power-down mode.(6) The power supply must be powered-up when the MCLK pin is “L”. MCLK must be input after 20us when the power supply voltage achieves 80% of VDD. If not, click noise may occur at a different time from this figure.Figure 8. System reset diagram■ Reset FunctionWhen the MCLK or LRCK stops, the AK4420 is placed in reset mode and its analog outputs are set to VSS (0V, typ). When the MCLK and LRCK are restarted, the AK4420 returns to normal operation mode. The BICK can be stopped when MCLK or LRCK is stopped, but it must not be stopped when MCLK and LRCK are supplied.InternalStateD/A Out (Analog)D/A In (Digital) Clock InMCLK, BICK, LRCKClock InMCLK, BICK, LRCK<Case1:MCLK Stop><Case2:LRCK Stop>DZFDZFNotes:(1) Digital data can be stopped. The click noise after MCLK and LRCK are input again can be reduced by inputtingthe “0” data during this period.(2) The analog output corresponding to a specific digital input has group delay (GD). (3) No audible click noise occurs under normal conditions.(4) Clocks (MCLK, BICK, LRCK) can be stopped in the reset mode (MCLK or LRCK is stopped).(5) The AK4420 detects the stop of LRCK if LRCK stops for more than 2048/fs. When LRCK is stopped, theAK4420 exits reset mode after LRCK is inputted.. (6) The DZF pin is set to “L” in the reset mode.Figure 9. Reset Timing ExampleSYSTEM DESIGNFigure 10 shows the system connection diagram. An evaluation board (AKD4420) is available for fast evaluation as well as suggestions for peripheral circuitry.Note:Use low ESR (Equivalent Series Resistance) capacitors. When using polarized capacitors, the positive polarity pin should be connected to the CP and VSS2 pin.VSS1 and VSS2 should be separated from digital system ground.Digital input pins should not be allowed to float.Figure 10. Typical Connection Diagram1. Grounding and Power Supply DecouplingVDD, CVDD and VSS are supplied from the analog supply and should be separated from the system digital supply. Decoupling capacitors, especially 0.1μF ceramic capacitors for high frequency bypass, should be placed as near to VDD and CVDD as possible. The differential voltage between VDD and VSS pins set the analog output range. The power-up sequence between VDD and CVDD is not critical.2. Analog OutputsThe analog outputs are single-ended and centered around the VSS (ground) voltage. The output signal range is typically 2.12Vrms (typ @VDD=5V). The internal switched-capacitor filter (SCF) and continuous-time filter (CTF) attenuate the noise generated by the delta-sigma modulator beyond the audio passband. Using single a 1st -order LPF (Figure 11) can reduce noise beyond the audio passband. Figure 12 shows example in the case of 10k Ω, 100k Ω terminus.The output voltage is a positive full scale for 7FFFFFH (@24bit data) and a negative full scale for 800000H (@24bit data). The ideal output is 0V (VSS) voltage for 000000H (@24bit data). The DC offset is ±60mV or less.2.12Vrms (typ)Analog Out(fc = 154kHz, gain = -0.28dB @ 40kHz, gain = -1.04dB @ 80kHz)Figure 11. External 1storder LPF Circuit Example1OutÆ1.92Vrms (typ) Æ2.1Vrms (typ)Figure 12. External 1storder LPF Circuit Example216pin TSSOP (Unit: mm)■ Package & Lead frame materialPackage molding compound: EpoxyLead frame material: CuLead frame surface treatment: Solder (Pb free) plateAKM 4420ET XXYYY1) Pin #1 indication2) Date Code : XXYYY (5 digits)XX: Lot# YYY: Date Code3) Marketing Code : 4420ET 4) Asahi Kasei LogoREVISION HISTORYDate (YY/MM/DD) Revision Reason Page Contents 07/11/05 00 First Edition07/12/04 0113 Figure 8.The description of the click noise was corrected.Error Correction14 Figure 9.The description of the click noise was corrected.07/12/17 02 Error Correction 14 “The BICK can be stopped when MCLK or LRCK isstopped, but it must not be stopped when MCLK andLRCK are supplied.” was deleted.。

MAX232中文资料(官方版)

MAX232中文资料(官方版)

新一代 器件特性 ____________________________
♦ 对于低电压、集成 ESD 保护的应用 MAX3222E/MAX3232E/MAX3237E/MAX3241E/ MAX3246E:+3.0V 至 +5.5V、低功耗、速率高达 1Mbps、利用四个 0.1µF 电容实现真正的 RS-232 收发器 (MAX3246E 提供 UCSPTM 封装 )。 ♦ 对于低成本应用 MAX221E:±15kV ESD 保护、+5V、1µA、 具有 AutoShutdownTM 功能的单芯片 RS-232。
________________________________ 应用
便携式计算机 低功耗调制解调器 接口转换 电池供电 RS-232 系统 多点 RS-232 网络
_____________________________ 定购信息
PART MAX220CPE MAX220CSE MAX220CWE MAX220C/D MAX220EPE MAX220ESE MAX220EWE MAX220EJE MAX220MJE TEMP RANGE 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -55°C to +125°C PIN-PACKAGE 16 Plastic DIP 16 Narrow SO 16 Wide SO Dice* 16 Plastic DIP 16 Narrow SO 16 Wide SO 16 CERDIP 16 CERDIP

TC4420IJA资料

TC4420IJA资料

TC4420TC44296A HIGH-SPEED MOSFET DRIVERSORDERING INFORMATIONTemperaturePart No.LogicPackageRangeTC4420CAT Noninverting 5-Pin TO-2200°C to +70°C TC4420COA Noninverting 8-Pin SOIC 0°C to +70°C TC4420CPA Noninverting 8-Pin PDIP 0°C to +70°C TC4420EOA Noninverting 8-Pin SOIC – 40°C to +85°C TC4420EPA Noninverting 8-Pin PDIP – 40°C to +85°C TC4420IJA Noninverting 8-Pin CerDIP –25°C to +85°C TC4420MJA Noninverting 8-Pin CerDIP – 55°C to +125°C TC4429CAT Inverting 5-Pin TO-2200°C to +70°C TC4429COA Inverting 8-Pin SOIC 0°C to +70°C TC4429CPA Inverting 8-Pin PDIP 0°C to +70°C TC4429EOA Inverting 8-Pin SOIC – 40°C to +85°C TC4429EPA Inverting 8-Pin PDIP – 40°C to +85°C TC4429IJA Inverting 8-Pin CerDIP – 25°C to +85°C TC4429MJAInverting8-Pin CerDIP – 55°C to +125°CFEATURESs Latch-Up Protected ............ Will Withstand >1.5A Reverse Output Currents Logic Input Will Withstand Negative Swing Up to 5Vs ESD Protected.....................................................4kV s Matched Rise and Fall Times ......................25nsec s High Peak Output Current .........................6A Peak s Wide Operating Range ..........................4.5V to 18V s High Capacitive Load Drive ......................10,000pF s Short Delay Time .................................55nsec Typ.s Logic High Input, Any Voltage .............2.4V to V DD s Low Supply Current With Logic "1" Input...450µA s Low Output Impedance....................................2.5ΩsOutput Voltage Swing to Within 25mV of Ground or V DDAPPLICATIONSs Switch-Mode Power Supplies s Motor Controlss Pulse Transformer Driver sClass D Switching AmplifiersGENERAL DESCRIPTIONThe TC4420/4429 are 6A (peak), single output MOSFET drivers. The TC4429 is an inverting driver (pin-compatible with the TC429), while the TC4420 is a non-inverting driver.These drivers are fabricated in CMOS for lower power, more efficient operation versus bipolar drivers.Both devices have TTL-compatible inputs, which can be driven as high as V DD + 0.3V or as low as – 5V without upset or damage to the device. This eliminates the need for external level shifting circuitry and its associated cost and size. The output swing is rail-to-rail ensuring better drive voltage margin, especially during power up/power down sequencing. Propagational delay time is only 55nsec (typ.)and the output rise and fall times are only 25nsec (typ.) into 2500pF across the usable power supply range.Unlike other drivers, the TC4420/4429 are virtually latch-up proof. They replace three or more discrete compo-nents saving PCB area, parts and improving overall system reliability.FUNCTIONAL BLOCK DIAGRAMPIN CONFIGURATIONS6A HIGH-SPEED MOSFET DRIVERSTC4420TC4429ELECTRICAL CHARACTERISTICS: T A = +25°C with 4.5V ≤ V DD ≤ 18V, unless otherwise specified.SymbolParameterTest Conditions MinTypMaxUnitInput V IH Logic 1 High Input Voltage 2.4 1.8—V V ILLogic 0 Low Input Voltage — 1.30.8V V IN (Max)Input Voltage Range – 5—V DD +0.3V I IN Input Current0V ≤ V IN ≤ V DD– 10—10µA Output V OH High Output Voltage See Figure 1V DD – 0.025——V V OL Low Output VoltageSee Figure 1——0.025V R O Output Resistance, High I OUT = 10 mA, V DD = 18V — 2.1 2.8ΩR O Output Resistance, Low I OUT = 10 mA, V DD = 18V — 1.5 2.5ΩI PK Peak Output Current V DD = 18V (See Figure 5)—6—A I REVLatch-Up ProtectionDuty Cycle ≤ 2% 1.5——AWithstand Reverse Currentt ≤ 300µsecSwitching Time (Note 1)t R Rise Time Figure 1, C L = 2500pF —2535nsec t F Fall Time Figure 1, C L = 2500pF —2535nsec t D1Delay Time Figure 1—5575nsec t D2Delay Time Figure 1—5575nsec Power Supply I S Power Supply Current V IN = 3V —0.45 1.5mA V IN = 0V—55150µA V DDOperating Input Voltage4.5—18VABSOLUTE MAXIMUM RATINGS*Supply Voltage.........................................................+20V Input Voltage...............................................– 5V to > V DD Input Current (V IN > V DD ).........................................50mA Power Dissipation, (T A ≤ 70°C)PDIP ...............................................................730mW SOIC...............................................................470mW CerDIP............................................................800mW 5-Pin TO-220......................................................1.6W Package Power Dissipation, T C ≤ 25°C5-Pin TO-220 (With Heat Sink).........................12.5W Derating Factors (To Ambient)PDIP .............................................................8mW/°C SOIC.............................................................4mW/°C CerDIP.......................................................6.4mW/°C 5-Pin TO-220..............................................12mW/°C Thermal Impedances (To Case)5-Pin TO-220 R θJ-C ......................................................10°C/WStorage Temperature Range ................– 65°C to +150°C Operating Temperature (Chip)..............................+150°C Operating Temperature Range (Ambient)C Version...............................................0°C to +70°C I Version ...........................................– 25°C to +85°C E Version ..........................................– 40°C to +85°C M Version .......................................– 55°C to +125°C Lead Temperature (Soldering, 10 sec).................+300°C*Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields.Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.6A HIGH-SPEED MOSFET DRIVERSTC4420TC4429ELECTRICAL CHARACTERISTICS: Measured over operating temperature range with 4.5V ≤ V DD ≤ 18V,unless otherwise specified.SymbolParameterTest Conditions MinTypMaxUnitInput V IH Logic 1 High Input Voltage 2.4——V V ILLogic 0 Low Input Voltage ——0.8V V IN (Max)Input Voltage Range – 5—V DD + 0.3V I IN Input Current0V ≤ V IN ≤ V DD– 10—10µA Output V OH High Output Voltage See Figure 1V DD – 0.025——V V OL Low Output VoltageSee Figure 1——0.025V R O Output Resistance, High I OUT = 10mA, V DD = 18V —35ΩR OOutput Resistance, LowI OUT = 10mA, V DD = 18V —2.35ΩSwitching Time (Note 1)t R Rise Time Figure 1, C L = 2500pF —3260nsec t F Fall Time Figure 1, CL = 2500pF —3460nsec t D1Delay Time Figure 1—50100nsec t D2Delay Time Figure 1—65100nsec Power Supply I S Power Supply Current V IN = 3V —0.453mA V IN = 0V—60400µA V DDOperating Input Voltage4.5—18VNOTE: 1. Switching times guaranteed by design.Figure 1. Switching Time Test Circuit6A HIGH-SPEED MOSFET DRIVERSTC4420TC4429TYPICAL CHARACTERISTICS60402010100010,000CAPACITIVE LOAD (pF)T I M E (n s e c )Fall Time vs. Capacitive Load8010050403020100–60–202060100140T A (°C)D E L A Y T I M E (n s e c )Propagation Delay Timevs. Temperature100100010,000CAPACITIVE LOAD (pF)S U P P L Y C U R R EN T (m A )Supply Current vs. Capacitive Load84705642281465605550454035D E L A Y T I M E (n s e c )4681012141618SUPPLY VOLTAGE (V)Propagation Delay Time vs. Supply Voltaget D2t D160402010100010,000CAPACITIVE LOAD (pF)Rise Time vs. Capacitive Load80100T I M E (n s e c )100100100010,000FREQUENCY (kHz)S U P P L Y C U R R E N T (m A )Supply Current vs. Frequency101000–60–202060100140T A (°C)V (V)DD5791113155040302010T I M E (n s e c )Rise and Fall Times vs. TemperatureV (V)DD120100806040200T I M E (n s e c )Rise Time vs. Supply VoltageT I M E (n s e c )Fall Time vs. Supply Voltage6A HIGH-SPEED MOSFET DRIVERSTC4420TC44292.521.515913V (V)DDLow-State Output ResistanceR ( )ΩO U T711152001601208040D E L A Y T I M E (n s e c )567111315Effect of Input Amplitudeon Propagation Delay89101214V (V)DD567111315Total nA •S Crossover*89101214SUPPLY VOLTAGE (V)5913V (V)DDHigh-State Output ResistanceR ( )ΩO U T 71115The values on this graph representthe loss seen by the driver during one complete cycle. For a single transition, divide the value by 2.*TYPICAL CHARACTERISTICS (Cont.)6A HIGH-SPEED MOSFET DRIVERS TC4420TC44296A HIGH-SPEED MOSFET DRIVERSTC4420TC4429Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchipís products as critical components in life support systems is not authori zed except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, except as maybe explicitly expressed herein, under any intellec-tual property rights. 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MAX471MAX472的中文资料大全

MAX471MAX472的中文资料大全

MAX471/MAX472的特点、功能美国美信公司生产的精密高端电流检测放大器是一个系列化产品,有MAX471/MAX472、MAX4172/MAX4173等。

它们均有一个电流输出端,可以用一个电阻来简单地实现以地为参考点的电流/电压的转换,并可工作在较宽电压内。

MAX471/MAX472具有如下特点:●具有完美的高端电流检测功能;●内含精密的内部检测电阻(MAX471);●在工作温度范围内,其精度为2%;●具有双向检测指示,可监控充电和放电状态;●内部检测电阻和检测能力为3A,并联使用时还可扩大检测电流范围;●使用外部检测电阻可任意扩展检测电流范围(MAX472);●最大电源电流为100μA;●关闭方式时的电流仅为5μA;●电压范围为3~36V;●采用8脚DIP/SO/STO三种封装形式。

MAX471/MAX472的引脚排列如图1所示,图2所示为其内部功能框图。

表1为MAX471/MAX472的引脚功能说明。

MAX471的电流增益比已预设为500μA/A,由于2kΩ的输出电阻(ROUT)可产生1V/A的转换,因此±3A时的满度值为3V.用不同的ROUT电阻可设置不同的满度电压。

但对于MAX471,其输出电压不应大于VRS+。

对于MAX472,则不能大于。

MAX471引脚图如图1所示,MAX472引脚图如图2所示。

MAX471/MAX472的引脚功能说明引脚名称功能MAX471MAX47211SHDN关闭端。

正常运用时连接到地。

当此端接高电平时,电源电流小于5μA2,3-RS+内部电流检测电阻电池(或电源端)。

“+”仅指示与SIGN输出有关的流动方向。

封装时已将2和3连在了一起-2空脚88OUT 电流输出,它正比于流过TSENSE被测电路的幅度,在MAX741中,此引脚到地之间应接一个2kΩ电阻,每一安培被测电流将产生大小等于1V的电压OUT端为电流幅度输出端,而SIGN端可用来指示输出电流的方向。

TC4420IPA中文资料

TC4420IPA中文资料

DC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, TA = +25°C with 4.5V ≤ VDD ≤ 18V.
Parameters
Sym
Min
Typ Max Units
Conditions
Input
Logic ‘1’, High Input Voltage
Applications
• Switch-Mode Power Supplies • Motor Controls • Pulse Transformer Driver • Class D Switching Amplifiers
General Description
The TC4420/TC4429 are 6A (peak), single-output MOSFET drivers. The TC4429 is an inverting driver (pin-compatible with the TC429), while the TC4420 is a non-inverting driver. These drivers are fabricated in CMOS for lower power and more efficient operation versus bipolar drivers.
Package Types(1)
8-Pin CERDIP/ TC4420 TC4429 PDIP/SOIC
VDD 1
8
INPUT 2 TC4420 7
NC 3 TC4429 6
GND 4
5
VDD
VDD

MIC4424中文资料

MIC4424中文资料

MIC4424中⽂资料MIC4423/4424/4425 Electrical Characteristics4.5V ≤ V S ≤ 18V; T A = 25°C, bold values indicate –40°C ≤ T A ≤ +85°C; unless noted.Symbol ParameterConditionsMinTypMaxUnitsInput V IH Logic 1 Input Voltage 2.4V V IL Logic 0 Input Voltage 0.8V I IN Input Current0V ≤ V IN ≤ V S–11µA –1010µAOutput V OH High Output Voltage V S –0.025V V OL Low Output Voltage 0.025V R OOutput Resistance HI StateI OUT = 10mA, V S = 18V2.85?V IN = 0.8V, I OUT = 10mA, V S = 18V3.78?Output Resistance LO StateI OUT = 10mA, V S = 18V3.55?V IN = 2.4V, I OUT = 10mA, V S = 18V4.38I PK Peak Output Current 3A ILatch-Up Protection>500mAWithstand Reverse CurrentSwitching Time (Note 4)t R Rise Time test Figure 1, C L = 1800pF 2335ns 2860ns t F Fall Time test Figure 1, C L = 1800pF 2535ns 3260ns t D1Delay Tlme test Ffigure 1, C L = 1800pF 3375ns 32100ns t D2Delay Timetest Figure 1, C L = 1800pF3875ns 38100nsPower Supply I S Power Supply Current V IN = 3.0V (both inputs) 1.5 2.5mA 2 3.5mA I SPower Supply CurrentV IN = 0.0V (both inputs)0.150.25mA 0.20.3mANote 1.Exceeding the absolute maximum rating may damage the device.Note 2.The device is not guaranteed to function outside its operating rating.Note 3.Devices are ESD sensitive. Handling precautions recommended. ESD tested to human body model, 1.5k in series with 100pF.Note 4.Switching times guaranteed by design.Absolute Maximum Ratings (Note 1)Supply Voltage (22)Input Voltage.................................V S + 0.3V to GND – 5V Junction Temperature ..............................................150°C Storage Temperature Range ....................–65°C to 150°C Lead Temperature (10 sec.).....................................300°C ESD Susceptability, Note 3.. (1000V)Operating Ratings (Note 2)Supply Voltage (V S )....................................+4.5V to +18V Temperature RangeC Version ..................................................0°C to +70°C B Version...............................................–40°C to +85°C Package Thermal ResistanceDIP θJA .............................................................130°C/W DIP θJC ...............................................................42°C/W Wide-SOIC θJA .................................................120°C/W Wide-SOIC θJC ...................................................75°C/W SOIC θJA ..........................................................120°C/W SOIC θJC ............................................................75°C/WApplication InformationAlthough the MIC4423/24/25 drivers have been specifically constructed to operate reliably under any practical circumstances, there are nonetheless details of usage which will provide better operation of the device.Supply BypassingCharging and discharging large capacitive loads quickly requires large currents. For example, charging 2000pF from 0 to 15 volts in 20ns requires a constant current of 1.5A. In practice, the charging current is not constant, and will usually peak at around 3A. In order to charge the capacitor, the driver must be capable of drawing this much current, this quickly, from the system power supply. In turn, this means that as far as the driver is concerned, the system power supply, as seen by the driver, must have a VERY low impedance.As a practical matter, this means that the power supply bus must be capacitively bypassed at the driver with at least 100X the load capacitance in order to achieve optimum driving speed. It also implies that the bypassing capacitor must have very low internal inductance and resistance at all frequencies of interest. Generally, this means using two capacitors, one a high-performance low ESR film, the other a low internal resistance ceramic, as together the valleys in their two impedance curves allow adequate performance over a broad enough band to get the job done. PLEASE NOTE that many film capacitors can be sufficiently inductive as to be useless for this service. Likewise, many multilayer ceramic capacitors have unacceptably highinternal resistance. Use capacitors intended for high pulse current service (in-house we use WIMA? film capacitors and AVX Ramguard? ceramics; several other manufacturers of equivalent devices also exist). The high pulse current demands of capacitive drivers also mean that the bypass capacitors must be mounted very close to the driver in order to prevent the effects of lead inductance or PCB land inductance from nullifying what you are trying to accomplish. For optimum results the sum of the lengths of the leads and the lands from the capacitor body to the driver body should total 2.5cm or less.Bypass capacitance, and its close mounting to the driver serves two purposes. Not only does it allow optimum performance from the driver, it minimizes the amount of lead length radiating at high frequency during switching, (due to the large ? I) thus minimizing the amount of EMI later available for system disruption and subsequent cleanup. It should also be noted that the actual frequency of the EMI produced by a driver is not the clock frequency at which it is driven, but is related to the highest rate of change of current produced during switching, a frequency generally one or two orders of magnitude higher, and thus more difficult to filter if you let it permeate your system. Good bypassing practice is essential to proper operation of high speed driver ICs. GroundingBoth proper bypassing and proper grounding are necessary for optimum driver operation. Bypassing capacitance only allows a driver to turn the load ON. Eventually (except in rare circumstances) it is also necessary to turn the load OFF. This requires attention to the ground path. Two things other than the driver affect the rate at which it is possible to turn a load off: The adequacy of the grounding available for the driver, and the inductance of the leads from the driver to the load. The latter will be discussed in a separate section.Best practice for a ground path is obviously a well laid out ground plane. However, this is not always practical, and a poorly-laid out ground plane can be worse than none. Attention to the paths taken by return currents even in a ground plane is essential. In general, the leads from the driver to its load, the driver to the power supply, and the driver to whatever is driving it should all be as low in resistance and inductance as possible. Of the three paths, the ground lead from the driver to the logic driving it is most sensitive to resistance or inductance, and ground current from the load are what is most likely to cause disruption. Thus, these ground paths should be arranged so that they never share a land, or do so for as short a distance as is practical.To illustrate what can happen, consider the following: The inductance of a 2cm long land, 1.59mm (0.062") wide on a PCB with no ground plane is approximately 45nH. Assuming a dl/dt of 0.3A/ns (which will allow a current of 3A to flow after 10ns, and is thus slightly slow for our purposes) a voltage of 13.5 Volts will develop along this land in response to our postulated Ι. For a 1cm land, (approximately 15nH) 4.5 Volts is developed. Either way, anyone using TTL-level input signals to the driver will find that the response of their driver has been seriously degraded by a common ground path for input to and output from the driver of the given dimensions. Note that this is before accounting for any resistive drops in the circuit. The resistive drop in a 1.59mm (0.062") land of 2oz. Copper carrying 3A will be about 4mV/cm (10mV/in) at DC, and the resistance will increase with frequency as skin effect comes into play.The problem is most obvious in inverting drivers where the input and output currents are in phase so that any attempt to raise the driver’s input voltage (in order to turn the driver’s load off) is countered by the voltage developed on the common ground path as the driver attempts to do what it was supposed to. It takes very little common ground path, under these circumstances, to alter circuit operation drastically.Output Lead InductanceThe same descriptions just given for PCB land inductance apply equally well for the output leads from a driver to its load, except that commonly the load is located much further away from the driver than the driver’s ground bus.Generally, the best way to treat the output lead inductance problem, when distances greater than 4cm (2") are involved, requires treating the output leads as a transmission line. Unfortunately, as both the output impedance of the driver and the input impedance of the MOSFET gate are at least an order of magnitude lower than the impedance of common coax, using coax is seldom a cost-effective solution. A twisted pair works about as well, is generally lower in cost, and allows use of a wider variety of connectors. The second wire of the twisted pair should carry common from as close as possibleto the ground pin of the driver directly to the ground terminal of the load. Do not use a twisted pair where the second wire in the pair is the output of the other driver, as this will not provide a complete current path for either driver. Likewise, do not use a twisted triad with two outputs and a common return unless both of the loads to be driver are mounted extremely close to each other, and you can guarantee that they will never be switching at the same time.For output leads on a printed circuit, the general rule is to make them as short and as wide as possible. The lands should also be treated as transmission lines: i.e. minimize sharp bends, or narrowings in the land, as these will cause ringing. For a rough estimate, on a 1.59mm (0.062") thick G-10 PCB a pair of opposing lands each 2.36mm (0.093") wide translates to a characteristic impedance of about 50?. Half that width suffices on a 0.787mm (0.031") thick board. For accurate impedance matching with a MIC4423/24/25 driver, on a 1.59mm (0.062") board a land width of 42.75mm (1.683") would be required, due to the low impedance of the driver and (usually) its load. This is obviously impractical under most circumstances. Generallythe tradeoff point between lands and wires comes when lands narrower than 3.18mm (0.125") would be required on a1.59mm (0.062") board.To obtain minimum delay between the driver and the load, it is considered best to locate the driver as close as possible to the load (using adequate bypassing). Using matching transformers at both ends of a piece of coax, or several matched lengths of coax between the driver and the load, works in theory, but is not optimum.Driving at Controlled RatesOccasionally there are situations where a controlled rise or fall time (which may be considerably longer than the normal rise or fall time of the driver’s output) is desired for a load. In such cases it is still prudent to employ best possible practice in terms of bypassing, grounding and PCB layout, and then reduce the switching speed of the load (NOT the driver) by adding a noninductive series resistor of appropriate value between the output of the driver and the load. For situations where only rise or only fall should be slowed, the resistor can be paralleled with a fast diode so that switching in the other direction remains fast. Due to the Schmitt-trigger action of the driver’s input it is not possible to slow the rate of rise (or fall) of the driver’s input signal to achieve slowing of the output. Input StageThe input stage of the MIC4423/24/25 consists of a single-MOSFET class A stage with an input capacitance of ≤38pF. This capacitance represents the maximum load from the driver that will be seen by its controlling logic. The drain load on the input MOSFET is a –2mA current source. Thus, the quiescent current drawn by the driver varies, depending on the logic state of the input.Following the input stage is a buffer stage which provides ~400mV of hysteresis for the input, to prevent oscillations when slowly-changing input signals are used or when noise is present on the input. Input voltage switching threshold is approximately 1.5V which makes the driver directly compatible with TTL signals, or with CMOS powered from any supply voltage between 3V and 15V.The MIC4423/24/25 drivers can also be driven directly by the SG1524/25/26/27, TL494/95, TL594/95, NE5560/61/62/68, TSC170, MIC38C42, and similar switch mode power supply ICs. By relocating the main switch drive function into the driver rather than using the somewhat limited drive capabilities of a PWM IC. The PWM IC runs cooler, which generally improves its performance and longevity, and the main switches switch faster, which reduces switching losses and increase system efficiency.The input protection circuitry of the MIC4423/24/25, in addition to providing 2kV or more of ESD protection, also works to prevent latchup or logic upset due to ringing or voltage spiking on the logic input terminal. In most CMOS devices when the logic input rises above the power supply terminal, or descends below the ground terminal, the device can be destroyed or rendered inoperable until the power supply is cycled OFF and ON. The MIC4423/24/25 drivers have been designed to prevent this. Input voltages excursions as great as 5V below ground will not alter the operation of the device. Input excursions above the power supply voltage will result in the excess voltage being conducted to the power supply terminal of the IC. Because the excess voltage is simply conducted to the power terminal, if the input to the driver is left in a high state when the power supply to the driver is turned off, currents as high as 30mA can be conducted through the driver from the input terminal to its power supply terminal. This may overload the output of whatever is driving the driver, and may cause other devices that share the driver’s power supply, as well as the driver, to operate when they are assumed to be off, but it will not harm the driver itself. Excessive input voltage will also slow the driver down, and result in much longer internal propagation delays within the drivers. T D2, for example, may increase to several hundred nanoseconds. In general, while the driver will accept this sort of misuse without damage, proper termination of the line feeding the driver so that line spiking and ringing are minimized, will always result in faster and more reliable operation of the device, leave less EMI to be filtered elsewhere, be less stressful to other components in the circuit, and leave less chance of unintended modes of operation. Power DissipationCMOS circuits usually permit the user to ignore power dissipation. Logic families such as 4000 series and 74Cxxx have outputs which can only source or sink a few milliamps of current, and even shorting the output of the device to ground or V CC may not damage the device. CMOS drivers, on the other hand, are intended to source or sink several Amps of current. This is necessary in order to drive large capacitive loads at frequencies into the megahertz range. Package power dissipation of driver ICs can easily be exceeded when driving large loads at high frequencies. Care must therefore be paid to device dissipation when operating in this domain. The Supply Current vs Frequency and Supply Current vs Load characteristic curves furnished with this data sheet aidin estimating power dissipation in the driver. Operating frequency, power supply voltage, and load all affect power dissipation.Given the power dissipation in the device, and the thermal resistance of the package, junction operating temperature for any ambient is easy to calculate. For example, the thermal resistance of the 8-pin plastic DIP package, from the datasheet, is150°C/W. In a 25°C ambient, then, using a maximum junction temperature of 150°C, this package will dissipate 960mW. Accurate power dissipation numbers can be obtained by summing the three sources of power dissipation in the device:? Load power dissipation (P L)Quiescent power dissipation (P Q)Transition power dissipation (P T)Calculation of load power dissipation differs depending on whether the load is capacitive, resistive or inductive. Resistive Load Power DissipationDissipation caused by a resistive load can be calculated as: P L = I2 R O Dwhere:I =the current drawn by the loadR O =the output resistance of the driver when theoutput is high, at the power supply voltage used(See characteristic curves)D =fraction of time the load is conducting (duty cycle) Capacitive Load Power DissipationDissipation caused by a capacitive load is simply the energy placed in, or removed from, the load capacitance by the driver. The energy stored in a capacitor is described by the equation:E = 1/2 C V2As this energy is lost in the driver each time the load is charged or discharged, for power dissipation calculations the 1/2 is removed. This equation also shows that it is good practice not to place more voltage in the capacitor than is necessary, as dissipation increases as the square of the voltage applied to the capacitor. For a driver with a capacitive load:P L = f C (V S)2where:f =Operating FrequencyC =Load CapacitanceV S =Driver Supply VoltageInductive Load Power DissipationFor inductive loads the situation is more complicated. For the part of the cycle in which the driver is actively forcing current into the inductor, the situation is the same as it is in the resistive case:P L1 = I2 R O DHowever, in this instance the R O required may be either the on resistance of the driver when its output is in the high state, or its on resistance when the driver is in the low state, depending on how the inductor is connected, and this is still only half the story. For the part of the cycle when the inductor is forcing current through the driver, dissipation is best described asP L2 = I V D (1 – D)where V D is the forward drop of the clamp diode in the driver (generally around 0.7V). The two parts of the load dissipation must be summed in to produce P LP L = P L1 + P L2Quiescent Power DissipationQuiescent power dissipation (P Q, as described in the input section) depends on whether the input is high or low. A low input will result in a maximum current drain (per driver) of ≤0.2mA; a logic high will result in a current drain of ≤2.0mA. Quiescentpower can therefore be found from:P Q = V S [D I H + (1 – D) I L]where:I H =quiescent current with input highI L =quiescent current with input lowD = fraction of time input is high (duty cycle)V S =power supply voltageTransition Power DissipationTransition power is dissipated in the driver each time its output changes state, because during the transition, for a very brief interval, both the N- and P-channel MOSFETs in the output totem-pole are ON simultaneously, and a current is conducted through them from V S to ground. The transition power dissipation is approximately:P T = f V S (A?s)where (A?s) is a time-current factor derived from Figure 2.Total power (P D) then, as previously described is justP D = P L + P Q +P TExamples show the relative magnitude for each term.EXAMPLE 1: A MIC4423 operating on a 12V supply driving two capacitive loads of 3000pF each, operating at 250kHz, with a duty cycle of 50%, in a maximum ambient of 60°C.First calculate load power loss:P L = f x C x (V S)2P L= 250,000 x (3 x 10–9 + 3 x 10–9) x 122= 0.2160WThen transition power loss:P T = f x V S x (A?s)= 250,000 ? 12 ? 2.2 x 10–9 = 6.6mWThen quiescent power loss:P Q= V S x [D x I H + (1 – D) x I L]= 12 x [(0.5 x 0.0035) + (0.5 x 0.0003)]= 0.0228WTotal power dissipation, then, is:P D= 0.2160 + 0.0066 + 0.0228= 0.2454WAssuming an SOIC package, with an θJA of 120°C/W, this will result in the junction running at:0.2454 x 120 = 29.4°Cabove ambient, which, given a maximum ambient temperature of 60°C, will result in a maximum junction temperature of 89.4°C.EXAMPLE 2: A MIC4424 operating on a 15V input, with one driver driving a 50? resistive load at 1MHz, with a duty cycle of67%, and the other driver quiescent, in a maximum ambient temperature of 40°C:P L = I2 x R O x DFirst, I O must be determined.I O = V S / (R O + R LOAD)Given R O from the characteristic curves then,I O = 15 / (3.3 + 50)I O = 0.281Aand:P L= (0.281)2 x 3.3 x 0.67= 0.174WP T= F x V S x (A?s)/2(because only one side is operating)= (1,000,000 x 15 x 3.3 x 10–9) / 2= 0.025 Wand:P Q = 15 x [(0.67 x 0.00125) + (0.33 x 0.000125) +(1 x 0.000125)](this assumes that the unused side of the driver has its input grounded, which is more efficient)= 0.015Wthen:P D= 0.174 + 0.025 + 0.0150= 0.213WIn a ceramic package with an θJA of 100°C/W, this amount of power results in a junction temperature given the maximum 40°C ambient of:(0.213 x 100) + 40 = 61.4°CThe actual junction temperature will be lower than calculated both because duty cycle is less than 100% and because the graph lists R DS(on) at a T J of 125°C and the R DS(on) at 61°C T J will be somewhat lower.DefinitionsC L =Load Capacitance in Farads.D =Duty Cycle expressed as the fraction of time the inputto the driver is high.f =Operating Frequency of the driver in HertzI H =Power supply current drawn by a driver when bothinputs are high and neither output is loaded.I L =Power supply current drawn by a driver when bothinputs are low and neither output is loaded.I D =Output current from a driver in Amps.P D =Total power dissipated in a driver in Watts.P L =Power dissipated in the driver due to the driver’s load in Watts.P Q =Power dissipated in a quiescent driver in Watts.P T=Power dissipated in a driver when the output changes states (“shoot-through current”) in Watts. NOTE: The “shoot-through” current from a dual transition (onceup, once down) for both drivers is stated in the graphon the following page in ampere-nanoseconds. Thisfigure must be multiplied by the number of repetitionsper second (frequency to find Watts).R O=Output resistance of a driver in Ohms.V S=Power supply voltage to the IC in Volts.。

MAX490EESA+资料

MAX490EESA+资料

Supply Control
Voltage (VCC) Input Voltage
.(.–R—..E.–..,..D..E..)........................................-.0....5..V...t.o...(.V..C...C...+...0...152VV)
♦ For Low-Voltage Applications: MAX3483E/MAX3485E/MAX3486E/MAX3488E/ MAX3490E/MAX3491E: +3.3V Powered, ±15kV ESD-Protected, 12Mbps, Slew-Rate-Limited, True RS-485/RS-422 Transceivers
General Description
The MAX481E, MAX483E, MAX485E, MAX487E– MAX491E, and MAX1487E are low-power transceivers for RS-485 and RS-422 communications in harsh environments. Each driver output and receiver input is protected against ±15kV electro-static discharge (ESD) shocks, without latchup. These parts contain one driver and one receiver. The MAX483E, MAX487E, MAX488E, and MAX489E feature reduced slew-rate drivers that minimize EMI and reduce reflections caused by improperly terminated cables, thus allowing error-free data transmission up to 250kbps. The driver slew rates of the MAX481E, MAX485E, MAX490E, MAX491E, and MAX1487E are not limited, allowing them to transmit up to 2.5Mbps.

AS4420_Datasheet_Rev_B

AS4420_Datasheet_Rev_B

AS4420 / AS4429FEATURES• Latch Up Protected . . . . . . . . . . . . . . . . . . . . . . . . . >1.5A• Logic Input Swing . . . . . . . . . . . . . . . . . . . . . Negative 5V •ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4kV • Matched Rise and Fall Times . . . . . . . . . . . . . . . . . . 20ns APPLICATIONS• Motor Controls• Switch-Mode Power Supplies • Pulse Transformer Driver • Class D Switching AmplifiersDESCRIPTIONThe AS4420 and AS4429 family operate over 4.5V to 18V, can withstand high current peaking of 6A and have matched rise and fall times under 25ns. The product has been designed utilizing Calogic’s rugged CMOS process with protection for latch up and ESD. The product is available in inverting (AS4429) and noninverting (AS4420) configurations. ORDERING INFORMATIONPart# Logic Package Temperature Range AS4420P Noninverting 8-Pin PDIP -40C to +85 CAS4420S Noninverting 8-Pin SOIC -40C to +85CAS4429P Inverting 8-Pin PDIP -40C to +85CAS4429S Inverting8-Pin SOIC -40C to +85CHigh Speed MOSFET DriversLLCFUNCTIONAL DIAGRAM AND PIN CONFIGURATIONSINPUTGNDV D D I N P U T 2 N C 3 G N D 4EFFECTIVE INPUT C = 38pF1L-134.7VDIP8 D D 7 O U T P U T 6 O U T P U TGND5500ì1A-07300mVAS4420 / AS4429V D INPUT N C GND1234SOIC8 7 6 5V D OUTPUT OUTPUT GND1A-08D DOUTPUTInput Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5V to >V DD Input Current (V IN > V DD). . . . . . . . . . . . . . . . . . . . . . . . 50mA Power Dissipation, T A < 25o CPDIP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . 1W SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . 500mW Derating Factors (To Ambient)PDIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . 8mW/o C SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . 4mW/o C Storage Temperature Range . . . . . . . . . . . . -55o C to +150o C Operating Temperature (Chip). . . . . . . . . . . . . . . . . . . +150o C Operating Temperature Range (Ambient)C Version . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0o C to +70o CE Version . . . . . . . . . . . . . . . . . . . . . . . . . . -40o C to +85o C Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . +300o C conductive material. Protect devices from static discharge and static fields. Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended-periods may affect device reliability.ELECTRICAL CHARACTERISTICS: T A = +25o C with 4.5V < V DD < 18V, unless otherwise specified.SYMBOL PARAMETER MINTYPMAXUNIT TESTCONDITIONS INPUTV IH Logic 1 High Input Voltage 2.4 1.8 VV IL Logic 0 Low Input Voltage 1.3 0.8 VV IN (Max) Input Voltage Range -5 V DD+0.3 VI IN Input Current -10 10 A0V< V IN < V DDOUTPUTV OH High Output Voltage V DD-0.025 V See Figure 1V OL Low Output Voltage 0.025 VSee Figure 1R O Output Resistance, High 2.1 2.8 I OUT = 10mA, V DD = 18VR O Output Resistance, Low 1.5 2.5 I OUT = 10mA, V DD = 18VI PK Peak Output Current 6 A V DD = 18V (See Figure 5)I REV L a t c h-U p P r o t e c t i o nWithstand Reverse Current >1.5tADuty Cycle < 2%< 300ìASWITCHING TIME (Note 1)t R Rise Time 25 35 ns Figure 1, C L = 2500pF t F Fall Time 25 35 nsFigure 1, C L = 2500pF t D1 Delay Time 20 40 nsFigure1t D2 Delay Time 20 40 nsFigure1 POWER SUPPLYI S Power Supply Current 1551.5150m AAV I N=3VV IN = 0VV DDOperating Input Voltage 4.5 18 VLLCELECTRICAL CHARACTERISTICS:Measured over operating temperature range with 4.5V ~ V DD ~ 18V, unless otherwise specified.SYMBOL PARAMETER MIN TYP MAX UNITTEST CONDITIONSINPUT V IH Logic 1 High Input Voltage 2.4VV IL Logic 0 Low Input Voltage0.8 VV IN (Max) Input Voltage Range -5 V DD +0.3 VI INInput Current-1010L A 0V ~ V IN ~ V SOUTPUT V OH High Output Voltage V DD -0.025V See Figure 1 V OLLow Output Voltage0.025VSee Figure 1R O Output Resistance, High3 5I OUT = 10mA, V DD = 18VR O Output Resistance, Low2.3 5ΩIO UT= 10mA, V DD = 18VSWITCHING TIME (Note 1) t RRise Time32 60 ns Figure 1, C L = 2500pF t F Fall Time 3460nsFigure 1, C L = 2500pFt D1 Delay Time 20 50 ns Figure 1 t D2Delay Time20 50 ns Figure 1POWER SUPPLY I SPower Supply Current1603 400m A LV I N = 3V V IN = 0V V DDOperating Input Voltage4.518 VNote: 1. Switching times guaranteed by design.AS4420 / AS4429LLCFIGURE 1. SWITCHING TIME TEST CIRCUITINPUT0.1LF241V DD = 18V856 70.1LF0.1LFC L = 2500pFOUTPUT1A-09OUTPUTINPUT≈0.4V+1 8V+5V0V10%INPUT: 100kHz, SQUARE WAVE,t RISE = FA LL ~ 10nS90%D110%t FD290%10%t R90%1A-10AS4420 / AS4429TYPICAL CHARACTERISTICS CURVES120 10080604020100 80403020105040602010 _________________________________ 1000 10,0000 _________________________________ -60 -20 20 60 100 1405 7 9 11 13 15C L = 2200pFVDD = 18VV DD = 12VV DD = 1 8VRISE AND FALL TIMESvs TEMPERATURERISE TIME vs SUPPLY VOLTAGEFALL TIME vs CAPACITIVE LOADV DD = 5VCAPACITVE LOAD (pF)tFALV D D (V )T A (˚C)tRISEC L = 10,000 pFC L = 4700 pF C L = 2200 pF1L-141L-161L-18100100806040204080602065 60555045 4035410 _________________________________1000 10,0005 7 9 11 13 15PROPAGATION DELAY TIME vs SUPPLY VOLTAGEV DD = 12VV D D = 18V6 8 10 12 14 16 18V DD = 5VRISE TIME vs CAPACITIVE LOADFALL TIME vs SUPPLY VOLTAGECAPACITVE LOAD (pF)SUPPLY VOLTAGE (V)tD2tD1V D D (V )C L = 10,000 pFC L = 4700 pF C L = 2200 pF1A-161L-171L-15AS4420 / AS4429LLCTYPICAL CHARACTERISTICS CURVES (Cont.)10001002.51.5402050 30101020 _________________________________ -60 -20 20 60 100 14010 100 1000 10,0005 7 9 11 13 15C L = 2200pFC L = 2200pFVDD = 18VPROPAGATION DELAY TIMEvs TEMPERATUREtD2LOW-STATE OUTPUTRESISTANCEtD1SUPPLY CURRENTvs FREQUENCYFREQUENCY (kHz)V D D (V )T A (˚C)100mA50mA1 0mA1 8V1 0V 5V1A-191A-231A-171600 1400 1200 1000 800600 400 200847056422814042530 100 1000 10,00020 406080 100 1205 7 9 11 13 15VDD = 15VTHERMAL DERATING CURVEAMBIENT TEMPERATURE (˚C)10mAHIGH-STATE OUTPUTRESISTANCE50mA SUPPLY CURRENT vs CAPACITY LOADCAPACITIVE LOAD (pF)100mAV D D (V )500kHz00kHz20kHz8 DIP 8 S O I C 8 CerDIP1A-181 L-191A-22V DDOUT OUTGNDIN V DDGND GND20043LOAD = 2200pF160120 INPUT 2.4V 2INPUT 3V 80INPUT 5V140INPUT 8V AND 10VV D D (V )1A-24SUPPLY VOLTAGE (V)1A-25TYPICAL CHARACTERISTICS CURVES (Cont.)5 6 7 8 9 10 11 12 13 14 15EFFECT OF INPUT AMPLITUDE ON PROPAGATION DELAY* The values on this graph represent the loss seen by the driver during one complete cycle.For a single transition, divide the value by 2.5 6 7 8 9 10 11 12 13 14 15TOTAL nA•S CROSSOVER*AS4420 / AS4429LLCDIE SIZE 76x77 (mm)。

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