MMBTA70LT1中文资料

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MMBT3904LT1G中文资料

MMBT3904LT1G中⽂资料MMBT3904LT1Preferred DeviceGeneral Purpose Transistor NPN SiliconFeaturesPbFree Packages are AvailableMAXIMUM RATINGSTHERMAL CHARACTERISTICS2.Alumina = 0.4 0.3 0.024 in. 99.5% alumina.COLLECTOR1BASE2EMITTER/doc/cd6340d926fff705cc170a4c.htmlPreferred devices are recommended choices for future use and best overall value. Device Package Shipping?ORDERING INFORMATIONMMBT3904LT1SOT?233000 / Tape & Reel MMBT3904LT1G SOT?233000 / Tape & Reel MMBT3904LT3SOT?2310000 / Tape & ReelFor information on tape and reel specifications, including part orientation and tape sizes, please refer to our T ape and Reel Packaging Specifications Brochure, BRD8011/D.SOT?23 (TO?236)CASE 318Style 6MARKINGDIAGRAM1AM1AM= Specific Device CodeMMBT3904LT3G SOT?2310000 / Tape & ReelELECTRICAL CHARACTERISTICS (T A = 25°C unless otherwise noted)OFF CHARACTERISTICSON CHARACTERISTICS (Note 3)SMALL?SIGNAL CHARACTERISTICSSWITCHING CHARACTERISTICSFigure 1. Delay and Rise Time Equivalent Test Circuit Figure 2. Storage and Fall Time Equivalent Test Circuit 010 < t1 < 500 m* T otal shunt capacitance of test jig and connectorsTYPICAL TRANSIENT CHARACTERISTICSFigure 3. CapacitanceREVERSE BIAS VOLTAGE (VOLTS)2.03.05.07.0101.00.1Figure 4. Charge DataI C , COLLECTOR CURRENT (mA)1.02.03.0 5.07.01020305070100200C A P A C I T A N C E (p F )1.02.03.0 5.07.010200.20.30.50.7T J = 25°C T J = 125°C7010020030050050T I M E (n s )5Figure 7. Storage Time I C , COLLECTOR CURRENT (mA)Figure 8. Fall Time I C , COLLECTOR CURRENT (mA)1030720 1.02.03.01020701005.07.0305020070100200300500501.02.03.010207051005.07.030502001030720t , S T O R A G E T I M E (n s )s ′TYPICAL AUDIO SMALL?SIGNAL CHARACTERISTICSNOISE FIGURE VARIATIONS(V CE = 5.0 Vdc, T A = 25°C, Bandwidth = 1.0 Hz)Figure 9. f, FREQUENCY (kHz)468101220.1Figure 10.R S , SOURCE RESISTANCE (k OHMS)N F , N O I S E F I G U R E (d B )1.02.04.01020400.20.401000.11.02.04.01020400.20.4100h PARAMETERS(V CE = 10 Vdc, f = 1.0 kHz, T A = 25°C)Figure 11. Current GainI C , COLLECTOR CURRENT (mA)7010020030050Figure 12. Output AdmittanceI C , COLLECTOR CURRENT (mA)h , C U R R E N T G A I Nh , O U T P U T A D M I T T A N C E ( m h o s )Figure 13. Input ImpedanceI C , COLLECTOR CURRENT (mA)Figure 14. Voltage Feedback RatioI C , COLLECTOR CURRENT (mA)3010050510202.03.05.07.0101.00.10.21.02.0 5.00.5100.30.5 3.00.72.05.010201.00.20.5o e h , V O L T A G E F E E D B A C K R A T I O (X 10 ) r e h , I N P U T I M P E D A N C E (k O H M S )i e 0.10.21.02.0 5.0100.30.5 3.00.10.21.02.0 5.0100.30.5 3.0210.10.21.02.0 5.0100.30.5 3.0f e m ?4TYPICAL STATIC CHARACTERISTICSFigure 15. DC Current GainI C , COLLECTOR CURRENT (mA)0.30.50.71.02.00.20.1h , D C C U R R E N T G A I N (N O R M A L I Z E D )0.5 2.0 3.010500.20.30.11.00.730205.07.0F E Figure 16. Collector Saturation RegionI B , BASE CURRENT (mA)0.40.60.81.00.20.1V , C O L L E C T O R E M I T T E R V O L T A G E (V O L T S )0.5 2.0 3.0100.20.301.00.7 5.07.0CE 0.070.050.030.020.01Figure 17. “ON” Voltages I C , COLLECTOR CURRENT (mA)0.40.60.8 1.01.20.2Figure 18. Temperature CoefficientsI C , COLLECTOR CURRENT (mA)V , V O L T A G E (V O L T S )0? 0.500.51.0C O E F F I C I E N T (m V / C )1.0 1.52.0°PACKAGE DIMENSIONSSOT?23 (TO?236)CASE 318?08ISSUE AHNOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: INCH.3.MAXIMUM LEAD THICKNESS INCLUDES LEAD STYLE 6:PIN 1.BASE2.EMITTER3.COLLECTOR*For additional information on our Pb?Free strategy and solderingdetails, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT*ǒmm inchesǔSCALE 10:1Figure 19. SOT?23ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an EqualOpportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。

BAV70LT1中文资料

LESHAN RADIO COMPANY, LTD. Monolithic Dual Switching DiodeCommon Cathode共阴极单片双开关二极管3CATHODE阴极DEVICE MARKING器件标识BAV70LT131ANODE阳极 12 2ANODE阳极CASE 318-08, STYLE 9SOT-23 (TO-236AB)BAV70LT1 = A4MAXIMUM RATINGS (EACH DIODE) 最大额定值Rating Symbol Value Unit Reverse Voltage反向电压V R 70 VdcForward Current正向电流I F 200 mAdcPeak Forward Surge Current正向浪涌电流峰值I FM(surge) 500 mAdcTHERMAL CHARACTERISTICS热特性Characteristic Symbol Max Unit Total Device Dissipation FR- 5 Board (1) P D 225 mWT A = 25°CDerate above 25°C FR – 5板的器件总功耗 1.8 mW/°CThermal Resistance, Junction to Ambient R θJA 556 °C/WTotal Device Dissipation P D 300 mWAlumina Substrate, (2) T A = 25°CDerate above 25°C氧化铝基板的器件总功耗 2.4 mW/°CThermal Resistance, Junction to Ambient热阻，结到环境R θJA 417 °C/WJunction and Storage Temperature结温和存储温度T J , T stg -55 to +150 °CELECTRICAL CHARACTERISTICS (T A = 25°C unless otherwise noted) (EACH DIODE)电气特性Characteristic Symbol Min Max Unit OFF CHARACTERISTICS开关特性Reverse Breakdown Voltage反向击穿电压(I (BR) = 100 µAdc)Reverse Voltage Leakage Current反向漏电流电压(V R = 25 Vdc, T J = 150°C)(V R = 70 Vdc)(V R = 70 Vdc, T J = 150°C)Diode Capacitance二极管电容(V R = 0, f = 1.0 MHz) V (BR) 70 —VdcI R µAdc—60— 2.5—100C D — 1.5 pFForward Voltage正向电压(I F = 1.0 mAdc)(I F = 10 mAdc)(I F = 50 mAdc)(I F = 150 mAdc)Reverse Recovery Time反向恢复时间 R L = 100 Ω(I F = I R = 10 mAdc, V R = 5.0 Vdc, I R(REC) = 1.0 mAdc) (Figure 1) V F mVdc—715—855—1000—1250t rr — 6.0 ns1. FR-5 = 1.0 x 0.75 x 0.062 in.2. Alumina = 0.4 x 0.3 x 0.024 in. 99.5% alumina.G5-1/1。

MMBFJ177LT1G;MMBFJ177LT1;中文规格书,Datasheet资料

© Semiconductor Components Industries, LLC, 2011 August, 2011 − Rev. 51Publication Order Number:MMBFJ177LT1/DMMBFJ177LT1GJFET ChopperP−Channel − DepletionFeatures•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS CompliantMAXIMUM RATINGSRating Symbol Value Unit Drain−Gate Voltage V DG25Vdc Reverse Gate−Source Voltage V GS(r)−25Vdc Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. THERMAL CHARACTERISTICSTotal Device Dissipation FR−5 Board(Note 1)T A = 25°CDerate above 25°C P D2251.8mWmW/°CThermal Resistance, Junction−to−AmbientR q JA556°C/W Junction and Storage Temperature T J, T stg−55 to +150°C 1.FR−5 = 1.0 0.75 0.062 in.MARKING DIAGRAMSOT−23 (TO−236AB)CASE 318−08STYLE 103GATE1 DRAINDevice Package Shipping†ORDERING INFORMATIONMMBFJ177LT1G SOT−23(Pb−Free)3000 Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our T ape and Reel Packaging Specifications Brochure, BRD8011/D.16Y M GG6Y= Specific Device CodeM= Date Code*G= Pb−Free Package*Date Code orientation and/or overbar mayvary depending upon manufacturing location.(Note: Microdot may be in either location)2ELECTRICAL CHARACTERISTICS (T A = 25°C unless otherwise noted)CharacteristicSymbolMinMaxUnitOFF CHARACTERISTICSGate −Source Breakdown Voltage (V DS = 0, I D = 1.0 m Adc)V (BR)GSS 30−Vdc Gate Reverse Current (V DS = 0 Vdc, V GS = 20 Vdc)I GSS − 1.0nAdc Gate Source Cutoff Voltage (V DS = 15 Vdc, I D = 10 nAdc)V GS(off)0.82.5VdcON CHARACTERISTICSZero −Gate −V oltage Drain Current (V GS = 0, V DS = 15 Vdc) (Note 2)I DSS 1.520mAdc Drain Cutoff Current (V DS = 15 Vdc, V GS = 10 Vdc)I D(off)− 1.0nAdc Drain Source On Resistance (I D = 500 m Adc)r DS(on)−300W Input CapacitanceV DS = 0, V GS = 10 Vdcf = 1.0 MHzC iss −11pFReverse Transfer CapacitanceC rss−5.52.Pulse Test: Pulse Width < 300 m s, Duty Cycle ≤ 2%.TYPICAL CHARACTERISTICSFigure 1. Drain Current vs. Drain −SourceVoltageFigure 2. Reverse Transfer CapacitanceV DS , DRAIN −SOURCE VOLTAGE (V)V DS , DRAIN −SOURCE VOLTAGE (V)Figure 3. Input CapacitanceV DS , DRAIN −SOURCE VOLTAGE (V)I D , D R A I N C U R R E N T (m A )C r s s , R E V E R S E T R A N S F E R C A P A C I T A N C E (p F )C i s s , I N P U T C A P A C I T A N C E (p F )PACKAGE DIMENSIONSNOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: INCH.3.MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISHTHICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.4.DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,PROTRUSIONS, OR GATE BURRS.VIEW CDIM A MIN NOM MAX MINMILLIMETERS0.89 1.00 1.110.035INCHES A10.010.060.100.001b 0.370.440.500.015c 0.090.130.180.003D 2.80 2.90 3.040.110E 1.20 1.30 1.400.047e 1.78 1.90 2.040.070L 0.100.200.300.0040.0400.0440.0020.0040.0180.0200.0050.0070.1140.1200.0510.0550.0750.0810.0080.012NOM MAX L1 2.10 2.40 2.640.0830.0940.104H E 0.350.540.690.0140.0210.0290−−−100−−−10q°°°°SOT −23 (TO −236AB)CASE 318−08ISSUE AP*For additional information on our Pb −Free strategy and solderingdetails, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOLDERING FOOTPRINT*ǒmm inchesǓSCALE 10:1STYLE 10:PIN 1.DRAIN2.SOURCE3.GATEON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION分销商库存信息:ONSEMIMMBFJ177LT1G MMBFJ177LT1。

MMBT4401LT1G;MMBT4401LT3G;MMBT4401LT1;中文规格书,Datasheet资料

MMBT4401L, SMMBT4401LSwitching TransistorNPN SiliconFeatures•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant•AEC−Q101 Qualified and PPAP Capable•S Prefix for Automotive and Other Applications Requiring Unique Site and Control Change RequirementsMAXIMUM RATINGSRating Symbol Value Unit Collector−Emitter Voltage V CEO40Vdc Collector−Base Voltage V CBO60Vdc Emitter−Base Voltage V EBO 6.0Vdc Collector Current − Continuous I C600mAdc Collector Current − Peak I CM900mAdc THERMAL CHARACTERISTICSCharacteristic Symbol Max UnitTotal Device Dissipation FR−5 Board (Note 1) @T A = 25°CDerate above 25°C PD2251.8mWmW/°CThermal Resistance, Junction−to−Ambient R q JA556°C/WTotal Device Dissipation Alumina Substrate (Note 2) @T A = 25°C Derate above 25°C P D3002.4mWmW/°CThermal Resistance, Junction−to−Ambient R q JA417°C/WJunction and Storage Temperature T J, T stg−55 to +150°C Stresses exceeding Maximum Ratings may damage the device. MaximumRatings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.*Transient pulses must not cause the junction temperature to be exceeded.1.FR−5 = 1.0 0.75 0.062 in.2.Alumina = 0.4 0.3 0.024 in. 99.5% alumina.SOT−23 (TO−236)CASE 318STYLE 6COLLECTOR12EMITTER*Date Code orientation and/or overbar mayvary depending upon manufacturing location.12X M GG2X= Specific Device CodeM= Date Code*G= Pb−Free Package(Note: Microdot may be in either location)MARKING DIAGRAMDevice Package Shipping†ORDERING INFORMATIONMMBT4401LT3G SOT−23(Pb−Free)†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our T ape and Reel Packaging Specifications Brochure, BRD8011/D.MMBT4401LT1GSMMBT4401LT1GSOT−23(Pb−Free)3000 / Tape &Reel10,000 / Tape &ReelELECTRICAL CHARACTERISTICS (T A = 25°C unless otherwise noted)CharacteristicSymbolMinMaxUnitOFF CHARACTERISTICSCollector −Emitter Breakdown Voltage (Note 3)(I C = 1.0 mAdc, I B = 0)V (BR)CEO 40−Vdc Collector −Base Breakdown Voltage (I C = 0.1 mAdc, I E = 0)V (BR)CBO 60−Vdc Emitter −Base Breakdown Voltage (I E = 0.1 mAdc, I C = 0)V (BR)EBO 6.0−Vdc Base Cutoff Current (V CE = 35 Vdc, V EB = 0.4 Vdc)I BEV −0.1m Adc Collector Cutoff Current(V CE = 35 Vdc, V EB = 0.4 Vdc)I CEX−0.1m AdcON CHARACTERISTICS (Note 3)DC Current Gain(I C = 0.1 mAdc, V CE = 1.0 Vdc)(I C = 1.0 mAdc, V CE = 1.0 Vdc)(I C = 10 mAdc, V CE = 1.0 Vdc)(I C = 150 mAdc, V CE = 1.0 Vdc)(I C = 500 mAdc, V CE = 2.0 Vdc)h FE20408010040−−−300−−Collector −Emitter Saturation Voltage(I C = 150 mAdc, I B = 15 mAdc)(I C = 500 mAdc, I B = 50 mAdc)V CE(sat)−−0.40.75VdcBase −Emitter Saturation Voltage(I C = 150 mAdc, I B = 15 mAdc)(I C = 500 mAdc, I B = 50 mAdc)V BE(sat)0.75−0.951.2VdcSMALL −SIGNAL CHARACTERISTICS Current −Gain − Bandwidth Product (I C = 20 mAdc, V CE = 10 Vdc, f = 100 MHz)f T 250−MHz Collector −Base Capacitance (V CB = 5.0 Vdc, I E = 0, f = 1.0 MHz)C cb − 6.5pF Emitter −Base Capacitance (V EB = 0.5 Vdc, I C = 0, f = 1.0 MHz)C eb −30pF Input Impedance (I C = 1.0 mAdc, V CE = 10 Vdc, f = 1.0 kHz)h ie 1.015k W Voltage Feedback Ratio (I C = 1.0 mAdc, V CE = 10 Vdc, f = 1.0 kHz)h re 0.18.0X 10−4Small −Signal Current Gain (I C = 1.0 mAdc, V CE = 10 Vdc, f = 1.0 kHz)h fe 40500−Output Admittance(I C = 1.0 mAdc, V CE = 10 Vdc, f = 1.0 kHz)h oe1.030m mhosSWITCHING CHARACTERISTICS Delay Time (V CC = 30 Vdc, V EB = 2.0 Vdc,IC = 150 mAdc, I B1 = 15 mAdc)t d−15nsRise Time t r −20Storage Time (V CC = 30 Vdc, I C = 150 mAdc,I B1 = I B2 = 15 mAdc)t s −225nsFall Timet f−303.Pulse Test: Pulse Width ≤ 300 m s, Duty Cycle ≤2.0%.Figure 1. Turn −On Time Figure 2. Turn −Off TimeSWITCHING TIME EQUIVALENT TEST CIRCUITSFigure 3. Charge DataI C , COLLECTOR CURRENT (mA)Q , C H A R G E (n C )2.03.05.07.0101.00.10.70.5Figure 4. Turn −On Time IC , COLLECTOR CURRENT (mA)2030505.0107.0Figure 5. Rise and Fall TimesI C , COLLECTOR CURRENT (mA)Figure 6. Storage Time I C , COLLECTOR CURRENT (mA)Figure 7. Fall TimeI C , COLLECTOR CURRENT (mA)25°C100°CTRANSIENT CHARACTERISTICS0.30.2t s , S T O R A G E T I M E (n s )′t , T I M E (n s )t , T I M E (n s )t f , F A L L T I M E (n s )701002030505.0107.0701001002003070503006.08.04.02.0Figure 8. Frequency Effects f, FREQUENCY (kHz)SMALL −SIGNAL CHARACTERISTICS NOISE FIGUREV CE = 10 Vdc, T A = 25°C; Bandwidth = 1.0 HzN F , N O I S E F I G U R E (d B )10N F , N O I S E F I G U R E (d B )Figure 9. Source Resistance EffectsR S , SOURCE RESISTANCE (OHMS)h PARAMETERSV CE = 10 Vdc, f = 1.0 kHz, T A = 25°CThis group of graphs illustrates the relationship between h fe and other “h” parameters for this series of transistors. To obtain these curves, a high −gain and a low −gain unit were selected from the MMBT4401LT1 lines, and the same units were used to develop the correspondingly numbered curves on each graph.h i e , I N P U T I M P E D A N C E (O H M S )Figure 10. Input ImpedanceI C , COLLECTOR CURRENT (mA)50 k 50020 k 10 k 5.0 k2.0 k1.0 k Figure 11. Voltage Feedback RatioI C , COLLECTOR CURRENT (mA)10Figure 12. Output AdmittanceI C , COLLECTOR CURRENT (mA)7.05.03.02.01.00.70.50.3h , O U T P U T A D M I T T A N C E ( m h o s )o e h , V O L T A G E F E E D B A C K R A T I O (X 10 )r e m -4Figure 13. DC Current GainI C , COLLECTOR CURRENT (A)Figure 14. Collector Saturation RegionI B , BASE CURRENT (mA)0.40.60.81.20.2V , C O L L E C T O R -E M I T T E R V O L T A G E (V O L T S )0CE 0.001502503005000.01h , D C C U R R E N T G A I N0.101F E 400Figure 15. Collector −Emitter SaturationVoltage vs. Collector CurrentI C , COLLECTOR CURRENT (A)0.150.200.300.350.05Figure 16. Temperature CoefficientsI C , COLLECTOR CURRENT (mA)V C E (s a t ), C O L L E C T O R -E M I T T E R S A T U R A T I O N V O L T A G E (V )0.010.10- 0.50- 1.0- 1.5- 2.010.0001C O E F F I C I E N T (m V /C )°- 2.50.010.11.01101001502003504500.0010.100.25100Figure 17. Base −Emitter Saturation Voltage vs.Collector CurrentFigure 18. Base −Emitter Turn On Voltage vs.Collector CurrentI C , COLLECTOR CURRENT (A)I C , COLLECTOR CURRENT (A)V B E (s a t ), B A S E −E M I T T E R S A T U R A -T I O N V O L T A G E (V )V B E (o n ), B A S E −E M I T T E R T U R N O N V O L T A G E (V )Figure 19. Input Capacitance vs. Emitter BaseVoltage Figure 20. Output Capacitance vs. CollectorBase VoltageV eb , EMITTER BASE VOLTAGE (V)V cb , COLLECTOR BASE VOLTAGE (V)63210911131519215030251001.52.53.54.56.58.5C i b o , I N P U T C A P A C I T A NC E (p F )C o bo , O U T P U T C A P A C I T A N C E (p F )17 5.545515203540457.5Figure 21. Safe Operating Area Figure 22. Current −Gain −Bandwidth ProductV CE , COLLECTOR EMITTER VOLTAGE (V)I C , COLLECTOR CURRENT (mA)I C , C O L L E C T O R C U R R E N T (A )f T , C U R R E N T −G A I N −B A N D W I D T H (M H z )PACKAGE DIMENSIONSSOT −23 (TO −236)CASE 318−08ISSUE APSOLDERING FOOTPRINT**For additional information on our Pb −Free strategy and solderingdetails, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.STYLE 6:PIN 1.BASE2.EMITTER3.COLLECTORNOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M,1982.2.CONTROLLING DIMENSION: INCH.3.MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.4.DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,PROTRUSIONS, OR GATE BURRS.VIEW CDIM A MIN NOM MAX MIN MILLIMETERS 0.89 1.00 1.110.035INCHESA10.010.060.100.001b 0.370.440.500.015c 0.090.130.180.003D 2.80 2.90 3.040.110E 1.20 1.30 1.400.047e 1.78 1.90 2.040.070L 0.100.200.300.0040.0400.0440.0020.0040.0180.0200.0050.0070.1140.1200.0510.0550.0750.0810.0080.012NOM MAX L12.10 2.40 2.640.0830.0940.104H E 0.350.540.690.0140.0210.0290−−−100−−−10q °°°°ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION分销商库存信息:ONSEMIMMBT4401LT1G MMBT4401LT3G MMBT4401LT1。

SMMBT5088LT1G;SMMBT5089LT1G;中文规格书,Datasheet资料

Figure 3. Effects of Collector Current
BANDWIDTH = 1.0 Hz IC = 10 mA0 mA 100 mA 4.0 10 mA IC = 1.0 mA
MMBT5088LT1G, SMMBT5088LT1G, MMBT5089LT1G, SMMBT5089LT1G Low Noise Transistors
NPN Silicon
Features
AEC−Q101 Qualified and PPAP Capable S Prefix for Automotive and Other Applications Requiring Unique
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. FR−5 = 1.0 x 0.75 x 0.062 in. 2. Alumina = 0.4 x 0.3 x 0.024 in. 99.5% alumina.
Characteristic OFF CHARACTERISTICS Collector − Emitter Breakdown Voltage (IC = 1.0 mAdc, IB = 0) Collector − Base Breakdown Voltage (IC = 100 mAdc, IE = 0) Collector Cutoff Current (VCB = 20 Vdc, IE = 0) (VCB = 15 Vdc, IE = 0) Emitter Cutoff Current (VEB(off) = 3.0 Vdc, IC = 0) (VEB(off) = 4.5 Vdc, IC = 0) ON CHARACTERISTICS DC Current Gain (IC = 100 mAdc, VCE = 5.0 Vdc) (IC = 1.0 mAdc, VCE = 5.0 Vdc) (IC = 10 mAdc, VCE = 5.0 Vdc) Collector − Emitter Saturation Voltage (IC = 10 mAdc, IB = 1.0 mAdc) Base − Emitter Saturation Voltage (IC = 10 mAdc, IB = 1.0 mAdc) SMALL− SIGNAL CHARACTERISTICS Current − Gain — Bandwidth Product (IC = 500 mAdc, VCE = 5.0 Vdc, f = 20 MHz) Collector−Base Capacitance (VCB = 5.0 Vdc, IE = 0, f = 1.0 MHz emitter guarded) Emitter−Base Capacitance (VEB = 0.5 Vdc, IC = 0, f = 1.0 MHz collector guarded) Small Signal Current Gain (IC = 1.0 mAdc, VCE = 5.0 Vdc, f = 1.0 kHz) MMBT5088, SMMBT5088 MMBT5089, SMMBT5089 fT Ccb Ceb hfe 50 − − 350 450 − − − 4.0 10 1400 1800 3.0 2.0 MHz pF pF − MMBT5088, SMMBT5088 MMBT5089, SMMBT5089 MMBT5088, SMMBT5088 MMBT5089, SMMBT5089 MMBT5088, SMMBT5088 MMBT5089, SMMBT5089 VCE(sat) VBE(sat) hFE 300 400 350 450 300 400 − − 900 1200 − − − − 0.5 0.8 Vdc Vdc − MMBT5088, SMMBT5088 MMBT5089, SMMBT5089 MMBT5088, SMMBT5088 MMBT5089, SMMBT5089 MMBT5088, SMMBT5088 MMBT5089, SMMBT5089 MMBT5088, SMMBT5088 MMBT5089, SMMBT5089 V(BR)CEO 30 25 35 30 − − − − − − − − 50 50 50 100 Vdc Symbol Min Max Unit

MMBTA92LT1G;MMBTA92LT3G;SMMBTA92LT1G;SMMBTA92LT3G;MMBTA93LT1G;中文规格书,Datasheet资料

(*Note: Microdot may be in either location)
*Date Code orientation and/or overbar may vary depending upon manufacturing location.
ORDERING INFORMATION
Device
1.0
10
100
IC, COLLECTOR CURRENT (mA)
Figure 4. “ON” Voltages
1
VCE(sat) @ 25°C, IC/IB = 10 VCE(sat) @ 125°C, IC/IB = 10 VCE(sat) @ -55°C, IC/IB = 10 VBE(sat) @ 25°C, IC/IB = 10
VCE = 20 Vdc
30
F = 20 MHz
10
1000
1 3 5 7 9 11 13 15 17 19 21
IC, COLLECTOR CURRENT (mA)
Figure 3. Current−Gain − Bandwidth
1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0
0.1
© Semiconductor Components Industries, LLC, 2011
1
November, 2011 − Rev. 9
/
Publication Order Number: MMBTA92LT1/D
MMBTA92L, SMMBTA92L, MMBTA93L
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic

MMBT489LT1G中文资料

MMBT489LT1High Current Surface Mount NPN Silicon Switching Transistor for Load Management inPortable ApplicationsFeatures•Pb−Free Package is AvailableMAXIMUM RATINGS (T A = 25°C)RatingSymbol Max Unit Collector-Emitter Voltage V CEO 30Vdc Collector-Base Voltage V CBO 50Vdc Emitter-Base VoltageV EBO 5.0Vdc Collector Current − Continuous I C 1.0A Collector Current − PeakI CM2.0ATHERMAL CHARACTERISTICSCharacteristicSymbol Max Unit Total Device Dissipation (Note 1)@T A = 25°CDerate above 25°CP D3102.5mW mW/°C Thermal Resistance, Junction−to−Ambient (Note 1)R q JA 403°C/WTotal Device Dissipation (Note 2)@T A = 25°CDerate above 25°CP D7105.7mW mW/°C Thermal Resistance, Junction−to−Ambient (Note 2)R q JA 176°C/WT otal Device Dissipation (Single Pulse < 10 s)P Dsingle 575mW Junction and Storage Temperature RangeT J , T stg−55 to +150°CMaximum ratings are those values beyond which device damage can occur.Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.1.FR−4 @ Minimum Pad2.FR−4 @ 1.0 X 1.0 inch PadDevice Package Shipping †ORDERING INFORMATION3000/Tape & Reel MMBT489LT1SOT−233000/Tape & ReelMMBT489LT1GSOT−23(Pb−Free)†For information on tape and reel specifications,including part orientation and tape sizes, please refer to our T ape and Reel Packaging Specifications Brochure, BRD8011/D.ELECTRICAL CHARACTERISTICS (T A = 25°C unless otherwise noted)CharacteristicSymbolMinMaxUnitOFF CHARACTERISTICSCollector −Emitter Breakdown Voltage (I C = 10 mAdc, I B = 0)V (BR)CEO 30−VdcCollector−Base Breakdown Voltage (I C = 0.1 mAdc, I E = 0)V (BR)CBO 50−VdcEmitter −Base Breakdown Voltage (I E = 0.1 mAdc, I C = 0)V (BR)EBO 5.0−VdcCollector Cutoff Current (V CB = 30 Vdc, I E = 0)I CBO −0.1m Adc Collector−Emitter Cutoff Current (V CES = 30 Vdc)I CES −0.1m Adc Emitter Cutoff Current (V EB = 4.0 Vdc)I EBO−0.1m AdcON CHARACTERISTICS DC Current Gain (Note 3)(I C = 50 mA, V CE = 5.0 V)(I C = 0.5 A, V CE = 5.0 V)(I C = 1.0 A, V CE = 5.0 V)h FE300300200−900−Collector −Emitter Saturation Voltage (Note 3)(I C = 1.0 A, I B = 100 mA)(I C = 0.5 A, I B = 50 mA)(I C = 0.1 A, I B = 1.0 mA)V CE(sat)−−−0.2000.1250.075VBase −Emitter Saturation Voltage (Note 3)(I C = 1.0 A, I B = 0.1 A)V BE(sat)− 1.1VBase −Emitter Turn−on Voltage (Note 3)(I C = 1.0 mA, V CE = 2.0 V)VBE(on)− 1.1VCutoff Frequency(I C = 100 mA, V CE = 5.0 V, f = 100 MHz f T 100−MHzOutput Capacitance (f = 1.0 MHz)C obo−15pF3.Pulsed Condition: Pulse Width = 300 m sec, Duty Cycle ≤ 2%Figure 1. V CE versus I b 1.000.1V C E (V )I b (A)0.20.30.40.50.60.70.80.9Figure 2. V CE versus I cI c (A)Figure 3. h FE versus I c 8000100h F EI c (A)200300400500600700Figure 4. V BE(on) versus I c1.2V B E (o n ) (V )I c (A)0.20.40.60.8Figure 5. V BE(sat) versus I c1.20V B E (V )I c (A)0.20.40.60.81.0Figure 6. Safe Operating AreaV CE (V)1.0Figure 7. Normalized Thermal Responset, TIME (sec)1.0E+001.0E−031.0E−021.0E−01R t h j a , (t )PACKAGE DIMENSIONSSOT−23 (TO−236)CASE 318−08ISSUE AN*For additional information on our Pb−Free strategy and solderingdetails, please download the ON Semiconductor Soldering andMounting Techniques Reference Manual, SOLDERRM/D.ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。

MMBTA06LT3G;MMBTA06LT1G;MMBTA05LT1G;MMBTA05LT3G;MMBTA05LT1;中文规格书,Datasheet资料

MMBTA05L, MMBTA06L, SMMBTA06LDriver TransistorsNPN SiliconFeatures•S Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS CompliantMAXIMUM RATINGSRating Symbol Value UnitCollector−Emitter VoltageMMBTA05LT1 MMBTA06LT1, SMMBTA06LT1V CEO6080VdcCollector−Base VoltageMMBTA05LT1 MMBTA06LT1, SMMBTA06LT1V CBO6080VdcEmitter−Base Voltage V EBO 4.0Vdc Collector Current − Continuous I C500mAdc Electrostatic Discharge ESD HBM Class 3BMM Class CCDM Class IV THERMAL CHARACTERISTICSCharacteristic Symbol Max UnitTotal Device Dissipation FR−5 Board (Note 1) T A = 25°C Derate above 25°C P D2251.8mWmW/°CThermal Resistance, Junction−to−Ambient R qJA556°C/WTotal Device Dissipation Alumina Substrate, (Note 2) T A = 25°C Derate above 25°C P D3002.4mWmW/°CThermal Resistance, Junction−to−Ambient R q JA417°C/WJunction and Storage Temperature T J, Tstg−55 to +150°C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.1.FR−5 = 1.0 0.75 0.062 in.2.Alumina = 0.4 0.3 0.024 in. 99.5% alumina.SOT−23CASE 318STYLE 6MARKING DIAGRAMS1H M GGMMBTA05LT1COLLECTOR1EMITTER1GM M GGMMBTA06LT1,SMMBTA06L1H, 1GM= Specific Device CodeM= Date Code*G= Pb−Free PackageSee detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.ORDERING INFORMATION(Note: Microdot may be in either location)*Date Code orientation and/or overbar mayvary depending upon manufacturing location.ELECTRICAL CHARACTERISTICS (T A = 25°C unless otherwise noted)CharacteristicSymbolMinMaxUnitOFF CHARACTERISTICSCollector −Emitter Breakdown Voltage (Note 3)(I C = 1.0 mAdc, I B = 0)MMBTA05MMBTA06, SMMBTA06V (BR)CEO6080−−VdcEmitter −Base Breakdown Voltage (I E = 100 m Adc, I C = 0)V (BR)EBO 4.0−Vdc Collector Cutoff Current (V CE = 60 Vdc, I B = 0)I CES −0.1m Adc Collector Cutoff Current (V CB = 60 Vdc, I E = 0)MMBTA05(V CB = 80 Vdc, I E = 0)MMBTA06, SMMBTA06I CBO−−0.10.1m AdcON CHARACTERISTICSDC Current Gain(I C = 10 mAdc, V CE = 1.0 Vdc)(I C = 100 mAdc, V CE = 1.0 Vdc)h FE100100−−−Collector −Emitter Saturation Voltage (I C = 100 mAdc, I B = 10 mAdc)V CE(sat)−0.25Vdc Base −Emitter On Voltage(I C = 100 mAdc, V CE = 1.0 Vdc)V BE(on)−1.2VdcSMALL −SIGNAL CHARACTERISTICS Current −Gain − Bandwidth Product (Note 4)(I C = 10 mA, V CE = 2.0 V, f = 100 MHz)f T100−MHz3.Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2.0%.4.f T is defined as the frequency at which |h fe | extrapolates to unity.Figure 1. Switching Time Test CircuitsOUTPUTTURN-ON TIME V S t 6.0 pFtr = 3.0 ns+10 V5.0 m OUTPUTTURN-OFF TIME +V V S t 6.0 pFt r = 3.0 ns5.0 m *Total Shunt Capacitance of Test Jig and Connectors For PNP Test Circuits, Reverse All Voltage PolaritiesFigure 2. Current Gain Bandwidth Product vs.Collector CurrentFigure 3. CapacitanceFigure 4. Switching TimeI C , COLLECTOR CURRENT (mA)V R , REVERSE VOLTAGE (V)I C , COLLECTOR CURRENT (mA)200100502010t , T I M E (n s )2005001.0 k 5003070300700C , C A P A C I T A N C E (p F )300Figure 5. DC Current Gain vs. CollectorCurrentI C , COLLECTOR CURRENT (mA)f t a u , C U R R E N T G A I N B A N D W I D T H P R O D U C T (M H z )h f e , D C C U R R E N T G A I NFigure 6. Collector Emitter Saturation Voltagevs. Collector Current Figure 7. Base Emitter Saturation Voltage vs.Collector CurrentIC , COLLECTOR CURRENT (mA)I C , COLLECTOR CURRENT (mA)0.010.11V C E (s a t ), C O L L E C T O R −E M I T T E R S A T U R A T I O N V O L T A G E (V )V B E (s a t ), B A S E −E M I T T E R S A T U R A T I O N V O L T A G E (V )Figure 8. Base Emitter Turn −ON Voltage vs.Collector CurrentI C , COLLECTOR CURRENT (mA)1.1V B E (o n ), B A S E −E M I T T E R V O L T A G E (V )Figure 9. Saturation RegionI B , BASE CURRENT (mA)Figure 10. Base −Emitter TemperatureCoefficientI C , COLLECTOR CURRENT (mA)−0.8−1.2−1.6−2.0−2.4−2.8Figure 11. Safe Operating AreaV CE , COLLECTOR EMITTER VOLTAGE (V)10000IC , C O L L E C T O R C U R R E N T (m A )10.90.80.70.60.50.40.30.20.1V C E (s a t ), C O L L E C T O R −E M I T T E R S A T U R A T I O N V O L T A G E (V )R q V B , T E M P E R A T U R E C O E F F I C I E N T (m V /°C )Figure 12. Safe Operating AreaV CE , COLLECTOR EMITTER VOLTAGE (V)I C , C O L L E C T O R C U R R E N T (m A )1000100101ORDERING INFORMATIONDevice Package Shipping†3000 / Tape & Reel MMBTA05LT1G SOT−23(Pb−Free)MMBTA05LT3G SOT−2310,000 / Tape & Reel(Pb−Free)3000 / Tape & Reel MMBTA06LT1G SOT−23(Pb−Free)SMMBTA06LT1G SOT−233000 / Tape & Reel(Pb−Free)10,000 / Tape & Reel MMBTA06LT3G SOT−23(Pb−Free)SMMBTA06LT3G SOT−2310,000 / Tape & Reel(Pb−Free)†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.PACKAGE DIMENSIONSSOT −23 (TO −236)CASE 318−08ISSUE APNOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: INCH.3.MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISHTHICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.4.DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,PROTRUSIONS, OR GATE BURRS.VIEW CDIM A MIN NOM MAX MINMILLIMETERS0.89 1.00 1.110.035INCHES A10.010.060.100.001b 0.370.440.500.015c 0.090.130.180.003D 2.80 2.90 3.040.110E 1.20 1.30 1.400.047e 1.78 1.90 2.040.070L 0.100.200.300.0040.0400.0440.0020.0040.0180.0200.0050.0070.1140.1200.0510.0550.0750.0810.0080.012NOM MAX L1 2.10 2.40 2.640.0830.0940.104H E 0.350.540.690.0140.0210.0290−−−100−−−10q°°°°STYLE 6:PIN 1.BASE2.EMITTER3.COLLECTOR*For additional information on our Pb −Free strategy and solderingdetails, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOLDERING FOOTPRINT*ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at /site/pdf/Patent −Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION分销商库存信息:ONSEMIMMBTA06LT3G MMBTA06LT1G MMBTA05LT1G MMBTA05LT3G MMBTA05LT1MMBTA06LT1 MMBTA05LT3。

MMBTA63LT1G中文资料

MARKING DIAGRAM
2x M G G
1
2x = Device Code x = U for MMBTA63LT1 x = V for MMBTA64LT1
M = Date Code* G = Pb−Free Package (Note: Microdot may be in either location)
元器件交易网
hFE, DC CURRENT GAIN (X1.0 K)
V, VOLTAGE (VOLTS)
200
100 70 50 30 20
10 7.0 5.0
3.0 2.0
−0.3
TA = 125°C 25°C
−55°C −0.5 −0.7 −1.0
MMBTA63LT1, MMBTA64LT1
Total Device Dissipation Alumina Substrate, (Note 2) TA = 25°C Derate above 25°C
RqJA PD
556
°C/W
300
mW
2.4
mW/°C
Thermal Resistance, Junction−to−Ambient RqJA
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
H E 2.10
2.40
2.64
STYLE 6: PIN 1. BASE 2. EMITTER 3. COLLECTOR

MMBT2907ALT1中文资料

Symbol
V(BR)CEO V(BR)CBO V(BR)EBO
ICEX ICBO
IBL
hFE
VCE(sat)
VBE(sat)
fT Cobo Cibo
ton td tr toff ts tf
Min
Max
Unit
−60
−
Vdc
−60
−
Vdc
−5.0
−
Vdc
−
−50
nAdc
mAdc
−
−0.010
−
−10
MARKING DIAGRAM
2F M G G
1
2F = Device Code M = Date Code* G = Pb−Free Package
(Note: Microdot may be in either location) *Date Code orientation and/or overbar may
Collector −Base Breakdown Voltage (IC = −10 mAdc, IE = 0)
Emitter −Base Breakdown Voltage (IE = −10 mAdc, IC = 0)
Collector Cutoff Current (VCE = −30 Vdc, VEB(off) = −0.5 Vdc)
PD
225
mW
1.8
mW/°C
Thermal Resistance, Junction−to−Ambient
Total Device Dissipation Alumina Substrate, (Note 2) @TA = 25°C Derate above 25°C

MMUN2214LT1G资料

MMUN2215LT1/MMUN2216LT1/MMUN2238LT1
−
−
−
MMUN2241LT1
−
−
−
MMUN2230LT1/MMUN2231LT1/MMUN2232LT1
0.8
1.0
1.2
MMUN2233LT1
0.055
0.1
0.185
MMUN2234LT1
0.38
0.47
0.56
4. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0%.
V(BR)CBO
50
−
Collector-Emitter Breakdown Voltage (Note 3), (IC = 2.0 mA, IB = 0)
V(BR)CEO
50
−
−
Vdc
−
Vdc
ON CHARACTERISTICS (Note 3)
DC Current Gain (VCE = 10 V, IC = 5.0 mA)
ICEO
−
Emitter-Base Cutoff Current (VEB = 6.0 V, IC = 0)
MMUN2211LT1
IEBO
−
MMUN2212LT1
−
MMUN2213LT1
−
MMUN2214LT1
−
MMUN2215LT1
−
MMUN2216LT1
−
MMUN2230LT1
−
MMUN2231LT1
© Semiconductor Components Industries, LLC, 2005

CBT 70J-1 and CBT 70JE-1 Bracket Installation Guid

CBT 70J-1 and CBT 70JE-1 Bracket Installation GuideRev B – For Swivel/Tilt Wall BracketIncluded:SWIVEL-TILTSPEAKER BRACKETWALL BRACKETCOUPLER PLATEM6-60L M6-15L Pan head SS Flat washersM6-nuts SS Lock washers switch coversM6-20LFlat headSS Lock washersSS Flat washersWALL MOUNTINGNote that the BRACKET ASSEMBLY consists of a SPEAKER BRACKET and a WALL BRACKET.1) RUN WIRING -- Run the wiring from the power amplifier to the location desired for mounting theJBL CBT Loudspeakers.2) ATTACHING WALL BRACKET TO WALL -- Using a level to ensure that the WALL BRACKET isstraight, secure the WALL BRACKET to the wall. Be sure to use the appropriate wall anchors for attaching the bracket. Use all four screw holes for maximum integrity and safety. Be sure that the slot feature is at the top.Hardware for attaching WALL BRACKET to wall is not included.3) ATTACH SPEAKER BRACKET TO SPEAKER3a) CBT 70J-1 -- Mount the SPEAKER BRACKET to the speaker with the provided M6-15L hardware. For the CBT 70J-1 there are three (3) possible mounting positions. Choose the one that best suits the application. Be sure the hook feature is downward.3b) CBT 70J-1 + 70JE-1 Vertical Array -- Mount the COUPLER PLATE (included with the CBT 70JE-1) to the CBT 70J-1 and CBT 70JE-1 speakers with the provided eight (8) pieces of M6-20L flat-head bolts. (See “CBT 70J-1 and CBT 70JE1 Coupler Plate Dimensions & Connection Point Locations” drawing, below, for exact locations).Then attach the SPEAKER BRACKET to the COUPLER PLATE with the provided M6-15L pan-head bolts, lock washers and flat washers. Be sure the hook feature is downward.8 pieces of the provided M6-20L flat-head bolts4 pieces of the provided M6-15L pan-head bolts with lock washers & flat washersTilt angles ±15° OK4) SLIDE SPEAKER WITH SPEAKER BRACKET ONTO WALL BRACKETMake sure the PIVOT BOLT is installed in-place in the WALL BRACKET. It consists of the M6-60L bolt with lock washer and flat washer on the head (as shown in DETAIL “A”, below) and secured in place with flat washer, lock washer and M6 nut. Leave the nut loose (do not tighten).Once the wall mount has been attached to the wall and speaker mount has been attached to the speaker, slide the speaker forward so that the SPEAKER BRACKET engages into the WALL BRACKET, dropping the hook slot of the SPEAKER BRACKET onto the pivot bolt (which will already be installed loosely in the WALL BRACKET).DETAIL “A”PIVOT BOLT Location5) SET THE TILT ANGLE – Once the speaker has nested securely on the pivot bolt, slide the secondM6-60L bolt into one of the holes in top of the wall bracket to set the angle.5a) TILT ANGLES -- The bracket allows for +/-15 degrees of tilt.5b) PRE-SET ANGLES and CONTINUOUSLY VARIABLE ANGLE -- The bracket has through holes for mounting angles of +/- 15 degrees in 5 degree increments. There is also a slot above the holes for continuously variable adjustment. The pre-set angles are recommended for accurate aiming.5C) SECURE THE ANGLE SETTING -- Once the angle has been chosen re- tighten both bolts with hardware provided.6) SET THE SWIVEL (PAN) ANGLE – Loosen the top and bottom bolts on the pivot. Adjust theside-to-side swivel (ie, pan) aiming angle of the speaker. Re-tighten the bolts securely at desired swivel (pan) angle.Maximum Swivel Angles before Wall Interference – The bracket swivels a full 90 degrees from side-to-side, however when mounting the CBT speaker onto a wall, the side-to-side swivel may be limited by the end of the speaker encountering the wall. The maximum swivel angle depends on:a) which of the rear-panel insert points on the speaker the SPEAKER BRACKET is mounted onto,and b) the down-tilt angle setting.The following charts lists the typical maximum side-to-side swivel angles for some of the possible Speaker Bracket mounting point locations, and for 0°, 5°, 10°, and 15° down-tilt angle settings.(For the combination CBT 70J-1+70JE-1 array, the only recommended mounting point for the SPEAKER BRACKET is on the Coupler Plate, so that is the only mounting point shown in the chart for the array.)ModelSPEAKERBRACKETMountingPosition onSpeakerMaximum Swivel (Pan) Angle at Down-Tilt of:0ºDown-Tilt5°Down-Tilt10ºDown-Tilt15ºDown-TiltCBT 70J-1Top Position 80° Swivel77° Swivel 74° Swivel 66° Swivel Middle Position 80° Swivel77° Swivel 76° Swivel 73° Swivel Bottom Position 80° Swivel78° Swivel 77°Swivel 77°SwivelCBT 70J-1 + 70JE-1 Array On Coupler Plate(This is the onlyallowable bracketposition for the array.)80° Swivel76° Swivel 69° Swivel 48° SwivelMaximum Swivel Angles in Other Mounting Situations – The bracket itself can swivel up to 90 degrees (side-to-side), so if the speaker is being mounted onto a pole or an outside corner, for example, where interference with a wall may not be a factor, then greater swivel angles than those stated in the above chart may be achieved.7) SAFETY CABLE -- Attach a safety cable (not included) to any of the 6 mm inserts on the back ofthe CBT 70J and/or 70JE cabinet using the included M6-15L mm bolt. Prepare to attach the other end of the cable to a secondary attachment point on the wall.8) SWITCH COVERS – To discourage tampering with the switch settings, adhesive switch covers areprovided. Peel off the backing from the switch cover and stick the cover over the switch shaft, lining up the ridge with the recess in the switch shaft.CBT 70J-1 Bracket DimensionsCBT 70J-1 and CBT 70JE-1 Coupler Plate Dimensions & Connection Point LocationsJBL Professional8500 Balboa Blvd.Northridge, CA 91355USACBT70-1 Install Rev-B04/11 Countersunk thru holes (8 places) forflat-head screws into back cabinetinserts of CBT 70J-1 and CBT 70JE-14 –M6 x 8 mmthreaded holesfor includedCBT 70J-1wall bracket。

MMBTA05、MMBTA06 NPN 小信号通用放大器传输器说明书

NPN Small Signal General Purpose Amplifier TransistorsFeatures•Epitaxial Planar Die Construction•Ideal for Medium Power Amplification and Switching •Halogen Free. "Green" Device (Note 1)•Moisture Sensitivity Level 1•Epoxy Meets UL 94 V-0 Flammability Rating•Lead Free Finish/RoHS Compliant ("P" Suffix Designates RoHS Compliant. See Ordering Information)•Operating Junction Temperature Range: -55℃ to +150℃•Storage Temperature Range: -55℃ to +150℃•Thermal Resistance: 417℃/W Junction to AmbientMaximum Ratings @ 25°C Unless Otherwise SpecifiedMarking:MMBTA05: 1H MMBTA06: 1GMInternal Structure3211.BASE2.EMITTER3.COLLECTORNote: 1. Halogen free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.Electrical Characteristics @ T A=25°C Unless Otherwise SpecifiedCurve Characteristics102030405060708090C o l l e c t o r C u r r e n t (m A )Collector-Emitter Voltage (V)Fig. 1 - Static CharacteristicsCollector Current (mA)Fig. 2 - DC Current Gain CharacteristicsCollector Current (mA)Fig. 4 - Collector-Emitter Saturation Voltage CharacteristicsCollector Current (mA)Fig. 3 - Base-Emitter Saturation Voltage Characteristics1100.11000.40.60.8Base-Emitter Voltage (V)C o l l c e t o r C u r r e n t (m A )Fig. 5 - Base-Emitter Voltage Characteristics025125150100200300400C o l l e c t o r P o w e rD i s s i p a t i o n (m W )5075100Ambient Temperature (°C)Fig. 6 - Collector Power Derating CurveOrdering InformationDevice PackingPart Number-TP Tape&Reel: 3Kpcs/Reel***IMPORTANT NOTICE***Micro Commercial Components Corp. reserves the right to make changes without further notice to any product herein to make corrections, modifications , enhancements , improvements , or other changes . Micro Commercial Components Corp . does not assume any liability arising out of the application or use of any product described herein; neither does it convey any license under its patent rights ,nor the rights of others . The user of products in such applications shall assume all risks of such use and will agree to hold Micro Commercial Components Corp . and all the companies whose products are represented on our website, harmless against all damages.***LIFE SUPPORT***MCC's products are not authorized for use as critical components in life support devices or systems without the expresswritten approval of Micro Commercial Components Corporation.***CUSTOMER AWARENESS***Counterfeiting of semiconductor parts is a growing problem in the industry. Micro Commercial Components (MCC) is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. MCC strongly encourages customers to purchase MCC parts either directly from MCC or from Authorized MCC Distributors who are listed by country on our web page cited below. Products customers buy either from MCC directly or from Authorized MCC Distributors are genuine parts, have full traceability, meet MCC's quality standards for handling and storage. MCC will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. MCC is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors.。

MMBD7000LT1G;MMBD7000LT3G;MMBD7000LT1;MMBD7000LT3;中文规格书,Datasheet资料

I R , REVERSE CURRENT (m A)
1.0
0.1
TA = 85C
TA = 55C 0.01 TA = 25C 0.001 0 10 20 30 40 50
VR, REVERSE VOLTAGE (VOLTS)
Figure 3. Leakage Nhomakorabeaurrent
0.68
C D , DIODE CAPACITANCE (pF)
100 I F, FORWARD CURRENT (mA) TA = 85C 10 TA = 25C 1.0
TA = -40C
0.1 0.2 0.4 0.6 0.8 1.0 1.2 VF, FORWARD VOLTAGE (VOLTS)
Figure 2. Forward Voltage
10
TA = 150C TA = 125C
PACKAGE DIMENSIONS
SOT−23 (TO−236) CASE 318−08 ISSUE AP
D
SEE VIEW C 3
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. DIM A A1 b c D E e L L1 HE q MIN 0.89 0.01 0.37 0.09 2.80 1.20 1.78 0.10 0.35 2.10 0 MILLIMETERS NOM MAX 1.00 1.11 0.06 0.10 0.44 0.50 0.13 0.18 2.90 3.04 1.30 1.40 1.90 2.04 0.20 0.30 0.54 0.69 2.40 2.64 −−− 10 MIN 0.035 0.001 0.015 0.003 0.110 0.047 0.070 0.004 0.014 0.083 0 INCHES NOM 0.040 0.002 0.018 0.005 0.114 0.051 0.075 0.008 0.021 0.094 −−− MAX 0.044 0.004 0.020 0.007 0.120 0.055 0.081 0.012 0.029 0.104 10

MMBF170LT1中文资料

MMBF170LT1中文资料MMBF170LT1Power MOSFET 500 mA, 60 V N?Channel SOT?23FeaturesPb?Free Packages are Available MAXIMUM RATINGSTHERMAL CHARACTERISTICS1.FR?5 = 1.0 0.75 0.062 in.500 mA, 60 V R DS(on) = 5 WORDERING INFORMATIONSee detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.ELECTRICAL CHARACTERISTICS (T= 25°C unless otherwise noted)ON CHARACTERISTICS (Note 1)DYNAMIC CHARACTERISTICSSWITCHING CHARACTERISTICS (Note 1)For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.Figure 1. Switching Test Circuit Figure 2. Switching Waveform TYPICAL ELECTRICAL CHARACTERISTICSI D , D R A I N C U R R E N T (A M P S )r D S (o n ), S T A T I C D R A I N ?S O U R C E O N ?R E S I S T A N C E (N O R M A L I Z E D )V G S (t h ), T H R E S H O L D V O L T A G E (N O R M A L I Z E D )I D , D R A I N C U R R E N T (A M P S )V DS, DRAIN SOURCE VOLTAGE (VOLTS)Figure 3. Ohmic RegionV GS , GATE SOURCE VOLTAGE (VOLTS)Figure 4. Transfer CharacteristicsT, TEMPERATURE (°C)Figure 5. Temperature versus Static Drain?Source On?Resistance T, TEMPERATURE (°C)Figure 6. Temperature versus GateThreshold VoltagePACKAGE DIMENSIONSSOT?23 (TO?236)CASE 318?08ISSUE AH*For additional information on our Pb?Free strategy and solderingdetails, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.STYLE 21:PIN 1.GATE2.SOURCE3.DRAINǒmm inchesǔSCALE 10:1SOT?23ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation orguarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILL C does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATIONThermal Clad is a registered trademark of the BergquistCompany.。

Motorola mmbf170lt1 数据表说明书

1Motorola Small–Signal Transistors, FETs and Diodes Device DataTMOS FET TransistorN–ChannelMAXIMUM RATINGSRatingSymbol Value Unit Drain–Source Voltage V DSS 60Vdc Drain–Gate VoltageV DGS 60Vdc Gate–Source Voltage — Continuous— Non–repetitive (t p ≤ 50 m s)V GS V GSM ±20±40Vdc Vpk Drain Current – ContinuousPulsedI D I DM0.50.8AdcTHERMAL CHARACTERISTICSCharacteristicSymbol Max Unit Total Device Dissipation FR–5 Board (1)T A = 25°CDerate above 25°CP D2251.8mW mW/°C Thermal Resistance, Junction to Ambient R q JA 556°C/W Junction and Storage TemperatureT J , T stg–55 to +150°CDEVICE MARKINGMMBF170LT1 = 6ZELECTRICAL CHARACTERISTICS (T C = 25°C unless otherwise noted)CharacteristicSymbolMinMaxUnitOFF CHARACTERISTICSDrain–Source Breakdown Voltage (V GS = 0, I D = 100 m A)V (BR)DSS 60—Vdc Gate–Body Leakage Current, Forward (V GSF = 15 Vdc, V DS = 0)I GSS—10nAdcON CHARACTERISTICS (2)Gate Threshold Voltage (V DS = V GS , I D = 1.0 mA)V GS(th)0.8 3.0Vdc Static Drain–Source On–Resistance (V GS = 10 Vdc, I D = 200 mA)r DS(on)— 5.0W On–State Drain Current (V DS = 25 Vdc, V GS = 0)I D(off)—0.5m ADYNAMIC CHARACTERISTICSInput Capacitance(V DS = 10 Vdc, V GS = 0 V, f = 1.0 MHz)C iss—60pFSWITCHING CHARACTERISTICS (2)Turn–On Delay Time (V = 25 Vdc, I = 500 mA, R = 50 W t d(on)—10nsTurn–Off Delay Time(DD ,D ,gen )Figure 1t d(off)—101.FR–5 = 1.0 0.75 0.062 in.2.Pulse Test: Pulse Width v 300 m s, Duty Cycle v 2.0%.TMOS is a registered trademark of Motorola, Inc.Thermal Clad is a trademark of the Bergquist Company Order this document by MMBF170LT1/DMOTOROLASEMICONDUCTOR TECHNICAL DATAMMBF170LT1123CASE 318–08, STYLE 21SOT–23 (TO –236AB)© Motorola, Inc. 1996DRAIN 31GATE2SOURCE®REV 2MMBF170LT12Motorola Small–Signal Transistors, FETs and Diodes Device DataFigure 1. Switching Test Circuit Figure 2. Switching Waveform20 dB 50 W ATTENUATORPULSE GENERATOR50 W50 W1 M WV out125 W+25 V40 pFV inTO SAMPLING SCOPE 50 W INPUT PULSE WIDTH 50%90%50%10%10%90%90%V inOUTPUT INVERTED INPUT(V in AMPLITUDE 10 VOLTS)V out t off t ft d(off)t on t d(on)t r I D , D R A I N C U R R E N T (A M P S )r D S (o n ), S T A T I C D R A I N –S O U R C E O N –R E S I S T A N C E (N O R M A L I Z E D )V G S (t h ), T H R E S H O L D V O L T A G E (N O R M A L I Z E D )I D , D R A I N C U R R E N T (A M P S )2.01.81.61.41.21.00.80.60.40.20101.02.03.04.05.06.07.08.09.0V DS , DRAIN SOURCE VOLTAGE (VOLTS)Figure 3. Ohmic Region 1.00.80.60.40.2100 1.02.03.04.05.06.07.08.09.0V GS , GATE SOURCE VOLTAGE (VOLTS)Figure 4. Transfer Characteristics2.42.22.01.81.61.41.21.00.80.60.4 1.21.051.11.101.00.950.90.850.80.750.7–60–20+20+60+100+140–60–20+20+60+100+140T, TEMPERATURE (°C)Figure 5. Temperature versus Static Drain–Source On–Resistance T, TEMPERATURE (°C)Figure 6. Temperature versus GateThreshold VoltageT A = 25°CV GS = 10 V9 V 8 V7 V 6 V 4 V 3 V 5 V V DS = 10 V–55°C25°C125°CV GS = 10 V I D = 200 mAV DS = V GS I D = 1.0 mAMMBF170LT13Motorola Small–Signal Transistors, FETs and Diodes Device Data INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGEMINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONSSurface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connectioninterface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process.SOT–23mminches 0.0370.950.0370.950.0792.00.0350.90.0310.8SOT–23 POWER DISSIPATIONThe power dissipation of the SOT–23 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation.Power dissipation for a surface mount device is determined by T J(max), the maximum rated junction temperature of the die, R θJA , the thermal resistance from the device junction to ambient, and the operating temperature, T A . Using the values provided on the data sheet for the SOT–23 package,P D can be calculated as follows:P D =T J(max) – T A R θJAThe values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature T A of 25°C, one can calculate the power dissipation of the device which in this case is 225 milliwatts.P D =150°C – 25°C 556°C/W= 225 milliwattsThe 556°C/W for the SOT–23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT–23 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad ™. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint.SOLDERING PRECAUTIONSThe melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected.•Always preheat the device.•The delta temperature between the preheat and soldering should be 100°C or less.*•When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method,the difference shall be a maximum of 10°C.•The soldering temperature and time shall not exceed 260°C for more than 10 seconds.•When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less.•After soldering has been completed, the device should be allowed to cool naturally for at least three minutes.Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress.•Mechanical stress or shock should not be applied during cooling.*Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.MMBF170LT14Motorola Small–Signal Transistors, FETs and Diodes Device DataPACKAGE DIMENSIONSDJKLA CB SHGV 312CASE 318–08ISSUE AESOT–23 (TO–236AB)DIMA MIN MAX MIN MAX MILLIMETERS 0.11020.1197 2.80 3.04INCHESB 0.04720.0551 1.20 1.40C 0.03500.04400.89 1.11D 0.01500.02000.370.50G 0.07010.0807 1.78 2.04H 0.00050.00400.0130.100J 0.00340.00700.0850.177K 0.01800.02360.450.60L 0.03500.04010.89 1.02S 0.08300.0984 2.10 2.50V0.01770.02360.450.60NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: INCH.3.MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.STYLE 21:PIN 1.GATE2.SOURCE3.DRAINMotorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.How to reach us:USA /EUROPE /Locations Not Listed : Motorola Literature Distribution;JAPAN : Nippon Motorola Ltd.; T atsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,P .O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–54543–14–2 T atsumi Koto–Ku, T okyo 135, Japan. 03–81–3521–8315MFAX : RMFAX0@ – TOUCHTONE 602–244–6609ASIA/PACIFIC : Motorola Semiconductors H.K. Ltd.; 8B T ai Ping Industrial Park, INTERNET : http://Design–51 Ting Kok Road, T ai Po, N.T ., Hong Kong. 852–26629298MMBF170LT1/D*MMBF170LT1/D*◊。

LT1970IFE资料

VC SRC = 4V20µs/DIV1970 TA02VC SNK = 2VR CS = 1Ω1234567UUUPI FU CTIO SV EE (Pins 1, 10, 11, 20, Package Base): Minus Supply Voltage. V EE connects to the substrate of the integrated circuit die, and therefore must always be the most negative voltage applied to the part. Decouple V EE to ground with a low ESR capacitor. V EE may be a negative voltage or it may equal ground potential. Any or all of the V EE pins may be used. Unused V EE pins must remain open.V– (Pin 2):Output Stage Negative Supply. V– may equal V EE or may be smaller in magnitude. Only output stage current flows out of V–, all other current flows out of V EE. V– may be used to drive the base/gate of an external power device to boost the amplifier’s output current to levels above the rated 500mA of the on-chip output devices. Unless used to drive boost transistors, V– should be decoupled to ground with a low ESR capacitor.OUT (Pin 3): Amplifier Output. The OUT pin provides the force function as part of a Kelvin sensed load connection. OUT is normally connected directly to an external load current sense resistor and the SE NSE+ pin. Amplifier feedback is directly connected to the load and the other end of the current sense resistor. The load connection is also wired directly to the SENSE– pin to monitor the load current.The OUT pin is current limited to ±800mA typical. This current limit protects the output transistor in the event that connections to the external sense resistor are opened or shorted which disables the precision current limit function.SENSE+ (Pin 4): Positive Current Sense Pin. This lead is normally connected to the driven end of the external sense resistor. Sourcing current limit operation is activated when the voltage V SENSE (V SENSE+ – V SENSE–) equals 1/ 10 of the programming control voltage at VC SRC (Pin 13). Sinking current limit operation is activated when the voltage V SENSE equals –1/10 of the programming control voltage at VC SNK (Pin 12).FILTER (Pin 5): Current Sense Filter Pin. This pin is normally not used and should be left open or shorted to the SENSE– pin. The FILTER pin can be used to adapt the response time of the current sense amplifiers with a 1nF to 100nF capacitor connected to the SENSE– input. An internal 1k resistor sets the filter time constant. SENSE– (Pin 6): Negative Current Sense Pin. This pin is normally connected to the load end of the external sense resistor. Sourcing current limit operation is activated when the voltage V SENSE (V SENSE+ – V SENSE–) equals 1/ 10 of the programming control voltage at VC SRC (Pin 13). Sinking current limit operation is activated when the voltage V SENSE equals –1/10 of the programming control voltage at VC SNK (Pin 12).V CC (Pin 7): Positive Supply Voltage. All circuitry except the output transistors draw power from V CC. Total supply voltage from V CC to V EE must be between 3.5V and 36V. V CC must always be greater than or equal to V+. V CC should always be decoupled to ground with a low ESR capacitor.–IN (Pin 8): Inverting Input of Amplifier. –IN may be any voltage from V EE – 0.3V to V EE + 36V. –IN and +IN remain high impedance at all times to prevent current flow into the inputs when current limit mode is active. Care must be taken to insure that –IN or +IN can never go to a voltage below V EE – 0.3V even during transient conditions or damage to the circuit may result. A Schottky diode from V EE to –IN can provide clamping if other elements in the circuit can allow –IN to go below V EE.+IN (Pin 9): Noninverting Input of Amplifier. +IN may be any voltage from V EE – 0.3V to V EE + 36V. –IN and +IN remain high impedance at all times to prevent current flow into the inputs when current limit mode is active. Care must be taken to insure that –IN or +IN can never go to a voltage below V EE – 0.3V even during transient conditions or damage to the circuit may result. A Schottky diode from V EE to +IN can provide clamping if other elements in the circuit can allow +IN to go below V EE.81970fb91970fbcurrent limit is not active. ISRC, ISNK and TSD may be wired “OR” together if desired. ISRC may be left open if this function is not monitored.ISNK (Pin 17): Sinking Current Limit Digital Output Flag.ISNK is an open collector digital output. ISNK pulls low whenever the sinking current limit amplifier assumes control of the output. This pin can sink up to 10mA of current. The current limit flag is off when the source current limit is not active. ISRC, ISNK and TSD may be wired “OR” together if desired. ISNK may be left open if this function is not monitored.TSD (Pin 18): Thermal Shutdown Digital Output Flag. TSD is an open collector digital output. TSD pulls low whenever the internal thermal shutdown circuit activates, typically at a die temperature of 160°C. This pin can sink up to 10mA of output current. The TSD flag is off when the die temperature is within normal operating temperatures.ISRC, ISNK and TSD may be wired “OR” together if desired. ISNK may be left open if this function is not monitored. Thermal shutdown activation should prompt the user to evaluate electrical loading or thermal environ-mental conditions.V + (Pin 19): Output Stage Positive Supply. V + may equal V CC or may be smaller in magnitude. Only output stage current flows through V +, all other current flows into V CC .V + may be used to drive the base/gate of an external power device to boost the amplifier’s output current to levels above the rated 500mA of the on-chip output devices.Unless used to drive boost transistors, V + should be decoupled to ground with a low ESR capacitor.Package Base: The exposed backside of the package is electrically connected to the V EE pins on the IC die. The package base should be soldered to a heat spreading pad on the PC board that is electrically connected to V EE .U U UPI FU CTIO SVC SNK (Pin 12): Sink Current Limit Control Voltage Input.The current sink limit amplifier will activate when the sense voltage between SE NSE + and SE NSE – equals –1.0 • V VCSNK /10. VC SNK may be set between V COMMON and V COMMON + 6V. The transfer function between VC SNK and V SENSE is linear except for very small input voltages at VC SNK < 60mV. V SENSE limits at a minimum set point of 4mV typical to insure that the sink and source limit amplifiers do not try to operate simultaneously. To force zero output current, the ENABLE pin can be taken low.VC SRC (Pin 13): Source Current Limit Control Voltage Input. The current source limit amplifier will activate when the sense voltage between SENSE + and SENSE –equals V VCSRC /10. VC SRC may be set between V COMMON and V COMMON + 6V. The transfer function between VC SRC and V SENSE is linear except for very small input voltages at VC SRC < 60mV. V SENSE limits at a minimum set point of 4mV typical to insure that the sink and source limit amplifiers do not try to operate simultaneously. To force zero output current, the ENABLE pin can be taken MON (Pin 14): Control and ENABLE inputs and flag outputs are referenced to the COMMON pin. COMMON may be at any potential between V EE and V CC – 3V. In typical applications, COMMON is connected to ground.ENABLE (Pin 15): ENABLE Digital Input Control. When taken low this TTL-level digital input turns off the amplifier output and drops supply current to less than 1mA. Use the ENABLE pin to force zero output current. Setting VC SNK =VC SRC = 0V allows I OUT = ±4mV/R SENSE to flow in or out of V OUT .ISRC (Pin 16): Sourcing Current Limit Digital Output Flag.ISRC is an open collector digital output. ISRC pulls low whenever the sourcing current limit amplifier assumes control of the output. This pin can sink up to 10mA of current. The current limit flag is off when the source10111213141970fband V – to their minimum values for the required output swing will minimize power dissipation. The supplies V CC and V EE may also be reduced to a minimal value, but these supply pins do not carry high currents, and the power saving is much less. V CC and V EE must be greater than the maximum output swing by 1.5V or more.When V – and V + are provided separately from V CC and V EE ,care must be taken to insure that V – and V + are always less than or equal to the main supplies in magnitude. Protec-tion Schottky diodes may be required to insure this in all cases, including power on/off transients.Operation with reduced V + and V – supplies does not affect any performance parameters except maximum output swing. All DC accuracy and AC performance specifications guaranteed with V CC = V + and V EE = V – are still valid with the reduced output signal swing range.Heat SinkingThe power dissipated in the LT1970 die must have a path to the environment. With 100°C/W thermal resistance in free air with no heat sink, the package power dissipation is limited to only 1W. The 20-pin TSSOP package with exposed copper underside is an efficient heat conductor if it is effectively mounted on a PC board. Thermal resis-tances as low as 40°C/W can be obtained by soldering the bottom of the package to a large copper pattern on the PC board. For operation at 85°C, this allows up to 1.625W of power to be dissipated on the LT1970. At 25°C operation,up to 3.125W of power dissipation can be achieved. The PC board heat spreading copper area must be connected to V EE .Figure 5 shows examples of PCB metal being used for heat spreading. These are provided as a reference for what might be expected when using different combinations of metal area on different layers of a PCB. These examples are with a 4-layer board using 1oz copper on each layer. The most effective layers for spreading heat are those closest to the LT1970 junction. Soldering the exposed thermal pad of the TSSOP package to the board produces a thermal resistance from junction-to-case of approximately 3°C/W.As a minimum, the area directly beneath the package on all PCB layers can be used for heat spreading. However,limiting the area to that of the metal heat sinking pad is notAPPLICATIO S I FOR ATIOW UUU very effective. Expanding the area on various layers sig-nificantly reduces the overall thermal resistance. The addition of vias (small 13 mil holes which fill during PCB plating) connecting all layers of metal also helps reduce the operating temperature of the LT1970. These are also shown in Figure 5.It is important to note that the metal planes used for heat sinking are connecting electrically to V EE . These planes must be isolated from any other power planes used in the PCB design.Another effective way to control the power amplifier oper-ating temperature is to use airflow over the board. Airflow can significantly reduce the total thermal resistance as also shown in Figure 5.DRIVING REACTIVE LOADS Capacitive LoadsThe LT1970 is much more tolerant of capacitive loading than most operational amplifiers. In a worst-case configu-ration as a voltage follower, the circuit is stable for capaci-tive loads less than 2.5nF. Higher gain configurations improve the C LOAD handling. If very large capacitive loads are to be driven, a resistive decoupling of the amplifier from the capacitive load is effective in maintaining stability and reducing peaking. The current sense resistor, usually connected between the output pin and the load can serve as a part of the decoupling resistance.Inductive LoadsLoad inductance is usually not a problem at the outputs of operational amplifiers, but the LT1970 can be used as a high output impedance current source. This condition may be the main operating mode, or when the circuit enters a protective current limit mode. Just as load capaci-tance degrades the phase margin of normal op amps, load inductance causes a peaking in the loop response of the feedback controlled current source. The inductive load may be caused by long lead lengths at the amplifier output.If the amplifier will be driving inductive loads or long lead lengths (greater than 4 inches) a 500pF capacitor from the SENSE – pin to the ground plane will cancel the inductive load and ensure stability.1516171819202122Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.2324© LINEAR TECHNOLOGY CORPORA TION 2002LT 0407 REV B • PRINTED IN USALinear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417(408) 432-1900 ● FAX: (408) 434-0507 ● 。

mmbd7000lt1g工作原理

mmbd7000lt1g工作原理MMBD7000LT1G是一种NPN型双极性晶体管，广泛应用于各种电子设备中。

在理解其工作原理之前，我们首先需要了解晶体管的基本概念。

晶体管是一种半导体器件，由三层不同掺杂的材料构成。

这三层分别为发射区（Emitter）、基极区（Base）和集电区（Collector）。

晶体管的工作原理基于PN结和掺杂材料的特性。

在MMBD7000LT1G中，发射区为N型掺杂，基极区为P型掺杂，而集电区为N型掺杂。

这种结构使得晶体管具有放大电流和控制电流的特性。

MMBD7000LT1G的工作原理如下：当在发射区加上正向偏置电压时，N型掺杂的电子会被加速，从而形成电子云。

这些电子云继续向基极区移动，与P型掺杂的空穴发生复合。

这个过程会产生电流，称为发射电流。

在正常工作状态下，基极区是非常薄的。

当发射区的电流通过基极区时，基极区的宽度决定了通过的电子数量。

这样，通过控制基极区的电流，我们可以控制集电区的电流。

当基极区的电流较小时，只有一部分电子能够通过基极区，进入集电区。

这时，集电区的电流也较小。

当基极区的电流增大时，更多的电子能够通过基极区，进入集电区，从而导致集电区的电流增大。

这个过程实现了电流的放大。

需要注意的是，MMBD7000LT1G是一个低功耗晶体管，其最大集电电流为100毫安。

因此，在使用过程中要确保不超过其额定电流范围，以避免晶体管的烧毁。

除了放大电流，MMBD7000LT1G还具有快速开关特性。

在开关操作中，通过控制基极区的电流，可以使晶体管从导通状态切换到截止状态。

这种开关特性使得晶体管在数字电路和模拟电路中有着广泛的应用。

总结起来，MMBD7000LT1G是一种NPN型双极性晶体管，其工作原理基于PN结和掺杂材料的特性。

通过控制基极区的电流，可以实现对集电区电流的放大和控制。

同时，它还具有快速开关特性，在各种电子设备中起着重要的作用。

希望通过本文的介绍，读者能够更加了解MMBD7000LT1G的工作原理，并在实际应用中能够正确使用它。

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Unit Vdc Vdc mAdc
2
CASE 318 – 08, STYLE 6 SOT– 23 (TO – 236AB)
DEVICE MARKING
MMBTA70LT1 = M2C
THERMAL CHARACTERISTICS
Characteristic Total Device Dissipation FR-5 Board,(1) TA = 25°C Derate above 25°C Thermal Resistance, Junction to Ambient Total Device Dissipation Alumina Substrate,(2) TA = 25°C Derate above 25°C Thermal Resistance, Junction to Ambient Junction and Storage Temperature Symbol PD Max 225 1.8 RθJA PD 556 300 2.4 RθJA TJ, Tstg Symbol 417 – 55 to +150 Unit mW mW/°C °C/W mW mW/°C °C/W °C
IB = 400 µA 350 µA 250 µA 200 µA 150 µA
0.6
0.4
40
100 µA 50 µA
0.2
20
0 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 IB, BASE CURRENT (mA)
0 5.0 10 20 0 5.0 10 15 20 25 30 35 VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS) 40
Figure 6. DC Current Gain
VCE , COLLECTOR–EMITTER VOLTAGE (VOLTS)
1.0 TA = 25°C 0.8 IC = 1.0 mA 10 mA 50 mA 100 mA IC, COLLECTOR CURRENT (mA)
100
TA = 25°C PULSE WIDTH = 300 µs 80 DUTY CYCLE ≤ 2.0% 300 µA 60
Thermal Clad is a trademark of the Bergquist Company
Motorola Small–Signal Transistors, FETs and Diodes Device Data © Motorola, Inc. 1996
1
元器件交易网 MMBTA70LT1
θV, TEMPERATURE COEFFICIENTS (mV/°C)
1.4
1.6 *APPLIES for IC/IB ≤ hFE/2 0.8 *qVC for VCE(sat) 0 – 55°C to 25°C 0.8 25°C to 125°C 1.6 25°C to 125°C
qVB for VBE
+ 20 log10
en2
) 4KTRS ) In 2RS2 1 2
Figure 5. Wideband 2 Motorola Small–Signal Transistors, FETs and Diodes Device Data
元器件交易网
TYPICAL STATIC CHARACTERISTICS
TYPICAL NOISE CHARACTERISTICS
(VCE = – 5.0 Vdc, TA = 25°C)
10 7.0 en, NOISE VOLTAGE (nV) 5.0 IC = 10 µA 30 µA 3.0 2.0 1.0 mA 100 µA 300 µA BANDWIDTH = 1.0 Hz RS ≈ 0 In, NOISE CURRENT (pA) 1.0 7.0 5.0 3.0 2.0 1.0 0.7 0.5 0.3 0.2 1.0 10 20 50 100 200 500 1.0 k f, FREQUENCY (Hz) 2.0 k 5.0 k 10 k 0.1 10 20 50 100 200 500 1.0 k 2.0 k f, FREQUENCY (Hz) 5.0 k 10 k 300 µA 100 µA 30 µA 10 µA IC = 1.0 mA
BANDWIDTH = 1.0 Hz RS , SOURCE RESISTANCE (OHMS)
RS , SOURCE RESISTANCE (OHMS)
BANDWIDTH = 1.0 Hz
0.5 dB 1.0 dB 2.0 dB 3.0 dB 5.0 dB 500 700 1.0 k
Figure 3. Narrow Band, 100 Hz
Figure 7. Collector Saturation Region
Figure 8. Collector Characteristics
TJ = 25°C 1.2 V, VOLTAGE (VOLTS) 1.0 0.8 VBE(sat) @ IC/IB = 10 0.6 VBE(on) @ VCE = 1.0 V 0.4 0.2 VCE(sat) @ IC/IB = 10 0 0.1 0.2 0.5 1.0 2.0 5.0 10 20 IC, COLLECTOR CURRENT (mA) 50 100
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Min Max Unit
OFF CHARACTERISTICS
Collector–Emitter Breakdown Voltage (IC = –1.0 mAdc, IB = 0) Emitter–Base Breakdown Voltage (IE = –100 µAdc, IC = 0) Collector Cutoff Current (VCB = –30 Vdc, IE = 0) V(BR)CEO V(BR)EBO ICBO –40 –4.0 — — — –100 Vdc Vdc nAdc
BANDWIDTH = 1.0 Hz RS ≈ ∞
Figure 1. Noise Voltage
Figure 2. Noise Current
NOISE FIGURE CONTOURS
(VCE = – 5.0 Vdc, TA = 25°C)
1.0 M 500 k 200 k 100 k 50 k 20 k 10 k 5.0 k 2.0 k 1.0 k 500 200 100 10 20 30 50 70 100 200 300 IC, COLLECTOR CURRENT (µA) 0.5 dB 1.0 dB 2.0 dB 3.0 dB 5.0 dB 500 700 1.0 k 1.0 M 500 k 200 k 100 k 50 k 20 k 10 k 5.0 k 2.0 k 1.0 k 500 200 100 10 20 30 50 70 100 200 300 IC, COLLECTOR CURRENT (µA)
ON CHARACTERISTICS
DC Current Gain (IC = –5.0 mAdc, VCE = –10 Vdc) Collector–Emitter Saturation Voltage (IC = –10 mAdc, IB = –1.0 mAdc) hFE VCE(sat) 40 — 400 –0.25 — Vdc
SMALL–SIGNAL CHARACTERISTICS
Current–Gain – Bandwidth Product (IC = –5.0 mAdc, VCE = –10 Vdc, f = 100 MHz) Output Capacitance (VCB = –10 Vdc, IE = 0, f = 1.0 MHz) 1. FR–5 = 1.0 x 0.75 x 0.062 in. 2. Alumina = 0.4 x 0.3 x 0.024 in. 99.5% alumina. fT Cobo 125 — — 4.0 MHz pF
Noise Figure is Defined as: NF
0.5 dB 1.0 dB 2.0 dB 3.0 dB 5.0 dB 200 300 500 700 1.0 k IC, COLLECTOR CURRENT (µA)
4KTRS en = Noise Voltage of the Transistor referred to the input. (Figure 3) In = Noise Current of the Transistor referred to the input. (Figure 4) K = Boltzman’s Constant (1.38 x 10–23 j/°K) T = Temperature of the Source Resistance (°K) RS = Source Resistance (Ohms)
3
元器件交易网 MMBTA70LT1
TYPICAL DYNAMIC CHARACTERISTICS
500 300 200 100 70 50 30 20 td @ VBE(off) = 0.5 V 10 7.0 5.0 1.0 tr VCC = 3.0 V IC/IB = 10 TJ = 25°C t, TIME (ns) 1000 700 500 300 200 100 70 50 30 20 10 –1.0 ts
元器件交易网
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by MMBTA70LT1/D
General Purpose Transistor
PNP Silicon