H558中文资料
R5510HXXXX中文资料
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元器件交易网
Pin No.
PIN DESCRIPTION
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HMHAA280R2,HMHAA280R2,HMHAA280R2,HMHAA280V,HMHAA280R2V,HMHAA280R1,HMHAA280R1, 规格书,Datasheet 资料
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HMHAA280 — AC Input, Half Pitch Mini-Flat Package 4-Pin Optocoupler
Typical Performance Characteristics
Fig. 1 Forward Current vs. Forward Voltage
Typical Performance Characteristics (Continued)
Fig. 6 Collector Current vs. Collector-Emitter Voltage
50 TA = 25˚C 18 16 14 IF = 30 mA 12 10 8 6 4 IF = 2 mA 2 IF = 1.0 mA 0 0 1 2 3 4 5 6 7 8 9 10 0 0.0 0.2 0.4 IF = 0.5 mA 0.6 IF = 1.0 mA 0.8 1.0 IF = 10 mA IF = 5 mA IF = 20 mA IF = 40 mA IF = 50 mA
VCE - COLLECTOR-EMITTER VOLTAGE (V)
IC - COLLECTOR CURRENT (mA)
VCE - COLLECTOR-EMITTER VOLTAGE (V)
Fig. 8 Collector Dark Current vs. Temperature
100 VCE = 5 V
IC - COLLECTOR CURRENT (mA)
IF = 25 mA
10
IF = 10 mA
IF = 5 mA
IF = 1 mA 1
IF = 0.5 mA 0.1 -40 -20 0 20 40 60 80 100
HMBT8050中文资料
HMBT8050中文资料Page No. : 1/3HMBT8050NPN EPITAXIAL TRANSISTORDescriptionThe HMBT8050 is designed for general purpose amplifier applications.FeaturesHigh DC Current hFE=150-400 at IC=150mA ? Complementary to HMBT8550Absolute Maximum RatingsMaximum TemperaturesStorage Temperature........................................................................................... -55 ~ +150 °C Junction Temperature.................................................................................... +150 °C Maximum ? Maximum Power DissipationTotal Power Dissipation (Ta=25°C)............................................................................... 225 mW ? Maximum Voltages and Currents (Ta=25°C)VCBO Collector to Base Voltage......................................................................................... 25 V VCEO Collector to Emitter Voltage...................................................................................... 20 V VEBO Emitter to Base Voltage.............................................................................................. 5 V IC CollectorCurrent (700)mACharacteristics (Ta=25°C)Symbol Min.Typ.Max.Unit Test ConditionsBVCBO 25--V IC=10uA, IE=0BVCEO 20--V IC=1mA, IB=0BVEBO 5--V IE=10uA, IC=0ICBO --1uAVCB=20V. IE=0*VCE(sat)--500mV IC=500mA, IB=50mA VBE(on)--1V VCE=1V, IC=150mA *hFE 150-500VCE=1V, IC=150mA fT 150--MHz VCE=10V, IC=20mA, f=100MHz Cob--10pFVCB=10V, f=1MHz*Pulse Test: Pulse Width ≤380us, Duty Cycle ≤2%Classification Of hFERank D9D D9E Range150-300250-500Page No. : 2/3 Characteristics CurvePage No. : 3/3SOT-23 Dimension*: TypicalInches MillimetersInches MillimetersDIM Min.Max.Min.Max.DIM Min.Max.Min.Max.A 0.11020.1204 2.80 3.04J0.00340.00700.0850.177B 0.04720.0630 1.20 1.60K 0.01280.02660.320.67C 0.03350.05120.89 1.30L0.03350.04530.851.15D 0.01180.01970.300.50S 0.08300.10832.10 2.75G 0.06690.0910 1.70 2.30V0.00980.02560.250.65H0.00050.00400.0130.10Notes: 1.Dimension and tolerance based on our Spec. dated Sep. 07,1997.2.Controlling dimension: millimeters.3.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of basematerial.4.If there is any question with packing specification or packing method, please contact your local HSMC sales office.Material:Lead: 42 Alloy; solder platingMold Compound: Epoxy resin family, flammability solid burning class: UL94V-0Important Notice:All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of HSMC.? HSMC reserves the right to make changes to its products without notice.HSMC semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.HSMC assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.Head Office And Factory:Head Office (Hi-Sincerity Microelectronics Corp.): 10F.,No. 61, Sec. 2, Chung-Shan N. Rd. Taipei Taiwan R.O.C.Tel: 886-2-25212056 Fax: 886-2-25632712, 25368454Factory 1: No. 38, Kuang Fu S. Rd., Fu-Kou Hsin-Chu Industrial Park Hsin-Chu Taiwan. R.O.C Tel: 886-3-5983621~5 Fax: 886-3-5982931。
HS00-98255中文资料
LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF
C, T 1CT:1CT 1CT:1CT C, T 1CT:1CT 1CT:1CT C, T 1CT:1CT 1CT:1CT T, C 1CT:1CT 1CT:1CT C, T 1CT:1CT 1CT:1CT C, T 1CT:1CT 1CT:1CT C, T 1CT:1CT 1CT:1CT C, T 1CT:1 1CT:1CT C, T 1CT:1CT 1CT:1CT C, T √2CT:1CT 1CT:1CT C, T 1CT:1CT 1CT:1CT T, C 1CT:1CT 1CT:1CT C, T 1CT:1CT 1CT:1CT C, T 1CT:1CT 1CT:1CT T, C 1CT:1CT 1CT:1CT T, C 1CT:1CT 1CT:1CT T, C 1CT:1CT 1CT:1CT T, C 1CT:1CT 1CT:1CT T, C 1CT:1CT 1CT:1CT C,T 1CT:1CT 1CT:1CT T, C 1CT:1CT 1CT:1CT C,T 1CT:1CT 1CT:1CT T, C 1CT:1CT 1CT:1CT C, T 1CT:1CT 1CT:1CT T, C 1CT:1CT 1CT:1CT C, T 1CT:1CT 1CT:1CT C, T 1CT:√2CT 1CT:1CT C, T 1CT:1CT 1CT:1CT C, T 1CT:1CT 1CT:1CT T, C 1CT:1CT 1CT:1CT T, C 2CT:1CT 1:1:1CT T, C √2CT:1CT 1CT:1CT T, C 1.25CT:1CT 1CT:1CT T, C 1.25CT:1CT 1CT:1CT T, C 1.25CT:1CT 1CT:1CT C, T 1CT:1CT 1CT:1CT C, T 1CT:1CT 1CT:1CT C, T 1CT:1CT 1CT:1CT C, T 1CT:√2CT 1CT:1CT C, T 1CT:1CT 1CT:1CT T, C √2CT:1CT 1CT:1CT C, T 1CT:1CT 1CT:1CT C, T 1CT:1CT 1CT:1CT
E558HN-100099中文资料
Features
Unit: mm
Unit: mm
• Low profile SMT molded coil. • Ideal for use in RF circuit for communication and car radio applications. • Shielded case also available.
30.0pF± 2%
* Minimum inductance values with core 2 turns above top of bobbin. ** C Range shows tolerance.
continued on next page
元器件交易网
TYPE
TYPE MC152
Without Case TOKO Part Number(1) Ferrite Core E558CN-100020 E558CN-100021 E558CN-100022 E558CN-100023 *E558CN-100024 *E558CN-100025 Air Core E558HN-100096 E558HN-100097 E558HN-100098 E558HN-100099 E558HN-100100 E558HN-100101 Brass Core E558AN-100040 E558AN-100041 E558AN-100042 E558AN-100043 E558AN-100044 E558AN-100045 Number of Turns 1 1 /2 2 1 /2 3 1 /2 4 1 /2 5 1 /2 6 1 /2 1 1 /2 2 1 /2 3 1 /2 4 1 /2 5 1 /2 6 1 /2 1 1 /2 2 1 /2 3 1 /2 4 1 /2 5 1 /2 6 1 /2 C Range** 80.4pF±2% 53.8pF±3% 37.0pF±3% 28.0pF±3% 22.7pF±3% 17.8pF±3% 86.9pF±10% 61.2pF±10% 44.9pF±10% 34.6pF±10% 27.9pF±10% 22.9pF±10% 88.6pF± 66.5pF± 52.4pF± 44.1pF± 35.3pF± 1% 3% 3% 2% 2% Q(2) 90±20% (at 100MHz) 110±20% (at 100MHz) 110±20% (at 100MHz) 115±20% (at 100MHz) 120±20% (at 100MHz) 120±20% (at 100MHz) 85±20% (at 100MHz) 100±20% (at 100MHz) 105±20% (at 100MHz) 105±20% (at 100MHz) 120±20% (at 100MHz) 120±20% (at 100MHz) 52±20% (at 100MHz) 63±20% (at 100MHz) 56±20% (at 100MHz) 50±20% (at 100MHz) 50±20% (at 100MHz) 50±20% (at 100MHz) Color Code WHITE VIOLET ORANGE YELLOW WHITE BLUE WHITE VIOLET ORANGE YELLOW WHITE BLUE WHITE VIOLET ORANGE YELLOW WHITE BLUE Inductance(3) 32nH 47nH 68nH 90nH 112nH 142nH 29nH 41nH 56nH 73nH 91nH 111nH 29nH 38nH 48nH 57nH 72nH 84nH
BC558中文资料
BC556/557/558/559/560 SILICON TRANSISTORSWITCHING AND AMPLIFIER• HIGH VOLTAGE: BC556, V CEO = -65V • LOW NOISE: BC559, BC560• Complement to BC546 ... BC 550ABSOLUTE MAXIMUM RATINGS (T A =25°C)ELECTRICAL CHARACTERISTICS (T A =25°C)h FE CLASSIFICATIONCharacteristicSymbol RatingUnitCollector-Base Capacitance: BC556: BC557/560: BC558/559Collector-Emitter Voltage: BC556: BC557/560: BC558/559Emitter-Base Voltage Collector Current (DC)Collector Dissipation Junction Temperature Storage TemperatureV CBOV CEOV EBO I C P C T J T STG-80-50-30-65-45-30-5-100500150-65 ~ 150V V VV V V V mA mW °C °C CharacteristicSymbol Test Conditions Min Typ Max Unit Collector Cut-off Current DC Current GainCollector Emitter Saturation Voltage Collector Base Saturation Voltage Base Emitter On Voltage Current Gain Bandwidth Product Collector Base CapacitanceNoise Figure : BC556/557/558 : BC559/560: BC559 : BC560I CBO h FEV CE (sat)V BE (on)V BE (on)f T C CBO NF NFV CB = -30V, I E =0V CE = -5V, I C =2mA I C = -10mA, I B = -0.5mA I C = -100mA, I B = -5mA I C = -10mA, I B = -0.5mA I C = -100mA, I B = -5mA V CE = -5V, I C = -2mA V CE = -5V, I C = -10mA V CE = -5V, I C = -10mA V CB = -10V, f=1MHz V CE = -5V, I C = -200µA f=1KHz, R G =2K ΩV CE = -5V, I C = -200µA R G =2K Ωf=30~15000MHz110-600-90-250-700-900-660150211.21.2-15800-300-650-750-800610442nA mV mV mV mV mV mV MHz pF dB dB dB dBClassificationA B C h FE110-220200-450420-800TO-921. Collector2. Base3. Emitter©1999 Fairchild Semiconductor CorporationRev. BBC556/557/558/559/560 SILICON TRANSISTORTRADEMARKSACEx™CoolFET™CROSSVOLT™E 2CMOS TM FACT™FACT Quiet Series™FAST ®FASTr™GTO™HiSeC™The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.LIFE SUPPORT POLICYFAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION.As used herein:ISOPLANAR™MICROWIRE™POP™PowerTrench™QS™Quiet Series™SuperSOT™-3SuperSOT™-6SuperSOT™-8TinyLogic™1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant intothe body, or (b) support or sustain life, or (c) whosefailure to perform when properly used in accordancewith instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.2. A critical component is any component of a lifesupport device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.PRODUCT STATUS DEFINITIONS Definition of TermsDatasheet Identification Product Status Definition Advance InformationPreliminary No Identification Needed Obsolete This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.This datasheet contains preliminary data, andsupplementary data will be published at a later date.Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.Formative or In DesignFirst ProductionFull ProductionNot In ProductionDISCLAIMERFAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY , FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.。
SCD5584A,SCD5580A,SCD5581A,SCD5582A,SCD5583A, 规格书,Datasheet 资料
Lead (Pb) Free Product - RoHS Compliant Standard Red SCD5580A Yellow SCD5581A High Efficiency Red SCD5582A Green SCD5583A High Efficiency Green SCD5584ASlimline0.145’’ 8-Character 5x5 Dot Matrix Serial InputDot Addressable Intelligent Display® Devices 2006-01-231DESCRIPTIONThe SCD5580A (Red), SCD5581A (Y ellow), SCD5582A (Super-red), SCD5583A (Green) and SCD5584 (HEG) are eight digit dot addressable 5 x 5 matrix, Serial Input, Intelligent Display devices. The eight 3.68 mm (0.145") high digits are packaged in a transparent, 7,62 mm (0.3") pin spacing plastic DIP .The on-board CMOS has a 200 bit RAM (one bit associ-ated with one LED) to generate User Defined Characters. Due to the reduced LED count, power requirement and heat dissipation are reduced by 30%. Additionally in Power Down Mode quiescent current is <50 µA.The SCD558XA is designed to work with the Serial port of most common microprocessors. The Clock I/O (CLK I/O) capability to supply a high speed external clock. This feature can minimize audio in-band interference forportable communication equipment or eliminate the visual synchronization effects found in high vibration environments such as avionics equipment.FEATURES•Low Profile Package: 60% Smaller than Industry Stan-dard 8-Digit Display•Eight 3.68 mm (0.145") 5 x 5 Dot Matrix Characters in Red, Y ellow, Super-red, Green, or High Efficiency Green•Optimum Display Surface Efficiency (display area to package ratio)•Low Power–30% Less Power Dissipation than 5 x 7 Format•High Speed Data Input Rate: 5.0 MHz •ROMless Serial Input, Dot Addressable Display—Ideal for User Defined Characters •Built-in Decoders, Multiplexers and LED Drivers •Readable from 1.8 meters (6 Feet)•Wide Viewing Angle, X Axis ± 55°, Y Axis ± 65°•Attributes:– 200 bit RAM for User Defined Characters – Eight Dimming Levels– Power Down Mode (<250 µW)– Hardware/Software Clear Function – Lamp Test•Internal or External Clock•End-Stackable Dual-in-line Plastic Package – 3.3 V CapabilityOrdering InformationType Color of Emission Character Heightmm (inch)Ordering CodeSCD5580A standard red3.68 (0.145)Q68000A0994SCD5581A yellow Q68000A0996 SCD5582A super-red Q68000A0997 SCD5583A green Q68000A0998 SCD5584A high efficiency green Q68000A10002006-01-2322006-01-233Maximum RatingsParameterSymbol Value Unit Operating temperature range T op – 40 … + 85°C Storage temperature range T stg – 40 … + 100°C DC Supply VoltageV CC-0.5 to + 7.0V Input Voltage Levels Relative to GND-0.5 to V CC to 0.5V Solder Temperature1.59 mm (0.063“) below seating plane, t < 5.0 s T S 260°C Relative Humidity 85%ESD (100 pF, 1.5 k Ω)V Z2.0kV Input Current± 100 mA Max. SDCLK Frequency5.0MHzMaximum Number of LEDs on at 100% Brightness 128IC Junction Temperature125°C Optical Characteristics at 25°C(V CC =5.0 V at 100% brightness level, viewing angle: X axis ± 55°, Y axis ± 65°)DescriptionSymbolValuesUnitR e d S C D 5580AY e l l o w S C D 5581AS u p e r -r e d S C D 5582A G r e e n S C D 5583A H i g h E f f i c i e n c y G r e e n S C D 5584A Luminous Intensity (min.) (typ.)I V 3690124 213124 265124 221124 505µcd/dot µcd/dot Peak Wavelength (typ.)λpeak 660583630565568nm Dominant Wavelength(typ.)λdom639585626570574nm Notes:1.Dot to dot intensity matching at 100% brightness is 1.8:1.2. Displays are binned for hue at 2.0 nm intervals.3. Displays within a given intensity category have an intensity matching of 1.5:1 (max.).2006-01-234Input/Output CircuitsFigures …Inputs“ and …Clock I/O“ show the input and output resis-tor/diode networks used for ESD protection and to eliminate sub-strate latch-up caused by input voltage over/under shoot.Electrical Characteristics at 25°CParameter Min.Typ.Max.Units ConditionsV CC 4.5 5.0 5.5V—I CC (Pwr Dwn Mode) (1)(2)— 5.0—µA V CC=5.0 V, all inputs=0 V or V CCI CC 8 digits(3)16 dots/character—200240mA V CC=5.0 V, “#” displayed in all 8 digitsat 100% brightness at 25°CI IL Input current——–10µA V CC=5.0 V, V IN=0 (all inputs)I IH Input current——10µA V CC=V IN=5.0 V (all inputs)V IH 3.5——V V CC=4.5 V to 5.5 VV IL—— 1.5V V CC=4.5 V to 5.5 VI OH (CLK I/O)—–8.9—mA V CC=4.5 V, V OH=2.4 VI OL (CLK I/O)— 1.6—mA V CC=4.5 V, V OL=0.4 VθJ-pin—35—°C/ W—FextExternal Clock Input Frequency120—347kHz VCC=5.0 V, CLKSEL=0F osc Internal Clock Input Frequency120—347kHz V CC=5.0 V, CLKSEL=1.0Clock I/O Bus Loading——240pF—Clock Out Rise Time——500ns V CC=4.5 V, V OH=2.4 VClock Out Fall Time——500ns V CC=4.5 V, V OH=0.4 VDigit Multiplex Frequency3757681086Hz—Notes:1)When an external clock is used it must be stopped.2)Unused inputs must be tied high.3)Peak current 5/3x I CC.2006-01-235Pin AssignmentPin Function Pin Function1SDCLK28GND2LOAD27DATA3NP26NP4NP25NP5NP24NP6NP23NP7NP22NP8NP21NP9NP20NP10NP19V CC11NP18NC12NP17NP13RST16CLKSEL14GND15CLK I/O Switching Specifications(over operating temperature range and V CC=4.5 V to 5.5 V) Symbol Description Min.Units T RC Reset Active Time600nsT LDS Load Setup Time40nsT DS Data Setup Time40nsT SDCLK Clock Period200nsT SDCW Clock Width70nsT LDH Load Hold Time0nsT DH Data Hold Time20nsT WR Total Write Time 2.2µsT BL Time Between Loads600ns Note: SDCLK duty cycle = 30% Min. and 50% Max.Pin DefinitionsPin Function Definitions1SDCLK Loads data into the 8-bit serial data registeron a low to high transition.2LOAD Low input enables data clocking into 8-bitserial shift register. When LOAD goes high,the contents of 8-bit serial Shift Register willbe decoded.3NP No pin4NP No pin5NP No pin6NP No pin7NP No pin8NP No pin9NP No pin10NP No pin11NP No pin12NP No pin13RST Asynchronous input, when low will clear theMultiplex Counter, User RAM and DataRegister. Control Word Register is set to100% brightness and the Address Register isset to select Digit 0. The display is blanked. 14GND Power supply ground15CLK I/O Outputs master clock or inputs external clock. 16CLKSEL H=internal clock, L=external clock17NP No pin18NC No connection19V CC Power supply20NP No pin21NP No pin22NP No pin23NP No pin24NP No pin25NP No pin26NP No pin27DATA Serial data input28GND Power supply ground2006-01-2362006-01-237Operation of the SCD558XThe SCD558X display consists of 2 CMOS IC containing control logic and drivers for eight 5 x 5 characters. These components are assembled in a compact (38 mm x 10 mm) plastic package.Individual LED dot addressablity allows the user great freedom in creating special characters or mini-icons. The User DefinableCharacter Set Examples illustrate 200 different character and sym-bol possibilities.The use of a serial data interface provides a highly efficient inter-connection between the display and the mother board. TheSCD558X requires only 4 lines as compared to 15 for an equiva-lent 8 character parallel input part.The on-board CMOS IC is the electronic heart of the display. The IC accepts decoded serial data, which is stored in the internal RAM. Asynchronously the RAM is read by the character multiplexer at a strobe rate that results in a flicker free display. Figure …SCD558X Block Diagram“ (page 7) shows the three functional areas of the IC. These include: the input serial data register and control logic, a 200 bits two port RAM, and an internal multiplexer/display driver.Display Column and Row FormatC0C1C2C3C4Row 011111Row 100100Row 200100Row 300100Row 411= Display dot …ON“ 0=Display dot …OFF“Column Data RangesRow 000H to 1FH Row 120H to 3FH Row 240H to 5FH Row 360H to 7FH Row 480H to 9FH2006-01-238The following explains how to format the serial data to be loaded into the display. The user supplies a string of bit mapped decoded characters. The contents of this string is shown in Figure …Loading Serial Character Data a“ (page 8). Figure …Loading Serial Charac-ter Data b“ (page 8) shows that each character consist of six 8 bit words. The first word encodes the display character location and the succeeding five bytes are row data. The row data represents the status (On, Off) of individual column LEDs. Figure …Loading Serial Character Data c“ (page 8) shows that each 8 bit word is formatted to include a three bit Operational Code (OPCODE)defined by bits D7–D5 and five bits (D4–D0) representing Column Data, Character Address, or Control Word Data.Figure …Loading Serial Character Data d“ (page 8) shows thesequence for loading the bytes of data. Bringing the LOAD line low enables the serial register to accept data. The shift action occurs on the low to high transition of the serial data clock (SDCLK). The least significant bit (D0) is loaded first. After eight clock pulses the LOAD line is brought high. With this transition the OPCODE is decoded. The decoded OPCODE directs D4–D0 to be latched in the Character Address register, stored in the RAM as Column data, or latched in the Control Word register. The control ICrequires a minimum 600 ns delay between successive byte loads. As indicated in Figure …Loading Serial Character Data a“ (page 8), a total of 528 bits of data are required to load all eight characters into the display.The Character Address Register bits, D4–D0 (T able …Load Charac-ter Address“ (page 9)) and Row Address Register bits, D7–D5 (T able …Load Column Data“ (page 9)) direct the Column Data bits, D4–D0 (T able …Load Column Data“ (page 9)) to specific RAM loca-tion. T able …Character ’D’“ (page 8) shows the Row Address for the example character “D.” Column data is written and read asynchro-nously from the 200 bit RAM. Once loaded the internal oscillator and character multiplexer reads the data from the RAM. These characters are row strobed with column data as shown in Figures …Row and Column Location“ (page 9) and …Row Strobing“(page 10). The character strobe rate is determined by the internal or user supplied external MUX Clock and the IC’s ÷320 counter.Character “D”Op code D7D6 D5Column Data D4D3D2D1D0 C0C1C2C3C4HexRow 0000111101E Row 10011000131Row 20101000151Row 3011 1000171Row 4111119EThe user can activate four Control functions. These include: LED Brightness Level, Lamp T est, IC Power Down, or Display Clear. OPCODEs and five bit words are used to initiate these functions. The OPCODEs and Control Words for the Character Address and Loading Column Data are shown in T ables …Load Character Address“ (page 9) and …Load Column Data“ (page 9).The user can select seven specific LED brightness levels, T able …Display Brightness“ (page 9). These brightness levels (in percent-ages of full brightness of the display) include: 100% (F0 HEX), 53% (F1HEX), 40% (F2HEX), 27% (F3HEX), 20% (F4HEX), 13% (F5HEX), and 6.6% (F6HEX). The brightness levels are controlled by chang-ing the duty factor of the row strobe pulse.The SCD558XA offers a unique Display Power Down feature which reduces I CC to less than 50 µA. When FF HEX is loaded, as shown in Table …Power Down“ (page 9), the display is set to 0% brightness and the internal multiplex clock is stopped. When in the Power Down mode data may still be written into the RAM. The display is reactivated by loading a new Brightness Level Control Word into the display.The Lamp T est is enabled by loading F8 HEX, T able …Lamp T est“ (page 9), into the serial shift register. This Control Word sets all of the LEDs to a 53% brightness level. Operation of the Lamp T est has no affect on the RAM and is cleared by loading a Brightness Control Word.The Software Clear (C0HEX), given in T able …Software Clear“ (page 9), clears the Address Register and the RAM. The display is blanked and the Character Address Register will be set to Charac-ter 0. The internal counter and the Control Word Register are unaf-fected. The Software Clear will remain active until the next data input cycle is initiated.Load Character AddressOp codeD7D6 D5Character AddressD4D3D2D1D0Hex OperationLoad10100000A0Character 0 10100001A1Character 1 10100010A2Character 2 10100011A3Character 3 10100100A4Character 4 10100101A5Character 5 10100110A6Character 6 10100111A7Character 7 Load Column DataOp codeD7D6 D5Column DataD4D3D2D1D0Operation Load000C0C1C2C3C4Row 0 001C0C1C2C3C4Row 1 010C0C1C2C3C4Row 2 011C0C1C2C3C4Row 3 100C0C1C2C3C4Row 4Display BrightnessOp codeD7D6 D5Control WordD4D3D2D1D0Hex OperationLevel 11110000F0100% 11110001F153% 11110010F240% 11110011F327% 11110100F420% 11110101F513% 11110110F6 6.6%Power DownOp codeD7D6 D5Control WordD4D3D2D1D0Hex OperationLevel 11111111FF0%brightnessLamp TestOp codeD7D6 D5Control WordD4D3D2D1D0Hex OperationLevel 11110B B B Lamp Test(OFF) 11111001F8Lamp Test(OFF)Software ClearOp codeD7D6 D5Control WordD4D3D2D1D0Hex OperationLevel 11000000C0CLEAR2006-01-239Row StrobingMultiplexer and Display DriverThe eight characters are row multiplexed with RAM resident col-umn data. The strobe rate is established by the internal or external MUX Clock rate. The MUX Clock frequency is divided by a 320 counter chain. This results in a typical strobe rate of 750 Hz. By pulling the Clock SEL line low, the display can be operated from an external MUX Clock. The external clock is attached to the CLK I/O connection (pin 15). The maximum external MUX Clock frequency should be limited to 1.0 MHz.An asynchronous hardware Reset (pin 13) is also provided. Bring-ing this pin low will clear the Character Address Register, Control Word Register, RAM, and blanks the display. This action leaves the display set at Character Address 0, and the Brightness Level set at 100%.Thermal ConsiderationsThe SCD558XA has been designed to provide lowest thermal resistance from the CMOS to the ground pin.The heat is then conducted through the traces on the users circuit board to free air. The max. IC operating temperature is 125°C. Maximum. IC junction temperature is calculated using the following equation:T J (IC) Max.=T A+(P D Max.) (RθJ-PIN+RθPIN-A)where RθJ-PIN=35°C/W.P D Max.=V CC Max.x I CC Max=5.5 Vx0.240=1.32 W.RθPIN-A will depend on ground trace thickness, whether parts are soldered to the pcb or socketed and on air circulation.Electrical & Mechanical ConsiderationsInterconnect ConsiderationsOptimum product performance can be had when the following electrical and mechanical recommendations are adopted. The SCD558XA’s IC is constructed in a high speed CMOS process, consequently high speed noise on the SERIAL DAT A, SERIAL DAT A CLOCK, LOAD and RESET lines may cause incorrect data to be written into the serial shift register. Adhere to transmission line termination procedures when using fast line drivers and long cables (>10 cm).Good digital grounds (pins 14, 28) and power supply decoupling (pins 6, 9, 20, 23) will insure that I CC (<400 mA peak) switching currents do not generate localized ground bounce. Therefore it is recommended that each display package use a 0.1 µF and 20 µF capacitor between V CC and ground.When the internal MUX Clock is being used connect the CLKSEL pin to V CC. In those applications where RESET will not be con-nected to the system’s reset control, it is recommended that this pin be connected to the center node of a series 0.1 µF and 100 kΩRC network. Thus upon initial power up the RESET will be held low for 10 ms allowing adequate time for the system power supply to stabilize.ESD ProtectionThe input protection structure of the SCD558XA provides signifi-cant protection against ESD damage. It is capable of withstanding discharges greater than 2.0 kV. T ake all the standard precautions, normal for CMOS components. These include properly grounding personnel, tools, tables, and transport carriers that come in contact with unshielded parts. If these conditions are not, or cannot be met, keep the leads of the device shorted together or the parts in anti-static packaging.Soldering ConsiderationsThe SCD558XA can be hand soldered with SN63 solder using a grounded iron set to 260°C.Wave soldering is also possible following these conditions: Pre-heat that does not exceed 93°C on the solder side of the PC board or a package surface temperature of 85°C. Water soluble organic acid flux (except carboxylic acid) or rosin-based RMA flux without alcohol can be used.Wave temperature of 245°C ± 5°C with a dwell between 1.5 sec. to 3.0 sec. Exposure to the wave should not exceed temperatures above 260°C for five seconds at 1.59 mm (0.063") below the seat-ing plane. The packages should not be immersed in the wave. Post Solder Cleaning ProceduresThe least offensive cleaning solution is hot D.I. water (60 °C) for less than 15 minutes. Addition of mild saponifiers is acceptable. Do not use commercial dishwasher detergents.For faster cleaning, solvents may be used. Exercise care in choos-ing solvents as some may chemically attack the nylon package. Maximum exposure should not exceed two minutes at elevated tem-peratures. Acceptable solvents are TF (trichlorotrifluorethane), T A, 111 T richloroethane, and unheated acetone.(1)Note:1)Acceptable commercial solvents are: Basic TF, Arklone, P.Genesolv, D. Genesolv DA, Blaco-T ron TF and Blaco-T ron T A.2006-01-2310Unacceptable solvents contain alcohol, methanol, methylene chloride, ethanol, TP35, TCM, TMC, TMS+, TE, or TES. Since many commercial mixtures exist, contact a solvent vendor for chemical composition information. Some major solvent manufac-turers are: Allied Chemical Corporation, Specialty Chemical Divi-sion, Morristown, NJ; Baron-Blakeslee, Chicago, IL; Dow Chemical, Midland, MI; E.I. DuPont de Nemours & Co., Wilming-ton, DE.For further information refer to Appnotes 18 and 19 atAn alternative to soldering and cleaning the display modules is to use sockets. Naturally, 28 pin DIP sockets 7.62 mm (0.300") wide with 2.54 mm (0.100") centers work well for single displays. Multi-ple display assemblies are best handled by longer SIP sockets or DIP sockets when available for uniform package alignment. Socket manufacturers are Aries Electronics, Inc., Frenchtown, NJ; Garry Manufacturing, New Brunswick, NJ; Robinson-Nugent, New Albany, IN; and Samtec Electronic Hardward, New Albany, IN.For further information refer to Appnote 22 at Optical ConsiderationsThe 3.68 mm (0.145") high character of the SCD558XA gives readability up to eight feet. Proper filter selection enhances read-ability over this distance.Using filters emphasizes the contrast ratio between a lit LED and the character background. This will increase the discrimination of different characters. The only limitation is cost. T ake into consider-ation the ambient lighting environment for the best cost/benefit ratio for filters.Incandescent (with almost no green) or fluorescent (with almost no red) lights do not have the flat spectral response of sunlight. Plas-tic band-pass filters are an inexpensive and effective way to strengthen contrast ratios. The SCD558XA are red/super-red dis-plays and should be matched with long wavelength pass filter in the 570 nm to 590 nm range. The SCD558XA should be matched with a yellow-green band-pass filter that peaks at 565 nm. For dis-plays of multiple colors, neutral density grey filters offer the best compromise.Additional contrast enhancement is gained by shading the dis-plays. Plastic band-pass filters with built-in louvers offer the next step up in contrast improvement. Plastic filters can be improved further with anti-reflective coatings to reduce glare. The trade-off is fuzzy characters. Mounting the filters close to the display reduces this effect. Take care not to overheat the plastic filter by allowing for proper air flow.Optimal filter enhancements are gained by using circular polarized, anti-reflective, band-pass filters. The circular polarizing further enhances contrast by reducing the light that travels through the fil-ter and reflects back off the display to less than 1%.Several filter manufacturers supply quality filter materials. Some of them are: Panelgraphic Corporation, W. Caldwell, NJ; SGL Homa-lite, Wilmington, DE; 3M Company, Visual Products Division, St. Paul, MN; Polaroid Corporation, Polarizer Division, Cambridge, MA; Marks Polarized Corporation, Deer Park, NY, Hoya Optics, Inc., Fremont, CA.One last note on mounting filters: recessing displays and bezel assemblies is an inexpensive way to provide a shading effect in overhead lighting situations. Several Bezel manufacturers are: R.M.F. Products, Batavia, IL; Nobex Components, Griffith Plastic Corp., Burlingame, CA; Photo Chemical Products of California, Santa Monica, CA; I.E.E.–Atlas, Van Nuys, CA.Microprocessor InterfaceThe microprocessor interface is through the serial port, SPI port or one out of eight data bits on the eight bit parallel port and also con-trol lines SDCLK and LOAD.Power Up SequenceUpon power up display will come on at random. Thus the display should be reset at power-up. The reset will set the Address Regis-ter to Digit 0, User RAM is set to 0 (display blank) the Control Word is set to 0 (100% brightness with Lamp T est off) and the internal counters are reset.2006-01-23112006-01-2312Cascading Multiple DisplaysMultiple displays can be cascaded using the CLKSEL and CLK I/O pins as shown below. The display designated as the Master Clock source should have its CLKSEL pin tied high and the slaves should have their CLKSEL pins tied low. All CLK I/O pins should be tied together. One display CLK I/O can drive 15 slave CLK I/Os. Use RST to synchronize all display counters.Loading Data Into the DisplayUse following procedure to load data into the display:1.Power up the display.2.Bring RST low (600 ns duration minimum) to clear the Multiplex Counter, Address Register, Control Word Register,User Ram and Data Register. The display will be blank. Display brightness is set to 100%.3. If a different brightness is desired, load the proper brightness opcode into the Control Word Register.4. Load the Digit Address into the display.5. Load display row and column data for the selected digit.6. Repeat steps 4 and 5 for all digits.2006-01-2313Data Contents for the Word “Displays”Step D7D6D5D4D3D2D1D0FunctionAB (optional) 1101110000010B B BCLEARBRIGHTNESS SELECT1 2 3 4 5 6101000001010011100100001111010001100011000111110DIGIT D0 SELECTROW 0 D0 (D)ROW 1 D0 (D)ROW 2 D0 (D)ROW 3 D0 (D)ROW 4 D0 (D)7 8 9 10 11 12101000001010011100100010111000100001000010001110DIGIT D1 SELECTROW 0 D1 (I)ROW 1 D1 (I)ROW 2 D1 (I)ROW 3 D1 (I)ROW 4 D1 (I)13 14 15 16 17 18101000001010011100100100111110000011100000111110DIGIT D2 SELECTROW 0 D2 (S)ROW 1 D2 (S)ROW 2 D2 (S)ROW 3 D2 (S)ROW 4 D2 (S)19 20 21 22 23 24101000001010011100100111111010001111101000010000DIGIT D3 SELECTROW 0 D3 (P)ROW 1 D3 (P)ROW 2 D3 (P)ROW 3 D3 (P)ROW 4 D3 (P)25 26 27 28 29 30101000001010011100101001000010000100001000011111DIGIT D4 SELECTROW 0 D4 (L)ROW 1 D4 (L)ROW 2 D4 (L)ROW 3 D4 (L)ROW 4 D4 (L)31 32 33 34 35 36101000001010011100101010010001010111111000110001DIGIT D5 SELECTROW 0 D5 (A)ROW 1 D5 (A)ROW 2 D5 (A)ROW 3 D5 (A)ROW 4 D5 (A)37 38 39 40 41 42101000001010011100101101000101010001000010000100DIGIT D6 SELECTROW 0 D6 (Y)ROW 1 D6 (Y)ROW 2 D6 (Y)ROW 3 D6 (Y)ROW 4 D6 (Y)43 44 45 46 47 48101000001010011100101110111110000011100000111110DIGIT D7 SELECTROW 0 D7 (S)ROW 1 D7 (S)ROW 2 D7 (S)ROW 3 D7 (S)ROW 4 D7 (S)Note:If the display is already reset at Power Up, there is no need for Software Clear.2006-01-2314User Definable Character Set Examples*Upper and Lower Case AlphabetsNumerals and Punctuation*CAUTION: No more than 128 LEDs “on” at one time at 100% brightness. 2006-01-2315User Definable Character Set Examples* (continued) Scientific Notations, etc.Foreign Characters*CAUTION: No more than 128 LEDs “on” at one time at 100% brightness.2006-01-23162006-01-2317P ublished byOSRAM Opto Semiconductors GmbHWernerwerkstrasse 2, D-93049 Regensburg © All Rights Reserved.Attention please!The information describes the type of component and shall not be considered as assured characteristics.Terms of delivery and rights to change design reserved. Due to technical requirements components may contain dangerous substances. For information on the types in question please contact our Sales Organization. If printed or downloaded, please find the latest version in the Internet.PackingPlease use the recycling operators known to you. We can also help you – get in touch with your nearest sales office. By agreement we will take packing material back, if it is sorted. You must bear the costs of transport. For packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for any costs incurred.Components used in life-support devices or systems must be expressly authorized for such purpose! Critical components 1) may only be used in life-support devices or systems 2) with the express written approval of OSRAM OS.1) A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-support device or system, or to affect its safety or the effectiveness of that device or system.2)Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain human life. If they fail, it is reasonable to assume that the health and the life of the user may be endangered.Revision History:2006-01-23 Previous Version:2005-01-10Page Subjects (major changes since last revision)Date of change allLead free device2006-01-23。
BC556 BC557 BC558 半导体透射器数据手册说明书
PNP Silicon Amplifier TransistorMarking:Type Number Internal StructureE1.COLLECTOR2.BASE3.EMITTERV EBO -5V Power Dissipation @T C =25°C P D 1.5WEmitter-Base Voltage BC556BC558BC556BC558Collector-Base VoltageCollector-Emitter VoltageV CEO-30-30VV-800.625W Features•Halogen Free Available Upon Request By Adding Suffix "-HF"•Epoxy Meets UL 94 V-0 Flammability Rating•Lead Free Finish/RoHS Compliant ("P" Suffix Designates RoHS Compliant. See Ordering Information)Maximum Ratings @ 25°C Unless Otherwise Specified•Operating Junction Temperature Range: -55℃ to +150℃•Storage Temperature Range: -55℃ to +150℃•Thermal Resistance: 200℃/W Junction to Ambient •Thermal Resistance: 83.3℃/W Junction to Case-65BC557BC557-50-45ParameterSymbol Rating Unit V CBOP D Continuous Collector Current I C -0.1A Power Dissipation @T A =25°CBase-Emitter Voltage V BE -0.55-0.7V V CE =-5V, I C =-2mA Emitter-Base Breakdown VoltageI E =-100µA, I C =0I C =-2mA, I B =0BC558BC556BC558V-0.1µA V CE =-60V, I B =0BC556BC558-0.1µA V CB =-70V, I E =0BC556Collector-Emitter Breakdown VoltageV (BR)CEO -30I CBOBC557-45BC557-30Collector Cutoff Current-65V (BR)EBO Collector-Emitter Saturation Voltage V CE(sat)-0.65V I C =-100mA, I B =-5mA -0.3V DC Current Gain6pF V CE =-5V, I C =-2mA I C =-10mA, I B =-0.5mA Base-Emitter Saturation Voltage MHz V CE =-5V,I C =-10mA, f=100MHz Classification of h FEB AC 120-220180-460420-800RangeRank V CB =-25V, I E =0V EB =-5V, I C =0-0.1µA µA-5V Electrical Characteristics @ T A =25°C Unless Otherwise SpecifiedParameterSymbolMin TypMaxUnitsConditions-80BC556Collector-Base Breakdown VoltageI C =-100µA, I E =0V (BR)CBO -50BC557VTransition Frequencyf T150Output Capacitance C ob Emitter Cutoff Current I EBO -0.1-0.82h FE 120800I C =-100mA, I B =-5mA -1V V V CE =-5V, I C =-10mA -0.8V I C =-10mA, I B =-0.5mA V BE(sat)V CB =-10V, I E =0, f=1MHz BC557BC558I CEO Collector Cutoff Current -0.1µA V CB =-45V, I E =0-0.1µA V CE =-40V, I B =0-0.1µA V CE =-25V, I B =0BC557/BC558I C , COLLECTOR CURRENT (mAdc)Figure 1. Normalized DC Current Gain2.0I C , COLLECTOR CURRENT (mAdc)Figure 2. “Saturation” and “On” Voltages–0.20.2I C , COLLECTOR CURRENT (mA)Figure 4. Base–Emitter Temperature Coefficient–0.6–0.7–0.8–0.9–1.0–0.501.61.22.02.82.4–1.2–1.6–2.00–0.4–0.8h F E , N O R M A L I Z E D D C C U R R E N T G A I NV , V O L T A G E (V O L T S )V C E , C O L L E C T O R –E M I T T E R V O L T A G E (V )θV B , T E M P E R A T U R E C O E F F I C I E N T (m V /°C )1.51.00.70.50.3–0.2–10–100–1.0–0.5–1.0–2.0–5.0–10–20–50–100–200V R , REVERSE VOLTAGE (VOLTS)Figure 5. Capacitances 10Figure 6. Current–Gain – Bandwidth Product–2.0–3.0–5.0–10I C , COLLECTOR CURRENT (mAdc)–0.41.080100200300400602040307.05.03.02.0–0.5C , C A P A C I T A N C E (p F )f T , C U R R E N T –G A I N – B A N D W I D T H P R O D U C T (M H z )–0.6–1.0–2.0–4.0–6.0–10–20–30–40150–1.0–20–30–501.0BC556I C , COLLECTOR CURRENT (AMP)Figure 7. DC Current Gain I C , COLLECTOR CURRENT (mA)Figure 8. “On” Voltage–0.8–1.0–0.61.02.0–200–0.1–0.20.20.5Figure 9. Collector Saturation Region I B , BASE CURRENT (mA)I C , COLLECTOR CURRENT (mA)Figure 10. Base–Emitter Temperature Coefficient–1.0–1.2–1.6–2.00–0.4–0.8V C E , C O L L E C T O R –E M I T T E R V O L T A G E (V O L T S )θV B , T E M P E R A T U R E C O E F F I C I E N T (m V /°C )h F E , D C C U R R E N T G A I N (N O R M A L I Z E D )V , V O L T A G E (V O L T S )–1.4–1.8–2.6–3.0–1.0–2.0–5.0–10–20–50–100Figure 11. Capacitance –0.5–1.0–2.0–5.0–10–V R , REVERSE VOLTAGE (VOLTS)40I C , COLLECTOR CURRENT (mA)Figure 12. Current–Gain – Bandwidth Product–0.1–0.2–502.0–100100200500502020106.04.0C , C A P A C I T A N C E (p F )f T , C U R R E N T –G A I N – B A N D W I D T H P R O D U C T208.0Ordering InformationDevice PackingPart Number-AP Ammo Packing: 20Kpcs/CartonPart Number-BP Bulk:1k/Bag,100K/Ctn; Note : Adding "-HF" Suffix for Halogen Free, eg. Part Number-TP-HF。
AD558中文资料
FUNCTIONAL BLOCK DIAGRAMOUTOUT SENSE AOUT SELECT +V CONTROL B B B B B B B B DIGITAL INPUT DATA (BUS)REV.AInformation furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.aDACPORT Low Cost, CompleteµP-Compatible 8-Bit DACAD558*One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: 617/329-4700Fax: 617/326-8703FEATURESComplete 8-Bit DACVoltage Output–2 Calibrated Ranges Internal Precision Bandgap Reference Single-Supply Operation: +5 V to +15 V Full Microprocessor InterfaceFast:1 s Voltage Settling to ؎1/2 LSB Low Power:75 mW No User TrimsGuaranteed Monotonic Over Temperature All Errors Specified T MIN to T MAXSmall 16-Pin DIP and 20-Pin PLCC Packages Single Laser-Wafer-Trimmed Chip for Hybrids Low CostMIL-STD-883 Compliant Versions AvailablePRODUCT DESCRIPTION The AD558 DACPORT® is a complete voltage-output 8-bit digital-to-analog converter, including output amplifier, full microprocessor interface and precision voltage reference on a single monolithic chip. No external components or trims are required to interface, with full accuracy, an 8-bit data bus to an analog system.The performance and versatility of the DACPORT is a result of several recently-developed monolithic bipolar technologies. The complete microprocessor interface and control logic is imple-mented with integrated injection logic (I 2L), an extremely dense and low power logic structure that is process-compatible with linear bipolar fabrication. The internal precision voltage reference is the patented low voltage bandgap circuit which permits full-accuracy performance on a single +5 V to +15 V power supply.Thin-film silicon-chromium resistors provide the stability re-quired for guaranteed monotonic operation over the entire oper-ating temperature range (all grades), while recent advances in laser-wafer-trimming of these thin-film resistors permit absolute calibration at the factory to within ±1 LSB; thus no user-trims for gain or offset are required. A new circuit design provides voltage settling to ±1/2 LSB for a full-scale step in 800 ns.The AD558 is available in four performance grades. The AD558J and K are specified for use over the 0°C to +70°C temperature range, while the AD558S and T grades are specified for –55°C to +125°C operation. The “J” and “K” grades are available either in 16-pin plastic (N) or hermetic ceramic (D) DIPS.They are also available in 20-pin JEDEC standard PLCC pack-ages. The “S” and “T” grades are available in the 16-pin her-metic ceramic DIP package.*Protected by U.S. Patent Nos. 3,887,863; 3,685,045; 4,323,795; Patents Pending.DACPORT is a registered trademark of Analog Devices, Inc.PRODUCT HIGHLIGHTS1.The 8-bit I 2L input register and fully microprocessor-compatible control logic allow the AD558 to be directly connected to 8- or 16-bit data buses and operated with standard control signals. The latch may be disabled for direct DAC interfacing.2.The laser-trimmed on-chip SiCr thin-film resistors arecalibrated for absolute accuracy and linearity at the factory.Therefore, no user trims are necessary for full rated accuracy over the operating temperature range.3.The inclusion of a precision low voltage bandgap reference eliminates the need to specify and apply a separate refer-ence source.4.The voltage switching structure of the AD558 DAC section along with a high speed output amplifier and laser trimmed resistors give the user a choice of 0 V to +2.56 V or 0 V to +10 V output ranges, selectable by pin-strapping. Circuitry is internally compensated for minimum settling time on both ranges; typically settling to ±1/2 LSB for a full-scale 2.55 volt step in 800 ns.5.The AD558 is designed and specified to operate from a single +4.5 V to +16.5 V power supply.6.Low digital input currents, 100 µA max, minimize bus load-ing. Input thresholds are TTL/low voltage CMOS compat-ible over the entire operating V CC range.7.All AD558 grades are available in chip form with guaranteed specifications from +25°C to T MAX . MIL-STD-883, Class B visual inspection is standard on Analog Devices bipolar chips. Contact the factory for additional chip information.8.The AD558 is available in versions compliant with MIL-STD-883. Refer to Analog Devices Military Products Data-book or current AD558/883B data sheet for detailed specifications.AD558–SPECIFICATIONS(@ T A = +25؇C, V CC = +5 V to +15 V unless otherwise noted)Model AD558J AD558K AD558S1 AD558T1Min Typ Max Min Typ Max Min Typ Max Min Typ Max Units RESOLUTION8888Bits RELATIVE ACCURACY20°C to +70°C±1/2±1/4±1/2±1/4LSB –55°C to +125°C±3/4±3/8LSB OUTPUTRanges30 to +2.560 to +2.560 to +2.560 to +2.56V0 to +100 to +100 to +100 to +10VCurrent Source+5+5+5+5mA Sink Internal Passive Internal Passive Internal Passive Internal PassivePull-Down to Ground4Pull-Down to Ground Pull-Down to Ground Pull-Down to GroundOUTPUT SETTLING TIME50 to 2.56 Volt Range0.8 1.50.8 1.50.8 1.50.8 1.5µs0 to 10 Volt Range4 2.0 3.0 2.0 3.0 2.0 3.0 2.0 3.0µs FULL-SCALE ACCURACY6@ 25°C؎1.5؎0.5؎1.5؎0.5LSB T MIN to T MAX؎2.5؎1؎2.5؎1LSB ZERO ERROR@ 25°C؎1؎1/2؎1؎1/2LSB T MIN to T MAX؎2؎1؎2؎1LSB MONOTONICITY7T MIN to T MAX Guaranteed Guaranteed Guaranteed GuaranteedDIGITAL INPUTST MIN to T MAXInput Current±100±100±100100µA Data Inputs, VoltageBit On-Logic “1” 2.0 2.0 2.0 2.0V Bit On-Logic “0”00.8000V Control Inputs, VoltageOn-Logic “1” 2.0 2.0 2.0 2.0V On-Logic “0”00.800.800.800.8V Input Capacitance4444pF TIMING8t W, Strobe Pulse Width200200200200ns T MIN to T MAX270270270270ns t DH Data Hold Time10101010ns T MIN to T MAX10101010ns t DS Data Set-Up Time200200200200ns T MIN to T MAX270270270270ns POWER SUPPLYOperating Voltage Range (V CC)2.56 Volt Range+4.5+16.5+4.5+16.5+4.5+16.5+4.5+16.5V10 Volt Range+11.4+16.5+11.4+16.5+11.4+16.5+11.4+16.5VCurrent (I CC)1525152515251525mA Rejection Ratio0.030.030.030.03%/% POWER DISSIPATION, V CC = 5 V75125751257512575125mW V CC = 15 V225375225375225375225375mW OPERATING TEMPERATURE RANGE0+700+70–55+125–55+125°C NOTES1The AD558 S & T grades are available processed and screened lo MIL-STD-883 Class B. Consult Analog Devices’ Military Databook for details.2Relative Accuracy is defined as the deviation of the code transition points from the ideal transfer point on a straight line from the offset to the full scale of the device. See “Measuring Offset Error”.3Operation of the 0 volt to 10 volt output range requires a minimum supply voltage of +11.4 volts.4Passive pull-down resistance is 2 kΩ for 2.56 volt range, 10 kΩ for 10 volt range.5Settling time is specified for a positive-going full-scale step to ±1/2 LSB. Negative-going steps to zero are slower, but can be improved with an external pull-down.6The full range output voltage for the 2.56 range is 2.55 V and is guaranteed with a +5 V supply, for the 10 V range, it is 9.960 V guaranteed with a +15 V supply.7A monotonic converter has a maximum differential linearity error of ±1 LSB.8See Figure 7.Specifications shown in boldface are tested on all production units at final electrical test.Specifications subject to change without notice.–2–REV. AAD558REV. A –3–ABSOLUTE MAXIMUM RATINGS*V CC to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . .0 V to +18 V Digital Inputs (Pins 1–10) . . . . . . . . . . . . . . . . . .0 V to +7.0 V V OUT . . . . . . . . . . . . . . . . . . . . . . .Indefinite Short to GroundMomentary Short to V CCPower Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . .450 mW Storage Temperature RangeN/P (Plastic) Packages . . . . . . . . . . . . . . . .–25°C to +100°C D (Ceramic) Package . . . . . . . . . . . . . . . . .–55°C to +150°C Lead Temperature (soldering, 10 sec) . . . . . . . . . . . . .+300°C Thermal ResistanceJunction to Ambient/Junction to CaseD (Ceramic) Package . . . . . . . . . . . . . .100°C/W/30°C/W N/P (Plastic) Packages . . . . . . . . . . . . .140°C/W/55°C/W*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.AD558 METALIZATION PHOTOGRAPHDimensions shown in inches and (mm).Figure 1a.AD558 Pin Configuration (DIP)V OUTV OUT SENSE V OUT SELECTGNDGND+V CCCS (LSB) DB0DB1DB2DB3DB4DB5DB6(MSB) DB7CEFigure 1a.AD558 Pin Configuration (DIP)V OUT SELECTGND NC GND +V CCDB2DB3DB4DB5NC D B 1D B 0 (L S B )N C V O U TV O U T S E N S ED B 6(M S B ) D B 7N CC EC SNC = NO CONNECTFigure 1b.AD558 Pin Configuration (PLCC and LCC)ORDERING GUIDERelative Accuracy Full-Scale Error Max Error, Max Package Model1Temperature T MIN to T MAX T MIN to T MAX Option 2AD558JN 0°C to +70°C ±1/2 LSB ±2.5 LSB Plastic (N-16)AD558JP 0°C to +70°C ±1/2 LSB ±2.5 LSB PLCC (P-20A)AD558JD 0°C to +70°C ±1/2 LSB ±2.5 LSB TO-116 (D-16)AD558KN 0°C to +70°C ±1/4 LSB ±1 LSB Plastic (N-16)AD558KP 0°C to +70°C ±1/4 LSB ±1 LSB PLCC (P-20A)AD558KD 0°C to +70°C ±1/4 LSB ±1 LSB TO-116 (D-16)AD558SD –55°C to +125°C ±3/4 LSB ±2.5 LSB TO-116 (D-16)AD558TD–55°C to +125°C±3/8 LSB±1 LSBTO-116 (D-16)NOTES 1For details on grade and package offerings screened in accordance with MIL-STD-883, refer to the Analog Devices Military Products Databook or current AD558/883B data sheet.2D = Ceramic DIP; N = Plastic DIP; P = Plastic Leaded Chip Carrier.AD558REV. A–4–CIRCUIT DESCRIPTIONThe AD558 consists of four major functional blocks, fabricated on a single monolithic chip (see Figure 2). The main D-to-A converter section uses eight equally-weighted laser-trimmed current sources switched into a silicon-chromium thin-film R/2R resistor ladder network to give a direct but unbuffered 0mV to 400 mV output range. The transistors that form theDAC switches are PNPs; this allows direct positive-voltage logic interface and a zero-based output range.SENSE SELECTCONTROL B 0B 1B 2B 3B 4B 5B 6B 7DIGITAL INPUT DATA Figure 2.AD558 Functional Block DiagramThe high speed output buffer amplifier is operated in the non-inverting mode with gain determined by the user-connections at the output range select pin. The gain-setting application resistors are thin-film laser-trimmed to match and track the DAC resistors and to assure precise initial calibration of the two output ranges, 0 V to 2.56 V and 0 V to 10 V. The amplifier output stage is an NPN transistor with passive pull-down for zero-based output capability with a single power supply. The internal precision voltage reference is of the patented bandgap type. This design produces a reference voltage of 1.2 volts and thus, unlike 6.3 volt temperature compensated Zeners, may be operated from a single, low voltage logic power supply. The microprocessor interface logic consists of an 8-bit data latch and control circuitry. Low power, small geometry and high speed are advantages of the I 2L design as applied to this section. I 2L is bipolar process compatible so that the performance of the ana-log sections need not be compromised to provide on-chip logic capabilities. The control logic allows the latches to be operated from a decoded microprocessor address and write signal. If the application does not involve a µP or data bus, wiring CS and CE to ground renders the latches “transparent” for direct DAC access.MIL-STD-883The rigors of the military/aerospace environment, temperature extremes, humidity, mechanical stress, etc., demand the utmost in electronic circuits. The AD558, with the inherent reliability of integrated circuit construction, was designed with these ap-plications in mind. The hermetically-sealed, low profile DIP package takes up a fraction of the space required by equivalent modular designs and protects the chip from hazardous environ-ments. To further ensure reliability, military temperature range AD558 grades S and T are available screened to MIL-STD-883.For more complete data sheet information consult the Analog Devices’ Military Databook.CHIP AVAILABILITYThe AD558 is available in laser-trimmed, passivated chip form.AD558J and AD558T chips are available. Consult the factory for details.Input Logic CodingDigital Input Code Output VoltageBinary Hexadecimal Decimal 2.56 V Range 10.000 V Range 0000 000000000000 00010110.010 V 0.039 V 0000 00100220.020 V 0.078 V 0000 11110F 150.150 V 0.586 V 0001 000010160.160 V 0.625 V 0111 11117F 127 1.270 V 4.961 V 1000 000080128 1.280 V 5.000 V 1100 0000C0192 1.920 V 7.500 V 1111 1111FF2552.55 V9.961 VCONNECTING THE AD558The AD558 has been configured for ease of application. All ref-erence, output amplifier and logic connections are made inter-nally. In addition, all calibration trims are performed at the factory assuring specified accuracy without user trims. The only connection decision that must be made by the user is a single jumper to select output voltage range. Clean circuit board lay-out is facilitated by isolating all digital bit inputs on one side of the package; analog outputs are on the opposite side.Figure 3 shows the two alternative output range connections.The 0 V to 2.56 V range may be selected for use with any power supply between +4.5 V and +16.5 V. The 0 V to 10 V range requires a power supply of +11.4 V to +16.5 V.SELECT SENSE OUT SELECT SENSE OUT a.0 V to 2.56 V Output Range b.0 V to 10 V Output RangeFigure 3.Connection DiagramsBecause of its precise factory calibration, the AD558 is intended to be operated without user trims for gain and offset; therefore no provisions have been made for such user trims. If a small in-crease in scale is required, however, it may be accomplished by slightly altering the effective gain of the output buffer. A resistor in series with V OUT SENSE will increase the output range.For example if a 0 V to 10.24 V output range is desired (40 mV = 1 LSB), a nominal resistance of 850 Ω is required. It must be remembered that, although the internal resistors all ratio-match and track, the absolute tolerance of these resistors is typically ±20% and the absolute TC is typically –50 ppm/°C (0 to –100 ppm/°C). That must be considered when rescaling is performed. Figure 4 shows the recommended circuitry for a full-scale output range of 10.24 volts. Internal resistance values shown are nominal.Applications–AD558REV. A–5–The only consideration in selecting a supply voltage is that, in order to be able to use the 0 V to 10 V output range, the power supply voltage must be between +11.4 V and +16.5 V. If, how-ever, the 0 V to 2.56 V range is to be used, power consumption will be minimized by utilizing the lowest available supply voltage (above +4.5 V).TIMING AND CONTROLThe AD558 has data input latches that simplify interface to 8-and 16-bit data buses. These latches are controlled by Chip Enable (CE) and Chip Select (CS) inputs. CE and CS are inter-nally “NORed” so that the latches transmit input data to the DAC section when both CE and CS are at Logic “0”. If the ap-plication does not involve a data bus, a “00” condition allows for direct operation of the DAC. When either CE or CS go to Logic “1”, the input data is latched into the registers and held until both CE and CS return to “0”. (Unused CE or CS inputs should be tied to ground.) The truth table is given in Table I. The logic function is also shown in Figure 6.Table I.AD558 Control Logic Truth TableLatchInput Data CE CS DAC Data Condition0000“Transparent”1001“Transparent”0g00Latching1g01Latching00g0Latching10g1LatchingX1X Previous Data LatchedX X1Previous Data LatchedNOTESX = Does not matter.g = Logic Threshold at Positive-Going Transition.Figure 6.AD558 Control Logic FunctionIn a level-triggered latch such as that in the AD558 there is aninteraction between data setup and hold times and the width ofthe enable pulse. In an effort to reduce the time required to testall possible combinations in production, the AD558 is testedwith t DS = t W = 200 ns at 25°C and 270 ns at T MIN and T MAX,with t DH = 10 ns at all temperatures. Failure to comply withthese specifications may result in data not being latched p roperly.Figure 7 shows the timing for the data and control signals; CEand CS are identical in timing as well as in function.OUTFigure 4.10.24 V Full-Scale ConnectionNOTE: Decreasing the scale by putting a resistor in series with GNDwill not work properly due to the code-dependent currents in GND.Adjusting offset by injecting dc at GND is not recommended for thesame reason.GROUNDING AND BYPASSING*All precision converter products require careful application ofgood grounding practices to maintain full rated performance.Because the AD558 is intended for application in microcom-puter systems where digital noise is prevalent, special care mustbe taken to assure that its inherent precision is realized.The AD558 has two ground (common) pins; this minimizesground drops and noise in the analog signal path. Figure 5shows how the ground connections should be made.R LCCFigure 5.Recommended Grounding and BypassingIt is often advisable to maintain separate analog and digitalgrounds throughout a complete system, tying them common inone place only. If the common tie-point is remote and acciden-tal disconnection of that one common tie-point occurs due tocard removal with power on, a large differential voltage betweenthe two commons could develop. To protect devices that inter-face to both digital and analog parts of the system, such as theAD558, it is recommended that common ground tie-pointsshould be provided at each such device. If only one systemground can be connected directly to the AD558, it is recom-mended that analog common be selected.POWER SUPPLY CONSIDERATIONSThe AD558 is designed to operate from a single positive powersupply voltage. Specified performance is achieved for any supplyvoltage between +4.5 V and +16.5 V. This makes the AD558ideal for battery-operated, portable, automotive or digital main-frame applications.*For additional insight, “An IC Amplifier Users’ Guide to Decoupling,Grounding and Making Things Go Right For A change,” is availableat no charge from any Analog Devices Sales Office.AD558REV. A–6–DATA DACt W = STORAGE PULSE WIDTH = 200ns MIN t DH = DATA HOLD TIME = 10ns MIN t DS = DATA SETUP TIME = 200ns MINt SETTLING = DAC OUTPUT SETTLING TIME TO ±1/2 LSBFigure 7.AD558 TimingUSE OF V OUT SENSESeparate access to the feedback resistor of the output amplifier allows additional application versatility. Figure 8a shows how I × R drops in long lines to remote loads may be cancelled by putting the drops “inside the loop.” Figure 8b shows how the separate sense may be used to provide a higher output current by feeding back around a simple current booster.V OUTa. Compensation for I × R Drops in Output LinesV OUTb.Output Current Booster Figure e of V OUT SenseOPTIMIZING SETTLING TIMEIn order to provide single-supply operation and zero-based output voltage ranges, the AD558 output stage has a passive “pull-down” to ground. As a result, settling time for negative going output steps may be longer than for positive-going output steps. The relative difference depends on load resistance and capacitance. If a negative power supply is available, thenegative-going settling time may be improved by adding a pull-down resistor from the output to the negative supply as shown in Figure 9. The value of the resistor should be such that, at zero voltage out, current through that resistor is 0.5 mA max.BIPOLAR OUTPUT RANGESThe AD558 was designed for operation from a single power supply and is thus capable of providing only unipolar (0 V to +2.56 V and 0 V to 10 V) output ranges. If a negative supply isL= 2x V EE (in k Ω)Figure 9.Improved Settling Timeavailable, bipolar output ranges may be achieved by suitable output offsetting and scaling. Figure 10 shows how a ±1.28 volt output range may be achieved when a –5 volt power supply is available. The offset is provided by the AD589 precision 1.2 volt reference which will operate from a +5 volt supply. The AD544output amplifier can provide the necessary ±1.28 volt output swing from ±5 volt supplies. Coding is complementary offset binary.Figure 10.Bipolar Operation of AD558 from ±5 V SuppliesMEASURING OFFSET ERROROne of the most commonly specified endpoint errors associated with real-world nonideal DACs is offset error.In most DAC testing, the offset error is measured by applying the zero-scale code and measuring the output deviation from 0volts. There are some DACs, like the AD558 where offset errors may be present but not observable at the zero scale, because of other circuit limitations (such as zero coinciding with single-supply ground) so that a nonzero output at zero code cannot be read as the offset error. Factors like this make testing the AD558 a little more complicated.By adding a pulldown resistor from the output to a negative supply as shown in Figure 11, we can now read offset errors at zero code that may not have been observable due to circuit limitations. The value of the resistor should be such that, at zero voltage out, current through the resistor is 0.5 mA max.0.5mAa.0 V to 2.56 V Output RangeAD558REV. A –7–b.0 V to 10 V Output RangeFigure 11.Offset Connection DiagramsINTERFACING THE AD558 TO MICROPROCESSOR DATA BUSESThe AD558 is configured to act like a “write only” location in memory that may be made to coincide with a read only memory location or with a RAM location. The latter case allows data previously written into the DAC to be read back later via the RAM. Address decoding is partially complete for either ROM or RAM. Figure 12 shows interfaces for three popular micropro-cessor systems.GATED DECODED ADDRESS → a.6800/AD558 InterfaceDECODED ADDRESS SELECT PULSE → CSb.8080A/AD558 InterfaceDECODED ADDRESS SELECT PULSE → c.1802/AD558 InterfaceFigure 12.Interfacing the AD558 to MicroprocessorsPerformance (typical @ +25؇C, VCC ؎+5 V to +15 V unless otherwise noted)FULLSCALEERRORFigure 13.Full-Scale Accuracy vs. TemperaturePerformance of AD5580ZERO Figure 14.Zero Drift vs. Temperature Performance of AD558AD558REV. A–8–P R I N T E D I N U .S .A .C 558f –21–8/87mA 16144681012141618VOLTSI CCV CC1210Figure 15.Quiescent Current vs. Power Supply Voltage for AD558Figure 16.AD558 Settling Characteristics Detail 0 V to 2.56 V Output Range Full-Scale StepFigure 17.AD558 Settling Characteristic Detail 0 V to 10 V Output Range Full-Scale StepFigure 18.AD558 Logic TimingOUTLINE DIMENSIONSDimensions shown in inches and (mm).N (Plastic) PackageD (Ceramic) PackageP (PLCC) Package。
NE558N中文资料
START RESET
a. Ring Counter
VCC
START
RESET 01
T = RC
02
03
04
b. Expected Waveforms Figure 2.
August 31, 1994
381
August 31, 1994
379
元器件交易网
Philips Semiconductors Linear Products Product specification
Quad timer
NE558
558 EQUIVALENT CIRCUIT
VCC
RESET
TIMING VCONTROL
4 R1 5
VR R2
13
RESET
FEATURES
12
COMP COMP
GROUND
• 100mA output current per section • Edge-triggered (no coupling capacitor) • Output independent of trigger conditions • Wide supply voltage range 4.5V to 16V • Timer intervals from microseconds to hours • Time period equals RC • Military qualifications pending
元器件交易网
Philips Semiconductors Linear Products Product specification
Quad timer
NE558
DESCRIPTION
HCS5五轴机械手控制系统说明书V3.120140412(V3.1配V1.9IO板)
HC-S5机械手控制系统操作手册V3.1版本河北神州自动化设备科技有限公司目录1 系统配置及安装 (1)1.1 基本配置 (1)1.2 系统的安装 (1)2 操作面板 (2)2.1 外观及说明 (2)2.2 主画面及轴定义 (3)2.2.1 主画面说明 (3)2.2.2 机械手轴定义 (3)3 运行模式 (4)3.1 原点复归 (4)3.2 手动操作 (4)3.2.1 轴的手动操作 (5)3.2.2 夹具的手动操作 (6)3.2.3 吸盘的手动操作 (7)3.2.3 辅助设备的手动操作 (8)3.2.4 预留动作的手动操作 (9)3.3自动运行 (10)3.3.1 自动运行数据的监视 (10)3.3.2 自动运行时参数的修改 (11)3.3.3 单步运行 (11)3.3.4 单循环运行 (11)3.3.4 自动运行时速度的调节 (11)4 程序的管理 (12)4.1 程序载入和创建 (12)4.2 程序教导 (13)4.2.1 轴动作的教导 (14)4.2.2 程序起始点的教导 (15)4.2.3 堆叠的教导 (16)4.2.4 吸盘/夹具的教导 (17)4.2.5 注塑机信号的教导 (19)4.2.6 辅助设备的教导 (20)4.2.7 预留的教导 (21)4.2.8 等待信号的教导 (22)4.2.9 序列动作的教导 (23)4.2.10 条件的教导 (24)4.2.11 程序参数的修改 (25)4.3 程序快速设定 (26)4.4 教导选择 (30)4.5 教导程序举例 (32)4.5.1 程序要求 (32)4.5.2 程序过程 (32)4.5.3 教导程序 (32)5 功能设定 (33)5.1 信号检测 (34)5.2 产品设定 (36)5.3 运行参数 (37)5.4 安全点设定 (38)5.5 产品堆叠 (44)5.6 系统设定 (46)5.6.1系统设定 (47)5.6.2权限管理 (48)5.6.3 备份/还原 (49)5.6.4 机械参数 (50)5.7 机器参数 (51)5.7.1 机器结构 (51)5.7.2 机器时间 (54)5.8 维护 (55)6 I/O监视与报警记录 (56)6.1 I/O监视 (56)6.2 报警记录 (57)6.3 报警信息及报警原因 (58)7 电路板端口定义 (62)7.1 主控制板端口定义 (62)7.2 I/O板的端口定义 (63)7.3 伺服驱动接口定义 (64)8 接线图 (65)8.1主控制板与I/O板的接线图 (65)8.2 操作面板与主控制板的接线图 (66)8.3 伺服连线及参数设定 (67)8.3.1松下伺服电机使用范例 (67)8.3.2三菱伺服电机使用范例 (68)8.4 机械手与注塑机的连接 (69)9 电路板安装尺寸图 (71)9.1 主控板安装尺寸 (71)9.2 I/O板安装尺寸 (72)1 系统配置及安装1.1 基本配置1、8寸真彩触摸屏2、五轴伺服控制板3、I/O板4、电源部分（2个电源供应器）5、通讯线1.2 系统的安装1、配线作业必须由专业电工进行。
WW5中文资料
元器件交易网
PRODUCT BULLETIN WW-SERIES
FLAMEPROOF WIREWOUND RESISTORS
1 TO 10 WATT 0.1% THRU 10% TOLERANCE SILICONE COATED HIGH PURITY CERAMIC CORE STAINLESS STEEL END CAPS TINNED COPPER-CLAD STEEL LEADS WELDED CONSTRUCTION PACKAGED TAPE & REEL OR BULK AVAILABLE IN NON-INDUCTIVE STYLE MEETS REQUIREMENTS FOR MIL-R-26
* ALSO AVAILABLE IN .020
Temperature
TC20 = ±20PPM/°C, 10 ohm and above. TC50 = ±50PPM/°C, 1 ohm - 9.9 ohm. TC90 = ±90PPM/°C, below 1 ohm.
How to Order
Sample Part Number WW1 TC20 7.5K ±1% S
S = Standard
元器件交易网
ENVIRONMENTAL SPECIFICATIONS
LOAD LIFE MOISTURE RESISTANCE THERMAL SHOCK SHORT TIME OVERLOAD DIELECTRIC STRENGTH LOW TEMP. STORAGE HIGH TEMP. EXPOSURE TERMINAL STRENGTH SHOCK VIBRATION
CHARACTERISTIC
8位增强型USB单片机CH558
1
8 位增强型 USB 单片机 CH558
手册 版本：1.4
1、概述
CH558 芯片是一款兼容 MCS51 指令集的增强型 E8051 内核单片机， 其 79%的指令是单字节单周期 指令，平均指令速度比标准 MCS51 快 8～15 倍。 CH558 支持最高 56MHz 系统主频， 内置 40K 程序存储器 Flash-ROM 和 256 字节内部 iRAM 以及 4K 字节片内 xRAM，xRAM 支持 DMA 直接内存存取。 CH558 内置了 ADC 模数转换、4 组定时器和 PWM、双异步串口、SPI、USB 设备控制器和全速收发 器等功能模块。 下面为 CH558 的内部框图，仅供参考。
l l l l l
3、封装
48 47 46 45 44 43 42 41 40 39 38 37 1 2 3 4 5 6 7 8 9 10 11 12 P1.5/AIN5/MOSI P1.4/AIN4/SCS P1.3/AIN3 P1.2/AIN2/PWM3/CAP3 P1.1/AIN1/T2EX/CAP2 P1.0/AIN0/T2/CAP1 VDD33 VIN5 P0.0/AD0/UDTR P0.1/AD1/URTS P0.2/AD2/RXD_ P0.3/AD3/TXD_
速度比标准 MCS51 快 8～15 倍，特有 XRAM 数据快速复制指令，双 DPTR 指针。 ROM：40KB 非易失存储器 Flash-ROM，支持 100K 次擦写，分为 32KB 应用程序存储区和 5KB 数 据存储区以及 3KB 引导代码 BootLoader/ISP 程序区。 RAM：256 字节内部 iRAM，可以用于快速数据暂存以及堆栈；4KB 片内 xRAM，可以用于大量数 据暂存以及 DMA 直接内存存取；支持在片外再外扩 32KB 外部 SRAM。 USB：内嵌 USB 控制器和 USB 收发器，支持 USB-Device 设备模式，支持 USB 2.0 全速 12Mbps 或者低速 1.5Mbps。支持最大 64 字节数据包，内置 FIFO，支持 DMA。 Timer：4 组定时器，T0/T1/T2 为标准 MCS51 定时器；T2 扩展为支持 2 路信号捕捉；TMR3 内置 8 级 FIFO，支持 DMA，支持信号捕捉采样和 16 位 PWM 输出。 UART： 2 组异步串口， UART0 为标准 MCS51 串口； UART1 兼容 16C550， 内置 8 级 FIFO， 支持 Modem 信号，支持 RS485 半双工模式，支持预置本机地址用于多机通讯时自动匹配。
ESC60HREN资料
.016 [0.41] THICK, OVERALL PLATED ONLY
.007 [0.18]
THICK
EYELET (TE)
EYELET (RE)
RIGHT ANGLE (RA)
NARROW DIP SOLDER (RT,RY)
WIDE DIP SOLDER (RX)
.125 [3.18]
#4-40
Termination .000100" Tin .000100" Tin .000005" Gold .000005" Gold Overall Plating .000100" Tin .000010" Gold .000010" Gold
Underplate .000050" Nickel .000050" Nickel .000050" Nickel .000050" Nickel Underplate .000050" Nickel .000050" Nickel .000050" Nickel
Consult Factory for Other Materials
CONTACT FINISH Contact Surface Z = .000010" Gold X = .000030" Gold G = .000010" Gold Y = .000030" Gold Contact Surface T = .000100" Tin S = .000010" Gold M = .000030" Gold CONTACT CENTERS C = .100" [2.54 mm]
UPC4558 中文PDF资料
典型工作参数曲线(接上表）
第一价值网（ＩＣ网络超市）
图 7 图图图图图图图图图图图图图图图
15.0
±15V
13.0
11.0
±12V
图 8 图图图图图图图图图图图图图图图
15.0
±15V
13.0
11.0
±12V
Output Voltage (peak) (V)
Output Voltage (peak) (V)
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ＵＰＣ４５５８替换型号Ｘ４５５８ 双极型线性集成电路
第一价值网（ＩＣ网络超市）
SIP-8-2.54
UNIT: mm
第一价值网（ＩＣ网络超市）
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ＵＰＣ４５５８替换型号Ｘ４５５８ 双极型线性集成电路
附：
第一价值网（ＩＣ网络超市）
1
10
102
103
104
105
10 6
Rs (Ω)
图 3 Output Noise vs Rs
10
Gv=1000
1 Gv=100
Gv=10 10-1
Gv=1
10-2
10
102
103
104
105
106
Rs (Ω)
图 5 图图图图图图
140
120
100
80
60
40
20
0
-20
1
10
100
10 3
104 105 106
修改记录：
日 期 版本号
描
述
页码
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元器件交易网
汕头华汕电子器件有限公司
PNP SILICON
TRANSISTOR 对应国外型号 BC558
H558
█ 主要用途
开关、视频放大。
█ 外形图及引脚排列
█ 极限值（Ta=25℃）
TO-92 T stg ——贮存温度………………………………… -55~150℃ Tj——结温……………………………………………150℃ P C ——集电极耗散功率…………………………………500mW V CBO ——集电极—基极电压………………………………-30V V CEO ——集电极—发射极电压……………………………-30V V E B O ——发射极—基极电压……………………………-5V I C ——集电极电流………………………………………-100mA 1―集电极，C 2―基 极，B 3―发射极，E
█ 电参数（Ta=25℃）
参数符号 符 号 说 明 最小值 典型值 最大值 单 位 测 试 条 件
BVCBO BVCEO BVEBO ICBO HFE VCE(sat1) VCE(sat2) VBE(sat1) VBE(sat2) VBE(on1) VBE(on2) fT
Cob
集电极—基极击穿电压 -30 集电极—发射极击穿电压 -30 发射极—基极击穿电压 -5 集电极—基极截止电流 直流电流增益 110 集电极—发射极饱和电压 基极—发射极饱和电压 基极—发射极导通电压 特征频率 输出电容
-90 -250 -700 -900 -660 150
-15 800 -300 -650
V V V nA mV mV mV mV mV mV MHz pF
IC=-100μA，IE=0 IC=-10mA，IB=0 IE=-100μA，IC=0 VCB=-30V,IE=0 VCE=-5V,IC=-2mA IC=-10mA,IB=-0.5mA IC=-100mA,IB=-5mA IC=-10mA,IB=-0.5mA IC=-100mA,IB=-5mA VCE=-5V,IC=-2mA VCE=-5V,IC=-10mA VCE=-5V,IC=-10mA，f=1MHz VCE=-10V,IC=0,f=1MHz
-750 -800 6
█ 分档及其标志
A 110—220 B 200—450 C 420—800
。