CD40106BDMS资料

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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.CD40106BMS
CMOS Hex Schmitt Triggers
Features
•High Voltage Type (20V Rating)
•Schmitt Trigger Action with No External Components •Hysteresis Voltage (Typ.)-0.9V at VDD = 5V - 2.3V at VDD = 10V - 3.5V at VDD = 15V
•Noise Immunity Greater than 50%•No Limit on Input Rise and Fall Times
•Low VDD to VSS Current During Slow Input Ramp •100% Tested for Quiescent Current at 20V •5V, 10V and 15V Parametric Ratings
•Maximum Input Current of 1µA at 18V Over Full Pack-age Temperature Range; 100nA at 18V and +25o C •Standardized Symmetrical Output Characteristics •Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices”
Applications
•Wave and Pulse Shapers
•High Noise Environment Systems •Monostable Multivibrators •Astable Multivibrators
Description
CD40106BMS consists of six Schmitt trigger circuits. Each circuit functions as an inverter with Schmitt trigger action on the input. The trigger switches at different points for positive and negative going signals. The difference between the positive going voltage (VP) and the negative going voltage (VN) is defined as hysteresis voltage (VH) (see Figure 17).The CD40106BMS is supplied in these 14 lead outline packages:Braze Seal DIP H4Q Frit Seal DIP H1B Ceramic Flatpack
H3W
December 1992
File Number
3354
Pinout
CD40106BMS TOP VIEW
Functional Diagram
Logic Diagram
FIGURE 1.1 OF 6 SCHMITT TRIGGERS
A G =A
B H =B
C I =C VSS VD
D F L =F
E K =E D J =D
12
34
567
1413121110981
A
2G =A
3B
4
H =B
5C
6
I =C
9D
8
J =D
11E
10
K =E
13F
12
L =F
A
*1 (3, 5, 9, 11, 13)
G
*
2 (4, 6, 8, 10, 12)
*
ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK
VDD
VSS
Absolute Maximum Ratings Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . .-0.5V to +20V (Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA Operating Temperature Range. . . . . . . . . . . . . . . .-55o C to +125o C Package Types D, F, K, H
Storage Temperature Range (TSTG). . . . . . . . . . .-65o C to +150o C Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . .+265o C At Distance 1/16 ± 1/32 Inch (1.59mm± 0.79mm) from case for 10s Maximum Thermal Resistance . . . . . . . . . . . . . . . .θjaθjc Ceramic DIP and FRIT Package. . . . .80o C/W20o C/W Flatpack Package . . . . . . . . . . . . . . . .70o C/W20o C/W Maximum Package Power Dissipation (PD) at +125o C
For T A = -55o C to +100o C (Package Type D, F, K) . . . . . .500mW For T A = +100o C to +125o C (Package Type D, F, K). . . . . .Derate
Linearity at 12mW/o C to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . .100mW For T A = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+175o C
TABLE1.DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS(NOTE 1)
GROUP A
SUBGROUPS TEMPERATURE
LIMITS
UNITS
MIN MAX
Supply Current IDD VDD = 20V, VIN = VDD or GND1+25o C-2µA
2+125o C-200µA
VDD = 18V, VIN = VDD or GND3-55o C-2µA Input Leakage Current IIL VIN = VDD or GND VDD = 201+25o C-100-nA
2+125o C-1000-nA
VDD = 18V3-55o C-100-nA Input Leakage Current IIH VIN = VDD or GND VDD = 201+25o C-100nA
2+125o C-1000nA
VDD = 18V3-55o C-100nA Output Voltage VOL15VDD = 15V, No Load1, 2, 3+25o C, +125o C, -55o C-50mV Output Voltage VOH15VDD = 15V, No Load (Note 2)1, 2, 3+25o C, +125o C, -55o C14.95-V Output Current (Sink)IOL5VDD = 5V, VOUT = 0.4V1+25o C0.53-mA Output Current (Sink)IOL10VDD = 10V, VOUT = 0.5V1+25o C 1.4-mA Output Current (Sink)IOL15VDD = 15V, VOUT = 1.5V1+25o C 3.5-mA Output Current (Source)IOH5A VDD = 5V, VOUT = 4.6V1+25o C--0.53mA Output Current (Source)IOH5B VDD = 5V, VOUT = 2.5V1+25o C--1.8mA Output Current (Source)IOH10VDD = 10V, VOUT = 9.5V1+25o C--1.4mA Output Current (Source)IOH15VDD = 15V, VOUT = 13.5V1+25o C--3.5mA N Threshold Voltage VNTH VDD = 10V, ISS = -10µA1+25o C-2.8-0.7V P Threshold Voltage VPTH VSS = 0V, IDD = 10µA1+25o C0.7 2.8V
Functional F VDD = 2.8V, VIN = VDD or GND7+25o C VOH >
VDD/2VOL <
VDD/2
V
VDD = 20V, VIN = VDD or GND7+25o C VDD = 18V, VIN = VDD or GND8A+125o C VDD = 3V, VIN = VDD or GND8B-55o C
Positive Trigger Threshold Voltage (See Figure 17)
VP5VDD = 5V1, 2, 3+25o C, +125o C, -55o C 2.2 3.6V VP10VDD = 10V1, 2, 3+25o C, +125o C, -55o C 4.67.1V VP15VDD = 15V1, 2, 3+25o C, +125o C, -55o C 6.810.8V
Negative Trigger Threshold Voltage (See Figure 17)
VN5VDD = 5V1, 2, 3+25o C, +125o C, -55o C0.9 2.8V VN10VDD = 10V1, 2, 3+25o C, +125o C, -55o C 2.5 5.2V VN15VDD = 15V1, 2, 3+25o C, +125o C, -55o C47.4V
Hysteresis Voltage (See Figure 17)
VH5VDD = 5V1, 2, 3+25o C, +125o C, -55o C0.3 1.6V VH10VDD = 10V1, 2, 3+25o C, +125o C, -55o C 1.2 3.4V VH15VDD = 15V1, 2, 3+25o C, +125o C, -55o C 1.6 5.0V
NOTES: 1.All voltages referenced to device GND, 100% testing being implemented.
2.Go/No Go test with limits applied to inputs.
3.For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.
TABLE2.AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS(NOTE 1, 2)
GROUP A
SUBGROUPS TEMPERATURE
LIMITS
UNITS
MIN MAX
Propagation Delay TPHL
TPLH VDD = 5V, VIN = VDD or GND9+25o C-280ns
10, 11+125o C, -55o C-378ns
Transition Time TTHL
TTLH VDD = 5V, VIN = VDD or GND9+25o C-200ns
10, 11+125o C, -55o C-270ns
NOTES:
1.CL = 50pF, RL = 200K, Input TR, TF < 20ns
2.-55o C and +125o C limits guaranteed, 100% testing being implemented.
TABLE3.ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITS MIN MAX
Supply Current IDD VDD = 5V, VIN = VDD or GND1, 2-55o C, +25o C-1µA
+125o C-30µA
VDD = 10V, VIN = VDD or GND1, 2-55o C, +25o C-2µA
+125o C-60µA
VDD = 15V, VIN = VDD or GND1, 2-55o C, +25o C-2µA
+125o C-120µA Output Voltage VOL VDD = 5V, No Load1, 2+25o C, +125o C,
-55o C
-50mV
Output Voltage VOL VDD = 10V, No Load1, 2+25o C, +125o C,
-55o C
-50mV
Output Voltage VOH VDD = 5V, No Load1, 2+25o C, +125o C,
-55o C
4.95-V
Output Voltage VOH VDD = 10V, No Load1, 2+25o C, +125o C,
-55o C
9.95-V Output Current (Sink)IOL5VDD = 5V, VOUT = 0.4V1, 2+125o C0.36-mA
-55o C0.64-mA Output Current (Sink)IOL10VDD = 10V, VOUT = 0.5V1, 2+125o C0.9-mA
-55o C 1.6-mA Output Current (Sink)IOL15VDD = 15V, VOUT = 1.5V1, 2+125o C 2.4-mA
-55o C 4.2-mA Output Current (Source)IOH5A VDD = 5V, VOUT = 4.6V1, 2+125o C--0.36mA
-55o C--0.64mA Output Current (Source)IOH5B VDD = 5V, VOUT = 2.5V1, 2+125o C--1.15mA
-55o C--2.0mA Output Current (Source)IOH10VDD = 10V, VOUT = 9.5V1, 2+125o C--0.9mA
-55o C--1.6mA Output Current (Source)IOH15VDD =15V, VOUT = 13.5V1, 2+125o C--2.4mA
-55o C--4.2mA
Propagation Delay TPHL
TPLH VDD = 10V1, 2, 3+25o C-140ns VDD = 15V1, 2, 3+25o C-120ns
Transition Time TTHL
TTLH VDD = 10V1, 2, 3+25o C-100ns VDD = 15V1, 2, 3+25o C-80ns
Input Capacitance CIN
Any Input
1, 2
+25o C
-7.5
pF
NOTES:
1.All voltages referenced to device GND.
2.The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics.
3.CL = 50pF, RL = 200K., Input TR, TF < 20ns
TABLE 4.POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS
NOTES TEMPERATURE
LIMITS
UNITS MIN MAX Supply Current IDD VDD = 20V, VIN = VDD or GND 1, 4+25o C -7.5µA N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1, 4+25o C -2.8-0.2V N Threshold Voltage Delta
∆VTN VDD = 10V, ISS = -10µA 1, 4+25o C -±1V P Threshold Voltage VTP VSS = 0V, IDD = 10µA 1, 4+25o C 0.2 2.8V P Threshold Voltage Delta ∆VTP VSS = 0V, IDD = 10µA
1, 4+25o C -±1V Functional
F
VDD = 18V, VIN = VDD or GND 1
+25o C
VOH >VDD/2VOL <VDD/2V
VDD = 3V, VIN = VDD or GND
Propagation Delay Time
TPHL TPLH
VDD = 5V
1, 2, 3, 4
+25o C
- 1.35 x +25o C Limit
ns
NOTES: 1.All voltages referenced to device GND.
2.CL = 50pF, RL = 200K, Input TR, TF < 20ns.
3.See Table 2 for +25o C limit.
4.Read and Record
TABLE 5.BURN-IN AND LIFE TEST DELTA PARAMETERS +25o C PARAMETER
SYMBOL DELTA LIMIT
Supply Current - MSI-1IDD ± 0.2µA
Output Current (Sink)IOL5± 20% x Pre-Test Reading Output Current (Source)
IOH5A
± 20% x Pre-Test Reading
TABLE 6.APPLICABLE SUBGROUPS
CONFORMANCE GROUP MIL-STD-883METHOD GROUP A SUBGROUPS
READ AND RECORD Initial Test (Pre Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A Interim Test 1 (Post Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A Interim Test 2 (Post Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A
PDA (Note 1)
100% 50041, 7, 9, Deltas
Interim Test 3 (Post Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A
PDA (Note 1)100% 50041, 7, 9, Deltas Final Test 100% 50042, 3, 8A, 8B, 10, 11Group A
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
TABLE 3.ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER SYMBOL CONDITIONS
NOTES TEMPERATURE
LIMITS
UNITS MIN MAX
Group B
Subgroup B-5Sample 50051, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroups 1, 2, 3, 9, 10, 11
Subgroup B-6
Sample 50051, 7, 9Group D
Sample 5005
1, 2, 3, 8A, 8B, 9
Subgroups 1, 2 3
NOTE:1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7.TOTAL DOSE IRRADIATION
CONFORMANCE GROUPS MIL-STD-883METHOD
TEST
READ AND RECORD PRE-IRRAD POST-IRRAD PRE-IRRAD
POST-IRRAD Group E Subgroup 2
5005
1, 7, 9
Table 4
1, 9
Table 4
TABLE 8.BURN-IN AND IRRADIATION TEST CONNECTIONS
FUNCTION OPEN GROUND VDD 9V ± -0.5V
OSCILLATOR
50kHz
25kHz
Static Burn-In 1Note 12, 4, 6, 8, 10, 121, 3, 5, 7, 9, 11, 13
14Static Burn-In 2Note 12, 4, 6, 8, 10, 12
71, 3, 5, 9, 11,
13, 14
Dynamic Burn-In Note 1-7142, 4, 6, 8, 10, 12
1, 3, 5, 9, 11, 13
Irradiation Note 22, 4, 6, 8, 10, 12
7
1, 3, 5, 9, 11,
13, 14
NOTES:
1.Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2.Each pin except VDD and GND will have a series resistor of 47K ±5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,VDD = 10V ± 0.5V
Typical Performance Characteristics
FIGURE 2.TYPICAL OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS FIGURE 3.MINIMUM OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
TABLE 6.APPLICABLE SUBGROUPS
CONFORMANCE GROUP MIL-STD-883METHOD GROUP A SUBGROUPS READ AND RECORD 10V
5V AMBIENT TEMPERATURE (T A ) = +25o C
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
5
10
15
151********DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
O U T P U T L O W (S I N K ) C U R R E N T (I O L ) (m A )
10V
5V
AMBIENT TEMPERATURE (T A ) = +25o C
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
51015
7.55.02.510.012.515.0DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
O U T P U T L O W (S I N K ) C U R R E N T (I O L ) (m A )
FIGURE 4.TYPICAL OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
FIGURE 5.MINIMUM OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
FIGURE 6.TYPICAL CURRENT AND VOLTAGE TRANSFER
CHARACTERISTICS
FIGURE 7.TYPICAL VOLTAGE TRANSFER CHARACTERIS-TICS AS A FUNCTION OF TEMPERATURE
FIGURE 8.TYPICAL PROPAGATION DELAY TIME AS A FUNC-TION OF LOAD CAPACITANCE FIGURE 9.TYPICAL TRANSITION TIME AS A FUNCTION OF
LOAD CAPACITANCE
-10V
-15V
AMBIENT TEMPERATURE (T A ) = +25o C
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
0-5-10-15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-20-25
-30
-5
-10-15O U T P U T H I G H (S O U R C E ) C U R R E N T (I O H ) (m A )
-10V
-15V
AMBIENT TEMPERATURE (T A ) = +25o C
-5
-10
-15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-5
-10-15O U T P U T H I G H (S O U R C E ) C U R R E N T (I O H ) (m A )
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
ALL OTHER
INPUTS TO VDD OR VSS
VDD
VIN
VO ID 2
1VO
ID
10V
5V
AMBIENT TEMPERATURE (T A ) = +25o C
SUPPL Y VOLTAGE (VDD) = 15V CURRENT
PEAK
CURRENT
PEAK
15.0
12.510.07.55.02.5015.012.510.07.55.02.50
1.5
1.00.5
INPUT VOLTAGE (VI) (V)
O U T P U T V O L T A G E (V O ) (V )
D R A I N C U R R
E N T (I D ) (m A )-55o C
+125o C
SUPPL Y VOLTAGE (VDD) = 15V
10V
5V
1510
5
O U T P U T V O L T A G E (V O ) (V )
15
10
50INPUT VOLTAGE (VI) (V)
ALL OTHER INPUTS TO VDD OR VSS
VDD
VIN
2
1VO
AMBIENT TEMPERATURE (T A ) = +25o C
LOAD CAPACITANCE (CL) (pF)
406080100
20050
100
150
200SUPPL Y VOLTAGE (VDD) = 5V
10V 5V
P R O P A G A T I O N T I M E (t P H L , t P L H ) (n s )
AMBIENT TEMPERATURE (T A ) = +25o C
LOAD CAPACITANCE (CL) (pF)
40608010020
050
100
150
200
SUPPL Y VOLTAGE (VDD) = 5V
10V
15V
T R A N S I T I O N T I M E (t T H L , t T L H ) (n s )
FIGURE 10.TYPICAL POWER DISSIPATION PER TRIGGER AS
A FUNCTION OF INPUT FREQUENCY FIGURE 11.TYPICAL TRIGGER THRESHOLD VOLTAGE AS A
FUNCTION OF SUPPLY VOLTAGE
FIGURE 12.TYPICAL PERCENT HYSTERESIS AS A FUNCTION
OF SUPPLY VOLTAGE
FIGURE 13.TYPICAL POWER DISSIPATION AS A FUNCTION
OF RISE AND FALL TIMES
Applications
FIGURE 14.WAVE SHAPER FIGURE 15.MONOSTABLE MULTIVIBRATOR
INPUT FREQUENCY (f) (kHz)
P O W E R D I S S I P A T I O N P E R T R I G G E R (P D ) (µW )
8
642
1058
642
104
8
642
1038
642
1021010-1
8
642
1
8
642
10102103
104
8
642
8
642
8
642
AMBIENT TEMPERATURE (T A ) = +25o C
SUPPL Y VOLTAGE (VDD) = 15V
10V
5V
CL = 50pF CL = 15pF
AMBIENT TEMPERATURE (T A ) = +25o C
SUPPLY VOLTAGE (VDD) (V)
0101520
5
5
10
15
VP
VN
T R I G G E R T H R E S H O L D V O L T A G E (V P , V N ) (V )
INPUT ON TERMINALS 1, 5, 8, 12 OR 2, 6, 9, 13;OTHER INPUTS TIED TO VDD AMBIENT TEMPERATURE (T A ) = +25o C
SUPPLY VOLTAGE (VDD) (V)
0101520
50
152025105H Y S T E R E S I S
V H X 100
P E R C E N T
V D D ((
8
642
1048642
1038
6421028
642108642110-1
RISE AND FALL TIME (tr, tf) (ns)
0.18
642
1
8
642
10102103
104
8
642
8
642
8
642
P O W E R D I S S I P A T I O N (P D ) (µW )
SUPPL Y VOLTAGE (VDD) = 15pF
FREQUENCY (f) = 100kHz AMBIENT TEMPERATURE (T A ) = +25o C LOAD CAPACITANCE (CL) = 15pF 15V , 10kHz
15V , 1kHz 10V , 1kHz 5V , 1kHz
VDD VSS
FREQUENCY RANGE OF WAVE SHAPE IS FROM DC TO 1MHz
VDD VSS
1/6 CD40106BMS
VDD
VSS
1/3 CD4007UB
R
C
VSS
VDD
tM = RC n
50k Ω≤ R ≤ 1M Ω100pF ≤ C ≤ 1µF
VDD VDD-VP
FOR THE RANGE OF R AND C GIVEN 5µs < tM < 1s
VDD
VSS
tM
1/6 CD40106BMS
2
1
FIGURE 16.ASTABLE MULTIVIBRATOR
FIGURE 17.HYSTERESIS DEFINITION, CHARACTERISTICS, AND TEST SETUP
FIGURE 18.INPUT AND OUTPUT CHARACTERISTICS
Applications (Continued)
VDD
VSS
R C VSS
tA = RC n
50k Ω≤ R ≤ 1M Ω100pF ≤ C ≤ 1µF
VP VN
FOR THE RANGE OF R AND C GIVEN 2µs < tA < 0.4s
tA
VDD-VN VDD-VP
1/6 CD40106BMS
VDD VIN VSS VDD VO VSS
VP
VN
VH
VH
VN
VP
VO
VIN
VH = VP - VN
(a) DEFINITION OF VP , VN, VH
(b)TRANSFER CHARACTERISTIC OF 1 OF 6 GATES
VIN
VO
LOGIC “1”OUTPUT REGION
LOGIC “0”OUTPUT REGION
LOGIC “1”INPUT REGION
LOGIC “0”INPUT REGION
VDD
VSS VOL
VN
VP
VOH
OUTPUT
CHARACTERISTIC
INPUT
CHARACTERISTIC
DRIVER LOAD
VOL
VOH
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site
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NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204 Melbourne, FL32902
TEL:(321) 724-7000
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ASIA
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Taiwan Limited
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
Chip Dimensions and Pad Layout
Dimensions in parenthesis are in millimeters and are
derived from the basic inch dimensions as indicated.
Grid graduations are in mils (10-3 inch).
METALLIZATION:Thickness: 11kÅ−14kÅ, AL.
PASSIVATION:10.4kÅ - 15.6kÅ, Silane
BOND PADS:0.004 inches X 0.004 inches MIN
DIE THICKNESS:0.0198 inches - 0.0218 inches。

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