Performance Evaluation of Asynchronous Circuits Using Abstract Probabilistic Timed Petri Ne

Computer Engineering Department, Amirkabir University of Technology (Tehran Polytechnic) 424 Hafez Ave, Tehran 15785, Iran
ABSTRACT
A framework for evaluating the performance of asynchronous systems is presented. Performance evaluation of the asynchronous circuits is a challenging process due to the dependencies between highly concurrent events. The utilized performance model is a Probabilistic Timed Petri-Net (PTPN) with possible choice places to capture the conditional behavior of the system. The proposed framework exploits the advantage of both static and dynamic analysis to provide precisely enough results in an acceptable time. No data manipulation is done during the simulation phase of the performance evaluation which leads to very fast simulation. Our proposed performance estimation scheme is faster than usual post-synthesis simulation by an order of 10, while the estimated performance resides in a boundary of %3 total imprecision.
ቤተ መጻሕፍቲ ባይዱ
Keywords
Asynchronous Circuits, Probabilistic Abstract Timed PetriNet, Performance Evaluation
1. INTRODUCTION
As asynchronous circuits gain popularity due to their potential advantages, the lack of a unified automated synthesis and evaluation framework is highlighted. Pure synchronous design strategy has been shown not promising enough to fulfill the need for more transistors on a single die in high performance applications. Asynchronous components are currently appeared in most synchronous circuits to tolerate clock skew and large interconnect delays [1][2] In Asynchronous circuits, local signaling eliminates the need for global synchronization which exploits some potential advantages; beside the elimination of the clock skew and tolerating interconnect delays, asynchronous circuits are more tolerant to process variations and external voltage fluctuations. They are more modularly synthesizable, potentially faster and have lower energy consumption. Performance analysis is one of the key problems in asynchronous designs due to the dependencies between
highly concurrent events. While synchronous performance estimation is based on a static critical path analysis affected only by the delay of components and interconnecting wires, it has been shown that the performance of an asynchronous circuit depends on dynamic factors like the number of tokens in the circuit and the value of input data items. Indeed each particular signal transition in an asynchronous system can postpone other signal transitions in the system; therefore evaluating the performance has more complexity. Earlier works on performance evaluations rely on analytical performance analysis. Event Rule System [2], and a work on the computation of the Timed Separation of an Event (TSEs)[4] are good examples for such static performance estimation schemes. These techniques usually use Timed Petri-Nets for the purpose of modeling. The main disadvantage of these methods is that they mainly reside on global determination of all the cycles in a system which is in general very time-consuming especially for practical large systems. Furthermore these techniques don’t provide any solution for practical systems containing selections which appear as choice places in the Petri-Net model. This paper discusses a framework for determining and analyzing the performance of asynchronous systems including choices. In section 2 an overview to asynchronous circuits is presented to give the reader more knowledge about the features and synthesis methods of asynchronous circuits. Section 3 describes Probabilistic Timed Petri-Nets as the dominant performance analysis model. Section 4 discusses the Performance Evaluation framework in detail while section 5 gets on with the results and analysis. And finally section 6 concludes the paper.
2. ASYNCHRONOUS CIRCUITS
Asynchronous circuits rely on exchanging local request and acknowledge signaling for the purpose of synchronization.
While first generation of asynchronous synthesis tools were mainly focused on control synthesis which make them inapplicable for practical circuits, the new generation of synthesis methods target the use of pre-designed asynchronous buffer templates [5][6]. Figure 1 shows a typical synthesis flow of a contemporary asynchronous synthesizer.
A Petri-Net is a triple N = (P, T, F) where P is the finite set of places, T the finite set of transitions, and F ⊆ (P × T ) ∪ (T × P ) is the flow relation. The preset of an element x ⊆ (P ∪ T ) is defined as • x = {y ∈ P ∪ T ( y , x) ∈ F }and its postset is defined as x• = {y ∈ P ∪ T ( x, y ) ∈ F }. For a place p with more than one postset transition, we say p is a choice place. Choice place p is an extended free choice if all its postset transitions can be enabled regardless of external influence, in other words selection of the transition to fire is probabilistic. A special case of extended-free choice is a free-choice place p for which all output transitions of p have only one input place. A place p is a unique choice place, if no two output transitions of p can be enabled at the same time. In this case, the selection of the firing transition is not probabilistic. A marking is a token assignment for the places and represents the state of the system. Formally, a marking is a mapping M : P → { 0, 1, 2,… } where the number of tokens in place p under marking M is denoted by M(p). If M(p) > 0, then the place p has token within. All the tokens in our simulation system are 1-bounded which means that they maximally can contain only one token. A transition t is enabled at marking M if M ( p) ≥ 1, ∀p ∈ •t . An enabled transition will fire eventually in a feasible asynchronous circuit specification. The firing of t removes one token from each place in its preset and inserts one token to each place in its postset. Timed Petri-Net is a Petri-Net in which some transitions or places can be annotated with delays. Different delay models can be used such as fixed, uniform bounded or normalized random delays. In Probabilistic Timed Petri-Nets (PTPN) each free choice place p, is assigned a probability resolution vector to resolve the choice (select the firing transition among the possibilities). Transitions with higher probabilities are more likely to consume tokens whenever their input places contain tokens.