TB310资料

C_BUS 2 C_BUS 4
C_BUS OUT_ 0 ENX C_BUS OUT_ 1 ENP OUT_ SELH
DATA_ RDY VCC
VCC
DATA_ DATA_ DATA_ DATA_ OUT 23 OUT 21 OUT 20 OUT 18 DATA_ DATA_ DATA_ DATA_ OUT 22 OUT 19 OUT 17 OUT 15 DATA_ DATA_ OUT 16 OUT 14 DATA_ DATA_ OUT 13 OUT 12
DECIMATE Software Development Tool (This software tool may be
downloaded from our Internet site: )
Block Diagram
DECIMATION UP TO 1024 INPUT CLOCK DATA INPUT CONTROL AND COEFFICIENTS HIGH ORDER DECIMATION FILTER DECIMATION UP TO 16 FIR DECIMATION FILTER FIR CLOCK 24 DATA OUT DATA READY
Applications
• Very Narrow Band Filters • Zoom Spectral Analysis • Channelized Receivers • Large Sample Rate Converter
Ordering Information
PART NUMBER HSP43220VC-33 HSP43220JC-15 HSP43220JC-25 HSP43220JC-33 HSP43220GC-25 HSP43220GC-33 TEMP. RANGE (oC) 0 to 70 0 to 70 0 to 0 0 to 70 0 to 70 0 to 70 PACKAGE 100 Ld MQFP 84 Ld PLCC 84 Ld PLCC 84 Ld PLCC 84 Ld CPGA 84 Ld CPGA PKG. NO. Q100.14x20 N84.1.15 N84.1.15 N84.1.15 G84.A G84.A
VCC DATA_ OUT 6 DATA_ OUT 3
DATA_ DATA_ IN 9 IN 5 DATA_ IN 0 DATA_ IN 2 DATA_ DATA_ DATA_ IN 3 IN 6 IN 13 DATA_ DATA_ DATA_ IN 4 IN 7 IN 8
DATA_ IN 10 DATA_ IN 12 DATA_ IN 11 DATA_ IN 15 DATA_ IN 14
GND
GND
FIR_ CK
C_BUS 13 C_BUS 14 A0
HSP43220
BOTTOM VIEW PINS UP
DATA_ OUT 10 DATA_ OUT 9 DATA_ OUT 5
GND
DATA_ OUT 11 DATA_ OUT 8 DATA_ OUT 7 DATA_ OUT 4 DATA_ OUT 2 DATA_ OUT 1 GND
元器件交易网
HSP43220 Pinouts
84 PIN GRID ARRAY (PGA)
1 2 DATA_ IN 1 START OUT VCC 3 DATA_ IN 2 DATA_ IN 0 4 DATA_ IN 4 DATA_ IN 3 5 DATA_ IN 7 DATA_ IN 6 DATA_ IN 5 6 DATA_ IN 8 DATA_ IN 13 DATA_ IN 9 7 DATA_ IN 11 DATA_ IN 12 DATA_ IN 10 8 DATA_ IN 14 DATA_ IN 15 9 10 GND 11 GND DATA_ OUT 1 DATA_ OUT 2 DATA_ OUT 4 DATA_ OUT 7 DATA_ OUT 8 DATA_ OUT 11
A
GND START IN ASTART IN A1
VCC
B
CK_IN
VCC DATA_ OUT 0 DATA_ OUT 3
C
D
RESET
E
CS
WR
A0
HSP43220
F C_BUS 10 C_BUS 12 C_BUS 9 C_BUS C_BUS 15 14 C_BUS C_BUS 11 13 VCC C_BUS 7 C_BUS 5 C_BUS 3 C_BUS C_BUS 4 1 C_BUS C_BUS 2 0 OUT_ SELH OUT_ ENP OUT_ ENX FIR_ CK GND
元器件交易网
HSP43220
Data Sheet February 1999 File Number
2486.7
Decimating Digital Filter
The HSP43220 Decimating Digital Filter is a linear phase low pass decimation filter which is optimized for filtering narrow band signals in a broad spectrum of a signal processing applications. The HSP43220 offers a single chip solution to signal processing applications which have historically required several boards of ICs. This reduction in component count results in faster development times as well as reduction of hardware costs. The HSP43220 is implemented as a two stage filter structure. As seen in the block diagram, the first stage is a high order decimation filter (HDF) which utilizes an efficient sample rate reduction technique to obtain decimation up to 1024 through a coarse low-pass filtering process. The HDF provides up to 96dB aliasing rejection in the signal pass band. The second stage consists of a finite impulse response (FIR) decimation filter structured as a transversal FIR filter with up to 512 symmetric taps which can implement filters with sharp transition regions. The FIR can perform further decimation by up to 16 if required while preserving the 96dB aliasing attenuation obtained by the HDF. The combined total decimation capability is 16,384. The HSP43220 accepts 16-bit parallel data in 2’s complement format at sampling rates up to 33 MSPS. It provides a 16-bit microprocessor compatible interface to simplify the task of programming and three-state outputs to allow the connection of several ICs to a common bus. The HSP43220 also provides the capability to bypass either the HDF or the FIR for additional flexibility.
DATA_ OUT 0 VCC
CK_IN
VCC
GND
3-195
元器件交易网
HSP43220 Pinouts
(Continued) 100 LEAD MQFP TOP VIEW
DATA_IN0 DATA_IN1 DATA_IN2 DATA_IN3 DATA_IN4 DATA_IN5 DATA_IN6 DATA_IN7 DATA_IN8 DATA_IN9 DATA_IN10 DATA_IN11 DATA_IN12 DATA_IN13 DATA_IN14 DATA_IN15 VCC VCC GND GND 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 GND GND NC STARTOUT VCC VCC STARTIN ASTARTIN RESET A1 A0 WR CS C_BUS15 C_BUS14 C_BUS13 C_BUS12 C_BUS11 C_BUS10 C_BUS9 VCC VCC GND GND C_BUS8 C_BUS7 C_BUS6 NC C_BUS5 C_BUS4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 C_BUS3 C_BUS2 C_BUS1 C_BUS0 OUT_SELH OUT_ENP OUT_ENX VCC VCC GND GND FIR_CK VCC VCC GND GND DATA_RDY DATA_OUT23 DATA_OUT22 DATA_OUT21 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 CK_IN VCC VCC GND GND DATA_OUT0 DATA_OUT1 DATA_OUT2 DATA_OUT3 DATA_OUT4 DATA_OUT5 DATA_OUT6 DATA_OUT7 DATA_OUT8 DATA_OUT9 DATA_OUT10 DATA_OUT11 GND GND VCC VCC DATA_OUT12 DATA_OUT13 DATA_OUT14 DATA_OUT15 DOUT_OUT16 DATA_OUT17 DATA_OUT18 DATA_OUT19 DATA_OUT20
J
GND C_BUS 8 C_BUS 6
GND
K
VCC DATA_ RDY
L
VCC
L
2
3
4
5
6
7
8
9
10
11
C_BUS C_BUS 6 3 K C_BUS C_BUS 8 5 J GND H C_BUS 9 G C_BUS C_BUS 12 11 F C_BUS C_BUS 15 10 E CS D A1 C ASTART IN B START START IN OUT A GND DATA_ IN 1 VCC RESET WR VCC C_BUS 7
Features
• Single Chip Narrow Band Filter with up to 96dB Attenuation • DC to 33MHz Clock Rate • 16-Bit 2’s Complement Input • 20-Bit Coefficients in FIR • 24-Bit Extended Precision Output • Programmable Decimation up to a Maximum of 16,384 • Standard 16-Bit Microprocessor Interface • Filter Design Software Available DECIMATE™ • Up to 512 Taps
DATA_ OUT 5 DATA_ OUT 9 DATA_ OUT 10
DATA_ OUT 6 VCC
TOP VIEW PINS DOWN
G
GND
H
DATA_ DATA_ OUT 13 OUT 12 DATA_ DATA_ OUT 16 OUT 14 DATA_ DATA_ DATA_ DATA_ OUT 22 OUT 19 OUT 17 OUT 15 DATA_ DATA_ DATA_ DATA_ OUT 23 OUT 21 OUT 20 OUT 18
16 16
3-194
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. or 407-727-9207 | Copyright © Intersil Corporation 1999 DECIMATE™ is a trademark of Intersil Corporation.