16位模拟多路复用器CD4067B
CD74HC4067SM96中文资料
Copyright © 2003, Texas Instruments Incorporated
1
元器件交易网
Functional Diagram
10 S0 11 S1 14 S2
13 S3
CD74HC4067, CD74HCT4067
I0 9
PN
BINARY 1 OF 16 DECODER SN = 5 STAGES E = 4 STAGES
Thermal Information
Thermal Resistance (Typical)
θJA (oC/W)
E (PDIP) Package, Note 1 . . . . . . . . . . . . . . . . . . . .
67
M (SOIC) Package, Note 2 . . . . . . . . . . . . . . . . . . .
P
N
16 I15
TRUTH TABLE
S2
S3
E
X
X
1
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
1
0
0
1
0
0
1
0
0
1
0
1
1
0
1
1
0
1
1
0
1
1
0
SELECTED CHANNEL
None 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
常用模拟开关芯片型号与功能和应用介绍
CD4051引脚功能图
UDD 16
(+15V)
INH C
6
9
BA
10
11
电平转换
地8
译码驱动
UEE 7
(-15V)
3 4 2 5 1 12 15 14 13
SmS7 S6 S5 S4 S3 S2 S1 S0
{S4
IN/OUT
S6 (OUT/IN S)m
{S7
IN/OUT
S5 INH UEE
1
16
2
1
1
0
1
0
“13”
1
1
1
0
0
“14”
1
1
1
1
0
“15”
1
均不接通
高压型模拟开关
高压模拟开关采用全数字电路,时间为数字拨码设置, 可实现模拟断路器跳合闸时间设置、三相/分相操作选 择、输入信号逻辑控制等作用,从而模拟断路器的跳、 合闸动作
高压模拟开关特性 ◆ 模拟断路器可模拟跳闸和合闸时间,时间设置
成套继电保护屏的整组试验,可真实地模拟断路器的 跳合闸时间。在整组试验时模拟高压断路器的跳闸及 合闸,以避免由于重复的整组试验造成断路器反复分 合带来的不良影响。
MAX4800A,MAX4802A 高压模拟开关
MAX4800A/MAX4802A可为超声成像和打印机应用 提供8通道高压开关。该器件采用BCDMOS工艺,提 供8个高压低电荷注入SPST开关,由20MHz串行接口 控制。数据被移入到内部8位移位寄存器,并通过带使 能和清除输入的可编程锁存器保持数据。上电复位功 能确保所有开关在上电时为开启状态。
INH为“1”时断开 所有通道的接通。
2016新编CD系列引脚大全
常用4000系列标准数字电路的中文名称资料型号器件名称厂牌备注CD4000 双3输入端或非门+单非门 TICD4001 四2输入端或非门 HIT/NSC/TI/GOLCD4002 双4输入端或非门 NSCCD4006 18位串入/串出移位寄存器 NSCCD4007 双互补对加反相器 NSCCD4008 4位超前进位全加器 NSCCD4009 六反相缓冲/变换器 NSCCD4010 六同相缓冲/变换器 NSCCD4011 四2输入端与非门 HIT/TICD4012 双4输入端与非门 NSCCD4013 双主-从D型触发器 FSC/NSC/TOSCD4014 8位串入/并入-串出移位寄存器 NSCCD4015 双4位串入/并出移位寄存器 TICD4016 四传输门 FSC/TICD4017 十进制计数/分配器 FSC/TI/MOTCD4018 可预制1/N计数器 NSC/MOTCD4019 四与或选择器 PHICD4020 14级串行二进制计数/分频器 FSCCD4021 08位串入/并入-串出移位寄存器 PHI/NSCCD4022 八进制计数/分配器 NSC/MOTCD4023 三3输入端与非门 NSC/MOT/TICD4024 7级二进制串行计数/分频器 NSC/MOT/TICD4025 三3输入端或非门 NSC/MOT/TICD4026 十进制计数/7段译码器 NSC/MOT/TICD4027 双J-K触发器 NSC/MOT/TICD4028 BCD码十进制译码器 NSC/MOT/TICD4029 可预置可逆计数器 NSC/MOT/TICD4030 四异或门 NSC/MOT/TI/GOLCD4031 64位串入/串出移位存储器 NSC/MOT/TICD4032 三串行加法器 NSC/TICD4033 十进制计数/7段译码器 NSC/TICD4034 8位通用总线寄存器 NSC/MOT/TICD4035 4位并入/串入-并出/串出移位寄存 NSC/MOT/TI CD4038 三串行加法器 NSC/TICD4040 12级二进制串行计数/分频器 NSC/MOT/TICD4041 四同相/反相缓冲器 NSC/MOT/TICD4042 四锁存D型触发器 NSC/MOT/TICD4043 4三态R-S锁存触发器("1"触发) NSC/MOT/TI CD4044 四三态R-S锁存触发器("0"触发) NSC/MOT/TI CD4046 锁相环 NSC/MOT/TI/PHICD4047 无稳态/单稳态多谐振荡器 NSC/MOT/TICD4048 4输入端可扩展多功能门 NSC/HIT/TICD4049 六反相缓冲/变换器 NSC/HIT/TICD4050 六同相缓冲/变换器 NSC/MOT/TICD4051 八选一模拟开关 NSC/MOT/TICD4052 双4选1模拟开关 NSC/MOT/TICD4053 三组二路模拟开关 NSC/MOT/TICD4054 液晶显示驱动器 NSC/HIT/TICD4055 BCD-7段译码/液晶驱动器 NSC/HIT/TI CD4056 液晶显示驱动器 NSC/HIT/TICD4059 “N”分频计数器 NSC/TICD4060 14级二进制串行计数/分频器 NSC/TI/MOT CD4063 四位数字比较器 NSC/HIT/TICD4066 四传输门 NSC/TI/MOTCD4067 16选1模拟开关 NSC/TICD4068 八输入端与非门/与门 NSC/HIT/TICD4069 六反相器 NSC/HIT/TICD4070 四异或门 NSC/HIT/TICD4071 四2输入端或门 NSC/TICD4072 双4输入端或门 NSC/TICD4073 三3输入端与门 NSC/TICD4075 三3输入端或门 NSC/TICD4076 四D寄存器CD4077 四2输入端异或非门 HITCD4078 8输入端或非门/或门CD4081 四2输入端与门 NSC/HIT/TICD4082 双4输入端与门 NSC/HIT/TICD4085 双2路2输入端与或非门CD4086 四2输入端可扩展与或非门CD4089 二进制比例乘法器CD4093 四2输入端施密特触发器 NSC/MOT/STCD4094 8位移位存储总线寄存器 NSC/TI/PHICD4095 3输入端J-K触发器CD4096 3输入端J-K触发器CD4097 双路八选一模拟开关CD4098 双单稳态触发器 NSC/MOT/TICD4099 8位可寻址锁存器 NSC/MOT/STCD40100 32位左/右移位寄存器CD40101 9位奇偶较验器CD40102 8位可预置同步BCD减法计数器CD40103 8位可预置同步二进制减法计数器CD40104 4位双向移位寄存器CD40105 先入先出FI-FD寄存器CD40106 六施密特触发器 NSC\TICD40107 双2输入端与非缓冲/驱动器 HAR\TICD40108 4字×4位多通道寄存器CD40109 四低-高电平位移器CD40110 十进制加/减,计数,锁存,译码驱动 STCD40147 10-4线编码器 NSC\MOTCD40160 可预置BCD加计数器 NSC\MOTCD40161 可预置4位二进制加计数器 NSC\MOTCD40162 BCD加法计数器 NSC\MOTCD40163 4位二进制同步计数器 NSC\MOTCD40174 六锁存D型触发器 NSC\TI\MOTCD40175 四D型触发器 NSC\TI\MOTCD40181 4位算术逻辑单元/函数发生器CD40182 超前位发生器CD40192 可预置BCD加/减计数器(双时钟) NSC\TICD40193 可预置4位二进制加/减计数器 NSC\TICD40194 4位并入/串入-并出/串出移位寄存 NSC\MOT CD40195 4位并入/串入-并出/串出移位寄存 NSC\MOT CD40208 4×4多端口寄存器CD4501 4输入端双与门及2输入端或非门CD4502 可选通三态输出六反相/缓冲器CD4503 六同相三态缓冲器CD4504 六电压转换器CD4506 双二组2输入可扩展或非门CD4508 双4位锁存D型触发器CD4510 可预置BCD码加/减计数器CD4511 BCD锁存,7段译码,驱动器CD4512 八路数据选择器CD4513 BCD锁存,7段译码,驱动器(消隐)CD4514 4位锁存,4线-16线译码器CD4515 4位锁存,4线-16线译码器CD4516 可预置4位二进制加/减计数器CD4517 双64位静态移位寄存器CD4518 双BCD同步加计数器CD4519 四位与或选择器CD4520 双4位二进制同步加计数器CD4521 24级分频器CD4522 可预置BCD同步1/N计数器CD4526 可预置4位二进制同步1/N计数器CD4527 BCD比例乘法器CD4528 双单稳态触发器CD4529 双四路/单八路模拟开关CD4530 双5输入端优势逻辑门CD4531 12位奇偶校验器CD4532 8位优先编码器CD4536 可编程定时器CD4538 精密双单稳CD4539 双四路数据选择器CD4541 可编程序振荡/计时器CD4543 BCD七段锁存译码,驱动器CD4544 BCD七段锁存译码,驱动器CD4547 BCD七段译码/大电流驱动器CD4549 函数近似寄存器CD4551 四2通道模拟开关CD4553 三位BCD计数器CD4555 双二进制四选一译码器/分离器CD4556 双二进制四选一译码器/分离器CD4558 BCD八段译码器CD4560 "N"BCD加法器CD4561 "9"求补器CD4573 四可编程运算放大器CD4574 四可编程电压比较器CD4575 双可编程运放/比较器CD4583 双施密特触发器CD4584 六施密特触发器CD4585 4位数值比较器CD4599 8位可寻址锁存器CD22100 4×4×1交叉点开关电力安全月工作总结[电力安全月工作总结]电力安全月工作总结2011年3月1日至3月31日为我公司的安全生产月,**变电站围绕;夯实基储提高素质、树立标杆、争创一流;的主题,开展了丰富多彩、形式多样的具体行动:通过看板形式宣传安全第一、预防为主的方针;通过48+4的学习机会,进行安全生产大讨论;通过安全活动进行查找本站的隐患的活动,电力安全月工作总结。
74HCT4067选择器
74HC_HCT4067
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Product data sheet
Rev. 6 — 22 May 2015
3 of 28
NXP Semiconductors
74HC4067; 74HCT4067
16-channel analog multiplexer/demultiplexer
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Product data sheet
Rev. 6 — 22 May 2015
4 of 28
NXP Semiconductors
74HC4067; 74HCT4067
16-channel analog multiplexer/demultiplexer
6. Pinning information
6.1 Pinning
+& +&7
+& +&7
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Rev. 6 — 22 May 2015
CD4067BM中文资料
PACKAGING INFORMATIONOrderable DeviceStatus (1)Package Type Package DrawingPins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)CD4067BE ACTIVE PDIP N 2415Pb-Free (RoHS)CU NIPDAU Level-NC-NC-NC CD4067BF ACTIVE CDIP J 241None Call TI Level-NC-NC-NC CD4067BF3A ACTIVE CDIP J 241None Call TI Level-NC-NC-NC CD4067BM ACTIVE SOIC DW 2425Pb-Free (RoHS)CU NIPDAU Level-2-250C-1YEAR/Level-1-235C-UNLIM CD4067BM96ACTIVE SOIC DW 242000Pb-Free (RoHS)CU NIPDAU Level-2-250C-1YEAR/Level-1-235C-UNLIM CD4067BNSR ACTIVE SO NS 242000Pb-Free (RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM CD4067BPW ACTIVE TSSOP PW 2460Pb-Free (RoHS)CU NIPDAU Level-1-250C-UNLIM CD4067BPWR ACTIVE TSSOP PW 242000Pb-Free (RoHS)CU NIPDAU Level-1-250C-UNLIM CD4097BE ACTIVE PDIP N 2415Pb-Free (RoHS)CU NIPDAU Level-NC-NC-NC CD4097BF ACTIVE CDIP J 241None Call TI Level-NC-NC-NC CD4097BM ACTIVE SOIC DW 2425Pb-Free (RoHS)CU NIPDAU Level-2-250C-1YEAR/Level-1-235C-UNLIM CD4097BM96ACTIVE SOIC DW 242000Pb-Free (RoHS)CU NIPDAU Level-2-250C-1YEAR/Level-1-235C-UNLIM CD4097BNSR ACTIVE SO NS 242000Pb-Free (RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM CD4097BPW ACTIVE TSSOP PW 2460Pb-Free (RoHS)CU NIPDAU Level-1-250C-UNLIM CD4097BPWRACTIVETSSOPPW242000Pb-Free (RoHS)CU NIPDAULevel-1-250C-UNLIM(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan -May not be currently available -please check /productcontent for the latest availability information and additional product content details.None:Not yet available Lead (Pb-Free).Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Green (RoHS &no Sb/Br):TI defines "Green"to mean "Pb-Free"and in addition,uses package materials that do not contain halogens,including bromine (Br)or antimony (Sb)above 0.1%of total product weight.(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited28-Feb-2005information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annualbasis.28-Feb-2005IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. T esting and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. 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CD4069逻辑功能及引脚介绍
CD4069逻辑功能及引脚如图2a所示,其中非门F1、F2和外接电阻R2、R3、电容C4构成多谐振荡器,产生约3Hz的脉冲方波,供给CD4017作计数脉冲和CD40174作移位脉冲。
R3、C4为振荡定时元件,调节这两个元件可改变振荡信号频率,从而控制彩灯色彩的流动速度,以呈现各种不同的视觉效果。
另外,CD4069的非门3还用作CD40174复位信号的倒相器。
CD4069为CMOS数字集成电路,是一种高输入阻抗器件,容易受外界干扰造成逻辑混乱或出现感应静电而击穿场效应管的栅极。
虽然器件内部输入端设置了保护电路,但它们吸收瞬变能量有限,过大的瞬变信号和过高的静电电压将使保护电路失去作用,因此,CD4069中未使用的非门F4、F5、F6的输入端{9}、{11}、{13}脚均接到Vss接地端,以作保护。
CD4069多谐振荡器输出端{4}脚送出的脉冲串,一路直接送入CD4017的计数脉冲输入端{14}脚。
CD4017为十进制计数/时序分配器,用于产生CD4066模拟开关切换的控制信号。
其引脚功能如图2b所示。
Cr为复位端,当Cr端输入高电平时、计数器置零态。
CD4017具有自动启动功能,即在电路进入无效状态时,在计数脉冲作用下,最多经过两个时钟周期就能回到正常循环圈中,因此本控制器的CD4017未设置加电复位电路。
Co为进位输出端,当计数满10个时钟脉冲时输出一个正脉冲。
CD4017有CL和EN两个计数输入端,CL端为脉冲上升沿触发端,若计数脉冲从CL端输入,则EN端应接低电平;EN端为脉冲下降沿触发端,若计数脉冲从EN端输入,则CL端应接高电平,否则禁止输入计数脉冲。
取自CD4069的计数脉冲从其CL端{14}脚输入,故EN端{13}脚接地。
Y0~Y9为计数器的十个输出端,输出端送出的脉冲方波通过隔离二极管VD3~VD12连接成两路控制信号,加到模拟开关CD4066。
当第一个计数脉冲到来时,CD4017内电路翻转,{3}脚Y0呈高电平,经二极管VD5加到CD4066{12}脚。
集成电路命名规则汇总
C1470 电机稳速 1992-99
C1490HA 红外接收 1991-110
C1676 超高频放大 1995s-199
C1891A 环绕声处理器 1992-24
C7642 单片收音机 1991-95
CA3069 运放 1994x-184
BA3822LS 5段均衡 1994-180
BA508 遥控电路 1995s-171
BA5102 音频前置 1993x-108
BA5102 遥控电风扇编码 1995s-119
BA5104 电风扇遥控 1995s-183
BA527 音频功放 1991-168
BA5302 红外接收头 1995s-183
集成电路应用索引
741 运算放大器
2063A JRC杜比降噪
20730 双功放
24C01AIPB21 存储器
27256 256K-EPROM
27512 512K-EPROM
2SK212 显示屏照明
3132V 32V三端稳压
3415D 双运放
AN7812 三端稳压器 1994s-299
AN78N05 三端稳压器 1994s-298
AP500/A DC功放驱动 1995s-60
AP500/A 双声道DC功放驱动 1995s-156
AT24C01 存储器 1994x-46
ATC105 充电控制 1993x-191
AX5212D 微机鼠标编码 1994s-183
AN51354 中放/音频/视频解调 1994s-255
AN5138K 图象通道 1994-308
AN5265 音频功放 1994s-298
多路复用器和模拟开关
多路复用器和模拟开关多路复用器(MULTIPLEXER 也称为数据选择器)是用来选择数字信号通路的;模拟开关是传递模拟信号的,因为数字信号也是由高低两个模拟电压组成的, 所以模拟开关也能传递数字信号。
在CMOS多路复用器中,因为其数据通道也是模拟开关结构,所以也能用于选择多路模拟信号。
但是TTL的多路复用器就不能选择模拟信号.。
用CMOS的多路复用器或模拟开关传递模拟信号时要注意:模拟信号的变化值必须在正负电源电压之间,譬如要传递有正负半周的正弦波时,必须使用正负电源且电源电压大于传递的模拟信号峰值,这时其控制或地址信号必须以负电源电压为0,而以正电源电压为1;或者用单电源供电,而使模拟信号的变化中值在 1/2 电源电压上, 传递之后再恢复到原来的值。
1、常用CMOS模拟开关引脚功能和工作原理1.四双向模拟开关CD4066CD4066的引脚功能如下图所示。
每个封装内部有4个独立的模拟开关,每个模拟开关有输入、输出、控制三个端子,其中输入端和输出端可互换。
当控制端加高电平时,开关导通;当控制端加低电平时开关截止。
模拟开关导通时,导通电阻为几十欧姆;模拟开关截止时,呈现很高的阻抗,可以看成为开路。
模拟开关可传输数字信号和模拟信号,可传输的模拟信号的上限频率为40MHz。
各开关间的串扰很小,典型值为-50dB。
2.单八路模拟开关CD4051CD4051引脚功能如下图所示。
CD4051相当于一个单刀八掷开关,开关接通哪一通道,由输入的3位地址码ABC来决定。
“INH”是禁止端,当“INH”=1时,各通道均不接通。
此外,CD4051还设有另外一个电源端VEE,以作为电平位移时使用,从而使得通常在单组电源供电条件下工作的CMOS电路所提供的数字信号能直接控制这种多路开关,并使这种多路开关可传输峰-峰值达15V的交流信号。
例如,若模拟开关的供电电源VDD=+5V,VSS=0V,当VEE=-5V时,只要对此模拟开关施加0~5V的数字控制信号,就可控制幅度范围为-5V~+5V的模拟信号。
cd4067
电气参数表VDD-GDN 1.8V-3.6V TA-25度模块名称解释:tx8-434Mtx8. 代表发射模块的型号;434M.代表的是发射模块的频率是434MHz;可演示CD4067功能的实验电路2012年03月29日11:22 来源:本站整理作者:灰色天空我要评论(0)笔者用万能实验板。
制作了演示CD4067功能的电路,本电路同时还能演示计数器计数过程和计数脉冲的产生。
在课堂教学中效果显着,使学生兴趣大增。
现将电路谨荐给同行,希望有抛砖引玉之效。
CD4067为CMOS 16选1双向模拟开关。
可用于数字传输、信号分时处理、多路巡回监测等电路中,与单片机:I/O端口挂接,能很方便地实现生产测控。
也可与其他CMOS电路连接成数控网络、多路分配器等,设计出多种实用的电路。
该演示电路由低频脉冲电路、计数器和CD4067导通情况显示电路组成。
参看附图。
低频脉冲电路由NE555、R22、R23、RP、C1等元件组成振荡器,产生计数脉冲。
调整RP可改变脉冲周期,若将RP的阻值调节到最大,脉冲周期可接近1s,学生可以通过闪光,清楚地看到连续输出的脉冲。
若想再增大脉冲周期,可适当增大C1或R23的值。
对于NE555振荡电路的工作原理。
有关介绍甚多,此不赘述。
计数部分由两块CD4013双D触发器组成,是采用8421编码的异步计数器。
发光二极管1EDD、1EDC、1EDB、1EDA显示计数器即时计数情况,1EDD为最高位,1EDA为最低位,“1”表示发光,“0”表示熄灭。
计数器依次产生的0000~1111数码。
周而复始地输送到CD4067的数控端。
由于计数过程是16个脉冲为一个周期。
计数显示发光二极管闪亮节奏比脉冲输出指示管1EDQ更慢,学生可以边看边数边理解计数器计数过程。
CD4067的工作电路十分简单,由计数器输出的8421码,与CD4067数控端相对应连接。
CD4067的0~15通道的输入(输出)端与发光二极管1ED0~1ED15各支路对应相连,可以显示CD4067的导通情况。
cd4067b PDF芯片资料
The CD4067B and CD4097B types are suppliedin 24-lead hermetic dual-in-line ceramicpackages (F3A suffix), 24-lead dual-in-lineplastic packages (E suffix), 24-leadsmall-outline packages (M, M96, and NSRsuffixes), and 24-lead thin shrink small-outlinepackages (P and PWR suffixes).Copyright© 2003, Texas Instruments IncorporatedPACKAGING INFORMATIONAddendum-Page 1(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check /productcontent for the latest availability information and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.Addendum-Page 2In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.OTHER QUALIFIED VERSIONS OF CD4067B, CD4067B-MIL, CD4097B, CD4097B-MIL :•Catalog: CD4067B, CD4097B•Military: CD4067B-MIL, CD4097B-MILNOTE: Qualified Version Definitions:•Catalog - TI's standard catalog product•Military - QML certified for Military and Defense ApplicationsAddendum-Page 3TAPE AND REELINFORMATION *Alldimensions are nominal Device Package Type Package DrawingPinsSPQ Reel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant CD4067BM96SOICDW 242000330.024.410.7515.7 2.712.024.0Q1CD4067BM96SOICDW 242000330.024.410.7515.7 2.712.024.0Q1CD4067BM96G4SOICDW 242000330.024.410.7515.7 2.712.024.0Q1CD4067BPWR TSSOPPW 242000330.016.4 6.958.3 1.68.016.0Q1CD4097BPWR TSSOP PW 242000330.016.4 6.958.3 1.68.016.0Q1PACKAGE MATERIALS INFORMATION 24-Oct-2014Pack Materials-Page 1*All dimensionsare nominal DevicePackage Type Package Drawing Pins SPQ Length (mm)Width (mm)Height (mm)CD4067BM96SOIC DW 242000366.0364.050.0CD4067BM96SOIC DW 242000367.0367.045.0CD4067BM96G4SOIC DW 242000367.0367.045.0CD4067BPWRTSSOP PW 242000367.0367.038.0CD4097BPWR TSSOP PW 242000367.0367.038.0PACKAGE MATERIALS INFORMATION 24-Oct-2014Pack Materials-Page 2IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,enhancements,improvements and other changes to its semiconductor products and services per JESD46,latest issue,and to discontinue any product or service per JESD48,latest issue.Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All semiconductor products(also referred to herein as“components”)are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its components to the specifications applicable at the time of sale,in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by applicable law,testing of all parameters of each component is not necessarily performed.TI assumes no liability for applications assistance or the design of Buyers’products.Buyers are responsible for their products and applications using TI components.To minimize the risks associated with Buyers’products and applications,Buyers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any patent right,copyright,mask work right,or other intellectual property right relating to any combination,machine,or process in which TI components or services are rmation published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI.Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.TI is not responsible or liable for such altered rmation of third parties may be subject to additional restrictions.Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. 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CD4069逻辑功能及引脚介绍
CD4069逻辑功能及引脚如图2a所示,其中非门F1、F2和外接电阻R2、R3、电容C4构成多谐振荡器,产生约3Hz的脉冲方波,供给CD4017作计数脉冲和CD40174作移位脉冲。
R3、C4为振荡定时元件,调节这两个元件可改变振荡信号频率,从而控制彩灯色彩的流动速度,以呈现各种不同的视觉效果。
另外,CD4069的非门3还用作CD40174复位信号的倒相器。
CD4069为CMOS数字集成电路,是一种高输入阻抗器件,容易受外界干扰造成逻辑混乱或出现感应静电而击穿场效应管的栅极。
虽然器件内部输入端设置了保护电路,但它们吸收瞬变能量有限,过大的瞬变信号和过高的静电电压将使保护电路失去作用,因此,CD4069中未使用的非门F4、F5、F6的输入端{9}、{11}、{13}脚均接到Vss接地端,以作保护。
CD4069多谐振荡器输出端{4}脚送出的脉冲串,一路直接送入CD4017的计数脉冲输入端{14}脚。
CD4017为十进制计数/时序分配器,用于产生CD4066模拟开关切换的控制信号。
其引脚功能如图2b所示。
Cr为复位端,当Cr端输入高电平时、计数器置零态。
CD4017具有自动启动功能,即在电路进入无效状态时,在计数脉冲作用下,最多经过两个时钟周期就能回到正常循环圈中,因此本控制器的CD4017未设置加电复位电路。
Co为进位输出端,当计数满10个时钟脉冲时输出一个正脉冲。
CD4017有CL和EN两个计数输入端,CL端为脉冲上升沿触发端,若计数脉冲从CL端输入,则EN端应接低电平;EN端为脉冲下降沿触发端,若计数脉冲从EN端输入,则CL端应接高电平,否则禁止输入计数脉冲。
取自CD4069的计数脉冲从其CL端{14}脚输入,故EN端{13}脚接地。
Y0~Y9为计数器的十个输出端,输出端送出的脉冲方波通过隔离二极管VD3~VD12连接成两路控制信号,加到模拟开关CD4066。
当第一个计数脉冲到来时,CD4017内电路翻转,{3}脚Y0呈高电平,经二极管VD5加到CD4066{12}脚。
CD4067 详细中文资料
CC4067------16选1模拟开关简要说明:CC4067 是数字控制模拟开关,具有低导通阻抗,低截止漏电流和内部地址译码的特征。
另外,在整个输入信号范围内,导通电阻保持相对稳定。
CC4067是16通道开关,有四个二进制输入端A0~A3和控制端C,输入的任意一个组合可选择一路开关。
C=1时,关闭所有的通道。
CC4067提供了24引线多层陶瓷双列直插(D)、熔封陶瓷双列直插(J)、塑料双列直插(P)和陶瓷片状载体(C)4种封装形式。
推荐工作条件:电源电压范围…………3V~15V输入电压范围…………0V~V DD工作温度范围M类…………-55℃~125℃E类………….-40℃~85℃极限值:电源电压…...-0.5V~18V输入电压……-0.5V~V DD+0.5V输入电流…………….±10mA储存温度…………-65℃~150℃引出端符号:A0~A3 地址端C 控制端I0/O0~I15/O15输入/输出通道O/I 公共输出/输入端V DD正电源Vss 地逻辑符号:引出端排列(俯视):逻辑表达式:I I 输入电流(最大)V IN =18V/0V 18 ±0.1±0.1µA t R =t F =20nS;C L =50pFR L =10k Ω t PLHt PHL 传输延迟时间(导通)(最大)A->O/I C->O/I-0 0 0 5.0 10.015.0-650 270 190 nSt R =t F =20nS;C L =50pFRL=300Ωt PLHt PHL 传输延迟时间(截止) (最大)A->O /I C->O/I -0 0 0 5.0 10.015.0-440 180 130 nS控制部分(A0、A1、A2、A3、C) C I 输入电容(最大) A 、C -- 7.5pF* 峰-峰电压对称值为(V DD-V EE)/2 ** 最坏情况** 两通道的末端逻辑图:。
40系类芯片大全
CD4041 四同相/反相缓冲器 NSC/MOT/TI CD4042 四锁存D型触发器 NSC/MOT/TI CD4043 4三态R-S锁存触发器(&uot;1&uot;触发) NSC/MOT/TI
CD4044 四三态R-S锁存触发器(&uot;0&uot;触发) NSC/MOT/TI
CD4046 锁相环 NSC/MOT/TI/PHI CD4047 无稳态/单稳态多谐振荡器 NSC/MOT/TI
CD4007 双互补对加反相器 NSC CD4008 4位超前进位全加器 NSC CD4009 六反相缓冲/变换器 NSC CD4010 六同相缓冲/变换器 NSC CD4011 四2输入端与非门 HIT/TI CD4012 双4输入端与非门 NSC
CD4013 双主-从D型触发器 FSC/NSC/TOS CD4014 8位串入/并入-串出移位寄存器 NSC CD4015 双4位串入/并出移位寄存器 TI CD4016 四传输门 FSC/TI
CD4094 8位移位存储总线寄存器 NSC/TI/PHI CD4095 3输入端J-K触发器 CD4096 3输入端J-K触发器 CD4097
CD4056 液晶显示驱动器 NSC/HIT/TI CD4059 “N”分频计数器 NSC/TI CD4060 14级二进制串行计数/分频器 NSC/TI/MOT
CD4063 四位数字比较器 NSC/HIT/TI CD4066 四传输门 NSC/TI/MOT CD4067 16选1模拟开关 NSC/TI
CD4048 4输入端可扩展多功能门 NSC/HIT/TI CD4049 六反相缓冲/变换器 NSC/HIT/TI CD4050 六同相缓冲/变换器 NSC/MOT/TI CD4051 八选一模拟开关 NSC/MOT/TI CD4052 双4选1模拟开关 NSC/MOT/TI CD4053 三组二路模拟开关 NSC/MOT/TI CD4054 液晶显示驱动器 NSC/HIT/TI CD4055 BCD-7段译码/液晶驱动器 NSC/HIT/TI
74HC4067BQ中文资料
74HC4067; 74HCT406716-channel analog multiplexer/demultiplexerRev. 03 — 15 October 2007Product data sheet1.General descriptionThe74HC4067;74HCT4067is a high-speed Si-gate CMOS device and is pin compatiblewith the HEF4067B. The device is specified in compliance with JEDEC standard no. 7A.The 74HC4067; 74HCT4067 is a 16-channel analog multiplexer/demultiplexer with fouraddress inputs (S0 to S3), an active-LOW enable input (E), sixteen independentinputs/outputs (Y0 to Y15) and a common input/output (Z).The 74HC4067; 74HCT4067 contains sixteen bidirectional analog switches, each withone side connected to an independent input/output (Y0 to Y15) and the other sideconnected to a common input/output (Z).With pin E = LOW, one of the sixteen switches is selected by pins S0 to S3 (lowimpedance ON-state). All unselected switches are in the high-impedance OFF-state.With pin E=HIGH,all switches are in the high-impedance OFF-state,independent of pinsS0 to S3.The analog inputs/outputs (Y0 to Y15, and Z) can swing between V CC as a positive limitand GND as a negative limit. V CC to GND may not exceed 10V.2.FeaturesI Low ON resistance:N80Ω (typical) at V CC = 4.5VN70Ω (typical) at V CC = 6.0VN60Ω (typical) at V CC = 9.0VI Typical ‘break before make’ built-in3.ApplicationsI Analog multiplexing and demultiplexingI Digital multiplexing and demultiplexingI Signal gating4.Ordering informationTable 1.Ordering informationType number PackageTemperature range Name Description Version 74HC406774HC4067N−40°C to +125°C DIP24plastic dual in-line package; 24leads (600mil);SOT101-1reverse bendingSOT137-1 74HC4067D−40°C to +125°C SO24plastic small outline package; 24leads;body width7.5mm74HC4067DB−40°C to +125°C SSOP24plastic shrink small outline package; 24leads;SOT340-1body width5.3mmSOT355-1 74HC4067PW−40°C to +125°C TSSOP24plastic thin shrink small outline package; 24leads;body width4.4mmSOT815-1 74HC4067BQ−40°C to +125°C DHVQFN24plastic dual in-line compatible thermal enhanced verythin quad flat package; no leads; 24terminals;body3.5×5.5×0.85mm74HCT4067SOT101-1 74HCT4067N−40°C to +125°C DIP24plastic dual in-line package; 24leads (600mil);reverse bendingSOT137-1 74HCT4067D−40°C to +125°C SO24plastic small outline package; 24leads;body width7.5mmSOT340-1 74HCT4067DB−40°C to +125°C SSOP24plastic shrink small outline package; 24leads;body width5.3mmSOT355-1 74HCT4067PW−40°C to +125°C TSSOP24plastic thin shrink small outline package; 24leads;body width4.4mmSOT815-1 74HCT4067BQ−40°C to +125°C DHVQFN24plastic dual in-line compatible thermal enhanced verythin quad flat package; no leads; 24terminals;body3.5×5.5×0.85mm5.Functional diagramFig 1.Logic symbol Fig 2.IEC logic symbol001aag7259Y0810Y1S011S114S213S315E7Y26Y35Y44Y5Z13Y62Y723Y822Y921Y1020Y1119Y1218Y1317Y1416Y15MUX/DMUX39G168761543201234567232221201918171689101112131415001aag72616 ×0151011141315Fig 3.Schematic diagram (one switch)001aag729YnZGNDfrom logicV CC V CCFig 4.Functional diagram001aag7271-OF-16DECODER109Y0S08Y17Y26Y35Y44Y53Y62Y723Y822Y921Y1020Y1119Y1218Y1317Y1416Y151Z11S114S213S315EY0Y1Y2Y3Y4 S0Y5Y6Y7 S1Y8Y9Y10 S2Y11Y12Y13 S3Y14Y15 EZ001aag728Fig 5.Logic diagram6.Pinning information6.1Pinning6.2Pin description(1)The die substrate is attached to this pad usingconductive die attach material.It can not be used as supply pin or input.Fig 6.Pin configuration for DIP24,SO24,SSOP24andTSSOP24Fig 7.Pin configuration for DHVQFN2474HC406774HCT4067Z V CC Y7Y8Y6Y9Y5Y10Y4Y11Y3Y12Y2Y13Y1Y14Y0Y15S0E S1S2GND S3001aag730123456789101112141316151817201922212423001aag73174HC406774HCT4067Transparent top viewS2S0S1E Y0Y15Y1Y14Y2Y13Y3Y12Y4Y11Y5Y10Y6Y9Y7Y8G N D S 3ZV C C111410159168177186195204213222231213124terminal 1index areaV CC (1)Table 2.Pin description Symbol Pin Description Z 1common input/output Y72independent input/output 7Y63independent input/output 6Y54independent input/output 5Y45independent input/output 4Y36independent input/output 3Y27independent input/output 2Y18independent input/output 1Y09independent input/output 0S010address input 0S111address input 1GND 12ground (0V)S313address input 3S214address input 2Table 2.Pin description …continuedSymbol Pin DescriptionE15enable input (active LOW)Y1516independent input/output 15Y1417independent input/output 14Y1318independent input/output 13Y1219independent input/output 12Y1120independent input/output 11Y1021independent input/output 10Y922independent input/output 9Y823independent input/output 8V CC24supply voltage7.Functional descriptionTable 3.Function table[1]Inputs Channel ON E S3S2S1S0L L L L L Y0to ZL L L L H Y1to ZL L L H L Y2to ZL L L H H Y3 to ZL L H L L Y4 to ZL L H L H Y5 to ZL L H H L Y6 to ZL L H H H Y7 to ZL H L L L Y8 to ZL H L L H Y9 to ZL H L H L Y10 to ZL H L H H Y11 to ZL H H L L Y12 to ZL H H L H Y13 to ZL H H H L Y14 to ZL H H H H Y15 to ZH X X X X-[1]H = HIGH voltage level;L = LOW voltage level;X = don’t care.8.Limiting valuesTable 4.Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0V). Symbol Parameter Conditions Min Max UnitV CC supply voltage[1]−0.5+11.0VI IK input clamping current V I<−0.5V or V I>V CC+0.5V-±20mAI SK switch clamping current V SW<−0.5V or V SW>V CC+0.5V-±20mAI SW switch current V SW=−0.5V to (V CC+0.5V)-±25mAI CC supply current-50mAI GND ground current-−50mAT stg storage temperature−65+150°CP tot total power dissipation T amb =−40°C to +125°CDIP24 package[2]-750mWSO24 package[3]-500mWSSOP24 package[4]-500mWTSSOP24 package[4]-500mWDHVQFN24 package[5]-500mWP power dissipation per switch-100mW [1]To avoid drawing V CC current out of terminal Z, when switch current flows in terminals Yn, the voltage drop across the bidirectionalswitch must not exceed0.4V.If the switch currentflows into terminal Z,no V CC current willflow out of terminals Yn.In this case there is no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed V CC or GND.[2]For DIP24 package: P tot derates linearly with 12mW/K above 70°C.[3]For SO24 package: P tot derates linearly with 8mW/K above 70°C.[4]For SSOP24 and TSSOP24 packages: P tot derates linearly with 5.5mW/K above 60°C.[5]For DHVQFN24 package: P tot derates linearly with 4.5mW/K above 60°C.9.Recommended operating conditionsTable 5.Recommended operating conditionsSymbol Parameter Conditions Min Typ Max Unit74HC4067V CC supply voltage 2.0 5.010.0VV I input voltage GND-V CC VV SW switch voltage GND-V CC Vt r rise time V CC = 2.0V--1000nsV CC = 4.5V- 6.0500nsV CC = 6.0V--400nsV CC = 10.0V--250nst f fall time V CC = 2.0V--1000nsV CC = 4.5V- 6.0500nsV CC = 6.0V--400nsV CC = 10.0V--250nsT amb ambient temperature−40+25+125°C10.Static characteristics[1]At supply voltages (V CC − GND) approaching 2V , the analog switch ON resistance becomes extremely non-linear. Therefore it is recommended that these devices be used to transmit digital signals only, when using these supply voltages.74HCT4067V CC supply voltage 4.5 5.0 5.5V V I input voltage GND -V CC V V SW switch voltage GND -V CC V t r rise time V CC = 4.5V - 6.0500ns t f fall timeV CC = 4.5V - 6.0500ns T ambambient temperature−40+25+125°CTable 5.Recommended operating conditions …continued Symbol Parameter ConditionsMin Typ Max Unit Table 6.R ON resistance per switch for types 74HC4067 and 74HCT4067V I = V IH or V IL ; for test circuit see Figure 8.V is is the input voltage at a Yn or Z terminal, whichever is assigned as an input.V os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.For 74HC4067: V CC − GND = 2.0V , 4.5V , 6.0V and 9.0V .For 74HCT4067: V CC − GND = 4.5V .SymbolParameterConditions25°C−40°C to +125°C Unit TypMaxMax (85°C)Max(125°C)R ON(peak)ON resistance (peak)V is = V CC to GNDV CC = 2.0V; I SW = 100µA [1]----ΩV CC = 4.5V; I SW = 1000µA 110180225270ΩV CC = 6.0V; I SW = 1000µA 95160200240ΩV CC = 9.0V; I SW = 1000µA75130165195ΩR ON(rail)ON resistance (rail)V is = GND or V CCV CC = 2.0V; I SW = 100µA [1]150---V CC = 4.5V; I SW = 1000µA 90160200240ΩV CC = 6.0V; I SW = 1000µA 80140175210ΩV CC = 9.0V; I SW = 1000µA70120150180Ω∆R ONON resistance mismatch between channels V is = V CC to GND V CC = 2.0V[1]----ΩV CC = 4.5V 9---ΩV CC = 6.0V 8---ΩV CC = 9.0V6---ΩV is = 0V to (V CC − GND)V is = 0V to (V CC − GND)(1)V CC = 4.5V (2)V CC = 6.0V (3)V CC = 9.0VFig 8.Test circuit for measuring R ON Fig 9.Typical R ON as a function of input voltage V is001aag733V ILZV CCYnE I SWV isGNDV SW V is (V)09.07.23.6 5.41.8mnb0475070309011010R ON (Ω)(1)(2)(3)R ONV SW I SW----------=Table 7.Static characteristics 74HC4067At recommended operating conditions; voltages are referenced to GND (ground = 0V).V is is the input voltage at a Yn or Z terminal, whichever is assigned as an input.V os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.Symbol ParameterConditions Min Typ Max Unit T amb = 25°CV IHHIGH-level input voltageV CC = 2.0V 1.5 1.2-V V CC = 4.5V 3.15 2.4-V V CC = 6.0V 4.2 3.2-V V CC = 9.0V6.3 4.7-V V ILLOW-level input voltageV CC = 2.0V -0.80.5V V CC = 4.5V - 2.1 1.35V V CC = 6.0V - 2.8 1.80V V CC = 9.0V- 4.32.70VI Iinput leakage currentV I = V CC or GND V CC = 6.0V --±0.1µA V CC = 10.0V--±0.2µAI S(OFF)OFF-state leakage currentV CC = 10.0V; V I = V IH or V IL ;|V SW |=V CC −GND ; see Figure 10per channel --±0.1µA all channels--±0.8µA I S(ON)ON-state leakage currentV CC = 10.0V; V I = V IH or V IL ;|V SW |=V CC −GND ; see Figure 11--±0.8µAI CCsupply currentV I =V CC or GND;V is =GND or V CC ;V os =V CC or GND V CC = 6.0V --8.0µA V CC = 10.0V--16.0µA C I input capacitance - 3.5-pFT amb =−40°C to +85°CV IHHIGH-level input voltageV CC = 2.0V 1.5--V V CC = 4.5V 3.15--V V CC = 6.0V 4.2--V V CC = 9.0V6.3--V V ILLOW-level input voltageV CC = 2.0V --0.50V V CC = 4.5V -- 1.35V V CC = 6.0V -- 1.80V V CC = 9.0V-- 2.70VI Iinput leakage currentV I = V CC or GND V CC = 6.0V --±1.0µA V CC = 10.0V--±2.0µAI S(OFF)OFF-state leakage currentV CC = 10.0V; V I = V IH or V IL ;|V SW |=V CC −GND ; see Figure 10per channel --±1.0µA all channels--±8.0µA I S(ON)ON-state leakage current V CC = 10.0V; V I = V IH or V IL ;|V SW |=V CC −GND ; see Figure 11--±8.0µAI CCsupply currentV I =V CC or GND;V is =GND or V CC ;V os =V CC or GND V CC = 6.0V --80.0µA V CC = 10.0V--160µAT amb =−40°C to +125°C V IHHIGH-level input voltageV CC = 2.0V 1.5--V V CC = 4.5V 3.15--V V CC = 6.0V 4.2--V V CC = 9.0V6.3--V V ILLOW-level input voltageV CC = 2.0V --0.50V V CC = 4.5V -- 1.35V V CC = 6.0V -- 1.80V V CC = 9.0V-- 2.70VI Iinput leakage currentV I = V CC or GND V CC = 6.0V --±1.0µA V CC = 10.0V--±2.0µATable 7.Static characteristics 74HC4067 …continuedAt recommended operating conditions; voltages are referenced to GND (ground = 0V).V is is the input voltage at a Yn or Z terminal, whichever is assigned as an input.V os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.Symbol Parameter ConditionsMinTypMaxUnitI S(OFF)OFF-state leakage currentV CC = 10.0V; V I = V IH or V IL ;|V SW |=V CC −GND ; see Figure 10per channel --±1.0µA all channels--±8.0µA I S(ON)ON-state leakage current V CC = 10.0V; V I = V IH or V IL ;|V SW |=V CC −GND ; see Figure 11--±8.0µAI CCsupply currentV I =V CC or GND;V is =GND or V CC ;V os =V CC or GND V CC = 6.0V --160µA V CC = 10.0V--320µATable 7.Static characteristics 74HC4067 …continuedAt recommended operating conditions; voltages are referenced to GND (ground = 0V).V is is the input voltage at a Yn or Z terminal, whichever is assigned as an input.V os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.Symbol ParameterConditionsMinTypMaxUnitTable 8.Static characteristics 74HCT4067At recommended operating conditions; voltages are referenced to GND (ground = 0V).V is is the input voltage at a Yn or Z terminal, whichever is assigned as an input.V os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.Symbol ParameterConditions Min Typ Max Unit T amb = 25°CV IH HIGH-level input voltage V CC = 4.5V to 5.5V 2.0 1.6-V V IL LOW-level input voltage V CC = 4.5V to 5.5V- 1.20.8V I I input leakage current V I = V CC or GND; V CC = 5.5V --±0.1µAI S(OFF)OFF-state leakage currentV CC = 5.5V; V I = V IH or V IL ;|V SW |=V CC −GND ; see Figure 10per channel --±0.1µA all channels--±0.8µA I S(ON)ON-state leakage current V CC = 5.5V; V I = V IH or V IL ;|V SW |=V CC −GND ; see Figure 11--±0.8µA I CC supply currentV I = V CC or GND; V is = GND or V CC ;V os =V CC or GND; V CC = 4.5V to 5.5V --8.0µA∆I CCadditional supply currentper input pin;V I =V CC −2.1V;other inputs at V CC or GND; V CC = 4.5V to 5.5V pin E -60216µA pin Sn-50180µA C I input capacitance - 3.5-pFT amb =−40°C to +85°CV IH HIGH-level input voltage V CC = 4.5V to 5.5V 2.0--V V IL LOW-level input voltage V CC = 4.5V to 5.5V--0.8V I I input leakage current V I = V CC or GND; V CC = 5.5V --±1.0µAI S(OFF)OFF-state leakage currentV CC = 5.5V; V I = V IH or V IL ;|V SW |=V CC −GND ; see Figure 10per channel --±1.0µA all channels--±8.0µAI S(ON)ON-state leakage current V CC = 5.5V; V I = V IH or V IL ;|V SW |=V CC −GND ; see Figure 11--±8.0µA I CC supply currentV I = V CC or GND; V is = GND or V CC ;V os =V CC or GND; V CC = 4.5V to 5.5V --80.0µA∆I CCadditional supply currentper input pin; V I = V CC − 2.1V; otherinputs at V CC or GND;V CC =4.5V to 5.5V pin E --270µA pin Sn--225µAT amb =−40°C to +125°C V IH HIGH-level input voltage V CC = 4.5V to 5.5V 2.0--V V IL LOW-level input voltage V CC = 4.5V to 5.5V--0.8V I I input leakage current V I = V CC or GND; V CC = 5.5V --±1.0µAI S(OFF)OFF-state leakage currentV CC = 5.5V; V I = V IH or V IL ;|V SW |=V CC −GND ; see Figure 10per channel --±1.0µA all channels--±8.0µA I S(ON)ON-state leakage current V CC = 5.5V; V I = V IH or V IL ;|V SW |=V CC −GND ; see Figure 11--±8.0µA I CC supply currentV I = V CC or GND; V is = GND or V CC ;V os =V CC or GND; V CC = 4.5V to 5.5V --160µA∆I CCadditional supply currentper input pin; V I = V CC − 2.1V; otherinputs at V CC or GND;V CC =4.5V to 5.5V pin E --294µA pin Sn--245µATable 8.Static characteristics 74HCT4067 …continuedAt recommended operating conditions; voltages are referenced to GND (ground = 0V).V is is the input voltage at a Yn or Z terminal, whichever is assigned as an input.V os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.Symbol ParameterConditionsMin Typ Max Unit V is = V CC and V os = GND V is = GND and V os = V CCV is = V CC and V os = open V is = GND and V os = openFig 10.Test circuit for measuring OFF-state leakagecurrent Fig 11.Test circuit for measuring ON-state leakagecurrentI SWI SW001aag734V IHZV CCYnE V osV isGNDI SW001aag735V ILZYnE V osV isGNDV CC11.Dynamic characteristicsTable 9.Dynamic characteristics 74HC4067GND =0V; t r = t f = 6ns; C L = 50pF unless specified otherwise; for test circuit see Figure14.V is is the input voltage at a Yn or Z terminal, whichever is assigned as an input.V os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.Symbol Parameter Conditions25°C−40°C to +125°C UnitTyp Max Max(85°C)Max (125°C)t pd propagation delay Yn to Z; see Figure12[1][2]V CC = 2.0V257595110nsV CC = 4.5V9151922nsV CC = 6.0V7131619nsV CC = 9.0V591114nsZ to YnV CC = 2.0V18607590nsV CC = 4.5V6121518nsV CC = 6.0V5101315nsV CC = 9.0V481012ns t off turn-off time E to Yn; see Figure13[3]V CC = 2.0V74250315375nsV CC = 4.5V27506375nsV CC = 5.0V; C L = 15pF27---nsV CC = 6.0V22435464nsV CC = 9.0V20384857nsSn to YnV CC = 2.0V83250315375nsV CC = 4.5V30506375nsV CC = 5.0V; C L = 15pF29---nsV CC = 6.0V24435464nsV CC = 9.0V21384857nsE to ZV CC = 2.0V852********nsV CC = 4.5V31556983nsV CC = 6.0V25475971nsV CC = 9.0V24425363nsSn to ZV CC = 2.0V94290365435nsV CC = 4.5V34587387nsV CC = 6.0V27476274nsV CC = 9.0V25455668ns[1]t pd is the same as t PHL and t PLH .[2]Due to higher Z terminal capacitance (16 switches versus 1) the delay figures to the Z terminal are higher than those to the Y terminal.[3]t on is the same as t PHZ and t PLZ .[4]t off is the same as t PZH and t PZL .[5]C PD is used to determine the dynamic power dissipation (P D in µW).P D = C PD × V CC 2×f i +∑{(C L +C sw )×V CC 2×f o } where:f i = input frequency in MHz;f o = output frequency in MHz;∑{(C L +C sw )×V CC 2× f o } = sum of outputs;C L = output load capacitance in pF;C sw = switch capacitance in pF;V CC = supply voltage in V .t onturn-on timeE to Yn; see Figure 13[4]V CC = 2.0V 80275345415ns V CC = 4.5V29556983ns V CC = 5.0V; C L = 15pF 26---ns V CC = 6.0V 23475971ns V CC = 9.0V 17425363ns Sn to Yn V CC = 2.0V 88300375450ns V CC = 4.5V32607590ns V CC = 5.0V; C L = 15pF 29---ns V CC = 6.0V 26516477ns V CC = 9.0V 18455668ns E to Z V CC = 2.0V 852********ns V CC = 4.5V 31556983ns V CC = 6.0V 25475971ns V CC = 9.0V 18425363ns Sn to Z V CC = 2.0V 94300375450ns V CC = 4.5V 34607590ns V CC = 6.0V 27516477ns V CC = 9.0V19455668ns C PDpower dissipation capacitanceper switch; V I = GND to V CC[5]-29--pFTable 9.Dynamic characteristics 74HC4067 …continuedGND =0V; t r = t f = 6ns; C L = 50pF unless specified otherwise; for test circuit see Figure 14.V is is the input voltage at a Yn or Z terminal, whichever is assigned as an input.V os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.Symbol ParameterConditions25°C−40°C to +125°C Unit TypMaxMax (85°C)Max (125°C)[1]t pd is the same as t PHL and t PLH .[2]Due to higher Z terminal capacitance (16 switches versus 1) the delay figures to the Z terminal are higher than those to the Y terminal.[3]t on is the same as t PHZ and t PLZ .[4]t off is the same as t PZH and t PZL .[5]C PD is used to determine the dynamic power dissipation (P D in µW).P D = C PD × V CC 2×f i +∑{(C L +C sw )×V CC 2×f o } where:f i = input frequency in MHz;f o = output frequency in MHz;∑{(C L +C sw )×V CC 2× f o } = sum of outputs;C L = output load capacitance in pF;C sw = switch capacitance in pF;V CC = supply voltage in V .Table 10.Dynamic characteristics 74HCT4067GND =0V; t r = t f = 6ns; C L = 50pF unless specified otherwise; for test circuit see Figure 14.V is is the input voltage at a Yn or Z terminal, whichever is assigned as an input.V os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.Symbol ParameterConditions25°C−40°C to +125°C Unit TypMaxMax (85°C)Max (125°C)t pdpropagation delayYn to Z; see Figure 12[1][2]V CC = 4.5V 9151922ns Z to Yn V CC = 4.5V6121518ns t offturn-off timeE to Yn; see Figure 13[3]V CC = 4.5V26556983ns V CC = 5.0V; C L = 15pF 26---ns Sn to Yn V CC = 4.5V31556983ns V CC = 5.0V; C L = 15pF 30---ns E to Z V CC = 4.5V 30607590ns Sn to Z V CC = 4.5V35607590ns t onturn-on timeE to Yn; see Figure 13[4]V CC = 4.5V32607590ns V CC = 5.0V; C L = 15pF 32---ns Sn to Yn V CC = 4.5V35607590ns V CC = 5.0V; C L = 15pF 33---ns E to Z V CC = 4.5V 38658198ns Sn to Z V CC = 4.5V38658198ns C PDpower dissipation capacitanceper switch; V I = GND to (V CC −1.5V)[5]-29--pF12.WaveformsFig 12.Input (V is ) to output (V os )propagation delays001aad555t PLH t PHL50 %50 %V is inputV os outputMeasurement points are shown in Table 11.Fig 13.Turn-on and turn-off times 001aad556t PLZt PHZswitch OFF switch ONswitch ON V os outputV os outputE, Sn inputsV MV I0 V90 %10 %t PZLt PZH50 %50 %Table 11.Measurement pointsType V I V M 74HC4067V CC 0.5V CC 74HCT40673.0V1.3V[1]For 74HCT4067: maximum input voltage V I = 3.0V .Test data is given in T able 12.Definitions test circuit:R T = Termination resistance should be equal to output impedance Z o of the pulse generator.C L = Load capacitance including jig and probe capacitance.R L = Load resistor.S1 = Test selection switch.Fig 14.Load circuitry for measuring switching times V M V Mt Wt W10 %90 %0 VV IV I negative pulsepositive pulse0 VV MV M 90 %10 %t ft r t rt f 001aag732V CC V CCopenGNDV IV osDUTC LR TR LS1PULSE GENERATORV isTable 12.Test dataTestInput OutputS1 positionControl E Address Sn Switch Yn (Z)t r , t f Switch Z (Yn)V I [1]V I [1]V isC L R L t PHL,t PLH GND GND or V CC GND to V CC 6ns 50pF -open t PHZ , t PZH GND to V CC GND to V CC V CC 6ns 50pF , 15pF 1k ΩGND t PLZ , t PZLGND to V CCGND to V CCGND6ns50pF , 15pF1k ΩV CC13.Additional dynamic characteristics[1]Adjust input voltage V is to 0dBm level (0dBm = 1mW into 600Ω).[2]Adjust input voltage V is to 0dBm level at V os for f i =1MHz (0dBm =1mW into 50Ω).After set-up,f i is increased to obtain a reading of −3dB at V os .Table 13.Additional dynamic characteristicsRecommended conditions and typical values; GND = 0V; T amb = 25°C.V is is the input voltage at a Yn or Z terminal, whichever is assigned as an input.V os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.Symbol Parameter ConditionsMin Typ Max UnitTHDtotal harmonic distortionR L = 10k Ω; C L = 50pF; see Figure 15f i = 1kHzV CC = 4.5V; V is(p-p) = 4.0V -0.04-%V CC = 9.0V; V is(p-p) = 8.0V -0.02-%f i = 10kHzV CC = 4.5V; V is(p-p) = 4.0V -0.12-%V CC = 9.0V; V is(p-p) = 8.0V-0.06-%αisoisolation (OFF-state)R L = 600Ω; C L = 50pF; see Figure 16[1]V CC = 4.5V -−50-dB V CC = 9.0V-−50-dB f (-3dB)−3dB frequency responseR L = 50Ω;C L = 10pF; see Figure 17[2]V CC = 4.5V -90-MHz V CC = 9.0V-100-MHz C swswitch capacitanceindependent pins Y -5-pF common pin Z-45-pFFig 15.Test circuit for measuring total harmonic distortion10 µF 001aag736V ILZGNDYnEV osDV CC2R L2R LC LV is f iV CCa.Isolation (OFF-state)b.T est circuitV CC = 4.5V; GND = 0V; R L = 50Ω; R source = 1k Ω.Fig 16.Isolation (OFF-state) as a function of frequency001aae332f i (kHz)10105106104102103−60−40−80−200αiso (dB)−1000.1 µF 001aag737V IHZGNDYnEV os V CC2R L2R LC LV is f idBV CCa.T ypical −3dB frequency responseb.T est circuitV CC = 4.5V; GND = 0V; R L = 50Ω; R source = 1k Ω.Fig 17.−3dB frequency response001aag739f i (kHz)1010510610410210305V os (dB)−50.1 µF 001aag738V ILZdBYnEV os V CC2R L2R LC LV is f iGNDV CC14.Package outlineFig 18.Package outline SOT101-1 (DIP24)UNIT Amax.12b 1c D E e M H L REFERENCESOUTLINE VERSION EUROPEAN PROJECTIONISSUE DATE IEC JEDEC JEITA mm inchesDIMENSIONS (inch dimensions are derived from the original mm dimensions)SOT101-199-12-2703-02-13A min. A max.b w M E e 11.71.30.530.380.320.2332.031.414.113.7 3.93.40.252.5415.2415.8015.2417.1515.90 2.25.10.5140.0660.0510.0210.0150.0130.0091.261.240.560.540.150.130.010.10.60.620.600.680.630.0870.20.020.16051G02MO-015SC-509-24M Hc(e )1M EALs e a t i n g p l a n eA 1w Mb 1eDA 2Z2411312bEpin 1 index0510 mmscaleNote1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.Z max.(1)(1)(1)DIP24: plastic dual in-line package; 24 leads (600 mil)SOT101-1Fig 19.Package outline SOT137-1 (SO24)UNIT Amax.A 1A 2A 3b p c D (1)E (1)(1)e H E L L p Q Zy w v θREFERENCESOUTLINE VERSION EUROPEAN PROJECTIONISSUE DATE IEC JEDEC JEITAmm inches2.650.30.12.452.250.490.360.320.2315.615.27.67.4 1.2710.6510.001.11.00.90.48oo 0.250.1DIMENSIONS (inch dimensions are derived from the original mm dimensions)Note1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.1.10.4SOT137-1X1224w MθAA 1A 2b pDH EL p Qdetail XE Z cLv M A13(A )3Ay0.25 075E05MS-013pin 1 index0.10.0120.0040.0960.0890.0190.0140.0130.0090.610.600.300.290.051.40.0550.4190.3940.0430.0390.0350.0160.010.250.010.0040.0430.0160.01e10510 mmscaleSO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-199-12-2703-02-19Fig 20.Package outline SOT340-1 (SSOP24)UNIT A 1A 2A 3b p c D (1)E (1)(1)e H E L L p Q Z y w v θ REFERENCESOUTLINE VERSION EUROPEAN PROJECTIONISSUE DATE IECJEDEC JEITAmm0.210.051.801.650.380.250.200.098.48.05.45.20.651.257.97.60.90.70.80.480oo 0.130.10.2DIMENSIONS (mm are the original dimensions)Note1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.1.030.63SOT340-1MO-15099-12-2703-02-19Xw MθAA 1A 2b pD H EL p Qdetail XE Z ecLv M A(A )3A11224130.25ypin 1 index0 2.5 5 mmscaleSSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1Amax.2。
课堂演示CD4067功能的电路
课堂演示CD4067功能的电路类别:电子综合阅读:1286笔者用万能实验板,制作了岩石CD4067功能的电路,本电路同时还能演示计数器计数过程和计数脉冲的产生,在课堂教学中效果显著,使学生兴趣大增。
现将电路谨荐给同行,希望有抛砖引玉之效。
CD4067为CMOS 16选1双向模拟开关,可用于数字传输、信号分时处理、多路巡回监测等电路中,与单片机I/0端口挂接,能很方便地实现生产测控。
也可与其他CMOS电路连接成数控网络、多路分配器等,设计出多种实用的电路。
该演示电路由低频脉冲电路、计数器和CD4067导通情况显示电路组成。
参看附图。
低频脉冲电路由NE555,R22,R23,RP,C1等元件组成振荡器,产生计数脉冲。
调整RP可改变脉冲周期,若将RP的阻值调节到最大,脉冲周期可接近Is,学生可以通过闪光,清楚地看到连续输出的脉冲。
若想再增大脉冲周期,可适当增大C1或R23的值。
对于NE55 5振荡电路的工作原理,有关介绍甚多,此不赘述。
计数部分由两块CD4013双D触发器组成,是采用8421编码的异步计数器。
发光二极管LEDр,LEDc,LEDв,LEDд显示计数器即时计数情况LEDo为最高位LEDA为最低位,"1”表示发光,"0"表示熄灭。
计数器依次产生的00001111数码,周而复始地输送到CD4067的数控端。
由于计数过程是16个脉冲为一个周期,计数显示发光二极管闪亮节奏比脉冲输出指示管LEDρ,更慢.学生可以边看边数边理解计数器计数过程。
CD4067的工作电路十分简单,由计数器输出的8421码,与CD4067数控端相对应连接。
CD4067的0-巧通道的输人(输出)端与发光二极管LEDσ-LED⒖各支路对应相连,可以显示CD4067的导通情况。
本电路只设计了一种传输情况下的显示电路,只能显示选择开关S1接地时的电流流向。
S2为禁止开关,拨至高电位,各通道均不导通。
演示全电路工作原理时,把S1、S2都拨至与地相连,外接6V电源从XJ插人,电源指示发光管LED亮,振荡电路开始工作,输出计数脉冲,调节RP,使振荡频率最低,此时LEDO约每秒闪亮尸次,计数器开始计数,发光二极管LEDр,LEDc,LEв、LEDд遵循8421码的原则发光,计数器将编码输送到CD4067数控端,再根据编码顺序,依次接通CD4067的0-15通道,使LEDo-LED13的16只发光二极管依次发光,每只发光管发光时间受计数脉冲控制。
带抗混叠滤波器的高性能、16位、250 MSPS宽带接收机 (CN0227)
电路功能与优势图1所示电路是一款基于超低噪声差分放大器驱动器ADL5562 和16位、250 MSPS模数转换器 AD9467 的宽带接收机前端。
三阶巴特沃兹抗混叠滤波器根据放大器和ADC的性能与接口要求进行优化。
滤波器网络和其它组件引起的总插入损耗仅有1.8 dB。
电路整体的1 dB通带平坦度为152 MHz,。
120 MHz模拟输入下测得的SNR和SFDR分别为72.6 dBFS 和82.2 dBc。
图1. 16位、250 MSPS宽带接收机前端(原理示意图:未显示去耦和所有连接),增益、损耗和信号电平在10 MHz下测量放大回到顶部电路描述该电路接受单端输入,并利用宽带宽(3 GHz) M/A-COM ECT1- 1-13M 1:1变压器将其转换为差分形式。
3.3 GHz差分放大器ADL5562以6 dB的增益工作时,差分输入阻抗为400 Ω;以12 dB的增益工作时,差分输入阻抗为200 Ω。
它还提供15.5 dB的增益选项。
ADL5562是AD9467的理想驱动器,经过低通滤波器一直到ADC的全差分架构可提供良好的高频共模抑制性能,并能使二阶失真产物最小。
根据输入连接的不同,ADL5562提供6 dB或12 dB的增益。
本电路使用6 dB的增益来补偿滤波器网络和变压器的插入损耗(约1.8 dB),总信号增益为3.9 dB。
+6.0 dBm的输入信号在ADC输入端产生2 V p-p满量程差分信号。
抗混叠滤波器是采用标准滤波器设计程序设计的三阶巴特沃兹滤波器。
选择巴特沃兹滤波器的原因是它能在通带内提供平坦的响应。
三阶滤波器产生的交流噪声带宽比为1.05,可以借助多款免费滤波器程序进行设计,例如Nuhertz Technologies Filter Free (www.nuhertz/filter)或Quite Universal Circuit Simulator (Qucs) Free Simulation()等。
CD4069逻辑功能及引脚介绍
CD4069逻辑功能及引脚如图2a所示,其中非门F1、F2和外接电阻R2、R3、电容C4构成多谐振荡器,产生约3Hz的脉冲方波,供给CD4017作计数脉冲和CD40174作移位脉冲。
R3、C4为振荡定时元件,调节这两个元件可改变振荡信号频率,从而控制彩灯色彩的流动速度,以呈现各种不同的视觉效果。
另外,CD4069的非门3还用作CD40174复位信号的倒相器。
CD4069为CMOS数字集成电路,是一种高输入阻抗器件,容易受外界干扰造成逻辑混乱或出现感应静电而击穿场效应管的栅极。
虽然器件内部输入端设置了保护电路,但它们吸收瞬变能量有限,过大的瞬变信号和过高的静电电压将使保护电路失去作用,因此,CD4069中未使用的非门F4、F5、F6的输入端{9}、{11}、{13}脚均接到Vss接地端,以作保护。
CD4069多谐振荡器输出端{4}脚送出的脉冲串,一路直接送入CD4017的计数脉冲输入端{14}脚。
CD4017为十进制计数/时序分配器,用于产生CD4066模拟开关切换的控制信号。
其引脚功能如图2b所示。
Cr为复位端,当Cr端输入高电平时、计数器置零态。
CD4017具有自动启动功能,即在电路进入无效状态时,在计数脉冲作用下,最多经过两个时钟周期就能回到正常循环圈中,因此本控制器的CD4017未设置加电复位电路。
Co为进位输出端,当计数满10个时钟脉冲时输出一个正脉冲。
CD4017有CL和EN两个计数输入端,CL端为脉冲上升沿触发端,若计数脉冲从CL端输入,则EN端应接低电平;EN端为脉冲下降沿触发端,若计数脉冲从EN端输入,则CL端应接高电平,否则禁止输入计数脉冲。
取自CD4069的计数脉冲从其CL端{14}脚输入,故EN端{13}脚接地。
Y0~Y9为计数器的十个输出端,输出端送出的脉冲方波通过隔离二极管VD3~VD12连接成两路控制信号,加到模拟开关CD4066。
当第一个计数脉冲到来时,CD4017内电路翻转,{3}脚Y0呈高电平,经二极管VD5加到CD4066{12}脚。
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The CD4067B and CD4097B types are suppliedin 24-lead hermetic dual-in-line ceramicpackages (F3A suffix), 24-lead dual-in-lineplastic packages (E suffix), 24-leadsmall-outline packages (M, M96, and NSRsuffixes), and 24-lead thin shrink small-outlinepackages (P and PWR suffixes).Copyright© 2003, Texas Instruments IncorporatedPACKAGING INFORMATIONAddendum-Page 1(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check /productcontent for the latest availability information and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.Addendum-Page 2In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.OTHER QUALIFIED VERSIONS OF CD4067B, CD4067B-MIL, CD4097B, CD4097B-MIL :•Catalog: CD4067B, CD4097B•Military: CD4067B-MIL, CD4097B-MILNOTE: Qualified Version Definitions:•Catalog - TI's standard catalog product•Military - QML certified for Military and Defense ApplicationsAddendum-Page 3TAPE AND REELINFORMATION *Alldimensions are nominal Device Package Type Package DrawingPinsSPQ Reel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant CD4067BM96SOICDW 242000330.024.410.7515.7 2.712.024.0Q1CD4067BM96SOICDW 242000330.024.410.7515.7 2.712.024.0Q1CD4067BM96G4SOICDW 242000330.024.410.7515.7 2.712.024.0Q1CD4067BPWR TSSOPPW 242000330.016.4 6.958.3 1.68.016.0Q1CD4097BPWR TSSOP PW 242000330.016.4 6.958.3 1.68.016.0Q1PACKAGE MATERIALS INFORMATION 24-Oct-2014Pack Materials-Page 1*All dimensionsare nominal DevicePackage Type Package Drawing Pins SPQ Length (mm)Width (mm)Height (mm)CD4067BM96SOIC DW 242000366.0364.050.0CD4067BM96SOIC DW 242000367.0367.045.0CD4067BM96G4SOIC DW 242000367.0367.045.0CD4067BPWRTSSOP PW 242000367.0367.038.0CD4097BPWR TSSOP PW 242000367.0367.038.0PACKAGE MATERIALS INFORMATION 24-Oct-2014Pack Materials-Page 2IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,enhancements,improvements and other changes to its semiconductor products and services per JESD46,latest issue,and to discontinue any product or service per JESD48,latest issue.Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All semiconductor products(also referred to herein as“components”)are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its components to the specifications applicable at the time of sale,in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by applicable law,testing of all parameters of each component is not necessarily performed.TI assumes no liability for applications assistance or the design of Buyers’products.Buyers are responsible for their products and applications using TI components.To minimize the risks associated with Buyers’products and applications,Buyers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any patent right,copyright,mask work right,or other intellectual property right relating to any combination,machine,or process in which TI components or services are rmation published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI.Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.TI is not responsible or liable for such altered rmation of third parties may be subject to additional restrictions.Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. 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