电源设计技术(线性电源及buck电源设计基础)

Thermal Considerations
• Getting The Heat Out
– – – – Power dissipation Surface mount or through-hole? Selecting external heatsinks Surface mounting
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Thermal Considerations
• Power Dissipation
– Worst case:
PD V IN ( MAX
)
V OUT
( MIN )
I
OUT ( MAX )
• Calculating required heatsink thermal impedance:
I OUT t V DROOP
C BULK
(min)
• VINST and VDROOP can be met using parallel combinations of capacitors if needed
Selecting COUT & CBYP
• Stability
– COUT is required for stability, since it forms a part of the LDO frequency compensation – Good quality, low ESR capacitors should be used, such as Al electrolytic or tantalum – Adding CBYP reduces phase margin, hence increasing minimum capacitance required
T A ( MAX PD
)

R TH ( J C ) R TH ( C S )
• RTH(C-S) varies depending upon the medium between the LDO and the heatsink (grease, insulator, bare metal, anodizing), mounting pressure (clips, screws), etc • RTH(S-A) depends primarily upon heatsink surface area and air flow
Setting VOUT
V IN PASS D E V IC E VO UT R1 V RE F E RRO R A M P R2
“Floating” References
R2 V OUT V REF 1 I REF R 2 R1
IREF (typ. ~50µA) term usually negligible Can select R1 such that
• Dropout = 0.6 ~ 0.8V max.
– NPN VCE(SAT)
V IN 2 (> V IN 1 )
• Low quiescent current
V IN 1
VO UT
– Nearly all drive current flows into load Ideal for 3.3V to 2.5V Needs a second, higher input for drive A minimum load current is required for regulation Can be met using the resistor feedback chain
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P-Channel MOSFET
• Low dropout
V IN VO UT
– IO x RDS(ON)
• Very low quiescent current
– Nearly independent of output current since FET is voltage driven
+ E RRO R AM P V RE F
• No charge pump response time issues • Limited VGS limits RDS(ON), hence current rating
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Electrical Design
Selecting COUT
• VDROOP is determined by the bulk capacitance:
V DROOP I OUT t C BULK
– t = LDO response time, usually < 250ns – Rearranging gives us the minimum bulk capacitance required:
(1) Both examples based upon TA = 70° C, TJ = 125 ° C
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Selecting External Heatsinks
• Remembering that
R TH ( S A )
T
J ( MAX )
– Example 1: TO-263 packages limited to approximately 2~2.5W - above that a TO-220 plus a heatsink will be required(1) – Example 2: SOT-223 packages limited to approximately 1.25~1.5W - above that the larger TO-263 will be required(1)
• CBYP is connected from the adjust pin to ground to improve ripple rejection & transient response • For NPN LDOs, at the ripple frequency, set the impedance of CBYP = R1 for optimal performance
T
J ( MAX )
PD – Where TJ(MAX) & RTH(J-C) come from the device data sheet, RTH(C-S) from the heatsink data and TA(MAX) from the system requirements – Surface Mount or Through-Hole?
• Careful thermal design required • At higher power levels, heatsinks take up space and add to cost • Heat effect on system
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LDO Pros and Cons
• LDO Advantages
– No switching noise – Simple to use – Low cost
• LDO Disadvantages
– Low efficiency = VOUT / VIN
• Dropout = 1.3V max.
– PNP VCE(SAT) + NPN VBE
• Low quiescent current
– Nearly all drive current flows into load
V IN
VO UT
V c e ( s a t)
Vbe
+ E RRO R A M P V RE F
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Selecting COUT
• A minimum capacitance is usually required by the LDO for stability • Minimum capacitance value and maximum ESR for application is defined by the maximum allowable change in output voltage
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An LDO Primer
• Types Of Low Dropout Regulator
– – – – – NPN NPN with dual inputs PNP NMOS PMOS
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NPN Based LDO
+ V RE F
E RRO R A M P
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PNP Based LDO
• Dropout = 0.2 ~ 0.3V
– PNP VCE(SAT)
• Ideal for battery powered systems where headroom is low • High quiescent (ground pin) current in dropout
– Nearly independent of output current since FET is voltage driven
+ E RRO R A M P V RE F