EFM32外设模块—LESENSE V1.00
EFM32外设模块—OPAMP V1.10
目录1. 适用范围................................................................................. 错误！未定义书签。
2. 原理概述................................................................................. 错误！未定义书签。
3. 开发环境................................................................................. 错误！未定义书签。
4. 技术实现................................................................................. 错误！未定义书签。
5. 参考资料................................................................................. 错误！未定义书签。
6. 免责声明................................................................................. 错误！未定义书签。
1. 概述运算放大器（Operational Amplifier，简称OPAMP）是EFM32系列微控制器片上模拟外设，经过恰当地选取外部元件，它能够实现各种模拟运算，如放大、加、减、微分和积分等。
EFM32芯片内拥有三个运算放大器（Gecko系列芯片内部没有运算放大器），分别为OPA0、OPA1和OPA2。
其中OPA0和OPA1是DAC模块的一部分，OPA2为独立的运算放大器。
OPAMP模块框图如图1.1所示。
图1.1 OPAMP模块框图这三个运算放大器可以相互配合并通过搭配合适的外部电路和内部反馈满足复杂的应用需求。
EFM32 ZG 微控制器产品说明书
V
0.8VDD
V
0.25VDD
0.3VDD
V
0.05VDD
0.2VDD
V
0.3VDD
0.35VDD
V
0.1VDD
0.25VDD
V
±25
±0.1
±100
nA
0.8
1.5
0.7
1.75
kHz
10Βιβλιοθήκη 0mVW7206F2 Silicon Labs Bulletin rev H The information contained in this document is PROPRIETARY to Silicon Laboratories, Inc. and shall not be reproduced or used in part or whole without Silicon Laboratories’ written consent. The document is uncontrolled if printed or electronically saved. Pg 4
This change is considered a minor change which does not affect form, fit, function, quality, or reliability. The information is being provided as a customer courtesy.
See Table 1 at the end of this document for additional details.
The reference manual has also been changed to reflect the updated operating voltage range and current consumption information.
EFM32外设模块—GPIO V1.10
目录1. 概述 (1)2. FAQ (2)2.1 GPIO功能描述 (2)2.2 GPIO功能结构 (2)2.3 GPIO寄存器配置 (2)2.4 GPIO中断配置 (3)2.5 GPIO的低功耗特点 (4)3. 实验指导 (5)3.1 实验目的 (5)3.2 实验设备 (5)3.3 实验内容 (5)3.4 试验步骤 (5)3.5 实验参考程序 (5)3.6 实验结果 (7)4. 免责声明 (8)1. 概述通用输入输出(General Purpose Input/Output，简称GPIO)是EFM32片上的通用引脚输入和输出接口外设，其能够提供灵活的引脚功能配置，同时也是片上外设对外的接口。
其主要特点如下：z最多93个GPIO引脚；z引脚配置；上拉/下拉电阻；输入/输出使能；输出驱动能力(0.5 / 2 / 6 / 20 mA)；输入滤波器。
z16个异步外部中断；z片上外设引脚重映射；z最多6个引脚支持从EM4唤醒。
2. FAQ2.1 GPIO功能描述1. GPIO的主要作用有哪些？A：通用输入输出(General Purpose Input/Output，GPIO)是通用引脚输入和输出接口，其能够提供灵活的引脚功能配置，同时也是片上外设对外的接口。
GPIO还具有从EM4模式中唤醒功能。
2. 怎样利用与GPIO相关的emlib库函数？A：首先将em_gpio.c文件加入工程中，然后在需要调用与GPIO相关的emlib库函数的源文件中添加如程序清单2.1所示的预编译代码。
程序清单2.1 GPIO头文件#include "em_gpio.h"2.2 GPIO功能结构1. EFM32系列的GPIO管脚是如何命名的？A：EFM32系列MCU的引脚组织为每个端口16个引脚，每个独立的GPIO引脚命名为Pxn，x表示端口号(A，B，C…)，n表示引脚号(0，1，…，15)。
2. 复位后GPIO处于何种状态？A：复位后，除了调试引脚外（对于EFM32系列微控制器来说，一共有3个调试引脚，分别为：SWCLK、SWDIO和SWV。
EFM32外设模块—WDOG V1.00
产品应用笔记
©2012 Guangzhou ZLG MCU Technology Co., Ltd. 1
广州周立功单片机科技有限公司
WDOG
EFM32 系列微控制器
2. FAQ
1. 怎样使用与看门狗定时器相关的 emlib 库函数？ A：首先将 em_wdog.c 文件加入工程中，然后在需要调用与看门狗定时器相关的 emlib 库函数的源文件中添加如所示的预编译代码。
程序清单 3.2 主函数
int main (void) {
INT32U ulResetCause;
CHIP_Init();
ulResetCause = RMU_ResetCauseGet(); RMU_ResetCauseClear();
/* 获取 RMU_RSTCAUSE 寄存器的值 */
/* 清除复位事件标志
/*
* 看门狗定时器配置结构体，在使用看门狗时该结构体有用
*/
WDOG_Init_TypeDef tWdogInit = {
.enable = true, .debugRun = false, .em2Run = true,
/* 使能看门狗
*/
/* 看门狗在调试时不计数
*/
/* 在 EM2 模式看门狗继续计数
EFM32 片上看门狗定时器可选的时钟源包括内部 32.768kHz RC 振荡器、内部 1kHz RC 振荡器和 32.768kHz 外部晶体振荡器。不同于一般 MCU 的看门狗定时器，EFM32 片上看门 狗定时器不是通过配置计数器顶端值等操作确定看门狗溢出周期，而是从给定的溢出周期选 项中选择看门狗定时器溢出周期，溢出周期可选范围为 9~256k 个看门狗模块时钟周期。
EFM32 I2C模块操作指南说明书
...the world's most energy friendly microcontrollersI2C Master and Slave OperationAN0011 - Application NoteIntroductionThe EFM32 I2C module allows simple, robust and cost effective communicationbetween integrated circuits using only one data and one clock line.This application note demonstrates how to use the EFM32 I2C module to talk to anI2C temperature sensor. It also includes a software example where two EFM32s are connected; each EFM32 will operate in either slave or master mode and talk to theother one.This application note includes:•This PDF document•Source files (zip)•Example C-code•Multiple IDE projects1 I2C Theory1.1 GeneralThe I2C allows connection of up to 128 individually addressable devices using only two bi-directional lines: clock (SCL) and data (SDA). The only additional hardware required is a pull-up resistor for each of the lines. Each of the connected devices can be either a master or slave device. Only master devices are allowed to drive the clock line.The I2C protocol and the EFM32 I2C module feature several mechanisms for handling bus conflicts and contention. A possible I2C connection scheme is illustrated in Figure 1.1 (p. 2) .Figure 1.1. I2C BuspS DAS CLAt the physical layer both SCL and SCA lines are in open-drain, hence the pull-up resistors. Increasing the number of devices on the I2C bus will also increase the line capacitance and thus reduce the slew-rate. The slew-rate can be controlled by changing the drive strength in the GPIO module for the I2C pins. The size of the pull-up resistors can be calculated as a function of the maximum rise time allowed for the given bus speed and the estimated bus capacitance Cb as shown in Equation 1.1 (p. 2)Pull-up Resistor EquationRp(max) = tr/0.8473 x Cb(1.1)The maximal rise times for 100 kHz, 400 kHz and 1 MHz I2C are 1 µs, 300 ns and 120 ns respectively.1.2 I2C Signals/FramesSTART and STOP conditions are used to initiate and stop transactions on the I2C-bus. All transactions on the bus begin with a START condition (S) and end with a STOP condition (P). As illustrated in Figure 1.2 (p. 3) , a START condition is generated by pulling the SDA line low while SCL is high, and a STOP condition is generated by pulling the SDA line high while SCL is high.Also illustrated in Figure 1.2 (p. 3) is I2C bit transfer. Note that data must be stable for the whole duration of the SCL high period.Figure 1.2. Start, Stop and DataS CLS DAS P S TART condition S TOP condition S CLS DAData stableData changeallowed Data changeallowedI2C S tart and S top I2C Bit transferA master initiates a transfer by sending a START followed by the address of the slave it wishes to contactand a single R/W bit telling whether it wishes to read from (R/W = 1) or write to the slave (R/W = 0).After the 7-bit address and the R/W bit, the master releases the bus, allowing the slave to acknowledge the request. During the next bit-period, the slave pulls SDA low (ACK) if it acknowledges the request, or keeps it high if it does not acknowledge it (NACK). Following the address acknowledge, either the slave or master transmits data, depending on the value of the R/W bit. After every 8-bit byte transmitted on the SDA line, the transmitter releases the line to allow the receiver to transmit an ACK or a NACK. Both the data and the address are transmitted with the most significant bit first.The master ends the transmission after a (N)ACK by sending a STOP condition on the bus. After a STOP condition, any master can initiate a new transfer.An example of a master writing to a slave is shown in Figure 1.3 (p. 3) . The identifiers used are: S - Start bit, ADDR - Address, W - Write(0), A - ACK, N - NACK, DATA - Data, P - Stop bit.Figure 1.3. Master Write to SlaveFor further details about I2C and the EFM32 I2C module, please see the EFM32 reference guide. 1.3 ArbitrationAs the I2C bus is a multi-master bus it is possible that two devices initiate a transfer at the exact same time (e.g. RTC tick). When this happens the first device attempting to transmit a logical 1 while another device transmits a logical 0 will lose arbitration. The device attempting to transmit 1 will detect that the line is low when it should actually be high so assumes that another master is active and immediately stops its transfer. This device will then wait until the next STOP condition before trying to transmit again.1.4 Clock stretchingAn addressed slave device may hold the clock line (SCL) low after receiving (or sending) a byte, indicating that it is not yet ready to process more data. The master communicating with the slave will try to raise the clock to transfer the next bit but will verify that the clock line will remain low. The master will then have to wait for the slave to release the line so that the clock signal can be transmitted. If a master wants to slow down the rate of data transfer it just delays the next clock edge.2 Software Examples2.1 Master Operation with InterruptsThis software example uses the efm32_i2c library to read a DS75 digital thermometer mounted on the EFM32_G890_DK development kit. The tempsens driver includes an interrupt routine to demonstrate how to use the efm32_i2c library in interrupt driven mode.2.1.1 Program FlowThe EFM32 reads the temperature sensor every 2 seconds and stays in a low power mode between measurements. The measurement results are converted to either Celsius or Fahrenheit and displayed on the segment LCD.The efm32_i2c library can be used both in polled and interrupt driven mode. This example uses the interrupt driven approach, but still has a while loop which blocks the function reading the temperature until the transfer is finished. The I2C interrupt routine is entered every time the I2C module generates an interrupt, then it is up to the state machine in the efm32_i2c library to handle and clear the active interrupt flags.Interrupts are generated every time the I2C-peripheral is finished with an autonomous task, or when it detects fault conditions which should be handled by software. Not all possible interrupts are handled or used by this code example.2.1.2 ConnectionsThe software example is specifically made for the development kit and includes the board support package to enable the correct connections and initialize the temperature sensor from software.2.2 Master and Slave OperationThis software example makes the EFM32 operate in both master and slave configuration. Two EFM32 I2C modules are connected and set up to both transmit (master mode) and receive data between each other (slave mode) using a common I2C bus.The code example included is written for the EFM32_Gxxx_DK development kit, but is easily ported to any EFM32 part with an I2C-peripheral.2.2.1 Program FlowEach EFM32 has enabled I2C address match interrupt and Real Time Counter (RTC) interrupt. Both these interrupts are capable of waking up the EFM32 from Deep Sleep mode (EM2), hence the idle state current consumption is extremely low.The I2C is continuously monitoring the I2C line. If a start condition followed by the I2Cs defined address, an address match interrupt is issued and data is received until a stop condition is detected.The Real Time Counter (RTC) is set to wake up the EFM32 regularly. If a reception is not in progress at the time of wake-up, a master transmission is initiated. The address match interrupt is disabled during the transmission and re-enabled afterwards.The operation is illustrated in the state diagram shown in Figure 2.1 (p. 5)Figure 2.1. Program state machineDuring transmission, the PC0 pin is set in order to determine transfer direction for example by using a logic analyzer. On the starter kit, this pin is connected to LED0, which is lit during transmission.Please refer to the source code for further details.2.2.2 ConnectionsThe software example uses location 1 for the SCL (PD7) and SDA (PD6) pins. Connect the PD6 pins and the PD7 pins of the EFM32s, respectively. The configuration is illustrated in Figure 2.2 (p. 5) Figure 2.2. ConnectionIn the GPIO module of the EFM32 the pull-up resistors have been enabled, hence external pull-up resistors are not necessary to make the example work. However, external resistors are generally preferable as they keep the lines defined at all times. For example, when the EFM32 is in reset-state, the pull-up configuration in the GPIO module is not available, which leaves the I2C bus undefined.3 Revision History3.1 Revision 1.062013-09-03New cover layout3.2 Revision 1.052013-05-08Added software projects for ARM-GCC and Atollic TrueStudio.3.3 Revision 1.042012-11-12Adapted software projects to new kit-driver and bsp structure.3.4 Revision 1.032012-04-20Adapted software projects to new peripheral library naming and CMSIS_V3.3.5 Revision 1.022012-03-22Added description on slew rate control.Added arbitration and clock stretching sections (1.3 and 1.4).Added a software example with interrupt driven master operation.Changed name of application note.3.6 Revision 1.0116-11-2010Removed clearing of RXDATAV interrupt flag through I2C_IFC since this operation is ignored.Changed example folder structure, removed build and src folders.Added chip-init function.3.7 Revision 1.0020-09-2010.Initial revision.A Disclaimer and TrademarksA.1 DisclaimerSilicon Laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Laboratories reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Silicon Laboratories shall have no liability for the consequences of use of the information supplied herein. This document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. The products must not be used within any Life Support System without the specific written consent of Silicon Laboratories.A "Life Support System" is any product or system intended to support or sustain life and/or health, which,if it fails, can be reasonably expected to result in significant personal injury or death. Silicon Laboratories products are generally not intended for military applications. Silicon Laboratories products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons.A.2 Trademark InformationSilicon Laboratories Inc., Silicon Laboratories, the Silicon Labs logo, Energy Micro, EFM, EFM32, EFR, logo and combinations thereof, and others are the registered trademarks or trademarks of Silicon Laboratories Inc. ARM, CORTEX, Cortex-M3 and THUMB are trademarks or registered trademarks of ARM Holdings. Keil is a registered trademark of ARM Limited. All other products or brand names mentioned herein are trademarks of their respective holders.B Contact InformationSilicon Laboratories Inc.400 West Cesar ChavezAustin, TX 78701Please visit the Silicon Labs Technical Support web page:/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request.Table of Contents1. I2C Theory (2)1.1. General (2)1.2. I2C Signals/Frames (2)1.3. Arbitration (3)1.4. Clock stretching (3)2. Software Examples (4)2.1. Master Operation with Interrupts (4)2.2. Master and Slave Operation (4)3. Revision History (6)3.1. Revision 1.06 (6)3.2. Revision 1.05 (6)3.3. Revision 1.04 (6)3.4. Revision 1.03 (6)3.5. Revision 1.02 (6)3.6. Revision 1.01 (6)3.7. Revision 1.00 (6)A. Disclaimer and Trademarks (7)A.1. Disclaimer (7)A.2. Trademark Information (7)B. Contact Information (8)B.1. (8)List of Figures1.1. I2C Bus (2)1.2. Start, Stop and Data (3)1.3. Master Write to Slave (3)2.1. Program state machine (5)2.2. Connection (5)...the world's most energy friendly microcontrollers List of Equations1.1. Pull-up Resistor Equation (2)。
EFM32外设模块—LCD V1.00
目录1. 概述 (1)2. FAQ (2)3. 实验指导 (3)3.1 实验目的 (3)3.2 实验设备 (3)3.3 实验内容 (3)3.4 试验步骤 (3)3.5 实验参考程序 (3)3.6 实验结果 (4)4. 免责声明 (6)1. 概述液晶显示驱动(Liquid Crystal Display Driver，简称LCD)是EFM32片上的低功耗外设，其能够直接驱动段式液晶实现图形显示，并能够工作于EM0~EM2模式下，在EM2模式下工作时其最低功耗小于900nA。
EFM32片上LCD模块具有升压功能，其能够在电压低至2.0V时将电压升压至3.6V，即使在电池供电应用中当其电压不足时也能够让LCD正常显示。
同时为了更好的适应不同的液晶面板和外部环境变化，LCD模块可以根据实际应用调节显示对比度，使得LCD模块的应用更加灵活；并且LCD模块还具备动画、闪烁等特性，让LCD能够在不需要CPU干预的情况下即可完成动画显示和闪烁功能，因此MCU可以长时间处于低功耗模式，降低系统功耗。
2. FAQ1. LCD的供电方式有哪些？A：LCD供电可以选择内部V DD或是外部电源/V BOOST供电。
当使用V BOOST功能时，需要在LCD_BEXT引脚连接一个1μF的电容到地，并在LCD_BCAP_P和LCD_BCAP_N引脚之间加一个22nF的电容。
根据实际需求，LCD模块的升压功能可以将LCD电压升压至3.0～3.6V。
2. 如何使能或禁能LCD模块的V boost功能？A：LCD模块V boost功能的使能或禁能位于CMU模块中，通过配置CMU_LCDCTRL 寄存器中VBOOSTEN位可实现V boost功能的使能或禁能，该位置0则禁能，置1则使能。
3. LCD调节对比的目的是什么？A：不同LCD面板之间它们的特性略有不同，即使是同一LCD面板在不同的温度下其特性也会发生变化。
当由于某种因素导致控制LCD显示的电压与LCD面板当前的显示阀值电压过于接近时候会产生重影或者显示异常等现象，此时可以通过调节LCD对比度让控制LCD显示的电压与当前LCD面板的显示阈值电压之差变大的方式解决上述问题。
EFM32外设模块—LEUART V1.10
广州周立功单片机科技有限公司
LEUART
EFM32 系列微控制器
目录
1. 概述...........................................................................................................................1
广州周立功单片机科技有限公司
LEUART
EFM32 系列微控制器
检查串口调试助手设置的波特率。
b）LEUART 的时钟精度不够高。对于 EFM32 来说，LEUART 的时钟源可能来自于内 部 RC 振荡器和外部的晶体谐振器。内部 RC 振荡器起震快功耗小但是精度低，而外部晶体 谐振器起震较慢功耗较大但是精度高。所以，为了保证通信的质量，在使用 Energy Micro 的 LEUART 时，一般会使用外部晶体振荡器。
2.2 LEUART 寄存器配置
1. 如何正确使用 RXDATA、RXDATAX、RXDATAXP 寄存器？ A：它们都是接收数据寄存器；其中 RXDATAX、RXDATAXP 还包含状态信息。这些 状态信息主要包括：
EFM32外设模块—AES V1.00
产品应用笔记
©2012 Guangzhou ZLG MCU Technology Co., Ltd. 1
广州周立功单片机科技有限公司
AES
EFM32 系列微控制器
2. FAQ
2.1 基本功能
1. AES 有哪 5 种加密模式？ A：AES 加密最基本的方式是 ECB，以 ECB 模式为基础，通过不同数据块的异或处理，
3.3 实验内容
本实验主要演示利用 EFM32 片上 AES 实现 ECB 加解密。 实验例程利用 ECB 加解密方式对预定明文进行加密和解密实验，解密完成后通过对比 解密结果和原始明文验证加解密操作的正确性。
3.4 试验步骤
1) 连接开发板 USB 端口到电脑的 USB 端口，打开 MCU 电源； 2) 打开 Keil（或 IAR）工程，重新编译并调试运行； 3) 单步运行完加密函数段后查看加密结果； 4) 单步运行完解密函数段后查看解密结果并比对原始明文。
3.4
试验步骤 ................................................................................................................... 3
3.5
实验参考程序 ........................................................................................................... 3
产生不同的加密模式，共有如下 5 种加密模式。 1) ECB 模式：将明文分割成几个 128 位的数据块，利用密钥对每个数据块进行加密 和解密。加密或解密后的结果大小完全不变，而且独立，互相之间不关联，便于并 行运算； 2) CBC 模式：建立在 ECB 模式上使用的一种加密方法。CBC 算法中，每个明文块先 与前面的秘文块相异或，然后再加密。加密的数据相互关联，不能并行处理，但破 解的难读很大； 3) CFB 模式：密钥先与前一个密文块加密，之后再与当前明文块取异或。每个密文 块都与后面的步骤紧密相连，任何一个密文块损坏，都无法完成解密； 4) OFB 模式：与 CFB 的区别在于，OFB 模式下密钥与前一块加密的结果加密； 5) CTR 模式：一种用明文块与一个计数器密码和一个初始化向量的值进行异或运算 的方法。这种方法的价值在于，只要知道数据块所在的位置，就可以对任何一个明 文块进行解密。
Silicon Labs EFM32微控制器系列产品说明书
...the world's most energy friendly microcontrollersLow Energy UARTAN0017 - Application NoteIntroductionThis application note demonstrates how to use the Low Energy UART (LEUART™)module on the EFM32 microcontrollers. The LEUART is able to run full UART communication even when the device is in deep sleep mode EM2. Together withintelligent interrupt functions and flexible DMA integration, this enables simple andenergy friendly communication .This application note includes:•This PDF document•Source files (zip)•Example C-code•Multiple IDE projects1 LEUART Theory1.1 General theoryThe EFM32 LEUART is a unique Low Energy UART that offers two-way communication on a very strict power budget. Only a 32.768 kHz clock source is needed to allow UART communication up to 9600 baud/ s. This means that the EFM32 LEUART can operate in deep sleep mode EM2, and wait for an incoming UART frame while consuming extremely little energy. When a UART frame is completely received by the LEUART, the CPU can quickly be woken up. Alternatively, multiple frames can be transferred to memory by the DMA before waking up the CPU. The EFM32 LEUART also incorporates functionality to handle higher level communication protocols, e.g. the option to block incoming frames until a configurable start frame is detected, and to detect a configurable signal frame (to indicate e.g. the end of a transmission). In the same way as received, data can be transmitted in EM2 either on frame by frame basis with data directly from the CPU, or in larger groups of frames trough the DMA. The EFM32 LEUART includes all needed hardware support to make asynchronous serial communication possible with minimum software interference, while consuming extremely small amounts of energy.The advantage of the LEUART is the ability to operate in EM2, while most other modules are turned off for energy conservation. The option to enable low energy serial communication, in combination with the DMA's ability to read and write from memory without CPU intervention, offers wide functionality for system designers using the EFM32 in low energy applications.Figure 1.1. LEUART two link full duplex connection2 LEUART Configuration2.1 Frames, Transmission & ParityThe LEUART relates to frames for data transmission. A LEUART frame consists of a start bit, 8 or 9 data bits, an optional parity bit, and 1 or 2 stop bits (Figure 2.1 (p. 3) ). A transmission is initiated by a start bit that pulls the line down from its idle high state. After that the data and parity bits are sent sequentially until the frame transmission is ended by the stop bits that holds the line high. Then the line either enters its high idle state, or a new start bit is sent. Technically, when a frame is ready to be transmitted, it is transferred from the transmit register to a shift register where the bits are sent one by one, least significant bit first. The entire frame format can be inverted, to e.g. allow use of low idle state. The parity bit at the end of the data transmission is an optional method for light error detection. Three different parity modes are available: that is no parity, even parity and odd parity. All parity generation and checking are done in hardware, and interrupt flags are available to indicate if parity error in the frame is detected. The frame format wanted is set during initialization of the selected LEUART. The emlib offers a initialization function that defines all the necessary settings to start communication using the LEUART. All parties of the communication channel must agree on the frame format for communication to be possible. For more extensive information on the LEUART registers and opportunities, refer to the reference manual for the device.Figure 2.1. LEUART frame formatS0*******[8]S top S tart or idleS top or idle[P]2.2 Clock SourcesThe LEUART, like other LE peripherals in the EFM32 microcontrollers, can be driven by three different clock sources, the Low Frequency RF Oscillator (LFRCO), the Low Frequency Crystal Oscillator (LFXO) and the High Frequency Core Clock divided by 2 (HFCORECLK_LE/2). The HFCORECLK_LE can in turn be driven by either the High Frequency RC Oscillator (HFRCO), High Frequency Crystal Oscillator (HFXO) or even any of the LF oscillators mentioned. This flexibility in assigning clocks, gives the system designer a wide range of possibilities for using the LEUART features. This means that beside running on a LF clock source during low energy operation in EM2, the LEUART can also be utilized as a supplement to the UART when more UART communication channels are needed. However for the LEUART to achieve baud rates above 9600 baud/s, the chosen clock source must be the HFCORECLK_LE/2 which is only available in EM1-EM0.2.3 Baud ratesThe selected LEUART clock source defines the baud rates that are obtainable through the LEUART. In standard Low Energy operation, the LEUART offers baud rates between 300 to 9600 baud/s on a 32.768 kHz clock. For details on which baud rates are supported, refer to the reference manual for the device. The emlib also includes methods for calculating which baud rates are available, extracting the current baud rate, and setting the baud rate. With the HFCORECLK_LE/2 selected as th LEUART clock source, higher baud rates are obtainable, but this also implies that the LEUART it will not operate below EM1 and more energy is needed. In addition, since one of the HF clock need to be running, both the UART and USART are also available.2.4 DMA IntegrationThe LEUART has full DMA support even in EM2. In integration with the LEUART, the DMA is a very powerful tool to minimize the need for CPU interference.•The LEUART can be configured to request DMA for data either when the transmit buffer is empty or if both the transmit buffer and the shift register are empty.•The LEUART can be configured to request the DMA to read when the receive buffer is full.•When a frame of parity error is detected in the receive register, the ERRSDMA bit in the LEUARTn_CTRL register can be set to omit the read request to the DMA.When operating in EM2, the DMA controller must be powered up in order to perform the transfer. This is automatically performed for read operations if RXDMAWU in LEUARTn_CTRL is set and for write operations if TXDMAWU in LEUARTn_CTRL is set. To make sure the DMA controller still transfers bits to and from the LEUART in low energy modes, these bits must be configured accordingly. In EM2 the DMA runs off the HFRCO which is also woken up and shut off automatically. The DMA must also be enabled and configured correctly to handle the LEUART data. For more information on how to initialize an interaction between the LEUART and DMA, see the supplied software examples and the reference manual for the device.2.5 Pulse Generator and ExtenderThe LEUART has an optional pulse generator for the transmitter output, and a pulse extender on the receiver input. It will change the input and output format of the LEUART from NRZ to RZI. The width of the pulses from the pulse generator can be configured from 31.25 µs to 500 µs. At 2400 baud/s or lower, the pulse generator is also able to generate RZI pulses compatible with the IrDA physical layer specification.2.6 InterruptsA wide variety of interrupts are available, both during receive and transmit, to support the low energy advantages of interrupt driven applications. An interrupt can be triggered when the receive or transmit registers are empty, or if any errors are detected during transmit. Also there is the ability for the LEUART to trigger an interrupts when specific configurable frames are detected. This allows the construction of higher level communication protocols on top of the LEUART. A special multi processor mode is even available to enable individual addressing and trigger only the desired MCU to receive and act on the data sent. This is a useful feature in systems where multiple UART ICs are communicating on the same channel. In this way the desired receiver can be addressed by starting and ending the transmission with certain frames that will only trigger an interrupt in the desired receiver. In the software examples supplied, the Signal Frame Interrupt functionality is used to wake the CPU only when a specific frame is detected. All other frames are loaded into the memory by the DMA and do not generate any response from the CPU until the preconfigured Signal Frame is detected by the LEUART.2.7 Freeze Mode and LF Domain SynchronisationSynchronization into the low frequency (LF) domain is necessary to modify some of the LEUART registers. To avoid unnecessary stalling when multiple registers are to be modified, all register writes should be done inside a block initiated by void LEUART_FreezeEnable(LEUART_TypeDef *leuart, bool enable) where enable is set true, and ended by the same function call where enable is set false. In this way all register modifications will be performed during a single synchronisation. See the reference manual for the device for more information on accessing and modifying asynchronous registers.2.8 Half-Duplex OperationThe LEUART offers an option to locally loopback the transmitted data to the receive pin. This is useful for debugging, as the LEUART can receive the data it transmits, but it is also used to allow the LEUART to read and write to the same pin, which is required for some half duplex communication modes. When doing full duplex communication, two data links are provided, making it possible for data to be sent and received at the same time. In half duplex mode, data is only sent in one direction at a time. There are several possible half duplex setups. Both single and double data-links, or with an external driver. When communicating over a single data-link, the transmitter must be tristated whenever data is not transmitted. The LEUART can automatically tristate the transmit pin whenever the transmitter is inactive, if the AUTOTRI pin in the LEUARTn_CTRL register is set.2.9 GPIO and RoutingThe LEUART modules have the ability to route its TX and RX pins to some different predefined locations on the MCU pinout. The LEUARTn_ROUTE register must be set to enable and route the pins to the desired location.To enable the LEUART to interact with any external system components, like the RS232 port or another peripheral IC, the GPIO I/O pins must be configured accordingly. The GPIO has a variety of different pin modes available, and in the supplied code examples the TX pins are configured as push-pull output. The RX pins are enabled as inputs with a pull-up. The pull-up helps to define the input state in case line is not driven to a defined value by the other part. This can happen if you enable the RX module before the TX module. Refer to the application note "AN0012 GPIO" more examples on GPIO mode setting.3 Software ExamplesThe following software examples demonstrates a way to achieve full UART communication, using the LEUART functionality of the EFM32.3.1 Listening and Receiving in EM2.In this example, LEUART communication is initialized using the DMA to transfer received data from the LEUART receive register to the system memory. When a preconfigure signal frame is received, the LEUART generates a interrupt, and the CPU wakes up and writes all the received data from the memory to the LCD.3.1.1 Example 1: Receiving on DVKThis DVK can receive data both trough RS232, and directly through the pinout on the Prototype Board. This means that the example can be run in a variety of different setups, receiving data both from another DVK, a STK or a PC trough the RS232 port on the DVK. The LEUART1 RX pin is located on pin J10 on the DVK Prototype Board, and needs to be connected to the TX pin on the transmitting DVK or STK, or trough a RS232 cable to a PC. Note that the sender and received must have same ground and supply voltage when connecting the RX and TX lines directly without using the RS232 port.3.1.2 Example 2: Receiving on STKOn the STK the data can be received trough the pinout located along the rim of the board. The LEUART1 RX pin is located on the PC7 pin on the bottom row.3.2 Transmitting in EM2.In this example, LEUART communication is initialized using the DMA to transfer data from a location in the local system memory to the LEUART, on given RTC(Real Time Clock) interrupts. Every other second, the RTC interrupt initializes the DMA to start feeding the LEUART TX transmit register with data, and returns to EM2. One of two predefined strings is then transmitted trough the LEUART to anyone listening. The two strings will alternate.3.2.1 Example 3: Transmitting from DVKThe DVK can send data both directly through the pinouts on the Prototype board, and through the RS232 port provided. The example can in this way be set up and run in several different setups, both transmitting to another DVK, a STK or a PC. The LEUART1 TX pin is located on the pin J9 on the DVK Prototype Board, and needs to be connected to the RX pin on any receiving device, or to a PC through the use of a RS232 cable to a PC. Note that the sender and received must have same ground and supply voltage when connecting the RX and TX lines directly without using the RS232 port.3.2.2 Example 4: Transmitting from STKOn the STK the data can be transmitted through the pinout located along the rim of the board. The LEUART1 TX pin is located on the PC6 pin on the bottom row.4 Revision History4.1 Revision 1.082013-09-03New cover layout4.2 Revision 1.072013-05-08Added software projects for ARM-GCC and Atollic TrueStudio.4.3 Revision 1.062012-11-12Adapted software projects to new kit-driver and bsp structure.4.4 Revision 1.052012-08-13Adapted software projects to new peripheral library naming and CMSIS_V3.4.5 Revision 1.042011-11-15Updated transmit examples to use DMA callback to allow sleeping while transmitting.4.6 Revision 1.032011-10-21Updated IDE project paths with new kits directory.4.7 Revision 1.022011-05-18Updated projects to align with new bsp version4.8 Revision 1.012010-11-16Changed example folder structure, removed build and src folders.Updated chip init function to newest efm32lib version.Updated register defines in code to match newest efm32lib release.4.9 Revision 1.002010-09-24Initial revision.A Disclaimer and TrademarksA.1 DisclaimerSilicon Laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Laboratories reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Silicon Laboratories shall have no liability for the consequences of use of the information supplied herein. This document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. The products must not be used within any Life Support System without the specific written consent of Silicon Laboratories.A "Life Support System" is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant personal injury or death. Silicon Laboratories products are generally not intended for military applications. Silicon Laboratories products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons.A.2 Trademark InformationSilicon Laboratories Inc., Silicon Laboratories, the Silicon Labs logo, Energy Micro, EFM, EFM32, EFR, logo and combinations thereof, and others are the registered trademarks or trademarks of Silicon Laboratories Inc. ARM, CORTEX, Cortex-M3 and THUMB are trademarks or registered trademarks of ARM Holdings. Keil is a registered trademark of ARM Limited. All other products or brand names mentioned herein are trademarks of their respective holders.B Contact InformationSilicon Laboratories Inc.400 West Cesar ChavezAustin, TX 78701Please visit the Silicon Labs Technical Support web page:/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request.Table of Contents1. LEUART Theory (2)1.1. General theory (2)2. LEUART Configuration (3)2.1. Frames, Transmission & Parity (3)2.2. Clock Sources (3)2.3. Baud rates (3)2.4. DMA Integration (4)2.5. Pulse Generator and Extender (4)2.6. Interrupts (4)2.7. Freeze Mode and LF Domain Synchronisation (4)2.8. Half-Duplex Operation (5)2.9. GPIO and Routing (5)3. Software Examples (6)3.1. Listening and Receiving in EM2. (6)3.2. Transmitting in EM2. (6)4. Revision History (7)4.1. Revision 1.08 (7)4.2. Revision 1.07 (7)4.3. Revision 1.06 (7)4.4. Revision 1.05 (7)4.5. Revision 1.04 (7)4.6. Revision 1.03 (7)4.7. Revision 1.02 (7)4.8. Revision 1.01 (7)4.9. Revision 1.00 (7)A. Disclaimer and Trademarks (9)A.1. Disclaimer (9)A.2. Trademark Information (9)B. Contact Information (10)B.1. (10)List of Figures1.1. LEUART two link full duplex connection (2)2.1. LEUART frame format (3)。
EFM32 微控制器应用指南说明书
...the world's most energy friendly microcontrollers USART/UART - AsynchronousmodeAN0045 - Application NoteThis application note describes how to configure the EFM32 UART or USART tooperate in asynchronous mode.An included software example for the EFM32GG-DK3750 Giant Gecko DevelopmentKit shows how to implement interrupt driven receive and transmit, utilizing the on-board RS-232 transceiver.This application note includes:•This PDF document•Source files (zip)•Example C-code•Multiple IDE projects1 Universal Asynchronous Receive Transmit (UART)1.1 Basic TheoryA UART is a well established standard for low cost, low speed serial communications over a simple 2-wire (plus ground) interface.Asynchronous communications differs from synchronous communications in that synchronization between transmitter and receiver are encoded into the transmitted signal, rather than using a separate wire to transfer the transmitter clock to the receiver.Embedding the synchronization information in the data reduces the cost of cables and connectors, and may also be beneficial on a space constrained PCB or if one wants to keep the pin-usage low. On the other side adding synchronization information to the datastream increases overhead, causing the effective data rate to be lower than the baud rate.Normally, asynchronous communication modes facilitate somewhat lower data rates compared with synchronous modes. Some of the reason is the above mentioned overhead, but also because asynchronous communications may impose stronger requirements on the transceivers and the transmission lines between receiver and transmitter.Low cost and low power transceivers usually don't have advanced clock recovery mechanisms, but simply rely on the combination of oversampling and that the receiver and transmitter clock frequencies are sufficiently close.1.2 RS-232UART does not specify any electrical characteristics such as signal levels etc. Instead, several separate electrical interface standards can be applied. Most common is RS-232, but other well known standards include RS-422, RS-485, and also some standards that don't use electrical signalling such as IrDA.In this application note, the included software example uses the RS-232 transceiver that is included on the Development Kit.1.3 Using the EFM32 UART/USARTThe information necessary to configure and use the UART/USART modules on an EFM32 microcontroller are contained in the device family reference manual. This application note also presents some further details and clarifications.1.3.1 Clock SourceOften, the HFRCO is too unprecise to be used for communications. So using the HFXO with an external crystal is recommended when using the EFM32 UART/USART.In some cases, the internal HFRCO can be used. But then careful considerations should be taken to ensure that the clock performance is acceptable for the communication link.1.3.2 Baud Rate CalculationThe baud rate is given by the following expression:Baud rate(1.1)Where•br is baud rate,•f HFPERCLK is the frequency of the HFPERCLK branch of the high frequency clock tree (See figure on CMU Overview in device family specific reference manual),•OVS is the oversampling factor, and•DIV is the configurable part of the fractional divider in the UART/USART module.When rearranged, one can compute a clock divider setting that will obtain a wanted baud rate by the following formula:Clock divisor(1.2) The clock divider is a fractional divider dividing by (1+DIV/4) where DIV is a 15 bit value ranging from 0 to 32767. I.e. the clock can be divided by a factor from 1 to 8192.75. Depending on the configurable oversampling factor the baud rate is given by a further division by a factor of 4, 6, 8 or 16. This results in a baud rate that is the clock frequency divided by 4 to 131,084. If the HFXO is run at 32 MHz, baudrates between 8 Mbps and 244.11 bps can be generated as long as the HFPERCLK prescaler is set to 1.It is worth noting that the equations in this application note differs somewhat from the reference manual. The reason is that the reference manual refers to CLKDIV which is the entire 32-bit register value, of which only the 15-bit wide bitfield DIV is actually used to control the fractional divider. In this document, the bitfield DIV is consistently used.2 Software ExampleThe included software example is made for the EFM32 Giant Gecko Development Kit, EFM32GG-DK3750. However, with minor modifications the project will also work on our other EFM32 development kits. It can also be ported to the starter kits. But because the starter kits don't include RS-232 line drivers, please ensure that signal levels are compatible before establishing a communication link between two parties. Connecting the EFM32 UART directly to a PC serial port will damage the EFM32.The kit's on-board RS-232 transceiver is used to demonstrate a possible interrupt based asynchronous mode configuration of an EFM32 U(S)ART peripheral.The example uses interrupt driven transmit and receive. When transmitting a block of data, the data is first copied into a transmit queue. The U(S)ART TXBL interrupt is enabled. When the UART is ready to transmit, the TXBL interrupt goes high. The interrupt handler function fetches one byte from the transmit queue and copies it to the UART transmit buffer (UARTn->TXDATA). While transmitting, the CPU is free to perform other tasks. In the example project, the MCU spends this time in Sleep Mode (EM1).The same principle is used on receive. When an RXDATAV interrupt is received, the Rx interrupt handler copies the incoming data to a receive queue.2.1 Kit ConfigurationThe development kit's on-board RS-232 line driver is used. This transceiver is normally disconnected from the MCU, so before it can be used, it must be enabled by software. To do this, the kit library functions are used. The kit libraries are included in the kit software packages that can be installed via Simplicity Studio. Documentation can be found in a sub-folder of the Energy Micro library installation folder. It is usually located at: [energymicro]\kits\EFM32GG_DK3750\bspdoc\html\index.html where [energymicro] is the Simplicity Studio data folder. The location of this folder is system dependent, and can be found through "Simplicity Studio->File->Browse Installed Files"The RS-232 transceiver is connected to UART1, location 2 on the EFM32.2.2 InstructionsA serial cable and terminal emulator software is required to try this example. On Windows, the OpenSource terminal Tera Term can be used.First, connect a serial cable between a computer and the 9-pin RS-232 connector on the development kit. Configure the serial port as follows•Baud rate = 115 200•Data bits = 8•Parity = none•Stop bits = 1•Flow control = nonebefore opening a connection with the terminal emulator.One should also configure the terminal emulator to handle new line in the same way as the SW example.In Tera Term the proper configuration is to use LF on receive and CR+LF on transmit. If this can't be configured on the chosen emulator, the example can of course be altered to match the emulator settings.When connected, start typing. After entering some characters, press '.' which is predefined as a "termination character" causing the MCU to echo the contents of the RX queue back out on the UART.2.3 TransmitTransmit is handled by two functions: uartPutData() and UART1_TX_IRQHandler().uartPutData() copies data to send into a transmit queue. The queue is implemented as a circular buffer.The data is copied into the queue starting at the write index (wrI). When finished, the pending byte counter is updated. Finally the TX interrupt for the UART is enabled.UART1_TX_IRQHandler() reacts when the TXBL interrupt goes high, signalling that the UART transmit buffer is empty. When this happens, one byte is copied from the read index (rdI) position in the TX queue into the UART transmit buffer. The read index is updated, and the pending byte counter is decremented.If the transmit queue becomes empty, the TXBL interrupt is disabled.2.4 ReceiveIn the same way, receive is also handled by two functions: UART1_RX_IRQHandler and uartGetData.UART1_RX_IRQHandler()reacts on the RXDATAV interrupt, meaning that the UART RX buffer contains valid data. When this happens, the incoming byte is copied from the UART RX buffer into the RX queue. The queue write index (wrI) is updated, and the pending byte counter is incremented. The IRQ handler will also disable the TXBL interrupt if the transmit queue becomes empty.uartGetData() pulls a number of bytes from the receive queue. The copy starts at the read index (rdI).When data is copied, the read index is updated and the pending byte counter is decremented.Also, for the sake of the example, the RX interrupt handler checks if the received byte is a predefined termination character.3 Revision History3.1 Revision 1.032013-09-03New cover layoutRemoved unnecessary read of IF in TX IRQ Handler3.2 Revision 1.022013-05-08Added software projects for ARM-GCC and Atollic TrueStudio.3.3 Revision 1.012012-11-12Adapted software projects to new kit-driver and bsp structure.3.4 Revision 1.002012-06-28Initial revision.A Disclaimer and TrademarksA.1 DisclaimerSilicon Laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Laboratories reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Silicon Laboratories shall have no liability for the consequences of use of the information supplied herein. This document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. The products must not be used within any Life Support System without the specific written consent of Silicon Laboratories.A "Life Support System" is any product or system intended to support or sustain life and/or health, which,if it fails, can be reasonably expected to result in significant personal injury or death. Silicon Laboratories products are generally not intended for military applications. Silicon Laboratories products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons.A.2 Trademark InformationSilicon Laboratories Inc., Silicon Laboratories, the Silicon Labs logo, Energy Micro, EFM, EFM32, EFR, logo and combinations thereof, and others are the registered trademarks or trademarks of Silicon Laboratories Inc. ARM, CORTEX, Cortex-M3 and THUMB are trademarks or registered trademarks of ARM Holdings. Keil is a registered trademark of ARM Limited. All other products or brand names mentioned herein are trademarks of their respective holders.B Contact InformationSilicon Laboratories Inc.400 West Cesar ChavezAustin, TX 78701Please visit the Silicon Labs Technical Support web page:/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request.Table of Contents1. Universal Asynchronous Receive Transmit (UART) (2)1.1. Basic Theory (2)1.2. RS-232 (2)1.3. Using the EFM32 UART/USART (2)2. Software Example (4)2.1. Kit Configuration (4)2.2. Instructions (4)2.3. Transmit (4)2.4. Receive (5)3. Revision History (6)3.1. Revision 1.03 (6)3.2. Revision 1.02 (6)3.3. Revision 1.01 (6)3.4. Revision 1.00 (6)A. Disclaimer and Trademarks (7)A.1. Disclaimer (7)A.2. Trademark Information (7)B. Contact Information (8)B.1. (8)List of Equations1.1. Baud rate (2)1.2. Clock divisor (3)。
EFM32系列微控制器Flash编程指导+V1.00
产品应用笔记
©2012 Guangzhou ZLG MCU Technology Co., Ltd. iii
广州周立功单片机科技有限公司
Flash 编程指导
EFM32 系列微控制器
目录
1. 概述...........................................................................................................................1
4. 片内 Flash 的保护：................................................................................................9
4.1
片内 Flash 加密 ........................................................................................................9
ethernet.support@
串行通讯：
销售电话：(020) 28872524 28872342 28872450 技术支持：(020) 28267800 22644385
serial@
无线通讯：
销售电话：(020) 28872524 28872342 28872450 技术支持：(020) 22644386
深圳周立功
武汉周立功
地址：深圳市福田区深南中路 2072 号电子大厦 12 楼 地址：武汉市洪山区广埠屯珞瑜路 158 号 12128 室（华
电话：(0755)83781788（5 线）
EFM32微控制器脉冲计数器应用指南说明书
...the world's most energy friendly microcontrollersPulse CounterAN0024 - Application NoteIntroductionThis application note describes how to configure and use the different modes inthe EFM32 Pulse Counter, select clock sources and use the available interrupts toachieve high energy efficiency.This application note includes:•This PDF document•Source files (zip)•Example C-code•Multiple IDE projects1 OverviewThe Pulse Counter (PCNT) can be used for counting incoming pulses on a single input or to decode quadrature encoded inputs. It can run from the internal LFACLK (EM0-EM2) while counting pulses on the PCNTn_S0IN pin or using this pin as an external clock source (EM0-EM3) that runs both the PCNT counter and register access.Figure 1.1. Pulse Counter OverviewPCNTn_SIPCNTn_S1INThe peripheral incorporates an 8-bit up/down-counter to keep track of the incoming pulses or rotations.It is possible to generate an interrupt after a specific number of pulses (or rotations) and there is alsoa change in direction interrupt available (quadrature decoder mode only). This eliminates the need fortiming or IO interrupts and CPU processing to measure pulse widths.2 Pulse Counter ModesThe PCNT can operate in single oversampling mode (OVSSINGLE), externally clocked single input counter mode (EXTCLKSINGLE) and externally clocked quadrature decoder mode (EXTCLKQUAD).•In OVSSINGLE mode the input on PCNTn_S0IN is sampled by the LFACLK and PCNTn_S1IN is ignored•In EXTCLKSINGLE the PCNTn_S0IN input clocks both the PCNT counter and register access.PCNTn_S1IN is also ignored in this mode•In EXTCLKQUAD the PCNTn_S0IN input clocks the register access as well and is used to sample PCNTn_S1IN in order to decode the quadrature signal2.1 FunctionsThe operational mode and general initialization can be set using the following function from the emlib: void PCNT_Init(PCNT_TypeDef *pcnt, PCNT_Init_TypeDef *init)Using this function the user will be able to configure the following parameters:•Operational mode•Initial counter value (maximum of 0xFF)•Initial top value (maximum of 0xFF)•Polarity of incoming edge•Count up or down•Filter enableIf the user only wants to change the operational mode the function void PCNT_Enable(PCNT_TypeDef *pcnt, PCNT_Mode_TypeDef mode) can be used. It does not do any configuration, only sets the operational mode. This is normally only required after initialization is done and if not done as part of the initialization or if requiring to disable/reenable the PCNT.2.2 Clock SourcesThere are two selectable clock sources for the PCNT, the 32kHz LFA clock or an external clock through PCNTn_S0IN pin. Clock selection is done using the CMU_PCNTCTRL register in the CMU module and the LE interface clock must also be enabled in addition to the peripheral clock. The external clock is used to clock the counter in EXTCLKSINGLE mode and to sample PCNTn_S1IN in EXTCLKQUAD mode.When changing clock source the PCNT Clock Domain Reset bit (RSTEN in the PCNTn_CTRL register) should be set. If changing to an external source the clock pin has to be enabled as input in the GPIO module prior to deasserting RSTEN. Changing clock source without enabling RSTEN results in undefined behaviour. The clock source can be selected using the initialization function for the PCNT in the emlib void PCNT_Init(PCNT_TypeDef *pcnt, PCNT_Init_TypeDef *init) which also handles automatically the RSTEN assertion.The pins used by the PCNT must be properly configured as inputs in the GPIO module and routed in the PCNT using the ROUTE register. Configuring the pins is covered in AN0012 GPIO.2.3 Single Input Oversampling ModeSingle input oversampling mode can also be enabled by writing OVSSINGLE (0x1) to the MODE bitfield in the PCNTn_CTRL register. The PCNTn_S0IN is the only observed input in this mode and is sampledby the LFACLK. The number of detected positive or negative edges on this pin appears in PCNTn_CNT.The counter can count either up or down and the digital pulse width filter is available in this mode and can be enabled using the FILT bit in PCNTn_CTRL. Count direction and edge polarity of the incoming signal can be changed using CNTDIR and EDGE bits in PCNTn_CTRL.2.3.1 Software ExamplesThere is one software example named pcnt_count that demonstrates OVSSINGLE mode and can be used for both STKs and DK. In this example the pulses are generated by making a connection between PC4(PC13 on the Tiny Gecko STK) and PC5 (P4.7 and P4.8 on the DK protoboard). PC4 is configured as input with a pull down to tie it to ground and avoid having a floating voltage. PC5 is configured as output high so when making a connection between them PC4 will have a high level also and thus generatinga pulse. Due to mechanical friction and bouncing each contact can generate more than one pulse. Theoverflow interrupts are used in this example to update the LCD with the number of pulses.The top value is initially set to 10 and then is increased by 10 on each overflow. The counter gets the previous top value because it goes to 0 after an overflow. The LCD will update when a number of pulses multiple of 10 is generated. The counting direction change interrupt is not used in this example.2.4 Externally Clocked Single Input Counter ModeExternally clocked single input counter mode can also be enabled by writing EXTCLKSINGLE (0x2) to the MODE bitfield in the PCNTn_CTRL register. The external pin clock source must be configured in the CMU_PCNTCTRL register in the CMU. Positive edges on the PCNTn_S0IN are used to clock the counter and PCNTn_S1IN is ignored in this mode. Given that the LFACLK is not used the PCNT can operate in EM3. The counter can be configured to count down or up using the DIR bit in PCNTn_CTRL register, but the digital pulse width filter is not available. An alternative is using the analog glitch suppression filter in the GPIO pads to remove some unwanted noise. That configuration has to be done in the GPIO module when enabling the pins as inputs for the PCNT. The EDGE bit in PCNTn_CTRL has no effect in this mode where only positive signal edges are counted.2.4.1 Software ExamplesThe software example from Section 2.3.1 (p. 4) can also be used to demonstrate this mode. To do so the mode parameter in pcntInit structure should be changed from pcntModeOvsSingle to pcntModeExtSingle. The only difference to the previous example is that the PCNT only starts counting on the 4th pulse. This is due to the required synchronization described in Section 4.2 (p. 8)2.5 Externally Clocked Quadrature Decoder ModeThis mode is enabled by writing EXTCLKQUAD (0x3) to the MODE field in PCNT_CTRL register. The external pin clock source must be configured in the CMU_PCNTCTRL register in the CMU. Both edges of the PCNTn_S0IN pin are used to sample PCNTn_S1IN in order to decode the quadrature code. The LFACLK is not used in this mode enabling operation down to EM3. The direction of the counter can be inverted using the EDGE bit in PCNTn_CTRL register and the digital pulse width filter is not available in this mode. A quadrature coded signal contains information about the relative speed and direction ofa rotating shaft as illustrated by Figure 2.1 (p. 5)Figure 2.1. Quadrature DecodingX = sensor positionClockwise direction Counter clockwisePCNTn_S PCNTn_S PCNTn_S PCNTn_S If PCNTn_S0IN leads PCNTn_S1IN in phase, the direction is clockwise, and if it lags in phase the direction is counter-clockwise. Although the direction is automatically detected it may be inverted by writing 1 to the EDGE bit in PCNTn_CTRL register. The counter direction may be read from the DIR bit in the PCNTn_STATUS register.2.5.1 Software ExamplesThere is one software example named pcnt_quad that demonstrates EXTCLKQUAD mode and can be used for both STK and DK. To simulate the quadrature encoded signal pins PC4 and PC5 (P4.7 and P4.8 on the DK protoboard) are configured as inputs for the PCNT inputs and pins PC6 and PC7 (P4.9and P4.10) are configured as output high. These should be connected to the input pins to generate the quadrature coded signal in one of two different cycles:For the Tiny Gecko STK the PCNT inputs are on PC13 and PC14. Exchange PC4, PC5 with PC13,PC14 in the following two cycles to generate the quadrature signals.The following cycle will make the PCNT count up:•Connect PC4 to PC6•Connect PC5 to PC7 and keep PC4 and PC6 connected •Disconnect PC4 from PC6•Disconnect PC5 from PC7The next cycle will make the PCNT count down:•Connect PC5 to PC7•Connect PC4 to PC6 and keep PC5 and PC7 connected •Disconnect PC5 from PC7•Disconnect PC4 from PC6The counter only starts counting on the 4th cycle. This is due to the required synchronization described in Section 4.2 (p. 8) . In this example both counter direction (UP or DOWN) and value are displayed on the LCD. When the direction changes a direction change interrupt is generated and the LCD is updated with the new direction and current counter value. The LCD has START and 0 written at the beginning and is only updated after a direction change.3 InterruptsThe interrupts generated by PCNT use the PCNTn_INT interrupt vector. Interrupts are set using the PCNTn_IFS register, cleared in the PCNTn_IFC register and read from the PCNTn_IF register. There are also emlib functions to handle these registers:•void PCNT_IntEnable(PCNT_TypeDef *pcnt, uint32_t flags) for enabling interrupts •PCNT_IntClear(PCNT_TypeDef *pcnt, uint32_t flags) for clearing interrupts•uint32_t PCNT_IntGet(PCNT_TypeDef *pcnt) for reading interruptsThe interrupts can also be disabled using the function void PCNT_IntDisable(PCNT_TypeDef *pcnt, uint32_t flags)3.1 Underflow and Overflow InterruptsThe underflow interrupt flag (UF) is set when the counter counts down from 0. I.e. when the value of the counter is 0 and a new pulse is received. The PCNTn_CNT register is loaded with the PCNTn_TOP value after this event.The overflow interrupt flag (OF) is set when the counter counts up from the PCNTn_TOP (reload) value.I.e. if PCNTn_CNT = PCNTn_TOP and a new pulse is received. The PCNTn_CNT register is loadedwith the value 0 after this event.3.2 Direction Change InterruptThe direction change interrupt flag (DIRCNG) is set when the direction of the quadrature code changes.The behavior of this interrupt is illustrated by Figure 3.1 (p. 7)Figure 3.1. Direction Change InterruptPCNTn_SPCNTn_SInterruptDelay from the shaft physicallychanged direction until thecounter direction is changedand the interrupt is generated4 Register access4.1 Writing to PCNTn_TOP and PCNTn_CNTSince the pulse counter is part of the low frequency domain, or externally clocked, and thereby asynchronous to the high frequency domain. All register accesses must be synchronized when writing,please see the reference manual, chapter: Access to Low Energy Peripherals (Asynchronous Registers)for more information about this.The emlib includes a function to load both TOP and COUNT registers:void PCNT_CounterTopSet(PCNT_TypeDef *pcnt, uint32_t count, uint32_t top)In this function the LTOPBIM command is always issued since it has no effect in revision C but is necessary in revisions A/B. If running the PCNT from an external clock source (EXTCLKSINGLE or EXTCLKQUAD modes) it is advisable not to use this function. It contains several sync cycles that can cause the program to stall if the clock is not present or delay the execution if the clock is slow. Before writing to PCNTn_TOPB, PCNTn_CMD or PCNTn_CTRL a sync check should be done to make sure these registers were synchronized to the low frequency domain.When using the initialization function void PCNT_Init(PCNT_TypeDef *pcnt,PCNT_Init_TypeDef *init) the counter value is not written for the external clock modes (EXTCLKSINGLE and EXTCLKQUAD). The counter value must first be written to TOP and then to CNT and it is necessary to sync the register access between the high and low frequency domains. In External clock modes there is no guarantee that the clock is present so waiting for syncs could cause the program to stall.4.2 Synchronizing in External Clock ModesWhen writing to PCNTn_TOPB, PCNTn_CMD or PCNTn_CTRL registers these need to be synchronized from the high frequency domain to the low frequency domain. The changes will not take effect until the synchronization is done and it takes 3 low frequency clock cycles to synchronize between the two domains. When using the PCNT in an external clock mode (EXTCLKSINGLE or EXTCLKQUAD), it also takes 3 cycles on the external clock to sync the registers. This should be taken into account when the user writes the PCNT registers in run-time. Figure 4.1 (p. 8) illustrates the sync in EXTCLKSINGLE mode after changing the CNTDIR bit in PCNT_CTRL register.Figure 4.1. Register Sync in EXTCLKSINGLECNTDIR = 1(counting down)PCNTn_CNTPCNTn_S 0INChanges are syncedPCNTn_S TATUS Counting up Counting downThe PCNT will need 3 clock cycles (or pulses) on the external clock (PCNTn_S0IN) to sync before the changes take effect. This means that the PCNT counts up for 3 more cycles before starting to count down. In this example the counter will be affected by 6 extra counts (2 x SYNC_CYCLES).4.2.1 Initializing in External Clock ModeWhen initializing the PCNT with one of the external clock modes (EXTCLKSINGLE or EXTCLKQUAD) the counting can start on the third or fourth pulse depending on how the initialization is done. There are two possible initialization sequences.•Single write to PCNTn_CTRL with chosen configuration and PCNT clock domain reset enable (RSTEN)•Wait for sync by polling the CTRL bit in the PCNTn_SYNCBUSY register•Select external clock source•Release the reset by writing 0 to RSTEN in PCNTn_CTRL•Write PCNTn_TOPB•Issue LTOPBIM command in PCNTn_CMD (EFM32G revisions A/B only)Using this sequence the configuration will be synchronized simultaneously with the RSTEN assertion.When clearing RSTEN the PCNT is already configured to the correct mode. The reset is synchronously released two PCNT clock edges after RSTEN being cleared and thus the PCNT will start counting on the third pulse.This initialization has however a drawback. The TOP value has to be written after clearing RSTEN. The PCNTn_TOP reset value is restored after clearing RSTEN so writing it before will have no effect. After reset it will take 4 or 3 clock cycles (revisions A/B and revision C and onward EFM32G and other EFM32 parts respectively) to synchronize PCNTn_TOP so when using this sequence the PCNT starts counting with a TOP value of 0xFF. If count down is selected the third pulse (first countable pulse) will make PCNTn_CNT go from 0 to 0xFF because the new PCNTn_TOP value has not been synchronized yet.The initialization sequence can be done differently to make sure that PCNTn_TOP is synchronized before or at the same time as PCNTn_CTRL after releasing reset.•Write to PCNTn_CTRL enabling PCNT clock domain reset enable (RSTEN)•Wait for sync by polling the CTRL bit in the PCNTn_SYNCBUSY register•Select external clock source•Release the reset by writing 0 to RSTEN in PCNTn_CTRL•Write PCNTn_TOPB•Issue LTOPBIM command in PCNTn_CMD (EFM32G revisions A/B only)•Wait for PCNTn_TOPB and PCNTn_CMD synchronization (EFM32G revisions A/B only)•Write PCNTn_CTRL with the chosen configurationsThe emlib function void PCNT_Init(PCNT_TypeDef *pcnt, PCNT_Init_TypeDef *init) implements this solution but without the wait for synchronization because the state of the external clock is unknown.If count down is selected PCNTn_CNT will go to the new PCNTn_TOP value instead of 0xFF. However in EFM32G revisions A/B chips there is the need for one more clock cycle as described in Section 4.1 (p.8) . For these chips the LTOPBIM command has to be issued after writing PCNTn_TOPB and bothshould be synchronized before writing and synchronizing PCNTn_CTRL. To avoid using the pulses for synchronization the user can configure PCNTn_S0IN as push pull and generate the pulses by software.This makes sure that the first external pulse is counted by the PCNT5 Revision History5.1 Revision 1.072013-09-03New cover layout5.2 Revision 1.062013-08-07Replaced hard coded interrupt flags and bug in interrupt handler.5.3 Revision 1.052013-05-08Added software projects for ARM-GCC and Atollic TrueStudio.Removed section about issues with early Gecko revisions, as this is errata material.5.4 Revision 1.042012-11-12Adapted software projects to new kit-driver and bsp structure.Added projects for Tiny and Giant Gecko STKs.5.5 Revision 1.032012-04-20Adapted software projects to new peripheral library naming and CMSIS_V3.5.6 Revision 1.022011-10-21Updated IDE project paths with new kits directory.5.7 Revision 1.012011-05-18Updated projects to align with new bsp version.5.8 Revision 1.002010-12-02Initial revision.A Disclaimer and TrademarksA.1 DisclaimerSilicon Laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Laboratories reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Silicon Laboratories shall have no liability for the consequences of use of the information supplied herein. This document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. The products must not be used within any Life Support System without the specific written consent of Silicon Laboratories.A "Life Support System" is any product or system intended to support or sustain life and/or health, which,if it fails, can be reasonably expected to result in significant personal injury or death. Silicon Laboratories products are generally not intended for military applications. Silicon Laboratories products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons.A.2 Trademark InformationSilicon Laboratories Inc., Silicon Laboratories, the Silicon Labs logo, Energy Micro, EFM, EFM32, EFR, logo and combinations thereof, and others are the registered trademarks or trademarks of Silicon Laboratories Inc. ARM, CORTEX, Cortex-M3 and THUMB are trademarks or registered trademarks of ARM Holdings. Keil is a registered trademark of ARM Limited. All other products or brand names mentioned herein are trademarks of their respective holders.B Contact InformationSilicon Laboratories Inc.400 West Cesar ChavezAustin, TX 78701Please visit the Silicon Labs Technical Support web page:/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request.Table of Contents1. Overview (2)2. Pulse Counter Modes (3)2.1. Functions (3)2.2. Clock Sources (3)2.3. Single Input Oversampling Mode (3)2.4. Externally Clocked Single Input Counter Mode (4)2.5. Externally Clocked Quadrature Decoder Mode (4)3. Interrupts (7)3.1. Underflow and Overflow Interrupts (7)3.2. Direction Change Interrupt (7)4. Register access (8)4.1. Writing to PCNTn_TOP and PCNTn_CNT (8)4.2. Synchronizing in External Clock Modes (8)5. Revision History (10)5.1. Revision 1.07 (10)5.2. Revision 1.06 (10)5.3. Revision 1.05 (10)5.4. Revision 1.04 (10)5.5. Revision 1.03 (10)5.6. Revision 1.02 (10)5.7. Revision 1.01 (10)5.8. Revision 1.00 (10)A. Disclaimer and Trademarks (11)A.1. Disclaimer (11)A.2. Trademark Information (11)B. Contact Information (12)B.1. (12)List of Figures1.1. Pulse Counter Overview (2)2.1. Quadrature Decoding (5)3.1. Direction Change Interrupt (7)4.1. Register Sync in EXTCLKSINGLE (8)。
EFM32外设模块—ACMP V1.00
目录1. 概述 (1)2. FAQ (3)2.1 ACMP输入通道 (3)2.2 ACMP中断 (3)2.3 电容感应模式 (4)3. 实验指导 (6)3.1 实验目的 (6)3.2 实验设备 (6)3.3 实验内容 (6)3.4 试验步骤 (6)3.5 实验参考程序 (6)3.6 实验结果 (8)4. 免责声明 (9)1. 概述模拟比较器（Analog Comparator，简称ACMP）是EFM32系列微控制器片上模拟电压比较模块，可工作于EM0～EM3模式，支持偏置电流、响应时间和滞回电压等配置。
ACMP用来比较两个模拟输入通道的输入电压大小并输出高低电平指示两个输入电压高低情况。
EFM32系列微控制器片上模拟比较器可选的输入信号包括内部参考电压、DAC 输出和外部输入引脚等，其输出信号可以输出到GPIO或PRS。
模拟比较器也可配置为电容感应模式以用来开发电容传感器类应用。
通过改变模拟比较器的偏置电流，可以改变其响应时间和功耗。
模拟比较器的内部参考电压可工作在正常模式和低功耗模式。
如图1.1所示为模拟比较器内部的互连情况、内部参考电压和输出模式的选择等。
图1.1 模拟比较器结构框图注：Gecko系列芯片ACMP的输入不含DAC通道0和DAC通道1。
模拟比较器有两个模拟输入端，即同相输入端和反相输入端。
当模拟比较器开始工作时，输出信号指示两输入通道电压的高低情况。
当同相输入电压高于反相输入电压时，模拟比较器输出高电平，反之输出低电平。
8路外部输入通道均可配置为同相输入或反相输入，但内部参考源和DAC输入通道（对于Gecko 系列没有DAC 通道0和1）只能配置为反相输入。
内部参考源包括1.25V 带隙基准电压、2.5V 带隙基准电压和VDD 参考源，其中VDD 参考源的输出电压可以通过配置ACMPn_INPUTSEL 寄存器中VDDLEVEL 位进行改变，分压公式如下：63/VDDLEVEL V V DD SCALED _DD ×=模拟比较器的输出可以从ACMPn_STATUS 寄存器中的ACMPOUT 位读出。
EFM32外设模块—PRS V1.00
PRS
EFM32 系列微控制器
3.6 实验结果
下载程序并复位 MCU，约 5 秒后 LCD 屏将显示 ADC 转换结果“0255”。
产品应用笔记
©2012 Guangzhou ZLG MCU Technology Co., Ltd. 5
如程序清单 3.3 所示为 main 主函数，完成各外设初始化后进入 EM1 睡眠模式。Байду номын сангаас
程序清单 3.3 主函数
int main(void) {
CHIP_Init(); SegmentLCD_Init(false); ADC_setup(); TIMER_setup(); ADC_IntEnable(ADC0, ADC_IEN_SINGLE); NVIC_EnableIRQ(ADC0_IRQn); while(1) {
2. FAQ ............................................................................................................................ 2
2.1
基本功能 ................................................................................................................... 2
产品应用笔记
©2012 Guangzhou ZLG MCU Technology Co., Ltd. 1
广州周立功单片机科技有限公司
PRS
EFM32 系列微控制器
1. 概述
外设反射系统（Peripheral Reflex System，简称 PRS）是 EFM32 系列微控制器专有的外 设互联总线，允许不同的外设无需 CPU 干预即可直接相互通信。
EFM32外设模块—MSC V1.00
产品应用笔记
©2012 Guangzhou ZLG MCU Technology Co., Ltd. 2
广州周立功单片机科技有限公司
MSC
EFM32 系列微控制器
3. 实验指导
3.1 实验目的
掌握 Energy Micro EFM32 系列微控制器 MSC 模块的使用方法。
3.2 实验设备
z 硬件：PC 机一台和 EFM32TG-STK3300 开发板一套； z 软件：IAR（或 Keil）集成开发环境。
SegmentLCD_Write("SUCESS"); } else {
SegmentLCD_Write("ERROR"); }
/* 若相等显示读取成功
*/
/* 若不相等显示读取失败
*/
while(1); }
产品应用笔记
©2012 Guangzhou ZLG MCU Technology Co., Ltd. 4
广州周立功单片机科技有限公司
MSC
EFM32 系列微控制器
3.6 实验结果
下载程序并复位 MCU。若 LCD 显示“SUCCESS”则表示对片上 Flash 擦写操作成功并 且读取的数据和写入的数据一致；若 LCD 显示“WriteError”则表示在对片上 Flash 的写操 作失败；若 LCD 显示“Error”则表示对片上 Flash 擦写操作成功但读取的数据与写入的数 据不一致。
程序清单 3.2 主函数
int main (void)
产品应用笔记
©2012 Guangzhou ZLG MCU Technology Co., Ltd. 3
广州周立功单片机科技有限公司
EFM32系列微控制器Flash编程指导+V1.00
销售电话：(020) 28872453 28872569 技术支持：(020) 22644360
TKScope@
楼宇自动化：
销售电话：(020) 28872573 技术支持：(020) 22644389 28267806
mjs.support@ mifare.support@
4.2
禁能调试接口 ........................................................................................................... 9
4.2.1 通过 energyAware Commander 禁能调试接口 ...................................................9
Application Note
Flash 编程指导
EFM32 系列微控制器
AN20120627 V1.00 Date: 2012/12/17
产品应用笔记
类别 关键词
摘要
内容 EFM32；Flash；编程；加密 本文档主要介绍 EFM32 系列微控制器的 Flash 编程下载、加 密保护以及如何在 Flash 上进行模拟 EEPROM、实现
4.2.2 通过程序禁能调试接口 ....................................................................................... 9
5. 片内 Flash 的扩展应用.......................................................................................... 11
EFM32外设模块—PCNT V1.00
/* 进入 EM2 模式
*/
}
}
如程序清单 3.2 所示为利用 PCNT0 计数外部输入脉冲数的初始化函数。先开启 PCNT0 时钟，配置其为外部时钟单输入计数器模式，设置其计数器初始值为 0，TOP 值为 0xff。然 后选择 S0IN 的输入映射为 LOC3，最后开启 PCNT 的溢出中断。
程序清单 3.2 PCNT 初始化函数
注：信号发生器为广州致远电子股份有限公司出品的 MI1000 多功能仪器，详情可参考： /pro_tools/versatile/MI1000.asp。
3.5 实验参考程序
在实验例程中为了实现高精度的秒中断，使用 LFXO 作为 LFA 时钟输入。由于使用了 低频外设，因此需要开启 LE 时钟。调用 RTC 和 PCNT 的初始化函数完成相应的初始化操 作，最后进入 EM2 模式。具体实现代码如程序清单 3.1 所示。
表 2.1 脉冲计数器计数方向的控制
S1CDIR 0 0 1 1 1 1
PCNTn_S1IN × × 1 1 0 0
CNTDIR 0 1 0 1 0 1
计数器的计数方向 0（加法） 1（减法） 0（加法） 1（减法） 1（减法） 0（加法）
3. 在 EXTCLKSINGLE 模式下，配置后，为什么脉冲计数器不能立即对 PCNTn_S0IN 引脚上的脉冲计数？
3.3
实验内容 ................................................................................................................... 3
3.4
试验步骤 ................................................................................................................... 3
EFM32和EZR32无线微控制器系列0 Watchdog应用说明书
AN0015.0: EFM32 and EZR32 Wireless MCU Series 0 WatchdogThis application note demonstrates how to use the Watchdog module on EFM32 and EZR32 Wireless MCU Series 0 devices.For watchdog information for EFM32 and EFR32 Wireless Gecko Series 1 devices, refer to AN0015.1: EFM32 and EFR32 Wire-less MCU Series 1 Watchdog .This document discusses initializing the Watchdog, a basic setup for operation, and ways to utilize the added Watchdog functionality in more advanced applications.This application note includes:•This PDF document •Source files (zip).•Example C-code.•Multiple IDE projects.KEY POINTS•Clock source from selectable oscillators.•Configurable timeout period.•Selection to keep running or freeze when entering debug mode.•Selection to block the CPU from entering Energy Mode 4.•Individual selection to keep running or freeze when entering EM2 DeepSleep or EM3 Stop.•Selection to block the CMU from disabling the selected watchdog clock.Counter valueTimeout periodTimeDevice Compatibility 1. Device CompatibilityThis application note supports multiple device families, and some functionality is different depending on the device.EFM32 Series 0 consists of:•EFM32 Gecko (EFM32G)•EFM32 Giant Gecko (EFM32GG)•EFM32 Wonder Gecko (EFM32WG)•EFM32 Leopard Gecko (EFM32LG)•EFM32 Tiny Gecko (EFM32TG)•EFM32 Zero Gecko (EFM32ZG)•EFM32 Happy Gecko (EFM32HG)EZR32 Wireless MCU Series 0 consists of:•EZR32 Wonder Gecko (EZR32WG)•EZR32 Leopard Gecko (EZR32LG)•EZR32 Happy Gecko (EZR32HG)2. Watchdog Theory2.1 General TheoryThe purpose of the Watchdog timer is to generate a reset in case of a system failure to increase application reliability. The failure may be caused by an external event such as an ESD pulse or by a software failure.The Watchdog circuit is a timer which (when enabled) must be cleared by software regularly. If software does not clear it, a Watchdog reset is activated. This functionality provides recovery from a software stalemate. Refer to the WDOG chapter of the reference manual covering the device for more extensive specifications and descriptions.Counter valueTimeout periodTimeFigure 2.1. Watchdog Timer Operation2.2 Watchdog ResetThe Watchdog timer on the EFM32 (WDOG) is a Low Energy Peripheral module that can be configured to generate a system reset in the case that it is not cleared by software before the given deadline.When the Watchdog is cleared (often also referred to as feeding or petting the Watchdog), it means that the value counted to by the timer is reset to zero. This is done by software and is the normal procedure when the system is running correctly.When the Watchdog timer reaches a certain threshold value, it will generate a system reset. This indicates that the system is not run-ning correctly and that the CPU has failed to reset the Watchdog in a timely manner. In this case, the Watchdog offers a safe way to return the system to a known state through system reset.WatchdogenabledWatchdogtimeoutFigure 2.2. Watchdog State Diagram3. Watchdog Configuration3.1 Choice of Clock SourceThe WDOG can be configured to use one of three different clock sources: LFRCO, LFXO or ULFRCO. ULFRCO (Ultra Low Frequency RC Oscillator) is a separate and dedicated Watchdog 1 kHz RC oscillator that also runs in EM3. This oscillator is always enabled and is included in all current consumption numbers.It is important to take into consideration the ULFRCO accuracy. The oscillator offers extremely low energy consumption, but has re-duced accuracy. It is therefore advisable to time the Watchdog resets with considerable margin to avoid unwanted system resets. For example, the EFM32LG Leopard Gecko data sheet specifies that the ULFRCO can vary between 0.7 and 1.75 kHz. This means that the timeout period may vary from -43% to +43% of the desired period, device to device. This is important to remember when testing software on one device that will later run on other devices. A specific timeout period might give good results on one device, but may generate unwanted system resets on a device with a slightly different ULFRCO frequency. Furthermore, depending on the application, the variations over temperature and supply voltage must also be taken into account when determining the Watchdog timeout period. These variations may mean that even higher safety margins are needed than the -43% to +43% given above.The other two clock sources available for the Watchdog timer have higher accuracy, but in turn need more energy to operate. They are also shared with other system devices and first need be enabled in software. When using them as Watchdog clock sources, it is critical that they are not disabled in other parts of the software. The highest accuracy can be obtained through the LFXO clock source. Howev-er, all oscillators have uncertainty that should be accounted for during system design to guarantee predictable system behaviour.For EFM32LG devices, the LFRCO (32.768kHz) can vary between 31.29 and 34.28 kHz (VDD= 3.0 V, T AMB=25°C), which means that the timeout period may vary from -4.4% and 4.7% of the desired period. Over full supply and temperature range, the LFRCO can vary between 26.0 and 46.2 kHz, which means that the timeout period may vary from -29% and 26% of the desired period.The LFXO clock (32.768kHz) accuracy will be dependent on the crystal specification, but is generally more accurate than either the LFRCO or the ULFRCO.Refer to the specific device data sheet for more extensive information on oscillator accuracy.In order to access the WDOG from the CPU, the HFCORECLK_LE clock gate must be enabled in the CMU (Clock Management Unit).3.2 Timeout PeriodsThe Watchdog offers a wide range of timeout periods to select from during system design. The PERSEL field in WDOGn_CTRL is used to divide the selected watchdog clock, and the timeout for the watchdog timer can be calculated with the formula:T TIMEOUT=23+PERSEL+1fA total of 16 levels offer periods between 9 to 256k cycles of the chosen Watchdog clock source. (i.e. from ~274 μs for 32768 Hz clock source to ~262 s for 1000 Hz clock source).3.3 Energy Mode IntegrationThe Watchdog contains extensive support for integration with the different Energy Modes and energy consumption minimization. Differ-ent register values toggle if the Watchdog is to keep running in respectively EM2 and/or EM3, and whether or not the system is allowed to enter EM4. For example, the Watchdog can be set to keep counting in EM2, but not during EM3. When resuming from EM3, the Watchdog will keep counting from the previous counter value.The registers are:•WDOG_CTRL_EM2RUN — toggles if the Watchdog timer is to keep running when the system has entered EM2.•WDOG_CTRL_EM3RUN — toggles if the Watchdog timer is to keep running when the system has entered EM3.•WDOG_CTRL_EM4BLOCK — toggles if the system is disabled by the Watchdog from entering EM4, where all the Watchdog clock sour-ces are disabled.Note: EM2RUN and EM3RUN are not functional on EFM32G devices. In these devices, the Watchdog will keep running in EM2/EM3 regardless of the state of these bits.3.4 Debug FunctionalityThe watchdog timer can either keep running or be frozen when the device is halted by a debugger. This configuration is done through the DEBUGRUN bit in WDOGn_CTRL. When code execution is resumed, the watchdog will continue counting from the previous value.3.5 Watchdog Clearing ConsiderationsAll the available Watchdog clocks are asynchronous to the CPU clock. Synchronization between the CPU and the Watchdog clock do-mains should therefore be taken into consideration when using the Watchdog. It generally takes 3 WDOGCLK cycles from the instruc-tion is executed until the correct value enters the WDOG registers. To guarantee that the Watchdog timer always is cleared correctly, all clear operations of the Watchdog timer should be written 4 WDOGCLK cycles before timeout (3 + 1 clock of uncertainty). This is critical to remember especially when using short timeout periods. For example, when operating with a Watchdog period of 9 WDOGCLK cy-cles, the first clear should be no later than 3.3 WDOGCLK cycles (9 – 4 – 33%) after the Watchdog is enabled. The interval between all subsequent Watchdog instructions should be no more than 5.3 WDOGCLK cycles (9 – 1 uncertainty – 33%). When using a clock source different from the ULFRCO, the safety margin should be changed according to the accuracy of that oscillator. This should en-courage the use of caution when implementing strict timing schemes for Watchdog resetting. For more information on accessing asyn-chronous registers and on oscillator accuracy, refer to the Reference Manual for the device.Counter valueTimeout period of 9 WDCTimeenabledFigure 3.1. Discrete Representation of the Watchdog Timer OperationTo effectively determine when to issue a Watchdog reset in software, it is important to have good knowledge of its timing characteris-tics. The Watchdog timeout period need be longer than the longest possible execution path through the software initialization and main loop. The execution path length must also include the expected interrupts and their handler's run times. This is to ensure that a large number of interrupts is not regarded by the Watchdog as a system stalemate.3.6 Reset Cause DetectionThe RMU (Reset Management Unit) contains a register that holds information on what caused the last system reset. This register pro-vides a method to detect if the Watchdog has triggered a reset. This information can be very useful in applications using the Watchdog,or to check if the Watchdog generates unwanted system resets. A basic use of the functionality is shown in the software examples. This can also be used to check if the Watchdog triggered a reset even in applications where the watchdog is not in use. This is a secure way to ensure safe operation even when the Watchdog is enabled accidentally. Alternatively, the watchdog register can be locked during startup. For more information, refer to the RMU and WDOG chapters in the Reference Manual for the device.3.7 Register LockingSome functionality is added to keep other parts of the system from interfering with the Watchdog. Different register entries can be set to prevent disablement of the chosen clock source, and the Watchdog register can be locked so that no modifications can be made to it.The registers are:•WDOG_CTRL_SWOSCBLOCK — when set, the Watchdog blocks all software from disabling the oscillator driving the WDOG timer.•WDOG_CTRL_LOCK — when set, the WDOG_CTRL register is locked and cannot be altered. The register should be set using the func-tion void WDOG_Lock(void) from emlib. The lock can only be disabled by a system reset.Software Examples 4. Software ExamplesThe software example associated with this document demonstrates how to use the main functionality included in the Watchdog module of the device. The example can be used on a Starter Kit (STK). The examples are divided into two sets:•Segment LCD for EFM32G, EFM32TG, EFM32LG, EFM32GG, and EFM32WG•Memory LCD for EFM32ZG and EFM32HGThe LCD module is used to provide feedback. The examples uses PB1 to choose the example mode, and PB0 starts the mode. LED0 on the STK is used to indicate the status of the test.4.1 Mode 0: Basic Watchdog OperationThis example mode uses the ULFRCO as the Watchdog clock source. The mode feeds the Watchdog every 50 ms using the usTimer driver. When running the example, LED0 toggles whenever the firmware feeds the Watchdog. The reset source number will be dis-played on the LCD after the Watchdog causes a reset.4.2 Mode 1: Lock OperationThis example mode uses the LFXO as the Watchdog clock source. The mode demonstrates the Watchdog lock feature. When running the example, LED0 toggles whenever software feeds the Watchdog. The reset source number will be displayed on the LCD after the Watchdog causes a reset.5. Revision History5.1 Revision 1.092017-09-12Changed AN0015 to AN0015.0 for EFM32 MCU and EZR32 Wireless MCU Series 0 devices. Updated content for all EFM32 and EZR Wireless MCU Series 0 devices.Reorganized the example code structure.Updated formatting and slightly modified wording in some places.5.2 Revision 1.082014-05-07Updated example code to CMSIS 3.20.5Changed to Silicon Labs license on code examplesAdded example projects for Simplicity IDERemoved example makefiles for Sourcery CodeBench Lite5.3 Revision 1.072013-10-14New cover layout5.4 Revision 1.062013-05-08Added software projects for ARM-GCC and Atollic TrueStudio.5.5 Revision 1.052012-11-12Adapted software projects to new kit-driver and bsp structure.Added software projects for Tiny and Giant Gecko STK.5.6 Revision 1.042012-04-20Adapted software projects to new peripheral library naming and CMSIS_V3.5.7 Revision 1.032011-10-21Updated IDE project paths with new kits directory.5.8 Revision 1.022011-05-18Updated projects to align with new bsp version.5.9 Revision 1.012010-11-16Changed example folder structure, removed build and src folders. Updated chip init function to newest efm32lib version.5.10 Revision 1.002010-09-22Initial revision.Silicon Laboratories Inc.400 West Cesar Chavez Austin, TX 78701USASimplicity StudioOne-click access to MCU and wireless tools, documentation, software, source code libraries & more. Available for Windows, Mac and Linux!IoT Portfolio /IoTSW/HW/simplicityQuality /qualitySupport and CommunityDisclaimerSilicon Labs intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Labs products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Labs reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Silicon Labs shall have no liability for the consequences of use of the information supplied herein. This document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. The products are not designed or authorized to be used within any Life Support System without the specific written consent of Silicon Labs. A "Life Support System" is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant personal injury or death. Silicon Labs products are not designed or authorized for military applications. Silicon Labs products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons.Trademark InformationSilicon Laboratories Inc.® , Silicon Laboratories®, Silicon Labs®, SiLabs® and the Silicon Labs logo®, Bluegiga®, Bluegiga Logo®, Clockbuilder®, CMEMS®, DSPLL®, EFM®, EFM32®, EFR, Ember®, Energy Micro, Energy Micro logo and combinations thereof, "the world’s most energy friendly microcontrollers", Ember®, EZLink®, EZRadio®, EZRadioPRO®, Gecko®, ISOmodem®, Micrium, Precision32®, ProSLIC®, Simplicity Studio®, SiPHY®, Telegesis, the Telegesis Logo®, USBXpress®, Zentri and others are trademarks or registered trademarks of Silicon Labs. ARM, CORTEX, Cortex-M3 and THUMB are trademarks or registered trademarks of ARM Holdings. Keil is a registered trademark of ARM Limited. All other products or brand names mentioned herein are trademarks of their respective holders.。
EFM32外设模块—USART V1.00
1) 连接 PD0 引脚到 USB 转串口模块的 RXD 端口，连接 PD1 引脚到 USB 转串口模块 的 TXD 端口；
2) 打开 PC 端串口调试助手； 3) 连接开发板 USB 端口到电脑的 USB 端口，打开 MCU 电源； 4) 打开 Keil（或 IAR）工程，重新编译并下载程序到开发板； 5) 复位 MCU，观察串口调试助手接收信息框； 6) 通过串口调试助手发送数据，并观察串口调试助手接收信息框。
4. 免责声明...................................................................................................................9
产品应用笔记
©2012 Guangzhou ZLG MCU Technology Co., Ltd. 1
A：数据线（MOSI 和 MISO）上的数据在每个时钟边沿被建立或采样，但数据建立和 采样的顺序由 CLKPHA 和 CLKPOL 的配置决定，如表 2.1 所示。
表 2.1 USART SPI 模式
SPI 模式 0 1 2 3
CLKPOL 0 0 1 1
CLKPHA 0 1 0 1
超前边沿 上升沿，采样 上升沿，建立 下降沿，采样 下降沿，建立
程序清单 2.2 USART 模块中使能 CS 自动片选功能配置
USARTn->CTRL |= USART_CTRL_AUTOCS； USARTn->ROUTE |= USART_ROUTE_CSPEN；
/*使能 CS 由主机自动控制
*/
/* 使能 CS 引脚
*/
4. 在同步 SPI 模式下，数据在什么时候建立以及在什么时候采样？
- 1、下载文档前请自行甄别文档内容的完整性，平台不提供额外的编辑、内容补充、找答案等附加服务。
- 2、"仅部分预览"的文档,不可在线预览部分如存在完整性等问题,可反馈申请退款(可完整预览的文档不适用该条件!)。
- 3、如文档侵犯您的权益，请联系客服反馈,我们会尽快为您处理(人工客服工作时间：9:00-18:30)。
产品应用笔记
©2012 Guangzhou ZLG MCU Technology Co., Ltd. 2
广州周立功单片机科技有限公司
LESENSE
EFM32 系列微控制器
3. 实验指导
3.1 实验目的
掌握 Energy Micro EFM32 系列微控制器 LESENSE 的特性并能够利用 LESENSE 构建简 单应用。
/* 偏置电流配置
*/
.hysteresisLevel .vddLevel .resistor
= acmpHysteresisLevel5, /* 配置 ACMP 滞回电压
*/
= 0x30,
/* 配置 VDD 参考电压分压值
*/
= acmpResistor0
/* 电容感应回路中串联电阻选择
*/
};
/* * ACMP 电容感应模式配置 */ ACMP_CapsenseInit(ACMP0, &tAcmpCapInit); }
产品应用笔记
©2012 Guangzhou ZLG MCU Technology Co., Ltd.
4
广州周立功单片机科技有限公司
LESENSE
EFM32 系列微控制器
.warmTime
= acmpWarmTime512, /* 预热时间有 LESENSE 控制
*/
.lowPowerReferenceEnabled = false,
4. 免责声明.................................................................................................................12
产品应用笔记
©2012 Guangzhou ZLG MCU Technology Co., Ltd. 1
2. FAQ ............................................................................................................................ 2
3. 实验指导...................................................................................................................3
/* 开启 LESENSE 时钟
*/
/* * PC5 作为电容按键输入，因此 GPIO 需配置为输入输出禁能的浮空状态。
*/
GPIO_PinModeSet(gpioPortC, 5, gpioModeDisabled, 0);
/* * LESENSE 作为电容传感器应用时不需要 DAC，因此不用配置 DAC
3.5
实验参考程序 ........................................................................................................... 3
3.6
实验结果 ................................................................................................................. 10
ห้องสมุดไป่ตู้
3.1
实验目的 ................................................................................................................... 3
3.2
实验设备 ................................................................................................................... 3
/* 禁能低功耗参考电压模式
*/
.enable
= false,
/* 由 LESENSE 控制使能 ACMP
*/
/* * 以下配置根据实际应用配置
*/
.fullBias .halfBias .biasProg
= true, = true, = 0x05,
/* 全偏置电流开启
*/
/* 减半偏置电流开启
*/
LESENSE
EFM32 系列微控制器
EMU_EnterEM2(false);
/* 进入 EM2 深度睡眠模式
*/
}
}
在 LESENSE 容性传感器应用初始化函数中，先配置所需时钟，开启相关模块时钟，在 配置 LESENSE 时钟时，为了得到较高的测量精度，使用 LFXO 作为 LFA 的时钟源。由于 只使用通道 5，因此只需配置通道 5 对应的 PC5 引脚即可。最后调用 ACMP 初始化函数和 LESENSE 初始化函数并清零按键标志位。具体实现代码如程序清单 3.2 所示。
capacitiveInit();
/* 初始化 LESENSE 容性传感器应用 */
LESENSE_ScanStart();
/* 启动 LESENSE 扫描
*/
while(1) {
产品应用笔记
©2012 Guangzhou ZLG MCU Technology Co., Ltd. 3
广州周立功单片机科技有限公司
程序清单 3.2 LESENSE 容性传感器应用初始化函数
void capacitiveInit (void)
{
/*
* PC5 作为电容按键输入，因此只需要开启 ACMP0 的时钟。
*/
CMU_ClockEnable(cmuClock_ACMP0, true);
CMU_ClockEnable(cmuClock_GPIO, true);
图 1.1 LESENSE 结构框图
产品应用笔记
©2012 Guangzhou ZLG MCU Technology Co., Ltd. 1
广州周立功单片机科技有限公司
LESENSE
EFM32 系列微控制器
2. FAQ
1. LESENSE 的扫描序列有哪些触发方式？ A：扫描序列有 PRS 触发、单次触发和周期触发三种触发方式。 PRS 触发：通过 PRS 通道进行触发启动扫描； 单次触发：软件触发启动单次扫描； 周期触发：启动扫描后每次模块内部周期计数器溢出则再次启动扫描。 2. LESENSE 的传感器扫描时序哪些需要注意？ A：LESENSE 有两个可选的时钟源。一个低频时钟源，工作在 LFACLKLESENSE 时钟下。 一个是高频时钟源，工作在 AUXHFRCO 时钟下。激励时间长度、采样延迟可以根据实际需 要选择 LFA 或 AUXHFRCO 作为其时钟源，而启动延迟和测量延迟则只能选择 LFA 作为其 时钟源。 3. LESENSE 支持的解码形式是什么？ A：LESENSE 只支持 16 种状态的可编程状态机。它的输入是由四个位组成的可表达 16 种状态的编码。四个状态位可以由通道采样结果组成，也可以由 PRS 通道的输入组成。 4. LESENSE 的存储结果使用时需要注意什么？ A：LESENSE 的结果缓存是由 16 个半字组成的循环队列。它映射在 LESENSE 内部 RAM 中，对这部分 RAM 进行访问时需要确保其未被禁能。
如程序清单 3.4 所示为 LESENSE 初始化函数。在该函数中主要完成 LESENSE 整体配 置和 LESENSE 通道配置。其中 LESENSE 总体配置中又分为 LESENSE 内核、测量时序和 LESENSE 所使用外设和译码器等四个部分的初始化工作。其中译码器部分在本实验例程中 未使用到。在 LESENSE 通道配置中将采样时间设为 127 个模块时钟周期以获取足够的计数 值，而阈值则根据实际的测量设置为 1200 并配置当计数器值低于阈值时产生中断。配置 LESENSE 每秒钟扫描 5 次，最后开启 LESENSE 总中断。
3.2 实验设备
z 硬件：PC 机一台和 EFM32TG-STK3300 开发板一套； z 软件：IAR（或 Keil）集成开发环境。
3.3 实验内容
本实验主要演示如何使用 LESENSE 实现电容触摸按键应用。 在实验例程中使用 LESENSE 的输入通道 5 检测电容触摸按键的输入，当检测到手指触 摸时 LED 将被点亮，而当手指离开触摸按键时 LED 则被熄灭。
*/ setupACMPCapacitive(); setupLESENSECapacitive();
/* 配置 ACMP 模块
*/
/* 配置 LESENSE 模块
*/
__GucCapButtonFlag = 0;
/* 清 0 标志位
*/
}
在 ACMP 模块的配置中，由于是容性传感器应用，因此选择容性传感器应用配置结构 体初始化 ACMP 模块，其中偏置电流、滞回电压、VDD 分压值和电容感应回路中串联电阻 值等需根据实际应用需求配置。具体实现代码如程序清单 3.3 所示。
3.4 试验步骤
1) 连接开发板 USB 端口到电脑的 USB 端口，打开 MCU 电源； 2) 打开 Keil（或 IAR）工程，重新编译并下载程序； 3) 打开 Simplicity Studio 软件，点击 energyAware Profiler 图标项打开 AEM 监控软件
监控 MCU 运行功耗； 4) 复位 MCU，用手指触摸开发板 TOUCH SLIDER 最左边的触摸按键，观察 LED 灯
广州周立功单片机科技有限公司