蓝牙耳机原理图
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5
4
3
2
1
VBAT VBUS# T11 VBAT
D
R8 R21
220R 680R D4 IN4148
T1 1V5 1V5 1V5 1V5 1V5 P1V8 P1V8 1V5 P1V8 VBAT 1V5 B1 R1 2.2R VBUS
2 1
P2 CON2
P1 M-USB-5P
D
1
1
C8 475 L1 80mAH 80mAH 2.2U
PIO6 PIO7 PIO8
VDD_ANA
VDD_CORE
VDD_PADS
VDD_SMP_CORE
VDD_RADIO
VDD_LO
VDD_AUDIO
BAT_P
VREG_OUT_H
VREGIN_H
VDD_EPROM
VREG_EN_H
VDD_CHG
PIO11
LX
P1V8
T2
L2 15nH
PCM_CLK(SPI_CLK) PCM_OUT(SPI_OUT) PCM_IN(SPI_IN) PCM_SYNC(SPI_CS#)
9
1 2 3 4 5
2
1
1
2
2.2U
2
VER_IN
SPK-
PIO1 PIO2
PIO6 PIO7 PIO8
2
SPK+
12
30
48
43
20
10
11
31
32
33
34
35
36
37
24 23 22 21
46 45 44
1V5
U2
27
6
9
E1 ANT-5020
T3
VREG_EN_L
VREG_IN_L
PIO0 PIO1 PIO2 PIO3
39 41 38 40
T4 24LC32/TSSOP8 T5 T6 T7
C
C
C87 1pF C13 2.2nH
C12 1Hale Waihona Puke Baidup
7 2 4 5
C11 NC
RF_P SPI_PCM#SEL 42
T8 PIO2 PIO1 R7 R10 10K 10K P1V8 v+ v-
GND
INA
DC
3
GND
GND
RF
NC INB
1 UART_TX UART_RX 19 18
T9 T10
8
6
7
8
RF_N TEST_EN 25
开关机 POWER RESET# VER_IN SW1 R11 10K VBAT
U3
FB2012-07L2R4BT
RST#
26
AU_REF_DCPL
AIO0 XTAL_OUT MIC_BIAS XTAL_IN LO_REF AIO1
MIC_BIAS
Y1 16M/8.5pF
1
470R 470R
2
C22 D6 D6 D5 LS1 SPEAKER Red Red 10p
C23 12p
VBAT
C88 104
C89 104
L3
A
MK1 -45dB
1 2
R20 2.2K C14 15p C15 2.2U
2.2K
R12
MIC_BIAS
15nH C21 4.7U
5
4
3
USB
2
10 8
11 7 6
P1V8
C2 223
C3 15pF
R2 R2 2.2R 2.2R C10 C10 2.2U 2.2U
C4 473
C5 C5 R3 R3 103 103 C16 473 2.2R 2.2R C9 2.2U C17 C17 R14 223 223
C6 22uH R9 Blue
Product: Model: APPROVED:
Sheet
1
HEADSET BH139-C6R
v 1
1
of
1
C7
C1 R4 R5 R6 103
2.2K 2.2K 2.2K U1
8
PIO8 PIO6 PIO7
VCC WP SCL SDA
A0 A1 A2 GND
1 2 3 4
7 6 5
3 2 1
SW2
2
3
Q1 NC
A
CYBER-BLUE
DRAWN: CHECKED:
Size A3 Date: Monday, October 17, 2011
17 16
RESET#
B
SPKR_A_N
SPKR_A_P
MIC_A_N
MIC_A_P
LED0
B
LED1
VSS VSS VSS VSS
52 51 50 49
4
3
1
2
5
15
29
28
47
13
14
R19 VBUS#
NC
C19 NC
1 2
R18 NC
3
BC63C159A MIC_A_P MIC_A_N SPK+ SPK-
4
3
2
1
VBAT VBUS# T11 VBAT
D
R8 R21
220R 680R D4 IN4148
T1 1V5 1V5 1V5 1V5 1V5 P1V8 P1V8 1V5 P1V8 VBAT 1V5 B1 R1 2.2R VBUS
2 1
P2 CON2
P1 M-USB-5P
D
1
1
C8 475 L1 80mAH 80mAH 2.2U
PIO6 PIO7 PIO8
VDD_ANA
VDD_CORE
VDD_PADS
VDD_SMP_CORE
VDD_RADIO
VDD_LO
VDD_AUDIO
BAT_P
VREG_OUT_H
VREGIN_H
VDD_EPROM
VREG_EN_H
VDD_CHG
PIO11
LX
P1V8
T2
L2 15nH
PCM_CLK(SPI_CLK) PCM_OUT(SPI_OUT) PCM_IN(SPI_IN) PCM_SYNC(SPI_CS#)
9
1 2 3 4 5
2
1
1
2
2.2U
2
VER_IN
SPK-
PIO1 PIO2
PIO6 PIO7 PIO8
2
SPK+
12
30
48
43
20
10
11
31
32
33
34
35
36
37
24 23 22 21
46 45 44
1V5
U2
27
6
9
E1 ANT-5020
T3
VREG_EN_L
VREG_IN_L
PIO0 PIO1 PIO2 PIO3
39 41 38 40
T4 24LC32/TSSOP8 T5 T6 T7
C
C
C87 1pF C13 2.2nH
C12 1Hale Waihona Puke Baidup
7 2 4 5
C11 NC
RF_P SPI_PCM#SEL 42
T8 PIO2 PIO1 R7 R10 10K 10K P1V8 v+ v-
GND
INA
DC
3
GND
GND
RF
NC INB
1 UART_TX UART_RX 19 18
T9 T10
8
6
7
8
RF_N TEST_EN 25
开关机 POWER RESET# VER_IN SW1 R11 10K VBAT
U3
FB2012-07L2R4BT
RST#
26
AU_REF_DCPL
AIO0 XTAL_OUT MIC_BIAS XTAL_IN LO_REF AIO1
MIC_BIAS
Y1 16M/8.5pF
1
470R 470R
2
C22 D6 D6 D5 LS1 SPEAKER Red Red 10p
C23 12p
VBAT
C88 104
C89 104
L3
A
MK1 -45dB
1 2
R20 2.2K C14 15p C15 2.2U
2.2K
R12
MIC_BIAS
15nH C21 4.7U
5
4
3
USB
2
10 8
11 7 6
P1V8
C2 223
C3 15pF
R2 R2 2.2R 2.2R C10 C10 2.2U 2.2U
C4 473
C5 C5 R3 R3 103 103 C16 473 2.2R 2.2R C9 2.2U C17 C17 R14 223 223
C6 22uH R9 Blue
Product: Model: APPROVED:
Sheet
1
HEADSET BH139-C6R
v 1
1
of
1
C7
C1 R4 R5 R6 103
2.2K 2.2K 2.2K U1
8
PIO8 PIO6 PIO7
VCC WP SCL SDA
A0 A1 A2 GND
1 2 3 4
7 6 5
3 2 1
SW2
2
3
Q1 NC
A
CYBER-BLUE
DRAWN: CHECKED:
Size A3 Date: Monday, October 17, 2011
17 16
RESET#
B
SPKR_A_N
SPKR_A_P
MIC_A_N
MIC_A_P
LED0
B
LED1
VSS VSS VSS VSS
52 51 50 49
4
3
1
2
5
15
29
28
47
13
14
R19 VBUS#
NC
C19 NC
1 2
R18 NC
3
BC63C159A MIC_A_P MIC_A_N SPK+ SPK-