TPA3116D2中文数据表

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单声道数字放大器TPA3116D2DADR

单声道数字放大器TPA3116D2DADRTPA31xxD2系列是立体声有效的，用于驱动扬声器高达100w 1 2Q的单声道数字放大器功率级。

TPA3130D2的高效率允许在没有外部散热器的情况下在单层PCB上工作2x 15 W。

TPA31 18D2可同时运行2X30W18Q和PCB。

如果需要更高的功率，TPA3116D2的功率是2×50W 1 4 Q，其顶侧有一个小散热器PowerPAD。

这三个设备共享相同的占用空间，使得单个PCB能够跨不同的功率级别使用。

TPA31xxD2高级振荡器/PLL电路采用多重开关频率选项来避免AM干扰；这与主或从选项一起实现，使得可以同步多个设备。

TPA31xxD2器件通过短路保护和热保护，以及过压、欠压和直流保护，完全防止故障。

故障被报告回处理器以防止设备损坏过载条件。

单声道数字放大器TPA3116D2DADR的特点：1＊支持多输出配置2×2×50瓦ItoA4-Q BTL负载21 V3（TPA31 16D2）4×2x30W到240BTL负载24V5（TPA31 18D2）6 A 2x15WitoA 8 0 BTL负载在15 V7（TPA31 30D2）8宽电压范围：4.5伏至26伏9、高效D类操作10 A＞90%功率效率低11 LDLE损耗大大降低热沉尺寸-先进的调制方案12×多开关频率13免AM14主从同步15～1.2MHz开关频率16、具有高PSRR的反馈功率级结构降低PSU要求17×可编程功率极限18、差分和单端输入19、单声道单声道立体声和单声道模式20·单电源减少元件数量·集成自保护电路，包括21过压、欠压、过温、直流检测和有错误报告的短路22℃热增强封装23、 DAP（32引脚HTSSOP焊盘）25℃-40℃至85℃环境温度范围单声道数字放大器TPA3116D2DADR 的特点已经介绍清楚了，希望可以帮助越来越多的优秀工程师。

TPA3100D2中文资料

Fault Output
Fault Output
8W 0.1 mF
Shutdown and Mute Control
33 mH 0.1 mF 0.47 mF 0.1 mF 33 mH 220nF 220nF 8W
220nF
220nF
10 V - 26 V
10 mF 1 mF
10 mF 1 mF
SHUTDOWN
4-Step Gain Control Synchronize Multiple Class-D Devices
GAIN0 GAIN1 MSTR/SLV
4-Step Gain Control Synchronize Multiple Class-D Devices
GAIN0 GAIN1 MSTR/SLV
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
UNIT VCC VI Supply voltage Input voltage AVCC, PVCC SHUTDOWN, MUTE GAIN0, GAIN1, RINN, RINP, LINN, LINP, MSTR/SLV, SYNC –0.3 V to 30 V –0.3 V to VCC + 0.3 V –0.3 V to VREG + 0.5 V See Dissipation Rating Table –40°C to 85°C –40°C to 150°C –65°C to 150°C 260°C 3.2 Ω Minimum Human body model Electrostatic discharge Machine model

tpa3118d2规格书

6.1 Absolute Maximum Ratings ...................................... 5 6.2 ESD Ratings ............................................................ 5 6.3 Recommended Operating Conditions....................... 5 6.4 Thermal Information .................................................. 6 6.5 DC Electrical Characteristics .................................... 6 6.6 AC Electrical Characteristics..................................... 7 6.7 Timing Requirements ................................................ 7 6.8 Typical Characteristics .............................................. 8 7 Detailed Description ............................................ 10 7.1 Overview ................................................................. 10 7.2 Functional Block Diagram ....................................... 10

tpa3116d2

ProductFolderSample &BuyTechnicalDocumentsTools &SoftwareSupport &CommunityTPA3116D2,TPA3118D2,TPA3130D2ZHCS891D–APRIL2012–REVISED JANUARY2015 TPA3116D2具有AM干扰抑制功能的15W、30W、50W无滤波器D类立体声放大器系列1特性3说明•支持多种输出配置TPA31xxD2系列器件是用于驱动扬声器的高效立体声数字放大器功率级，单声道模式下的驱动功率高达–21V电压、4Ω桥接负载(BTL)负载条件下的功率为2×50W(TPA3116D2)100W/2Ω。

TPA3130D2的效率非常高，无需外部散–24V电压、8ΩBTL负载条件下的功率为2×热器即可在单层PCB板上提供2×15W的功率。

30W(TPA3118D2)TPA3118D2甚至可以在不使用外部散热器的情况下在–15V电压、8ΩBTL负载条件下的功率为2×双层PCB上提供2×30W/8Ω的功率。

如果需要更高15W(TPA3130D2)的功率，可以选用TPA3116D2，这款器件在其顶层•宽电压范围：4.5V至26V PowerPAD上连接一个小型散热器后可提供2×•高效D类运行50W/4Ω的功率。

所有这三款器件均使用同一种封–兼具>90%的功率效率与低空闲损耗特性，大装，这样一来，使用同一个PCB板即可满足不同功率幅减小了散热器尺寸级的需求。

–高级调制系统配置TPA31xxD2高级振荡器/PLL电路采用多开关频率选项•多重开关频率来抑制AM干扰；搭配使用主从模式选项时，还可使–AM干扰防止多个器件实现同步。

–主从模式同步–高达1.2MHz的切换频率TPA31xxD2器件针对短路、过热、过压、欠压和直流•采用具有高PSRR的反馈功率级架构，降低了等故障提供了全面保护。

TPA3124D2_1中文资料

元器件交易网
TPA3124D2
........................................................................................................................................................................................................ SLOS578 – MAY 2008
I/O Bootstrap I/O for left channel
P Power supply for left-channel H-bridge, not internally connected to PVCCR or AVCC
O Class-D -H-bridge positive output for left channel
The gain of the amplifier is controlled by two gain select pins. The gain selections are 20, 26, 32, and 36 dB.
The patented start-up and shutdown sequences minimize pop noise in the speakers without additional circuitry.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

TPA3116D2的D类数字功放设计与制作

[8]卢学燕.音频功率放大器设计及实现概述[J].计算机光盘软件与应用,2014,17(16):198+200.
[9]倪磊.D类音频功率放大器的分析和设计要素[J].电子与封装,2008(06):21-25+29.
[10] 曾宝国,曾妍.D类功率放大器的原理及应用[J].科技资讯,2008(03):18-19.
西安交通工程学院
毕业设计（论文）中期检查表
学院
电气工程学院
专业
电气工程及其自动化
学生姓名
周杰
学号
14033030150
班级
电气1401
导师姓名
聂怡波
职称
高级工程师
单位
题目名称
基于TPA3116D2的D类数字功放设计制作
检查内容
检查结果
题目是否更换及更换原因
学生出勤情况
进度评价
（完成总工作量的百分比）
本文档中的功率器件D类音频放大器通过高频PWM信号，使其在一个开关处工作，从理论上讲，它的效率可达到100％，但它的缺点是产生高频干扰和噪声，但如果精心设计低通滤波器件的参数，其音质和噪声能够充分满足人们的需求。
第二章功率放大器
2.1简介
把音源器材输出的信号扩大是功率放大器存在的意义, 使信号有充足的功率让音响发声同时又具有满意的性能。功率放大器在状态高电流和高电压下运行, 因此在制造、安装和调试功率放大器的过程中, 每一步直接影响到功放的正常运行和回放质量的声音工作等上。前置放大器接管基于多种来源的控制, 并加强微弱信号的 0.5～1 V, 各种质量控制过程信号, 以提高声音。功率放大器,这是音频信号前置放大器输出的功率放大器, 以驱动扬声器发出声音。
[2] 张杰,张兢,徐勤,王玉菡.“模拟电子技术基础”入门教学方法探讨[J].中国电力教育,2010(01):103-104.

数字功放芯片音质排行

数字功放芯片音质排行数字功放芯片是一种将数字信号转换为模拟音频信号的集成电路芯片。

随着技术的不断创新和发展，数字功放芯片在音频领域的应用越来越广泛。

数字功放芯片的音质表现受到多个因素的影响，包括芯片的采样率、位宽、动态范围、失真率等。

在市场上，有许多品牌和型号的数字功放芯片，其中一些表现出色的芯片被广泛认可和使用。

首先，音质排行榜上的佼佼者之一是TI(Texas Instruments)公司的TPA3116D2芯片。

该芯片采用204kHz的采样率和16-24位宽，具有高达100dB的动态范围，失真率低于0.1%。

TPA3116D2芯片的音质极为细腻，还具有低功耗和高效能的特点，因此受到了许多音频设备制造商的追捧。

其次，ST(意法半导体)公司的TDA7498芯片也是一款表现出色的数字功放芯片。

该芯片采用96kHz的采样率和24位宽，动态范围达到112dB，失真率低于0.05%。

TDA7498芯片的音质清澈透明，细节丰富，足以满足音频发烧友的要求。

另外，ADI(Analog Devices)公司的ADAU1452芯片也是一款备受赞誉的数字功放芯片。

该芯片采用192kHz的采样率和24位宽，动态范围达到123dB，失真率低于0.005%。

ADAU1452芯片的音质非常优秀，细节丰富，动态表现出色，几乎没有任何失真。

除了上述几款，还有一些其他品牌和型号的数字功放芯片也具有出色的音质表现，例如杜邦公司的STA326芯片、麦克斯区域公司的MX9618芯片等等。

总之，数字功放芯片的音质表现受到多个因素的影响，不同的品牌和型号可能有不同的特点和优劣势。

通过对比和评价，我们可以得出一些建议性的音质排行榜，但在购买前还是建议使用者根据自己的需求和喜好进行选择。

最终，好的音效体验会因为个人喜好而有所不同，只有符合个人口味的音质才是最好的。

TPA36D2的D类数字功放设计与制作

TPA36D2的D类数字功放设计与制作
1.设计电路原理图：根据TPA3116D2的数据手册，设计出合适的电路原理图。

主要包括电源电路、输入接口、TPA3116D2芯片和输出电路。

2.PCB设计：根据电路原理图进行PCB设计，将各个元件的布局和连接线路进行布局和打板。

3.制作PCB板：可以使用PCB软件进行打板，然后通过电路板厂商进行制作。

4.元件安装：将打板完成的PCB板上的元件进行安装，包括
TPA3116D2芯片、电容、电阻等。

5.调试：完成元件安装后，将电路连接好，接入电源，用示波器和信号发生器测试电路的工作状态，调试电路参数。

6.输出电平和音质调节：根据需要，可以根据TPA3116D2的数据手册进行调节输出电平和音质。

7.外壳制作和装配：根据实际需求，设计制作适合的外壳，将电路装入外壳中。

8.接口和连接：设计合适的输入输出接口，连接扬声器和音源。

9.测试：对制作完成的数字功放进行测试，例如测试输出功率、音质等指标。

10.最后调整：根据测试结果对电路进行最后的调整和优化。

以上是一个简单的TPA3116D2的D类数字功放设计和制作的流程，需要具备电路设计和制作的基础知识和技术，以及相关测试设备和工具。

同
时，还需要熟悉TPA3116D2的技术规格和参数，以确保设计和制作的功放具备良好的性能和音质。

TITPA3116D22x50WD类音频放大器解决方案

TITPA3116D22x50WD绫婚煶棰戞斁澶у櫒瑙ｅ喅鏂规TI鍏徃鐨凾PA31xxD2绯诲垪鏄珛浣撳０楂樻晥鏁板瓧鍔熺巼鏀惧ぇ鍣?鑳介┍鍔?娆у鎵０鍣ㄩ珮杈?00W.宸ヤ綔鐢靛帇4.5 V – 26 V,鏁堢巼澶т簬90%,TPA3130D2鐨勯珮鏁堢巼鍙噰鐢ㄥ崟灞侾CB,涓嶇敤鏁ｇ儹鍣ㄦ彁渚?x15W杈撳嚭鍔熺巼, TPA3118D2閲囩敤鍙屽眰PCB, 涓嶇敤鏁ｇ儹鍣ㄦ彁渚?x30W/8娆у杈撳嚭鍔熺巼, TPA3116D2閲囩敤灏忓瀷鏁ｇ儹鍣ㄥ彲鎻愪緵2x50W/4Ω杈撳嚭鍔熺巼,涓昏鐢ㄤ簬灏?寰瀷鍏冧欢鐨勬潯褰㈤煶绠?鍚庡競鍦烘苯杞︾數瀛?CRT TV鍜屾秷璐圭被闊抽.鏈枃浠嬬粛浜員PA31xxD2涓昏鐗规€?鏂规鍥? 搴旂敤鐢佃矾鍥句互鍙婅瘎浼版澘TPA3116D2EVM涓昏鎸囨爣,鐢佃矾鍥?鏉愭枡娓呭崟鍜孭CB甯冨眬鍥?The TPA31xxD2 series are stereo efficient, digital amplifier power stage for driving speakers up to 100W/2Ω in mono. The high efficiency of the TPA3130D2 allows it to do 2x15W without external heat sink on a single layer PCB. The TPA3118D2 can even run 2x30W/8Ω without heat sink on a dual layer PCB. If even higher power is needed the TPA3116D2 does 2x50W/4Ω with a small heat-sink attached to its top side PowerPad. All three devices share the same footprint enabling a single PCB to be used across different power levels.The TPA31xxD2 advanced oscillator/PLL circuit employs a multiple switching frequency option to avoid AM interferences; this is achieved together with an option of Master/Slave option, making it possible to synchronize multiple devices.The TPA31xxD2 devices are fully protected against faults with short-circuit protection and thermal protection as well as over-voltage, under-voltage and DC protection. Faults are reported back to the processor to prevent devices from being damaged during overload conditions.TPA31xxD2涓昏鐗规€?Supports Multiple Output Configurations2×50-W into a 4-Ω BTL Load at 21 V (TPA3116D2)2×30-W into a 8-Ω BTL Load at 24 V (TPA3118D2)2×15-W into a 8-Ω BTL Load at 15 V (TPA3130D2)Wide Voltage Range: 4.5 V – 26 VEfficient Class-D Operation>90% Power Efficiency Combined with Low Idle LossGreatly Reduces Heat Sink SizeAdvanced Modulation SchemesMultiple Switching FrequenciesAM AvoidanceMaster/Slave SynchronizationUp to 1.2 MHz Switching FrequencyFeedback Power Stage Architecture with High PSRR Reduces PSU RequirementsProgrammable Power LimitDifferential/Single-Ended InputsStereo and Mono Mode with Single Filter Mono ConfigurationSingle Power Supply Reduces Component CountIntegrated Self-Protection Circuits IncludingOver-Voltage, Under-Voltage, Over-Temperature, DC-Detect, andShort Circuit with Error ReportingThermally Enhanced PackagesDAD (32-pin HTSSOP Pad-up)DAP (32-pin HTSSOP Pad-down)–40鈩?to 85鈩?Ambient Temperature RangeTPA31xxD2搴旂敤:Mini-Micro Component, Speaker Bar, DocksAfter-Market AutomotiveCRT TVConsumer Audio Applications鍥?. TPA31xxD2绯诲垪鏂规鍥惧浘2. TPA31xxD2绯诲垪绠€鍖栧簲鐢ㄧ數璺浘鍥?. TPA31xxD2绯诲垪搴旂敤鐢佃矾鍥捐瘎浼版澘TPA3116D2EVMThe TPA3116D2EVM evaluation module (EVM) demonstrates the integrated circuits TPA3116D2 from Texas Instruments (TI).The TPA3116D2 is a 50-W (per channel), efficient, stereo, digital-amplifier power stage for driving two bridge-tied speakers or a single parallel bridge-tied load. The TPA3116D2 can drive a speaker with an impedance as low as 3.2 Ω (4 Ω typical).The TPA3116D2 is available in a 32-pin TSSOP.The TPA3116D2 evaluation module consists of a single 50-W, Class-D,stereo audio power amplifier complete with a small number of external components mounted on a circuit board that can be used to directly drive a speaker with an external analog audio source as the input. The EVM’s default output filter configuration supports LC filter operation, but can easily be configured to support filter-free operation or micro inductors. The EVM can also be configured as a 100-W, Class-D mono audio power amplifier.Designers can quickly evaluate the sound quality and verify specifications in their application with the TPA3116D2EVM. In addition, the TPA3116D2EVM User’s Guide contains the schematic, layout and bill of materials for a reference design.璇勪及鏉縏PA3116D2EVM 涓昏鎸囨爣:鍥?. 璇勪及鏉縏PA3116D2EVM 澶栧舰鍥惧浘5. 璇勪及鏉縏PA3116D2EVM鐢佃矾鍥捐瘎浼版澘TPA3116D2EVM 鏉愭枡娓呭崟:鍥?. 璇勪及鏉縏PA3116D2EVM PCB甯冨眬鍥捐鎯呰瑙?/lit/ds/symlink/tpa3116d2.pdf鍜?lit/ug/slou336a/slou336a.pdf。

tpa3118d2规格书

TPA3116D2 PDF

TPA3116D2TPA3118D2TPA3130D2SLOS708B –APRIL 2012–REVISED MAY 201215W,30W,50W Filter-Free Class-D Stereo Amplifier Family with AM AvoidanceCheck for Samples:TPA3116D2,TPA3118D2,TPA3130D2FEATURESDESCRIPTIONThe TPA31xxD2series are stereo efficient,digital •Supports Multiple Output Configurations amplifier power stage for driving speakers up to –2×50-W into a 4-ΩBTL Load at 21V 100W/2Ωin mono.The high efficiency of the (TPA3116D2)TPA3130D2allows it to do 2x15W without external –2×30-W into a 8-ΩBTL Load at 24V heat sink on a single layer PCB.The TPA3118D2can even run 2x30W/8Ωwithout heat sink on a dual layer (TPA3118D2)PCB.If even higher power is needed the TPA3116D2–2×15-W into a 8-ΩBTL Load at 15V does 2x50W/4Ωwith a small heat-sink attached to its (TPA3130D2)top side PowerPad.All three devices share the same •Wide Voltage Range:4.5V –26V footprint enabling a single PCB to be used across different power levels.•Efficient Class-D Operation–>90%Power Efficiency Combined with Low The TPA31xxD2advanced oscillator/PLL circuit Idle Loss Greatly Reduces Heat Sink Size employs a multiple switching frequency option to avoid AM interferences;this is achieved together with –Advanced Modulation Schemes an option of Master/Slave option,making it possible •Multiple Switching Frequencies to synchronize multiple devices.–AM AvoidanceThe TPA31xxD2devices are fully protected against –Master/Slave Synchronizationfaults with short-circuit protection and thermal –Up to 1.2MHz Switching Frequencyprotection as well as over-voltage,under-voltage and DC protection.Faults are reported back to the •Feedback Power Stage Architecture with High processor to prevent devices from being damaged PSRR Reduces PSU Requirements during overload conditions.•Programmable Power Limit•Differential/Single-Ended InputsSimplified Application Circuit•Stereo and Mono Mode with Single Filter Mono Configuration•Single Power Supply Reduces Component Count•Integrated Self-Protection Circuits Including Over-Voltage,Under-Voltage,Over-Temperature,DC-Detect,and Short Circuit with Error Reporting•Thermally Enhanced Packages –DAD (32-pin HTSSOP Pad-up)DEVICE POWER HTSSOP 32-PIN –DAP (32-pin HTSSOP Pad-down)TPA3130D22x 15W/8ΩPad down (DAP)•–40°C to 85°C Ambient Temperature RangeTPA3118D22x 30W/8ΩPad down (DAP)TPA3116D22x 50W/4ΩPad up (DAD)APPLICATIONS•Mini-Micro Component,Speaker Bar,Docks •After-Market Automotive •CRT TV•Consumer Audio ApplicationsPlease be aware that an important notice concerning availability,standard warranty,and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PACKAGE (TOP VIEW)FAULTZ SDZ SYNCAM0AM1MUTE LINN LINP PLIMIT RINN GVDD RINP AVCCOUTPR PVCC BSPL GND OUTPL PVCC OUTNL BSNL PVCC OUTNR BSNR MODSELBSPR GND GND PVCC GND GAIN/SLVAM2PACKAGE (TOP VIEW)FAULTZ SDZ SYNCAM0AM1MUTE LINN LINP PLIMIT RINN GVDD RINP AVCCOUTPR PVCC BSPL GND OUTPL PVCC OUTNL BSNL PVCC OUTNR BSNR MODSELBSPR GND GND PVCC GND GAIN/SLVAM2TPA3116D2TPA3118D2TPA3130D2SLOS708B –APRIL 2012–REVISED MAY 2012These devices have limited built-in ESD protection.The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.TERMINAL ASSIGNMENTTPA3116D2TPA3130D2and TPA3118D232-PIN HTSSOP PACKAGE (DAD)32-PIN HTSSOP PACKAGE (DAP)Terminal FunctionsPINTYPE (1)DESCRIPTION 1MODSEL I Mode selection logic input (LOW =BD mode,HIGH =1SPW mode).TTL logic levels with compliance to AVCC.2SDZ I Shutdown logic input for audio amp (LOW =outputs Hi-Z,HIGH =outputs enabled).TTL logic levels with compliance to AVCC.3FAULTZDOGeneral fault reporting including Over-temp,DC Detect.Open drain.FAULTZ =High,normal operation FAULTZ =Low,fault condition4RINP I Positive audio input for right channel.Biased at 3V.5RINN I Negative audio input for right channel.Biased at 3V.6PLIMIT I Power limit level adjust.Connect a resistor divider from GVDD to GND to set power limit.Connect directly to GVDD for no power limit.7GVDD PO Internally generated gate voltage supply.Not to be used as a supply or connected to any component other than a 1µF X7R ceramic decoupling capacitor and the PLIMIT and GAIN/SLV resistor dividers.8GAIN/SLV I Selects Gain and selects between Master and Slave mode depending on pin voltage divider.9GND G Ground10LINP I Positive audio input for left channel.Biased at 3V.Connect to GND for PBTL mode.11LINN I Negative audio input for left channel.Biased at 3V.Connect to GND for PBTL mode.12MUTE I Mute signal for fast disable/enable of outputs (HIGH =outputs Hi-Z,LOW =outputs enabled).TTL logic levels with compliance to AVCC.13AM2I AM Avoidance Frequency Selection 14AM1IAM Avoidance Frequency Selection(1)TYPE :DO =Digital Output,I =Analog Input,G =General Ground,PO =Power Output,BST =Boot Strap.TPA3116D2TPA3118D2TPA3130D2 SLOS708B–APRIL2012–REVISED MAY2012Terminal Functions(continued)PINTYPE(1)DESCRIPTION15AM0I AM Avoidance Frequency Selection16SYNC DIO Clock input/output for synchronizing multiple class-D devices.Direction determined by GAIN/SLV terminal. 17AVCC P Analog Supply18PVCC P Power supply19PVCC P Power supply20BSNL BST Boot strap for negative left channel output,connect to220nF X5R,or better ceramic cap to OUTPL21OUTNL PO Negative left channel output22GND G Ground23OUTPL PO Positive left channel output24BSPL BST Boot strap for positive left channel output,connect to220nF X5R,or better ceramic cap to OUTNL25GND G Ground26BSNR BST Boot strap for negative right channel output,connect to220nF X5R,or better ceramic cap to OUTNR27OUTNR PO Negative right channel output28GND G Ground29OUTPR PO Positive right channel output30BSPR BST Boot strap for positive right channel output,connect to220nF X5R or better ceramic cap to OUTPR31PVCC P Power supply32PVCC P Power supply33Thermal Pad G Connect to GND for best system performance.If not connected to GND,leave floating.orPowerPADSDZ GAINRINP RINNFAULTZAVCCGVDDLINN LINPGNDOUTPLBSPLGNDOUTNLGNDGNDBSPRPadTPA3116D2TPA3118D2TPA3130D2SLOS708B –APRIL 2012–REVISED MAY 2012SYSTEM BLOCK DIAGRAMTPA3116D2TPA3118D2TPA3130D2 SLOS708B–APRIL2012–REVISED MAY2012 ABSOLUTE MAXIMUM RATINGSover operating free-air temperature range(unless otherwise noted)(1)VALUE UNIT Supply voltage,V CC PV CC,AV CC–0.3to30VINPL,INNL,INPR,INNR–0.3to6.3V Input voltage,V I PLIMIT,GAIN/SLV,SYNC–0.3to GVDD+0.3VAM0,AM1,AM2,MUTE,SDZ,MODSEL–0.3to PVCC+0.3V Slew rate,maximum(2)AM0,AM1,AM2,MUTE,SDZ,MODSEL10V/msec Operating free-air temperature,T A–40to85°C Operating junction temperature range,T J–40to150°C Storage temperature range,T stg–40to125°C Electrostatic discharge:Human body model,ESD±2kV Electrostatic discharge:Charged device model,ESD±500V (1)Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device.These are stress ratingsonly,and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2)100kΩseries resistor is needed if maximum slew rate is exceeded.THERMAL INFORMATIONTPA3130D2TPA3118D2TPA3116D2DAP DAP DADTHERMAL METRIC(1)UNITS1Layer PCB(2)2Layer PCB(3)Heatsink(4)32PINS32PINS32PINSθJA Junction-to-ambient thermal resistance362214ψJT Junction-to-top characterization parameter0.40.3 1.2°C/W ψJB Junction-to-board characterization parameter 5.9 4.8 5.7(1)For more information about traditional and new thermal metrics,see the IC Package Thermal Metrics application report,SPRA953.(2)For the PCB layout please see the TPA3130D2EVM user guide.A1layer90x85mm1oc PCB was used(3)For the PCB layout please see the TPA3130D2EVM user guide.A2layer90x85mm1oc PCB was used(4)The heat sink drawing used for the thermal model data are shown in the application section,size:14mm wide,50mm long,25mm high. RECOMMENDED OPERATING CONDITIONSover operating free-air temperature range(unless otherwise noted)MIN NOM MAX UNIT V CC Supply voltage PV CC,AV CC 4.526VHigh-level inputV IH AM0,AM1,AM2,MUTE,SDZ,SYNC,MODSEL2V voltageLow-level inputV IL AM0,AM1,AM2,MUTE,SDZ,SYNC,MODSEL0.8V voltageLow-level outputV OL FAULTZ,R PULL-UP=100kΩ,PV CC=26V0.8V voltageHigh-level inputI IH AM0,AM1,AM2,MUTE,SDZ,MODSEL(V I=2V,V CC=18V)50µAcurrentTPA3116D2,TPA3118D2 3.24R L(BTL)Output filter:L=10µH,C=680nFTPA3130D2 5.68 Minimum loadΩImpedance TPA3116D2,TPA3118D2 1.6R L(PBTL)Output filter:L=10µH,C=1µFTPA3130D2 3.24Output-filterL o Minimum output filter inductance under short-circuit condition1µH InductanceCopyright©2012,Texas Instruments Incorporated Submit Documentation Feedback5TPA3116D2TPA3118D2TPA3130D2SLOS708B–APRIL2012–REVISED DC ELECTRICAL CHARACTERISTICST A=25°C,AV CC=PV CC=12V to24V,R L=4Ω(unless otherwise noted)PARAMETER TEST CONDITIONS MIN TYP MAX UNITClass-D output offset voltage(measured|V OS|V I=0V,Gain=36dB 1.515mV differentially)SDZ=2V,No load or filter,PV CC=12V2035I CC Quiescent supply current mASDZ=2V,No load or filter,PV CC=24V3250SDZ=0.8V,No load or filter,PV CC=12V<50 Quiescent supply current in shutdownI CC(SD)µAmode SDZ=0.8V,No load or filter,PV=24V50400CCDrain-source on-state resistance,r DS(on)PV CC=21V,I out=500mA,T J=25°C120mΩmeasured pin to pinR1=open,R2=20kΩ192021dBR1=100kΩ,R2=20kΩ252627G Gain(BTL)R1=100kΩ,R2=39kΩ313233dBR1=75kΩ,R2=47kΩ353637R1=51kΩ,R2=51kΩ192021dBR1=47kΩ,R2=75kΩ252627G Gain(SLV)R1=39kΩ,R2=100kΩ313233dBR1=16kΩ,R2=100kΩ353637t on Turn-on time SDZ=2V10mst OFF Turn-off time SDZ=0.8V2µs GVDD Gate drive supply IGVDD<200µA 6.4 6.97.4VOutput voltage maximum under PLIMITV O V(PLIMIT)=2V;V I=1V rms 6.757.908.75V controlAC ELECTRICAL CHARACTERISTICST A=25°C,AV CC=PV CC=12V to24V,R L=4Ω(unless otherwise noted)PARAMETER TEST CONDITIONS MIN TYP MAX UNIT200mV PP ripple at1kHz,Gain=20dB,Inputs AC-KSVR Power supply ripple rejection–70dBcoupled to GNDTHD+N=10%,f=1kHz,PV CC=14.4V25P O Continuous output power WTHD+N=10%,f=1kHz,PV CC=21V50THD+N Total harmonic distortion+noise V CC=21V,f=1kHz,P O=25W(half-power)0.1%65µV Vn Output integrated noise20Hz to22kHz,A-weighted filter,Gain=20dB–80dBVCrosstalk V O=1V rms,Gain=20dB,f=1kHz–100dBMaximum output at THD+N<1%,f=1kHz,Gain=20dB,SNR Signal-to-noise ratio102dBA-weightedAM2=0,AM1=0,AM0=0376400424AM2=0,AM1=0,AM0=1470500530AM2=0,AM1=1,AM0=0564600636AM2=0,AM1=1,AM0=194010001060f OSC Oscillator frequency kHzAM2=1,AM1=0,AM0=0112812001278AM2=1,AM1=0,AM0=1AM2=1,AM1=1,AM0=0ReservedAM2=1,AM1=1,AM0=1Thermal trip point150+°CThermal hysteresis15°CTPA3130D2 4.5 Over current trip point ATPA3118D2,TPA3116D27.56Submit Documentation Feedback Copyright©2012,Texas Instruments Incorporated0.0010.010.1110Frequency (Hz)T H D +N (%)G0020.0010.010.1110Frequency (Hz)T H D +N (%)G0030.0010.010.1110Frequency (Hz)T H D +N (%)G0040.0010.010.1110Frequency (Hz)T H D +N (%)G005TPA3116D2TPA3118D2TPA3130D2SLOS708B –APRIL 2012–REVISED MAY 2012TYPICAL CHARACTERISTICSf s =400kHz,BD Mode (unless otherwise noted)TOTAL HARMONIC DISTORTION +NOISE (BTL)TOTAL HARMONIC DISTORTION +NOISE (BTL)vsvsFREQUENCYFREQUENCYFigure 1.Figure 2.TOTAL HARMONIC DISTORTION +NOISE (BTL)TOTAL HARMONIC DISTORTION +NOISE (BTL)vsvsFREQUENCYFREQUENCYFigure 3.Figure 4.Copyright ©2012,Texas Instruments Incorporated Submit Documentation Feedback 70.0010.010.1110Frequency (Hz)T H D +N (%)G006Output Power (W)T H D +N (%)G008Output Power (W)T H D +N (%)G009Output Power (W)T H D +N (%)G010TPA3116D2TPA3118D2TPA3130D2SLOS708B –APRIL 2012–REVISED MAY 2012TYPICAL CHARACTERISTICS (continued)f s =400kHz,BD Mode (unless otherwise noted)TOTAL HARMONIC DISTORTION +NOISE (BTL)TOTAL HARMONIC DISTORTION +NOISE (BTL)vsvsFREQUENCYOUTPUT POWERFigure 5.Figure 6.TOTAL HARMONIC DISTORTION +NOISE (BTL)TOTAL HARMONIC DISTORTION +NOISE (BTL)vsvsOUTPUT POWEROUTPUT POWERFigure 7.Figure 8.8Submit Documentation Feedback Copyright ©2012,Texas Instruments IncorporatedOutput Power (W)T H D +N (%)G011Output Power (W)T H D +N (%)G012−500−400−300−200−1000100200300Frequency (Hz)G a i n (d B )P h a s e (°)G0141020304050PLIMIT Voltage (V)O u t p u t P o w e r (W )G013TPA3116D2TPA3118D2TPA3130D2SLOS708B –APRIL 2012–REVISED MAY 2012TYPICAL CHARACTERISTICS (continued)f s =400kHz,BD Mode (unless otherwise noted)TOTAL HARMONIC DISTORTION +NOISE (BTL)TOTAL HARMONIC DISTORTION +NOISE (BTL)vsvsOUTPUT POWEROUTPUT POWERFigure 9.Figure 10.OUTPUT POWER (BTL)GAIN/PHASE (BTL)vsvsPLIMIT VOLTAGEFREQUENCYFigure 11.Figure 12.Copyright ©2012,Texas Instruments Incorporated Submit Documentation Feedback 95101520253035404550Supply Voltage (V)M a x i m u m O u t p u t P o w e r (W )G0155101520253035404550556065707580859095100Supply Voltage (V)M a x i m u m O u t p u t P o w e r (W )G016102030405060708090100Output Power (W)P o w e r E f f i c i e n c y (%)G017102030405060708090100Output Power (W)P o w e r E f f i c i e n c y (%)G018TPA3116D2TPA3118D2TPA3130D2SLOS708B –APRIL 2012–REVISED MAY 2012TYPICAL CHARACTERISTICS (continued)f s =400kHz,BD Mode (unless otherwise noted)MAXIMUM OUTPUT POWER (BTL)MAXIMUM OUTPUT POWER (BTL)vsvsSUPPLY VOLTAGESUPPLY VOLTAGEFigure 13.Figure 14.POWER EFFICIENCY (BTL)POWER EFFICIENCY (BTL)vsvsOUTPUT POWEROUTPUT POWERFigure 15.Figure 16.10Submit Documentation Feedback Copyright ©2012,Texas Instruments Incorporated−140−130−120−110−100−90−80−70−60−50−40−30−20−100Frequency (Hz)C r o s s t a l k (d B )G021−140−130−120−110−100−90−80−70−60−50−40−30−20−100Frequency (Hz)C r o s s t a l k (d B )G022−100−90−80−70−60−50−40−30−20−100Frequency (Hz)k S V R (d B )G0230.0010.010.1110Frequency (Hz)T H D +N (%)G024f s =400kHz,BD Mode (unless otherwise noted)CROSSTALKCROSSTALKvsvsFREQUENCYFREQUENCYFigure 17.Figure 18.SUPPLY RIPPLE REJECTION RATIO (BTL)TOTAL HARMONIC DISTORTION +NOISE (PBTL)vsvsFREQUENCYFREQUENCYFigure 19.Figure 20.Output Power (W)T H D +N (%)G02520406080100120140160180Supply Voltage (V)M a x i m u m O u t p u t P o w e r (W )G027102030405060708090100Output Power (W)P o w e r E f f i c i e n c y (%)G028−100−90−80−70−60−50−40−30−20−100Frequency (Hz)k S V R (d B )G030f s =400kHz,BD Mode (unless otherwise noted)TOTAL HARMONIC DISTORTION +NOISE (PBTL)MAXIMUM OUTPUT POWER (PBTL)vsvsOUTPUT POWERSUPPLY VOLTAGEFigure 21.Figure 22.POWER EFFICIENCY (PBTL)SUPPLY RIPPLE REJECTION RATIO (PBTL)vsvsOUTPUT POWERFREQUENCYFigure 23.Figure 24.Output Power (W)T H D +N (%)G0320102030405060708090100110120130140Supply Voltage (V)M a x i m u m O u t p u t P o w e r (W )G034f s =400kHz,BD Mode (unless otherwise noted)TOTAL HARMONIC DISTORTION +NOISE (PBTL)MAXIMUM OUTPUT POWER (PBTL)vsvsOUTPUT POWERSUPPLY VOLTAGEFigure 25.Figure 26.DEVICE INFORMATIONTYPICAL APPLICATIONPVCC DECOUPLINGFigure27.SchematicA2.1solution,U1TPA3116D2in Master mode400kHz,BTL,gain if20dB,power limit not implemented.U2in Slave,PBTL mode gain of20dB.Inputs are connected for differential inputs.In the following sections the TPA3116D2,TPA3118D2,and TPA3130D2are referred to as:TPA31xxD2family.i i 1f 2Z C p =ƒGAIN SETTING AND MASTER /SLAVEThe gain of the TPA31xxD2family is set by the voltage divider connected to the GAIN/SLV control pin.Master or Slave mode is also controlled by the same pin.An internal ADC is used to detect the 8input states.The first four stages sets the GAIN in Master mode in gains of 20,26,32,36dB respectively,while the next four stages sets the GAIN in Slave mode in gains of 20,26,32,36dB respectively.The gain setting is latched during power-up and cannot be changed while device is powered.Table 1shows the recommended resistor values and the state and gain:Table 1.GAIN and MASTER/SLAVEMASTER /SLAVEGAIN R1(to GND)(1)R2(to GVDD)(1)INPUT IMPEDANCEMODEMaster 20dB 5.6k ΩOPEN 60k ΩMaster 26dB 20k Ω100k Ω30k ΩMaster 32dB 39k Ω100k Ω15k ΩMaster 36dB 47k Ω75k Ω9k ΩSlave 20dB 51k Ω51k Ω60k ΩSlave 26dB 75k Ω47k Ω30k ΩSlave 32dB 100k Ω39k Ω15k ΩSlave36dB100k Ω16k Ω9k Ω(1)Resistor tolerance should be 5%or better.In Master mode,SYNC terminal is an output,in Slave mode,SYNC terminal is an input for a clock input.TTL logic levels with compliance to GVDD.INPUT IMPEDANCEThe TPA31xxD2family input stage is a fully differential input stage and the input impedance changes with the gain setting from 9k Ωat 36dB gain to 60k Ωat 20dB gain.Table 1lists the values from min to max gain.The tolerance of the input resistor value is ±20%so the minimum value will be higher than 7.2k Ω.The inputs need to be AC-coupled to minimize the output dc-offset and ensure correct ramping of the output voltages during power-ON and power-OFF.The input ac-coupling capacitor together with the input impedance forms a high-pass filter with the following cut-off frequency:(1)If a flat bass response is required down to 20Hz the recommended cut-off frequency is a tenth of that,2Hz.Table 2lists the recommended ac-couplings capacitors for each gain step.If a -3dB is accepted at 20Hz 10times lower capacitors can used –for example,a 1µF can be used.Table 2.Recommended Input AC-Coupling CapacitorsGAIN INPUT IMPEDANCEINPUT CAPACITANCEHIGH-PASS FILTER20dB 60k Ω 1.5µF 1.8Hz 26dB 30k Ω 3.3µF 1.6Hz 32dB 15k Ω 5.6µF 2.3Hz 36dB9k Ω10µF1.8HzInput SignalThe input capacitors used should be a type with low leakage,like quality electrolytic,tantalum or ceramic.If a polarized type is used the positive connection should face the input pins which are biased to 3Vdc.START-UP/SHUTDOWN OPERATIONThe TPA31xxD2family employs a shutdown mode of operation designed to reduce supply current (Icc)to the absolute minimum level during periods of nonuse for power conservation.The SDZ input terminal should be held high (see specification table for trip point)during normal operation when the amplifier is in use.Pulling SDZ low will put the outputs to mute and the amplifier to enter a low-current state.It is not recommended to leave SDZ unconnected,because amplifier operation would be unpredictable.For the best power-off pop performance,place the amplifier in the shutdown mode prior to removing the power supply.The gain setting is selected at the end of the start-up cycle.At the end of the start-up cycle,the gain is selected and cannot be changed until the next power-up.PLIMIT OPERATIONThe TPA31xxD2family has a built-in voltage limiter that can be used to limit the output voltage level below the supply rail,the amplifier simply operates as if it was powered by a lower supply voltage,and thereby limits the output power.Add a resistor divider from GVDD to ground to set the voltage at the PLIMIT pin.An external reference may also be used if tighter tolerance is required.Add a 1µF capacitor from pin PLIMIT to ground to ensure stability.It is recommended to connect PLIMIT to GVDD when using 1SPW-modulation mode.Figure 28.POWER LIMIT ExampleThe PLIMIT circuit sets a limit on the output peak-to-peak voltage.The limiting is done by limiting the duty cycle to a fixed maximum value.This limit can be thought of as a "virtual"voltage rail which is lower than the supply connected to PVCC.This "virtual"rail is approximately 4times the voltage at the PLIMIT pin.This output voltage can be used to calculate the maximum output power for a given maximum input voltage and speaker impedance.2LP L S OUTLR V R +2R P =for unclipped power2R æöæö´ç÷ç÷ç÷´èøèø´(2)Where:R S is the total series resistance including R DS(on),and output filter resistance.R L is the load resistance.V P is the peak amplitudeV P =4×PLIMIT voltage if PLIMIT <4×V P P OUT (10%THD)=1.25×P OUT (unclipped)Table 3.POWER LIMIT ExamplePV CC (V)PLIMIT VOLTAGE (V)(1)R to GND R to GVDD OUTPUT VOLTAGE (V rms )24V GVDD Short Open 17.9024V 3.345k Ω51k Ω12.6724V 2.2524k Ω51k Ω9.0012V GVDD Short Open 10.3312V 2.2524k Ω51k Ω9.0012V1.518k Ω68k Ω6.30(1)PLIMIT measurements taken with EVM gain set to 26dB and input voltage set to 1V rms .GVDD SUPPLYThe GVDD Supply is used to power the gates of the output full bridge transistors.It can also be used to supply the PLIMIT and GAIN/SLV voltage dividers.Decouple GVDD with a X5R ceramic 1µF capacitor to GND.The GVDD supply is not intended to be used for external supply.It is recommended to limit the current consumption by using resistor voltage dividers for GAIN/SLV and PLIMIT of 100k Ωor more.BSPx AND BSNx CAPACITORSThe full H-bridge output stages use only NMOS transistors.Therefore,they require bootstrap capacitors for the high side of each output to turn on correctly.A 220nF ceramic capacitor of quality X5R or better,rated for at least 16V,must be connected from each output to its corresponding bootstrap input.(See the application circuit diagram in Figure 27.)The bootstrap capacitors connected between the BSxx pins and corresponding output function as a floating power supply for the high-side N-channel power MOSFET gate drive circuitry.During each high-side switching cycle,the bootstrap capacitors hold the gate-to-source voltage high enough to keep the high-side MOSFETs turned on.DIFFERENTIAL INPUTSThe differential input stage of the amplifier cancels any noise that appears on both input lines of the channel.To use the TPA31xxD2family with a differential source,connect the positive lead of the audio source to the RINP or LINP input and the negative lead from the audio source to the RINN or LINN input.To use the TPA31xxD2family with a single-ended source,ac ground the negative input through a capacitor equal in value to the input capacitor on positive and apply the audio source to either input.In a single-ended input application,the unused input should be ac grounded at the audio source instead of at the device input for best noise performance.For good transient performance,the impedance seen at each of the two differential inputs should be the same.The impedance seen at the inputs should be limited to an RC time constant of 1ms or less if possible.This is to allow the input dc blocking capacitors to become completely charged during the 10ms power-up time.If the input capacitors are not allowed to completely charge,there will be some additional sensitivity to component matching which can result in pop if the input components are not well matched.MONO MODE (PBTL)The TPA31xxD2family can be connected in MONO mode enabling up to 100W output power.This is done by:•Connect INPL and INNL directly to Ground (without capacitors)this sets the device in Mono mode during power up.•Connect OUTPR and OUTNR together for the positive speaker terminal and OUTNL and OUTPL together for the negative terminal•Analog input signal is applied to INPR and INNRDEVICE PROTECTION SYSTEMThe TPA31xxD2family contains a complete set of protection circuits carefully designed to make system design efficient as well as to protect the device against any kind of permanent failures due to short circuits,overload,over temperature,and under-voltage.The FAULTZ pin will signal if an error is detected according to the fault table below:Table 4.Fault ReportingTRIGGERING CONDITIONLATCHED/SELF-FAULT FAULTZ ACTION(typical value)CLEARINGOver Current Output short or short to PVCC or GNDLow Output high impedance Latched Over Temperature T j >150°C Low Output high impedance Latched Too High DC Offset DC output voltage Low Output high impedance Latched Under Voltage onPVCC <4.5V –Output high impedance Self-clearing PVCC Over Voltage onPVCC >27V–Output high impedanceSelf-clearingPVCCDC DETECT PROTECTIONThe TPA31xxD2family has circuitry which will protect the speakers from DC current which might occur due to defective capacitors on the input or shorts on the printed circuit board at the inputs.A DC detect fault will be reported on the FAULT pin as a low state.The DC Detect fault will also cause the amplifier to shutdown by changing the state of the outputs to Hi-Z.If automatic recovery from the short circuit protection latch is desired,connect the FAULTZ pin directly to the SDZ pin.This allows the FAULTZ pin function to automatically drive the SDZ pin low which clears the DC Detect protection latch.A DC Detect Fault is issued when the output differential duty-cycle of either channel exceeds 60%for more than 420msec at the same polarity.Table x below shows some examples of the typical DC Detect Protection threshold for several values of the supply voltage.This feature protects the speaker from large DC currents or AC currents less than 2Hz.To avoid nuisance faults due to the DC detect circuit,hold the SD pin low at power-up until the signals at the inputs are stable.Also,take care to match the impedance seen at the positive and negative inputs to avoid nuisance DC detect faults.The minimum output offset voltages required to trigger the DC detect are show in Table 5.The outputs must remain at or above the voltage listed in the table for more than 420msec to trigger the DC detect.Table 5.DC Detect ThresholdPV CC (V)V OS -OUTPUT OFFSET VOLTAGE (V)4.50.966 1.3012 2.60183.90SHORT-CIRCUIT PROTECTION AND AUTOMATIC RECOVERY FEATUREThe TPA31xxD2family has protection from over current conditions caused by a short circuit on the output stage.The short circuit protection fault is reported on the FAULTZ pin as a low state.The amplifier outputs are switched to a high impedance state when the short circuit protection latch is engaged.The latch can be cleared by cycling the SDZ pin through the low state.If automatic recovery from the short circuit protection latch is desired,connect the FAULTZ pin directly to the SDZ pin.This allows the FAULTZ pin function to automatically drive the SDZ pin low which clears the short-circuit protection latch.In systems where a possibility of a permanent short from the output to PVDD or to a high voltage battery like a car battery can occur,pull the MUTE pin low with the FAULTZ signal with a inverting transistor to ensure a high-Z restart,like shown in the figure below:Figure 29.MUTE Driven by Inverted FAULTZ Figure 30.Timing Requirement for SDZTHERMAL PROTECTIONThermal protection on the TPA31xxD2family prevents damage to the device when the internal die temperature exceeds 150°C.There is a ±15°C tolerance on this trip point from device to device.Once the die temperature exceeds the thermal trip point,the device enters into the shutdown state and the outputs are disabled.This is a latched fault.Thermal protection faults are reported on the FAULTZ terminal as a low state.If automatic recovery from the thermal protection latch is desired,connect the FAULTZ pin directly to the SDZ pin.This allows the FAULTZ pin function to automatically drive the SDZ pin low which clears the thermal protection latch.。

MEMORY存储芯片TPA3118D2DAPR中文规格书

TPA3116D215-W,30-W,50-W Filter-Free Class-D Stereo Amplifier Family With AMAvoidance1Features•Supports Multiple Output Configurations–2×50W Into a4-ΩBTL Load at21V(TPA3116D2)–2×30W Into a8-ΩBTL Load at24V(TPA3118D2)–2×15W Into a8-ΩBTL Load at15V(TPA3130D2)•Wide Voltage Range:4.5V to26V•Efficient Class-D Operation–>90%Power Efficiency Combined With Low Idle Loss Greatly Reduces Heat Sink Size –Advanced Modulation Schemes•Multiple Switching Frequencies–AM Avoidance–Master and Slave Synchronization–Up to1.2-MHz Switching Frequency •Feedback Power-Stage Architecture With High PSRR Reduces PSU Requirements •Programmable Power Limit•Differential and Single-Ended Inputs•Stereo and Mono Mode With Single-Filter Mono Configuration•Single Power Supply Reduces Component Count •Integrated Self-Protection Circuits Including Overvoltage,Undervoltage,Overtemperature,DC-Detect,and Short Circuit With Error Reporting •Thermally Enhanced Packages–DAD(32-Pin HTSSOP Pad Up)–DAP(32-Pin HTSSOP Pad Down)•–40°C to85°C Ambient Temperature Range2Applications•Mini-Micro Component,Speaker Bar,Docks •After-Market Automotive•CRT TV•Consumer Audio Applications 3DescriptionThe TPA31xxD2series are stereo efficient,digital amplifier power stage for driving speakers up to100 W/2Ωin mono.The high efficiency of the TPA3130D2allows it to do2×15W without external heat sink on a single layer PCB.The TPA3118D2can even run2×30W/8Ωwithout heat sink on a dual layer PCB.If even higher power is needed the TPA3116D2does2×50W/4Ωwith a small heat-sink attached to its top side PowerPAD.All three devices share the same footprint enabling a single PCB to be used across different power levels.The TPA31xxD2advanced oscillator/PLL circuit employs a multiple switching frequency option to avoid AM interferences;this is achieved together with an option of either master or slave option,making it possible to synchronize multiple devices.The TPA31xxD2devices are fully protected against faultswith short-circuit protection and thermal protection as well as overvoltage,undervoltage,and DC protection.Faults are reported back to the processor to prevent devices from being damaged during overload conditions.Device Information(1)PART NUMBER PACKAGE BODY SIZE(NOM) TPA3116D2DAD(32)11.00mm×6.20mm TPA3118D2TPA3130D2DAP(32)11.00mm×6.20mm(1)For all available packages,see the orderable addendum atthe end of the datasheet.Simplified Application CircuitCopyright © 2016,Texas Instruments IncorporatedTPA3116D2,TPA3118D2,TPA3130D2SLOS708G–APRIL2012–REVISED DECEMBER2017 7.3.13Efficiency:LC Filter Required with the Traditional Class-D Modulation SchemeThe main reason that the traditional class-D amplifier-based on AD modulation needs an output filter is that the switching waveform results in maximum current flow.This causes more loss in the load,which causes lower efficiency.The ripple current is large for the traditional modulation scheme,because the ripple current is proportional to voltage multiplied by the time at that voltage.The differential voltage swing is2×VCC,and the time at each voltage is half the period for the traditional modulation scheme.An ideal LC filter is needed to store the ripple current from each half cycle for the next half cycle,while any resistance causes power dissipation.The speaker is both resistive and reactive,whereas an LC filter is almost purely reactive.The TPA3116D2modulation scheme has little loss in the load without a filter because the pulses are short and the change in voltage is VCC instead of2×VCC.As the output power increases,the pulses widen,making the ripple current larger.Ripple current could be filtered with an LC filter for increased efficiency,but for most applications the filter is not needed.An LC filter with a cutoff frequency less than the class-D switching frequency allows the switching current to flow through the filter instead of the load.The filter has less resistance but higher impedance at the switching frequency than the speaker,which results in less power dissipation,therefore increasing efficiency.7.3.14Ferrite Bead Filter ConsiderationsUsing the Advanced Emissions Suppression Technology in the TPA3116D2amplifier it is possible to design a high efficiency class-D audio amplifier while minimizing interference to surrounding circuits.It is also possible to accomplish this with only a low-cost ferrite bead filter.In this case it is necessary to carefully select the ferrite bead used in the filter.One important aspect of the ferrite bead selection is the type of material used in the ferrite bead.Not all ferrite material is alike,so it is important to select a material that is effective in the10to100MHz range which is key to the operation of the class-D amplifier.Many of the specifications regulating consumer electronics have emissions limits as low as30MHz.It is important to use the ferrite bead filter to block radiation in the30MHz and above range from appearing on the speaker wires and the power supply lines which are good antennas for these signals.The impedance of the ferrite bead can be used along with a small capacitor with a value in the range of1000pF to reduce the frequency spectrum of the signal to an acceptable level.For best performance,the resonant frequency of the ferrite bead/capacitor filter should be less than10MHz.Also,it is important that the ferrite bead is large enough to maintain its impedance at the peak currents expected for the amplifier.Some ferrite bead manufacturers specify the bead impedance at a variety of current levels.In this case it is possible to make sure the ferrite bead maintains an adequate amount of impedance at the peak current the amplifier will see.If these specifications are not available,it is also possible to estimate the bead current handling capability by measuring the resonant frequency of the filter output at low power and at maximum power.A change of resonant frequency of less than fifty percent under this condition is desirable.Examples of ferrite beads which have been tested and work well with the TPA3130D2can be seen in the TPA3130D2EVM user guide SLOU341.A high quality ceramic capacitor is also needed for the ferrite bead filter.A low ESR capacitor with good temperature and voltage characteristics will work best.Additional EMC improvements may be obtained by adding snubber networks from each of the class-D outputs to ground.Suggested values for a simple RC series snubber network would be18Ωin series with a330pF capacitor although design of the snubber network is specific to every application and must be designed taking into account the parasitic reactance of the printed circuit board as well as the audio amp.Take care to evaluate the stress on the component in the snubber network especially if the amp is running at high PVCC.Also,make sure the layout of the snubber network is tight and returns directly to the GND pins on the IC.Submit Documentation FeedbackTPA3116D2,TPA3118D2,TPA3130D2 SLOS708G–APRIL2012–REVISED DECEMBER2017Submit Documentation Feedback Figure34.TPA311xD2Radiated Emissions7.3.15When to Use an Output Filter for EMI SuppressionThe TPA3116D2has been tested with a simple ferrite bead filter for a variety of applications including long speaker wires up to125cm and high power.The TPA3116D2EVM passes FCC class-B specifications under these conditions using twisted speaker wires.The size and type of ferrite bead can be selected to meet application requirements.Also,the filter capacitor can be increased if necessary with some impact on efficiency. There may be a few circuit instances where it is necessary to add a complete LC reconstruction filter.These circumstances might occur if there are nearby circuits which are sensitive to noise.In these cases a classic second order Butterworth filter similar to those shown in the figures below can be used.Some systems have little power supply decoupling from the AC line but are also subject to line conducted interference(LCI)regulations.These include systems powered by"wall warts"and"power bricks."In these cases,LC reconstruction filters can be the lowest cost means to pass LCI mon mode chokes using low frequency ferrite material can also be effective at preventing line conducted interference.4- 8W W4- 8W WTPA3116D2,TPA3118D2,TPA3130D2SLOS708G–APRIL2012–REVISED DECEMBER2017Submit Documentation FeedbackFigure35.TPA31xxD2Output Filters7.3.16AM Avoidance EMI ReductionTo reduce interference in the AM radio band,the TPA3116D2has the ability to change the switching frequency via AM<2:0>pins.The recommended frequencies are listed in Table6.The fundamental frequency and its second harmonic straddle the AM radio band listed.This eliminates the tones that can be present due to the switching frequency being demodulated by the AM radio.Table6.AM FrequenciesUS EUROPEANSWITCHING FREQUENCY(kHz)AM2AM1AM0 AM FREQUENCY(kHz)AM FREQUENCY(kHz)522-540540-917540-914500001917-1125914-1122600(or400)0100001125-13751122-13735000011375-15471373-1548600(or400)010000 1547-17001548-1701600(or500)010001TPA3116D2,TPA3118D2,TPA3130D2 SLOS708G–APRIL2012–REVISED DECEMBER2017Submit Documentation Feedback。

3116d2的供电电压

3116d2的供电电压3116d2的供电电压概述：3116d2是一款高性能的数字信号处理器，广泛应用于音频、视频、通讯等领域。

在使用3116d2时，供电电压是一个非常重要的参数，它直接影响到芯片的工作稳定性和性能表现。

一、3116d2的基本特性1.1 产品介绍3116d2是TI公司推出的一款高性能数字信号处理器，采用32位固定点结构，具有高速运算、低功耗和强大的功能特性。

该芯片广泛应用于音频、视频、通讯等领域。

1.2 主要特点（1）32位固定点结构；（2）最大主频达到300MHz；（3）内置256K字节程序存储器和64K字节数据存储器；（4）支持多种外设接口，如I2S、SPI等；（5）低功耗设计。

二、3116d2的供电电压参数2.1 工作电压范围3116d2芯片的工作电压范围为1.71V~3.6V。

在实际应用中，建议将其供电电压控制在3.3V左右。

2.2 最大工作电流当芯片供电电压为3.3V时，其最大工作电流为200mA。

2.3 电源稳定性要求在使用3116d2芯片时，需要保证其供电电压的稳定性。

一般来说，芯片的供电电压波动范围应该控制在±5%以内。

三、3116d2的供电电路设计3.1 供电模式选择3116d2芯片可以采用单独的DC/DC转换器或者LDO进行供电。

其中，LDO的输出稳定性较好，但是效率较低；DC/DC转换器效率较高，但是需要注意输出稳定性和噪声问题。

3.2 供电滤波设计在3116d2芯片的供电线路中，需要添加适当的滤波器来抑制噪声和干扰。

常见的滤波器包括陶瓷贴片电容、铝质电解电容、磁珠等。

3.3 供应线路布局在3116d2芯片周围布局时，需要注意将其与其他元件隔离开来，避免相互干扰。

同时，在布局时也要考虑到信号传输路径和信号层与地层之间的规划。

四、3116d2的常见问题及解决方法4.1 电源电压不稳定当3116d2芯片的供电电压不稳定时，可能会出现工作不正常、噪声增大等问题。

tpa3116d2dadr用法

tpa3116d2dadr用法TPA3116D2DADR是一款高性能立体声音频功率放大器，具有优异的音质和功率表现，被广泛应用于家庭音响系统、电视音箱、车载音响等领域。

本文将详细介绍TPA3116D2DADR的用法，从搭建、接线、配置等方面一步一步进行解答。

第一步：准备工作在正式使用TPA3116D2DADR之前，我们需要做一些准备工作。

首先，准备好音频功放模块（TPA3116D2DADR）、音源设备（如手机、电脑等）以及扬声器。

其次，检查所用的电源是否符合要求，一般要求电压在12-24V之间。

第二步：搭建电路将准备好的TPA3116D2DADR模块与相应的电源电源和音源设备进行连接。

将电源正极连接到模块的VCC+端口，电源负极连接到GND端口。

接下来，将音源设备的音频输出接口（通常是3.5mm耳机接口或RCA接口）与模块的音频输入接口相连。

最后，将扬声器的正负极分别与模块的扬声器输出接口相连。

第三步：配置模块在接线完成后，我们需要对TPA3116D2DADR进行一些设置以达到最佳的音质效果。

首先，调整音量控制旋钮（如有）以合适的音量。

然后，调整模块上的音量控制电位器，使其适应音源的输出。

此外，如果模块上还有其他可调控制的参数，如增益等，根据实际需求进行调整。

第四步：测试和调试完成配置后，我们可以进行测试和调试。

首先，确保音源设备正常工作，并播放测试音乐或音频。

然后，观察扬声器是否正常工作，听音质是否清晰、细腻。

如果发现问题，可以通过调整音源设备的输出、模块的设置等方法进行优化。

第五步：固定和保护措施在使用TPA3116D2DADR时，我们需要将其固定在合适的位置，以确保其不会在工作过程中发生松动或摇摆。

同时，可以采取一些保护措施，如安装散热器以降低温度，避免过热；设置适当的限流电路以保护扬声器等。

综上所述，搭建、接线、配置和测试是使用TPA3116D2DADR的主要步骤。

通过以上步骤的实施和调试，我们可以获得一个高性能的音频功率放大器系统，并享受到出色的音质和功率表现。

几款最常用的音频功放芯片以及应用电路介绍

几款最常用的音频功放芯片以及应用电路介绍音频功放芯片是将低电平的音频信号放大成高电平的信号，以驱动扬声器输出音频信号的集成电路。

下面介绍几款常用的音频功放芯片以及其应用电路。

1.TDA2030A：TDA2030A是一款常用的功率较大的单音频功放芯片。

它具有低失真、低噪声和高功率输出的特点，适用于家庭音响、功放音箱等音频放大应用。