SPV1001N40;SPV1001N30;中文规格书,Datasheet资料

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PN8370 Datasheet中文版 Rev.A.1511-690V

PN8370 Datasheet中文版 Rev.A.1511-690V

T=
C
25℃)……………………………….…..….……...………….…..………….……....….....1.5W
损耗功率
PD
(DIP-8,
T=
C
25℃)…………………………………..….….…..………..……..……………….………....3W
最大漏极直流电流
(ID
,
SOP-7,
T=
C
25℃)…………………………………………………..……………..…………0.55A
最大漏极直流电流
(ID
,
DIP-8,
T=
C
25℃)…………..……………………………………..…………….….…………0.8A
最大漏极脉冲电流
(IDP,
T=
C
25℃)…………..……………….…………………………….…...……….….…………3.0A
备注:1. 产品委托第三方严格按照芯片级 ESD 标准(ESDA/JEDEC JDS-001-2014)中的测试方式和流程进行测试。
PN8370
Chipown
超低待机功耗准谐振原边反馈交直流转换器
概述
PN8370集成超低待机功耗准谐振原边控制器及690V高雪崩能力智能功率MOSFET,用于高性能、外围元器件精简的充电 器、适配器和内置电源。PN8370为原边反馈工作模式,可省略光耦和TL431。内置高压启动电路,可实现芯片空载损耗(230VAC) 小于30mW。在恒压模式,采用准谐振与多模式技术提高效率并消除音频噪声,使得系统满足6级能效标准,可调输出线补偿 功能能使系统获得较好的负载调整率;在恒流模式,输出电流和功率可通过CS脚的电阻进行调节。该芯片提供了极为全面的 智能保护功能,包含逐周期过流保护、过压保护、开环保护、过温保护、输出短路保护和CS开/短路保护等。

DMN601TK-7;中文规格书,Datasheet资料

DMN601TK-7;中文规格书,Datasheet资料

Features• Low On-Resistance: R DS(ON) • Low Gate Threshold Voltage • Low Input Capacitance • Fast Switching Speed• Low Input/Output Leakage• Lead Free By Design/RoHS Compliant (Note 2) • ESD Protected Up To 2kV • "Green" Device (Note 4)Mechanical Data• Case: SOT-523 • Case Material: Molded Plastic, “Green” MoldingCompound. UL Flammability Classification Rating 94V-0 • Moisture Sensitivity: Level 1 per J-STD-020D • Terminals: Finish ⎯ Matte Tin annealed over Alloy 42leadframe. Solderable per MIL-STD-202, Method 208 • Terminal Connections: See Diagram • Marking Information: See Page 3 • Ordering Information: See Page 3 • Weight: 0.002 grams (approximate)Maximum Ratings @T A = 25°C unless otherwise specifiedCharacteristicSymbol Value Units Drain-Source Voltage V DSS 60 VGate-Source Voltage V GSS±20 V Drain Current (Note 1) ContinuousPulsed (Note 3)I D300800mAThermal Characteristics @T A = 25°C unless otherwise specifiedCharacteristicSymbol Value Units Total Power Dissipation (Note 1)P D 150 mW Thermal Resistance, Junction to Ambient R θJA 833 °C/W Operating and Storage Temperature Range T J , T STG-65 to +150°CElectrical Characteristics @T A = 25°C unless otherwise specifiedCharacteristicSymbol Min Typ Max UnitTest ConditionOFF CHARACTERISTICS (Note 5) Drain-Source Breakdown Voltage BV DSS 60 ⎯ ⎯ V V GS = 0V, I D = 10μA Zero Gate Voltage Drain Current I DSS ⎯ ⎯ 1.0 μA V DS = 60V, V GS = 0V Gate-Source LeakageI GSS ⎯ ⎯ ±10 μA V GS = ±20V, V DS = 0V ON CHARACTERISTICS (Note 5) Gate Threshold VoltageV GS(th) 1.0 1.6 2.5 VV DS = 10V, I D = 1mA Static Drain-Source On-Resistance R DS (ON) ⎯ ⎯ ⎯ 2.0 3.0 ΩV GS = 10V, I D = 0.5A V GS = 5V, I D = 0.05A Forward Transfer Admittance |Y fs | 80 ⎯ ⎯ ms V DS =10V, I D = 0.2A DYNAMIC CHARACTERISTICS Input Capacitance C iss ⎯ ⎯ 50 pF V DS = 25V, V GS = 0V f = 1.0MHz Output CapacitanceC oss ⎯ ⎯ 25 pF Reverse Transfer CapacitanceC rss⎯⎯5.0pFNotes: 1. Device mounted on FR-4 PCB. 2. No purposefully added lead.3. Pulse width ≤10μS, Duty Cycle ≤1%4. Diodes Inc.’s “Green” policy can be found on our website at /products/lead_free/index.php.5. Short duration pulse test used to minimize self-heating effect.SOT-523TOP VIEWPin Out ConfigurationESD Protected up to 2kVEQUIVALENT CIRCUITPlease click here to visit our online spice models database.V , DRAIN-SOURCE VOLTAGE (V)Fig. 1 Typical Output CharacteristicsDS I , D R A I N C U R R E N T (A )DFig. 2 Typical Transfer CharacteristicsGS T , CHANNEL TEMPERATURE (°C)Fig. 3 Gate Threshold Voltage vs. Channel T emperaturech 00.51.5I DRAIN CURRENT (A)Fig. 4 Static Drain-Source On-Resistancevs. Drain CurrentD , R , S T A T I C D R A I N -S O U R CE D S (O N)Fig. 5 Static Drain-Source On-Resistancevs. Drain CurrentDR , S T A T I C D R A I N -S O U R C E D S (O N )V GATE SOURCE VOLTAGE (V)Fig. 6 Static Drain-Source On-Resistancevs. Gate-Source VoltageGS,R , S T A T I C D R A I N -S O U R C E O N -R E S I S T A N C E ()D S (O N )ΩFig. 7 CH Static Drain-Source On-State Resistancevs. Channel T emperatureR , S T A T I C D R A I N -S O U R C E D S (O N )1I , R E V E R S E D R A I N C U R RE N T (A )D R 1I , DRAIN CURRENT (A)D Fig.10 Forward Transfer Admittancevs. Drain CurrentOrdering Information (Note 6)Part Number Case Packaging DMN601TK-7SOT-523 3000/Tape & ReelNotes: 6. For packaging details, go to our website at /datasheets/ap02007.pdf.Marking InformationDate Code KeyYear 2005 2006 2007 2008 2009 2010 2011 2012 Code S T U V W X Y ZMonth Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec Code 1 2 3 4 5 6 7 8 9 O N DK7K = Product Type Marking Code YM = Date Code Marking Y = Year (ex: S = 2005) M = Month (ex: 9 = September) K7K YMPackage Outline DimensionsSuggested Pad LayoutIMPORTANT NOTICEDiodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to any product herein. Diodes Incorporated does not assume any liability arising out of the application or use of any product described herein; neither does it convey any license under its patent rights, nor the rights of others. The user of products in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on our website, harmless against all damages.LIFE SUPPORTDiodes Incorporated products are not authorized for use as critical components in life support devices or systems without the expressed written approval of the President of Diodes Incorporated.SOT-523Dim Min Max Typ A 0.15 0.30 0.22 B 0.75 0.85 0.80 C 1.45 1.75 1.60 D ⎯ ⎯ 0.50 G 0.90 1.10 1.00 H 1.50 1.70 1.60 J 0.00 0.10 0.05 K 0.60 0.80 0.75 L 0.10 0.30 0.22 M 0.10 0.20 0.12 N 0.45 0.65 0.50α0° 8° ⎯ All Dimensions in mmDimensions Value (in mm)Z1.8 X 0.4 Y 0.51 C 1.3 E 0.7X EYCZ分销商库存信息: DIODESDMN601TK-7。

SDX15D4;SDX15A2;SDX01G2;SDX100G2;SDX01D4;中文规格书,Datasheet资料

SDX15D4;SDX15A2;SDX01G2;SDX100G2;SDX01D4;中文规格书,Datasheet资料

SDX SeriesPlastic Silicon Pressure SensorsLow Cost, TemperatureCompensated, DIP, 0 psi to 1 psi, 0 psi to 100 psiDESCRIPTIONThe SDX Series sensors provide a very cost-effective solution for pressure applications that require small size plusperformance. These calibrated and temperature-compensated sensors give an accurate and stable output over a 0 °C to 50 °C [32 °F to 122 °F] temperature range. This series is intended for use with non-corrosive, non-ionic working fluids such as air and dry gases.Devices are available to measure absolute and gage pressures from 1 psi (SDX01) up to 100 psi (SDX100). The absolute devices have an internal vacuum reference and an output voltage proportional to absolute pressure. The SDX devices are available in standard commercial and prime grades(SDCXXXXX -A ) to allow optimization of accuracy and cost in any given application.The SDX devices feature an integrated circuit (IC) sensor element and laser trimmed thick film ceramic housed in acompact solvent resistant case. The package is a double-wide, dual-inline package (DIP). This is the same familiar package used by IC manufacturers except it is only 11,94 mm [0.470 in] long and has a pressure port(s). The PC board area used by each DIP is approximately 0.26 in 2. This extremely small size enables the use of multiple sensors in limited available space. The DIP provides excellent corrosion resistance and isolation to external package stress.The DIP mounts on a PC board like a standard IC withthrough-hole pins. The pins anchor the pressure sensor to the PC board and provide a more secure and stable unit than other types of packages.The output of the bridge is ratiometric to the supply voltage and operation from any dc supply voltage up to 20 Vdc is acceptable.FEATURES • Low cost DIP• Precision temperature compensation • Calibrated zero and span • Small size • Low noise• High impedance for low power applications POTENTIAL APPLICATIONS • Medical equipment • Computer peripherals • Pneumatic controls • HVAC • Prime grade available (SDXxxxyy-A)SDX Series2 /sensingTable 1. Pressure Range Specifications and Ordering InformationCatalog Listing, Pressure Connection,Pressure TypeFull-Scale Span (1) Gage Differential/Gage AbsoluteOperating PressureProof Pressure (2) Min. Typ. Max. SDX01G2 SDX01D4 - 17.37 mV 18.00 mV 18.18 mVSDX01G2-A SDX01D4-A - 0 psid to 1 psid 20 psid17.82 mV 18.00 mV 18.80 mV SDX05G2 SDX05D4 - 57.90 mV 60.00 mV 62.10 mVSDX05G2-A SDX05D4-A - 0 psid to 5 psid 20 psid59.40 mV 60.00 mV 60.60 mV SDX15G2 SDX15D4 - 86.85 mV 90.00 mV 93.15 mVSDX15G2-A SDX15D4-A - 0 psid to 15 psid 30 psid89.10 mV 90.00 mV 90.90 mV- - SDX15A2 86.85 mV 90.00 mV 93.15 mV - - SDX15A4 86.85 mV 90.00 mV 93.15 mV- - SDX15A2-A 89.10 mV 90.00 mV 90.90 mV - - SDX15A4-A 0 psia to 15 psia 30 psia89.10 mV 90.00 mV 90.90 mVSDX30G2 SDX30D4 - 86.85 mV 90.00 mV 93.15 mVSDX30G2-A SDX30D4-A - 0 psid to 30 psid 60 psid89.10 mV 90.00 mV 90.90 mV- - SDX30A2 86.85 mV 90.00 mV 93.15 mV - - SDX30A4 86.85 mV 90.00 mV 93.15 mV- - SDX30A2-A 89.10 mV 90.00 mV 90.90 mV - - SDX30A4-A 0 psia to 30 psia 60 psia89.10 mV 90.00 mV 90.90 mVSDX100G2 SDX100D4 - 96.50 mV 100.00 mV 103.5 mVSDX100G2-A SDX100D4-A- 0 psid to 100 psid 150 psid99.00 mV 100.00 mV 101.0 mV - - SDX100A2 96.50 mV 100.00 mV 103.5 mV - - SDX100A4 96.50 mV 100.00 mV 103.5 mV - - SDX100A2-A 99.00 mV 100.00 mV 101.0 mV- - SDX100A4-A0 psia to 100psia 150 psia99.00 mV 100.00 mV 101.0 mV Nomenclature Pressure Connection (See Fig. 2)Pressure Type GradeG2 A2/G2 gage standard commercial G2-A A2/G2 gage prime D4 OK differential standard commercial D4-A OK differential prime A2 A2/G2 absolute standard commercial A2-A A2/G2 absolute prime A4 A4 absolute standard commercial A4-A A4 absolute primeTable 2. General Specifications (Maximum)Characteristic ParameterSupply voltage (V S) 20 Vdc Common mode pressure 150 psig Lead soldering temperature (2 s to 4 s) 250 °C [482 °F]Table 3. Environmental Specifications (Maximum)Characteristic Parameter Compensated operating temperature 0 °C to 50 °C [32 °F to 122 °F] Operating temperature -40 °C to 85 °C [-40 °F to 185 °F] Storage temperature -55 °C to 125 °C [-67 °F to 257 °F] Humidity limits 0% RH to 100% RHPlastic Silicon Pressure Sensors, Low Cost, TemperatureCompensated, DIP, 0 psi to 1 psi, 0 psi to 100 psiHoneywell Sensing and Control 3Table 4. Performance Characteristics (3)Characteristic Min. Typ. Max. Unit Zero pressure offset Zero pressure offset (prime grade) (4)-1.0 -0.3 0.0 0.0 +1.0 0.3 mVmV Combined linearity and hysteresis (5) Combined linearity and hysteresis (prime grade)(5) (13)– – ±0.2 ±0.1 ±1.0 ±0.25 % FSO% FSO Temperature effect on span, 0 °C to 50 °C [32 °F to 122 °F] (6)Temperature effect on span, 0 °C to 50 °C [32 °F to 122 °F] (6)(prime grade) – – ±0.4 ±0.4 ±2.0 ±1.0 % FSO% FSOTemperature effect on offset 0, °C to 50 °C [32 °F to 122 °F] (6)Temperature effect on offset 0, °C to 50 °C [32 °F to 122 °F] (6) (prime grade)– – ±0.2 ±0.2 ±1.0 ±0.5 mVmV Repeatability (7)– ±0.2 ±0.5 % FSOInput resistance (8)– 4.0 – kOhmOutput resistance (9)– 4.0 – kOhmCommon mode voltage (10)1.5 3.0 5.0 VdcResponse time (11)– 100 – µsLong term stability of offset and span (12)– ±0.1 – mV Notes:1. Full-Scale Span is the algebraic difference between the output voltage at full-scale pressure and the output at zero pressure.Full-Scale Span is ratiometric to the supply voltage.2. Maximum pressure above which causes permanent sensor failure.3. Reference conditions:• T A = 25 °C (unless otherwise noted).• Supply V S = 12 Vdc, Common Mode Line pressure = 0 psig.• Pressure applied toPort B. For absolute devices only, pressure is applied to Port A and the output polarity is reversed. 4. Maximum zero pressure offset for absolute devices is ±500 mV.5. Hysteresis is the maximum output difference at any point within the operating pressure range for increasing and decreasingpressure.6. Maximum error band of the offset voltage and the error band of the span, relative to the 25 °C [77 °F] reading.7. Maximum difference in output at any pressure within the operating pressure range and the temperature within 0 °C to 50 °C[32 °F to 122 °F] after:• 100 temperature cycles, 0 °C to 50 °C [32 °F to 122 °F]. • 1.0 million pressure cycles, 0 psi to full-scale span.8. Input resistance is the resistance between V S and ground.9. Output resistance is the resistance between the + and - outputs. 10. Common Mode voltage of the output arms for V S =12 Vdc.11. Response time for a 0 psi to Full-Scale Span pressure step change, 10% to 90% rise time. 12. Long term stability over a one-year period.13. Maximum combined linearity and hysteresis for the SDX05 prime grade is ±0.5%.Figure 1. Electrical ConnectionsFigure 2. Mounting Dimensions (For Reference Only. mm/[in])A2/G2 PackageA4 PackageD4 PackageWARNING PERSONAL INJURYDO NOT USE these products as safety or emergency stop devices or in any other application where failure of the product could result in personal injury.Failure to comply with these instructions could result in death or serious injury.WARNINGMISUSE OF DOCUMENTATION• The information presented in this product sheet is forreference only. Do not use this document as a product installation guide.• Complete installation, operation, and maintenanceinformation is provided in the instructions supplied with each product.Failure to comply with these instructions could result in death or serious injury.WARRANTY/REMEDYHoneywell warrants goods of its manufacture as being free of defective materials and faulty workmanship. Honeywell’sstandard product warranty applies unless agreed to otherwise by Honeywell in writing; please refer to your orderacknowledgement or consult your local sales office for specific warranty details. If warranted goods are returned to Honeywell during the period of coverage, Honeywell will repair or replace, at its option, without charge those items it finds defective. The foregoing is buyer’s sole remedy and is in lieu of all other warranties, expressed or implied, including those ofmerchantability and fitness for a particular purpose. In no event shall Honeywell be liable for consequential, special, or indirect damages.SALES AND SERVICEHoneywell serves its customers through a worldwide network of sales offices, representatives and distributors. Forapplication assistance, current specifications, pricing or name of the nearest Authorized Distributor, contact your local sales office or:E-mail: info.sc@Internet: /sensingPhone and Fax:While we provide application assistance personally, through our literature and the Honeywell web site, it is up to the customer to determine the suitability of the product in the application. Asia Pacific +65 6355-2828; +65 6445-3033 Fax Europe +44 (0) 1698 481481; +44 (0) 1698 481676 Fax Latin America +1-305-805-8188; +1-305-883-8257 Fax USA/Canada +1-800-537-6945; +1-815-235-6847+1-815-235-6545 FaxSpecifications may change without notice. The information we supply is believed to be accurate and reliable as of this printing. However, we assume no responsibility for its use.Sensing and Control Honeywell1985 Douglas Drive North Golden Valley, Minnesota 55422 /sensing 008103-3-EN IL50 GLO Printed in USA November 2008Copyright © 2008 Honeywell International Inc. All rights reserved.分销商库存信息:HONEYWELLSDX15D4SDX15A2SDX01G2 SDX100G2SDX01D4SDX05D4 SDX100A4SDX30D4SDX100D4 SDX30G2SDX15A4-A SDX15D4-A SDX15G2SDX30A2SDX15A4 SDX05G2SDX100A2SDX30A4 SDX15G2-A SDX15A2-A SDX100G2-A SDX01G2-A SDX05G2-A SDX05D4-A。

RIGOL QGB10000-1110 电源线保证和声明说明书

RIGOL QGB10000-1110 电源线保证和声明说明书

保证和声明版权©2018苏州普源精电科技有限公司商标信息RIGOL是苏州普源精电科技有限公司的注册商标。

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安全术语和符号本手册中的安全术语:警告警告性声明指出可能会造成人身伤害或危及生命安全的情况或操作。

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WARNING表示您如果不进行此操作,可能会对您造成潜在的危害。

BD139-10;BD136-16;BD139-16;BD140;BD139;中文规格书,Datasheet资料

BD139-10;BD136-16;BD139-16;BD140;BD139;中文规格书,Datasheet资料

May 2008Rev 51/9BD135 - BD136BD139 - BD140Complementary low voltage transistorFeatures■Products are pre-selected in DC current gainApplication■General purposeDescriptionThese epitaxial planar transistors are mounted in the SOT -32 plastic package. They are designed for audio amplifiers and drivers utilizingcomplementary or quasi-complementary circuits. The NPN types are the BD135 and BD139, and the complementary PNP types are the BD136 and BD140.Table 1.Device summaryOrder codes Marking Package PackagingBD135BD135SOT -32TubeBD135-16BD135-16BD136BD136BD136-16BD136-16BD139BD139BD139-10BD139-10BD139-16BD139-16BD140BD140BD140-10BD140-10BD140-16BD140-16Contents BD135 - BD136 - BD139 - BD140Contents1Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42.1Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82/9BD135 - BD136 - BD139 - BD140Electrical ratings3/91 Electrical ratingsTable 2.Absolute maximum ratingsSymbolParameterValueUnitNPNPNPBD135BD139BD136BD140V CBO Collector-base voltage (I E = 0)4580-45-80V V CEO Collector-emitter voltage (I B = 0)4580-45-80V V EBO Emitter-base voltage (I C = 0)5-5V I C Collector current 1.5-1.5A I CM Collector peak current 3-3A I B Base current0.5-0.5A P TOT Total dissipation at T c ≤ 25 °C 12.5W P TOT Total dissipation at T amb ≤ 25 °C 1.25W T stg Storage temperature-65 to 150°C T jMax. operating junction temperature150°CTable 3.Thermal dataSymbolParameterMax valueUnit R thj-case Thermal resistance junction-case 10°C/W R thj-amb Thermal resistance junction-ambient100°C/WElectrical characteristics BD135 - BD136 - BD139 - BD1404/92 Electrical characteristics(T case = 25 °C unless otherwise specified)Table 4.On/off statesSymbolParameterPolarityTest conditionsValueUnitMin.Typ.Max.I CBOCollector cut-off current (I E =0)NPN V CB = 30 VV CB = 30 V , T C = 125 °C 0.110µA µA PNP V CB = -30 VV CB = -30 V , T C = 125 °C -0.1-10µA µA I EBOEmitter cut-off current (I C =0)NPN V EB = 5 V 10µA PNP V EB = -5 V -10µA V CEO(sus)(1)1.Pulsed: pulse duration = 300 µs, duty cycle 1.5%Collector-emittersustaining voltage(I B =0)NPNI C = 30 mA BD135BD1394580V V PNP I C = -30 mA BD136BD140-45-80V V V CE(sat) (1)Collector-emitter saturation voltage NPN I C = 0.5 A, I B = 0.05 A 0.5V PNP I C = -0.5 A, I B = -0.05 A -0.5V V BE (1)Base-emitter voltageNPN I C = 0.5 A, V CE = 2 V 1V PNP I C = -0.5 A, V CE = -2 V -1V h FE (1)DC current gainNPNI C = 5 mA, V CE = 2 V I C = 150 mA, V CE = 2 V I C = 0.5 A, V CE = 2 V 254025250PNPI C = -5 mA, V CE = -2 V I C = -150 mA, V CE = -2 V I C = -0.5 A, V CE = -2 V 254025250h FE (1)h FE groupsNPNI C = 150 mA, V CE = 2 V BD139-10BD135-16/BD139-1663100160250PNPI C = -150 mA, V CE = -2 V BD140-10BD136-16/BD140-1663100160250BD135 - BD136 - BD139 - BD140Electrical characteristics 2.1 Electrical characteristics (curves)Figure 2.Safe operating area Figure 3.Derating5/9Package mechanical data BD135 - BD136 - BD139 - BD140 3 Package mechanical dataIn order to meet environmental requirements, ST offers these devices in ECOPACK®packages. These packages have a lead-free second level interconnect. The category ofsecond level interconnect is marked on the package and on the inner box label, incompliance with JEDEC Standard JESD97. The maximum ratings related to solderingconditions are also marked on the inner box label. ECOPACK is an ST trademark.ECOPACK specifications are available at: 6/9BD135 - BD136 - BD139 - BD140Package mechanical data7/9Revision history BD135 - BD136 - BD139 - BD1408/94 Revision historyTable 5.Document revision historyDate RevisionChanges16-Sep-2001422-May-20085Mechanical data has been updated.BD135 - BD136 - BD139 - BD140Please Read Carefully:Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice.All ST products are sold pursuant to ST’s terms and conditions of sale.Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein.No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.UNLESS OTHERWISE SET FORTH IN ST’S TERM S AND CONDITIONS OF SALE ST DISCLAIM S ANY EXPRESS OR IM PLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIM ITATION IM PLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.ST and the ST logo are trademarks or registered trademarks of ST in various countries.Information in this document supersedes and replaces all information previously supplied.The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.© 2008 STMicroelectronics - All rights reservedSTMicroelectronics group of companiesAustralia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America9/9分销商库存信息:STMBD139-10BD136-16BD139-16 BD140BD139BD135-16 BD135。

RSS100N03中文资料

RSS100N03中文资料

Transistor1/3Switching (30V, ±10A)RSS100N03z Features1) Low on-resistance.2) Built-in G-S Protection Diode.3) Small and Surface Mount Package (SOP8).z ApplicationsPower switching, DC/DC converter.z External dimensions (Unit : mm)z Structure•Silicon N-channel MOS FET z Equivalent circuitthe source terminals to protect the diode against static electricity when the product is in use. Use the protection circuit when the fixed voltages are exceeded.z Absolute maximum ratings (T a=25°C)∗1∗1∗2ParameterV V DSS Symbol 30V V GSS 20A I D ±10A I DP ±40A I S 1.6A I SP 6.4W P D 2°C Tch 150°CTstg −55 to +150Limits Unit Drain-source voltage Gate-source voltage Drain current Total power dissipatino Channel temperature Strage temperatureContinuous Pulsed Continuous Source current (Body diode)Pulsed∗1 Pw ≤10µs, Duty cycle ≤1%∗2 Mounted on a ceramic board.Transistor2/3z Thermal resistance (T a=25°C)°C / WRth (ch-a)62.5ParameterSymbol Limits Unit Channel to ambient∗ Mounted on a ceramic board.∗z Electrical characteristics (T a=25°C)z Body diode characteristics (Source-Drain Characteristics) (T a=25°C)Forward voltageV SD −− 1.2V I S=6.4A, V GS =0VParameterSymbol Min.Typ.Max.Unit Conditions∗Pulsed∗z Electrical characteristic curvesDRAIN-SOURCE VOLTAGE : V DS (V)C A P A C I T A N C E : C (p F )Fig.1 Typical Capacitancevs. Drain-Source VoltageDRAIN CURRENT : I D (A)S W I T C H I N G T I M E : t (n s )Fig.2 Switching CharacteristicsTOTAL GATE CHARGE : Qg (nC)G A T E -S O U R C E V O L T A G E : V G S (V )Fig.3 Dynamic Input CharacteristicsTransistor3/3GATE-SOURCE VOLTAGE : V GS (V)D R A I N C U R RE N T : I D (A )Fig.4 Typical Transfer CharacteristicsGATE-SOURCE VOLTAGE : V GS (V)S T A T I C D R A I N -S O U R C E O N -S T A T E R E S I S T A N C E : R D S (o n ) (m Ω)Fig.5 Static Drain-SourceOn-State Resistance vs. Gate-Source VoltageSOURCE-DRAIN VOLTAGE : V SD (V)S O U R C E C U R R E N T : I s (A )Fig.6 Source Current vs.Source-Drain VoltageDRAIN CURRENT : I D (A)1101001000S T A T I C D R A I N -S O U R C E O N -S T A T E R E S I S TA N C E : R D S (o n ) (m Ω)Fig.7 Static Drain-SourceOn-State Resistance vs. Drain Current (Ι)DRAIN CURRENT : I D (A)S T A T I C D R A I N -S O U R C E O N -S T A T E R E S I S T A N C E : R D S (o n ) (m Ω)Fig.8 Static Drain-SourceOn-State Resistance vs. Drain Current (ΙΙ)DRAIN CURRENT : I D (A)S T A T I C D R A I N -S O U R C E O N -S T A T E R E S I S T A N C E : R D S (o n ) (m Ω)Fig.9 Static Drain-SourceOn-State Resistance vs. Drain Current (ΙΙΙ)AppendixAbout Export Control Order in JapanProducts described herein are the objects of controlled goods in Annex 1 (Item 16) of Export Trade ControlOrder in Japan.In case of export from Japan, please confirm if it applies to "objective" criteria or an "informed" (by MITI clause)on the basis of "catch all controls for Non-Proliferation of Weapons of Mass Destruction.Appendix1-Rev1.0。

TP1001中文资料_TP1001规格书_TP1001 PDF

TP1001中文资料_TP1001规格书_TP1001 PDF

QC2.0 协议接口
TP1001 启动时,当 VDD 电压达到芯片启动电压阈值后 的 20ms 或更短时间内,开关 N5 导通(见内部框图)。此 时开关 N4 以及输出控制开关 N1~N3 保持关断。这时电 源设定为默认的 5 V 输出电压值。当 D+和 D-短路后,就 可以开始 USB 电池充电规范 1.2 版本中所述的专用充电 接口(DCP)与受电设备(PD)之间的正常握手。开关 N5 导 通后,TP1001 开始监测 D+的电压值。如果该值连续高 4
特点
支持 QC2.0 协议的整个输出电压范围 A 类规范:5V,9V 和 12V B 类规范:5V,9V,12V 和 20V 兼容 USB 电池充电规范 1.2 版本 自动 USB DCP 短路 D+至 D默认 5V 输出模式 芯片超低工作电流,待机功耗低 5V 输出电压时功耗低于 1mW 5~20V 的宽芯片供电电压 可选的 B 类规范输出电压抑制功能 芯片引脚开路保护功能 芯片相邻引脚短路保护功能 芯片供电欠压保护 系统 BOM 成本低 采用 SOP8L 封装
保护功能
TP1001 具有多种保护功能以保证系统的稳定和可靠。 包 括可选的 B 类规范输出电压抑制,芯片引脚开路保护, 芯片相邻引脚短路保护和芯片供电欠压保护等。 当 TP1001 只应用在 QC2.0 协议的 A 类规范的输出电压 范围(5V,9V,12V)时,可以通过将芯片的 V3 引脚短接到 VDD 来实现。此时 TP1001 抑制受电设备通过数据线路 D+和 D-施加的任何 20V 输出电压的请求。
Shenzhen TPOWER Semiconductor
TP1001 支持 QC2.0 快速充电协议的接口控制芯片

ISO1001隔离放大器模块及应用精品资料

ISO1001隔离放大器模块及应用精品资料

ISO 1001 隔离放大器模块及应用连续隔离电压值: 3000VDC 电源电压输入范围: ±15%Vin 焊接温度(10秒): +300℃ 输出最小负载: 2K Ω图2 典型接线图图7 输出放大器调节电路图6 输出放大器原理图例如:当输入Vin 为0~+100mV ,输出为0~5V 时,可以取:R11=51K R12=10K R13=10K 放大倍数Kin=1+39.9/10=4.99在图4和图5中,R11也可以由一个电位器和一个电阻串联来代替,可以精确调节放大倍。

产品图片及引脚定义(图10、图11)图10 产品图片 图11 引脚定义建议印刷布板尺寸(标准DIP24脚) 引脚功能描述外形尺寸Pin 引脚Connection 功能描述 1 输出VS1 输入端可用负电源 2 输出GND1 VS1和VD1电源地 3 输出VD1 输入端可用正电源 4~5 NC 空脚Omitted 6 输入VD 输入辅助电源 7 输入GND 输入辅助电源地 8~9 NC 空脚Omitted 10 输出VS2 输出端可用负电源 11 输出GND2 VS2和VD2电源地12 输出VD2 输出端可用负电源 13 输出VOUT 隔离后运放输出端 14 输入FB 隔离后运放反馈端15 输入ADJ 调零输入端 16输出VREF2 输出端可用+5V 基准电源17 NC 空脚Omitted 18 NC 空脚Omitted 19 NC 空脚Omitted 20 NC 空脚Omitted 21 输出COM 输入放大器输出端 22 输入IN+ 输入正端 23 输入IN- 输入负端 24 输出VREF1 输入端可用+5V 基准电源和输入放大器组成一个数据放大器 则数据放大器的放 (多圈电位器)。

MMSZ4xxxT1G系列和SZMMSZ4xxxT1G系列零点电阻电源器件的商品说明书

MMSZ4xxxT1G系列和SZMMSZ4xxxT1G系列零点电阻电源器件的商品说明书

MMSZ4686T1G MMSZ4686T1G.MMSZ4xxxT1G Series, SZMMSZ4xxxT1G Series Zener Voltage Regulators 500 mW, Low I ZT SOD−123 Surface MountThree complete series of Zener diodes are offered in the convenient, surface mount plastic SOD−123 package. These devices provide a convenient alternative to the leadless 34−package style.Features•500 mW Rating on FR−4 or FR−5 Board•Wide Zener Reverse V oltage Range − 1.8 V to 43 V•Low Reverse Current (I ZT) − 50 m A•Package Designed for Optimal Automated Board Assembly •Small Package Size for High Density Applications•ESD Rating of Class 3 (>16 kV) per Human Body Model•SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable•These Devices are Pb−Free and are RoHS Compliant*Mechanical Characteristics:CASE:V oid-free, transfer-molded, thermosetting plastic case FINISH:Corrosion resistant finish, easily solderableMAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES: 260°C for 10 SecondsPOLARITY:Cathode indicated by polarity band FLAMMABILITY RATING:UL 94 V−0MAXIMUM RATINGSRating Symbol Max Units Total Power Dissipation on FR−5 Board,(Note 1) @ T L = 75°CDerated above 75°C P D5006.7mWmW/°CThermal Resistance, (Note 2) Junction−to−Ambient R q JA340°C/WThermal Resistance, (Note 2) Junction−to−Lead R q JL150°C/WJunction and Storage Temperature Range T J, T stg−55 to+150°CStresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.1.FR−5 = 3.5 X 1.5 inches, using the minimum recommended footprint.2.Thermal Resistance measurement obtained via infrared Scan Method.*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.Cathode AnodeSee specific marking information in the device marking column of the Electrical Characteristics table on page 3 of this data sheet.DEVICE MARKING INFORMATIONSOD−123CASE 425STYLE 1Device Package Shipping†ORDERING INFORMATIONMARKING DIAGRAM†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our T ape and Reel Packaging Specifications Brochure, BRD8011/D.MMSZ4xxxT1G SOD−123(Pb−Free)3,000 /Tape & ReelMMSZ4xxxT3G SOD−123(Pb−Free)10,000 /Tape & Reel xx= Device Code (Refer to page 3)M= Date CodeG= Pb−Free Package(Note: Microdot may be in either location)1SZMMSZ4xxxT1G SOD−123(Pb−Free)3,000 /Tape & ReelSZMMSZ4xxxT3G SOD−123(Pb−Free)10,000 /Tape & ReelELECTRICAL CHARACTERISTICS (T A = 25°C unless otherwise noted, V F = 0.9 V Max. @ I F = 10 mA)Symbol ParameterV Z Reverse Zener Voltage @ I ZTI ZT Reverse CurrentI R Reverse Leakage Current @ V RVR Reverse VoltageI F Forward CurrentV F Forward Voltage @ I FProduct parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.ELECTRICAL CHARACTERISTICS (T A = 25°C unless otherwise noted, V F = 0.9 V Max. @ I F = 10 mA)Device*DeviceMarkingZener Voltage (Note 3)Leakage CurrentV Z (Volts)@ I ZT I R @ V RMin Nom Max m A m A VoltsMMSZ4678T1G CC 1.71 1.8 1.89507.51 MMSZ4679T1G CD 1.90 2.0 2.105051 MMSZ4680T1G CE 2.09 2.2 2.315041 MMSZ4681T1G CF 2.28 2.4 2.525021 MMSZ4682T1G CH 2.565 2.7 2.8355011 MMSZ4683T1G CJ 2.85 3.0 3.15500.81 MMSZ4684T1G CK 3.13 3.3 3.47507.5 1.5 MMSZ4685T1G CM 3.42 3.6 3.78507.52 MMSZ4686T1G CN 3.70 3.9 4.105052 MMSZ4687T1G CP 4.09 4.3 4.525042 SZMMSZ4687T1G CG6 4.09 4.3 4.525042 MMSZ4688T1G CT 4.47 4.7 4.9450103 MMSZ4689T1G CU 4.85 5.1 5.3650103 MMSZ4690T1G/T3G CV 5.32 5.6 5.8850104 MMSZ4691T1G CA 5.89 6.2 6.5150105 MMSZ4692T1G CX 6.46 6.87.145010 5.1 MMSZ4693T1G CY7.137.57.885010 5.7 MMSZ4694T1G CZ7.798.28.61501 6.2 MMSZ4695T1G DC8.278.79.14501 6.6 MMSZ4696T1G DD8.659.19.56501 6.9 MMSZ4697T1G DE9.501010.505017.6 MMSZ4698T1G DF10.451111.55500.058.4 MMSZ4699T1G DH11.401212.60500.059.1 MMSZ4700T1G DJ12.351313.65500.059.8 MMSZ4701T1G DK13.301414.70500.0510.6 MMSZ4702T1G DM14.251515.75500.0511.4 MMSZ4703T1G†DN15.201616.80500.0512.1 MMSZ4704T1G DP16.151717.85500.0512.9 MMSZ4705T1G DT17.101818.90500.0513.6 MMSZ4706T1G DU18.051919.95500.0514.4 MMSZ4707T1G DV19.002021.00500.0115.2 MMSZ4708T1G DA20.902223.10500.0116.7 MMSZ4709T1G DX22.802425.20500.0118.2 MMSZ4710T1G DY23.752526.25500.0119.0 MMSZ4711T1G†EA25.652728.35500.0120.4 MMSZ4712T1G EC26.602829.40500.0121.2 MMSZ4713T1G ED28.503031.50500.0122.8 MMSZ4714T1G EE31.353334.65500.0125.0 MMSZ4715T1G EF34.203637.80500.0127.3 MMSZ4716T1G EH37.053940.95500.0129.6 MMSZ4717T1G EJ40.854345.15500.0132.6 3.Nominal Zener voltage is measured with the device junction in thermal equilibrium at T L = 30°C ±1°C.*Include SZ-prefix devices where applicable.†MMSZ4703 and MMSZ4711 Not Available in 10,000/Tape & ReelTYPICAL CHARACTERISTICSV Z , T E M P E R A T U R E C O E F F I C I E N T (m V /C )°θV Z , NOMINAL ZENER VOLTAGE (V)Figure 1. Temperature Coefficients (Temperature Range −55°C to +150°C)V Z , T E M P E R A T U R E C O E F F I C I E N T (m V /C )°θ100101V Z , NOMINAL ZENER VOLTAGE (V)Figure 2. Temperature Coefficients (Temperature Range −55°C to +150°C)1.21.00.80.60.40.20T, TEMPERATURE (5C)Figure 3. Steady State Power Derating P p k, P E A K S U R G E P O W E R (W A T T S )PW, PULSE WIDTH (ms)Figure 4. Maximum Nonrepetitive Surge PowerP D , P O W E R D I S S I P A T I O N (W A T T S )V Z , NOMINAL ZENER VOLTAGEFigure 5. Effect of Zener Voltage onZener ImpedanceZ Z T , D Y N A M I C I M P E D A N C E ()ΩTYPICAL CHARACTERISTICSC , C A P A C I T A N C E (p F )V Z , NOMINAL ZENER VOLTAGE (V)Figure 6. Typical Capacitance 1000100101V Z , ZENER VOLTAGE (V)1001010.10.01I Z , Z EN E R C U R R E N T (m A )V Z , ZENER VOLTAGE (V)1001010.10.01I R , L E A K A G E C U R R E N T (A )μV Z , NOMINAL ZENER VOLTAGE (V)Figure 7. Typical Leakage Current10001001010.10.010.0010.00010.00001I Z , Z E N E R C U R R E N T (m A )Figure 8. Zener Voltage versus Zener Current(V Z Up to 12 V)Figure 9. Zener Voltage versus Zener Current(12 V to 91 V)SOD−123CASE 425−04ISSUE GDATE 07 OCT 2009SCALE 5:1NOTES:1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.2.CONTROLLING DIMENSION: INCH.DIM MIN NOM MAXMILLIMETERSINCHESA0.94 1.17 1.350.037A10.000.050.100.000b0.510.610.710.020c1.600.150.055D 1.40 1.80E 2.54 2.69 2.840.100---3.680.140L0.253.860.0100.0460.0020.0240.0630.1060.1450.0530.0040.0280.0710.1120.152MIN NOM MAX3.56H E---------0.006------------GENERICMARKING DIAGRAM**For additional information on our Pb−Free strategy and solderingdetails, please download the ON Semiconductor Soldering andMounting Techniques Reference Manual, SOLDERRM/D.SOLDERING FOOTPRINT**This information is generic. Please refer to device datasheet for actual part marking. Pb−Free indicator, “G” ormicrodot “ G”, may or may not be present.XXX= Specific Device CodeM= Date CodeG= Pb−Free Package1STYLE 1:PIN 1. CATHODE2. ANODE0.910.036ǒmminchesǓSCALE 10:1------q001010°°°°(Note: Microdot may be in either location) MECHANICAL CASE OUTLINEPACKAGE DIMENSIONSON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor theON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.PUBLICATION ORDERING INFORMATIONTECHNICAL SUPPORTNorth American Technical Support:Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 011 421 33 790 2910LITERATURE FULFILLMENT :Email Requests to:*******************ON Semiconductor Website: Europe, Middle East and Africa Technical Support:Phone: 00421 33 790 2910For additional information, please contact your local Sales RepresentativeMMSZ4686T1G MMSZ4686T1G.。

SP-DM13A-chinese

SP-DM13A-chinese
-40 ~ 85 -55 ~ 150
DM13A
单位 V V mA V
MHz mA
W
°C/W
°C °C
推荐工作参数
特性 电源电压
输出电压 输出电压
输出电流
输入电压
输入时钟频率 锁存信号(LAT)脉波宽度 数据信号(DCK)脉波宽度 串行输入数据(DAI) 的启动时间 串行输入数据(DAI) 的保持时间 锁存信号(LAT) 的启动时间 锁存信号(LAT) 的保持时间
Page 7
时序图
1. DCK-DAI, DAO
DM13A
2. DCK-LAT 3. LAT-OUT0
16 位 LED 恒流驱动芯片
Version:A.003
未经授权而径予重制、复制、使用或公开本文件,行为人得被追究侵权之相关民刑事责任 Unauthorized reproduction, duplication, use or disclosure of this document will be deemed as infringement.

单位 V uA V
±3
%
±6
%
±0.5 %/V
±4
4
6
6
mA
10
10
*1 输出电流差异(通道与通道间)定义为”任意 Iout - 平均 Iout” 与 ”平均 Iout”的比率。平均 Iout =(Imax+Imin)/2 *2 输出电流差异(芯片与芯片间) 定义为任选两芯片之最大输出电流与最小输出电流的落差范围。 *3 IO 除外。VDD = Nhomakorabea5.0V
最小值 3.3
1.0
⎯ 5 ⎯ ⎯ 0.8VDD 0.0 ⎯ 15 15 10 10 10 10

SP1229HN芯片新版datasheet

SP1229HN芯片新版datasheet

DATA SHEETSP1229HN宽输入电压范围CC/CV 同步降压转换器版本号:V1.0 深圳芯派科技TEL:135 3045 2646 (唐生)ICQ:294 434 3362ICQ:294 435 3362一.概述SP1229HN是一款同步降压转换器,该转换器可驱动输出4.8A负载电流。

设计允许SP1229HN在9V 到40V宽输入电压范围内工作。

通过将COMP/EN引脚逻辑电平拉低来实现外部关断功能,并进入待机模式。

外部补偿使反馈控制环路具有良好的线压调整率和负载调整率,且外围设计灵活。

SP1229HN可以工作在CC(恒流输出)或CV(恒压输出)两种模式,过流保护(OCP)电流值可以通过外部电流检测电阻精确设置。

SP1229HN适用于有限流要求的DC/DC开关电源,芯片采用QFN20L-5×5封装,仅需较少的外部器件。

二.特性电压输入范围:9~40V输出电压精度(Vref=1.0V):±2.0%CC/CV模式通过外部电阻精确设置限流点;限流精度:±5%过温保护(OTP)内置软启动时间:3ms固定频率:120KHz输入欠压保护(典型7.5V)占空比范围:0~95%COMP引脚同时实现外部补偿和关断控制输出可使用陶瓷电容可调整的输出线缆压降补偿QFN20L-5×5封装三.应用汽车充电器便携式充电设配具有限流功能的通用DC/DC转换器四、极限参数(T A=25℃)五、推荐使用条件图1.SP1229HN功能框图七、引脚分布BS LXNC LX LX Array FB SEN1SEN2NC NC顶部视图图2. SP1229HN管脚分布图八、电气参数VIN=12V,T A=25℃(除非其他说明)九、典型应用图3. SP1229HN典型应用电路(VOUT=5V,IOUT=4.8A) 注:如果输出只用一路限流,那么另外一路SEN必须接地。

十.封装外形十一.功能描述1. CC/CV 控制模式SP1229HN 具有CC/CV 功能,即恒流输出控制模式和恒压输出控制模式。

SSV6030P_datasheet_v0p1_20150918

SSV6030P_datasheet_v0p1_20150918

1.1
General Description
The SSV6030P WLAN is designed to support IEEE 802.11 b/g/n single stream with the state ofthe-art design techniques and process technology to achieve low power consumption and high throughput performance to address the requirement of mobile and handheld devices. The SSV6030P WLAN low power function uses the innovative design techniques and the optimized architecture which best utilizes the advanced process technology to reduce active and idle power, and achieve extreme low power consumption at sleep state to extend the battery life. The SSV6030P WLAN A-MPDU Tx function maximizes the throughput performance while achieving the best buffer utilization.

5
SSV6030P Datasheet V0.1
WFA features – WEP/TKIP/WPA/WPA2 – WMM/WMM PS – WPS 1.0 and 2.0 WiFi Direct(P2P)

OVATION中文版说明书

OVATION中文版说明书

OVATION-艾默生过程控制公用事业部(PWS) 网络OVATION网络在今天的过程控制领域,对于任何技术的投资必须考虑它与未来科技的发展的兼容性。

因此,控制系统需要一个开放的结构。

OVATION采用适用于实时过程控制的通讯网络,具有最快的速度和最大的容量。

采用全冗余容错技术的OVATION Control Network 严格遵循IEEE的标准。

OVATION网络与通讯介质无关,既可采用光纤,也可采用UTP。

其采用的硬件极易在市场上购得,而且取消了对特殊网关和接口的要求,能够与企业内部LAN,WAN和Intranet 的完全连通。

OVATION的网络不使用常见的过程控制系统中数据高速公路与厂区内LAN连接所需的复杂网桥。

用户可用OVATION的统一网络,在确保过程安全的前提下,把过程控制同企业信息系统结合起来。

OVATION的高速网络不同于其它DCS系统,它是一个完全确定的实时数据传输网络,即使在工况扰动的情况下也决不丢失、衰减或延迟信号。

网络标准OVATION能够把控制机制和信息整体结合起来,是实现投资目标的有效途径。

它能允许最终用户使用最好的方法来组织他们的信息集合,而不用考虑协议、网络管理和操作系统等等。

OVATION网络软件使用ISO/OSI可以在任何一个标准物理网络层中通讯,具有所有网络的特性:冗余、同步、确定和令牌传输。

当在与以太网、快速以太网、令牌环或其它拓扑结构相连时,它使用TCP/IP协议。

因为OVATION系统在控制系统网络术上的突破,最终用户为了在局域和广域范围内(LAN 和WAN)构建信息系统,可以合成多个网络系统。

所有其它分散控制系统厂商为了控制系统和厂区局域网相连接所设计的各种网关和用户接口在OVATION系统并不需要。

OVATION系统设计原则是将从上到下的所有标准都合成一个完全开放的环境,所以OVATION允许最终用户在系统中集成其它厂商的产品。

基于开放式的通讯协议,OVATION 系统已经成功的将全厂区域自动控制和信息组成一个整体,在今后所有的版本中也会继续使用所有标准组合。

NX1P+datasheet

NX1P+datasheet

出同步刷新切换
0.8ms以下
(富士通连接器、 宽30mm)
*使用时戳时刻指定输出方式时,需要EtherCAT耦合器单元Ver.1.1以上版本、Sysmac Studio Ver.1.07以上版本。
型号
NX-OD2154 NX-OD2258 NX-OD3121 NX-OD3153 NX-OD3256 NX-OD3257
8点 N.O.
规格 最大开关能力
最大开关容量: AC250V/2A(cosφ=1) AC250V/2A(cosφ=0.4) DC24V/2A、4A/单元
最大开关容量: AC250V/2A(cosφ=1) AC250V/2A(cosφ=0.4) DC24V/2A、8A/单元
I/O 刷新方式
自由运行 刷新方式
模拟输入2点 输入0~10V(分辨率:1/4,000)、0~20mA(分辨率:1/2,000) 连接方式:PUSH-IN紧固端子台(5个端子)
对应协议
上位链接、 Modbus-RTU主机、无协议
型号 NX1W-CIF01
海外 标准
NX1W-CIF11 NX1W-CIF12
NX1W-ADB21
UC1、
DC24V
自动运行刷新或输入输出同步刷新 切换
20µs以下/400µs以下
型号
NX-ID3317 NX-ID3343 NX-ID3344 NX-ID3417 NX-ID3443 NX-ID3444 NX-ID4342 NX-ID4442 NX-ID5342 NX-ID5442
海外标准
UC1、 N、L、 CE、 RCM、 KC
DC12~24V DC24V
0.1ms以下/ 0.8ms以下
自动运行刷新或输入输 出同步刷新切换

IP1001中文资料

IP1001中文资料

• 3.3V to 12V input voltage 1•20A maximum load capability, with no derating up to T PCB = 90°C • 5 bit DAC settable, 0.925V to 2V output voltage range 2•Configurable down to 3.3Vin & up to 3.3Vout with simple external circuit 3•200kHz or 300kHz nominal switching frequency •Optimized for very low power losses •Over & undervoltage protection •Adjustable lossless current limit•Internal features minimize layout sensitivity *•Very small outline 14mm x 14mm x 3mmFull Function Synchronous Buck Power BlockIntegrated Power Semiconductors, Control IC & PassivesThe iP1001 is a fully optimized solution for high current synchronous buck applications requiring up to 20A.The iP1001 is optimized for single-phase applications, and includes a full function fast transient response PWM control, with an optimized power semiconductor chip-set and associated passives, achieving benchmark power density. Very few external components are required, including output inductor, input & output capacitors.Further range of operation to 3.3Vin can be achieved with the addition of a simple external boost circuit, and operation up to 3.3Vout can be achieved with a simple external voltage divider.iPOWIR technology offers designers an innovative board space-saving solution for applications requiring high power densities. iPOWIR technology eases design for applications where component integration offers benefits in performance and functionality. iPOWIR technology solutions are also optimized internally for layout,heat transfer and component selection.DescriptioniP1001 Power BlockFeatures* Although, all of the difficult PCB layout and bypassing issues have been addressed with the internal design of the iPOWIR block, proper layout techniques should be applied for the design of the power supply board. There are no concerns about unwanted shutdowns common to switching power supplies, if operated as specified. TheiPOWIR block will function normally, but not optimally without any additional input decoupling capacitors. Input decoupling capacitors should be added at Vin pin for stable and reliable long term operation. No additional bypassing is required on the Vdd pin. See layout guidelines in datasheet for more detailed information.PD - 94336c05/20/03iP1001 1iP1001Absolute Maximum Ratings Recommended Operating ConditionsElectrical Specifications @ VDD = 5V & TPCB0°C - 90°C (Unless otherwise specified)All specifications @ 25°C (unless otherwise specified) 2 3iP1001Electrical Specifications (continued)Notes :1 For Vin less than 4.5V requires external 5V DD supply.2 Can be modified to operate up to 3.3V OUT , outside of DAC settable range. See Design Guidelines on how to setoutput voltage greater than 2V.3 See design guidelines.4 See Fig.5 for Recommended Operating Area4iP1001Fig 1. Power Loss vs CurrentFig 2. Safe Operating Area (SOA) vs T PCBAdjusting the Power Loss and SOA curves for different operating conditionsTo make adjustments to the power loss curves in Fig. 1, multiply the normalized value obtained from the curves in Figs. 3,or 4 by the value indicated on the power loss curve in Fig. 1. If multiple adjustments are required, multiply all of the normalized values together, then multiply that product by the value indicated on the power loss curve in Fig. 1. The resulting product is the final power loss based on all factors.To make adjustments to the SOA curve in Fig. 2, determine the maximum allowed PCB temperature in Fig. 2 at the required operating current. Then, add the correction temperature from the normalized curves in Figs. 3 or 4 to find the final maximum allowable PCB temperature. When multiple adjustments are required, add all of the temperatures together, then add the sum to the PCB temperature indicated on the SOA graph to determine the final maximum allowable PCB temperature based on all factors.Note: If input voltage <5Vin nominal operation is required then first see Fig. 5 for maximum current capability limit.Operating Conditions for the examples below:Output Current = 20A Input Voltage = 7VOutput Voltage = 2.5VAdjusting for Maximum Power Loss:(Fig. 1)Maximum power loss =5 W(Fig. 3)Normalized power loss for output voltage ≈1.14(Fig. 4)Normalized power loss for input voltage ≈0.89Adjusted Power Loss = 5W x 0.89 x 1.14 ≈ 5.07WAdjusting for SOA Temperature:(Fig. 2)SOA PCB Temperature = 90°C(Fig. 3)Normalized SOA PCB Temperature for output voltage ≈ -4.5°C (Fig. 4)Normalized SOA PCB Temperature for input voltage ≈ 4°C Adjusted SOA PCB Temperature = 90°C + 4°C -4.5°C ≈ 89.5°CGuaranteed Performance Curves0.00.51.01.52.02.53.03.54.04.55.002468101214161820Output Current (A)P o w e r L o s s (W )2468101214161820220102030405060708090100110120130PCB Temperature (°C)O u t p u t C u r r e n t (A ) 5iP1001Fig 4. Normalized Power Loss vs V INFig 3. Normalized Power Loss vs V OUTFig 5. Recommended Operating AreaFor 200kHz frequency setting there will be a 10% power loss reduction and a positive PCB temperature adjustment of 3°C.Typical Performance CurvesOutput Voltage (V)05101520250.91.21.51.82.12.42.73.03.3Input Voltage (V)SOA PCB Temperature Adjustmentltage (°C)SOA PCB Temperature Adjustmentltage (°C)P o w e r L o s s (N o r m a l i z e d )P o w e r L o s s (N o r m a l i z e d )Output Voltage (V)L o a d C u r r e n t (A )0.880.941.001.061.121.181.241.301.360.91.3 1.72.1 2.5 2.93.3-13-11-9-6-4-20240.830.860.890.910.940.971.00345678910111201234566iP1001D4 D3 D2 D1 D0 OUTPUTVOLTAGE(V)0 0 0 0 0 2.00 0 0 0 0 1 1.95 0 0 0 1 0 1.90 0 0 0 1 1 1.85 0 0 1 0 0 1.80 0 0 1 0 1 1.750 0 1 1 0 1.70 0 0 1 1 1 1.65 0 1 0 0 0 1.60 0 1 0 0 1 1.55 0 1 0 1 0 1.50 0 1 0 1 1 1.45 0 1 1 0 0 1.40 0 1 1 0 1 1.35 0 1 1 1 0 1.30 0 1 1 1 1 Shutdown* 1 0 0 0 0 1.275 1 0 0 0 1 1.250 1 0 0 1 0 1.225 1 0 0 1 1 1.200 1 0 1 0 0 1.175 1 0 1 0 1 1.150 1 0 1 1 0 1.125 1 0 1 1 1 1.100 1 1 0 0 0 1.075 1 1 0 0 1 1.050 1 1 0 1 0 1.025 1 1 0 1 1 1.000 1 1 1 0 0 0.975 1 1 1 0 1 0.950 1 1 1 1 0 0.925 1 1 1 1 1Shutdown** Shutdown : Upon receipt of the shutdown code (per VID code table above), both FET s are turned OFF and the output is discharged as the undervoltage protection is activated.Table 1. VID Code Table 2Fig 6. Overcurrent adjustment settings using R LIM7iP1001Table 2. Pin DescriptioniP100189iP1001Fig 8. Recommended PCB Footprint (Top View)NCNC NC NC NC NC NCNC NC NCNC NCNC NC NC NC NC NC NC NC NC NC NCNC NC NCNCNC NC NC NC NCNC NCNCENABLEPGOOD D0D1D2D3D4 V DDV SWPGNDPGNDV ING N D SSGND FREQ ILIMV FNC V FSiP1001iP1001 User’s Design GuidelinesThe iP1001 is a 20A power block that consists of optimized power semiconductors, PWM control and its associated passive components. It is based on a synchronous buck topology and offers an optimized solution where space, efficiency and noise caused by stray parasitics are of concern. The iP1001 com-ponents are integrated in a ball grid array (BGA) pack-age where the electrical and thermal conduction is accomplished through solder balls. FUNCTIONAL DESCRIPTIONVINThe standard iP1001 operating input voltage range is 5V to 12V. The input voltage can also be easily configured to run at voltages down to 3.3V.FREQThe PWM control is pseudo current mode. The ESR of the output filter capacitor is used for current sens-ing and the output voltage ripple developed across the ESR provides the PWM ramp signal.iP1001 offers two switching frequency settings, 200kHz and 300kHz. At a given setting the switching frequency will remain relatively constant indepen-dent of load current.VDD(+5V bias)An external 5V bias supply is required to operate the iP1001. In applications where input voltages are lower than 4.5V, and where 5V is not available, aspecial boost circuit is required to supply VDD with 5V(as shown in the reference design). Soft Start, VDDUndervoltage LockoutWhen VDD rises above 4.2V a soft start is initiated byramping the maximum allowable current limit. The ramp time is typically 1.8ms. An external capacitor can be added across the current limit resistor from ILIM to PGND to provide up to 5ms ramp time. Select the capacitor according to the 10nf/ms rule. PGOODThe PGOOD comparator constantly monitors VFfor undervoltage. A 5% drop in output voltage can cause PGOOD to go low. PGOOD pin is internally pulled-up to VDDthrough a 100K, 5% resistor. If it is desired to use the PGOOD signal to enable another stage using iP1001, then it is recommended to filter and buffer PGOOD to prevent transients appearing at the output from pulling PGOOD low.OVP (Output Overvoltage Protection)If the overvoltage trip 2.25V threshold is reached, the OVP is triggered, the circuit is shutdown and the bottom FET is latched on discharging the output filter capacitor. Pulling ENABLE low resets the latch. The overvoltage trip threshold is scaled accordingly, if output voltages greater than 2V are set through voltage dividers.UVP (Output Undervoltage Protection)The Output Undervoltage Protection trip threshold is fixed at 0.8V. If ENABLE is pulled up and VFis below 0.8V for a duration of 10-20ms, the PWM will be in a latched state, with the bottom FET latched on, and will not restart until ENABLE is recycled.DAC Converter (D0-D4)The output voltage is programmed through a 5-bit DAC (see the VID code in table 1). The output volt-age can be programmed from 0.925V to 2V. To elimi-nate external resistors, the DAC pins are internally pulled up. To set for output voltages above 2V, the DAC must be set to 2V and a resistor divider,R3 & R4 (see Fig 10.), is used. The values of the resistors are selected using equation 1.Equation 1 : Vout = VFx (1 + R3/R4)where VFis equal to the DAC settingand R4 is recommended to be ~1kΩTable 3 - iP1001 Operating Truth Table10 11iP1001DESIGN PROCEDUREInductor SelectionThe inductor is selected according to the following expression.L = V OUT x (1-D) / (fsw x ∆I L )where, D = VOUT/ VINV OUT is the output voltage in Volts,fsw is the switching frequency in kHz,∆I L is the output inductor ripple current.The inductor value should be selected from 0.8µH to 2.0µH range.Output Capacitor SelectionUse tantalum or POSCAP type capacitors for iP1001.Selection of the output capacitors depends on several factors.•Low effective ESR for ripple and load transient requirements.•Stability.To support the load transients and to stay within a specified voltage dip ∆V due to the transients, ESR selection should satisfy the following equation:R ESR ≤ ∆V/∆Iwhere, ∆I is the transient load stepIf output voltage ripple is required to be maintained at specified levels then, the following expression should be used to select the output capacitors.R ESR ≤ V p-p / ∆I Lwhere, V p-p is the peak to peak output voltage ripple.The value of the output capacitor ESR zero frequency also determines stability. The value of the ESR zero frequency is calculated by the expression:R ESR = 1 / (2π x f ESR x C OUT )A 470µF POSCAP capacitor has a maximum 35m Ωof ESR which provides 9.7kHz zero frequency.The ESR zero frequency must be set below 12kHz.This value is calculated assuming the capacitor datasheet maximum ESR value.Example:To determine the amount of capacitance to meet a 30mVp-p output ripple, with 4A inductor current ripple requirement.The calculated ESR will be = 30mV/4A =7.5m Ω. This will require 5 x 470uF POSCAP capacitors. The total ESR will result in a 9.7kHz zero frequency.For stable operation:• Set the resonant frequency f o of the output inductor and capacitor between 2kHz and 4kHz.The resonant frequency is calculated using the following expression:f o = 1/ (2π x (√LC))• Select the output inductor value between 0.8µHto 2.0µH and the output capacitance between 1880µF (4x 470µF) and 5600µF (12x470µF)• Set the minimum output ripple voltage to begreater than 0.5% of the output voltage. Select the capacitor by ESR and by voltage rating rather than capacitance.External Input Capacitor SelectionThe switching currents impose RMS current requirements on the input capacitors. The following expression allows the selection of the input capacitors, based on the input RMS current:I RMS = I LOAD x ( √D x (1-D))where, D = V OUT /V IN12iP1001Application IssuesSetting V OUT above 2VIn certain applications where the output voltage is required to be set higher than the maximum DAC code setting of 2V, it is possible to use an external resistive voltage divider which, for accuracy, needs to have 1% or better tolerance. The switching frequency should be set at 200kHz by connecting the FREQ pin to V DD . Also, the output voltage should never be set higher than 3.3V with a V IN minimum of 5V, or 2.5V with a V IN minimum of 3.3V. The DAC code should be set to 2V and the following equation used to select the resistors:V OUT = V F x (1 + R3/R4)See the reference design for reference designators.Note that the impedance at V F is 180K Ω ±35%. It is recommended that R3 be calculated assuming a value of 1k Ω for R4. Connect V FS to V F and GNDS to PGND.Duty Cycle D = V OUT / V IN >50%For duty cycles >50% the switching frequency should be set at 200kHz. 300kHz switching frequency can be selected if the output is less than 2V and the duty cycle is <50%.For duty cycles >50%, add external compensation ramp from the Vsw terminal of the iP1001 device as shown in the reference design through R9 resistor and C21 capacitor (Fig 10a.). For optimum perfor-mance maintain a RC time constant of approximately 5µs. 13iP1001For stable and noise free operation of the whole power system it is recommended that the designer uses to the following guidelines.1. Follow the layout scheme presented in Fig.9.Make sure that the output inductor L1 is placed as close to the iP1001 as possible to prevent noise propagation that can be caused by switching of power at the switching node V SW , to sensitive circuits.2. Provide a mid-layer solid ground with connections to the top layer through vias. The two PGND pads of the iP1001 also need to be connected to the same ground plane through vias.3. Do not connect SGND pins of the iP1001 to PGND.4. To increase power supply noise immunity, place input and output capacitors close to one another, as shown in the layout diagram. This will provide short high current paths that are essential at the ground terminals.Fig 9. iP1001 suggested layout5. Although there is a certain degree of V IN bypassing inside the iP1001, the external input decoupling capacitors should be as close to the device as possible.6. In situations where the load is located at an appreciable distance from the iP1001 block, it is recommended that at least one or two capacitors be placed close to the iP1001 to derive the V F signal.7. The V F connection to the output capacitors should be as short as possible and should be routed as far away from noise generating traces as possible.8. V FS & GNDS pins need to be connected at the load for remote sensing. If remote sensing is not used connect V FS to V F and GNDS to PGND.9. Refer to IR application note AN-1029 to determine what size vias and what copper weight and thickness to use when designing the PCB.Layout GuidelinesInput TerminalLoad T erminalV OUTOutput Caps (C OUT )Input Caps (C IN )V INPGNDV SWOutput Inductor (L 1)PGNDiP1001 BlockiP1001The schematics in Fig.10a & 10b and complete Bill of Materials in Table 4 are provided as a reference design to enable a preliminary evaluation of iP1001. They represent a simple method of applying the iP1001 solution in a synchronous buck topology. Fig. 10a shows the implementation for <5VIN nominal applications, and Fig. 10b shows theimplementation for 5VIN - 12VINnominalapplications.The connection pins are provided through the solder balls on the bottom layer of the package. A total power supply solution is presented with the addition of inductor L1 and the output capacitors C11-C14. Input capacitors C1-C10 are for bypassing in the5VIN - 12VINapplication, but only C1-C3 are requiredfor <5VIN applications (refer to the BOM for values).Switches 1-5 of SW1 are used to program the output voltage. Refer to the VID table provided in this datasheet for the code that corresponds to the desired output voltage. Resistors R2 & R4 need to be removed for operation at standard VID levels (0.925V - 2.0V, leave R3 = 0Ω). Switch 8 of SW1 enables the output when floating (internally pulledhigh). The 5V VDD power terminal and input powerterminals are provided as separate inputs. They can be connected together if the application requires only 5V nominal input voltage.The reference design also offers a higher output voltage option for greater than 2.0V, up to 3.3V. For output voltages above 2V, the DAC setting must be set to 2V, and then select resistors R3 & R4 per Equation 1 on page 10 for the desired output volt-age. Remove R5 and connect VF to VFSthrough R2,where R2=0Ω. In this case, GNDS should be refer-enced to PGND. Tighter regulation can be achieved by using resistors with less than 1% tolerance. For Vin < 5V and Vout > 2V, the frequency select pin (FREQ) must be set to 200kHz (connected to VDD).For applications with VIN < 5V and where there is noauxiliary 5V available, connections JP2 and JP3 must be provided in order to enable the boost cir-cuit. This will provide 5V VDD necessary for theiP1001 internal logic to function. The boost circuit will convert 3.3V input voltage to 5V, to power theVDD , and will provide enough power to supply theinternal logic for up to five iP1001 power blocks.iP1001 Reference Design 1415iP1001Fig 10a. - Reference Design Schematic For <4.5V INFig 10b. - Reference Design Schematic For 5V IN - 12V IN Nominal16iP1001Table 4 - Reference Design Bill of MaterialsIRDCiP1001-A (For operation <4.5V IN )Designator Value Part TypeFootprint Mfr.Mfr. P/N C1, C3, C5100uFCapacitor, 6.3V, 20%, X5R1812TDK C4532X5R0J107MT C2, C4, C6, C7, C8, C9, C10, C15-Not Installed---C11, C12, C13, C14470uFCapacitor, 6.3V, 20%, Tantalum 7343Sanyo 6TPB470M C16, C190.100uF Capacitor, 50V, 10%, X7R 1206Novacap 1206B104K500N C17, C1810.0uF Capacitor, 16V, 10%, X5R 1210TDK C3225X5R1C106KT C20 1.00uF Capacitor, 10V, 10%, X7R 0805MuRata GRM40X7R105K010C2147.0pF Capacitor, 50V, 5%, C0G 1206MuRata GRM42-6C0G470J050AD140V Schottky Diode, 40V, 2.1AD-64International Rectifier 10MQ040NJP1, JP2, JP3-Test Point -Samtec TSW-102-07-LS JP1-1, JP2-1, JP3-1-Shunt-Samtec SNT-100-BKT L1 1.06uHInductor, 16A, 20%, Ferrite SMT Panasonic ETQP6F1R1BFA L222uH Inductor, 0.68A, 20%, FerriteSMT Sumida CR43-220R10:Resistor, 0:Jumper 2716Isotek Corp SMT-R000R2-For <2Vout, Not installed For >2Vout, Resistor, 0:Jumper SMT --R3-For <2Vout, Resistor, 0: Jumper For >2Vout see formula for valueSMT --R4-For <2Vout, Not installed For >2Vout recommend 1k :see formula for detailSMT --R5-For <2Vout, Resistor, 0: JumperFor >2Vout, Not installed 1206PanasonicERJ-8GEY0R00R60:Resistor, 0:Jumper 1206--R7340k :Resistor, 340k :, 1%340k : sets for 20A limit.See ILIM formula for other values1206ROHMMCR18EZHF3403R8100k :Resistor, 100k :, 5%1206ROHM MCR18EZHJ104R991k :Resistor, 91k :, 5%1206ROHM MCR18EZHJ913SW1-8-position DIP switchSMT C&K Components SD08H0SKTP1, TP3-Not Installed ---TP2, TP4, TP5-Test Point-Keystone1502-2U1-Power BlockSSBGA14mmx14mm International RectifieriP1001U2-IC, Step-Up DC-DC Converter, 0.5A8uMAX MaximMAX1675EUAIRDCiP1001-B (For operation 5V IN to 12V IN )DesignatorValuePart TypeFootprint Mfr.Mfr. P/NC1 C2 C3 C4 C5 C6 C7 C8 C9 C1010.0uF Capacitor, 25V, 10%, X5R 1812MuRata GRM43-2X5R106K25A C11 C12 C13 C14470uF Capacitor, 6.3V, 20%, Tantalum7343Sanyo 6TPB470M C160.100uFCapacitor, 50V, 10%, X7R1206Novacap1206B104K500NC15, C17, C18, C19, C20, C21-Not Installed---D140V Schottky Diode, 40V, 2.1AD-64International Rectifier10MQ040NJP1, JP2, JP3-Not Installed ---JP1-1, JP2-1, JP3-1-Not Installed---L1 1.06uH Inductor, 16A, 20%, FerriteSMT PanasonicETQP6F1R1BFAL2-Not Installed ---R10:Resistor, 0:Jumper 2716Isotek CorpSMT-R000R2-For <2Vout, Not installed For >2Vout, Resistor, 0:Jumper SMT --R3-For <2Vout, Resistor, 0: Jumper For >2Vout see formula for valueSMT --R4-For <2Vout, Not installed For >2Vout recommend 1k :see formula for detailSMT --R5-For <2Vout, Resistor, 0: JumperFor >2Vout, Not installed 1206PanasonicERJ-8GEY0R00R60:Resistor, 0:Jumper 1206--R7340k :Resistor, 340k :, 1%340k : sets for 20A limit.See ILIM formula for other values1206ROHM MCR18EZHF3403R8, R9-Not Installed ---SW1-8-position DIP switchSMT C&K ComponentsSD08H0SK TP1 TP2 TP4 TP5-Test Point -Keystone1502-2TP3-Not Installed---U1-Power Block SSBGA14mmx14mmInternational RectifieriP1001U2-Not Installed---17iP1001iPOWIR Technology products:AN-1028: Recommended Design, Integration and Rework Guidelines for International Rectifier’s iPOWIR Technology BGA PackagesThis paper discusses the assembly considerations that need to be taken when mounting iPOWIR BGA’s on printed circuit boards. This includes soldering, pick and place, reflow, inspection, cleaning and reworking recommendations.AN-1029: Optimizing a PCB Layout for an iPOWIR Technology DesignThis paper describes how to optimize the PCB layout design for both thermal and electrical performance.This includes placement, routing, and via interconnect suggestions.AN-1030: Applying iPOWIR Products in Your Thermal EnvironmentThis paper explains how to use the Power Loss and SOA curves in the data sheet to validate if theoperating conditions and thermal environment are within the Safe Operating Area of the iPOWIR product.。

德欣集团热保护压敏电阻产品规格说明书

德欣集团热保护压敏电阻产品规格说明书

SPD Series Specifications德欣集团深圳市德欣电器有限公司SPD全系列规格书产品名称:热保护压敏电阻型号规格: COV25D-COV60D(201K~162K)日期: 2019年6月30日本集团公司旗下总生产面积 60000 平米以上,主营产品压敏芯片及压敏电阻器,电压范围从15V--1800V,产品直径从3mm--80mm均能全系列生产,年产能压敏芯片12亿只以上,压敏电阻器成品8亿只以上,综合年产能20亿只以上,为国内压敏芯片,压敏电阻器产能最大生产商之一,其中(15V-82V)低压压敏芯片,产能,产量,市场占有率位居世界第一。

本公司旗下所生产的全系列产品均有完善的认证体系:具备CQC,UL,CSA,VDE,SGS等多国认证,产品畅销多个国家,全员推行并遵守ISO9001质量管理体系,ISO14001环境管理体系,OHSAS18001职业健康安全管理体系,拥有国家发明专利6项,实用新型专利7项,为高新技术企业。

华北生产基地:山东省德州市平原县经济开发区德欣电器高新科技产业园华南生产基地:惠州市惠阳区秋长将军路合美兴工业园西南生产基地:四川省南充市阆中市七里汉王祠路小微企业孵化园 3 号联系人:林茂发移动电话:136****5669固定电话:*************官方网站:SPD Series Specifications SPD 系列规格说明 Explanation of Part Numbers 型号说明:-Specifications 规格说明:□Varistor Voltage Range压敏电阻动作电压范围 200V~1600V(dc) □Peak Current For 8/20us Current Wave在8/20us电流波形最大通流量 20KA~70KA □Energy Range For 10/1000us Current Wave在10/1000us电流波形的能量范围 250J~2500J □Storage Temperature Range储存温度范围 -40℃~85℃℃ □Operation Ambient Temperature Range作业环境温度范围储存温度范围 -40℃~85℃ □Typical Response Time反应时间 〈25ns □Insulation Resistance绝缘电阻 ≧1000MΩApplications 应用领导域:▇ Protection Of Communication Against Lightning 通信电源防雷保护▇ Industrial Power Distributors 工业配电柜▇ Railway Highway and Air-signal 铁路、公路、航空信号系统▇ Building Power Distributors Input Against Lightning 大楼供电电源入端防雷COV D KC Common Code 产品类别代码DE xin COV Metal Oxide Varistor Surg e Absorber 德欣COV 金属氧化物压敏电阻器 25 32,.34 53 60ChipDiameter 芯片直径 Φ25mm Φ32mm S34mm Φ53mm Φ60mmChip .Shape芯片形状Varistor Voltage 压敏电阻动作电压例如Examples: 47 × 100 = 47 V 47 × 101 = 470 V 11 × 102 = 1100 V47471112Tolerance 误差 K .±10%L .±15% M .±20% OrCustomer Special Requirem entD-Disc 圆形B-Block 塑胶方S-Square 方形Enclosure 包封材质C:Epoxy 环氧树脂 E:Plastic...Case 注塑外壳Tab Style 引出端形状P Planet 平板型 L L Shape L 型 C Radial 圆型L•25D Specifiation*32D Specification(表一:基本尺寸表)(表二:厚度尺寸表) (图1:32D系列简图)SPD Series Specifications *40D Specification(表一:基本尺寸表)(表二:厚度尺寸表) (图1:40D系列简图)*53D Specification(表一:基本尺寸表)(表二:厚度尺寸表) (图1:53D系列简图)*34S Specification(表一:基本尺寸表)(表二:厚度尺寸表) (图1:34S系列简图)*34B (BLOCK VARISTOR) Specification注:未注明公差±0.5mm(图1:34B系列简图)*60B (BLOCK VARISTOR) Specification注:未注明公差±0.5mm(图1:60B系列简图)V-I Curve 电压电流特性曲线:第 21 页 SPD Series Specifications。

ST STM1001 数据手册

ST STM1001 数据手册

February 2010Doc ID 10373 Rev 61/18STM1001Reset circuitFeatures■Precision monitoring of 3 V, 3.3 V, and 5 V supply voltages ■Open drain RST output■30 ms or 140 ms reset pulse width (min)■Low supply current - 6 µA (typ)■Guaranteed RST assertion down to V CC = 1.0 V ■Operating temperature:––40 °C to 85 °C (industrial grade)■Lead-free, small SOT23 packageContents STM1001Contents1Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72.1Reset output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72.2Negative-going V CC transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 8Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172/18Doc ID 10373 Rev 6STM1001List of tables List of tablesTable 1.Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 2.Absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 3.Operating and AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 4.DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 5.SOT23-3 – 3-lead small outline transistor package mechanical data. . . . . . . . . . . . . . . . . 14 Table 6.Ordering information scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 7.Marking description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 8.Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Doc ID 10373 Rev 63/18List of figures STM1001 List of figuresFigure 1.Logic diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2.Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3.Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 4.Hardware hookup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 5.Supply current vs. temperature, L/M/R/S/T (no load). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 6.Power-down reset delay vs. temperature - V OD = V TH – V CC (L/M). . . . . . . . . . . . . . . . . . . 8 Figure 7.Power-down reset delay vs. temperature - V OD = V TH – V CC (R/S/T) . . . . . . . . . . . . . . . . . 9 Figure 8.Power-up t rec vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 9.Normalized reset threshold vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 10.Max transient duration not causing reset pulse vs. reset comparator overdrive. . . . . . . . . 10 Figure 11.AC testing input/output waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 12.SOT23-3 – 3-lead small outline transistor package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 4/18Doc ID 10373 Rev 6STM1001Description 1 DescriptionThe STM1001 microprocessor reset circuit is a low-power supervisory device used tomonitor power supplies. It performs a single function: asserting a reset signal whenever theV CC supply voltage drops below a preset value and keeping it asserted until V CC has risenabove the preset threshold for a minimum period of time (t rec).Table 1.Signal namesV SS GroundRST Active-low reset output (open drain)V CC Supply voltageDoc ID 10373 Rev 65/18Description STM10011.Open drain1.RST output requires pull-up resistor.6/18Doc ID 10373 Rev 6STM1001OperationDoc ID 10373 Rev 67/182 Operation2.1 Reset outputThe STM1001 microprocessor reset circuit asserts a reset signal to the MCU whenever V CCgoes below the reset threshold (V RST ). RST is guaranteed valid down to V CC =1V (0°to 70 °C).During power-up, once V CC exceeds the reset threshold an internal timer keeps RST low for the reset time-out period, t rec . After this interval, RST returns high.If V CC drops below the reset threshold, RST goes low. Each time RST is asserted, it stays low for at least the reset time-out period. Any time V CC goes below the reset threshold, the internal timer clears. The reset timer starts when V CC returns above the reset threshold. The active-low reset (RST) is an open drain output.2.2 Negative-going V CC transientsThe STM1001 is relatively immune to negative-going V CC transients (glitches). Figure 10 onpage 10 shows typical transient duration versus reset comparator overdrive (for which the STM1001 will NOT generate a reset pulse). The graph was generated using a negative pulse applied to V CC , starting at 0.5 V above the actual reset threshold and ending below it by the magnitude indicated (comparator overdrive). The graph indicates the maximum pulse width a negative V CC transient can have without causing a reset pulse. As the magnitude of the transient increases (further below the threshold), the maximum allowable pulse width decreases. Any combination of duration and overdrive which lies under the curve will NOT generate a reset signal. Typically, a V CC transient that goes 100 mV below the reset threshold and lasts 20 µs or less will not cause a reset pulse. A 0.1 µF bypass capacitor mounted as close as possible to the V CC pin provides additional transient immunity.3 Typical operating characteristicsNote:Typical values are at T A = 25 °C, V CC = 5 V for L/M versions, V CC = 3.3 V for T/S versions, and V CC= 3.0 V for R versions.8/18Doc ID 10373 Rev 6Note:Valid for t rec = 210 ms (typ).Doc ID 10373 Rev 69/18Figure 10.Max transient duration not causing reset pulse vs. reset comparator10/18Doc ID 10373 Rev 6STM1001Maximum ratingsDoc ID 10373 Rev 611/184 Maximum ratingsStressing the device above the rating listed in the absolute maximum ratings table maycause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions forextended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.Table 2.Absolute maximum ratingsSymbol ParameterValue Unit T STG Storage temperature (V CC off)–55 to 150°C T SLD (1)1.Reflow at peak temperature of 260 °C. The time above 255 °C must not exceed 30 seconds.Lead solder temperature for 10 seconds 260°C V IO Input or output voltage –0.3 to V CC +0.3V V CC Supply voltage –0.3 to 7.0V I O Output current 20mA P DPower dissipation320mWDC and AC parameters STM1001 5 DC and AC parametersThis section summarizes the operating measurement conditions, and the DC and ACcharacteristics of the device. The parameters in the DC and AC characteristics tables thatfollow, are derived from tests performed under the measurement conditions summarized inTable3: Operating and AC measurement conditions. Designers should check that theoperating conditions in their circuit match the operating conditions when relying on thequoted parameters.Table 3.Operating and AC measurement conditionsParameter STM1001Unit V CC supply voltage 1.0 to 5.5VAmbient operating temperature (T A)–40 to 85°CInput rise and fall times≤5nsInput pulse voltages0.2 to 0.8 V CC VInput and output timing ref. voltages0.3 to 0.7 V CC V12/18Doc ID 10373 Rev 6STM1001DC and AC parametersDoc ID 10373 Rev 613/18Table 4.DC and AC characteristicsSym Description Test condition (1)1.Valid for ambient operating temperature: T A = –40 to 85 °C; V CC = 1.2 V to 5.5 V (except where noted).Min TypMax Unit V CC Operating voltage T A = –40 to +85 °C 1.2 5.5V T A = 0 to +70 °C 1.05.5V I CC V CC supply current V CC < 3.6 V 5.510µA V CC < 5.5 V 715µA I LOOpen drain reset outputleakage currentV CC > V RST ,Reset not asserted–1+1µA V OLRST output low voltageSTM1001R/S/T only, I OL = 1.2 mAV CC = V RST (min)0.3V STM1001L/M only, I OL = 3.2 mAV CC = V RST (min)0.4V V OLRST output low voltageI OL = 50 µA; V CC > 1.0 V0.3VRESET thresholdsV RSTReset thresholdSTM1001L 25 °C 4.56 4.634.70V –40 to 85 °C4.50 4.75V STM1001M25 °C 4.31 4.38 4.45V –40 to 85 °C4.25 4.50V STM1001T 25 °C 3.04 3.08 3.11V –40 to 85 °C3.00 3.15V STM1001S 25 °C 2.89 2.93 2.96V –40 to 85 °C2.853.00V STM1001R25 °C 2.59 2.63 2.66V –40 to 85 °C 2.552.70V V RST temperature coefficientV CC = 3.3 V45ppm/°C V CC to RST delayV CC = V RST to (V RST – 100 mV)STM1001L/M 40µs STM1001R/S/T20µs t recRST pulse widthOption B (refer to Table 6)203040msOption “Blank” (refer to Table 6)140210280Package mechanical data STM1001 6 Package mechanical dataIn order to meet environmental requirements, ST offers these devices in different grades ofECOPACK® packages, depending on their level of environmental compliance. ECOPACK®specifications, grade definitions and product status are available at: .ECOPACK® is an ST trademark.Note:Drawing is not to scale.Table 5.SOT23-3 – 3-lead small outline transistor package mechanical datamm inchesSymbolTyp Min Max Typ Min Max A0.89 1.120.0350.044A10.010.100.0010.004A20.88 1.020.0350.042b0.300.500.0120.020C0.080.200.0030.008D 2.80 3.040.1100.120E 2.10 2.640.0830.104E1 1.20 1.400.0470.055e0.89 1.030.0350.041e1 1.78 2.050.0700.081L0.540.021L10.400.600.0160.024Q0°8°0°8°N3314/18Doc ID 10373 Rev 6STM1001Part numberingDoc ID 10373 Rev 615/187 Part numberingTable 6.Ordering information schemeFor other options, or for more information on any aspect of this device, please contact theST sales office nearest you.Example:STM1001SBWX6FDevice type STM1001Reset threshold voltage L = V RST = 4.50 V to 4.75 V M = V RST = 4.25 V to 4.50 V T = V RST = 3.00 V to 3.15 V S = V RST = 2.85 V to 3.00 V R = V RST = 2.55 V to 2.70 V RST pulse width (t rec )B = 20 to 40 ms Blank = 140 to 280 msPackage WX = SOT23-3Temperature range 6 = –40 to 85 °CShipping methodF = ECOP ACK ® package, tape & reelPart numbering STM1001Table 7.Marking descriptionPart number Reset threshold Output Topside marking(1)STM1001LWX6F 4.63 V Open drain RST8BAxSTM1001MWX6F 4.38 V Open drain RST8BBxSTM1001TWX6F 3.08 V Open drain RST8BCxSTM1001SWX6F 2.93 V Open drain RST8BDxSTM1001RWX6F 2.63 V Open drain RST8BExSTM1001SBWX6F 2.93 V Open drain RST8BMx1.Lowercase “x” indicates date code.16/18Doc ID 10373 Rev 6STM1001Revision historyDoc ID 10373 Rev 617/188 Revision historyTable 8.Document revision historyDate RevisionChanges09-Dec-20031First edition19-Feb-20042Part number changed from STM630122-Mar-2004 2.1Update DC characteristics (Table 4)09-Apr-20043Device promoted; reformatted; marking updated (Table 7)19-Nov-20044Update dimensions (Table 5).19-Sep-20055Remove “Valid RST Output Down to V CC ...” text17-Feb-20106Updated Features ; footnote in Table 2; Table 4; Table 6; Table 7; text inSection 6; added note to Figure 8; reformatted document.STM1001Please Read Carefully:Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice.All ST products are sold pursuant to ST’s terms and conditions of sale.Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein.No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.ST and the ST logo are trademarks or registered trademarks of ST in various countries.Information in this document supersedes and replaces all information previously supplied.The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.© 2010 STMicroelectronics - All rights reservedSTMicroelectronics group of companiesAustralia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America18/18Doc ID 10373 Rev 6。

MBR130T1G;NRVB130T1G;MBR130T3G;中文规格书,Datasheet资料

MBR130T1G;NRVB130T1G;MBR130T3G;中文规格书,Datasheet资料

VF, INSTANTANEOUS FORWARD VOLTAGE (VOLTS)
Figure 1. Maximum Forward Voltage
0.01 IR, REVERSE CURRENT (AMPS) TJ = 125C C, CAPACITANCE (pF) 0.001 0.0001 0.00001 25C 0.000001 75C 200 180 160 140 120 100 80 60 40 20 0 5 10 15 20 25 VR, REVERSE VOLTAGE (VOLTS) 30 0 0
Semiconductor Components Industries, LLC, 2012
January, 2012 − Rev. 4
1
Publication Order Number: MBR130T1/D
/
MBR130T1G, NRVB130T1G, MBR130T3G
S3 M G
SOD−123 CASE 425 STYLE 1
MARKING DIAGRAM
1
S3 MG G
Mechanical Characteristics
Device Marking: S3 Polarity Designator: Cathode Band Weight: 11.7 mg (approximately) Case: Epoxy, Molded Finish: All External Surfaces Corrosion Resistant and Terminal Leads are Readily Solderable Lead and Mounting Surface Temperature for Soldering Purposes: 260C Max. for 10 Seconds

南京拓品微电子有限公司 TP4100 TP4101 TP4102 线性锂电池 充电、放电保护芯片 数

南京拓品微电子有限公司 TP4100 TP4101 TP4102 线性锂电池 充电、放电保护芯片 数

南京拓品微电子有限公司NanJing Top Power ASIC Corp.数据手册DATASHEETTP4100/TP4101/TP4102 (1000mA/500mA/1000mA线性锂电池充电、放电保护芯片)特点·首创5V电源反接保护;·兼容大小3mA-1000mA的可编程充电电流;·锂电池正负极反接保护;·涓流-恒定电流-恒定电压三段式充电;·充电模式电源功率自适应;·精度达到±1%的4.2V预设充电电压;·最高输入可达8V;·20%恒流预充电;·C/10充电终止;·充电待机模式下的电源电流80uA,·放电模式下BAT待机电流4uA;·电池2.6V欠压保护停机,充电自恢复;·过充保护,输出短路保护,输出过流保护;·保护后,8秒后自恢复;·多种封装DFN3*3-8/TSOT23-6/DFN2*2-8。

应用·微型锂电池设备·可穿戴、高集成度锂电池设备·锂电池便携设备等典型应用TP4100单节锂离子电池1A充电电路绝对最大额定值·输入电源电压(VCC):-5.5V~9V ·PROG:-0.3V~VCC+0.3V·BAT:-4.2V~9V·CHRG:-0.3V~9V·BAT短路持续时间:连续·BAT引脚电流:1200mA·PROG引脚电流:1500uA·最大结温:145℃·工作环境温度范围:-40℃~85℃·贮存温度范围:-65℃~125℃·引脚温度(焊接时间10秒):260℃1A电流完整的充电循环(1000mAh)描述TP4100/TP4101/TP4102是一款完整的单节锂离子电池充电管理、放电保护芯片,首创5V电源正负极反接保护,带电池正负极反接保护,兼容大小3mA-1000mA充电电流。

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November 2011Doc ID 018938 Rev 21/9SPV1001NCool bypass switch for photovoltaic applicationsFeatures■SPV1001N30 I F =12.5 A, V R =30 V ■SPV1001N40 I F =12.5 A, V R =40 V ■Very low forward voltage drop ■Very low reverse leakage current ■150 °C operating junction temperatureApplications■Photovoltaic panelsDescriptionThe SPV1001N is a system-in-package solution for photovoltaic applications to perform cool bypass rectification similar to that of aconventional Schottky diode but with much lower forward voltage drop and reverse leakage current.The device consists of a power MOSFETtransistor which charges a capacitor during the OFF time, and drives its gate during the ON time using the charge previously stored in the capacitor.The ON and OFF times are set to reduce the average voltage drop across the drain and source terminals, resulting in reduced power dissipation.PQFN 5 x 6 mmAnodoCatodoTable 1.Device summaryOrder codes Package Packaging SPV1001N30PQFN 5 x 6 mmTape and reelSPV1001N40Maximum ratings SPV1001N2/9Doc ID 018938 Rev 21 M aximum ratings1.1Absolute maximum ratings1.2 Thermal dataTable 2.Absolute maximum ratingsSymbol ParameterValueUnitSPV1001N30SPV1001N40V RMax DC reverse voltage3040V I F Max forward current 12.512.5 A I FSMNon repetitive peak surge (half-wave, singlephase 50-60 Hz)250250A ESD level Human body level ≥8 k ≥8 kV Table 3.Thermal dataSymbol ParameterValue Unit T J Junction temperature operating range -40 to 150 -40 to 150°C T STGStorage temperature range-40 to 150-40 to 150°C R thJC Thermal resistance, junction-to-case44°C/WSPV1001N Electrical characteristicsDoc ID 018938 Rev 23/92 Electrical characteristicsNote:For correct power dissipation and heatsink sizing, please refer to Figure 1, 2 e 4Table 4.Electrical characteristicsSymbolParameterTest conditionsSPV1001 N30SPV1001 N40UnitMin.Typ.Max.Min.Typ.Max.V F ,AVGAVG forward voltage dropIF = 10AT J = 25°C -120--140-mV IF = 5AT J = 25°C -70--85-mV T J = 125°C -240--280-mV I RReverse leakage current VR = 30VT J = 25°C -1--1-µA T J = 125°C -10--10-µA D TON/T ratio IF = 5AT J = 25°C -95%--95%--T J = 125°C -75%--75%--V FForward voltage dropIF = 5A, T OFFT J = 25°C -850--850-mV T J = 125°C -600--600-mV IF = 5A, T ONT J = 25°C -35--40-mV T J = 125°C-135--160-mVDevice description SPV1001N4/9Doc ID 018938 Rev 23 Device descriptionA photovoltaic panel consists of a series of PV cells. In optimal conditions, all the cells areequally irradiated and function at the same current level. However, during normal operation some cells may become partially shaded or obscured. These shaded cells limit the current generated by the fully irradiated cells and, in the extreme cases where these cells are totally obscured, the current flow is blocked.In this case the shaded cells behave like a load, and the current generated from the fully irradiated cells produces overvoltages which can reach the breakdown threshold. This phenomenon, known as a “hot spot”, can cause overheating of the shaded cells and, in some cases, even permanent damage resulting in current leakage. To prevent hot spots, therefore, bypass diodes are connected in parallel to the cell strings.The device described here has the same functionality as a Schottky diode, but with improved performance. It features very low forward voltage drop and reverse leakagecurrent. It consists of a power MOSFET transistor which charges a capacitor during the OFF time, and drives its gate during the ON time using the charge previously stored in the capacitor. The ON and OFF times are set to reduce the average voltage drop across the drain and source terminals, resulting in reduced power dissipation.SPV1001NDevice descriptionDoc ID 018938 Rev 25/9Figure 1.Average forward power dissipation vs average forward current @ 25°CFigure 2.Average forward power dissipation vs average forward current @ 75°C Figure 3.Reverse current Figure 4.Thermal resistance junction-to-ambient vs copper surface under(1)1.Epoxy printed board FR4, Cu = 35 µmPackage mechanical data SPV1001N 4 Package mechanical dataIn order to meet environmental requirements, ST offers these devices in different grades ofECOPACK® packages, depending on their level of environmental compliance. ECOPACK®specifications, grade definitions and product status are available at: .ECOPACK® is an ST trademark.Table 5.PQFN 5 x 6 mm mechanical datammDim.Min.Typ.Max.A0.850.800.95A10.0200.05D 5.00D2 4.26 4.16 4.36E 6.00E2 2.50 2.40 2.60e 1.27L 1.20 1.10 1.30L10.30NXb0.456/9Doc ID 018938 Rev 2SPV1001N Package mechanical dataDoc ID 018938 Rev 27/9Revision history SPV1001N8/9Doc ID 018938 Rev 25 Revision historyTable 6.Document revision historyDate RevisionChanges20-Jun-20111Initial release 16-Nov-20112Updated Figure 3SPV1001NPlease Read Carefully:Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice.All ST products are sold pursuant to ST’s terms and conditions of sale.Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein.No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.UNLESS OTHERWISE SET FORTH IN ST’S TERM S AND CONDITIONS OF SALE ST DISCLAIM S ANY EXPRESS OR IM PLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIM ITATION IM PLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY TWO AUTHORIZED ST REPRESENTATIVES, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.ST and the ST logo are trademarks or registered trademarks of ST in various countries.Information in this document supersedes and replaces all information previously supplied.The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.© 2011 STMicroelectronics - All rights reservedSTMicroelectronics group of companiesAustralia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of AmericaDoc ID 018938 Rev 29/9分销商库存信息:STMSPV1001N40SPV1001N30。

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