M74HCT174RM13TR中文资料

1/10August 2001sHIGH SPEED : f MAX = 56MHz (TYP.) at V CC = 4.5V sLOW POWER DISSIPATION:I CC =4µA(MAX.) at T A =25°CsCOMPATIBLE WITH TTL OUTPUTS : V IH = 2V (MIN.) V IL = 0.8V (MAX)sSYMMETRICAL OUTPUT IMPEDANCE:|I OH | = I OL = 4mA (MIN)sBALANCED PROPAGATION DELAYS:t PLH ≅ t PHLsPIN AND FUNCTION COMPATIBLE WITH 74 SERIES 174DESCRIPTIONThe M74HCT174 is an high speed CMOS HEX D-TYPE FLIP FLOP WITH CLEAR fabricated with silicon gate C 2MOS technology.Information signals applied to D inputs are transferred to the Q output on the positive going edge of the CLOCK (CK) pulse. When the CLEAR(CLR) input is held low, the Q outputs are held low independently of the other inputs.All inputs are equipped with protection circuits against static discharge and transient excess voltage.M74HCT174HEX D-TYPE FLIP FLOP WITH CLEARPIN CONNECTION AND IEC LOGIC SYMBOLSORDER CODESPACKAGE TUBE T & RDIP M74HCT174B1R SOP M74HCT174M1RM74HCT174RM13TR TSSOPM74HCT174TTRM74HCT1742/10INPUT AND OUTPUT EQUIVALENT CIRCUITPIN DESCRIPTIONTRUTH TABLELOGIC DIAGRAMPIN No SYMBOL NAME AND FUNCTION 1CLEAR Asynchronous Master Reset (Active Low)2, 5, 7, 10, 12, 15Q0 to Q5Flip-Flop Outputs 3, 4, 6, 11, 13, 14D0 to D5 Data Inputs9CLOCK Clock Input (LOW to HIGH, edge triggered)8GND Ground (0V)16VccPositive Supply VoltageM74HCT1743/10ABSOLUTE MAXIMUM RATINGSAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°CRECOMMENDED OPERATING CONDITIONSDC SPECIFICATIONSSymbol ParameterValue Unit V CC Supply Voltage -0.5 to +7V V I DC Input Voltage -0.5 to V CC + 0.5V V O DC Output Voltage -0.5 to V CC + 0.5V I IK DC Input Diode Current ± 20mA I OK DC Output Diode Current ± 20mA I O DC Output Current ± 25mA I CC or I GND DC V CC or Ground Current± 50mA P D Power Dissipation 500(*)mW T stg Storage Temperature -65 to +150°C T LLead Temperature (10 sec)300°CSymbol ParameterValue Unit V CC Supply Voltage 4.5 to 5.5V V I Input Voltage 0 to V CC V V O Output Voltage 0 to V CC V T op Operating Temperature-55 to 125°C t r , t fInput Rise and Fall Time (V CC = 4.5 to 5.5V)0 to 500nsSymbolParameterTest ConditionValue UnitV CC (V)T A = 25°C -40 to 85°C -55 to 125°C Min.Typ.Max.Min.Max.Min.Max.V IH High Level Input Voltage4.5 to5.5 2.02.02.0V V IL Low Level Input Voltage4.5 to5.50.80.80.8V V OH High Level Output Voltage4.5I O =-20 µA 4.4 4.5 4.4 4.4VI O =-4.0 mA 4.184.31 4.134.10V OL Low Level Output Voltage4.5I O =20 µA 0.00.10.10.1V I O =4.0 mA 0.170.260.330.40I I Input Leakage Current5.5V I = V CC or GND ± 0.1± 1± 1µA I CC Quiescent Supply Current5.5V I = V CC or GND 44080µA ∆ I CCAdditional Worst Case Supply Current5.5Per Input pin V I = 0.5V or V I = 2.4V Other Inputs at V CC or GND I O = 02.02.93.0mAM74HCT1744/10AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = t f = 6ns)CAPACITIVE CHARACTERISTICS1) C PD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I CC(opr) = C PD x V CC x f IN + I CC /6 (per FLIP/FLOP)And the total CPD when N pcs of FLIP-FLOP operate can be gained by the following equation : CPD (total) = 38 + 15 x nSymbolParameterTest ConditionValue UnitV CC (V)T A = 25°C -40 to 85°C -55 to 125°C Min.Typ.Max.Min.Max.Min.Max.t TLH t THL Output TransitionTime4.58151922ns t PLH t PHL Propagation DelayTime (CLOCK - Q)4.5182835ns t PLH t PHL Propagation DelayTime (CLEAR - Q)4.518283542ns f MAX Maximum ClockFrequency4.5305624MHz t W(H) t W(L)Minimum PulseWidth (CLOCK) 4.58151922ns t W(L)Minimum Pulse Width (CLEAR) 4.58151922ns t s Minimum Set-up Time4.52101315ns t h Minimum Hold Time4.5568ns t REMMinimum Removal Time4.55555ns SymbolParameterTest ConditionValue UnitV CC (V)T A = 25°C -40 to 85°C -55 to 125°C Min.Typ.Max.Min.Max.Min.Max.C IN Input Capacitance 5101010pF C PDPower Dissipation Capacitance (note 1)68pFM74HCT1745/10TEST CIRCUITL R T = Z OUT of pulse generator (typically 50Ω)WAVEFORM 1 : PROPAGATION DELAY TIME, MINIMUM PULSE WIDTH (CLOCK), SETUP AND HOLD TIME (nD TO CLOCK), CLOCK MAXIMUM FREQUENCY(f=1MHz; 50% duty cycle)M74HCT1746/10WAVEFORM 2 : PROPAGATION DELAY TIME (nQ TO CLEAR)(f=1MHz; 50% duty cycle)WAVEFORM 3 : MINIMUM PULSE WIDTH (CLEAR), MINIMUM REMOVAL TIME (CLEAR TO CLOCK)(f=1MHz; 50% duty cycle)M74HCT174Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.© The ST logo is a registered trademark of STMicroelectronics© 2001 STMicroelectronics - Printed in Italy - All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - MoroccoSingapore - Spain - Sweden - Switzerland - United Kingdom© 10/10。