ISL6548ACRZA;ISL6548ACRZA-T;中文规格书,Datasheet资料

ISL6548A
Simplified Power System Diagram
5VSBY
12V
3V3ATX
Q3 VGMCH
+ Q4
SLP_S3 SLP_S5
SLEEP STATE LOGIC
PWM CONTROLLER
ISL6548A
PWM CONTROLLER
Intersil FET DRIVER
All outputs, except VICH7, have undervoltage protection. The switching regulator also has overvoltage and overcurrent protection. Thermal shutdown is integrated.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
®
Data Sheet
January 3, 2006
ISL6548A
FN9189.2
ACPI Regulator/Controller for Dual Channel DDR Memory Systems
The ISL6548A provides a complete ACPI compliant power solution for up to 4 DIMM dual channel DDR/DDR2 Memory systems. Included are both a synchronous buck controller to supply VDDQ during S0/S1 and S3 states. During S0/S1 state, a fully integrated sink-source regulator generates an accurate (VDDQ/2) high current VTT voltage without the need for a negative supply. A second PWM controller, which requires external MOSFET drivers, is available for regulation of the GMCH Core voltage. A sink/source LDO controller is also integrated for the CPU/GMCH VTT termination voltage regulation. Another LDO is available for the ICH7 voltage.
• ACPI Compliant Sleep State Control
• Glitch-free Transitions During State Changes
• VDDQ PWM Controller Drives Low Cost N-Channel MOSFETs
• 250kHz Constant Frequency Operation - Both PWM Controllers are Phase Shifted 180°
• Embedded Processor and I/O Supplies
• DSP Supplies
1 /
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
SOFT-START & ENABLE A SOFT-START & ENABLE B SOFT-START & ENABLE C ENABLE DDR_VTT ENABLE VIDPGD
VOLTAGE REFERENCE 0.800V 0.680V (-15%) 0.920V (+15%)
EA1 ACTIVE IN S3
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004, 2006. All Rights Reserved
5VDUAL
VGMCH VTT_GMCH/CPU
Intersil FET DRIVER
5VSBY P12V
ATX3V3
SLP_S5 SLP_S3
VIDPGD S5# S3#
BOOT OCSET
Q3
Q4 R5 C7 R7 Q5
C5 C6 R6
R8
R9 R10
Q6
PWM4
ISL6548A
UGATE PHASE
Q5 VTT_GMCH/CPU
+
Q6
VTT REGULATOR
LINEAR CONTROLLER
LINEAR CONTROLLER
5VDUAL
Q1 VDDQ
+ Q2
3V3ATX or VGMCH Q7
+
VREF VTT +
VICH7
Typical Application
3VDUAL
5VSBY 12V
Pinout
ISL6548A (QFN) TOP VIEW
LGATE GND UGATE BOOT PHASE S5# OCSET
28 27 26 25 24 23 22
5VSBY 1
21 DRIVE3
S3# 2
20 FB3
P12V 3 GND 4 DDR_VTT 5
GND 29
19 PWM4 18 FB4 17 COMP4
FN9189.2 January 3, 2006
Block Diagram
PWM4
COMP4 EA4
FB4
DRIVE2_U FB2
P12V EA2
DRIVE2_L
DRIVE3 FB3
P12V EA3
180° PHASE SHIFT
5VSBY
P12V
S3# S5#
FB
COMP
EA1 POR
MONITOR AND CONTROL
All other trademarks mentioned are the property of their respective owners.
ISL6548A
Ordering Information
PART NUMBER
PART MARKING
TEMP. RANGE
(°C)
PKG. PACKAGE DWG. #
The switching PWM controller drives two N-Channel MOSFETs in a synchronous-rectified buck converter topology. The synchronous buck converter uses voltagemode control with fast transient response. The switching regulator provides a maximum static regulation tolerance of ±2% over line, load, and temperature ranges. The output is user-adjustable by means of external resistors down to 0.8V.
An integrated soft-start feature brings all outputs into regulation in a controlled manner when returning to S0/S1 state from any sleep state. During S0 the VIDPGD signal indicates that the GMCH and CPU VTT termination voltage is within spec and operational.
• Tight Output Voltage Regulation - All Outputs: ±2% Over Temperature
• Fully-Adjustable Outputs with Wide Voltage Range: Down to 0.8V supports DDR and DDR2 Specifications
DDR_VTT 6
16 COMP
VDDQ 7
15 FB
8 9 10 11 12 13 14
VDDQ DDR_VTTSNS
DRIVE2_U FB2
VIDPGD DRIVE2_L
VREF_IN
2 /
FN9189.2 January 3, 2006
3 /
ISL6548ACRZA ISL6548ACRZ 0 to 70 28 Ld 6x6 QFN L28.6x6
(Note)
(Pb-free)
ISL6548ACRZA-T ISL6548ACRZ 0 to 70 28 Ld 6x6 QFN L28.6x6
(Note)
(Pb-free)
Tape and Reel
• Simple Single-Loop Voltage-Mode PWM Control Design
• Fast PWM Converter Transient Response
• Under and Overvoltage Monitoring
• OCP on the VDDQ Switching Regulator • Integrated Thermal Shutdown Protection
FAULT
S3
UV UV/OV UV
UV/OV
250kHz OSCILLATOR
PWM
5VSBY
BOOT UGATE
LGATE
Oቤተ መጻሕፍቲ ባይዱ COMP 20µA
PHASE OCSET
VTT REG
RL
VTTSNS VDDQ(2) VTT(2) RU VREF_IN
VIDPGD
GND PAD
GND(2)
ISL6548A
Features
• Generates 5 Regulated Voltages - Synchronous Buck PWM Controller for DDR VDDQ - 3A Integrated Sink/Source Linear Regulator with Accurate VDDQ/2 Divider Reference for DDR VTT - PWM Regulator for GMCH Core - Sink/Source LDO Regulator for CPU/GMCH VTT Termination - LDO Regulator for ICH7
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Single and Dual Channel DDR Memory Power Systems in ACPI Compliant PCs
• Graphics Cards - GPU and Memory Supplies • ASIC Power Supplies
COMP4 FB4 DRIVE2_U
LGATE DDR_VDDQ(x2)
COMP
FB VREF_IN
FB2 DDR_VTT(x2)