The implementation of portable
基于Java的飞机大战游戏的设计与实现论文
毕业设计（论文）任务书第1页第2页第3页基于Java的飞机大战游戏的设计与实现摘要现如今，随着智能手机的兴起与普及，加上4G（the 4th Generation mobile communication ，第四代移动通信技术）网络的深入，越来越多的IT行业开始向手机行业转移重心。
而手机行业中游戏方面的利润所占比重较大，并且手机游戏大多数则是由Java语言开发研制的。
所以我想顺应时代发展，用学到的Java知识对游戏进行一次深入的了解与创作。
Java语言在我们大学学习中占了很大的比重，其优点甚多：面向对象，可靠，安全，多平台可移植，高性能，多线程等。
面向对象是相对于c语言的面向过程来说的，在面向对象编程中，我们用Java去新建一个对象，调用其方法就能实现我们的目标，并不需要了解这个对象的方法的具体实现过程；Java的可靠安全特点体现Java不支持指针，禁止第三方访问，杜绝了外部风险。
所以使用Java开发游戏，是一个正确的选择。
大学学习即将结束，在毕业之际，我想用我4年里学习的知识为自己编写一个属于自己的游戏——飞机大战游戏，为我的大学生活画上圆满的句号。
关键词：Java游戏；面向对象；可靠安全；多线程Design And Implementation Of Airplane WargameBased On JavaAbstractNowadays, with the emergence and popularization of smart phones, plus 4 g (the 4 th Generation mobile communication, the fourth Generation mobile communication technology) the development of the Internet, more and more in the IT industry began to shift to the mobile phone industry center of gravity. Aspect of the game of the mobile phone industry profits account for a large proportion, and most mobile game is developed by Java language. So I want to keep up with the development of The Times, use Java knowledge for an in-depth understanding of the game and creation.Java language learning in our universities accounted for a large proportion of its many advantages: Object-oriented, reliable, secure, multi-platform portable, high-performance, multi-threading.Object-oriented process-oriented with respect to the terms of the c language, object-oriented programming, specifically we use Java to create a new object, call its methods will be able to achieve our goal,we do not need to know the object's method of implementation ; reliable safety features reflect Java Java does not support pointers to prohibit third-party access, to eliminate the external risk. Therefore, the use of Java development aircraft war game, is the right choice.University coming to an end, on the occasion of the graduation, I want to use my four years studying knowledge and made themselves a game of their own - Aircraft war game for my college life painting satisfactory conclusion.Keywords:Java game; object oriented; reliable and secure; multi thread目录1 引言 (1)1.1 项目背景 (1)1. 2 国内外研究现状 (3)1.3 项目主要工作 (4)1.4 本文组织结构 (6)2 开发平台与开发技术 (7)2. 1 IntelliJ IDEA简介 (7)2. 2 IntelliJ IDEA与Eclipse 、MyEclipse的比较 (8)2. 3 Java (10)3 可行性研究 (13)3. 1 技术可行性 (13)3. 2 经济可行性 (13)3. 3 操作可行性 (14)3. 4 用户使用可行性 (14)3. 5 法律可行性 (14)4 需求分析 (15)4. 1 系统需求概述 (16)4. 2 功能模块设计 (17)4.2.1 游戏状态控制功能模块 (17)4.2.2 游戏难度的调整模块 (17)4.2.3 游戏界面绘画功能模块 (17)4.2.4 玩家游戏控制功能模块 (17)4. 3 游戏难点分析 (18)4.3.1 绘图美化 (18)4.3.2 多线程技术的实现 (18)4.3.3 防碰撞问题的解决 (18)4.3.4 动画的实现 (18)5 飞机大战功能实现 (19)5.1 模型图 (19)5.2 软件功能模块 (19)5.3 游戏首页的实现 (20)5.3.1 界面实现 (20)5.3.2 流程图 (21)5.3.3 核心代码 (22)5.4 游戏开始模块的实现 (24)5.4.1 界面实现 (24)5.4.2 流程图 (25)5.4.3 核心代码 (25)5.5 发射子弹模块的实现 (27)5.5.1 界面实现 (27)5.5.2 流程图 (28)5.5.3 核心代码 (29)5.6 积分模块的实现 (33)5.6.1 界面的实现 (33)5.6.2 核心代码 (34)5.7 防碰撞逻辑 (37)5.7.1 核心代码 (37)5.8 游戏操作的实现 (39)5.8.1 核心代码 (39)5.9 特殊NPC蜜蜂 (41)6 系统测试 (42)6.1 测试的定义及其重要性 (43)6.1.1 测试的定义 (43)6.1.2 测试的重要性 (44)6.2 测试方法 (46)6.3 测试结果 (50)7 结论 (51)参考文献 (52)致谢 (54)外文文献 (55)中文翻译 (63)1 引言1.1 项目背景90后的我们，童年最开始接触电子游戏是在游戏厅，那时候的飞机大战游戏机前，往往人山人海，绚丽多彩的画面，带感操作让人沉醉不能自拔。
Operation Manual
Operation Manual of Portable Data Logger(Version: 1.00)1. Quick Start (3)2. Connecting the Logger to PC (3)3. Setting Up the Logger to Record Data (4)4. Download data from the logger (5)5. Delete all the logs from the logger (6)6. Data Listing Window (6)7. Exporting Logger Data (7)8. File List (8)1. Quick StartFollow the procedure below to quickly start using your data logger:1. Connect the data logger to a free USB port on the computer.2. Start T oAnalyzer 1 software on the PC.3. From the toolbar select Connect.4. Then you can setup or download data, delete data from the logger.5. Unplug the cable from the logger, then the logger is in Standby mode. Press buttonLOG/STD on the logger, then LOG displays on the screen and the logger begins to record.6. Press LOG/STD for about five seconds, the logger will be power on (LOG mode) or off(OFF mode).Note: The logger has three modes:1. LOG: In the mode, the logger samples and records data timely.2. Standby: In the mode, the logger stops to sample and record, but the LCD display ison.3. OFF: In the mode, the logger stops to sample and record, and the LCD display is off.T oAnalyzer cannot connect to the logger also.2. Connecting the Logger to PCT o connect the logger to the computer, follow these steps:1. Connect the USB cable to the logger and to a free USB port on the computer.2. If you are connecting the logger to the PC for the first time, the logger willautomatically be recognized and installed on the computer.3. Start T oAnalyzer 1 analysis software.4. Click the icon3. Setting Up the Logger to Record DataT o set the logger to start recording data, click the: Synchronize the new setup information to the logger. After changing theconfiguration, do not forget clicking this button to make sure that the new configuration is wrote to the logger.lbutton on the toolbar. Once the data is transferred from the logger to the PC, the data graph and data listing windows will be displayed.The graph display will be blank if there are not any logs.Note: Push left mouse button down, and then move to select a rectangle area, when the left mouse button is up, the graph will be redraw with the data in the selected rectangle area. Click right button, then the graph will be redrawing with all the data in the logs file.5. Delete all the logs from the logger.T o erase all data from the logger, connect to the logger, and then clickbutton on the toolbar, and then the data listing window is shown below.The data pane lists the data samples collected by the logging device.The column width of each column is adjustable by using the left mouse button and dragging the column the desired width.7. Exporting Logger DataY ou can use ToAnalyzer to export sample data to a text file or to a Microsoft Excel file or BMP file.ll。
稳定性英文版
HPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationFLUOXETINE HClC17H18F3NO•HClM.W. = 345.79CAS — 59333-67-4STABILITY INDICATINGA S S A Y V A L I D A T I O NMethod is suitable for:ýIn-process controlþProduct ReleaseþStability indicating analysis (Suitability - US/EU Product) CAUTIONFLUOXETINE HYDROCHLORIDE IS A HAZARDOUS CHEMICAL AND SHOULD BE HANDLED ONLY UNDER CONDITIONS SUITABLE FOR HAZARDOUS WORK.IT IS HIGHLY PRESSURE SENSITIVE AND ADEQUATE PRECAUTIONS SHOULD BE TAKEN TO AVOID ANY MECHANICAL FORCE (SUCH AS GRINDING, CRUSHING, ETC.) ON THE POWDER.ED. N0: 04Effective Date:APPROVED::HPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationTABLE OF CONTENTS INTRODUCTION........................................................................................................................ PRECISION............................................................................................................................... System Repeatability ................................................................................................................ Method Repeatability................................................................................................................. Intermediate Precision .............................................................................................................. LINEARITY................................................................................................................................ RANGE...................................................................................................................................... ACCURACY............................................................................................................................... Accuracy of Standard Injections................................................................................................ Accuracy of the Drug Product.................................................................................................... VALIDATION OF FLUOXETINE HCl AT LOW CONCENTRATION........................................... Linearity at Low Concentrations................................................................................................. Accuracy of Fluoxetine HCl at Low Concentration..................................................................... System Repeatability................................................................................................................. Quantitation Limit....................................................................................................................... Detection Limit........................................................................................................................... VALIDATION FOR META-FLUOXETINE HCl (POSSIBLE IMPURITIES).................................. Meta-Fluoxetine HCl linearity at 0.05% - 1.0%........................................................................... Detection Limit for Fluoxetine HCl.............................................................................................. Quantitation Limit for Meta Fluoxetine HCl................................................................................ Accuracy for Meta-Fluoxetine HCl ............................................................................................ Method Repeatability for Meta-Fluoxetine HCl........................................................................... Intermediate Precision for Meta-Fluoxetine HCl......................................................................... SPECIFICITY - STABILITY INDICATING EVALUATION OF THE METHOD............................. FORCED DEGRADATION OF FINISHED PRODUCT AND STANDARD..................................1. Unstressed analysis...............................................................................................................2. Acid Hydrolysis stressed analysis..........................................................................................3. Base hydrolysis stressed analysis.........................................................................................4. Oxidation stressed analysis...................................................................................................5. Sunlight stressed analysis.....................................................................................................6. Heat of solution stressed analysis.........................................................................................7. Heat of powder stressed analysis.......................................................................................... System Suitability stressed analysis.......................................................................................... Placebo...................................................................................................................................... STABILITY OF STANDARD AND SAMPLE SOLUTIONS......................................................... Standard Solution...................................................................................................................... Sample Solutions....................................................................................................................... ROBUSTNESS.......................................................................................................................... Extraction................................................................................................................................... Factorial Design......................................................................................................................... CONCLUSION...........................................................................................................................ED. N0: 04Effective Date:APPROVED::HPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationBACKGROUNDTherapeutically, Fluoxetine hydrochloride is a classified as a selective serotonin-reuptake inhibitor. Effectively used for the treatment of various depressions. Fluoxetine hydrochloride has been shown to have comparable efficacy to tricyclic antidepressants but with fewer anticholinergic side effects. The patent expiry becomes effective in 2001 (US). INTRODUCTIONFluoxetine capsules were prepared in two dosage strengths: 10mg and 20mg dosage strengths with the same capsule weight. The formulas are essentially similar and geometrically equivalent with the same ingredients and proportions. Minor changes in non-active proportions account for the change in active ingredient amounts from the 10 and 20 mg strength.The following validation, for the method SI-IAG-206-02 , includes assay and determination of Meta-Fluoxetine by HPLC, is based on the analytical method validation SI-IAG-209-06. Currently the method is the in-house method performed for Stability Studies. The Validation was performed on the 20mg dosage samples, IAG-21-001 and IAG-21-002.In the forced degradation studies, the two placebo samples were also used. PRECISIONSYSTEM REPEATABILITYFive replicate injections of the standard solution at the concentration of 0.4242mg/mL as described in method SI-IAG-206-02 were made and the relative standard deviation (RSD) of the peak areas was calculated.SAMPLE PEAK AREA#15390#25406#35405#45405#55406Average5402.7SD 6.1% RSD0.1ED. N0: 04Effective Date:APPROVED::HPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationED. N0: 04Effective Date:APPROVED::PRECISION - Method RepeatabilityThe full HPLC method as described in SI-IAG-206-02 was carried-out on the finished product IAG-21-001 for the 20mg dosage form. The method repeated six times and the relative standard deviation (RSD) was calculated.SAMPLENumber%ASSAYof labeled amountI 96.9II 97.8III 98.2IV 97.4V 97.7VI 98.5(%) Average97.7SD 0.6(%) RSD0.6PRECISION - Intermediate PrecisionThe full method as described in SI-IAG-206-02 was carried-out on the finished product IAG-21-001 for the 20mg dosage form. The method was repeated six times by a second analyst on a different day using a different HPLC instrument. The average assay and the relative standard deviation (RSD) were calculated.SAMPLENumber% ASSAYof labeled amountI 98.3II 96.3III 94.6IV 96.3V 97.8VI 93.3Average (%)96.1SD 2.0RSD (%)2.1The difference between the average results of method repeatability and the intermediate precision is 1.7%.HPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationLINEARITYStandard solutions were prepared at 50% to 200% of the nominal concentration required by the assay procedure. Linear regression analysis demonstrated acceptability of the method for quantitative analysis over the concentration range required. Y-Intercept was found to be insignificant.RANGEDifferent concentrations of the sample (IAG-21-001) for the 20mg dosage form were prepared, covering between 50% - 200% of the nominal weight of the sample.Conc. (%)Conc. (mg/mL)Peak Area% Assayof labeled amount500.20116235096.7700.27935334099.21000.39734463296.61500.64480757797.52000.79448939497.9(%) Average97.6SD 1.0(%) RSD 1.0ED. N0: 04Effective Date:APPROVED::HPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationED. N0: 04Effective Date:APPROVED::RANGE (cont.)The results demonstrate linearity as well over the specified range.Correlation coefficient (RSQ)0.99981 Slope11808.3Y -Interceptresponse at 100%* 100 (%) 0.3%ACCURACYACCURACY OF STANDARD INJECTIONSFive (5) replicate injections of the working standard solution at concentration of 0.4242mg/mL, as described in method SI-IAG-206-02 were made.INJECTIONNO.PEAK AREA%ACCURACYI 539299.7II 540599.9III 540499.9IV 5406100.0V 5407100.0Average 5402.899.9%SD 6.10.1RSD, (%)0.10.1The percent deviation from the true value wasdetermined from the linear regression lineHPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationED. N0: 04Effective Date:APPROVED::ACCURACY OF THE DRUG PRODUCTAdmixtures of non-actives (placebo, batch IAG-21-001 ) with Fluoxetine HCl were prepared at the same proportion as in a capsule (70%-180% of the nominal concentration).Three preparations were made for each concentration and the recovery was calculated.Conc.(%)Placebo Wt.(mg)Fluoxetine HCl Wt.(mg)Peak Area%Accuracy Average (%)70%7079.477.843465102.27079.687.873427100.77079.618.013465100.0101.0100%10079.6211.25476397.910080.8011.42491799.610079.6011.42485498.398.6130%13079.7214.90640599.413080.3114.75632899.213081.3314.766402100.399.618079.9920.10863699.318079.3820.45879499.418080.0820.32874899.599.4Placebo, Batch Lot IAG-21-001HPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationED. N0: 04Effective Date:APPROVED::VALIDATION OF FLUOXETINE HClAT LOW CONCENTRATIONLINEARITY AT LOW CONCENTRATIONSStandard solution of Fluoxetine were prepared at approximately 0.02%-1.0% of the working concentration required by the method SI-IAG-206-02. Linear regression analysis demonstrated acceptability of the method for quantitative analysis over this range.ACCURACY OF FLUOXETINE HCl AT LOW CONCENTRATIONThe peak areas of the standard solution at the working concentration were measured and the percent deviation from the true value, as determined from the linear regression was calculated.SAMPLECONC.µg/100mLAREA FOUND%ACCURACYI 470.56258499.7II 470.56359098.1III 470.561585101.3IV 470.561940100.7V 470.56252599.8VI 470.56271599.5(%) AverageSlope = 132.7395299.9SD Y-Intercept = -65.872371.1(%) RSD1.1HPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationSystem RepeatabilitySix replicate injections of standard solution at 0.02% and 0.05% of working concentration as described in method SI-IAG-206-02 were made and the relative standard deviation was calculated.SAMPLE FLUOXETINE HCl AREA0.02%0.05%I10173623II11503731III10103475IV10623390V10393315VI10953235Average10623462RSD, (%) 5.0 5.4Quantitation Limit - QLThe quantitation limit ( QL) was established by determining the minimum level at which the analyte was quantified. The quantitation limit for Fluoxetine HCl is 0.02% of the working standard concentration with resulting RSD (for six injections) of 5.0%. Detection Limit - DLThe detection limit (DL) was established by determining the minimum level at which the analyte was reliably detected. The detection limit of Fluoxetine HCl is about 0.01% of the working standard concentration.ED. N0: 04Effective Date:APPROVED::HPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationED. N0: 04Effective Date:APPROVED::VALIDATION FOR META-FLUOXETINE HCl(EVALUATING POSSIBLE IMPURITIES)Meta-Fluoxetine HCl linearity at 0.05% - 1.0%Relative Response Factor (F)Relative response factor for Meta-Fluoxetine HCl was determined as slope of Fluoxetine HCl divided by the slope of Meta-Fluoxetine HCl from the linearity graphs (analysed at the same time).F =132.7395274.859534= 1.8Detection Limit (DL) for Fluoxetine HClThe detection limit (DL) was established by determining the minimum level at which the analyte was reliably detected.Detection limit for Meta Fluoxetine HCl is about 0.02%.Quantitation Limit (QL) for Meta-Fluoxetine HClThe QL is determined by the analysis of samples with known concentration of Meta-Fluoxetine HCl and by establishing the minimum level at which the Meta-Fluoxetine HCl can be quantified with acceptable accuracy and precision.Six individual preparations of standard and placebo spiked with Meta-Fluoxetine HCl solution to give solution with 0.05% of Meta Fluoxetine HCl, were injected into the HPLC and the recovery was calculated.HPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationED. N0: 04Effective Date:APPROVED::META-FLUOXETINE HCl[RECOVERY IN SPIKED SAMPLES].Approx.Conc.(%)Known Conc.(µg/100ml)Area in SpikedSampleFound Conc.(µg/100mL)Recovery (%)0.0521.783326125.735118.10.0521.783326825.821118.50.0521.783292021.55799.00.0521.783324125.490117.00.0521.783287220.96996.30.0521.783328526.030119.5(%) AVERAGE111.4SD The recovery result of 6 samples is between 80%-120%.10.7(%) RSDQL for Meta Fluoxetine HCl is 0.05%.9.6Accuracy for Meta Fluoxetine HClDetermination of Accuracy for Meta-Fluoxetine HCl impurity was assessed using triplicate samples (of the drug product) spiked with known quantities of Meta Fluoxetine HCl impurity at three concentrations levels (namely 80%, 100% and 120% of the specified limit - 0.05%).The results are within specifications:For 0.4% and 0.5% recovery of 85% -115%For 0.6% recovery of 90%-110%HPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationED. N0: 04Effective Date:APPROVED::META-FLUOXETINE HCl[RECOVERY IN SPIKED SAMPLES]Approx.Conc.(%)Known Conc.(µg/100mL)Area in spikedSample Found Conc.(µg/100mL)Recovery (%)[0.4%]0.4174.2614283182.66104.820.4174.2614606187.11107.370.4174.2614351183.59105.36[0.5%]0.5217.8317344224.85103.220.5217.8316713216.1599.230.5217.8317341224.81103.20[0.6%]0.6261.3918367238.9591.420.6261.3920606269.81103.220.6261.3920237264.73101.28RECOVERY DATA DETERMINED IN SPIKED SAMPLESHPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationED. N0: 04Effective Date:APPROVED::REPEATABILITYMethod Repeatability - Meta Fluoxetine HClThe full method (as described in SI-IAG-206-02) was carried out on the finished drug product representing lot number IAG-21-001-(1). The HPLC method repeated serially, six times and the relative standard deviation (RSD) was calculated.IAG-21-001 20mg CAPSULES - FLUOXETINESample% Meta Fluoxetine % Meta-Fluoxetine 1 in Spiked Solution10.0260.09520.0270.08630.0320.07740.0300.07450.0240.09060.0280.063AVERAGE (%)0.0280.081SD 0.0030.012RSD, (%)10.314.51NOTE :All results are less than QL (0.05%) therefore spiked samples with 0.05% Meta Fluoxetine HCl were injected.HPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationED. N0: 04Effective Date:APPROVED::Intermediate Precision - Meta-Fluoxetine HClThe full method as described in SI-IAG-206-02 was applied on the finished product IAG-21-001-(1) .It was repeated six times, with a different analyst on a different day using a different HPLC instrument.The difference between the average results obtained by the method repeatability and the intermediate precision was less than 30.0%, (11.4% for Meta-Fluoxetine HCl as is and 28.5% for spiked solution).IAG-21-001 20mg - CAPSULES FLUOXETINESample N o:Percentage Meta-fluoxetine% Meta-fluoxetine 1 in spiked solution10.0260.06920.0270.05730.0120.06140.0210.05850.0360.05560.0270.079(%) AVERAGE0.0250.063SD 0.0080.009(%) RSD31.514.51NOTE:All results obtained were well below the QL (0.05%) thus spiked samples slightly greater than 0.05% Meta-Fluoxetine HCl were injected. The RSD at the QL of the spiked solution was 14.5%HPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationSPECIFICITY - STABILITY INDICATING EVALUATIONDemonstration of the Stability Indicating parameters of the HPLC assay method [SI-IAG-206-02] for Fluoxetine 10 & 20mg capsules, a suitable photo-diode array detector was incorporated utilizing a commercial chromatography software managing system2, and applied to analyze a range of stressed samples of the finished drug product.GLOSSARY of PEAK PURITY RESULT NOTATION (as reported2):Purity Angle-is a measure of spectral non-homogeneity across a peak, i.e. the weighed average of all spectral contrast angles calculated by comparing all spectra in the integrated peak against the peak apex spectrum.Purity Threshold-is the sum of noise angle3 and solvent angle4. It is the limit of detection of shape differences between two spectra.Match Angle-is a comparison of the spectrum at the peak apex against a library spectrum.Match Threshold-is the sum of the match noise angle3 and match solvent angle4.3Noise Angle-is a measure of spectral non-homogeneity caused by system noise.4Solvent Angle-is a measure of spectral non-homogeneity caused by solvent composition.OVERVIEWT he assay of the main peak in each stressed solution is calculated according to the assay method SI-IAG-206-02, against the Standard Solution, injected on the same day.I f the Purity Angle is smaller than the Purity Threshold and the Match Angle is smaller than the Match Threshold, no significant differences between spectra can be detected. As a result no spectroscopic evidence for co-elution is evident and the peak is considered to be pure.T he stressed condition study indicated that the Fluoxetine peak is free from any appreciable degradation interference under the stressed conditions tested. Observed degradation products peaks were well separated from the main peak.1® PDA-996 Waters™ ; 2[Millennium 2010]ED. N0: 04Effective Date:APPROVED::HPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationFORCED DEGRADATION OF FINISHED PRODUCT & STANDARD 1.UNSTRESSED SAMPLE1.1.Sample IAG-21-001 (2) (20mg/capsule) was prepared as stated in SI-IAG-206-02 and injected into the HPLC system. The calculated assay is 98.5%.SAMPLE - UNSTRESSEDFluoxetine:Purity Angle:0.075Match Angle:0.407Purity Threshold:0.142Match Threshold:0.4251.2.Standard solution was prepared as stated in method SI-IAG-206-02 and injected into the HPLC system. The calculated assay is 100.0%.Fluoxetine:Purity Angle:0.078Match Angle:0.379Purity Threshold:0.146Match Threshold:0.4272.ACID HYDROLYSIS2.1.Sample solution of IAG-21-001 (2) (20mg/capsule) was prepared as in method SI-IAG-206-02 : An amount equivalent to 20mg Fluoxetine was weighed into a 50mL volumetric flask. 20mL Diluent was added and the solution sonicated for 10 minutes. 1mL of conc. HCl was added to this solution The solution was allowed to stand for 18 hours, then adjusted to about pH = 5.5 with NaOH 10N, made up to volume with Diluent and injected into the HPLC system after filtration.Fluoxetine peak intensity did NOT decrease. Assay result obtained - 98.8%.SAMPLE- ACID HYDROLYSISFluoxetine peak:Purity Angle:0.055Match Angle:0.143Purity Threshold:0.096Match Threshold:0.3712.2.Standard solution was prepared as in method SI-IAG-206-02 : about 22mg Fluoxetine HCl were weighed into a 50mL volumetric flask. 20mL Diluent were added. 2mL of conc. HCl were added to this solution. The solution was allowed to stand for 18 hours, then adjusted to about pH = 5.5 with NaOH 10N, made up to volume with Diluent and injected into the HPLC system.Fluoxetine peak intensity did NOT decrease. Assay result obtained - 97.2%.ED. N0: 04Effective Date:APPROVED::HPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationSTANDARD - ACID HYDROLYSISFluoxetine peak:Purity Angle:0.060Match Angle:0.060Purity Threshold:0.099Match Threshold:0.3713.BASE HYDROLYSIS3.1.Sample solution of IAG-21-001 (2) (20mg/capsule) was prepared as per method SI-IAG-206-02 : An amount equivalent to 20mg Fluoxetine was weight into a 50mL volumetric flask. 20mL Diluent was added and the solution sonicated for 10 minutes. 1mL of 5N NaOH was added to this solution. The solution was allowed to stand for 18 hours, then adjusted to about pH = 5.5 with 5N HCl, made up to volume with Diluent and injected into the HPLC system.Fluoxetine peak intensity did NOT decrease. Assay result obtained - 99.3%.SAMPLE - BASE HYDROLYSISFluoxetine peak:Purity Angle:0.063Match Angle:0.065Purity Threshold:0.099Match Threshold:0.3623.2.Standard stock solution was prepared as per method SI-IAG-206-02 : About 22mg Fluoxetine HCl was weighed into a 50mL volumetric flask. 20mL Diluent was added. 2mL of 5N NaOH was added to this solution. The solution was allowed to stand for 18 hours, then adjusted to about pH=5.5 with 5N HCl, made up to volume with Diluent and injected into the HPLC system.Fluoxetine peak intensity did NOT decrease - 99.5%.STANDARD - BASE HYDROLYSISFluoxetine peak:Purity Angle:0.081Match Angle:0.096Purity Threshold:0.103Match Threshold:0.3634.OXIDATION4.1.Sample solution of IAG-21-001 (2) (20mg/capsule) was prepared as per method SI-IAG-206-02. An equivalent to 20mg Fluoxetine was weighed into a 50mL volumetric flask. 20mL Diluent added and the solution sonicated for 10 minutes.1.0mL of 30% H2O2 was added to the solution and allowed to stand for 5 hours, then made up to volume with Diluent, filtered and injected into HPLC system.Fluoxetine peak intensity decreased to 95.2%.ED. N0: 04Effective Date:APPROVED::HPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationSAMPLE - OXIDATIONFluoxetine peak:Purity Angle:0.090Match Angle:0.400Purity Threshold:0.154Match Threshold:0.4294.2.Standard solution was prepared as in method SI-IAG-206-02 : about 22mg Fluoxetine HCl were weighed into a 50mL volumetric flask and 25mL Diluent were added. 2mL of 30% H2O2 were added to this solution which was standing for 5 hours, made up to volume with Diluent and injected into the HPLC system.Fluoxetine peak intensity decreased to 95.8%.STANDARD - OXIDATIONFluoxetine peak:Purity Angle:0.083Match Angle:0.416Purity Threshold:0.153Match Threshold:0.4295.SUNLIGHT5.1.Sample solution of IAG-21-001 (2) (20mg/capsule) was prepared as in method SI-IAG-206-02 . The solution was exposed to 500w/hr. cell sunlight for 1hour. The BST was set to 35°C and the ACT was 45°C. The vials were placed in a horizontal position (4mm vials, National + Septum were used). A Dark control solution was tested. A 2%w/v quinine solution was used as the reference absorbance solution.Fluoxetine peak decreased to 91.2% and the dark control solution showed assay of 97.0%. The difference in the absorbance in the quinine solution is 0.4227AU.Additional peak was observed at RRT of 1.5 (2.7%).The total percent of Fluoxetine peak with the degradation peak is about 93.9%.SAMPLE - SUNLIGHTFluoxetine peak:Purity Angle:0.093Match Angle:0.583Purity Threshold:0.148Match Threshold:0.825 ED. N0: 04Effective Date:APPROVED::HPLC ASSAY with DETERMINATION OF META-FLUOXETINE HCl.ANALYTICAL METHOD VALIDATION10 and 20mg Fluoxetine Capsules HPLC DeterminationSUNLIGHT (Cont.)5.2.Working standard solution was prepared as in method SI-IAG-206-02 . The solution was exposed to 500w/hr. cell sunlight for 1.5 hour. The BST was set to 35°C and the ACT was 42°C. The vials were placed in a horizontal position (4mm vials, National + Septum were used). A Dark control solution was tested. A 2%w/v quinine solution was used as the reference absorbance solution.Fluoxetine peak was decreased to 95.2% and the dark control solution showed assay of 99.5%.The difference in the absorbance in the quinine solution is 0.4227AU.Additional peak were observed at RRT of 1.5 (2.3).The total percent of Fluoxetine peak with the degradation peak is about 97.5%. STANDARD - SUNLIGHTFluoxetine peak:Purity Angle:0.067Match Angle:0.389Purity Threshold:0.134Match Threshold:0.8196.HEAT OF SOLUTION6.1.Sample solution of IAG-21-001-(2) (20 mg/capsule) was prepared as in method SI-IAG-206-02 . Equivalent to 20mg Fluoxetine was weighed into a 50mL volumetric flask. 20mL Diluent was added and the solution was sonicated for 10 minutes and made up to volume with Diluent. 4mL solution was transferred into a suitable crucible, heated at 105°C in an oven for 2 hours. The sample was cooled to ambient temperature, filtered and injected into the HPLC system.Fluoxetine peak was decreased to 93.3%.SAMPLE - HEAT OF SOLUTION [105o C]Fluoxetine peak:Purity Angle:0.062Match Angle:0.460Purity Threshold:0.131Match Threshold:0.8186.2.Standard Working Solution (WS) was prepared under method SI-IAG-206-02 . 4mL of the working solution was transferred into a suitable crucible, placed in an oven at 105°C for 2 hours, cooled to ambient temperature and injected into the HPLC system.Fluoxetine peak intensity did not decrease - 100.5%.ED. N0: 04Effective Date:APPROVED::。
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MIPS32™ Architecture For Programmers Volume I: Introduction to the MIPS32™ArchitectureDocument Number: MD00082Revision 2.00June 8, 2003MIPS Technologies, Inc.1225 Charleston RoadMountain View, CA 94043-1353Copyright © 2001-2003 MIPS Technologies Inc. All rights reserved.Copyright ©2001-2003 MIPS Technologies, Inc. All rights reserved.Unpublished rights (if any) reserved under the copyright laws of the United States of America and other countries.This document contains information that is proprietary to MIPS Technologies, Inc. ("MIPS Technologies"). Any copying,reproducing,modifying or use of this information(in whole or in part)that is not expressly permitted in writing by MIPS Technologies or an authorized third party is strictly prohibited. At a minimum, this information is protected under unfair competition and copyright laws. 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All rights reserved.Table of ContentsChapter 1 About This Book (1)1.1 Typographical Conventions (1)1.1.1 Italic Text (1)1.1.2 Bold Text (1)1.1.3 Courier Text (1)1.2 UNPREDICTABLE and UNDEFINED (2)1.2.1 UNPREDICTABLE (2)1.2.2 UNDEFINED (2)1.3 Special Symbols in Pseudocode Notation (2)1.4 For More Information (4)Chapter 2 The MIPS Architecture: An Introduction (7)2.1 MIPS32 and MIPS64 Overview (7)2.1.1 Historical Perspective (7)2.1.2 Architectural Evolution (7)2.1.3 Architectural Changes Relative to the MIPS I through MIPS V Architectures (9)2.2 Compliance and Subsetting (9)2.3 Components of the MIPS Architecture (10)2.3.1 MIPS Instruction Set Architecture (ISA) (10)2.3.2 MIPS Privileged Resource Architecture (PRA) (10)2.3.3 MIPS Application Specific Extensions (ASEs) (10)2.3.4 MIPS User Defined Instructions (UDIs) (11)2.4 Architecture Versus Implementation (11)2.5 Relationship between the MIPS32 and MIPS64 Architectures (11)2.6 Instructions, Sorted by ISA (12)2.6.1 List of MIPS32 Instructions (12)2.6.2 List of MIPS64 Instructions (13)2.7 Pipeline Architecture (13)2.7.1 Pipeline Stages and Execution Rates (13)2.7.2 Parallel Pipeline (14)2.7.3 Superpipeline (14)2.7.4 Superscalar Pipeline (14)2.8 Load/Store Architecture (15)2.9 Programming Model (15)2.9.1 CPU Data Formats (16)2.9.2 FPU Data Formats (16)2.9.3 Coprocessors (CP0-CP3) (16)2.9.4 CPU Registers (16)2.9.5 FPU Registers (18)2.9.6 Byte Ordering and Endianness (21)2.9.7 Memory Access Types (25)2.9.8 Implementation-Specific Access Types (26)2.9.9 Cache Coherence Algorithms and Access Types (26)2.9.10 Mixing Access Types (26)Chapter 3 Application Specific Extensions (27)3.1 Description of ASEs (27)3.2 List of Application Specific Instructions (28)3.2.1 The MIPS16e Application Specific Extension to the MIPS32Architecture (28)3.2.2 The MDMX Application Specific Extension to the MIPS64 Architecture (28)3.2.3 The MIPS-3D Application Specific Extension to the MIPS64 Architecture (28)MIPS32™ Architecture For Programmers Volume I, Revision 2.00i Copyright © 2001-2003 MIPS Technologies Inc. All rights reserved.3.2.4 The SmartMIPS Application Specific Extension to the MIPS32 Architecture (28)Chapter 4 Overview of the CPU Instruction Set (29)4.1 CPU Instructions, Grouped By Function (29)4.1.1 CPU Load and Store Instructions (29)4.1.2 Computational Instructions (32)4.1.3 Jump and Branch Instructions (35)4.1.4 Miscellaneous Instructions (37)4.1.5 Coprocessor Instructions (40)4.2 CPU Instruction Formats (41)Chapter 5 Overview of the FPU Instruction Set (43)5.1 Binary Compatibility (43)5.2 Enabling the Floating Point Coprocessor (44)5.3 IEEE Standard 754 (44)5.4 FPU Data Types (44)5.4.1 Floating Point Formats (44)5.4.2 Fixed Point Formats (48)5.5 Floating Point Register Types (48)5.5.1 FPU Register Models (49)5.5.2 Binary Data Transfers (32-Bit and 64-Bit) (49)5.5.3 FPRs and Formatted Operand Layout (50)5.6 Floating Point Control Registers (FCRs) (50)5.6.1 Floating Point Implementation Register (FIR, CP1 Control Register 0) (51)5.6.2 Floating Point Control and Status Register (FCSR, CP1 Control Register 31) (53)5.6.3 Floating Point Condition Codes Register (FCCR, CP1 Control Register 25) (55)5.6.4 Floating Point Exceptions Register (FEXR, CP1 Control Register 26) (56)5.6.5 Floating Point Enables Register (FENR, CP1 Control Register 28) (56)5.7 Formats of Values Used in FP Registers (57)5.8 FPU Exceptions (58)5.8.1 Exception Conditions (59)5.9 FPU Instructions (62)5.9.1 Data Transfer Instructions (62)5.9.2 Arithmetic Instructions (63)5.9.3 Conversion Instructions (65)5.9.4 Formatted Operand-Value Move Instructions (66)5.9.5 Conditional Branch Instructions (67)5.9.6 Miscellaneous Instructions (68)5.10 Valid Operands for FPU Instructions (68)5.11 FPU Instruction Formats (70)5.11.1 Implementation Note (71)Appendix A Instruction Bit Encodings (75)A.1 Instruction Encodings and Instruction Classes (75)A.2 Instruction Bit Encoding Tables (75)A.3 Floating Point Unit Instruction Format Encodings (82)Appendix B Revision History (85)ii MIPS32™ Architecture For Programmers Volume I, Revision 2.00 Copyright © 2001-2003 MIPS Technologies Inc. All rights reserved.Figure 2-1: Relationship between the MIPS32 and MIPS64 Architectures (11)Figure 2-2: One-Deep Single-Completion Instruction Pipeline (13)Figure 2-3: Four-Deep Single-Completion Pipeline (14)Figure 2-4: Four-Deep Superpipeline (14)Figure 2-5: Four-Way Superscalar Pipeline (15)Figure 2-6: CPU Registers (18)Figure 2-7: FPU Registers for a 32-bit FPU (20)Figure 2-8: FPU Registers for a 64-bit FPU if Status FR is 1 (21)Figure 2-9: FPU Registers for a 64-bit FPU if Status FR is 0 (22)Figure 2-10: Big-Endian Byte Ordering (23)Figure 2-11: Little-Endian Byte Ordering (23)Figure 2-12: Big-Endian Data in Doubleword Format (24)Figure 2-13: Little-Endian Data in Doubleword Format (24)Figure 2-14: Big-Endian Misaligned Word Addressing (25)Figure 2-15: Little-Endian Misaligned Word Addressing (25)Figure 3-1: MIPS ISAs and ASEs (27)Figure 3-2: User-Mode MIPS ISAs and Optional ASEs (27)Figure 4-1: Immediate (I-Type) CPU Instruction Format (42)Figure 4-2: Jump (J-Type) CPU Instruction Format (42)Figure 4-3: Register (R-Type) CPU Instruction Format (42)Figure 5-1: Single-Precisions Floating Point Format (S) (45)Figure 5-2: Double-Precisions Floating Point Format (D) (45)Figure 5-3: Paired Single Floating Point Format (PS) (46)Figure 5-4: Word Fixed Point Format (W) (48)Figure 5-5: Longword Fixed Point Format (L) (48)Figure 5-6: FPU Word Load and Move-to Operations (49)Figure 5-7: FPU Doubleword Load and Move-to Operations (50)Figure 5-8: Single Floating Point or Word Fixed Point Operand in an FPR (50)Figure 5-9: Double Floating Point or Longword Fixed Point Operand in an FPR (50)Figure 5-10: Paired-Single Floating Point Operand in an FPR (50)Figure 5-11: FIR Register Format (51)Figure 5-12: FCSR Register Format (53)Figure 5-13: FCCR Register Format (55)Figure 5-14: FEXR Register Format (56)Figure 5-15: FENR Register Format (56)Figure 5-16: Effect of FPU Operations on the Format of Values Held in FPRs (58)Figure 5-17: I-Type (Immediate) FPU Instruction Format (71)Figure 5-18: R-Type (Register) FPU Instruction Format (71)Figure 5-19: Register-Immediate FPU Instruction Format (71)Figure 5-20: Condition Code, Immediate FPU Instruction Format (71)Figure 5-21: Formatted FPU Compare Instruction Format (71)Figure 5-22: FP RegisterMove, Conditional Instruction Format (71)Figure 5-23: Four-Register Formatted Arithmetic FPU Instruction Format (72)Figure 5-24: Register Index FPU Instruction Format (72)Figure 5-25: Register Index Hint FPU Instruction Format (72)Figure 5-26: Condition Code, Register Integer FPU Instruction Format (72)Figure A-1: Sample Bit Encoding Table (76)MIPS32™ Architecture For Programmers Volume I, Revision 2.00iii Copyright © 2001-2003 MIPS Technologies Inc. All rights reserved.Table 1-1: Symbols Used in Instruction Operation Statements (2)Table 2-1: MIPS32 Instructions (12)Table 2-2: MIPS64 Instructions (13)Table 2-3: Unaligned Load and Store Instructions (24)Table 4-1: Load and Store Operations Using Register + Offset Addressing Mode (30)Table 4-2: Aligned CPU Load/Store Instructions (30)Table 4-3: Unaligned CPU Load and Store Instructions (31)Table 4-4: Atomic Update CPU Load and Store Instructions (31)Table 4-5: Coprocessor Load and Store Instructions (31)Table 4-6: FPU Load and Store Instructions Using Register+Register Addressing (32)Table 4-7: ALU Instructions With an Immediate Operand (33)Table 4-8: Three-Operand ALU Instructions (33)Table 4-9: Two-Operand ALU Instructions (34)Table 4-10: Shift Instructions (34)Table 4-11: Multiply/Divide Instructions (35)Table 4-12: Unconditional Jump Within a 256 Megabyte Region (36)Table 4-13: PC-Relative Conditional Branch Instructions Comparing Two Registers (36)Table 4-14: PC-Relative Conditional Branch Instructions Comparing With Zero (37)Table 4-15: Deprecated Branch Likely Instructions (37)Table 4-16: Serialization Instruction (38)Table 4-17: System Call and Breakpoint Instructions (38)Table 4-18: Trap-on-Condition Instructions Comparing Two Registers (38)Table 4-19: Trap-on-Condition Instructions Comparing an Immediate Value (38)Table 4-20: CPU Conditional Move Instructions (39)Table 4-21: Prefetch Instructions (39)Table 4-22: NOP Instructions (40)Table 4-23: Coprocessor Definition and Use in the MIPS Architecture (40)Table 4-24: CPU Instruction Format Fields (42)Table 5-1: Parameters of Floating Point Data Types (45)Table 5-2: Value of Single or Double Floating Point DataType Encoding (46)Table 5-3: Value Supplied When a New Quiet NaN Is Created (47)Table 5-4: FIR Register Field Descriptions (51)Table 5-5: FCSR Register Field Descriptions (53)Table 5-6: Cause, Enable, and Flag Bit Definitions (55)Table 5-7: Rounding Mode Definitions (55)Table 5-8: FCCR Register Field Descriptions (56)Table 5-9: FEXR Register Field Descriptions (56)Table 5-10: FENR Register Field Descriptions (57)Table 5-11: Default Result for IEEE Exceptions Not Trapped Precisely (60)Table 5-12: FPU Data Transfer Instructions (62)Table 5-13: FPU Loads and Stores Using Register+Offset Address Mode (63)Table 5-14: FPU Loads and Using Register+Register Address Mode (63)Table 5-15: FPU Move To and From Instructions (63)Table 5-16: FPU IEEE Arithmetic Operations (64)Table 5-17: FPU-Approximate Arithmetic Operations (64)Table 5-18: FPU Multiply-Accumulate Arithmetic Operations (65)Table 5-19: FPU Conversion Operations Using the FCSR Rounding Mode (65)Table 5-20: FPU Conversion Operations Using a Directed Rounding Mode (65)Table 5-21: FPU Formatted Operand Move Instructions (66)Table 5-22: FPU Conditional Move on True/False Instructions (66)iv MIPS32™ Architecture For Programmers Volume I, Revision 2.00 Copyright © 2001-2003 MIPS Technologies Inc. All rights reserved.Table 5-23: FPU Conditional Move on Zero/Nonzero Instructions (67)Table 5-24: FPU Conditional Branch Instructions (67)Table 5-25: Deprecated FPU Conditional Branch Likely Instructions (67)Table 5-26: CPU Conditional Move on FPU True/False Instructions (68)Table 5-27: FPU Operand Format Field (fmt, fmt3) Encoding (68)Table 5-28: Valid Formats for FPU Operations (69)Table 5-29: FPU Instruction Format Fields (72)Table A-1: Symbols Used in the Instruction Encoding Tables (76)Table A-2: MIPS32 Encoding of the Opcode Field (77)Table A-3: MIPS32 SPECIAL Opcode Encoding of Function Field (78)Table A-4: MIPS32 REGIMM Encoding of rt Field (78)Table A-5: MIPS32 SPECIAL2 Encoding of Function Field (78)Table A-6: MIPS32 SPECIAL3 Encoding of Function Field for Release 2 of the Architecture (78)Table A-7: MIPS32 MOVCI Encoding of tf Bit (79)Table A-8: MIPS32 SRL Encoding of Shift/Rotate (79)Table A-9: MIPS32 SRLV Encoding of Shift/Rotate (79)Table A-10: MIPS32 BSHFL Encoding of sa Field (79)Table A-11: MIPS32 COP0 Encoding of rs Field (79)Table A-12: MIPS32 COP0 Encoding of Function Field When rs=CO (80)Table A-13: MIPS32 COP1 Encoding of rs Field (80)Table A-14: MIPS32 COP1 Encoding of Function Field When rs=S (80)Table A-15: MIPS32 COP1 Encoding of Function Field When rs=D (81)Table A-16: MIPS32 COP1 Encoding of Function Field When rs=W or L (81)Table A-17: MIPS64 COP1 Encoding of Function Field When rs=PS (81)Table A-18: MIPS32 COP1 Encoding of tf Bit When rs=S, D, or PS, Function=MOVCF (81)Table A-19: MIPS32 COP2 Encoding of rs Field (82)Table A-20: MIPS64 COP1X Encoding of Function Field (82)Table A-21: Floating Point Unit Instruction Format Encodings (82)MIPS32™ Architecture For Programmers Volume I, Revision 2.00v Copyright © 2001-2003 MIPS Technologies Inc. All rights reserved.vi MIPS32™ Architecture For Programmers Volume I, Revision 2.00 Copyright © 2001-2003 MIPS Technologies Inc. All rights reserved.Chapter 1About This BookThe MIPS32™ Architecture For Programmers V olume I comes as a multi-volume set.•V olume I describes conventions used throughout the document set, and provides an introduction to the MIPS32™Architecture•V olume II provides detailed descriptions of each instruction in the MIPS32™ instruction set•V olume III describes the MIPS32™Privileged Resource Architecture which defines and governs the behavior of the privileged resources included in a MIPS32™ processor implementation•V olume IV-a describes the MIPS16e™ Application-Specific Extension to the MIPS32™ Architecture•V olume IV-b describes the MDMX™ Application-Specific Extension to the MIPS32™ Architecture and is notapplicable to the MIPS32™ document set•V olume IV-c describes the MIPS-3D™ Application-Specific Extension to the MIPS64™ Architecture and is notapplicable to the MIPS32™ document set•V olume IV-d describes the SmartMIPS™Application-Specific Extension to the MIPS32™ Architecture1.1Typographical ConventionsThis section describes the use of italic,bold and courier fonts in this book.1.1.1Italic Text•is used for emphasis•is used for bits,fields,registers, that are important from a software perspective (for instance, address bits used bysoftware,and programmablefields and registers),and variousfloating point instruction formats,such as S,D,and PS •is used for the memory access types, such as cached and uncached1.1.2Bold Text•represents a term that is being defined•is used for bits andfields that are important from a hardware perspective (for instance,register bits, which are not programmable but accessible only to hardware)•is used for ranges of numbers; the range is indicated by an ellipsis. For instance,5..1indicates numbers 5 through 1•is used to emphasize UNPREDICTABLE and UNDEFINED behavior, as defined below.1.1.3Courier TextCourier fixed-width font is used for text that is displayed on the screen, and for examples of code and instruction pseudocode.MIPS32™ Architecture For Programmers Volume I, Revision 2.001 Copyright © 2001-2003 MIPS Technologies Inc. All rights reserved.Chapter 1 About This Book1.2UNPREDICTABLE and UNDEFINEDThe terms UNPREDICTABLE and UNDEFINED are used throughout this book to describe the behavior of theprocessor in certain cases.UNDEFINED behavior or operations can occur only as the result of executing instructions in a privileged mode (i.e., in Kernel Mode or Debug Mode, or with the CP0 usable bit set in the Status register).Unprivileged software can never cause UNDEFINED behavior or operations. Conversely, both privileged andunprivileged software can cause UNPREDICTABLE results or operations.1.2.1UNPREDICTABLEUNPREDICTABLE results may vary from processor implementation to implementation,instruction to instruction,or as a function of time on the same implementation or instruction. Software can never depend on results that areUNPREDICTABLE.UNPREDICTABLE operations may cause a result to be generated or not.If a result is generated, it is UNPREDICTABLE.UNPREDICTABLE operations may cause arbitrary exceptions.UNPREDICTABLE results or operations have several implementation restrictions:•Implementations of operations generating UNPREDICTABLE results must not depend on any data source(memory or internal state) which is inaccessible in the current processor mode•UNPREDICTABLE operations must not read, write, or modify the contents of memory or internal state which is inaccessible in the current processor mode. For example,UNPREDICTABLE operations executed in user modemust not access memory or internal state that is only accessible in Kernel Mode or Debug Mode or in another process •UNPREDICTABLE operations must not halt or hang the processor1.2.2UNDEFINEDUNDEFINED operations or behavior may vary from processor implementation to implementation, instruction toinstruction, or as a function of time on the same implementation or instruction.UNDEFINED operations or behavior may vary from nothing to creating an environment in which execution can no longer continue.UNDEFINED operations or behavior may cause data loss.UNDEFINED operations or behavior has one implementation restriction:•UNDEFINED operations or behavior must not cause the processor to hang(that is,enter a state from which there is no exit other than powering down the processor).The assertion of any of the reset signals must restore the processor to an operational state1.3Special Symbols in Pseudocode NotationIn this book, algorithmic descriptions of an operation are described as pseudocode in a high-level language notation resembling Pascal. Special symbols used in the pseudocode notation are listed in Table 1-1.Table 1-1 Symbols Used in Instruction Operation StatementsSymbol Meaning←Assignment=, ≠Tests for equality and inequality||Bit string concatenationx y A y-bit string formed by y copies of the single-bit value x2MIPS32™ Architecture For Programmers Volume I, Revision 2.00 Copyright © 2001-2003 MIPS Technologies Inc. All rights reserved.1.3Special Symbols in Pseudocode Notationb#n A constant value n in base b.For instance10#100represents the decimal value100,2#100represents the binary value 100 (decimal 4), and 16#100 represents the hexadecimal value 100 (decimal 256). If the "b#" prefix is omitted, the default base is 10.x y..z Selection of bits y through z of bit string x.Little-endian bit notation(rightmost bit is0)is used.If y is less than z, this expression is an empty (zero length) bit string.+, −2’s complement or floating point arithmetic: addition, subtraction∗, ×2’s complement or floating point multiplication (both used for either)div2’s complement integer divisionmod2’s complement modulo/Floating point division<2’s complement less-than comparison>2’s complement greater-than comparison≤2’s complement less-than or equal comparison≥2’s complement greater-than or equal comparisonnor Bitwise logical NORxor Bitwise logical XORand Bitwise logical ANDor Bitwise logical ORGPRLEN The length in bits (32 or 64) of the CPU general-purpose registersGPR[x]CPU general-purpose register x. The content of GPR[0] is always zero.SGPR[s,x]In Release 2 of the Architecture, multiple copies of the CPU general-purpose registers may be implemented.SGPR[s,x] refers to GPR set s, register x. GPR[x] is a short-hand notation for SGPR[ SRSCtl CSS, x].FPR[x]Floating Point operand register xFCC[CC]Floating Point condition code CC.FCC[0] has the same value as COC[1].FPR[x]Floating Point (Coprocessor unit 1), general register xCPR[z,x,s]Coprocessor unit z, general register x,select sCP2CPR[x]Coprocessor unit 2, general register xCCR[z,x]Coprocessor unit z, control register xCP2CCR[x]Coprocessor unit 2, control register xCOC[z]Coprocessor unit z condition signalXlat[x]Translation of the MIPS16e GPR number x into the corresponding 32-bit GPR numberBigEndianMem Endian mode as configured at chip reset (0→Little-Endian, 1→ Big-Endian). Specifies the endianness of the memory interface(see LoadMemory and StoreMemory pseudocode function descriptions),and the endianness of Kernel and Supervisor mode execution.BigEndianCPU The endianness for load and store instructions (0→ Little-Endian, 1→ Big-Endian). In User mode, this endianness may be switched by setting the RE bit in the Status register.Thus,BigEndianCPU may be computed as (BigEndianMem XOR ReverseEndian).Table 1-1 Symbols Used in Instruction Operation StatementsSymbol MeaningChapter 1 About This Book1.4For More InformationVarious MIPS RISC processor manuals and additional information about MIPS products can be found at the MIPS URL:ReverseEndianSignal to reverse the endianness of load and store instructions.This feature is available in User mode only,and is implemented by setting the RE bit of the Status register.Thus,ReverseEndian may be computed as (SR RE and User mode).LLbitBit of virtual state used to specify operation for instructions that provide atomic read-modify-write.LLbit is set when a linked load occurs; it is tested and cleared by the conditional store. It is cleared, during other CPU operation,when a store to the location would no longer be atomic.In particular,it is cleared by exception return instructions.I :,I+n :,I-n :This occurs as a prefix to Operation description lines and functions as a label. It indicates the instruction time during which the pseudocode appears to “execute.” Unless otherwise indicated, all effects of the currentinstruction appear to occur during the instruction time of the current instruction.No label is equivalent to a time label of I . Sometimes effects of an instruction appear to occur either earlier or later — that is, during theinstruction time of another instruction.When this happens,the instruction operation is written in sections labeled with the instruction time,relative to the current instruction I ,in which the effect of that pseudocode appears to occur.For example,an instruction may have a result that is not available until after the next instruction.Such an instruction has the portion of the instruction operation description that writes the result register in a section labeled I +1.The effect of pseudocode statements for the current instruction labelled I +1appears to occur “at the same time”as the effect of pseudocode statements labeled I for the following instruction.Within one pseudocode sequence,the effects of the statements take place in order. However, between sequences of statements for differentinstructions that occur “at the same time,” there is no defined order. Programs must not depend on a particular order of evaluation between such sections.PCThe Program Counter value.During the instruction time of an instruction,this is the address of the instruction word. The address of the instruction that occurs during the next instruction time is determined by assigning a value to PC during an instruction time. If no value is assigned to PC during an instruction time by anypseudocode statement,it is automatically incremented by either 2(in the case of a 16-bit MIPS16e instruction)or 4before the next instruction time.A taken branch assigns the target address to the PC during the instruction time of the instruction in the branch delay slot.PABITSThe number of physical address bits implemented is represented by the symbol PABITS.As such,if 36physical address bits were implemented, the size of the physical address space would be 2PABITS = 236 bytes.FP32RegistersModeIndicates whether the FPU has 32-bit or 64-bit floating point registers (FPRs).In MIPS32,the FPU has 3232-bit FPRs in which 64-bit data types are stored in even-odd pairs of FPRs.In MIPS64,the FPU has 3264-bit FPRs in which 64-bit data types are stored in any FPR.In MIPS32implementations,FP32RegistersMode is always a 0.MIPS64implementations have a compatibility mode in which the processor references the FPRs as if it were a MIPS32 implementation. In such a caseFP32RegisterMode is computed from the FR bit in the Status register.If this bit is a 0,the processor operates as if it had 32 32-bit FPRs. If this bit is a 1, the processor operates with 32 64-bit FPRs.The value of FP32RegistersMode is computed from the FR bit in the Status register.InstructionInBranchDelaySlotIndicates whether the instruction at the Program Counter address was executed in the delay slot of a branch or jump. This condition reflects the dynamic state of the instruction, not the static state. That is, the value is false if a branch or jump occurs to an instruction whose PC immediately follows a branch or jump, but which is not executed in the delay slot of a branch or jump.SignalException(exce ption, argument)Causes an exception to be signaled, using the exception parameter as the type of exception and the argument parameter as an exception-specific argument). Control does not return from this pseudocode function - the exception is signaled at the point of the call.Table 1-1 Symbols Used in Instruction Operation StatementsSymbolMeaning。
les AS gR学生手册英文
Deploying with Oracle JDeveloper
To deploy an application with JDeveloper, perform the following steps: 1. Create the deployment profile. 2. Configure the deployment profile. 3. Create an application server connection to the target
第十六页,共33页，
Planning the Deployment Process
The deployment process includes:
1. Packaging code as J2EE applications or modules
2. Selecting a parent application
including those in a cluster
第十页,共33页，
Deploying with admin_client.jar
The admin_client.jar tool: • Is a command-line utility • Is executed by using the following basic command:
– defaultDataSource to select the data source used by the application for management of data by EJB entities
– dataSourcesPath to specify a application-specific data sources
通用串行总线2.0规范 英文翻译
Universal Serial Bus Specification Revision 2.0Introduction1.1 MotivationThe original motivation for the Universal Serial Bus (USB) came from three interrelated considerations:• Connection of the PC to the telephoneIt is well understood that the merge of computing and communication will be the basis for the next generation of productivity applications. The movement of machine-oriented and human-oriented data types from one location or environment to another depends on ubiquitous and cheap connectivity. Unfortunately, the computing and communication industries have evolved independently. The USB provides a ubiquitous link that can be used across a wide range of PC-to-telephone interconnects.• Ease-of-useThe lack of flexibility in reconfiguring the PC has been acknowledged as the Achilles’ heel to its further deployment. The combination of user-friendly graphical interfaces and the hardware and software mechanisms associated with new-generation bus architectures have made computers less confrontational and easier to reconfigure. However, from the end user’s point of view, the PC’s I/O interfaces, such as serial/parallel ports, keyboard/mouse/joystick interfaces, etc., do not have the attributes of plug-and-play.• Port expansionThe addition of external peripherals continues to be constrained by port availability. The lack of a bidirectional, low-cost, low-to-mid speed peripheral bus has held back the creative proliferation of peripherals such as telephone/fax/modem adapters, answering machines, scanners, PDA’s, keyboards, mice, etc. Existing interconnects are optimized for one or two point products. As each new function or capability is added to the PC, a new interface has been defined to address this need. The more recent motivation for USB 2.0 stems from the fact that PCs have increasingly higher performance and are capable of processing vast amounts of data. At the same time, PC peripherals have added more performance and functionality. User applications such as digital imaging demand a high performance connection between the PC and these increasingly sophisticated peripherals. USB 2.0 addresses this need by adding a third transfer rate of 480 Mb/s to the 12 Mb/s and 1.5 Mb/s originally defined for USB. USB 2.0 is a natural evolution of USB, delivering the desired bandwidth increase while preserving the original motivations for USB and maintaining full compatibility with existing peripherals. Thus, USB continues to be the answer to connectivity for the PC architecture. It is a fast, bi-directional, isochronous, low-cost, dynamically attachable serial interface that is consistent with the requirements of the PC platform of today and tomorrow.1.2 Objective of the SpecificationThis document defines an industry-standard USB. The specification describes the bus attributes, the protocol definition, types of transactions, bus management, and the programming interface required to design and build systems and peripherals that are compliant with this standard.The goal is to enable such devices from different vendors to interoperate in an open architecture.The specification is intended as an enhancement to the PC architecture, spanning portable, business desktop, and home environments. It is intended that the specification allow system OEMs and peripheral developers adequate room for product versatility and market differentiation without the burden of carrying obsolete interfaces or losing compatibility.1.3 Scope of the DocumentThe specification is primarily targeted to peripheral developers and system OEMs, but provides valuable information for platform operating system/ BIOS/ device driver, adapter IHVs/ISVs, and platform/adapter controller vendors. This specification can be used for developing new products and associated software.1.4 USB Product ComplianceAdopters of the USB 2.0 specification have signed the USB 2.0 Adopters Agreement, which provides them access to a reciprocal royalty-free license from the Promoters and other Adopters to certain intellectual property contained in products that are compliant with the USB 2.0 specification. Adopters can demonstrate compliance with the specification through the testing program as defined by the USB Implementers Forum. Products that demonstrate compliance with the specification will be granted certain rights to use the USB Implementers Forum logo as defined in the logo license.1.5 Document OrganizationChapters 1 through 5 provide an overview for all readers, while Chapters 6 through 11 contain detailed technical information defining the USB.• Peripheral implementers should particularly read Chapters 5 through 11.• USB Host Controller implementers should particularly read Chapters 5 through 8, 10, and 11. • USB device driver implementers should particularly read Chapters 5, 9, and 10.This document is complemented and referenced by the Universal Serial Bus Device Class Specifications. Device class specifications exist for a wide variety of devices. Please contact the USB Implementers Forum for further details.Readers are also requested to contact operating system vendors for operating system bindings specific to the USB.BackgroundThis chapter presents a brief description of the background of the Universal Serial Bus (USB), including design goals, features of the bus, and existing technologies.2.1 Goals for the Universal Serial BusThe USB is specified to be an industry-standard extension to the PC architecture with a focus on PC peripherals that enable consumer and business applications. The following criteria were applied in defining the architecture for the USB:• Ease-of-use for PC peripheral expansion• Low-cost solution that supports transfer rates up to 480 Mb/s• Full support for real-time data for voice, audio, and video• Protocol flexibility for mixed-mode isochronous data transfers and asynchronous messaging • Integration in commodity device technology• Comprehension of various PC configurations and form factors• Provision of a standard interface capable of quick diffusion into product• Enabling new classes of devices that augment the PC’s cap ability• Full backward compatibility of USB 2.0 for devices built to previous versions of the specification2.2 T axonomy of Application SpaceFigure 2-1 describes a taxonomy for the range of data traffic workloads that can be serviced over a USB. As can be seen, a 480 Mb/s bus comprehends the high-speed, full-speed, and low-speed data ranges. Typically, high-speed and full-speed data types may be isochronous, while low-speed data comes from interactive devices. The USB is primarily a PC bus but can be readily applied to other host-centric computing devices. The software architecture allows for future extension of the USB by providing support for multiple USB Host Controllers.Figure 2-1. Application Space T axonomy2.3 Feature ListThe USB Specification provides a selection of attributes that can achieve multiple price/performance integration points and can enable functions that allow differentiation at thesystem and component level.Features are categorized by the following benefits:Easy to use for end user• Single model for cabling and connectors• Electrical details isolated from end user (e.g., bus terminations)• Self-identifying peripherals, automatic mapping of function to driver and configuration • Dynamically attachable and reconfigurable peripheralsWide range of workloads and applications• Suitable for device bandwidths ranging from a few kb/s to several hundred Mb/s• Supports isochronous as well as asynchronous transfer types over the same set of wires • Supports concurrent operation of many devices (multiple connections)• Supports up to 127 physical devices• Supports transfer of multiple data and message streams between the host and devices• Allows compound devices (i.e., peripherals composed of many functions)• Lower protocol overhead, resulting in high bus utilizationIsochronous bandwidth• Guaranteed bandwidth and low latencies appropriate for telephony, audio, video, etc.Flexibility• Supports a wide range of packet sizes, which allows a range of device buffering options • Allows a wide range of device data rates by accommodating packet buffer size and latencies • Flow control for buffer handling is built into the protocolRobustness• Error handling/fault recovery mechanism is built into the protocol• Dynamic insertion and removal of devices is identified in user-perceived real-time• Supports identification of faulty devicesSynergy with PC industry• Protocol is simple to implement and integrate• Consistent with the PC plug-and-play architecture• Leverages existing operating system interfacesLow-cost implementation• Low-cost subchannel at 1.5 Mb/s• Optimized for integration in peripheral and host hardware• Suitable for development of low-cost peripherals• Low-cost cables and connectors• Uses commodity technologiesUpgrade path• Architecture upgradeable to support multiple USB Host Controllers in a systemArchitectural OverviewThis chapter presents an overview of the Universal Serial Bus (USB) architecture and key concepts. The USB is a cable bus that supports data exchange between a host computer and a wide range of simultaneously accessible peripherals. The attached peripherals share USB bandwidth through a hostscheduled, token-based protocol. The bus allows peripherals to be attached, configured, used, and detached while the host and other peripherals are in operation.Later chapters describe the various components of the USB in greater detail.3.1 USB System DescriptionA USB system is described by three definitional areas:• USB interconnect• USB devices• USB hostThe USB interconnect is the manner in which USB devices are connected to and communicate with the host. This includes the following:• Bus Topology: Connection model between USB devices and the host.• Inter-layer Relationships: In terms of a capability stack, the USB tasks that are performed at each layer in the system.• Data Flow Models: The manner in which data moves in the system over the USB between producers and consumers.• USB Schedule: The USB provides a shared interconnect. Access to the interconnect is scheduled in order to support isochronous data transfers and to eliminate arbitration overhead.USB devices and the USB host are described in detail in subsequent sections.3.1.1 Bus T opologyThe USB connects USB devices with the USB host. The USB physical interconnect is a tiered star topology. A hub is at the center of each star. Each wire segment is a point-to-point connection between the host and a hub or function, or a hub connected to another hub or function. Figure 3-1 illustrates the topology of the USB.Due to timing constraints allowed for hub and cable propagation times, the maximum number of tiers allowed is seven (including the root tier). Note that in seven tiers, five non-root hubs maximum can be supported in a communication path between the host and any device. A compound device (see Figure 3-1) occupies two tiers; therefore, it cannot be enabled if attached at tier level seven. Only functions can be enabled in tier seven.Figure 3-1. Bus T opology3.1.1.1 USB HostThere is only one host in any USB system. The USB interface to the host computer system is referred to as the Host Controller. The Host Controller may be implemented in a combination of hardware, firmware, or software. A root hub is integrated within the host system to provide one or more attachment points.Additional information concerning the host may be found in Section 4.9 and in Chapter 10.3.1.1.2 USB DevicesUSB devices are one of the following:• Hubs, which provide additional attachment points to the USB• Functions, which provide capabilities to the system, such as an ISDN connection, a digital joystick, or speakersUSB devices present a standard USB interface in terms of the following:• Their comprehension of the USB protocol• Their response to standard USB operations, such as configuration and reset• Their standard capability descriptive informationAdditional information concerning USB devices may be found in Section 4.8 and in Chapter 9.3.2 Physical InterfaceThe physical interface of the USB is described in the electrical (Chapter 7) and mechanical (Chapter 6) specifications for the bus.3.2.1 ElectricalThe USB transfers signal and power over a four-wire cable, shown in Figure 3-2. The signaling occurs over two wires on each point-to-point segment.There are three data rates:• The USB high-speed signaling bit rate is 480 Mb/s.• The USB full-speed signaling bit rate is 12 Mb/s.• A limited capability low-speed signaling mode is also defined at 1.5 Mb/s.Figure 3-2. USB CableUSB 2.0 host controllers and hubs provide capabilities so that full-speed and low-speed data can be transmitted at high-speed between the host controller and the hub, but transmitted between the hub and the device at full-speed or low-speed. This capability minimizes the impact that full-speed and low-speed devices have upon the bandwidth available for high-speed devices.The low-speed mode is defined to support a limited number of low-bandwidth devices, such as mice，because more general use would degrade bus utilization.3.2.2 MechanicalThe mechanical specifications for cables and connectors are provided in Chapter 6. All devices have an upstream connection. Upstream and downstream connectors are not mechanically interchangeable, thus eliminating illegal loopback connections at hubs. The cable has four conductors: a twisted signal pair of standard gauge and a power pair in a range of permitted gauges. The connector is four-position, with shielded housing, specified robustness, and ease of attach-detach characteristics.通用串行总线2.0规范介绍1.1 制定动机制定通用串行总线（USB）的原始动机来自于对三个相互关联的方面的综合考虑：•计算机和电话之间的连接计算机运作和通信技术的结合肯定将会成为下一代生产力应用的基础。
ISO1050中文资料_数据手册_参数
器件型号 ISO1050
器件信息(1)
封装
封装尺寸（标称值）
SOP (8)
9.50mm × 6.57mm
SOIC (16)
10.30mm x 7.50mm
(1) 要了解所有可用封装，请见数据表末尾的可订购产品附录。
简化电路原理图
CANH RXD
CANL
TXD
1பைடு நூலகம்
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
English Data Sheet: SLLS983
ISO1050
ZHCS321I – JUNE 2009 – REVISED JANUARY 2015
目录
1 特性.......................................................................... 1 2 应用.......................................................................... 1 3 说明.......................................................................... 1 4 修订历史记录 ........................................................... 2 5 Pin Configuration and Functions ......................... 5 6 Specifications......................................................... 6
软件工程总结具体
软件工程总结具体第一篇：软件工程总结具体第一章1．什么是软件危机？它有哪些典型表现？为什么会产生软件危机？软件危机是指在计算机软件的开发和维护过程中所遇到的一系列严重问题。
这些问题表现在以下几个方面：(1)用户对开发出的软件很难满意。
(2)软件产品的质量往往靠不住。
(3)一般软件很难维护。
(4)软件生产效率很低。
(5)软件开发成本越来越大。
(6)软件成本与开发进度难以估计。
(7)软件技术的发展远远满足不了计算机应用的普及与深入的需要。
产生软件危机的原因(1)开发人员方面，对软件产品缺乏正确认识，没有真正理解软件产品是一个完整的配置组成。
造成开发中制定计划盲目、编程草率，不考虑维护工作的必要性。
(2)软件本身方面，对于计算机系统来说，软件是逻辑部件，软件开发过程没有统一的、公认的方法论和规范指导，造成软件维护困难。
(3)尤其是随着软件规模越来越大,复杂程度越来越高,原有软件开发方式效率不高、质量不能保证、成本过高、研制周期不易估计、维护困难等一系列问题更为突出，技术的发展已经远远不能适应社会需求。
2．假设自己是一家软件公司的总工程师，当把图1.1给手下的软件工程师们观看，告诉他们及早发现并改正错误的重要性时，有人不同意这个观点，认为要求在错误进入软件之前就清除它们是不现实的，并举例说：“如果一个故障是编码错误造成的，那么，一个人怎么能在设计阶段清楚他呢？”应该怎样反驳他？反驳：发生在编码时期的故障极有可能是需求分析阶段由于操作不当产生的，所以必须及时消除错误，否则，到了后期软件运行和维护阶段再回过头来修改，将会付出更大的代价。
3．什么是软件工程?它有哪些本质特性？怎样用软件工程消除软件危机？软件工程是指导计算机软件开发和维护的工程学科。
(1)它采用工程的概念、原理、技术和方法来开发和维护软件；(2)它将管理技术与当前经过时间考验的而证明是正确的技术方法结合起来；(3)它强调使用生存周期方法学和结构分析和结构技术；(4)经过人们长期的努力和探索，围绕着实现软件优质高产这个目标,从技术到管理两个方面做了大量的努力,逐渐形成了“软件工程学”这一新的学科。
DisplayPort和eDP物理层兼容性测试中必须考虑的因素
Getting down to One data lane…
5 Pins1 data
lane
4 data lanes
AUX+/-, HPDConfig1/2
1 low
MyDP speed line
DisplayPort20 Pins
Power, Ground
Power, Ground
HDMI
Something Good is Happening…
MyDP
Standard DisplayPortComputing
eDP
Embedded Systems
Consumer Electronics
Portables
VESA: 200 members strong!
DisplayPort Technology Rollouts
The AUX Channel enables Link setup and maintenance as well as control for testing.
Tx
Driver
Logic
Decode
Main Link
AUX
Hot Plug Detect
Image buffer
EDID
DPCD
Sink
Key Features of DisplayPort
Hot Plug Detect
TransmitterAUX
Receiver (Sink)
AUX ChannelVery robust channel Setup Link/Maintain Link Test Assistance
uPacket BasedNot based on Raster timings Fixed bit rates
世界遗产运河文化保护传承利用的立法经验与借鉴
中国名城I 城市与运河世界遗产运河文化保护传承利用的立法经验与借鉴**基金项目：国家社科基金项目"文化博弈视阈下大运河国际形象提升路径研究"（编号：18BQJ086）。
田德新摘 要：针对中国大运河文化遗产保护、传承和利用 的立法现状和需求，以联合国科教科文组织的《保护世界文化与自然遗产公约》《实施“保护世界文化与自然遗产 公约”的操作指南》《保护非物质文化遗产公约》《保护和促进文化表现形式多样性公约》的相关文件，以及由保护框架、保护原则和保护模式构成的世界文化遗产保护国际法体系为宏观指导框架，以创造性运用最新科技将运河 开发与周边环保融为一体的米迪运河、多次有效转型其功能与角色，并成功推出里多文化遗产廊道生态旅游项目的 里多运河以及有效化解工业化和城市化副作用的庞特基西斯特水道桥与运河为案例，探析其通过立法来增强运河文 化和自然遗产以及非物质文化遗产保护、传承和利用方面 的经验，供国内借鉴。
关键词：世界遗产运河；米迪运河；庞特基西斯特 水道桥与运河；里多运河；经验Abstract ： In answer tx> the legislative status quo and needsfor protecting, inheriting, and utilizing the cultural heritagesof China' s Grand Canal, the present paper explores the veryexperience herein from three representative canals on the UnitedNations Educational, Scientific , and Cultural Organization（UNESCO ） World Heritage List. The three representativecanals are respectively the Canal du Midi, the Rideau Canal,and the British Pontcysyllte Aqueduct & Canal, with the first creatively integrating the canal development with the environmentalprotection of the surroundings via the up-to-date high-tech, thesecond successfully transforming its functions and roles and launchir^the ecological tourism program along the Rideau Canal cultural heritage corridor, and the third efectively defused the side efects ofindustrialization and urbanization. What serve as the macro —theoreticalframeworks are ： firstly, a series of U NESCO documents including作者简介田德新，扬州大学特聘教授，扬州大学外国语学院博士生导 师，博士。
照明系统外文翻译
英文翻译原文：ABSTRACTThis paper discusses the implementation of semi-permanent, high-mast pole-mounted lighting for nighttime road work construction and maintenance based on an installation along Interstate 90 in Albany, New York. The high-mast lighting system met state lighting performance specifications. There were no recorded accidents at the site during the construction period. Although this is largely attributable to roadway closures allowed during part of the project, the consensus of the contractor and transportation agency is that the lighting contributed at least in part to an increase in safety. The cost of the high-mast lighting system was approximately 16% higher than the estimated cost of the portable light towers. Despite the higher estimated cost of the high-mast lighting system, the economic and societal benefits appear considerable in this particular location, namely an urban, heavily traveled throughway. In particular, this lighting approach probably allowed the duration of the construction period to be shortened, leading to a reduction in worker and driver risk exposures and to a reduction in traffic delays for motorists. An approach to identifying projects where this lighting technique might be warranted is presented.INTRODUCTIONSemi-permanent, high-mast (70 ft.) pole-mounted fixtures were used by a construction contractor hired by the New York State Department of Transportation (NYSDOT) to illuminate nighttime road work construction and maintenance along a three-mile stretch of Interstate 90 (I-90) in Albany, N.Y., as an alternative to the more common portable light towers (1). The high-mast lighting was installed prior to construction work and removed after the construction project was completed, about seven months later. Freyssinier et al. (2) documented the high-mast lighting system and its performance in terms of photometric performance, visibility and glare. The high-mast lighting system was found to have performed well and as intended. The installation provided a level of illumination sufficient for performing the maintenance and construction activities at the site (3), with less pronounced shadows and relatively low glare. The purpose of the present paper is to discuss approaches to identifying if and when this lighting approach can be appropriate for a highway construction project. Issues regarding safety, economics and environmental impacts are discussed, and an approach to warranting semi-permanent, high-mast nighttime construction lighting is offered.To decide if and when semi-permanent high-mast lighting is feasible for highway construction work, one must consider safety, economics and environmental impacts. These issues are discussed, in turn, in the following sections.SAFETYCrash Risk FactorWhen the contractor hired by NYSDOT to perform road work along I-90 proposed using semi-permanent, high-maslighting for nighttime construction work, safetyengineers analyzed the proposal against the concern that most (aboutwo-thirds) of the proposed high masts would be located within the 30 ft clear zone desired for this highway. The clear zone is defined (4) as the area outside the paved roadway area where a vehicle could safely travel if it left the road. Acknowledging that portable lighting for nighttime roadway construction work is nearly always located withinthe clear zone and in fact often closer to drivers, NYSDOT engineers concluded that high-mast lighting probably had a lower risk factor than portable light towers, and authorized the contractor to proceed with the installation and roadwork, based on the following reasons:While in use, portable light plants are almost always located inside the clear zone. About one third of the 108 high-mast poles proposed could be located outside the clear zone without compromising lighting quality. The lower number of poles in the clear zone, compared to the number of conventional, portable units needed to illuminate a portion of the highway, was thought to weigh against the added risk of drivers!ˉ constant exposure to semi-permanent poles during both daytime and nighttime. Howeveradditional safety features were recommended, such as traffic barriers, guards and crash cushions.High-mast poles avoid the high-risk exposure of workers every night during setup and removal of the conventional portable light units. In the I-90 project, it was estimated that at least 8250 worker-hours of high-exposure would be eliminated. Time savings in the mobilization of portable lights meant night construction could be completed in 222 days rather than 275, reducing the work to one construction season. NYSDOT!ˉs authorization was conditioned on tremoval of the high-mast poles by winter shutdown, regardless of the contractor!ˉs work accomplishments.Worker Safety ImplicationsWhile the conventional light towers are extremely useful because of their portable nature, there are a number of known issues regarding the difficulty of their installation, operation, and maintenance. First, there are a large number of warnings associated with most products (during setup, operation, maintenance, stowing, and transportation). Second, the two main risks associated with the use of portable light towers are the interaction of workers with traffic during setup and removal when both conditions represent a high risk of collision between workers and drivers, and the setup of light towers near power lines. Although there are no published statistics, it is reasonable to believe that crews are at increased risk of injury or fatality when raising a mast near power lines. It follows that by having a semi-permanent lighting installation, much of the risk mentioned would not be present.TABLE 1 Estimated Operational Cost of Portable Light Tower Installation Estimated number of portable light towers required 120*Daily setup and removal costNumber of crew members in charge of setup and removal 10 Estimated number of hours to setup and remove light towers, per night 3Total worker hours per night 30 Estimated cost per hour (base rate + benefits + overhead & profit) $40Total setup and removal cost per night $1,200Daily operational costHourly operational cost per light tower (fuel, oil, regular maintenance, etc.) $3.60 Estimated daily cost per light tower (@ 6 hours per night) $21.60Daily rental cost (@ $990 per month rent) $33Total operational cost per night (assuming contractor owns 100 towers and rents 20) $3,252Total cost per night (setup, removal, and operation) $4,452Estimated duration of project in days 275**Total cost to provide lighting with 120 portable light towers $ 1,224,300120 towers is estimated to be required to illuminate a sufficient portion of the work zone at one time.The duration was estimated to be 40 days shorter using the high-mast system.Another potential safety benefit of high-mast lighting that could not be quantified precisely was the fact that warning signs, signals, and other materials for guiding traffic through the work zone could be set up each night under lighted conditions. In comparison, such warnings are typically set up by workers in advance of having the conventional light towers operational.The Environmental Protection Agency recommends a maximum noise level of 75 dBA in work environments for hearing conservation (5). Though the generators that power most of the commercial light towers typically have a noise level rating of 71 dBA, the large number of light towers (each with its own generator) and their relatively close spacing (typically about 100 ft between units) can cause noise to add up to levels that could be more than the maximum recommended. During this project, five large generators powered the entire high-mast lighting installation; each generator was located as far from the work area as possible. Each of these generators was rated at 71 dBA, dramatically reducing noise levels throughout the site. Workers of this project commented that the noise reduction enabled them to hear vehicles approaching, again greatly decreasing their risk of injury by a moving vehicle or machine.Finally, by using high-mast lighting with remotely located generators, workers were not as exposed to the fumes and harmful pollutants that result from the generators adjacent to each portable light tower and that might cause headaches, fatigue, and potential heart problems (6).ECONOMIC ANALYSISTables 1 and 2 summarize the economics of a lighting system using the portable towers and the high-mast system. Despite the higher estimated cost (approximately 16% higher) of the high-mast system as outlined in these two tables, there were several positive economic implications that resulted from the use of high-mast lighting. One significant benefit was the time saved every day from not having to setup and remove the portable light towers. This time could be used performing the contracted construction work rather than setting up lighting equipment, probably contributing tothe ahead of schedule completion of the project. In this project, the estimated cost of setup and removal of portable light tower added up to $330,000 (30 worker-hours per night at $40 per hour, for 275 days). For larger jobs this cost would increase considerably.TABLE 2 Estimated Operational Cost of Semi-Permanent High-Mast Lighting InstallationNumber of high-mast poles installed 108Number of 250-kW generators installed 5 Installation costsEstimated installation cost per pole $2,844 Estimated installation cost per kW of generator capacity $24.50Total estimated installation costs (poles and generators) $337,777 Lighting equipment rentalEstimated rental cost per pole with four luminaires $5,500Total lighting equipment rental (for the duration of the project) $594,000 Generation costsEstimated purchase cost per kW of generator capacity $200 Estimated total generators purchase cost $250,000 Operational costHourly operational cost per generator @ 55% load (fuel, oil, regular maintenance) $25.83Total operational cost per night (@ 8 hours per night) $1,033.20 Estimated duration of project in days 235*Estimated total operational cost over the length of the project $242,802Total cost to provide lighting with 108 high-mast poles $1,424,579 Incremental cost over portable lighting towers $200,279 (16% higher)The duration was estimated to be 40 days longer using the portable light tower system.It should be noted that for the lighting installations summarized in Tables 1 and 2, the semi-permanent high-mast installation was able to illuminate the whole length of the project, on both sides of the road, while the portable units were capable of illuminating a short section only at a given time. At an approximated spacing of 100 ft, 120 portable light towers can illuminate only a limited section of the road on one side only. In order to provide lighting to the whole length of the project with portable light towers, it would be necessary to use about 530 units, increasing the operational costs by approximately a factor of 4. As this is not a realistic application of portable lighttowers in practice, this comparison was not made.The contractor estimated a 40-day reduction in the planned duration of the project. While not possible to quantify in terms of economic benefits, the benefits for roadway users (in terms of avoided traffic delays during setup and takedown) are also apparent. An accurate calculation to single out the contribution of the lighting system is not possible because NYSDOT allowed the contractor to close the entire length of one side of the road overweekends, effectively increasing the work time from 21 hours per weekend (Friday, Saturday and Sunday nights, at seven hours per shift) to 60 hours (Friday night to Monday morning with crews working three shifts).As described above, it was not possible to estimate the relative impact of the lighting and the road closure separately, but informal discussions with the contractor revealed the opinion that the lighting was a significant part of this reduction. The reduction in work time also probably translated into savings caused by reducing delays to drivers navigating through the work zone. It was assumed that improved visibility by reducing glare (1,2) also yields safety benefits to drivers as well, but the strongest testimonials to safety were from the people involved in the project who described an increased perception of safety due to the higher light levels and uniformity. In general, these factors, taken together, were thought by the NYSDOT contractor to more than outweigh the initially higher economic cost of the high-mast system. The contractor and a few workers interviewed during the construction work agreed that the higher light levels and uniformity allowed them to work at a much faster pace, and possibly improved the quality of their work at the same time.Relamping could also increase the cost of the light tower system relative to the high-mast system, as well.Although the lamps used in either portable units or high-mast luminaires have nominally the same life, the working conditions of the lamps in the portable units (e.g., constant vibration, raising and stowing the mast, transportation from yard to site) would likely promote a shorter life (7).Another important aspect of this project was the fact that no injuries were reported (8). The people involved in the project believed that the higher and more uniform light levels (1,2) were positive contributions to safety. While direct comparisons of safety with projects of similar magnitude, location and duration as the present construction project were outside the scope of the study described here, such comparisons would be helpful in elucidating the role of the lighting installation in contributing to increased safety.ENVIRONMENTAL IMPACTThe primary environmental impact of the semi-permanent high-mast lighting system discussed here is that of light pollution. Light pollution can be defined and discussed in three different ways: sky glow, light trespass and glare (7). Each is related to the amount of light leaving a site (in this case the roadway right of way), but each is measured in different ways.Sky glow is simply the amount of light leaving a site. Sky glow will limit observations of astronomical objects due to obscuration by the light scattered into the atmosphere. The computer simulation model developed by Freyssinier et al. (1,2) to characterize the high-mast and portable lighting systems was used to calculate theamount of sky glow (in lumens) leaving the site from each of the two lighting systems. For the same, illuminated, linear segment of the construction site (about 1 mile), the calculated amount of light leaving the site from the portable lighting system was about three times higher than for the high-mast system, primarily owing to the fact that the portable lights require much higher aiming to achieve the required light levels (3) and therefore result in more luminous flux exiting the top and sides of the site. However, since the entire length of the segment of I-90 under construction (about 3 miles) was illuminated by the high-mast lighting system, whereas the portable system would only illuminate about a third of the total work zone on a given night, the total amount of light leaving the entire site during the construction phase from the high-mast system was about the same as from the portable system. Overall, therefore, it is estimated that the semi-permanent high-mast lighting system generated a similar amount of sky glow during construction as the portable lighting system. In an urban or suburban environment that already has a great deal of light pollution, sky glow might not be important, but in rural areas (e.g., the Adirondacks), sky glow might be a significant consideration, even if the poles are temporary. In such a case, a decision to turn on only a portion of the semi-permanent high-mast fixtures at any given time might be made to reduce light pollution.Light trespass is obtrusive light emitted from one site to another occupied by people. An example of light trespass is light coming into an occupied bedroom window at night. Because the result of light trespass is generally expressed in terms of annoyance or other subjective responses, the project team searched the local newspaper (Albany's Times Union) to assess public interest and reaction to the semi-permanent lighting at the construction site, and yielded several articles. Other than a comment from a NYSDOT engineer that the high-mast lighting would likely be less problematic to adjacent locations than the conventional approach using portable light towers (9), there was no mention of any negative comments on the project.A search of such publications as the Save the Pine Bush (an advocacy group for the nearby Albany Pine Bush) newsletter, concerned with the flora and fauna in the protected Pine Bush area adjacent to the construction site, made no mention of light pollution connected to the work on I-90. Whereas there may well be disruptions to the flora and fauna in protected areas due to light pollution, there is no documented evidence that temporary sources of light pollution from construction zones have lasting impact on the mortality or viability of species found in theseareas. Absent a formal interview process with residents near the site or with advocacy groups, which was outside the scope of the present project, the following conclusions were drawn about light pollution from the construction site.The high-mast lighting system (lighting the entire work zone) and the portable lighting system (lighting about a third of the work zone) produced similar amounts of sky glow.No complaints were registered in the public domain about light trespass from the semi-permanent high-mast lighting system.The impacts of temporary lights, of any kind, used for construction in work zones on the local flora and fauna are unknown.TABLE 3 Potential Approach for Identifying Whether High-Mast Lighting is WarrantedConsideration Score: -1 Score: 0 Score: +1 Duration of project Short: 1 to 2 months Medium: 3 to 5 months Long: 6+ monthsAvailability of space clear zone Limited: Less than 30 feet Medium: 30 to 50 feet High: More than 50 feetNumber of traffic conflict points High: Urban/suburban location Medium: Rural location Few: Controlled access highwayType of curves Small: Traversed at low speed (<30 mph) Medium: Traversed at 30 to 40 mph Large: Traversed at high speed (40+ mph)Presence of traffic barriers Low: Markings only Medium: Traffic cones and barrels High: Strong lane control and heavy barriersEnvironmental considerations High: Very sensitive environmental or residential location Medium: Some residential areas nearby Low: Little or no sensitiv areas nearbyAN APPROACH TO WARRANTINGThe analysis in the present paper demonstrates that the precise lighting layout will depend largely on the specific characteristics of the nighttime work zone location to be lighted. The site in question was an interstate highway in urban area. It would therefore be premature to develop specific warrants for the use of semi-permanent high-mast lighting for nighttime work zones in other types of locations. However, through observations made during visits to the site and from the analyses in the present report, several issues could form the basis for a more detailed approach to developing warranting conditions for this type of lighting:Duration of the project. The NYSDOT contractor estimated that the high-mast approach to lighting such as that used on I-90 would not be feasible for projects shorter than four months in duration. Certainly, the use of high mast lighting on the present I-90 project, which was seven months in duration, appeared to be successful with the benefits in terms of improved visibility and increased efficiency of work outweighing the increased expense.Geometric factors. I-90 is a controlled-access interstate highway with limited conflict points (entrance or exit ramps) and without narrow-radius curves. These factors could reduce the necessity for a large clear zone in which the presence of lighting poles, particularly high-mast poles, would be undesirable (e.g., at sharper curves). Certainly as large a clear zone as possible is wanted, but some locations might not have available space for such a zone.Availability of channelization or traffic barriers. Again, because lighting poles inthe high-mast approach will often need to be located relatively close to the roadway, they might not permit a large clear zone. The presence of strongly channelized and barricaded traffic pattern has the potential to reduce the risk of road runoffs and therefore to potentially reduce the need to keep adjacent zones clear of poles.Sensitivity of location to light pollution and light trespass. The high-mast lighting system will result in a similar amount of upward light from the nighttime work zone location, contributing to sky glow, as the portable system. While NYSDOT estimated that the high-mast approach would not provide increase light trespass potential in the I-90 location where this system was installed (9), residential areas adjacent to other proposed locations could possibly experience light trespass from the high-mast light fixtures. These issues might be especially important in very environmentally sensitive locations such as Adirondack Park.These issues are summarized in Table 3, which could in the future serve as a prototype warranting procedure for determining the potential benefit of high-mast lighting for nighttime work zones. Obviously, the list of considerations in Table 3 is incomplete and would require further analysis of system performance at a number of additional locations, but the general approach could readily be modified to incorporate new criteria and considerations. As a very preliminary example, a negative score would not be considered for this lighting approach, whereas a score of +4 or higher would strongly be considered for this approach. Scores between 0 and +4 would require a more extensive analysis before the high-mast approach could be ruled in or out.Transportation agencies are encouraged to continue to study the potential benefits of the high-mast lighting approach, including collection of safety data, as well as economic costs and the performance of the lighting in terms of mitigating glare and shadows for workers and drivers.ACKNOWLEDGMENTSThis work was supported by the New York State Department of Transportation under the direction of David Clements and Rochelle Hosley. The authors thankfully acknowledge Dominick DellaRoco with Lancaster Development Inc. for providing valuable information and details about the project, and Jerome Fynaardt and Nick Smith with MUSCO Lighting for providing information about the lighting installation. James E. Bryden of Delmar, NY shared his experience on roadway construction. Christopher Gribbin, John Van Derlofske, Michele McColgan, Nicholas Skinner, Dennis Guyon and Jennifer Taylor with Rensselaer's Lighting Research Center provided valuable input and technical contributions.REFERENCES1. Freyssinier, J. P., J. D. Bullough, and M. S. Rea. Documentation of Semi-Permanent High-Mast Lighting for Construction. Publication C-05-06. New York State Department of Transportation, Albany, N.Y., 2006.2. Freyssinier, J. P., J. D. Bullough, and M. S. Rea. Performance Evaluation of Semi-Permanent High-MastLighting for Highway Construction Projects. Presented at 87th Annual Meeting of the Transportation Research Board, Washington, D.C., 2008.3. Ellis, R. D., S. Amos, and A. Kumar. Illumination Guidelines for Nighttime Highway Work. Publication NCHRP 498. National Cooperative Highway Research Program, Transportation Research Board, Washington, D.C., 2003.4. American Association of State Highway and Transportation Officials. A Policy on Geometric Design of Highways and Streets. American Association of State Highway and Transportation Officials, Washington, D.C., 2004.5. U.S. Environmental Protection Agency. Information on Levels of Environmental Noise Requisite to Protect Public Health and Welfare with an Adequate Margin of Safety. Publication 550/9-74-004. U.S. Environmental Protection Agency, Washington, D.C., 1974.6. Occupational Safety and Health Administration. OSHA Fact Sheet: Carbon Monoxide Poisoning. Occupational Safety and Health Administration, Washington,D.C., 2002.7. Rea, M. S. (editor). IESNA Lighting Handbook, 9th edition. Illuminating Engineering Society of North America, New York, N.Y., 2000.8. Woodruff, C. New Light System Paves Way to Safe, Faster I-90 Roadwork. Albany Times Union, May 28, 2006, p. D4.9. Woodruff, C. Lighting the Way for Thruway Workers. Albany Times Union, April 23, 2005, p. B1.译文摘要本文论述了在纽约的奥尔巴尼沿90号州际公路，为为了夜间道路工程的建造和维修，在半永久、高桅杆、电线杆上安装照明。
英语技术写作试题及答案
英语技术写作试题及答案一、选择题（每题2分，共20分）1. The term "API" stands for:A. Application Programming InterfaceB. Artificially Programmed IntelligenceC. Advanced Programming InterfaceD. Automated Programming Interface答案：A2. Which of the following is not a common data type in programming?A. IntegerB. StringC. BooleanD. Vector答案：D3. In technical writing, what is the purpose of using the term "shall"?A. To indicate a requirement or obligationB. To suggest a recommendationC. To express a possibilityD. To denote a future action答案：A4. What does the acronym "GUI" refer to in the context of computing?A. Graphical User InterfaceB. Global User InterfaceC. Generalized User InterfaceD. Graphical Unified Interface答案：A5. Which of the following is a correct statement regarding version control in software development?A. It is used to track changes in software over time.B. It is a type of software testing.C. It is a method for encrypting code.D. It is a way to compile code.答案：A6. What is the primary function of a compiler in programming?A. To debug codeB. To execute codeC. To translate code from one language to anotherD. To optimize code for performance答案：C7. In technical documentation, what does "RTFM" commonly stand for?A. Read The Frequently Asked QuestionsB. Read The Full ManualC. Read The File ManuallyD. Read The Final Message答案：B8. Which of the following is a common method for organizing code in a modular fashion?A. LoopingB. RecursionC. EncapsulationD. Inheritance答案：C9. What is the purpose of a "pseudocode" in programming?A. To provide a detailed step-by-step guide for executing codeB. To serve as a preliminary version of code before actual codingC. To act as an encryption for the codeD. To be used as a substitute for actual code in production答案：B10. What does "DRY" stand for in software development?A. Don't Repeat YourselfB. Data Retrieval YieldC. Database Record YieldD. Dynamic Resource Yield答案：A二、填空题（每空2分，共20分）1. The process of converting a high-level code into machine code is known as _______.答案：compilation2. In programming, a _______ is a sequence of characters that is treated as a single unit.答案：string3. The _______ pattern in object-oriented programming is a way to allow a class to be used as a blueprint for creating objects.答案：prototype4. A _______ is a type of software development methodology that emphasizes iterative development.答案：agile5. The _______ is a set of rules that defines how data is formatted, transmitted, and received between software applications.答案：protocol6. In technical writing, the term "should" is used toindicate a _______.答案：recommendation7. The _______ is a type of software that is designed to prevent, detect, and remove malicious software.答案：antivirus8. A _______ is a variable that is declared outside the function and hence belongs to the global scope.答案：global variable9. The _______ is a programming construct that allows you to execute a block of code repeatedly.答案：loop10. In software development, the term "branch" in version control refers to a _______.答案：separate line of development三、简答题（每题10分，共40分）1. Explain the difference between a "bug" and a "feature" in software development.答案：A "bug" is an unintended behavior or error in a software program that causes it to behave incorrectly or crash. A "feature," on the other hand, is a planned and intentional part of the software that provides some functionality or capability to the user.2. What is the significance of documentation in technical writing?答案：Documentation in technical writing is significant as it serves to provide detailed information about a product or system, making it easier for users, developers, and other stakeholders to understand its workings, usage, and maintenance. It is crucial for training, troubleshooting, and future development.3. Describe the role of a software architect in a software development project。
基于STC12C5A60S2单片机的光立方设计
基于STC12C5A60S2单片机的光立方设计AbstractThe objective of this paper is to design and implement a Light Cube using STC12C5A60S2 microcontroller. The Light Cube is a three-dimensional display that can display images and patterns in mid-air without the need for any physical screen or surface. The designed Light Cube consists of a microcontroller, LEDs, power supply, and other supporting components. The microcontroller is programmed to control the LEDs and display the patterns in mid-air. The Light Cube is compact, portable and can be easily controlled using a smartphone app. The results of the experiment show that the Light Cube is capable of displaying various patterns and images in a 3D format, making it an ideal device for advertising, entertainment and display purposes.IntroductionThree-dimensional displays have been a popular topic of research in recent years due to their unique ability to create virtual images and objects in mid-air without the need for any physical screen or surface. One such type of three-dimensional display is the Light Cube. A Light Cube consists of a three-dimensional array of LEDs that can be programmedto display various patterns and images in mid-air. The Light Cube is an ideal device for advertising, entertainment, and display purposes due to its ability to create stunning 3D effects.In this paper, we present the design and implementation of a compact and portable Light Cube using STC12C5A60S2microcontroller. The design of the Light Cube includes the use of LEDs, power supply, and other supporting components. The microcontroller is programmed to control the LEDs and display various patterns and images in mid-air. The Light Cube is easy to control and can be operated using a smartphone app.Design and ImplementationThe design of the Light Cube involves the use of athree-dimensional array of LEDs. The LEDs are arranged in a cube shape and connected to the STC12C5A60S2 microcontroller. The design also includes a power supply, voltage regulators, and other supporting components.The microcontroller used in the design is STC12C5A60S2, which is a powerful 8-bit microcontroller with high-speed processing capability. The microcontroller is programmed using the C language to control the LEDs and display various patterns and images in mid-air. The programming also includes the use of algorithms to create 3D effects.The power supply for the Light Cube is designed using a step-down voltage regulator that converts the input voltage to a lower voltage level suitable for driving the LEDs. The voltage regulator also includes protection circuits toprotect the LEDs and the microcontroller from power surges and other electrical faults.The Light Cube design also includes a Bluetooth module that allows it to be controlled using a smartphone app. The app can be downloaded from the app store and installed on any smartphone. The app allows the user to select and display various patterns and images on the Light Cube.Results and DiscussionThe Light Cube designed and implemented in this paperwas tested and shown to be able to display various patterns and images in mid-air. The patterns and images were displayed in a 3D format, creating stunning visual effects. The Light Cube was also able to be easily controlled using a smartphone app, making it an ideal device for advertising, entertainment and display purposes.ConclusionIn this paper, we have presented the design and implementation of a compact and portable Light Cube using STC12C5A60S2 microcontroller. The Light Cube is a three-dimensional display that can display images and patterns in mid-air without the need for any physical screen or surface. The Light Cube is easy to control and can be operated using a smartphone app. The Light Cube is ideal for advertising, entertainment, and display purposes due to its ability to create stunning 3D effects.。
Authent-eCard is an implementation of business rul
专利名称：Authent-eCard is an implementation ofbusiness rules and a rules engine on aportable data device, point-of-sale interfaceand internet portal to apply predefinedrules to the automated approval of financialtransactions发明人：Philip Joseph Benton King申请号：US10140781申请日：20020507公开号：US20030212629A1公开日：20031113专利内容由知识产权出版社提供专利附图：摘要：Authent-eCard employs business rules, a business rule engine on a portable data device and an Internet portal to allow for automated, predefined controls on financial transactions. These business rules are the codification of policies and procedures for which the card-holder may obtain goods and services. By combining the portable data device, merchant or service provider interface, and portal, the rules may be dynamically applied and employ complex historical data logic for frequency and asset associated data. This pre-purchase verification and authorization of purchases replaces post-purchase audits, systems, and expense analysis as financial spending controls.申请人：KING PHILIP JOSEPH BENTON更多信息请下载全文后查看。
数字人文视域下多模态红色记忆资源知识聚合与开发
学术园地数字人文视域下多模态红色记忆资源知识聚合与开发*李姗姗 罗梦涵 崔 璐（西北大学公共管理学院，陕西西安，710127）摘 要：文章在梳理与分析红色记忆资源多模态特性与开发现状的基础上，构建由资源层、数据层、知识层、价值层组成的多模态红色记忆资源知识聚合与开发模式。
进而以宝塔山革命旧址为实证研究对象，提出由多元化采集和建构红色记忆资源、细粒度描述和整合红色记忆数据、多模态聚合和开发红色记忆知识到情境化转化与重构红色记忆价值的渐进式实现路径，同时建议在意识形态把控、协同开发机制、知识开发尺度、保护与开发博弈等方面做好保障工作。
关键词：红色记忆资源；知识聚合；数字人文分类号：D642Knowledge Aggregation and Development of Multi-modal Red Memory Resourcesfrom the Perspective of Digital HumanitiesLi Shanshan, Luo Menghan, Cui Lu( School of Public Administration of Northwest University, Xi'an, Shaanxi 710127 )Abstract: On the basis of sorting out and analyzing the multi-modal characteristics of red memory resources and the current situation of its development, this paper constructs a knowledge aggregation and development model of multi-modal red memory resources, including resource layer, data layer, knowledge layer and value layer. And then, taking the site of the Pogoda Hill Revolution as an empirical research object, this paper puts forward the progressive implementation path from diversified collection and construction of red memory resources, fine-grained description and integration of red memory data, multimodal aggregation, development of red memory knowledge to situational conversion and reconstruction of red memory value. At the same time, it is suggested to safeguard the work in ideological control, collaborative development mechanism, knowledge development scale, protection and development game and other aspects.Keywords: Red Memory Resources; Knowledge Aggregation; Digital Humanities1 引 言红色记忆资源是指红色革命活动留下的足迹、事迹、实物及其所展现的精神遗存，［1］承载着特定革命历史时期的物质与精神积淀，蕴含着深层次的红色基因与红色血脉。
implementation-defined behavior 编程 -回复
implementation-defined behavior 编程-回复Implementation-defined behavior refers to the behavior exhibited by a program when specific details, such as those related to data representation, are not defined by the programming language's standard. This means that different implementations of the same programming language may exhibit different behavior in certain situations. In this article, we will explore the concept of implementation-defined behavior and understand how it can impact the development and execution of computer programs.At its core, implementation-defined behavior arises due to the fact that programming languages are designed to be portable across different hardware and software platforms. To achieve this level of portability, programming language standards specify abstract rules and behaviors that need to be followed by the implementations of these languages.However, some aspects of a program's behavior are not explicitly defined in the language standard to allow for flexibility in implementation. For example, the size of data types, the representation of floating-point numbers, and the order of evaluation of expressions can vary across differentimplementations. This means that the behavior exhibited by a program in these cases is left to be determined by the implementation.Let's take a closer look at a few examples to understand how implementation-defined behavior can affect the outcome of a program. Consider the case of integer overflow. In most programming languages, the behavior of overflowing an integer value is implementation-defined. It means that the result of an arithmetic operation that overflows the range of the integer type is not defined by the language standard. Therefore, different implementations might exhibit different behaviors when encountering an integer overflow.Another example of implementation-defined behavior is the order of evaluation of function arguments. In some programming languages, the order in which the arguments of a function are evaluated is not specified by the language standard. This can lead to different results depending on the order in which the arguments are evaluated. Therefore, relying on the order of evaluation can introduce subtle bugs that may be difficult to identify.To deal with implementation-defined behavior, programmers need to be aware of the potential variations and ambiguities. It is important to carefully read the language specification and the documentation of the specific implementation being used. This will help understand the behavior of certain language constructs and avoid relying on implementation-specific behavior.Furthermore, it is essential to write portable code that does not rely on implementation-defined behavior. By avoiding language features or constructs that have implementation-defined behavior, programmers can ensure that their code behaves consistently across different platforms and implementations. This approach helps to reduce the risk of unexpected and unpredictable behavior.In some cases, programmers may intentionally rely on implementation-defined behavior to achieve specific performance optimizations or to interact with the underlying hardware. However, this approach should be used with caution, as it can make the code less portable and more prone to bugs in different environments.As a programmer, it is crucial to understand the concept of implementation-defined behavior and its implications. By beingaware of the potential variations and ambiguities, developers can write more robust and portable code. It is important to rely on language features that are well-defined by the language standard and to avoid using constructs that have implementation-defined behavior.Ultimately, by following best practices and writing code that is mindful of implementation-defined behavior, programmers can enhance the reliability and portability of their software.。
决奈达隆片说明书
计算机专业英语复习题
计算机专业英语复习题LT1.判断题（）1. Operating system first appeared during the third computer generation.（）2. Unlike the other buses, the address bus always receives data from the CPU;the CPU never reads the address bus.（）3. The main operations of set algebra are complementation, union and intersection.（）4. If an empty stack is popped, we say the stack overflows, which is normally an error.（）5. The CPU can be shared in a sequential manner only.（）6. Freeware is free software with no restriction.（）7. When writing data to memory, the CPU first outputs the data onto the data bus, then outputs the address onto the address bus.（）8．The FORTRAN programming language was developed during the first computer generation.（）9．A stack is a dynamic set that obeys the FIFO property.（）10．Two popular strategies for resource allocation are static allocation and dynamic allocation.（）11．The CPU can be shared in a sequential manner only.（）12. A program written in the assembly language of one microprocessor can run on a computer that has a different microprocessor.（）13. Object-oriented programming(OOP) is a programming language model organized around “objects” rather than “actions” and data rather than logic.（）14. FORTRAN is a particularly good language for processing numerical data, but it does not lend itself very well to organizing large programs.（）15. C++ and Smalltalk are two of the more popular object-oriented programming language.2.词汇Vacuum tube 真空管general purpose 通用transistor 晶体管LSI（Large Scale Integrated Circuit）：大规模集成电路VLSI(Very Large Scale Integrated Circuit）：超大规模集成电路Mainframe 大型机medium-sized computer 中型机minicomputer 小型机Microcomputer 小型机machine language 机器语言assembly language 汇编语言high-level language 高级语言Multiprogramming 多道程序设计virtual memory 虚拟存储time-share 分时Batch system 批处理系统interactive system 交互式系统Instruction cycle 指令周期Address bus, data bus, control busInternal register内部寄存器external register 外部寄存器flag register标志寄存器Instruction register 指令寄存器program counter程序计数器combinatorial logic组合逻辑3、选择（）1．Which one below is not a characteristic that we associate with a true computer today?A．electronic B．automatic C．stored-program D．general-purpose （）1．Which one below was the first machine whose design included all the characteristics of a computer.A．Z3 B．Mark I C．ENIAC D．EDV AC（）1．Which characteristic was not belong to ENIAC?________A．electronic B．general-purpose C．stored program D．capable of performing thousands of operations per second（）1．Which one below is the world’s first computer to become operational?_____A．EDSAC B．BINAC C．UNIV ACD．EDV AC（）1．Which one below is the first computer to operate in the United State?_____A．EDSAC B．BINAC C．UNIV AC D．EDV AC（）1．Which one below is the first commercially available computer?_____A．EDSAC B．BINAC C．UNIV AC D．EDV AC（）1．The _______ was the most popular first-generation computer.A．ENIAC B．EDSAC C．UNIV ACI D．IBM 650（）1．The first minicomputer became available in 1960, and its name was_______ .A．UNIV AC 1 B．IBM 360 C．PDP-1 D．PDP-8（）1．The most popular minicomputer in third generation was_______ .A．UNIV AC 1 B．IBM 360 C．PDP-1 D．PDP-8（）1．Which one below is not a feature of modern operating systems________.A．multiprogramming B．virtual memory C．compatibility D．time-sharing（）2．When writing data to memory, the CPU first outputs the______ onto the ____ bus, then outputs the ____ onto the _____ bus.A．address address data data B．data data address addressC．address data address data D．data address data address（）2．When the CPU fetches data from memory, it first outputs the memory ___on its _____ bus, then memory outputs the _____ onto the ____ bus.A．address address data data B．data data address addressC．address data address data D．data address data address（）2．The _______ bus consists of n lines, which combine to transmit one n-bit address value. -A．address B．data C．control D．system（）2．Which one below is not a register that belongs to the register section of a processor.A．program counter B．instruction register C．flash memory D．flag register（）5．Which one below is not a system provided resource?A．files B．CPU C．memory D．printer（）5．Which kind of resource can be shared in a concurrent manner?A．memory B．printer C．data files D．CPU（）5．Preemption of system resources is used by the OS to enforce __________in their use by programs.A．efficiency B．fairness C．speedD．utilization（）6．_________ enables the application software to interact with the computer.A．Middleware B．Operating system C．System software D．Shareware（）6．Which one below is not a key element of software engineering?A．methods B．designs C．tools D．procedures（）7．Which one below is not the benefit og object-oriented programming?A．inheritance B．data hiding C．reuse D．complex4．填空1、The characteristics that we associate with computers today are that the machine is electronic, that it has a stored program, and it is general purpose.1、the features of modern operating systems include multiprogramming, virtual memory, and time-sharing.2、When writing data to memory, the CPU first outputs the address onto the _________, then outputs the data onto the ___________.2、When the CPU fetches data from memory, it first outputs the memory address on its _____________, then memory outputs the data onto the _________________.2、The bus is a collection of individual control signals.2、The is the procedure a microprocessor goes through to process an instruction2、The signal is a signal on the control bus which the microprocessor asserts when it is ready to read data from memory or an I/O device.3、The ______ of any two sets (subsets of a given set) consist of those elements that are in one of the other or in both given sets.3、The _________of any two sets consists of those elements that are in one or the other or in both given sets; The _______of two sets consists of those elements that are in both given sets.4、The INSERT operation on a stack is often called ________, and the DELETE operation is often called _________.4、The INSERT operation on a queue is often called ________, and the DELETE operation is often called _________.5、OS functions can be classified into resource allocation and related functions, and user interface functions.5、Two popular strategies for resource allocation are: _____________________ and ______________________.5、Two ways of resource sharing are: ____________ _____________ and ______________________.6、Software is often divided into ____________software and ___________ software.6、The term_________ is used to describe programming that mediates between application and system software or between two different kinds of application software.6、_________ software controls the computer and enables it to run the __________ softwareand hardware.7、Lying between machine languages and high-level languages are _assembly languages_, which are directly related to a computer’s machine language.7、Object-oriented programming(OOP) is a programming language model organized around “” rather than “actions” and rather than logic.7、All high-level language programs must be translated into machine language so that the computer can understand it. There are two ways to do this: compile the program or the program.5．翻译1、A computer is an electronic device that can receive a set of instructions, or program, and then carry out this program by performing calculations on numerical data or by compiling and correlating other forms of information.1、As more and more transistors were put on silicon chips, it eventually became possible to put an entire computer processor, called a microprocessor, on a chip.随着越来越多的晶体管被集成到硅芯片上,将一整个计算机处理器（称为微处理器）放在一个芯片上终于成为可能。
针织题
2006–2007学年第二学期期终试题一、填空题（30%）1、平针、罗纹、双反面、双罗纹四种基本组织中，横向延伸性最好的是（）；纵向延伸性最好的是（）；能顺逆编织方向脱散的是（）。
2、针织物的基本单元是（），它由（）、（）组成。
3、在单面圆纬机上编织添纱衬垫时一般需要采用三路成圈系统，其顺序依次为（）（）、（）、（），并需要采用特殊的（）沉降片。
4、编织绕经组织组织一般需要（）系统（）系统和（）系统，其三系统可以编织（）横列。
5、在消极式给纱的针织机上，一般是通过调整（）来调节线圈长度的，而在积极式给纱的针织机上，一般是通过调整（）来调节线圈长度的。
6、菠萝锭络丝机一般适用于（）原料的卷装，其筒子形状为（）；而普通的络纱机一般适用于（）原料的卷装，其筒子形状为（）。
7、针织机的机号一旦确定，可以加工的纱线支数最粗与（）有关，最细与（）有关。
8、常用的收针方法有（）收针、（）收针和（）收针。
9、横机上若采用三级式嵌入式花色三角的原理进行选针编织，其舌针一般分为( )。
10、两块棉平针织物，若其纱支相同，则可用()指标来比较其稀密程度；若其纱支不同，则需采用( )指标来比较其稀密程度。
11、袜机上双向针三角座的作用是( )。
12、在圆纬机的牵拉机构中加装扩布装置的作用是( )。
13、采用沉降片双向运动技术的优点是( )。
14、要得到纬编绒类产品，可采用( )组织、( )组织和( )组织。
15、单面纬编针织物中，线圈圈柱覆盖于圈弧之上的一面称为( )，线圈圈弧覆盖于圈柱之上的一面称为( )。
二、问答题1、试比较罗纹组织和双反面组织在其组织结构、性能方面的特点，并指出其成圈机件配置上的不同点。
（10％）2、下图1所示是在舌针多三角机上编织单面纬平针组织时舌针运动轨迹。
试根据该轨迹图指出成圈各阶段分别对应于何处，并指出弯纱过程的特点。
（5％）图13、简述针织圆纬机与横机在编织部分及产品方面各有什么特点？（6％）4、如图2所示为某一单面织物的编织图。
operating system《操作系统》ch11-file system implementation-50
I/O Using a Unified Buffer Cache
11.32
11.7 Recovery
Consistency checking – compares data in directory structure with data blocks on disk, and tries to fix inconsistencies
Brings all pointers together into the index block. Logical view.
index table
11.20
Example of Indexed Allocation
11.21
Indexed Allocation (Cont.)
Need index table Random access Dynamic access without external fragmentation, but
Efficiency dependent on:
disk allocation and directory algorithms types of data kept in file’s directory entry
Performance
disk cache – separate section of main memory for frequently used blocks
File-allocation table (FAT) – disk-space allocation used by MS-DOS and OS/2.
11.17
Linked Allocation
11.18
File-Allocation Table
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7 Conclusions
7.1 General : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 37 7.2 This case : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 37
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6 Test Results
6.1 Point to point communication : : : : : : 6.2 Group communication : : : : : : : : : : 6.2.1 Multicast : : : : : : : : : : : : : 6.2.2 Vector-gather : : : : : : : : : : : 6.3 An application : : : : : : : : : : : : : : 6.3.1 The application : : : : : : : : : : 6.3.2 Timing results of the application
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The implementation of portable programming layers: a case study
F. van der Linden June 1994
Abstract
Parallel programming is an increasingly important method for solving large problems, and will grow even more important in the future. One of the main problems of parallel programming is the lack of a standard interface, that allows for easily portable code, on both homogeneous and heterogeneous systems. This paper describes the implementation of PVM 9], an important parallel programming interface, on top of Parix 17],the system as provided by Parsytec on their computer systems. The issues raised during this project will show us some of the general aspects of designing and implementing (MIMD) parallel programming interfaces on top of existing software layers.
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4 Design goals and issues
4.1 4.2 4.3 4.4
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4.5.1 4.5.2 4.6 Other 4.6.1
Processes : : : : : : : : : : : : : : : : : : : : : : : : : 18 Signals : : : : : : : : : : : : : : : : : : : : : : : : : : : 19 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 19 Referring to hosts : : : : : : : : : : : : : : : : : : : : : 19
39Leabharlann 21 Introduction
1.1 Parallel computations
Large scienti c computations have always been a major issue in computer science. Doing these computations on a single processor system, soon makes one reach the upper limits when it comes to speed. Parallel computation is a solution to this problem. By using multiple CPUs, working on parts of a computation, a signi cant speedup can be achieved. Several classes of problems are suitable for parallelization 8]. An important issue when parallelizing code, is how to decompose the problem, so that an optimal performance can be achieved. Having made the decisions on decomposition, one would like the implementation to be straightforward. However, many di erent multiprocessor systems exist, with equally many di erent programming interfaces. Additionally, networks of workstations have emerged as possible platforms for job scheduling 14, 18] and parallel computation.
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1.2 Programming layers
Re-implementing a parallel program, whenever it has to run on a di erent platform, is certainly not desirable. We would like to have a standardized programming interface (and environment) for parallel programming, which hides the underlying hardware and vendor speci c details. Ideally, such a system would also be usable across heterogeneous systems, i.e. systems using several di erent types of hardware to perform computations. 3
Contents
1 Introduction
1.1 Parallel computations : : : : : : : : 1.2 Programming layers : : : : : : : : : 1.2.1 OS/runtime support layer : 1.2.2 Portable programming layer 1.2.3 Application layer : : : : : :
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3 Parix
3.1 General Parix mechanisms : : : : : : : : : : : : : : : : : : : : 12 3.2 Parix communication : : : : : : : : : : : : : : : : : : : : : : : 12 Goals : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : Issues : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : The target machine and operating system : : : : : : : : : : : Communication : : : : : : : : : : : : : : : : : : : : : : : : : : 4.4.1 Semantics and necessary functionality for communication 4.4.2 Speed of point to point communication : : : : : : : : : 4.4.3 Other considerations : : : : : : : : : : : : : : : : : : : 4.4.4 The nal choice : : : : : : : : : : : : : : : : : : : : : : 4.5 Process handling : : : : : : : : : : : : : : : : : : : : : : : : : 1