EI1202NPCSL中文资料
EI1204NPCSS中文资料
Specifications are subject to change without notice (20.08.01)1Proximity Sensors Inductive Stainless Steel HousingTypes EI, DC, M12, M18, M30•Stainless steel housing, cylindrical •Diameter: M12, M18, M30•Short or long versions•Sensing distance: 2 to 15 mm •Power supply:10 to 40 VDC•Output:Transistor NPN/PNP , make or break switching •Protection: Short-circuit and reverse polarity •LED-indication for output ON •2 m cable or plug M12Product Descriptiondard stainless steel hou sing.Made after Eu ronorm EN 50008.Proximity switch in hou sings ranging from M12 to M30.Short or long versions in stan-Type Selection DC Types, Cable and M12 PlugHousing Body Connec-Rated Ordering no.Ordering no.Ordering no.Ordering no.diameter style tion operating Transistor NPN Transistor NPN Transistor PNP Transistor PNP dist. (S n )Make switching Break switching Make switching Break switching M12Short Cable 2 mm 1)EI 1202 NPOSS EI 1202 NPCSS EI 1202 PPOSS EI 1202 PPCSS M12Short Plug 2 mm 1)EI 1202 NPOSS-1EI 1202 NPCSS-1EI 1202 PPOSS-1EI 1202 PPCSS-1M12Long Cable 2 mm 1)EI 1202 NPOSL EI 1202 NPCSL EI 1202 PPOSL EI 1202 PPCSL M12Long Plug 2 mm 1)EI 1202 NPOSL-1EI 1202 NPCSL-1EI 1202 PPOSL-1EI 1202 PPCSL-1M12Short Cable 4 mm 2)EI 1204 NPOSS EI 1204 NPCSS EI 1204 PPOSS EI 1204 PPCSS M12Short Plug 4 mm 2)EI 1204 NPOSS-1EI 1204 NPCSS-1EI 1204 PPOSS-1EI 1204 PPCSS-1M12Long Cable 4 mm 2)EI 1204 NPOSL EI 1204 NPCSL EI 1204 PPOSL EI 1204 PPCSL M12Long Plug 4 mm 2)EI 1204 NPOSL-1EI 1204 NPCSL-1EI 1204 PPOSL-1EI 1204 PPCSL-1M18Short Cable 5 mm 1)EI 1805 NPOSS EI 1805 NPCSS EI 1805 PPOSS EI 1805 PPCSS M18Short Plug 5 mm 1)EI 1805 NPOSS-1EI 1805 NPCSS-1EI 1805 PPOSS-1EI 1805 PPCSS-1M18Long Cable 5 mm 1)EI 1805 NPOSL EI 1805 NPCSL EI 1805 PPOSL EI 1805 PPCSL M18Long Plug 5 mm 1)EI 1805 NPOSL-1EI 1805 NPCSL-1EI 1805 PPOSL-1EI 1805 PPCSL-1M18Short Cable 8 mm 2)EI 1808 NPOSS EI 1808 NPCSS EI 1808 PPOSS EI 1808 PPCSS M18Short Plug 8 mm 2)EI 1808 NPOSS-1EI 1808 NPCSS-1EI 1808 PPOSS-1EI 1808 PPCSS-1M18Long Cable 8 mm 2)EI 1808 NPOSL EI 1808 NPCSL EI 1808 PPOSL EI 1808 PPCSL M18Long Plug 8 mm 2)EI 1808 NPOSL-1EI 1808 NPCSL-1EI 1808 PPOSL-1EI 1808 PPCSL-1M30Short Cable 10 mm 1)EI 3010 NPOSS EI 3010 NPCSS EI 3010 PPOSS EI 3010 PPCSS M30Short Plug 10 mm 1)EI 3010 NPOSS-1EI 3010 NPCSS-1EI 3010 PPOSS-1EI 3010 PPCSS-1M30Long Cable 10 mm 1)EI 3010 NPOSL EI 3010 NPCSL EI 3010 PPOSL EI 3010 PPCSL M30Long Plug 10 mm 1)EI 3010 NPOSL-1EI 3010 NPCSL-1EI 3010 PPOSL-1EI 3010 PPCSL-1M30Short Cable 15 mm 2)EI 3015 NPOSS EI 3015 NPCSS EI 3015 PPOSS EI 3015 PPCSS M30Short Plug 15 mm 2)EI 3015 NPOSS-1EI 3015 NPCSS-1EI 3015 PPOSS-1EI 3015 PPCSS-1M30Long Cable 15 mm 2)EI 3015 NPOSL EI 3015 NPCSL EI 3015 PPOSL EI 3015 PPCSL M30LongPlug15 mm 2)EI 3015 NPOSL-1EI 3015 NPCSL-1EI 3015 PPOSL-1EI 3015 PPCSL-11)For flush mounting in metal Make switching = Normally Open (NO)2)For non-flush mounting in metal Break switching = Normally Closed (NC)EI, DC, M12, M18, M30SpecificationsDimensionsType A B C D E F G H I SW K LØ mm mm mm mm mm mm mm mm mmØ mmØ mm EI 1202 XPXSS M12 x 1 x 3010.73011 5.0417EI 1202 XPXSL M12 x 1 x 5010.75011 5.0417EI 1202 XPXSS-1M12 x 1 x 3010.73012.611.9417EI 1202 XPXSL-1M12 x 1 x 5010.75012.611.9417EI 1204 XPXSS M12 x 1 x 3010.73411 5.0417EI 1204 XPXSL M12 x 1 x 5010.75411 5.0417EI 1204 XPXSS-1M12 x 1 x 3010.73412.611.9417EI 1204 XPXSL-1M12 x 1 x 5010.75412.611.9417EI 1805 XPXSS M18 x 1 x 3016.73011.615.4424EI 1805 XPXSL M18 x 1 x 5016.75011.615.4424EI 1805 XPXSS-1M18 x 1 x 3016.73013.111.9424EI 1805 XPXSL-1M18 x 1 x 5016.75013.111.9424EI 1808 XPXSS M18 x 1 x 3016.73811.615.4424EI 1808 XPXSL M18 x 1 x 5016.75811.615.4424EI 1808 XPXSS-1M18 x 1 x 3016.73813.111.9424EI 1808 XPXSL-1M18 x 1 x 5016.75813.111.9424EI 3010 XPXSS M30 x 1.5 x 30283013.615.4536EI 3010 XPXSL M30 x 1.5 x 50285013.615.4536EI 3010 XPXSS-1M30 x 1.5 x 30283013.611.9536EI 3010 XPXSL-1M30 x 1.5 x 50285013.611.9536EI 3015 XPXSS M30 x 1.5 x 30284213.615.4536EI 3015 XPXSL M30 x 1.5 x 50286213.615.4536EI 3015 XPXSS-1M30 x 1.5 x 30284213.611.9536EI 3015 XPXSL-1M30 x 1.5 x 50286213.611.95362Specifications are subject to change without notice (20.08.01)Specifications are subject to change without notice (20.08.01)3Power SuppliesPower supplies VDC:> SS 130/140.Power supplies with amplifier relays:> SV 190.Dimensions (cont.)Wiring DiagramsInstallation HintsRelief of cable strainProtection of the sensing faceSwitch mounted on mobile carrierTo avoid interference from inductive voltage/current peaks, separate the prox. switch pow-er cables from any other power cables, e.g.motor, contactor or solenoid cablesIncorrectCorrectThe cable should not be pulledA proximity switch should not serve as mechanical stopAny repetitive flexing of the cable should be avoidedEI, DC, M12, M18, M30。
X1202资料
X12022-Wire™ RTC Real Time Clock/Calendar/Alarms/CPU SupervisorFEATURES•Selectable watchdog timer (0.25s, 0.75s, 1.75s, off)•Power on reset (250ms)•Programmable low voltage reset• 2 polled alarms—Settable on the second, minute, hour, day, month, or day of the week•2-wire interface interoperable with I2C—400kHz data transfer rate•Secondary power supply input with internal switch-over circuitry•Low power CMOS—<1µA operating current—<3mA active current during program—<400µA active current during data read •Single byte write capability•Typical nonvolatile write cycle time: 5ms•High reliability•Small package options—8-lead SOIC package, 8-lead TSSOP package DESCRIPTIONThe X1202 is a Real Time Clock with Clock/Calendar/ CPU Supervisor circuits and two polled alarms. The dual port clock and alarm registers allow the clock to oper-ate, without loss of accuracy, even during read and write operations.The clock/calendar provides functionality that is con-trollable and readable through a set of registers. The clock, using a low-cost 32.768kHz crystal input, accu-rately tracks the time in seconds, minutes, hours, date, day, month and years. It has leap year correction and automatic adjustment for months with less than 31 days.The X1202 provides a watchdog timer with 3 selectable time out periods and off. The watchdog activates a RESET pin when it expires. The reset also goes active when V CC drops below a fixed trip point. There are two alarms where a match is monitored by polling status bits. The device offers a backup power input pin. This V BACK pin allows the device to be backed up by a non-rechargeable battery. The RTC is fully operational from 1.8 to 5.5 volts.BLOCK DIAGRAMSCLSDA元器件交易网X1202PIN CONFIGURATIONPIN DESCRIPTIONSSerial Clock (SCL)The SCL input is used to clock all data into and out of the device. The input buffer on this pin is always active (not gated).Serial Data (SDA)SDA is a bidirectional pin used to transfer data into and out of the device. It has an open drain output and may be wire ORed with other open drain or open collector outputs. The input buffer is always active (not gated). An open drain output requires the use of a pull-up resistor. The output circuitry controls the fall time of the output signal with the use of a slope controlled pull-down. The circuit is designed for 400kHz 2-wire inter-face speeds.V BACKThis input provides a backup supply voltage to the device. V BACK supplies power to the device in the event the V CC supply fails.RESET Output—RESETThis is a reset signal output. This signal notifies a host processor that the watchdog time period has expired or that the supply voltage V CC has dropped below a fixed V TRIP threshold. It is an open drain active LOW output. X1, X2The X1 and X2 pins are the input and output,respectively, of an inverting amplifier that can be configured for use as an on-chip oscillator. A32.768kHz quartz crystal is used. Recommended crystalinput. The power control circuit will switch to V BACK when V CC < VBACK – 0.2V . It will switch back to V CC when V CC exceeds V BACK . Figure 2. Power ControlREAL TIME CLOCK OPERATIONThe Real Time Clock (RTC) uses an external,32.768kHz quartz crystal to maintain an accurate inter-nal representation of the year, month, day, date, hour,minute, and seconds. The RTC has leap-year correc-tion and century byte. The clock also corrects for months having fewer than 31 days and has a bit that controls 24-hour or AM/PM format. When the X1202powers up after the loss of both V CC and V BACK , the clock will not increment until at least one byte is written to the clock register.Reading the Real Time ClockThe RTC is read by initiating a Read command and specifying the address corresponding to the register of the real time clock. The RTC Registers can then be read in a Sequential Read Mode. Since the clock runs continuously and a read takes a finite amount of time,there is the possibility that the clock could change dur-ing the course of a read operation. In this device, the元器件交易网X1202time is latched by the read command (falling edge of the clock on the ACK bit prior to RTC data output) into a separate latch to avoid time changes during the read operation. The clock continues to run. Alarms occurring during a read are unaffected by the read operation. Writing to the Real Time ClockThe time and date may be set by writing to the RTC registers. T o avoid changing the current time by an uncompleted write operation, the current time value is loaded into a separate buffer at the falling edge of the clock on the ACK bit before the RTC data input bytes, the clock continues to run. The new serial input data replaces the values in the buffer. This new RTC value is loaded back into the RTC register by a stop bit at the end of a valid write sequence. An invalid write opera-tion aborts the time update procedure and the contents of the buffer are discarded. After a valid write operation the RTC will reflect the newly loaded data beginning with the first “one second” clock cycle after the stop bit. The RTC continues to update the time while an RTC register write is in progress and the RTC continues to run during any nonvolatile write sequences. A single byte may be written to the RTC without affecting the other bytes.CLOCK/CONTROL REGISTERS (CCR)The Control/Clock Registers are located in an area separate from the EEPROM array and are only acces-sible following a slave byte of “1101111x” and reads or writes to addresses [0000h:003Fh].CCR AccessThe contents of the CCR can be modified by perform-ing a byte or a page write operation directly to any address in the CCR. Prior to writing to the CCR (except the status register), however, the WE L and RWEL bits must be set using a two step process (See section “Writing to the Clock/Control Registers.”)The CCR is divided into 5 sections. These are:1. Alarm 0 (8 bytes)2. Alarm 1 (8 bytes)3. Control (1 byte)4. Real Time Clock (8 bytes)5. Status (1 byte)Sections 1) through 3) are nonvolatile and Sections 4) and 5) are volatile. E ach register is read and written through buffers. The nonvolatile portion (or the counter portion of the RTC) is updated only if RWEL is set and only after a valid write operation and stop bit. A sequential read or page write operation provides access to the contents of only one section of the CCR per operation. Access to another section requires a new operation. Continued reads or writes, once reach-ing the end of a section, will wrap around to the start of the section. A read or page write can begin at any address in the CCR.Section 5) is a volatile register. It is not necessary to set the RWE L bit prior to writing the status register. Section 5) supports a single byte read or write only. Continued reads or writes from this section terminates the operation.The state of the CCR can be read by performing a ran-dom read at any address in the CCR at any time. This returns the contents of that register location. Additional registers are read by performing a sequential read. The read instruction latches all clock registers into a buffer, so an update of the clock does not change the time being read. At the end of a read, the master supplies a stop condition to end the operation and free the bus. After a read of the CCR, the address remains at the previous address +1 so the user can execute a current address read of the CCR and continue reading the next Register.ALARM REGISTERSThere are two alarm registers whose contents mimic the contents of the RTC register, but add enable bits and exclude the 24-hour time selection bit. The enable bits specify which registers to use in the comparison between the Alarm and real time registers. For example:–The user can set the X1202 to alarm every Wednes-day at 8:00AM by setting the EDWn, the EHRn and EMNn enable bits to ‘1’ and setting the DWAn, HRAn and MNAn Alarm registers to 8:00AM Wednesday.–A daily alarm for 9:30PM results when the EHRn and EMNn enable bits are set to ‘1’ and the HRAn and MNAn registers set 9:30PM.–Setting the EMOn bit in combination with other enable bits and a specific alarm time, the user can establish an alarm that triggers at the same time once a year.When there is a match, an alarm flag is set. The occur-rence of an alarm can only be determined by polling the AL0 and AL1 bits.The alarm enable bits are located in the MSB of the particular register. When all enable bits are set to ‘0’, there are no alarms.元器件交易网X1202Table 1. Clock/Control Memory MapAddr.TypeRegNameBitRangeFactorySetting 76543210(optional)003F Status SR BAT AL1AL000RWEL WEL RTCF01h0037RTC(SRAM)Y2K00Y2K21Y2K20Y2K1300Y2K1019/2020h0036DW00000DY2DY1DY00-600h 0035YR Y23Y22Y21Y20Y13Y12Y11Y100-9900h 0034MO000G20G13G12G11G101-1200h 0033DT00D21D20D13D12D11D101-3100h 0032HR MIL0H21H20H13H12H11H100-2300h 0031MN0M22M21M20M13M12M11M100-5900h 0030SC0S22S21S20S13S12S11S100-5900h 0010Control(EEPROM)BL000WD1WD000000h000F Alarm1(EEPROM)Y2K000A1Y2K21A1Y2K20A1Y2K1300A1Y2K1019/2020h000E DWA0EDW10000DY2DY1DY00-600h 000D YRA0Unused - Default = RTC Year value000C MOA0EMO100A1G20A1G13A1G12A1G11A1G101-1200h 000B DTA0EDT10A1D21A1D20A1D13A1D12A1D11A1D101-3100h 000A HRA0EHR10A1H21A1H20A1H13A1H12A1H11A1H100-2300h 0009MNA0EMN1A1M22A1M21A1M20A1M13A1M12A1M11A1M100-5900h 0008SCA0ESC1A1S22A1S21A1S20A1S13A1S12A1S11A1S100-5900h0007Alarm0(EEPROM)Y2K100A0Y2K21A0Y2K20A0Y2K1300A0Y2K1019/2020h0006DWA1EDW00000DY2DY1DY00-600h 0005YRA1Unused - Default = RTC Year value0004MOA1EMO000A0G20A0G13A0G12A0G11A0G101-1200h 0003DTA1EDT00A0D21A0D20A0D13A0D12A0D11A0D101-3100h 0002HRA1EHR00A0H21A0H20A0H13A0H12A0H11A0H100-2300h 0001MNA1EMN0A0M22A0M21A0M20A0M13A0M12A0M11A0M100-5900h 0000SCA1ESC0A0S22A0S21A0S20A0S13A0S12A0S11A0S100-5900hREAL TIME CLOCK REGISTERSYear 2000 (Y2K)The X1202 has a century byte that “rolls over” from 19 to 20 when the years byte changes from 99 to 00. The Y2K byte can contain only the values of 19 or 20.Day of the Week Register (DW)This register provides a Day of the Week status and uses three bits DY2 to DY0 to represent the seven days of the week. The counter advances in the cycle 0-1-2-3-4-5-6-0-1-2-... The assignment of a numerical value to a specific day of the week is arbitrary and may be decided by the system software designer. The Clock Default values define 0 = Sunday.元器件交易网X1202Clock/Calendar Register (YR, MO, DT, HR, MN, SC) These registers depict BCD representations of the time. As such, SC (Seconds) and MN (Minutes) range from 0 to 59, HR (Hour) is 1 to 12 with an AM or PM indicator (H21 bit) or 0 to 23 (with MIL = 1), DT (Date) is 1 to 31, MO (Month) is 1 to 12, YR (Y ear) is 0 to 99.24 Hour TimeIf the MIL bit of the HR register is 1, the RTC uses a 24-hour format. If the MIL bit is 0, the RTC uses a 12-hour format and bit H21 functions as an AM/PM indica-tor with a ‘1’ representing PM. The clock defaults to Standard Time with H21 = 0.Leap YearsLeap years add the day February 29 and are defined as those years that are divisible by 4. Y ears divisible by 100 are not leap years, unless they are also divisible by 400. This means that the year 2000 is a leap year, the year 2100 is not. The X1202 does not correct for the leap year in the year 2100.STATUS REGISTER (SR)The Status Register is located in the RTC area at address 003Fh. This is a volatile register only and is used to control the WE L and RWE L write enable latches, read two power status and two alarm bits. This register is separate from both the array and the Clock/ Control Registers (CCR).Table 2. Status Register (SR)BAT: Battery Supply—VolatileThis bit set to “1” indicates that the device is operating from V BACK, not V CC. It is a read only bit and is set/ reset by hardware.AL1, AL0: Alarm bits—VolatileThese bits announce if either alarm 1 or alarm 2 match the real time clock. If there is a match, the respective bit is set to ‘1’. The falling edge of the last data bit in a SR Read operation resets the flags. Note: Only the AL bits that are set when an SR read starts will be reset. An alarm bit that is set by an alarm occurring during an SR read operation will remain set after the read operation is complete.RWEL: Register Write Enable Latch—VolatileThis bit is a volatile latch that powers up in the LOW (disabled) state. The RWEL bit must be set to “1” prior to any writes to the Clock/Control Registers. Writes to RWEL bit do not cause a nonvolatile write cycle, so the device is ready for the next operation immediately after the stop condition. A write to the CCR requires both the RWE L and WE L bits to be set in a specific sequence. RWEL bit is reset after each high voltage or reset by sending 00h to status register.WEL: Write Enable Latch—VolatileThe WEL bit controls the access to the CCR and mem-ory array during a write operation. This bit is a volatile latch that powers up in the LOW (disabled) state. While the WE L bit is LOW, writes to the CCR or any array address will be ignored (no acknowledge will be issued after the Data Byte). The WEL bit is set by writing a “1”to the WEL bit and zeroes to the other bits of the Status Register. Once set, WEL remains set until either reset to “0” (by writing a “0” to the WEL bit and zeroes to the other bits of the Status Register) or until the part pow-ers up again. Writes to WEL bit do not cause a nonvol-atile write cycle, so the device is ready for the next operation immediately after the stop condition.RTCF: Real Time Clock Fail Bit—VolatileThis bit is set to a ‘1’ after a total power failure. This is a read only bit that is set by hardware when the device powers up after having lost all power to the device. The bit is set regardless of whether V CC or V BACK is applied first. The loss of one or the other supplies does not result in setting the RTCF bit. The first valid write to the RTC (writing one byte is sufficient) resets the RTCF bit to ‘0’.Unused BitsThese devices do not use bits 3 or 4, but must have a zero in these bit positions. The Data Byte output during a SR read will contain zeros in these bit locations.CONTROL REGISTERWatchdog Timer Control BitsThe bits WD1 and WD0 control the period of the Watchdog Timer. See T able 3 for options.Addr76543210003Fh BAT AL1AL000RWEL WEL RTCFDefault00000001元器件交易网X1202Table 3. Watchdog Timer Time Out OptionsWRITING TO THE CLOCK/CONTROL REGISTERS Changing any of the nonvolatile bits of the clock/control register requires the following steps:–Write a 02H to the status register to set the Write Enable Latch (WEL). This is a volatile operation, so there is no delay after the write. (Operation pre-ceeded by a start and ended with a stop).–Write a 06H to the status register to set both the Register Write Enable Latch (RWEL) and the WEL bit. This is also a volatile cycle. The zeros in the data byte are required. (Operation preceeded by a start and ended with a stop).–Write one to 8 bytes to the clock/control registers with the desired clock, alarm, or control data. This sequence starts with a start bit, requires a slave byte of “11011110” and an address within the CCR and is terminated by a stop bit. A write to the CCR changes EEPROM values so these initiate a nonvolatile write cycle and will take up to 10ms to complete. Writes to undefined areas have no effect. The RWEL bit is reset by the completion of a nonvolatile write cycle, so the sequence must be repeated to again initiate another change to the CCR contents. If the sequence is not completed for any reason (by sending an incorrect number of bits or sending a start instead of a stop, for example) the RWEL bit is not reset and the device remains in an active mode.–The RWEL and WEL bits can be reset by writing a 0 to the status register.–A read operation occurring between any of the previous operations will not interrupt the register write operation. POWER ON RESETApplication of power to the X1202 activates a power on reset circuit that pulls the RESET pin active. This signal provides several benefits.–It prevents the system microprocessor from starting to operate with insufficient voltage.–It prevents the processor from operating prior to sta-bilization of the oscillator.–It allows time for an FPGA to download its configura-tion prior to initialization of the circuit.When V CC exceeds the device V TRIP threshold value for 250ms the circuit releases RE SE T, allowing the system to begin operation.WATCHDOG TIMER OPERATIONThe watchdog timer is selectable. By writing a value to WD1 and WD0, the watchdog timer can be set to 3 dif-ferent time out periods or off. When the watchdog timer is set to off, the watchdog circuit is configured for low power operation.Watchdog Timer RestartThe Watchdog Timer is restarted by a falling edge of SDA when the SCL line is high. This is also referred to as start condition. The restart signal restarts the watch-dog timer counter, resetting the period of the counter back to the maximum. If another start fails to be detected prior to the watchdog timer expiration, then the RE SE T pin becomes active. In the event that the restart signal occurs during a reset time out period, the restart will have no effect.LOW VOLTAGE RESET OPERATIONWhen a power failure occurs, and the voltage to the part drops below a fixed V TRIP voltage, a reset pulse is issued to the host microcontroller. The circuitry monitors the V CC line with a voltage comparator which senses a preset threshold voltage. Power up and power down waveforms are shown in Figure 4. The low voltage reset circuit is to be designed so the RE SE T signal is valid down to 1.0V.When the low voltage reset signal is active, the operation of any in-progress nonvolatile write cycle is unaffected, allowing a nonvolatile write to continue as long as possi-ble (down to the power on reset voltage). The low voltage reset signal, when active, terminates in-progress commu-nications to the device and prevents new commands, to reduce the likelihood of data corruption.WD1WD0Watchdog Time Out Period00 1.75 seconds01750 milliseconds10250 milliseconds11disabled元器件交易网X1202Figure 3. Watchdog Restart/Time OutFigure 4. Power On Reset and Low Voltage ResetV CC THRESHOLD RESET PROCEDUREThe X1202 is shipped with a standard V CC threshold (V TRIP) voltage. This value will not change over normal operating and storage conditions. However, in applica-tions where the standard V TRIP is not exactly right, or if higher precision is needed in the V TRIP value, the X1202 threshold may be adjusted. The procedure is described below, and uses the application of a nonvolatile write control signal.Setting the V TRIP VoltageThis procedure is used to set the V TRIP to a higher voltage value. It is necessary to reset the trip point before setting the new value.T o set the new V TRIP voltage, apply the desired V TRIP threshold voltage to the V CC pin and tie the RE SE T pad pin to the programming voltage V P. Then write data 00h to address 01h. The stop bit following a valid write operation initiates the V TRIP programming sequence. Bring RESET to V CC to complete the operation. Note: This operation also writes 00h to address 01h of the EEPROM array.元器件交易网Figure 5. Set V TRIP Level Sequence (V CC = desired V TRIP value)Resetting the V TRIP VoltageThis procedure is used to set the V TRIP to a “native”voltage level. For example, if the current V TRIP is 4.4V and the new V TRIP must be 4.0V , then the V TRIP must be reset. When V TRIP is reset, the new V TRIP is less than 1.7V . This procedure must be used to set the volt-age to a lower value.T o reset the new V TRIP voltage, apply more than 3V to the V CC pin and tie the RESET pin to the programming voltage V P . Then write 00h to address 03h. The stop bit of a valid write operation initiates the V TRIP programming sequence. Bring RESET to complete the operation. Note: This operation also writes 00h to address 03h of the EEPROM array.Figure 6. Reset V TRIP Level Sequence (V CC > 3V)Figure 7. Sample V TRIP Reset Circuit01234567SCLSDAAEh0123456703hRESET V P = 15V00h012345670123456700hV CCV CCSERIAL COMMUNICATIONInterface ConventionsThe device supports a bidirectional bus oriented proto-col. The protocol defines any device that sends data onto the bus as a transmitter, and the receiving device as the receiver. The device controlling the transfer is called the master and the device being controlled is called the slave. The master always initiates data transfers, and provides the clock for both transmit and receive operations. Therefore, the devices in this family operate as slaves in all applications.Clock and DataData states on the SDA line can change only during SCL LOW. SDA state changes during SCL HIGH are reserved for indicating start and stop conditions. See Figure 8.Figure 8. Valid Data Changes on the SDA BusStart ConditionAll commands are preceded by the start condition, which is a HIGH to LOW transition of SDA when SCL is HIGH. The device continuously monitors the SDA and SCL lines for the start condition and will not respond to any command until this condition has been met. See Figure 9.Stop ConditionAll communications must be terminated by a stop con-dition, which is a LOW to HIGH transition of SDA when SCL is HIGH. The stop condition is also used to place the device into the Standby power mode after a read sequence. A stop condition can only be issued after the transmitting device has released the bus. See Figure 8. AcknowledgeAcknowledge is a software convention used to indicate successful data transfer. The transmitting device, either master or slave, will release the bus after transmitting eight bits. During the ninth clock cycle, the receiver will pull the SDA line LOW to acknowledge that it received the eight bits of data. Refer to Figure 10.Figure 9. Valid Start and Stop ConditionsFigure 10. Acknowledge Response From ReceiverThe device will respond with an acknowledge after rec-ognition of a start condition and if the correct device identifier and select bits are contained in the slave address byte. If a write operation is selected, the device will respond with an acknowledge after the receipt of each subsequent eight bit word. The device will acknowledge all incoming data and address bytes, except for:–The slave address byte when the device identifier and/or select bits are incorrect–All data bytes of a write when the WEL in the write protect register is LOW–The 2nd data byte of a status register write operation (only 1 data byte is allowed)In the read mode, the device will transmit eight bits of data, release the SDA line, then monitor the line for an acknowledge. If an acknowledge is detected and no stop condition is generated by the master, the device will continue to transmit data. The device will terminate further data transmissions if an acknowledge is not detected. The master must then issue a stop condition to return the device to standby mode and place the device into a known state.WRITE OPERATIONSByte WriteFor a byte write operation, the device requires the slave address byte and the CCR address bytes. This gives the master access to any one of the words in the CCR. (Note: Prior to writing to the CCR, the master must write a 02h, then 06h to the status register in two preceeding operations to enable the write operation. See “Writing to the Clock/Control Registers” on page 6.) Upon receipt of each address byte, the X1202 responds with an acknowledge. After receiving both address bytes the X1202 awaits the eight bits of data. After receiving the 8 data bits, the X1202 again responds with an acknowledge. The master then termi-nates the transfer by generating a stop condition. The X1202 then begins an internal write cycle of the data to the nonvolatile memory. During the internal write cycle, the device inputs are disabled, so the device will not respond to any requests from the master. The SDA out-put is at high impedance. See Figure 11.Page WriteThe X1202 has a page write operation. It is initiated in the same manner as the byte write operation; but instead of terminating the write cycle after the first data byte is transferred, the master can transmit up to 7 more bytes to the clock/control registers.Note: Prior to writing to the CCR, the master must write a 02h, then 06h to the status register in two pre-ceeding operations to enable the write operation. See “Writing to the Clock/Control Registers” on page 6.)Figure 11. Byte Write SequenceFigure 12. Page Write SequenceS t a r tS t o pSlave AddressCCR Address 1 DataA C KA C KSDA Bus Signals from the SlaveSignals from the Master 0CCR Address 0111101100000000A C KA C KCCR Address 0S t a r tS t o pSlave AddressCCR Address 1Data (n)A C KA C KA C KSDA BusSignals from the SlaveSignals from the MasterData (1)A C K(1 ≤ n 64)111101100000000After the receipt of each byte, the X1202 responds with an acknowledge, and the address is internally incrimi-nated by one. When the counter reaches the end of the page, it “rolls over” and goes back to the first address on the same page. If the master supplies more than 8bytes of data, then the previously loaded data is over written by the new data, one byte at a time. The master terminates the data byte loading by issuing a stop con-dition, which causes the device to begin the non vola-tile write cycle. As with the byte write operation, all inputs are disabled until completion of the internal write cycle. Refer to Figure 12 for the address, acknowledge,and data transfer sequence.Stops and Write ModesStop conditions that terminate write operations must be sent by the master after sending at least 1 full data byte and its associated ACK signal. If a stop is issued in the middle of a data byte, or before 1 full data byte +ACK is sent, then the device will reset itself without performing the write. The contents of the array will not be affected.Acknowledge PollingThe disabling of the inputs during non volatile write cycles can be used to take advantage of the typical 5ms write cycle time. Once the stop condition is issued to indicate the end of the master’s byte load operation,the device initiates the internal non volatile write cycle.Acknowledge polling can be initiated immediately. T o do this, the master issues a start condition followed by the slave address byte for a write or read operation. If the device is still busy with the non volatile write cycle then no ACK will be returned. If the device has com-pleted the write operation, an ACK will be returned and the host can then proceed with the read or write opera-tion. Refer to the flow chart in Figure 13.Figure 13. Acknowledge Polling SequenceREAD OPERATIONSThere are three basic read operations: Current Address Read, Random Read, and Sequential Read.Current Address ReadInternally the device contains an address counter that maintains the address of the last word read incrimi-nated by one. Therefore, if the last read was to address n, the next read operation would access data from address n + 1.Upon receipt of the slave address byte with the R/W bit set to one, the device issues an acknowledge and then transmits the eight bits of the data byte. The master terminates the read operation when it does not respond with an acknowledge during the ninth clock and then issues a stop condition. Refer to Figure 14 for the address, acknowledge, and data transfer sequence.It should be noted that the ninth clock cycle of the read operation is not a “don’t care.” T o terminate a read operation, the master must either issue a stop condi-tion during the ninth cycle or hold SDA HIGH during the ninth clock cycle and then issue a stop condition.Figure 14. Current Address Read SequenceS t a r tS t o pSlave AddressDataA C KSDA Bus Signals from the SlaveSignals from the Master 11111011。
ACE12022BN14资料
ACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsF r e q u e n c y (M H z )Temperature [°C]Temperature [°C]ACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power Applications I c c I D L E(µA)IDLE current vs. Temperature Temperature [°C]ACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power Applicationsinto the decision register is 1, the pattern in the HPATTERN register is shifted out of the output port. Similarly, if the active bit is 0 the pattern in the LPATTERN register is shifted out.The HBC control (HBCNTRL) register is used to configure and control the data transmission. HBCNTRL is divided in 5 different controlling signal FRAME[2:0], IOSEL, TXBUSY, START/STOP, and OCFLAG (see Figure 23.)FRAME[2:0] selects the number of bits of DAT0 to encode and transmit. The HBC allows from 2 (0x1) to 8 (0x7) DAT0 bits to be encoded and transmitted. Upon a reset, FRAME is initialized to zero disabling the DAT0’s decision register transmitting no data. The IOSEL signal selects the transmission to output (TX) through either port G2 or G5. If IOSEL is 1, G5 is selected as the output port otherwise G2 is selected.The TXBUSY signal is read only and is used to inform software that a transmission is in progress. TXBUSY goes high when the encoded data begins to shift out of the output port and will remains high during each consecutive DAT0 frame bit transmission (see Figure 25). The HBC will clear the TXBUSY signal when the last DAT0 encoded bit of the frame is transmitted and the STOP signal is 0.The START / STOP signal controls the encoding and transmission process for each data frame. When software sets the START / STOP bit the D AT0 frame transmission process begins. The START signal will remain high until the beginning of the last encoded DAT0 frame bit transmission. The HBC then clears the START / STOP bit allowing software to either continue with a new DAT0 frame transmission or stop the transmission all together (see Figure 25). If TXBUSY is 0 when the START signal is enabled, a synchronization period occurs before any data is transmitted lasting the amount of time to transmit a 0 encoded bit (see Figure 24).The OCFLAG signal is read only and goes high when the last encoded bit of the D AT0 frame is transmitting. The OCFLAG signal is used to inform software that the D AT0 frame transmission operation is completing (see Figure 25). If multiple DAT0 frames are to be transmitted consecutively, software should poll the OCFLAG signal for a 1. Once OCFLAG is 1, DAT0 must be reload and the START / STOP bit must be restored to 1 in order to begin the new frame transmission without interruptions (the synchroni-zation period). Since OCFLAG remains high during the entire last encoded DAT0 frame bit transmission, software should wait for the HBC to clear the OCFLAG signal before polling for the new OCFLAG high pulse. If new data is not reloaded into D AT0 and the START signal (STOP is active) is not set before the OCFLAG is 0, the transmission process will end (TXBUSY is cleared) and a new process will begin starting with the synchronization period. Figure 24 and 25 shows how the HBC performs its data encoding. In the example, two frames are encoded and transmitted consecu-tively with the following bit encoding format specification:1.Transmission frequency = 62.5KHz2.Data to be encoded = 0x52, 0x92 (all 8-bits)3.Each bit should be encoded as a 3-bit binary value, ‘1’ =110b and ‘0’ = 100b4.Transmission output port : G2To perform the data transmission, software must first initialize the PSCALE, BPSEL, HPATTERN, LPATTERN, and DAT0 registers with the appropriate values.LD PSCALE, #03H; (1MHz ÷ 4) ÷ 4 = 62.5KHz LD BPSEL, #012H; BPH = 2, BPL = 2 (3 bits each) LD HPATTERN, #0C0H; HPATTERN = 0xC0LD LPATTERN, #090H; LPATTERN = 0x90LD DAT0, #052H; DAT0 = 0x52Once the basic registers are initialized, the HBC can be started. (At the same time, software must set the number of data bits per data frame and select the desired output port.)LD HBCNTRL, #27H;START / STOP = 1,FRAME = 7, IOSEL = 0ACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power Applications8.0Hardware Bit-Coder (ACE1202-2 only)The ACE1202-2 contains a dedicated hardware bit-encoding peripheral block, Hardware Bit-Coder (HBC), for IR/RF data transmission (see Figure 21.) The HBC is completely software programmable and can be configured to emulate various bit-encoding formats. The software developer has the freedom to encode each bit of data into a desired pattern and output the encoded data at the desired frequency through either the G2 or G5output (TX) ports.The HBC contains six 8-bit memory-mapped configuration regis-ters PSCALE, HPATTERN, LPATTERN, BPSEL, HBCNTRL, and D AT0. The registers are used to select the transmission fre-quency, store the data bit-encoding patterns, configure the data bit-pattern/frame lengths, and control the data transmission flow.To select the IR/RF transmission frequency, an 8-bit divide constant must be written into the IR/RF Pre-scalar (PSCALE)register. The IR/RF transmission frequency generator divides the1MHz instruction clock down by 4 and the PSCALE register is used to select the desired IR/RF frequency shift. Together, the transmission frequency range can be configured between 976Hz(PSCALE = 0xFF) and 125kHz (PSCALE = 0x01). Upon a reset,the PSCALE register is initialized to zero disabling the IR/RF transmission frequency generator. However, once the PSCALE register is programmed, the desired IR/RF frequency is main-tained as long as the device is powered.Once the transmission frequency is selected, the data bit-encod-ing patterns must be stored in the appropriate registers. The HBC contains two 8-bit bit-encoding pattern registers, High-pattern(HPATTERN) and Low-pattern (LPATTERN). The encoding pat-tern stored in the HPATTERN register is transmitted when the data bit value to be encoded is a 1. Similarly, the pattern stored in the LPATTERN register is transmitted when the data bit value to be encoded is a 0. The HBC transmits each encoded pattern MSB first.The number of bits transmitted from the HPATTERN and LPATTERN registers is software programmable through the Bit Period Configuration (BPSEL) register (see Figure 22). D uring the transmission of HPATTERN, the number of bits transmitted is configured by BPH[2:0] (BPSEL[2:0]) while BPL[2:0] (BPSEL[5:3])configures the number of transmitted bits for the LPATTERN. The HBC allows from 2 (0x1) to 8 (0x7) encoding pattern bits to be transmitted from each register. Upon a reset, BPSEL is initially 0disabling the HBC from transmitting pattern bits from either register.The Data (DAT0) register is used to store up to 8 bits of data to be encoded and transmitted by the HBC. This data is shifted, bit by bit, MSB to LSB into a 1-bit decision register. If the active bit shiftedACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power ApplicationsACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power Applications14-Pin DIP (N14)Order Number ACE1202(12022, 1202L)N14/ACE1202(12022)EN14/ACE1202VN14 ACE1202(12022)BN14/ACE1202(12022)BEN14/ACE1202(12022)BVN14Package Number N14AACE1202 Product Family Arithmetic Controller Engine (ACEx™) for Low Power Applications。
1202P中文资料
Document Number: 63055For any questions, contact: foil@1202Vishay Foil ResistorsBulk Metal ® Foil TechnologyPrecision Trimming Potentiometers, 1 1/4 Inch Rectilinear, RJ12 Style, Designed to Meet or Exceed The Requirements of MIL-PRF-22097, Char. FNote1.See Figures 1 and2.FEATURES•Temperature coefficient of resistance (TCR): ± 10 ppm/°C maximum 3) (- 55 °C to + 150 °C ref. at + 25 °C); through the wiper 4); ± 25 ppm/°C•Load life stability: 0.1 % typical ΔR, 0.5 %maximum ΔR under full rated power at + 85 °C for 2000 h•Settability: 0.05 % typical; 0.1 % maximum•Setting stability: 0.1 % typical; 0.5 % maximum, ΔSS •Power rating: 0.5 W at + 85 °C •Resistance range: 2 Ω to 20 k Ω•“O“-ring prevents ingress of fluids during any board cleaning operation•Electrostatic discharge: above 25 000 V •Terminal finishes available: gold platedNotes†Under full rated power of 0.5 W at + 85 °C.•Refer to page 4 for footnotes.* Pb containing terminations are not RoHS compliant, exemptions may applyTABLE 1 - MODEL SELECTION †MODELTERMINATIONSTYLE AVERAGEWEIGHT(g)POWERRATING at + 85 °C AMBIENTNO. OFTURNS1202P-In line PC pins 2.50.5 W25 ± 2Y -staggered PC pins 1)2.5L-flexible wire leads3.3LB-flexible wire leadswith bushings5.1TABLE 2 - VALUES VS. TOLERANCESSTANDARD RESISTANCE VALUES (in Ω)STANDARD TOLERANCES2, 5, 10± 10 %2), ± 20 %20, 50, 100, 200, 250, 500, 1K, 2K, 5K, 10K, 20K5 %, 10 %TABLE 3 - 1202 (RJ12) SERIES ELECTRICAL SPECIFICATIONSTemperature Coefficient of Resistance (TCR)end-to-end 3)± 10 ppm/°C maximum (- 55 °C to + 25 °C)± 10 ppm/°C maximum (+ 25 °C to + 150 °C)2 Ω, 5 Ω, 10 Ω, 20 Ωthrough the wiper 4)± 20 ppm/°C ± 25 ppm/°CStabilityload life at 2000 h †load life at 10000 h †0.1 % typical ΔR; 0.5 % maximum ΔR 0.1 % typical ΔR; 1.0 % maximum ΔR Power Rating 5)0.5 W at + 85 °CSettability 0.05 % typical; 0.1 % maximum Setting Stability0.1 % typical; 0.5 % maximum ΔSS Contact Resistance variation - CRV (noise) 3 Ω typical; 10 Ω maximum Hop-off0.25 % typical; 1.0 % maximum High-Frequency Operation Rise time Inductance Capacitanceto 100 MHz 10 ns at 1 k Ω0.08 µH typical 0.5 pF typical Operating Temperature Range- 55 °C to + 150 °CTABLE 4 - MECHANICAL SPECIFICATIONSAdjustment Turns 25 ± 2Case Material Glass fortified diallyl-phthalate (DAP); black Mechanical StopsWiper idles - no discontinuityShaft Torque 8 oz. in. maximum; 3 oz. in. typical Internal Terminations All welded - no fluxBacklash0.05 % typical1202Vishay Foil Resistors Bulk Metal® Foil Technology Precision TrimmingPotentiometers, 1 1/4 Inch Rectilinear, RJ12 Style, Designed toMeet or Exceed The Requirements of MIL-PRF-22097, Char. F Array For any questions, contact: foil@ Document Number: 63055Document Number: 63055For any questions, contact: foil@1202Bulk Metal ® Foil Technology Precision Trimming Potentiometers, 1 1/4 Inch Rectilinear, RJ12 Style, Designed to Meet or Exceed The Requirements of MIL-PRF-22097, Char. FVishay Foil Resistors1202Vishay Foil ResistorsBulk Metal ® Foil Technology Precision TrimmingPotentiometers, 1 1/4 Inch Rectilinear, RJ12 Style, Designed to Meet or Exceed The Requirements of MIL-PRF-22097, Char. F For any questions, contact: foil@Document Number: 63055Notes1.Preferred Termination style for current 1-1/4 inch rectilinear trimmers (staggered PC pins present a sturdier mounting arrangement for shock, vibration, and impact situations).2.10 W at ± 5 % available on special order.3.Maximum TCR applies to the 3 σ (sigma) limit or 99.73 % of a production lot. (Measured end-to-end with wiper off the element.)4.Measurements of TCR through the wiper are influenced more by setting stability and the percentage of the total resistance in use (at the wiper) than by fundamental resistance change due to temperature alone. The parameter shown in Table 3 is a 2 σdistribution typifying the behavior of the device when used with 40% or more of the total resistance in use.5.Derated linearly from full power at + 85 °C to zero (0) W at +150 °C. See Figure 3 in this data sheet.6.All ΔR’s are measured to the tolerance specified + 0.01 Ω.7.Whichever is greater.8.Load-Life test performed at nominal rated power, 0.5 W, at +85 °C.Special Available Options:Special markingSpecial lengths for lead wires (L, LB Style)Hooked leadsAlternate bushing and PC combinationsPower conditioning and screening operations VISHAY TRIMMERS ARE INSPECTED 100 % for:•Short-time overload (6.25 x rated power for 5 s on; and for 30 s off - 3 cycles)•Immersion•Resistance tolerance check •End resistance •Visual-mechanical•Dynamic tests for continuity, CRV By Sample for:•TCR •DWVTABLE 5 - COMPARISONMIL-PRF-22097/2 CHARACTERISTIC F 7)1202 MAXIMUM (Worst Case)TEST GROUP IVisual and mechanical Total resistanceActual effective electrical travel End resistanceContact resistance variation - CRV (noise) Dielectric withstanding voltage - DWV (atmospheric and barometric pressure) Insulation resistance Shaft torque Thermal shock No failures ± 10 %17 to 27 turns ± 2 % or 20 Ω7)± 3.0 % or 3 Ω7)Per MIL-STD-202, methods 301 and 105≥ 1000 M Ω8 oz. in. maximum± 1.0 %No failures ± 10 %25 ± 2 turns2 Ω3 Ω typical, 10 Ω maximumPer MIL-STD-202, methods 301 and 105≥ 1000 M Ω8 oz. in. maximum± 1.0 %TEST GROUP IIResistance temperature characteristic - TCR Moisture resistanceContact resistance variation - CRV (noise)± 0.01 % (± 100 ppm/°C)± 1.0 %3.0 % or 3 Ω7)± 0.001 % (± 10 ppm/°C)± 0.5 %3 Ω typical, 10 Ω maximum TEST GROUP IIIShock (specified pulse)Vibration (high-frequency)Contact resistance variation - CRV (noise)Salt spray± 1.0 %± 1.0 %± 3.0 % or 3 Ω7)No corrosion ± 0.5 %± 0.5 %3 Ω typical, 10 Ω maximumNo corrosion TEST GROUP IV Solder heatLife (1000 h at + 85 °C)8)Contact resistance variation - CRV (noise)± 1.0 %± 2.0 %± 3.0 % or 3 Ω7)± 0.05 %± 0.5 %3 Ω typical, 10 Ω maximum TEST GROUP VLow-temperature operation High-temperature exposureContact resistance variation - CRV (noise)± 1.0 %± 2.0 %± 3.0 % or 3 Ω7)± 0.5 %± 0.5 %3 Ω typical, 10 Ω maximum TEST GROUP VI Rotational lifeContact resistance variation - CRV (noise)Terminal strength ± 2.0 %± 3.0 % or 3 Ω7)2 lbs± 2.0 %3 Ω typical, 10 Ω maximum2 lbs TEST GROUP VIISolderability (excluding termination L)Immersion (excluding termination L)MIL-STD-202 method 208No continuous stream of bubblesMIL-STD-202 method 208No continuous stream of bubbles TEST GROUP VIII Fungus MIL-STD-810 method 508No mechanical damageMIL-STD-810 method 508No mechanical damageDocument Number: 63055For any questions, contact: foil@1202Bulk Metal ® Foil Technology Precision Trimming Potentiometers, 1 1/4 Inch Rectilinear, RJ12 Style, Designed to Meet or Exceed The Requirements of MIL-PRF-22097, Char. FVishay Foil Resistors Note* For non-standard requests, please contact Application Engineering.TABLE 6 - GLOBAL PART NUMBER INFORMATIONNEW GLOBAL PART NUMBER:Y5050500R000K0L (preferred part number format)DENOTES PRECISIONVALUE AER*YR = ΩK = k Ω0 = standard 1 - 999 = customPRODUCT CODE TOLERANCE PACKAGING 5050 = 1202L 0050 = 1202LB 0051 = 1202P 6050 = 1202PB 5051 = 1202Y 7050 = 1202YBJ = ± 5 %K = ± 10 %M = ± 20 %L = bulk packFOR EXAMPLE: ABOVE GLOBAL ORDER Y5050 500R000 K 0 L:TYPE: 1202L VALUE: 500.0 ΩABSOLUTE TOLERANCE: ± 10.0 %AER: standardPACKAGING: bulk packHISTORICAL PART NUMBER:1202L 500R00 K B (will continue to be used)1202L 500R00K B MODEL RESISTANCE VALUETOLERANCE PACKAGING 1202L 1202LB 1202P 1202PB 1202Y 1202YB500.0 ΩJ = ± 5 %K = ± 10 %M = ± 20 %B = bulk pack05050R 00Y 5K 00LDisclaimer Legal Disclaimer NoticeVishayAll product specifications and data are subject to change without notice.Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product.Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products.No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay.The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications.Product names and markings noted herein may be trademarks of their respective owners.元器件交易网Document Number: 。
ISL12022MAIBZ;中文规格书,Datasheet资料
Low Power RTC with Battery Backed SRAM, Integrated ±5ppm Temperature Compensation and Auto Daylight SavingISL12022MAThe ISL12022MA device is a low power real time clock (RTC) with an embedded temperature sensor and crystal. Device functions include oscillator compensation, clock/calendar, power fail and low battery monitors, brownout indicator,one-time, periodic or polled alarms, intelligent battery backup switching, Battery Reseal™ function and 128 bytes ofbattery-backed user SRAM. Backup battery current draw is less than 1.6µA over the temperature range. The device is offered in a 20Ld SOIC module that contains the RTC and an embedded 32.768kHz quartz crystal. The calibrated oscillator provides less than ±5ppm drift over the full -40°C to +85°C temperature range.The RTC tracks time with separate registers for hours, minutes, and seconds. The calendar registers track date, month, year and day of the week and are accurate through 2099, with automatic leap year correction.Daylight Savings time adjustment is done automatically, using parameters entered by the user. Power fail and battery monitors offer user-selectable trip levels. The time stamp function records the time and date of switchover from V DD to V BAT power, and also from V BAT to V DD power.The ISL12022MA features enhanced immunity to ESD per the IEC61000-4-2 standard, and also provides improved resistance to system leakage related to environmental moisture.Related Literature•See TB484 “ISL12022MA Enhanced RTC Module”•See AN1549 “Addressing Power Issues in Real Time Clock Applications”Features•Embedded 32.768kHz Quartz Crystal in the Package •20 Ld SOIC Package (for DFN version, refer to the ISL12020M)•Calendar•On-chip Oscillator Temperature Compensation •10-bit Digital Temperature Sensor Output •15 Selectable Frequency Outputs•Interrupt for Alarm or 15 Selectable Frequency Outputs •Automatic Backup to Battery or Supercapacitor •V DD and Battery Status Monitors•Battery Reseal™ Function to Extend Battery Shelf Life •Power Status Brownout Monitor •Time Stamp for Battery Switchover •128 Bytes Battery-Backed User SRAM •1.6µA Max Battery Current •I 2C Bus™•RoHS CompliantApplications•Utility Meters •POS Equipment •Printers and Copiers •Digital CamerasFIGURE 1.TYPICAL APPLICATION CIRCUITGND GND GND NC GND GND GND NC NC NC NC NC V BAT V DD GNDIRQ/F OUTNCNCSCL SDA ISL12022MA1234567891020191817161514131211SCHOTTKY DIODEBAT54BATTERY 3.0V3.3V C20.1µFC10.1µFR110k R210k R310kVDO SCLSDA GNDMCUINTERFACE IRQ/F OUTBlock DiagramPin ConfigurationISL12022MA (20 LD SOIC)TOP VIEWI 2CINTERFACECONTROL LOGIC ALARMFREQUENCYOUTRTC DIVIDERSDA BUFFER CRYSTAL OSCILLATORPORSWITCH SCL BUFFERSDA SCLV DDV BAT INTERNAL SUPPLYV TRIPSECONDSMINUTES HOURS DAY OF WEEKDATE MONTHYEARUSER SRAMCONTROL REGISTERS GNDREGISTERSTEMPERATURESENSORFREQUENCY CONTROLIRQ/F OUT+-GND NC NC GND NC NC1 234567891020 19 18 17 16 15 14 13 12 11GND NC NC V DD GND GND NC V BAT GND GND NC IRQ/F OUT SCL SDAPin DescriptionsPIN NUMBER SYMBOL DESCRIPTION4, 5, 6, 9, 10, 15, 16, 17NC No Connection . Do not connect to a signal or supply voltage.7V BATBackup Supply . This input provides a backup supply voltage to the device. VBAT supplies power to the device in the event that the VDD supply fails. This pin can be connected to a battery, a supercapacitor or tied to ground if not used. See the Battery Monitor parameter in the “” table on page 6. This pin should be tied to ground if not used.11SDASerial Data . SDA is a bi-directional pin used to transfer data into and out of the device. It has an open drain output and may be OR’ed with other open drain or open collector outputs. The input buffer is always active (not gated) in normal mode.An open drain output requires the use of a pull-up resistor. The output circuitry controls the fall time of the output signal with the use of a slope controlled pull-down. The circuit is designed for 400kHz I 2C interface speeds. It is disabled when the backup power supply on the VBAT pin is activated.12SCLSerial Clock . The SCL input is used to clock all serial data into and out of the device. The input buffer on this pin is always active (not gated). It is disabled when the backup power supply on the VBAT pin is activated to minimize power consumption.13IRQ/F OUT Interrupt Output/Frequency Output (Default 32.768kHz frequency output).This dual function pin can be used as an interrupt or frequency output pin. The IRQ/F OUT mode is selected via the frequency out control bits of the control/statusregister. Interrupt Mode. The pin provides an interrupt signal output. This signal notifies a host processor that an alarmhas occurred and requests action. It is an open drain active low output. Frequency Output Mode. The pin outputs a clocksignal, which is related to the crystal frequency. The frequency output is user selectable and enabled via the I2C bus. Itis an open drain output. The output is open drain and requires a pull-up resistor.14V DD Power Supply. Chip power supply and ground pins. The device will operate with a power supply from V DD = 2.7V to5.5VDC. A 0.1µF capacitor is recommended on the VDD pin to ground.1, 2, 3, 8, 18, 19, 20GND Ground Pin.Pin Descriptions (Continued)PIN NUMBER SYMBOL DESCRIPTION Ordering InformationPART NUMBER (Notes 2, 3)PARTMARKINGV DD RANGE(V)TEMP RANGE(°C)PACKAGE(RoHS Compliant)PKG.DWG. #ISL12022MAIBZ ISL12022MAIBZ 2.7 to 5.5-40 to +8520 Ld SOIC M20.3ISL12022MAIBZ-T (Note 1)ISL12022MAIBZ 2.7 to 5.5-40 to +8520 Ld SOIC (Tape and Reel)M20.31.Please refer to TB347 for details on reel specifications.2.These Intersil plastic packaged products employ special material sets, molding compounds and 100% matte tin plate plus anneal (e3) terminationfinish. These products do contain Pb but they are RoHS compliant by exemption 7 (Pb in high melting temperature type solders, electronic ceramic parts (e.g. piezoelectronic devices)) and exemption 5 (Pb in glass of electronic components). These Intersil RoHS compliant products are compatible with both SnPb and Pb free soldering operations. These Intersil RoHS compliant products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.3.For Moisture Sensitivity Level (MSL), please see device information page for ISL12022MA. For more information on MSL please see Tech BriefTB363.Table of ContentsBlock Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6DC Operating Characteristics RTC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6Power-Down Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7I2C Interface Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7SDA vs SCL Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Symbol Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Typical Performance Curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Power Control Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Normal Mode (V DD) to BatteryBackup Mode (V BAT). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Battery Backup Mode (V BAT) toNormal Mode (V DD). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Power Failure Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Brownout Detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Battery Level Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Real Time Clock Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Single Event and Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Frequency Output Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 General Purpose User SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 I2C Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Oscillator Compensation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Register Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Real Time Clock Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Addresses [00h to 06h] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Control and Status Registers (CSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Addresses [07h to 0Fh]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Power Supply Control Register (PWR_VDD). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Battery Voltage Trip Voltage Register(PWR_VBAT). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Initial AT and DT Setting Register (ITRO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 ALPHA Register (ALPHA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 BETA Register (BETA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Final Analog Trimming Register (FATR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Final Digital Trimming Register (FDTR). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 ALARM Registers (10h to 15h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Time Stamp VDD to Battery Registers (TSV2B). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Time Stamp Battery to VDD Registers (TSB2V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 DST Control Registers (DSTCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 TEMP Registers (TEMP). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 NPPM Registers (NPPM). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 XT0 Registers (XT0). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24ALPHA Hot Register (ALPHAH). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 User Registers (Accessed by Using Slave Address 1010111x). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Addresses [00h to 7Fh]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 I2C Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Protocol Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Device Addressing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Write Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Read Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Application Section. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Power Supply Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Battery Backup Details. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Layout Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Measuring Oscillator Accuracy. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Temperature Compensation Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Daylight Savings Time (DST) Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Device Handling Precautions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Package Outline Drawing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31Absolute Maximum Ratings Thermal InformationVoltage on V DD, V BAT and IRQ/F OUT pins(Respect to Ground). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.0V Voltage on SCL and SDA pins(Respect to Ground). . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to V DD+0.3V ESD RatingHuman Body Model (Per JESD22-A114F) . . . . . . . . . . . . . . . . . . . . . . >3kV Machine Model (Per JESD22-A115B) . . . . . . . . . . . . . . . . . . . . . . . .>300V Charge Device Model (Per JESD22-C101D) . . . . . . . . . . . . . . . . . . . .2.2kV Latch Up (Tested per JESD-78B; Class 2, Level A) . . . . . . . . . . . . . . 100mA Shock Resistance. . . . . . . . . . . . . . . . . . . . . . . . . . .5000g, 0.3ms, 1/2 sine Vibration (Ultrasound cleaning not advised). . . . . . . . . . .20g/10-2000Hz,Thermal Resistance (Typical)θJA (°C/W)θJC (°C/W) 20 Lead SOIC (Notes 4, 5). . . . . . . . . . . . . . 7035 Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C Pb-Free Reflow Profile (Note 6). . . . . . . . . . . . . . . . . . . . . . . . see link below /pbfree/Pb-FreeReflow.aspCAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.NOTES:4.θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.5.For θJC, the “case temp” location is on top of the package and measured in the center of the package between pins 6 and 15.6.The ISL12022MA Oscillator Initial Accuracy can change after solder reflow attachment. The amount of change will depend on the reflow temperatureand length of exposure. A general rule is to use only one reflow cycle and keep the temperature and time as short as possible. Changes on the order of ±1ppm to ±3ppm can be expected with typical reflow profiles.DC Operating Characteristics RTC Test Conditions: VDD = +2.7 to +5.5V, TA = -40°C to +85°C, unless otherwise stated. Boldface limits apply over the operating temperature range, -40°C to +85°C.SYMBOL PARAMETER CONDITIONSMIN(Note 7)TYP(Note 8)MAX(Note 7)UNITS NOTESV DD Main Power Supply(Note 15) 2.7 5.5VV BAT Battery Supply Voltage(Note 15) 1.8 5.5V9I DD1Supply Current. (I2C Not Active,Temperature Conversion Not Active, F OUTNot Active)V DD = 5V 4.115µA10, 11 V DD = 3V 3.514µA10, 11I DD2Supply Current. (I2C Active, TemperatureConversion Not Active, F out Not Active)V DD = 5V200500µA10, 11I DD3Supply Current. (I2C Not Active,Temperature Conversion Active, F OUT NotActive)V DD = 5V120400µA10, 11I BAT Battery Supply Current V DD = 0V, V BAT = 3V, T A=+25°C 1.0 1.6µA10V DD = 0V, V BAT = 3V 1.0 5.0µA10 I BATLKG Battery Input Leakage V DD = 5.5V, V BAT = 1.8V100nAI LI Input Leakage Current on SCL V IL = 0V, V IH = V DD-1.0±0.1 1.0µAI LO I/O Leakage Current on SDA V IL = 0V, V IH = V DD-1.0±0.1 1.0µAV BATM Battery Level Monitor Threshold-100+100mVV PBM Brownout Level Monitor Threshold-100+100mVV TRIP V BAT Mode Threshold(Note 15) 2.0 2.2 2.4VV TRIPHYS V TRIP Hysteresis30mV13 V BATHYS V BAT Hysteresis50mV13OSCILLATOR ACCURACYΔFout I Oscillator Initial AccuracyV DD = 3.3V -2+8ppm 6, 17ΔFout R Oscillator Accuracy after Reflow Cycle V DD = 3.3V ±5ppm 6, 17ΔFout T Oscillator Stability vs Temperature V DD = 3.3V ±2ppm 6, 18ΔFout V Oscillator Stability vs Voltage 2.7V ≤ V DD ≤ 5.5V -3+3ppm 19TempTemperature Sensor AccuracyV DD = V BAT = 3.3V±2°C13IRQ/F OUT (OPEN DRAIN OUTPUT)V OLOutput Low VoltageV DD = 5V, I OL = 3mA 0.4V V DD = 2.7V, I OL = 1mA0.4VDC Operating Characteristics RTCTest Conditions: VDD = +2.7 to +5.5V, TA = -40°C to +85°C, unless otherwise stated. Boldfacelimits apply over the operating temperature range, -40°C to +85°C. (Continued)SYMBOLPARAMETERCONDITIONSMIN (Note 7)TYP (Note 8)MAX (Note 7)UNITSNOTESPower-Down TimingTest Conditions: VDD = +2.7 to +5.5V, Temperature = -40°C to +85°C, unless otherwise stated. Boldface limits applyover the operating temperature range, -40°C to +85°C.SYMBOL PARAMETERCONDITIONSMIN (Note 7)TYP (Note 8)MAX (Note 7)UNITS NOTES V DDSR-V DD Negative Slew Rate10V/ms 12V DDSR+V DD Positive Slew Rate, minimum0.05V/ms16I 2C Interface SpecificationsTest Conditions: V DD = +2.7 to +5.5V, Temperature = -40°C to +85°C, unless otherwise specified. Boldfacelimits apply over the operating temperature range, -40°C to +85°C.SYMBOL PARAMETERTEST CONDITIONSMIN (Note 7)TYP (Note 8)MAX (Note 7)UNITS NOTESV IL SDA and SCL Input Buffer LOW Voltage-0.30.3 x V DD V V IH SDA and SCL Input Buffer HIGH Voltage0.7 x V DDV DD + 0.3V Hysteresis SDA and SCL Input Buffer Hysteresis0.05 x V DD V 13, 14V OL SDA Output Buffer LOW Voltage, Sinking 3mA V DD = 5V, I OL = 3mA 00.020.4V C PINSDA and SCL Pin Capacitance T A = +25°C, f = 1MHz, V DD = 5V, V IN =0V, V OUT = 0V10pF13, 14f SCL SCL Frequency400kHz t INPulse Width Suppression Time at SDA and SCL InputsAny pulse narrower than the max spec is suppressed.50nst AASCL Falling Edge to SDA Output Data ValidSCL falling edge crossing 30% of V DD , until SDA exits the 30% to 70% of V DD window.900nst BUFTime the Bus Must be Free Before the Start of a New Transmission SDA crossing 70% of V DD during a STOP condition, to SDA crossing 70% of V DD during the following START condition.1300nst LOW Clock LOW Time Measured at the 30% of V DD crossing.1300ns t HIGHClock HIGH TimeMeasured at the 70% of V DD crossing.600nst SU:STA START Condition Setup TimeSCL rising edge to SDA falling edge. Both crossing 70% of V DD .600ns t HD:STASTART Condition Hold TimeFrom SDA falling edge crossing 30% of V DD to SCL falling edge crossing 70% of V DD .600nst SU:DATInput Data Setup TimeFrom SDA exiting the 30% to 70% of V DD window, to SCL rising edge crossing 30% of V DD.100nst HD:DATInput Data Hold Time From SCL falling edge crossing 30% of V DD to SDA entering the 30% to 70% of V DD window.20900nst SU:STOSTOP Condition Setup TimeFrom SCL rising edge crossing 70% of V DD , to SDA rising edge crossing 30% of V DD .600nst HD:STO STOP Condition Hold Time From SDA rising edge to SCL falling edge.Both crossing 70% of V DD .600ns t DHOutput Data Hold TimeFrom SCL falling edge crossing 30% of V DD , until SDA enters the 30% to 70% of V DD window.nst R SDA and SCL Rise Time From 30% to 70% of V DD.20 +0.1 x Cb 300ns 13, 14t F SDA and SCL Fall TimeFrom 70% to 30% of V DD.20 +0.1 x Cb300ns 13, 14Cb Capacitive Loading of SDA or SCLTotal on-chip and off-chip 10400pF 13, 14R PUSDA and SCL Bus Pull-up Resistor Off-chipMaximum is determined by t R and t F .For Cb = 400pF, max is about 2k Ω~2.5k Ω.For Cb = 40pF, max is about 15k Ω~20k Ω1k Ω13, 14NOTES:7.Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested.8.Specified at +25°C.9.Temperature Conversion is inactive below V BAT = 2.7V. Device operation is not guaranteed at V BAT <1.8V.10.IRQ/F OUT inactive.11.V DD > V BAT +V BATHYS12.In order to ensure proper timekeeping, the V DD SR- specification must be followed.13.Limits should be considered typical and are not production tested.14.These are I 2C specific parameters and are not tested, however, they are used to set conditions for testing devices to validate specification.15.Minimum V DD and/or V BAT of 1V to sustain the SRAM. The value is based on characterization and it is not tested.16.To avoid EEPROM recall issues, it is advised to use this minimum power up slew rate. Not tested, shown as typical only.17.Defined as the deviation from a target oscillator frequency of 32,768.0Hz at room temperature.18.Defined as the deviation from the room temperature measured 1Hz frequency, V DD = 3.3V, at T A = -40°C to +85°C.19.Defined as the deviation at room temperature from the measured 1Hz frequency (or equivalent) at V DD = 3.3, over the range of V DD = 2.7V toV DD =5.5V.I 2C Interface SpecificationsTest Conditions: V DD = +2.7 to +5.5V, Temperature = -40°C to +85°C, unless otherwise specified. Boldfacelimits apply over the operating temperature range, -40°C to +85°C. (Continued)SYMBOL PARAMETERTEST CONDITIONSMIN (Note 7)TYP (Note 8)MAX (Note 7)UNITS NOTES。
IEEE1202
IEEE Std 1202-1991IEEE Standard for Flame Testing of Cables for Use in Cable Tray in Industrial and Commercial OccupanciesSponsorPower Systems Engineering Committeeof theIndustry Applications SocietyApproved March 21, 1991IEEE Standards BoardAbstract: A test protocol and the performance criteria to determine the flame propagation tendency of cables in a vertical cable tray. It applies to single insulated and multiconductor cables is established. The test consists of exposing cable samples to a theoretical 20 kW (70 000 Btu/hr) flaming ignition source for a 20 min duration. The test facility, test sample requirements, test procedure, and evaluation of results are covered.Keywords: cable flame testing, cable tray, flame test facility, flame testing of cablesThe Institute of Electrical and Electronics Engineers, Inc.345 East 47th street, New York, NY 10017-2394, USA© 1991 by the Institute of Electrical and Electronics Engineers, Inc.All rights reserved. Published 1991Printed in the United States of AmericaISBN 1-55937-122-6No part of this publication may be reproduced in any form, in an electronic retrieval system or otherwise, without theprior written permission of the publisher.IEEE Standards documents are developed within the Technical Committees of the IEEE Societies and the Standards Coordinating Committees of the IEEE Standards Board. Members of the committees serve voluntarily and without compensation. They are not necessarily members of the Institute. The standards developed within IEEE represent a consensus of the broad expertise on the subject within the Institute as well as those activities outside of IEEE which have expressed an interest in participating in the development of the standard.Use of an IEEE Standard is wholly voluntary. The existence of an IEEE Standard does not imply that there are no other ways to produce, test, measure, purchase, market, or provide other goods and services related to the scope of the IEEE Standard. Furthermore, the viewpoint expressed at the time a standard is approved and issued is subject to change brought about through developments in the state of the art and comments received from users of the standard. Every IEEE Standard is subjected to review at least every five years for revision or reaffirmation. When a document is more than five years old, and has not been reaffirmed, it is reasonable to conclude that its contents, although still of some value, do not wholly reflect the present state of the art. Users are cauti oned to check to determine that they have the latest edition of any IEEE Standard.Comments for revision of IEEE Standards are welcome from any interested party, regardless of membership affiliation with IEEE. Suggestions for changes in documents should be in the form of a proposed change of text, together with appropriate supporting comments.Interpretations: Occasionally questions may arise regarding the meaning of portions of standards as they relate to specific applications. When the need for interpreta tions is brought to the attention of IEEE, the Institute will initiate action to prepare appropriate responses. Since IEEE Standards represent a consensus of all concerned interests, it is important to ensure that any interpretation has also received the concurrence of a balance of interests. For this reason IEEE and the members of its technical committees are not able to provide an instant response to interpretation requests except in those cases where the matter has previously received formal consideration.Comments on standards and requests for interpretations should be addressed to:Secretary, IEEE Standards Board445 Hoes LaneP.O. Box 1331Piscataway, NJ 08855-1331USAIEEE Standards documents are adopted by the Institute of Electrical and Electronics Engineers without regard to whether their adoption may involve patents on articles, materials, or processes. Such adoption does not assumeany liability to any patent owner, nor does it assume any obligation whatever to parties adopting the standards documents.Foreword(This Foreword is not a part of IEEE Std 1202-1991, IEEE Standard for Flame Testing of Cables for Use in Cable Tray in Industrial and Commercial Occupancies.)This standard was prepared by the Tray Cable Flame Test Working Group of the Power Equipment Subcommittee of the Power Systems Engineering Committee of the IEEE Industry Applications Society. Members of this Working Group represent a cross-section of the affected parties including industrial and commercial users, material suppliers, cable manufacturers, consulting engineers, testing laboratories, and insurance companies.The Insulated Conductors Committee of the IEEE Power Engineering Society also reviewed and endorsed this standard.At the time this standard was completed, the Tray Cable Flame Test Working Group had the following membership:James M. Daly, ChairM. BayerD. N. Bishop M. Bourassa G. R. J. Bracey K. R. Bullock T. BurkeJ. CancelosiP. L. Cinquemani J. D. Cospolitch R. P. Derrick G. L. DornaR. L. Doughty A. FineM. V. Glenn D. L. Goldberg T. GuidaC. HaferA. P. Haggerty W. HattoriE. HeslaDr. M. M. HirschlerC. Moss HodnettE. G. HoffmanS. KaufmanG. KleinF. E. LaGaseR. LagemanR. C. LennigDr. T. H. LingP. LoriganDr. M. E. LowellV. B. MascarenhasL. B. McClungR. G. MedleyL. D. MonaghanS. PaniriJ. R. PfafflinJ. J. PickeringA. PierceP. PollakC. PrassoL. PrzybylaM. H. RamseyL. F. SaundersA. ScolnikN. StampD. StonkusG. StranieroR. ThrashA. C. TingleyN. W. ToddC. TrippH. WillisD. W. Zipse C. A. PetrizzoAt the time this standard was balloted, the P1202 Balloting Committee of the IAS Power Systems Engineering Committee had the following membership:G. R. J. Bracey J. M. Daly R. L. Doughty D. L. Goldberg A. P. Haggerty E. HeslaW. J. KellyD. D. KovalR. H. McFaddenR. G. MedleyC. B. PinheiroM. D. RobinsonL. F. SaundersB. W. WhittingtonD. W. ZipseWhen the IEEE Standards Board approved this standard on March 21, 1991, it had the following membership:Marco W. Migliaro, ChairDonald C. Loughry, Vice ChairAndrew G. Salem, SecretaryDennis BodsonPaul L. BorrillClyde CampJames M. Daly Donald C. Fleckenstein Jay Forster*David F. Franklin Ingrid Fromm Thomas L. HannanDonald N. HeirmanKenneth D. HendrixJohn W. HorchBen C. JohnsonIvor N. KnightJoseph L. Koepfinger*Irving KolodnyJohn E. May, Jr.Lawrence V. McCallDonald T. Michael*Stig L. NilssonJohn L. RankineRonald H. ReimerGary S. RobinsonTerrance R. Whittemore Michael A. Lawler*Member EmeritusCLAUSEPAGE错误！超链接引用无效。
爱森电子产品说明书
Eaton PDG52M1200E4RNEaton Power Defense molded case circuit breaker, Globally Rated, Frame 5, Two Pole, 1200A, 65kA/480V, PXR20 ARMS LSI w/ Relays, No TerminalsGeneral specificationsEaton Power Defense molded case circuit breakerPDG52M1200E4RN 786679286579139.7 mm 406.4 mm 209.5 mm 21.32 kg Eaton Selling Policy 25-000, one (1) year from the date of installation of theProduct or eighteen (18) months from thedate of shipment of the Product,whichever occurs first.RoHS Compliant UL 489CSACCC MarkedIEC 60947-2Product NameCatalog Number UPCProduct Length/Depth Product Height Product Width Product Weight WarrantyCompliancesCertifications1200 AComplete breaker 5Two-polePD5 Global Class A PXR 20 LSI w/ARMS600 Vac600 VNo Terminals65 kAIC at 480 Vac 100 kAIC Icu/ 100 kAIC Ics/ 220 kAIC Icm @240V (IEC) 15 kAIC Icu/ 7.5 kAIC Ics/ 31.5 kAIC Icm @690V (IEC) 65 kAIC @480/277V (UL) 100 kAIC @240V (UL)70 kAIC Icu/ 53 kAIC Ics/ 154 kAIC Icm @380-415V (IEC) 50 kAIC Icu/ 40 kAIC Ics/ 105 kAIC Icm @440V (IEC) 35 kAIC @600/347V (UL)30 kAIC Icu/ 25 kAIC Ics/ 63 kAIC Icm @525V South Africa (IEC)50 kAIC Icu/ 30 kAIC Ics/ 105 kAIC Icm @480V Brazil (IEC)1200 AEaton Power Defense MCCB PDG52M1200E4RN 3D drawing Power Xpert Protection Manager x64Amperage Rating Circuit breaker frame type Frame Number of poles Circuit breaker type Class Trip TypeVoltage rating Voltage rating - max Terminals Interrupt rating Interrupt rating rangeTrip rating 3D CAD drawing packageApplication notesConsulting application guide - molded case circuit breakersPower Xpert Protection Manager x32BrochuresStrandAble terminals product aidPower Defense brochurePower Defense molded case circuit breaker selection posterPower Defense technical selling bookletCatalogsPower Defense molded case circuit breakers - Frame 5 product aid Power Xpert Release trip units for Power Defense molded case circuit breakersMolded case circuit breakers catalogCertification reportsPDG6 CSA certificationPDG5 CB reportPDG5 CCC certificationPDG5 CSA CertificationPDG6 CCC certificatePower Defense Declaration concerning California’s Proposition 65EU Declaration of Conformity - Power Defense molded case circuit breakersPDG5 UL authorizationInstallation instructionsPower Defense Frame 2/3/4/5/6 voltage neutral sensor module wiring instructions – IL012316ENPower Defense Frame 4_5 flex shaft handle mech assembly instructions - IL012284ENPower Defense Frame 5 aux, alarm, shunt trip and uvr instructions(IL012201EN).pdfPower Defense Frame 5 vertical padlockable handle lock hasp installation instructions - IL012283ENPower Defense Frame 5 key interlock installation instructions -IL012294ENPower Defense Frame 5 walking beam installation instructions -IL012290ENPower Defense Frame 5 breaker status module installation instructions – IL012307ENPower Defense Frame 4_5_6 high performance flex shaft handle mech assembly instructions - IL012296ENInstallation videosPower Defense Frame 5 Trip Unit Replacement Animated Instructions Power Defense Frame 5 UVR Trip How-To VideoPower Defense Frame 5 Aux, Alarm, ST and UVR Animated Instructions.rh1Power Defense Frame 5 Shunt Trip, Aux and Alarm Trip How-To Video Power Defense Frame 5 Trip Unit Upgrade Relays Board, Animated Instructions.rhPower Defense Frame 5 Trip Unit Upgrade Wire Harnesses, Animated Instructions.rhMultimediaPower Defense molded case circuit breakersPower Defense Frame 2 Variable Depth Rotary Handle Mechanism Installation How-To VideoPower Defense Frame 5 Trip Unit How-To VideoEaton Power Defense for superior arc flash safetyPower Defense Frame 6 Trip Unit How-To VideoPower Defense Frame 3 Variable Depth Rotary Handle Mechanism Installation How-To VideoPower Defense BreakersSpecifications and datasheetsEaton Specification Sheet - PDG52M1200E4RNTime/current curvesPower Defense time current curve Frame 5 - PD5White papersMolded case and low-voltage power circuit breaker healthIntelligent power starts with accurate, actionable dataSingle and double break MCCB performance revisited Implementation of arc flash mitigating solutions at industrial manufacturing facilitiesIntelligent circuit protection yields space savingsMaking a better machineSafer by design: arc energy reduction techniquesMolded case and low-voltage breaker healthEaton Corporation plc Eaton House30 Pembroke Road Dublin 4, Ireland © 2023 Eaton. All Rights Reserved. Eaton is a registered trademark.All other trademarks areproperty of their respectiveowners./socialmedia。
ioLogik E1200系列快速安装指南说明书
P/N: 1802012001016*1802012001016*ioLogik E1200 Series Quick Installation GuideEthernet Remote I/OVersion 6.1, January 2021Technical Support Contact Information/support2021 Moxa Inc. All rights reserved.Package Checklist• 1 ioLogik E1200 series remote I/O product•Quick installation guide (printed)SpecificationsInput Current ioLogik E1210 Series: 110 mA @ 24 VDCioLogik E1211 Series: 200 mA @ 24 VDCioLogik E1212 Series: 155 mA @ 24 VDCioLogik E1213 Series: 130 mA @ 24 VDCioLogik E1214 Series: 188 mA @ 24 VDCioLogik E1240 Series: 121 mA @ 24 VDCioLogik E1241 Series: 194 mA @ 24 VDCioLogik E1242 Series: 139 mA @ 24 VDCioLogik E1260 Series: 110 mA @ 24 VDCioLogik E1262 Series: 118 mA @ 24 VDC Input Voltage 12 to 36 VDCOperating Temperature Standard Models: -10 to 60°C (14 to 140°F) Wide Temp. Models: -40 to 75°C (-40 to 167°F)Storage Temperature-40 to 85°C (-40 to 185°F)InstallationJumper SettingsModels with DIO, AI, or external power channels require configuring the jumpers inside the enclosure. Remove the screw located on the back panel and open the cover to configure the jumpers.DIO mode configurations areshown above (Default: DO Mode).Analog mode configurations areshown above (Default: VoltageMode).DOs on the ioLogik E1213 have 3possible external (EXT) powerconfigurations, which are shown to theright. Only one field power can beselected at a time (JP10 / 12V JP5 / 9VJP11) and the jumper must be insertedvertically, not horizontally(Default: Field Power JP10).NOTE The ioLogik E1213 has 4 pure DO channels and 4 hybrid DIO channels. For the 4 pure DO channels, you can use the jumpers toselect the power configuration output (i.e., field power, 12 V, 9V). But for the 4 hybrid DIO channels, you cannot use thejumpers to select the power configuration output. Instead, youcan only use the jumpers to set the DIO channels to either DImode or DO mode.I/O WiringDigital Inputs/OutputsAnalog Inputs/OutputsRelay Output (Form A)RTD InputsTC InputsNOTE A “load” in a circuit schematic is a component or portion of the circuit that consumes electric power. For the diagrams shown in this document, “load” refers to the devices or systems connected to the remote I/O unit.MountingThere are two sliders on the back of the unit for DIN rail and wall mounting.1. Mounting on a DIN rail: Pull out the bottom slider; latch the unitonto the DIN-rail, and push the slider back in.2. Mounting on the wall: Pull out both the top and bottom sliders andalign the screws accordingly.Connecting the PowerConnect the +12 to +36 VDC power line to the ioLogik E1200’s terminal block V+ terminal; connect the ground from the power supply to the V- terminal. Connect the ground pin () if earth ground is available.NOTE For safety reasons, wires connecting the power supply should be at least 2 mm in diameter (e.g., 12 gauge wires).Connecting to the NetworkThe ioLogik E1200 has two built-in RJ45 Ethernet ports for connecting standard direct or cross-over Ethernet cables.LED IndicatorsType Color DescriptionPower Amber System power is ONOff System power is OFFReady Green System is readyFlashing Flashes every 1 sec when the “Locate”function is triggeredFlashing Flashes every 0.5 sec when the firmware isbeing upgradedFlashing An on/off period cycle: 0.5 second shows“Safe Mode”Off System is not ready.Port 1 Green Ethernet connection enabledFlashing Transmitting or receiving dataPort 2 Green Ethernet connection enabledFlashing Transmitting or receiving dataEXT(E1213 only) Green EXT field power input is connected Off EXT field power input is disconnectedSystem ConfigurationConfiguration via Web ConsoleMain configuration of an ioLogik E1200 is by web console.•Default IP Address: 192.168.127.254•Subnet Mask: 255.255.255.0NOTE Be sure to configure the host PC’s IP address to the same subnet as the ioLogik E1200. For example, 192.168.127.253 ioSearch UtilityioSearch is a search utility that helps users locate an ioLogik E1200 on the local network. The utility can be downloaded from Moxa’s website. Load Factory Default SettingsThere are three ways to restore the ioLogik E1200 to factory default settings.1.Hold the RESET button for 5 seconds.2.In the ioSearch utility, right-click on the ioLogik device to be reset andselect Reset to Default.3.Select Load Factory Default from the web console.NOTE Please refer to the user's manual for detailed configuration and settings information.How to Download the SoftwareStep 1: Click on the following link to open the Support & Downloads search tool:/support/support_home.aspx?isSearchShow=1 Step 2: Type the model name in the search box or select a product from the drop down box and then click Search.Step 3: Click the Software Packages link to download the latest software for the product.ATEX Information1.Certificate number: DEMKO 13 ATEX 1210600X2.Certification string: Ex nA nC IIC T3 Gc3.Standards covered:EN 60079-0:2012+A11:2013, EN 60079-15:20104.These products are to be installed in an ATEX Certified IP54enclosure and accessible only by the use of a tool.5.These products are for use in an area of not more than pollutiondegree 2 in accordance with IEC 60664-1.。
6-040400 212i 电子锁控制面板技术说明书
TECHNICAL NOTESThis product was re-designed using a new manufacturing technology, which changed the physical appearance of the keypad electronics. The LED’s changed to surface mount chip LED’s mounted on bottom of the circuit board which eliminates the need for the wire harnesses. It is also possible to control the red and green chip LED’s externally, with an alarm panel for example, by using connector J1. See the diagram for details. Also, thevoltage selection jumper on the main circuit board is no longer required.To prevent electrical kick back voltage from damaging the keypad, when using an electrical locking device, you MUST install the transorb as close as possible to the lock. Wire the transorb in parallel with the lock power terminals.Also, to avoid ESD (electro-static discharge) from interfering with the operation of the keypad, ground the negative terminal of the keypad to earth ground. If you cannot ground the power supply, then you must ground the keypad housing.The manufacturer recommends using a fi ltered and regulated power supply.SPECIFICATIONS:MECHANICAL:BOARD DIMENSIONS: 1.80”W x 2.845”H x 1.125”D ELECTRICAL:VOLTAGE: 12-24 Volts AC/DC (No Jumper Required) CURRENT: 8mA@12VDC typical; 35ma with relay energized. 16mA@24VDC typical; 45ma with relay energized. 21mA@12VAC typical; 74mA with relay energized. 43mA@24VAC typical; 91mA with relay energized. Note: Keypads using the 293 Relay Board, need an additional 30mA for each relay energized. OUTPUTS: Main Relay: 5 Amp, Form C @ 24VDC with 10 Amp surge. Outputs 2, 3, and 4 are 50mA negative voltage outputs ENVIRONMENTAL:TEMPERATURE: -20°F TO 130°F (-28°C TO 54°C)Indoor OnlyTECHNICAL SUPPORTDEALERS/INSTALLERS ONLY! End users must contact the dealer/installer for support. If the keypad still does not work after troubleshooting, please call the TechnicalServices department at 1-800-421-1587.• Packing Checklist212i Keypad10 Conductor Wire Harness (1)4 Conductor Wire Harness (1)Slotted screws (2)Security Screws (2)Transorb (1)Features & Programming Guide Warranty Guide212i KeypadWiring Diagrams & Speci fi cationsNote: This product is designed to be installed and servicedby security and lock industry professionals.To control the LED’s externally cut the four traces in the box underneath connector J1. Before connecting the alarm panel’s LED control lines to J1 verify the traces are cut. To verify, measure continuity between the end of the wire on the wire harness and the square pad on the circuit board below the box corresponding to the wire you’re measuring. Permanent damage to the keypad may result if voltage is connected to J1 when the traces are not cut.The diagram above shows how to connect two keypads to control a single door.Entering your code on keypad 2 unlocks the maglock directly. When you enter your code on keypad 1, it triggers the REX input of keypad two, which unlocks the door Please note that user codes must be programmed into both keypadsCopyright © 2015 Nortek Security & Control LLCLIMITED WARRANTYThis Nortek Security & Control product is warranted against defects in material and workmanship for twenty four (24) months. This warranty extends only to wholesale customers who buy direct from Nortek Security & Control or through Nortek Security & Control’s normal distribution channels. Nortek Security & Control does not warrant this product to consumers. Consumers should inquire from their selling dealer as to the nature of the dealer’s warranty, if any. There are no obligations or liabilities on the part of Nortek Security & Control LLC for consequential damages arising out of or in connection with use or performance of this product or other indirect damages with respect to loss of property, revenue, or pro fi t, or cost of removal,installation, or reinstallation. All implied warranties, including impliedwarranties for merchantability and implied warranties for fi tness, are valid only until the warranty expires. This Nortek Security & Control LLC Warranty is in lieu of all other warranties express or implied.All products returned for warranty service require a Return Authorization Number (RA#). Contact Returns at 1-855-546-3351 for an RA# and other important details.。
IPLU1202_V1.0_20080618
艾默生网络能源有限公司 版权所有，保留一切权利。内容如有改动，恕 不另行通知。
Copyright © 2008 by Emerson Network Power Co., Ltd. All rights reserved. The contents in this document are subject to change wit
第一章 概述 ...................................................................................................................................................................... 14 1.1 产品介绍 ...............................................................................................................................................................................14 1.2 技术指标 ...............................................................................................................................................................................54 1.3 传感器和变送器可选型号 ................................................................
ENA1P-B28-L00128L中文资料(bourns)中文数据手册「EasyDatasheet - 矽搜」
BPC1136E功能说明V31
8002 8003 0000
备注
当进行设置操 作时，输入命令 码和厂商专用 密码后，将显 示 ”8” 和 三 位 剩余呼叫次数， 可用于查询。
2
命令代码 *000 **00 **01
**02 **03 **04 **05 **06 **07 **08 **09 **10
**11
**12 **13 **15 **16 **17 **18 **19 **21 **40 **41
表 4.1 万能编码对照表 ........................................................................................................................... 5 4.3 万能编码表的编辑步骤 .......................................................................................................................... 5 4.4 万能编码表的编辑举例 .......................................................................................................................... 6
表 4.6.1 预置房号和分机地址对照表（每层 12 户，起始房号尾数为 01）.................................. 7 表 4.6.2 预置房号和分机地址对照表（每层 4 户，起始房号尾数为 05）.................................... 7 5. 房号带有字母的显示说明 ................................................................................................................................. 7 6. 其他特别说明 ..................................................................................................................................................... 8 6.1 初始化 ...................................................................................................................................................... 8 6.2 用户开锁密码 .......................................................................................................................................... 8
ioLogik E1200 Series (E1210) 固件发布说明书
Firmware for ioLogik E1200 Series (E1210) Release NotesSupported Operating SystemsNotesChangesApplicable ProductsBugs Fixed• Added SNMP Trap Community Setting to the web console.• Added a note on the password settings page that passwords are limited to 16 characters.• Fixed DHCP lease time did not ask for extension when half of the lease time elapsed.• Closed IP forwarding function (Port 0).• Closed UDP Port 161 when SNMP agent is disabled.• Fixed RESTful API header case-sensitive issue.• Fixed invalid token issue on login page when using Firefox.EnhancementsN/AioLogik E1210-T, ioLogik E1210• Added OPTIONS method for RESTful API.• Added quick access URI for RESTful API.New FeaturesN/A• This version of the firmware only works with ioSearch v2.0 or later versions.• To prevent system failure, only update the next or the previous released firmware version to prevent from system failure.Supported Operating SystemsNotesChangesApplicable ProductsBugs FixedN/A• Fixed file transfer problems when using the Chrome browser (e.g., firmware update, configuration import or export).EnhancementsN/AioLogik E1210, ioLogik E1210-T• Added the EtherNet/IP protocol.• Added RESTful API.• Added new registers for the Modbus/TCP protocol.• Added new OIDs for the SNMP protocol.• Modbus, EtherNet/IP, and RESTful services can be disabled (enabled by default).• Added sending heartbeat to port 9500 of MX-AOPC UA Server after the heartbeat function is enabled.• Increased password length from 8 to 16 characters.• Added a function to check special characters to prevent Cross-Site Scripting.• Passwords are now sent using the POST method instead of the GET method.New FeaturesN/AN/ASupported Operating SystemsNotesChangesApplicable ProductsBugs FixedN/AN/AEnhancementsN/AioLogik E1210, ioLogik E1210-T• Improved protocol efficiency for the ioLogik 2500 Series.New FeaturesN/AN/ASupported Operating SystemsNotesChangesApplicable ProductsBugs FixedN/A• Unable to disable the P2P heartbeat interval.• When the P2P client heartbeat is larger than 256 the time interval is incorrect.EnhancementsN/AioLogik E1210, ioLogik E1210-T• Supports ioLogik 2500 expansion mode.• Supports setting an initial value for a counter.New FeaturesN/AN/ASupported Operating SystemsNotesChangesApplicable ProductsBugs FixedN/A• The counter storage is deleted when the power fails.EnhancementsN/AioLogik E1210-T, ioLogik E1210• Supports SNMP protocol.• Added P2P heartbeat function.New FeaturesN/A• This version of firmware only works with ioSearch v1.5 or later versions.• Use the web console when upgrading the firmware from v1.0 to v1.10.Supported Operating SystemsNotesChangesApplicable ProductsBugs Fixed• Ensured that the system works properly after unstable power conditions.N/AEnhancementsN/AioLogik E1210, ioLogik E1210-TN/ANew FeaturesN/AN/ASupported Operating SystemsNotesChangesApplicable ProductsBugs Fixed• Improved firmware upgrading speed.• Removed Modbus/TCP ID checking mechanism.N/AEnhancementsN/AioLogik E1210, ioLogik E1210-T• Added "Locating I/O" function in General Settings.• Added Modbus address function code=0x08 for “ECHO” function.• Counter overflow status displayed in Channel Settings can be cleared manually.New FeaturesN/A• This version of the firmware only works with ioSearch v1.5 or later versions.• Use the web console when upgrading the firmware from v1.0 to v1.9.。
NPC1220压力传感器介绍
NPC-1220 SeriesSolid StatePressure SensorLow-Medium PressureAPPLICATIONS•Industrial automation •Air flow monitors •Process control •Liquid level•Medical equipment •Water measurement•Underground cable leak detection FEATURES•50 mV Full-scale Output •±0.1% accuracy •Interchangeable•Temperature Compensated 0°C to 60°C •PCB mountable package •Media compatible •DIP package•Solid state reliability•Individual device traceabilityPRESSURE RANGES •Gauge and Differential 5, 15, 30, 50 and 100 psi •Absolute15, 30, 50 and 100 psiPackage DiagramThe NPC-1220 series of solid state pressure sensors are designed to provide a cost effective solution for applications that require calibrated performance over a wide temperature range. Packaged in a dual-in-line configuration, the NPC-1220 series is intended for printed circuit board mounting. Optional pressure port and lead configurations give superior flexibility in low profile applications where pressure connection orientation is critical.The NPC-1220 series is based on Lucas NovaSensor ®’s advanced SenStable ® piezoresistive sensing technology. Silicon micromachining techniques are used to ion implant piezoresistive strain gages into a Wheatstone bridge configuration. The NPC-1220 offers the added advantage of superior temperature performance over the temperature compensated range of 0°C to +60°C. A current set resistor is included to normalize the FSO for field interchangeability. Additionally, the NPC-1220 series is available in pressure ranges from 0 to 5 through 0 to 100 psi. Please contact the factory for other pressure ranges.Lead Connection 1- OUT 2- IN 3+OUT 4+IN5, 6Current Set Resistor7, 8No Connection。
SC1202A中文资料
O.T. O.T. O.T. O.T. O.T. O.T. O.T. O.T. 600
% % V mA
10 0.005 55 0.2
13
mA %/°C
90 5.0
µA µA
ã 2000 Semtech Corp.
2
元器件交易网
SC1202 & SC1202A
Typical Application Circuits
Fixed Voltage Regulator
U1 VIN > 4.75V 3 IN
SC1202-3.3 2 TAB OUT
VOUT = 3.3V
+
C1 10uF Tant.
+ GND 1
C2 10uF Tant.
Adjustable Voltage Regulator
U nits V
Fi xed Voltage Opti on Reference Voltage
(1)
VREF
5V
10mA
25°C O.T.
V
Adj. Voltage Versi on Li ne Regulati on (1) Load Regulati on (1) D ropout Voltage DVOUT, DVREF = 1% C urrent Li mi t Qui escent C urrent Fi xed Voltage Versi on Temperature C oeffi ci ent Adjust Pi n C urrent Adjust Pi n C urrent C hange REG(LINE) REG(LOAD) VD ICL IQ TC IADJ DIADJ 5V 5V 10mA
SC1202中文资料
Notes: (1) C1 needed if device is far from filter capacitors (2) C2 minimum value required for stability
Revision 8/30/2000
1
SC1202 & SC1202A
Typical Application Circuits
Fixed Voltage Regulator
U1 VIN > 4.75V 3 IN
SC1202-3.3 2 TAB OUT
VOUT = 3.3V
+
C1 10uF Tant.
+ GND 1
C2 10uF Tant.
Adjustable Voltage Regulator
Pin Descriptions
Pin N umber 1 Pin N ame AD J GND 2 3 OUT IN Pin Function Thi s pi n i s the negati ve si de of the reference voltage for the devi ce. Transi ent response can be i mproved by addi ng a small bypass capaci tor from the adjust pi n to ground. Thi s pi n i s the bottom end of the i nternal resi stor feedback chai n for fi xed output voltage parts, and should be connected to ground. Thi s i s the power output of the devi ce, and i s electri cally connected to the TAB. Thi s i s the i nput supply pi n for the devi ce.
E2EL-X10F12M中文资料(omron)中文数据手册「EasyDatasheet - 矽搜」
E2EL–X4E1–DL 2M E2EL–X4E2–DL 2M E2EL–X4F1–DL 2M E2EL–X4F2–DL 2M
E2EL–X4ME1–L 2M E2EL–X4ME2–L 2M E2EL–X4MF1–L 2M E2EL–X4MF2–L 2M
Байду номын сангаас
E2EL–X5E1 2M E2EL–X5E2 2M E2EL–X5F1 2M E2EL–X5F2 2M
E2EL–X4E1–D 2M E2EL–X4E2–D 2M E2EL–X4F1–D 2M E2EL–X4F2–D 2M
E2EL–X4ME1 2M E2EL–X4ME2 2M E2EL–X4MF1 2M E2EL–X4MF2 2M
E2EL–X2E1–L 2M E2EL–X2E2–L 2M E2EL–X2F1–L 2M E2EL–X2F2–L 2M
1
芯片中文手册,看全文,戳
E2EL
不锈钢外壳
直径
长度
6,5 30 mm 45 mm
M8 30 mm 45 mm
M12 41 mm 53 mm
M18 40 mm 73 mm
插头类型
黄铜外壳
直径 /
触点
长度
6,5 / 插头 M8
M8 / 插头 M8
M8 / 插头 M12
M12 / 插头 M12
45 mm 47 mm 54 mm 56 mm 45 mm 47 mm 54 mm 56 mm 44 mm 46 mm 60 mm 62 mm 49 mm
60 mm
M18 / 53 mm 插头 M12
80 mm
M30 / 插头 M12
55 mm 80 mm
不锈钢外壳
直径 /
1202有标中文说明书-压缩版
3.3推即开功能的使用. . . . . . . . . . . . . . . . .. .……. .…. .….. . . . . . ..14
装箱单. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .…. . . . . . . . .20
第一章产品概述
滑轨式剪刀臂式
ANNY平开门自动门机是采用数字自动控制技术的智能自动化设备。具有优越的性能和强大的功能。
ANNY自动门机既可以连接各种识别身份的门禁设备（银行读卡器、单位磁卡机、刷卡器、指纹识别系统等）。还可以连接楼宇对讲电控门设备、人体感应器、烟感火警设备、机械开关及其他TTL、CMOS控制电路。
或者重新制作加长连杆门洞深度实线为锁门角度为12度的安装方式虚线为锁门角度为7度的安装方式24各种控制设备的接线方式与感应器等开关量输入设备连接与门禁等电信号输入设备连接电源12v电信号停电信号开电信号关电源12v电源12v电锁com电锁nc公共地控制信号2控制信号1地线电源负12vcom12v公共地电锁nc电锁com电源12v电源12v电信号关电信号开电信号停电源12v开门信号信号地2v控制信号1地线电源负12v公共地电锁nc电锁com电源12v电信号关电信号开电信号停电源12v信号地开门信号与出门开关连接com12v电源12v电信号停电信号开电信号关电源12v电锁com电锁nc公共地电源12v信号地开门信号与电锁连接与安全光线连接断电上锁型电锁连接图电源负com通电上锁型电锁连接图12v12v12v12vcom电源负电源12v公共地电锁nc电锁com电源12v电信号关电信号开电信号停电源12v电源12v电信号停电信号开电信号关电源12v电锁com电锁nc公共地电源12v信号地信号地开门信号开门信号地线电源负12v控制信号控制信号控制信号控制信号12v地线电源负公共地电锁nccomcom12v继电器开关信号有电源信号12v电锁com电源12v电源12v电信号关电信号开电信号停电源12v电源12v电信号停电信号开电信号关电源12v电源12v电锁com电锁nc公共地公共地电锁nc电锁com电源12v电源12v电信号关电信号开电信号停电源12v电源12v电信号停电信号开电信号关电源12v电源12v电锁com电锁nc公共地信号地信号地开门信号开门信号25控制端口说明当有其他控制设备需要连接时譬如
美国GENova公司压力传感器.doc
美国GE Nova公司压力传感器NPC系列双列直插结构陶瓷封装芯片GE Nova Sensor公司NPC/410/1210/1220系列，适用于低成本、大批量应用场合；其双列直插结构，方便用于印刷电路板安装；并有多种压力接口和管脚结构供用户选用择。
正如Nova Sensor公司的所有硅压力传感器一样，NPC系列应用于了Senstable压阻传感技术，硅敏感元件采用了先进的离子注入工艺，由上述工艺所形成的高质量惠斯登电桥电路和精密的力学结构，实现了机电一体化转换。
本系列可用于兼容气体介质的绝压、表压、和差压检测，具有优良的性能。
特点：■低成本，可互换性；■双列直插式（PID）结构，可用于印刷电路板（PCB）安装■可测液、气兼容介质■恒流1.5mA供电■具有绝压、表压和差压形式■压力范围：0~2.5KPa到0~700KPa■高精度：±0.1%应用：■医疗设备：血压计、呼吸机和灌注泵■空调、通风设备■气流检测■计算机外围设备■过程控制■电缆泄露检测NPI系列充油隔离芯体GE Nova Sensor 公司NPI系列，将固态集成工艺与隔离膜片技术相结合，扩散硅芯片被封装在充油腔体内，并通过不锈钢膜片和外壳将其与测量介质隔离开来，向用户提供性价比良好的产品。
标准产品提供了多种压力接口，可满足焊接密封和侧密封设计要求正如Nova Sensor 公司的所有硅压力传感器一样，NPI系列应用于了Senstable压阻传感器技术及温度补偿工艺，将温度补偿电阻环路制作在混合陶瓷基片上，在0~70℃的温度补偿范围内，提供了最小的温度误差0.75%(最大值).本系列可广泛应用于气、液压力的检测,基至在恶劣环境下,如：污水、蒸气、弱腐蚀性介质，仍俱有优良的性能。
特点：■固态、高可靠性、高灵敏度■ 316不锈钢隔离膜片，腐蚀性介质可兼容■压力范围：0~17.2KPa到0~35MPa■提供恒流和恒压供电应用:■液、气压力控制系统■自动过程检测和过程控制系统■能源管理、环保及水处理系统■船舶及航海系统■冷冻及制氧设备■柴油机系统■农机设备NPH系列TO-8封装结构芯体GE Novasensor 公司的NPH系列，将集成化的敏感芯片封装于标准的TO-8型电子外壳内，便于安装到印制线路板上，是具有良好性价比的产品。
- 1、下载文档前请自行甄别文档内容的完整性，平台不提供额外的编辑、内容补充、找答案等附加服务。
- 2、"仅部分预览"的文档,不可在线预览部分如存在完整性等问题,可反馈申请退款(可完整预览的文档不适用该条件!)。
- 3、如文档侵犯您的权益，请联系客服反馈,我们会尽快为您处理(人工客服工作时间：9:00-18:30)。
Specifications are subject to change without notice (20.08.01)1Proximity Sensors Inductive Stainless Steel HousingTypes EI, DC, M12, M18, M30•Stainless steel housing, cylindrical •Diameter: M12, M18, M30•Short or long versions•Sensing distance: 2 to 15 mm •Power supply:10 to 40 VDC•Output:Transistor NPN/PNP , make or break switching •Protection: Short-circuit and reverse polarity •LED-indication for output ON •2 m cable or plug M12Product Descriptiondard stainless steel hou sing.Made after Eu ronorm EN 50008.Proximity switch in hou sings ranging from M12 to M30.Short or long versions in stan-Type Selection DC Types, Cable and M12 PlugHousing Body Connec-Rated Ordering no.Ordering no.Ordering no.Ordering no.diameter style tion operating Transistor NPN Transistor NPN Transistor PNP Transistor PNP dist. (S n )Make switching Break switching Make switching Break switching M12Short Cable 2 mm 1)EI 1202 NPOSS EI 1202 NPCSS EI 1202 PPOSS EI 1202 PPCSS M12Short Plug 2 mm 1)EI 1202 NPOSS-1EI 1202 NPCSS-1EI 1202 PPOSS-1EI 1202 PPCSS-1M12Long Cable 2 mm 1)EI 1202 NPOSL EI 1202 NPCSL EI 1202 PPOSL EI 1202 PPCSL M12Long Plug 2 mm 1)EI 1202 NPOSL-1EI 1202 NPCSL-1EI 1202 PPOSL-1EI 1202 PPCSL-1M12Short Cable 4 mm 2)EI 1204 NPOSS EI 1204 NPCSS EI 1204 PPOSS EI 1204 PPCSS M12Short Plug 4 mm 2)EI 1204 NPOSS-1EI 1204 NPCSS-1EI 1204 PPOSS-1EI 1204 PPCSS-1M12Long Cable 4 mm 2)EI 1204 NPOSL EI 1204 NPCSL EI 1204 PPOSL EI 1204 PPCSL M12Long Plug 4 mm 2)EI 1204 NPOSL-1EI 1204 NPCSL-1EI 1204 PPOSL-1EI 1204 PPCSL-1M18Short Cable 5 mm 1)EI 1805 NPOSS EI 1805 NPCSS EI 1805 PPOSS EI 1805 PPCSS M18Short Plug 5 mm 1)EI 1805 NPOSS-1EI 1805 NPCSS-1EI 1805 PPOSS-1EI 1805 PPCSS-1M18Long Cable 5 mm 1)EI 1805 NPOSL EI 1805 NPCSL EI 1805 PPOSL EI 1805 PPCSL M18Long Plug 5 mm 1)EI 1805 NPOSL-1EI 1805 NPCSL-1EI 1805 PPOSL-1EI 1805 PPCSL-1M18Short Cable 8 mm 2)EI 1808 NPOSS EI 1808 NPCSS EI 1808 PPOSS EI 1808 PPCSS M18Short Plug 8 mm 2)EI 1808 NPOSS-1EI 1808 NPCSS-1EI 1808 PPOSS-1EI 1808 PPCSS-1M18Long Cable 8 mm 2)EI 1808 NPOSL EI 1808 NPCSL EI 1808 PPOSL EI 1808 PPCSL M18Long Plug 8 mm 2)EI 1808 NPOSL-1EI 1808 NPCSL-1EI 1808 PPOSL-1EI 1808 PPCSL-1M30Short Cable 10 mm 1)EI 3010 NPOSS EI 3010 NPCSS EI 3010 PPOSS EI 3010 PPCSS M30Short Plug 10 mm 1)EI 3010 NPOSS-1EI 3010 NPCSS-1EI 3010 PPOSS-1EI 3010 PPCSS-1M30Long Cable 10 mm 1)EI 3010 NPOSL EI 3010 NPCSL EI 3010 PPOSL EI 3010 PPCSL M30Long Plug 10 mm 1)EI 3010 NPOSL-1EI 3010 NPCSL-1EI 3010 PPOSL-1EI 3010 PPCSL-1M30Short Cable 15 mm 2)EI 3015 NPOSS EI 3015 NPCSS EI 3015 PPOSS EI 3015 PPCSS M30Short Plug 15 mm 2)EI 3015 NPOSS-1EI 3015 NPCSS-1EI 3015 PPOSS-1EI 3015 PPCSS-1M30Long Cable 15 mm 2)EI 3015 NPOSL EI 3015 NPCSL EI 3015 PPOSL EI 3015 PPCSL M30LongPlug15 mm 2)EI 3015 NPOSL-1EI 3015 NPCSL-1EI 3015 PPOSL-1EI 3015 PPCSL-11)For flush mounting in metal Make switching = Normally Open (NO)2)For non-flush mounting in metal Break switching = Normally Closed (NC)EI, DC, M12, M18, M30SpecificationsDimensionsType A B C D E F G H I SW K LØ mm mm mm mm mm mm mm mm mmØ mmØ mm EI 1202 XPXSS M12 x 1 x 3010.73011 5.0417EI 1202 XPXSL M12 x 1 x 5010.75011 5.0417EI 1202 XPXSS-1M12 x 1 x 3010.73012.611.9417EI 1202 XPXSL-1M12 x 1 x 5010.75012.611.9417EI 1204 XPXSS M12 x 1 x 3010.73411 5.0417EI 1204 XPXSL M12 x 1 x 5010.75411 5.0417EI 1204 XPXSS-1M12 x 1 x 3010.73412.611.9417EI 1204 XPXSL-1M12 x 1 x 5010.75412.611.9417EI 1805 XPXSS M18 x 1 x 3016.73011.615.4424EI 1805 XPXSL M18 x 1 x 5016.75011.615.4424EI 1805 XPXSS-1M18 x 1 x 3016.73013.111.9424EI 1805 XPXSL-1M18 x 1 x 5016.75013.111.9424EI 1808 XPXSS M18 x 1 x 3016.73811.615.4424EI 1808 XPXSL M18 x 1 x 5016.75811.615.4424EI 1808 XPXSS-1M18 x 1 x 3016.73813.111.9424EI 1808 XPXSL-1M18 x 1 x 5016.75813.111.9424EI 3010 XPXSS M30 x 1.5 x 30283013.615.4536EI 3010 XPXSL M30 x 1.5 x 50285013.615.4536EI 3010 XPXSS-1M30 x 1.5 x 30283013.611.9536EI 3010 XPXSL-1M30 x 1.5 x 50285013.611.9536EI 3015 XPXSS M30 x 1.5 x 30284213.615.4536EI 3015 XPXSL M30 x 1.5 x 50286213.615.4536EI 3015 XPXSS-1M30 x 1.5 x 30284213.611.9536EI 3015 XPXSL-1M30 x 1.5 x 50286213.611.95362Specifications are subject to change without notice (20.08.01)Specifications are subject to change without notice (20.08.01)3Power SuppliesPower supplies VDC:> SS 130/140.Power supplies with amplifier relays:> SV 190.Dimensions (cont.)Wiring DiagramsInstallation HintsRelief of cable strainProtection of the sensing faceSwitch mounted on mobile carrierTo avoid interference from inductive voltage/current peaks, separate the prox. switch pow-er cables from any other power cables, e.g.motor, contactor or solenoid cablesIncorrectCorrectThe cable should not be pulledA proximity switch should not serve as mechanical stopAny repetitive flexing of the cable should be avoidedEI, DC, M12, M18, M30。