PYX28C64-35CWMB中文资料

PIN CONFIGURATIONS
FUNCTIONAL BLOCK DIAGRAM
DIP (C5-1)
L1C51C9B (L6)
Document # EEPROM101 REV B Revised July 2007
1
元器件交易网
PYX28C64
MAXIMUM RATINGS(1)
10
10
tOHQZ Output Disable to Output in High Z
80
80
tAVQX Output Hold from Address Change
0
0
tPU Chip Enable to Power Up Time
250
250
tPD Chip Disable to Power Down Time
___
60
mA
Notes:
1. Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to MAXIMUM rating conditions for extended periods may affect reliability.
tEHWH CE Hold Time
tWHOH OE Hold Time
tOHAV Erase Time
tWLWH2 Chip Erase Time
VH High Voltage for Chip Clear
-200 Min Max
10
20
150
0 0 20 20 150
50
10
0.2 2 1 1 1 1 200 150 12 13
元器件交易网
PYX28C64 8K x 8 EEPROM
FEATURES
Access Times of 200, 250, 300 and 350 ns
Single 5V±10% Power Supply
Simple Byte and Page Write
Low Power CMOS: - 60 mA Active Current - 200 µA Standby Current
OH (TTLLoad)
I = –4 mA, V = Min.
OH
CC
2.4
V
ILI Input Leakage Current
ILO Output Leakage Current
ISB
Standby Power Supply Current (TTL Input Levels)
VCC = Max.
VCC = 5.0V, TA = 25°C, f = 1.0MHz
Symbol Parameter Conditions Typ. Unit
C IN
COUT
Input Capacitance VIN = 0V 10 pF Output Capacitance VOUT = 0V 10 pF
DC ELECTRICAL CHARACTERISTICS
Over recommended operating temperature and supply voltage(2)
Symbol
Parameter
Test Conditions
VIH Input High Voltage
VIL Input Low Voltage
VHC CMOS Input High Voltage VLC CMOS Input Low Voltage
50
50
-300 Min Max 300
300 300 100 10 80 10 80 0 250 50
-350
Unit
Min Max
350
ns
350 ns
350 ns
100 ns
10
ns
80 ns
10
ns
80 n
50 ns
TIMING WAVEFORM OF READ CYCLE
V = GND to V
IN
CC
VCC = Max., CE = VIH,
V = GND to V
OUT
CC
CE ≥ VIH, OE = VIL, V = Max,
CC
f = Max., Outputs Open
–10
+10
µA
–10
+10
µA
___
3
mA
Standby Power Supply ISB1 Current
Fast Write Cycle Times
DESCRIPTION
The PYX28C64 is a 5 Volt 8Kx8 EEPROM using floating gate CMOS Technology. The device supports 64-byte page write operation. The PYX28C64 features DATA and Toggle Bit Polling as well as a system software scheme used to indicate early completion of a Write Cycle. The device also includes user-optional software data protection. Endurance is 10,000 or 100,000 Cycles and Data Retention is 100 Years. The device is available in a 32-Pin LCC package as well as a 28-Pin 600 mil wide Ceramic DIP.
PYX28C64
TIMING WAVEFORM OF BYTE WRITE CYCLE (WE CONTROLLED)
200
250
tOLQV Output Enable Access Time
100
100
tELQX Chip Enable to Output in Low Z
10
10
tEHQZ Chip Disable to Output in High Z
80
80
tOLQX Output Enable to Output in Low Z
(CMOS Input Levels)
CE ≥ VHC, VCC= Max, f = 0, Outputs Open
VIN ≤ VLC or VIN ≥ VHC
___
250
µA
I
Supply Current
CC
CE = OE = VIL, WE = VIH, All I/O's = Open,
Inputs = VCC = 5.5V
tWHWL1 Write Cycle Time tEHEL1
tAVEL Address Setup Time tAVWL
tELAX tWLAX
Address Hold Time
tWLEL tELWL
Write Setup Time
tWHEH Write Hold Time
tOHEL tOHWL
OE Setup Time
–65 to +150 °C
1.0
W
50
mA
RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE
Grade(2) Military
Ambient Temperature
–55°C to +125°C
GND 0V
VCC 5.0V ± 10%
CAPACITANCES(4)
150
ns
0
ns
0
ns
20
ns
20
ns
150
ns
50
ns
10
ns
0.2 2 µs
1
µs
1
µs
1
µs
1
µs
200
ms
150
ns
12 13 V
Document # EEPROM101 REV B
Page 4 of 11
元器件交易网 TIMING WAVEFORM OF BYTE WRITE CYCLE (CE CONTROLLED)
-250 Min Max
10
20
150
0 0 20 20 150
50
10
0.2 2 1 1 1 1 200 150 12 13
-300 Min Max
10
20
150
0 0 20 20 150
50
10
0.2 2 1 1 1 1 200 150 12 13
-350
Unit
Min Max
10 ms
20
ns
Software Data Protection Fully TTL Compatible Inputs and Outputs Endurance: 10,000 or 100,000 Cycles Data Retention: 100 Years Available in the following Packages: – 32-Pin Ceramic LCC (450 x 550 mils) – 28-Pin 600 mil Ceramic DIP