Linear optical setups for active and passive quantum error correction in polarization encod

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ZEISS PRESBYOND 激光混合视力矫正手册说明书

Customized. All distances. Immediate.* I n r e f e r e n c e t o c l i n i c a l o u t c o m e s a s c o m p a r e d t o m o n o v i s i o n . D a t a o n f i l e .Blending vision into better outcomes *.ZEISS PRESBYOND Laser Blended VisionZEISS PRESBYOND Laser Blended Vision A clear choice for patients with presbyopiaPRESBYOND ® Laser Blended Vision from ZEISS is an advanced method for treatingpatients with age-related loss of accommodation, also known as presbyopia. It offers the opportunity to achieve freedom from glasses by combining the simplicity and accuracy of corneal refractive surgery with the benefits of increased depth of field in retaining visual quality. As a surgical solution based on the naturally occurring spherical aberrations of the eye, this ZEISS software extends the scope of customized ablation beyond the limits of conventional monovision laser methods in several ways.Whether for its customized treatment profiles, its visual acuity at all distances, its indications range or its immediate impact, ZEISS PRESBYOND Laser Blended Vision is a clear treatment choice for the fast growing demographic of patients with presbyopia.ZEISS PRESBYOND Laser Blended Vision Customized. All distances. Immediate.ZEISS PRESBYOND Laser Blended Vision lets you greatly expand your ZEISS MEL ® 80 or MEL 90 excimer laser treatmentrepertoire and your patient base354Conventional monovisionWith conventional monovision treatment methods, the dominant eye is corrected for distance vision to almost plano while the non-dominant eye is corrected for near vision, usually up to -3.0 D. Optimal vision is achieved at distance and near range, requiring the brain to contend with two separate images at different levels of correction which not all patients cantolerate.Patients that do tolerate the method are left with an uncorrected gap in the intermediate range, the so-called “Blur Zone.” In addition to the fuzzy image, it can also cause other side effects such as reduced contrast sensitivity and stereoacuity.ZEISS PRESBYOND Laser Blended Vision As a physiologically optimized laser treatment method for patients with presbyopia, ZEISS PRESBYOND Laser Blended Vision represents the next stage in eye care excellence. Similar to conventional monovision, the dominant eye is corrected for distance vision to almost plano, whereas the non-dominant eye is corrected to be slightly myopic for near vision to -1.5 D. This micro-monovision strategy is further enhanced by a decisive difference: an increase in the depth of field of each eye using a wavefront-optimized ablation profile to create a continuous refractive power gradient for the whole optical zone of the cornea. This ZEISS software is an absolutely individualized treatment plan based on the preoperative spherical aberrations and the functional age of the eye. As a result, a customized fusion of the two images for near and distance vision is created for each patient – the so-called “Blend Zone.”Although similar to conventional monovision laser methods in terms of the workflow, ZEISS PRESBYOND ® Laser Blended Vision takes customized vision correction a step beyond, particularly with respect to the outcomes.Next-level vision correction beyond conventional monovisionThe unique Blend ZoneEssentially, the Blend Zone makes it easier for the brain to merge the images of both eyes, thereby achieving true binocular vision. In addition to excellent near and far vision, ZEISS PRESBYOND Laser Blended Vision patients also experience very good visual acuity and contrast sensitivity in the intermediate range.No increase in depth of fieldDominant eye±0.0 DNon-dominant eyeup to -3.0 DDISTANCEIncrease in depth of fieldIncrease in depth of fieldDominant eye±0.0 DNon-dominant eye-1.5 DNEARDISTANCENEAR67All distancesCustomizedImmediateOptimizing outcomes for patients with presbyopiaZEISS PRESBYOND Laser Blended VisionIndividualized ablationsZEISS PRESBYOND ® Laser Blended Vision is a truly customized solution for treating presbyopic patients. It incorporates preoperative wavefront data to fine-tune the depth of field for each eye individually. The functional age of the eye is also factored in. As a result, a personalized ablation profile is created per eye for optimized target refraction. The monovision component can be pre-adjusted for the patient’s tolerance level. Also, different optical zone sizes can be selected to account for the patient’s pupil size.Ideal for a growing demographic As an optimized laser method for age-related accommodation loss, ZEISS PRESBYOND Laser Blended Vision is ideally suited for serving the needs of patients 40-60 years of age – a fast-growing demographic group interested in sophisticated options. It is also one of the least invasive methods for addressing this target group.Familiar procedureFollowing the same workflow as conventional LASIK procedures, ZEISS PRESBYOND Laser Blended Vision combines the convenient binocular treatment planning of the CRS-Master ® with the proven comfort and workflow of the MEL ® 80 or MEL 90 excimer laser, all from ZEISS.Outstanding visual acuityBy customizing each eye individually,ZEISS PRESBYOND Laser Blended Vision provides excellent visual acuity for near and distance vision. Unlike traditional monovision methods, PRESBYOND Laser Blended Vision also offers good intermediate vision in the Blend Zone. According to clinical studies, there is virtually no loss of contrast sensitivity while stereoacuity is maintained. Also, side effects such as multiple images in one eye are almost eliminated.An all-natural approachZEISS PRESBYOND Laser Blended Vision is a physiologically optimized solution and a true binocular method for treating patients with presbyopia.Wide indication rangeZEISS PRESBYOND Laser Blended Vision is a proven and effective method for treating indications ranging from -8.0 D to +2.0 D, includingemmetropic and astigmatic patients (up to +2.0 cyl).Appropriate for most patientsA key advantage of ZEISS PRESBYOND Laser Blended Vision is that it is proven to be tolerated by more patients than conventional monovision. It is effective for treating up to 97% of all presbyopia-related forms of impairment as compared to only 59–67% for conventional monovision. Even patients with presbyopia also affected by emmetropia and astigmatism can be treated. In fact, it has the potential to achieve a far greater success rate than any comparable treatment along with giving patients the wow effect of being able to read without glasses the very same day. Thus, it positively impacts patients and refractive surgeons alike – visually for the former, economically for the latter.1-5 A competitive edgeZEISS PRESBYOND Laser Blended Vision allows practices already using a MEL 80 or MEL 90 excimer laser and CRS-Master from ZEISS to significantly expand their LASIK repertoire and increase the patient base. As such, this ZEISS software offers a decisive competitive advantage over other LASIK practices only specializing in monovision treatment methods.MEL 80 and MEL 90 from ZEISSType ArF excimer laser Wavelength 193 nmFrequency MEL 80: 250 HzMEL 90: FLEXIQUENCE ® 250 Hz / 500 Hz Dimensions (W x D x H)MEL 80:1550 mm x 800 mm x 1490 mmMEL 80 with patient supporting system: 3140 mm x 1800 mm x 1490 mm MEL 90:1360 mm x 730 mm x 1480 - 1700 mm MEL 90 with patient supporting system: 3230 mm x 2380 mm x 1700 mmSurgical microscope OPMI ® pico from ZEISS with integratedHD video camera Active eye trackerInfrared, pupil and limbus tracking, 1050 frames per second (fps), manual ablation center selection, automatic Pupil Center Shift Correction Beam dimensions0.7 mm FWHM (full width at half maximum), Gaussian beam profileVisuMax from ZEISSSystem components Patient supporting system, including platformIntegrated uninterruptible power supply (UPS)Surgical microscope with additional slit illumination Video camera with integrated recording Femtosecond laser parametersWavelength 1043 nm Laser pulse rate 500 kHzRecommended space requirements 180° setup with MEL 80 / MEL 90:4500 x 3800 mm90° setup with MEL 80 / MEL 90:4000 x 4000 mm89A perfect combination:The refractive system landscape of ZEISSTechnical dataDimensions (W x D x H)Max. 1060 x 420 x 1510 mmData transfer USB flash memory drive (USB memory stick)Data printoutVia network connection with Ethernet cable and optional network isolatorReferencesClaims made in this document are supported by information provided in the following publications:1. Reinstein DZ, Couch DG, Archer TJ. LASIK for Hyperopic Astigmatism and Presbyopia Using Micro-monovision With the Carl Zeiss Meditec MEL 80. J Refract Surg. 2009;25(1):37-58.2. Reinstein DZ, Archer TJ, Gobbe M. LASIK for Myopic Astigmatism and Presbyopia Using Non-Linear Aspheric Micro-Monovision with the Carl Zeiss Meditec MEL 80 Platform. J Refract Surg. 2011;27(1):23-37.3. Reinstein DZ, Carp GI, Archer TJ, Gobbe M. LASIK for the correction of presbyopia in emmetropic patients using aspheric ablation profiles and a micro-monovision protocol with the Carl Zeiss Meditec MEL 80 and VisuMax. J Refract Surg. 2012 [In Press].4. Reinstein DZ, Archer TJ, Gobbe M. Stereoacuity after Corneal Presbyopic LASIK in Myopic, Hyperopic and Emmetropic Patients. ESCRS Annual Meeting, Vienna, September 2011.5. Evans BJ. Monovision: a review. Ophthalmic Physiol Opt. 2007;27(5):417-439.CRS-Master from ZEISSSimple upgradePRESBYOND ® Laser Blended Vision is an optional software upgrade for the CRS-Master ® from ZEISS. It forms a perfect fit with the ZEISS MEL ® 80 or MEL 90 excimer laser, expanding the repertoire of customized refractive laser corrections far beyond the limits of conventional monovision methods.PRESBYOND Laser Blended Vision and CRS-Master from ZEISS are not intended for sale in the United States.Laser warning sign MEL 80/90Laser warning sign VisuMaxPrecise flapsThe ZEISS VisuMax ® creates flaps of a highly predictable thickness and of adjustable geometries for Femto-LASIK and ZEISS PRESBYOND Laser Blended Vision – the recommended treatment option for patients with presbyopia.Carl Zeiss Meditec AG Goeschwitzer Strasse 51–52 07745 JenaGermany/contacts /presbyond EN_34_1_3IIIPrintedinGermanyCZ-IX/217Thecontentsofthebrochuremaydifferfromthecurrentstatusofapprovaloftheproductorserviceofferinginyourcountry.Pleasecontactourregionalrepresentativesformoreinformation.Subjecttochangesindesignandscopeofdeliveryandduetoongoingtechnicaldevelopment.PRESBYOND,CRS-Master,MELandVisuMaxareeithertrademarksorregisteredtrademarksofCarlZeissMeditecAGorothercompaniesoftheZEISSGroup.©CarlZeissMeditecAG,217.Allrightsreserved.0297。

TSL1401R-LF资料

D 128 × 1 Sensor-Element Organization D 400 Dots-Per-Inch (DPI) Sensor Pitch D High Linearity and UniformityD Wide Dynamic Range ...4000:1 (72 dB)D Output Referenced to Ground D Low Image Lag ...0.5% Typ D Operation to 8 MHzD Single 3-V to 5-V SupplyD Rail-to-Rail Output Swing (AO)D No External Load Resistor RequiredD Replacement for TSL1401 and TSL1401R DRoHS CompliantDescriptionThe TSL1401R −LF linear sensor array consists of a 128 × 1 array of photodiodes, associated charge amplifier circuitry, and an internal pixel data-hold function that provides simultaneous-integration start and stop times for all pixels. The pixels measure 63.5 μm (H) by 55.5 μm (W) with 63.5-μm center-to-center spacing and 8-μm spacing between pixels. Operation is simplified by internal control logic that requires only a serial-input (SI)signal and a clock.Functional Block DiagramNC − No internal connection8 NC 7 GND 6 GND 5 NCDIP PACKAGE (TOP VIEW)SI 1CLK 2AO 3V DD 4TSL1401R−LF128 × 1 LINEAR SENSOR ARRAY WITH HOLDTerminal FunctionsTERMINAL NAME NO.DESCRIPTIONAO 3Analog output.CLK 2Clock. The clock controls charge transfer, pixel output, and reset.GND 6, 7Ground (substrate). All voltages are referenced to the substrate.NC 5, 8No internal connection.SI 1Serial input. SI defines the start of the data-out sequence.V DD4Supply voltage. Supply voltage for both analog and digital circuits.Detailed DescriptionThe sensor consists of 128 photodiodes arranged in a linear array. Light energy impinging on a photodiode generates photocurrent, which is integrated by the active integration circuitry associated with that pixel.During the integration period, a sampling capacitor connects to the output of the integrator through an analog switch. The amount of charge accumulated at each pixel is directly proportional to the light intensity and the integration time.The output and reset of the integrators is controlled by a 128-bit shift register and reset logic. An output cycle is initiated by clocking in a logic 1 on SI. For proper operation, after meeting the minimum hold time condition,SI must go low before the next rising edge of the clock. An internal signal, called Hold, is generated from the rising edge of SI and transmitted to analog switches in the pixel circuit. This causes all 128 sampling capacitors to be disconnected from their respective integrators and starts an integrator reset period. As the SI pulse is clocked through the shift register, the charge stored on the sampling capacitors is sequentially connected to a charge-coupled output amplifier that generates a voltage on analog output AO. Simultaneously, during the first 18 clock cycles, all pixel integrators are reset, and the next integration cycle begins on the 19th clock. On the 129th clock rising edge, the SI pulse is clocked out of the shift register and the analog output AO assumes a high impedance state. Note that this 129th clock pulse is required to terminate the output of the 128th pixel, and return the internal logic to a known state. If a minimum integration time is desired, the next SI pulse may be presented after a minimum delay of t qt (pixel charge transfer time) after the 129th clock pulse.AO is an op amp-type output that does not require an external pull-down resistor. This design allows a rail-to-rail output voltage swing. With V DD = 5 V, the output is nominally 0 V for no light input, 2 V for normal white level, and 4.8 V for saturation light level. When the device is not in the output phase, AO is in a high-impedance state.The voltage developed at analog output (AO) is given by:V out = V drk + (R e ) (E e )(t int )where:V out is the analog output voltage for white condition V drk is the analog output voltage for dark conditionR e is the device responsivity for a given wavelength of light given in V/(μJ/cm 2)E e is the incident irradiance in μW/cm 2t intis integration time in secondsA 0.1 μF bypass capacitor should be connected between V DD and ground as close as possible to the device.The TSL1401R −LF is intended for use in a wide variety of applications, including: image scanning, mark and code reading, optical character recognition (OCR) and contact imaging, edge detection and positioning, and optical linear and rotary encoding.TSL1401R−LF128 × 1 LINEAR SENSOR ARRAY WITH HOLDTAOS076B − APRIL 2007Absolute Maximum Ratings †Supply voltage range, V DD −0.3 V to 6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range, V I −0.3 V to V DD + 0.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input clamp current, I IK (V I < 0) or (V I > V DD ) −20 mA to 20 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output clamp current, I OK (V O < 0 or V O > V DD ) −25 mA to 25 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage range applied to any output in the high impedance or power-off state, V O −0.3 V to V DD + 0.3 V . . . Continuous output current, I O (V O = 0 to V DD ) −25 mA to 25 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous current through V DD or GND −40 mA to 40 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog output current range, I O −25 mA to 25 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum light exposure at 638 nm 5 mJ/cm 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating free-air temperature range, T A −25°C to 85°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, T stg −25°C to 85°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ‡ 260°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ESD tolerance, human body model 2000 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . †Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “Recommended Operating Conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.‡Not recommended for solder reflow.Recommended Operating Conditions (see Figure 1 and Figure 2)MINNOMMAX UNIT Supply voltage, V DD 355.5V Input voltage, V I0V DD V High-level input voltage, V IH 2V DD V Low-level input voltage, V IL 00.8V Wavelength of light source, λ4001000nm Clock frequency, f clock58000kHz Sensor integration time, t int (see Note 1)0.03375100ms Setup time, serial input, t su(SI)20ns Hold time, serial input, t h(SI) (see Note 2)0ns Operating free-air temperature, T A70°CNOTES: 1.Integration time is calculated as follows:t int(min) = (128 − 18) y clock period + 20 m swhere 128 is the number of pixels in series, 18 is the required logic setup clocks, and 20 m s is the pixel charge transfer time (t qt )2.SI must go low before the rising edge of the next clock pulse.TSL1401R−LF128 × 1 LINEAR SENSOR ARRAY WITH HOLDTAOS076B − APRIL 2007Electrical Characteristics at f clock = 1 MHz, V DD = 5 V, T A = 25°C, λp = 640 nm, t int = 5 ms,R L = 330 Ω, E e = 11 μW/cm 2 (unless otherwise noted) (see Note 3)PARAMETERTEST CONDITIONS MIN TYP MAX UNIT V out Analog output voltage (white, average over 128 pixels)See Note 4 1.62 2.4V V drk Analog output voltage (dark, average over 128 pixels)E e = 000.10.2VPRNUPixel response nonuniformity See Note 5±4%±7.5%Nonlinearity of analog output voltage See Note 6±0.4%FS Output noise voltageSee Note 71mVrms R e ResponsivitySee Note 8253545V/(μJ/cm 2)V DD = 5 V, R L = 330 Ω 4.5 4.8V sat Analog output saturation voltage V DD = 3 V, R L = 330 Ω 2.5 2.8V V DD = 5 V, See Note 9136nJ/cm SE Saturation exposure V DD = 3 V, See Note 9782DSNU Dark signal nonuniformity All pixels, E e = 0, See Note 100.020.05V IL Image lag See Note 110.5%V DD = 5 V, E e = 0 2.8 4.5I DD Supply current V DD = 3 V, E e = 0 2.64.5mA I IH High-level input current V I = V DD 1μA I IL Low-level input current V I = 01μA C iInput capacitance5pFNOTES: 3.All measurements made with a 0.1 μF capacitor connected between V DD and ground.4.The array is uniformly illuminated with a diffused LED source having a peak wavelength of 640 nm.5.PRNU is the maximum difference between the voltage from any single pixel and the average output voltage from all pixels of thedevice under test when the array is uniformly illuminated at the white irradiance level. PRNU includes DSNU.6.Nonlinearity is defined as the maximum deviation from a best-fit straight line over the dark-to-white irradiance levels, as a percentof analog output voltage (white).7.RMS noise is the standard deviation of a single-pixel output under constant illumination as observed over a 5-second period.8.R e(min) = [V out(min) − V drk(max)] ÷ (E e × t int )9.SE(min) = [V sat(min) − V drk(min)] × 〈E e × t int ) ÷ [V out(max) − V drk(min)]10.DSNU is the difference between the maximum and minimum output voltage for all pixels in the absence of illumination.11.Image lag is a residual signal left in a pixel from a previous exposure. It is defined as a percent of white-level signal remaining aftera pixel is exposed to a white condition followed by a dark condition:IL +V out (IL)*V drkV out (white)*V drk100Timing Requirements (see Figure 1 and Figure 2)MINNOMMAXUNIT t su(SI)Setup time, serial input (see Note 12)20ns t h(SI)Hold time, serial input (see Note 12 and Note 13)0ns t w Pulse duration, clock high or low 50ns t r , t f Input transition (rise and fall) time 0500ns t qtPixel charge transfer time20μsNOTES:12.Input pulses have the following characteristics: t r = 6 ns, t f = 6 ns.13.SI must go low before the rising edge of the next clock pulse.Dynamic Characteristics over recommended ranges of supply voltage and operating free-air temperature (see Figures 7 and 8)PARAMETERTEST CONDITIONS MINTYP MAXUNIT t sAnalog output settling time to ±1%R L = 330 Ω,C L = 10 pF120nsTSL1401R−LF128 × 1 LINEAR SENSOR ARRAY WITH HOLDTAOS076B − APRIL 2007TYPICAL CHARACTERISTICSCLKSIAOInternal ResetIntegrationFigure 1. Timing WaveformsAOCLKt Figure 2. Operational WaveformsTSL1401R−LF128 × 1 LINEAR SENSOR ARRAY WITH HOLDTAOS076B − APRIL 2007TYPICAL CHARACTERISTICSFigure 3PHOTODIODE SPECTRAL RESPONSIVITYλ − Wavelength − nm4005006007008009001000110030000.20.40.60.81R e l a t i v e R e s p o n s i v i t yFigure 4NORMALIZED IDLE SUPPLY CURRENTvsFREE-AIR TEMPERATURET A − Free-Air Temperature − °C1030407060I D D — N o r m a l i z e d I d l e S u p p l y C u r r e n t00.511.522050Figure 5WHITE OUTPUT VOLTAGEvsFREE-AIR TEMPERATURET A − Free-Air Temperature − °C00.511.52V o u t — O u t p u t V o l t a g e — V10304070602050Figure 6DARK OUTPUT VOLTAGEvsFREE-AIR TEMPERATURET A − Free-Air Temperature − °C0.060.080.10V o u t — O u t p u t V o l t a g e103040706020500.070.09TSL1401R−LF128 × 1 LINEAR SENSOR ARRAY WITH HOLDTAOS076B − APRIL 2007TYPICAL CHARACTERISTICSFigure 7SETTLING TIMEvs.LOADR L — Load Resistance − WS e tt l i n g T i m e t o 1% — n s100200300400500600Figure 8SETTLING TIMEvs.LOADR L — Load Resistance − WS e tt l i n g T i m e t o 1% — n s2004006008001000100200300400500600TSL1401R−LF128 × 1 LINEAR SENSOR ARRAY WITH HOLDTAOS076B − APRIL 2007APPLICATION INFORMATIONIntegration TimeThe integration time of the linear array is the period during which light is sampled and charge accumulates on each pixel’s integrating capacitor. The flexibility to adjust the integration period is a powerful and useful feature of the TAOS TSL14xx linear array family. By changing the integration time, a desired output voltage can be obtained on the output pin while avoiding saturation for a wide range of light levels.The integration time is the time between the SI (Start Integration) positive pulse and the HOLD positive pulse minus the 18 setup clocks. The TSL14xx linear array is normally configured with the SI and HOLD pins tied together. This configuration will be assumed unless otherwise noted. Sending a high pulse to SI (observing timing rules for setup and hold to clock edge) starts a new cycle of pixel output and integration setup. However,a minimum of (n +1) clocks, where n is the number of pixels, must occur before the next high pulse is applied to SI. It is not necessary to send SI immediately on/after the (n +1) clocks. A wait time adding up to a maximum total of 100 ms between SI pulses can be added to increase the integration time creating a higher output voltage in low light applications.Each pixel of the linear array consists of a light-sensitive photodiode. The photodiode converts light intensity to a voltage. The voltage is sampled on the Sampling Capacitor by closing switch S2 (position 1) (see the Functional Block Diagram on page 1). Logic controls the resetting of the Integrating Capacitor to zero by closing switch S1 (position 2).At SI input, all of the pixel voltages are simultaneously scanned and held by moving S2 to position 2 for all pixels.During this event, S2 for pixel 1 is in position 3. This makes the voltage of pixel 1 available on the analog output.On the next clock, S2 for pixel 1 is put into position 2 and S2 for pixel 2 is put into position 3 so that the voltage of pixel 2 is available on the output.Following the SI pulse and the next 17 clocks after the SI pulse is applied, the S1 switch for all pixels remains in position 2 to reset (zero out) the integrating capacitor so that it is ready to begin the next integration cycle.On the rising edge of the 19th clock, the S1 switch for all the pixels is put into position 1 and all of the pixels begin a new integration cycle.The first 18 pixel voltages are output during the time the integrating capacitor is being reset. On the 19th clock following an SI pulse, pixels 1 through 18 have switch S2 in position 1 so that the sampling capacitor can begin storing charge. For the period from the 19th clock through the n th clock, S2 is put into position 3 to read the output voltage during the n th clock. On the next clock the previous pixel S2 switch is put into position 1 to start sampling the integrating capacitor voltage. For example, S2 for pixel 19 moves to position 1 on the 20th clock. On the n +1clock, the S2 switch for the last (n th ) pixel is put into position 1 and the output goes to a high-impedance state.If a SI was initiated on the n +1 clock, there would be no time for the sampling capacitor of pixel n to charge to the voltage level of the integrating capacitor. The minimum time needed to guarantee the sampling capacitor for pixel n will charge to the voltage level of the integrating capacitor is the charge transfer time of 20 μs.Therefore, after n +1 clocks, an extra 20 μs wait must occur before the next SI pulse to start a new integration and output cycle.The minimum integration time for any given array is determined by time required to clock out all the pixels in the array and the time to discharge the pixels. The time required to discharge the pixels is a constant.Therefore, the minimum integration period is simply a function of the clock frequency and the number of pixels in the array. A slower clock speed increases the minimum integration time and reduces the maximum light level for saturation on the output. The minimum integration time shown in this data sheet is based on the maximum clock frequency of 8 MHz.TSL1401R−LF128 × 1 LINEAR SENSOR ARRAY WITH HOLDTAOS076B − APRIL 2007APPLICATION INFORMATIONThe minimum integration time can be calculated from the equation: T int(min)+ǒ1maximum clock frequency Ǔ (n *18) pixels )20m swhere:nis the number of pixelsIn the case of the TSL1401R −LF with the maximum clock frequency of 8 MHz, the minimum integration timewould be:T int(min)+0.125 m s (128*18))20 m s +33.75 m sIt is good practice on initial power up to run the clock (n +1) times after the first SI pulse to clock out indeterminate data from power up. After that, the SI pulse is valid from the time following (n +1) clocks. The output will go into a high-impedance state after the n +1 high clock edge. It is good practice to leave the clock in a low state when inactive because the SI pulse required to start a new cycle is a low-to-high transition.The integration time chosen is valid as long as it falls in the range between the minimum and maximum limits for integration time. If the amount of light incident on the array during a given integration period produces a saturated output (Max Voltage output), then the data is not accurate. If this occurs, the integration period should be reduced until the analog output voltage for each pixel falls below the saturation level. The goal of reducing the period of time the light sampling window is active is to lower the output voltage level to prevent saturation.However, the integration time must still be greater than or equal to the minimum integration period.If the light intensity produces an output below desired signal levels, the output voltage level can be increased by increasing the integration period provided that the maximum integration time is not exceeded. The maximum integration time is limited by the length of time the integrating capacitors on the pixels can hold their accumulated charge. The maximum integration time should not exceed 100 ms for accurate measurements.It should be noted that the data from the light sampled during one integration period is made available on the analog output during the next integration period and is clocked out sequentially at a rate of one pixel per clock period. In other words, at any given time, two groups of data are being handled by the linear array: the previous measured light data is clocked out as the next light sample is being integrated.Although the linear array is capable of running over a wide range of operating frequencies up to a maximum of 8 MHz, the speed of the A/D converter used in the application is likely to be the limiter for the maximum clock frequency. The voltage output is available for the whole period of the clock, so the setup and hold times required for the analog-to-digital conversion must be less than the clock period.TSL1401R−LF128 × 1 LINEAR SENSOR ARRAY WITH HOLDTAOS076B − APRIL 2007MECHANICAL INFORMATIONThis dual-in-line package consists of an integrated circuit mounted on a lead frame and encapsulated in an electrically nonconductive clear plastic compound.0.040 (1,02)0.015 (0,38)0.125 (3,18)0.053 (1,35)0.043 (1,09)0.175 (4,45)0.155 (3,94)Pixel Coverage (Note C)L PackagePbNOTES: A.All linear dimensions are in inches and (millimeters).B.Index of refraction of clear plastic is 1.55.C.Center of pixel active areas typically located under this line.D.Lead finish is NiPd.E.This drawing is subject to change without notice.Figure 9. Packaging ConfigurationTSL1401R−LF 128 × 1 LINEAR SENSOR ARRAY WITH HOLDTAOS076B − APRIL 2007PRODUCTION DATA — information in this document is current at publication date. Products conform to specifications in accordance with the terms of Texas Advanced Optoelectronic Solutions, Inc. standard warranty. Production processing does not necessarily include testing of all parameters.LEAD-FREE (Pb-FREE) and GREEN STATEMENTPb-Free (RoHS) TAOS’ terms Lead-Free or Pb-Free mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TAOS Pb-Free products are suitable for use in specified lead-free processes.Green (RoHS & no Sb/Br) TAOS defines Green to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material).Important Information and Disclaimer The information provided in this statement represents TAOS’ knowledge and belief as of the date that it is provided. TAOS bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TAOS has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TAOS and TAOS suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.NOTICETexas Advanced Optoelectronic Solutions, Inc. (TAOS) reserves the right to make changes to the products contained in this document to improve performance or for any other purpose, or to discontinue them without notice. Customers are advised to contact TAOS to obtain the latest product information before placing orders or designing TAOS products into systems.TAOS assumes no responsibility for the use of any products or circuits described in this document or customer product design, conveys no license, either expressed or implied, under any patent or other right, and makes no representation that the circuits are free of patent infringement. TAOS further makes no claim as to the suitability of its products for any particular purpose, nor does TAOS assume any liability arising out of the use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages.TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS, INC. PRODUCTS ARE NOT DESIGNED OR INTENDED FOR USE IN CRITICAL APPLICATIONS IN WHICH THE FAILURE OR MALFUNCTION OF THE TAOS PRODUCT MAY RESULT IN PERSONAL INJURY OR DEATH. USE OF TAOS PRODUCTS IN LIFE SUPPORT SYSTEMS IS EXPRESSLY UNAUTHORIZED AND ANY SUCH USE BY A CUSTOMER IS COMPLETELY AT THE CUSTOMER’S RISK.LUMENOLOGY, TAOS, the TAOS logo, and Texas Advanced Optoelectronic Solutions are registered trademarks of Texas Advanced Optoelectronic Solutions Incorporated.TSL1401R−LF128 ×1 LINEAR SENSOR ARRAY WITH HOLD TAOS076B − APRIL 2007。

NAD 306 Amplifier Service Manual

Ultimate NAD Repair Schematics & Service manual 230 PDF manuals on DVD. C $24.95, Buy It Now, Free Shipping. Only 3 left! 38 Sold. 28d 18h left (10/7. SERVICING TO QUALIFIED. SERVICE PERSONNEL. JP101. JP102. 2. 3. 4. JP 201. JP 202. JP103. JP104. NAD. Stereo Power Amplifier 2200. OVERLOAD.
Audio manuals and audio service pdf instructions. Find the NAD Electronics Stereo Pre-Amplifier DataSheet NAD Stereo Amplifier 306. Original NAD AV316 Amplifier Service Manual NAD dealer catalog 1000 106 214 215 208 310 306 302 304 701 705 800 802 804.
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Audiophile vintage NAD 306 integrated stereo amplifier including the original manual. The NAD 306 amplifier delivers 50 watts per channel (8 ohm). Owner's Manual. C 375BEE The primary method of isolating the amplifier from 19 Damage Requiring Service - Unplug this product from the wall outlet.

lis2dh12tr

This is information on a product in full production. May 2017DocID025056 Rev 61/53MEMS digital output motion sensor:ultra-low-power high-performance 3-axis "femto" accelerometerDatasheet - production dataFeatures∙Wide supply voltage, 1.71 V to 3.6 V∙Independent IO supply (1.8 V) and supplyvoltage compatible∙Ultra-low power consumption down to 2 μA∙±2g /±4g /±8g /±16g selectable full scales∙I 2C/SPI digital output interface∙ 2 independent programmable interruptgenerators for free-fall and motion detection∙6D/4D orientation detection∙“Sleep-to-wake” and “return-to-sleep” functions∙Free-fall detection∙Motion detection∙Embedded temperature sensor∙Embedded FIFO∙ECOPACK ®, RoHS and “Green” compliant Applications∙Motion-activated functions∙Display orientation∙Shake control∙Pedometer∙Gaming and virtual reality input devices∙Impact recognition and loggingDescriptionThe LIS2DH12 is an ultra-low-power high-performance three-axis linear accelerometerbelonging to the “femto” family with digital I 2C/SPIserial interface standard output.The LIS2DH12 has user-selectable full scales of ±2g /±4g /±8g /±16g and is capable of measuring accelerations with output data rates from 1 Hz to 5.3 kHz.The self-test capability allows the user to check the functionality of the sensor in the final application.The device may be configured to generate interrupt signals by detecting two independent inertial wake-up/free-fall events as well as by the position of the device itself. The LIS2DH12 is available in a small thin plastic land grid array package (LGA) and is guaranteed to operate over an extended temperature range from -40 °C to +85 °C.找Memory 、FPGA 、二三极管、连接器、模块、光耦、电容电阻、单片机、处理器、晶振、传感器、滤波器上美光存储技术LIS2DH12List of figures List of figuresFigure 1.Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Figure 2.Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Figure 3.SPI slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Figure 4.I2C slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Figure 5.LIS2DH12 electrical connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Figure 6.Read and write protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 Figure 7.SPI read protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 Figure 8.Multiple byte SPI read protocol (2-byte example). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 Figure 9.SPI write protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 Figure 10.Multiple byte SPI write protocol (2-byte example). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 Figure 11.SPI read protocol in 3-wire mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 Figure 12.LGA-12: package outline and mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 Figure 13.Carrier tape information for LGA-12 package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 Figure 14.LGA-12 package orientation in carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 Figure 15.Reel information for carrier tape of LGA-12 package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .51DocID025056 Rev 67/53Block diagram and pin description LIS2DH128/53DocID025056 Rev 61 Block diagram and pin description1.1 Block diagram1.2 Pin descriptionLIS2DH12IMPORTANT NOTICE – PLEASE READ CAREFULLYSTMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products.No license, express or implied, to any intellectual property right is granted by ST herein.Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.Information in this document supersedes and replaces information previously supplied in any prior versions of this document.© 2017 STMicroelectronics – All rights reservedDocID025056 Rev 653/53。

u-blox F9 HPS 1.30产品介绍说明书

u-blox F9 HPS 1.30u-blox F9 high precision sensor fusion GNSS receiver Protocol version 33.30Interface descriptionAbstractThis document describes the interface (version 33.30) of the u-bloxF9 ﬁrmware HPS 1.30 platform.UBX-22010984 - R01C1-PublicDocument informationTitle u-blox F9 HPS 1.30Subtitle u-blox F9 high precision sensor fusion GNSS receiver Document type Interface descriptionDocument number UBX-22010984Revision and date R0116-Sep-2022 Disclosure restriction C1-Publicu-blox or third parties may hold intellectual property rights in the products, names, logos and designs included in this document. Copying, reproduction, or modiﬁcation of this document or any part thereof is only permitted with the express written permission of u-blox. Disclosure to third parties is permitted for clearly public documents only.The information contained herein is provided "as is" and u-blox assumes no liability for its use. No warranty, either express or implied, is given, including but not limited to, with respect to the accuracy, correctness, reliability and ﬁtness for a particular purpose of the information. This document may be revised by u-blox at any time without notice. For the most recent documents, visit .Copyright © 2022, u-blox AG.Contents1 General information (14)1.1 Document overview (14)1.2 Firmware and protocol versions (14)1.3 Receiver conﬁguration (16)1.4 Message naming (17)1.5 GNSS, satellite, and signal identiﬁers (17)1.5.1 Overview (17)1.5.2 GNSS identiﬁers (18)1.5.3 Satellite identiﬁers (18)1.5.4 Signal identiﬁers (19)1.6 Message types (20)2 NMEA protocol (21)2.1 NMEA frame structure (21)2.2 NMEA protocol conﬁguration (21)2.3 NMEA-proprietary messages (22)2.4 NMEA multi-GNSS operation (23)2.5 NMEA data ﬁelds (23)2.5.1 NMEA Talker ID (23)2.5.2 NMEA extra ﬁelds (23)2.5.3 NMEA latitude and longitude format (24)2.5.4 NMEA GNSS, satellite, and signal numbering (24)2.5.5 NMEA position ﬁx ﬂags (24)2.5.6 NMEA output of invalid or unknown data (25)2.6 NMEA messages overview (26)2.7 Standard messages (26)2.7.1 DTM (26)2.7.1.1 Datum reference (27)2.7.2 GAQ (27)2.7.2.1 Poll a standard message (Talker ID GA) (27)2.7.3 GBQ (28)2.7.3.1 Poll a standard message (Talker ID GB) (28)2.7.4 GBS (28)2.7.4.1 GNSS satellite fault detection (28)2.7.5 GGA (29)2.7.5.1 Global positioning system ﬁx data (29)2.7.6 GLL (30)2.7.6.1 Latitude and longitude, with time of position ﬁx and status (30)2.7.7 GLQ (30)2.7.7.1 Poll a standard message (Talker ID GL) (30)2.7.8 GNQ (31)2.7.8.1 Poll a standard message (Talker ID GN) (31)2.7.9 GNS (31)2.7.9.1 GNSS ﬁx data (31)2.7.10 GPQ (32)2.7.10.1 Poll a standard message (Talker ID GP) (32)2.7.11 GQQ (32)2.7.11.1 Poll a standard message (Talker ID GQ) (33)2.7.12 GRS (33)2.7.12.1 GNSS range residuals (33)2.7.13 GSA (34)2.7.13.1 GNSS DOP and active satellites (34)2.7.14 GST (34)2.7.14.1 GNSS pseudorange error statistics (34)2.7.15 GSV (35)2.7.15.1 GNSS satellites in view (35)2.7.16 RLM (36)2.7.16.1 Return link message (RLM) (36)2.7.17 RMC (36)2.7.17.1 Recommended minimum data (36)2.7.18 THS (37)2.7.18.1 True heading and status (37)2.7.19 TXT (38)2.7.19.1 Text transmission (38)2.7.20 VTG (38)2.7.20.1 Course over ground and ground speed (38)2.7.21 ZDA (39)2.7.21.1 Time and date (39)2.8 Secondary output messages (40)2.8.1 GGA (40)2.8.1.1 Global positioning system ﬁx data (40)2.8.2 GLL (41)2.8.2.1 Latitude and longitude, with time of position ﬁx and status (41)2.8.3 GNS (41)2.8.3.1 GNSS ﬁx data (42)2.8.4 GSA (43)2.8.4.1 GNSS DOP and active satellites (43)2.8.5 RMC (44)2.8.5.1 Recommended minimum data (44)2.8.6 VTG (45)2.8.6.1 Course over ground and ground speed (45)2.8.7 ZDA (45)2.8.7.1 Time and date (45)2.9 PUBX messages (46)2.9.1 CONFIG (PUBX,41) (46)2.9.1.1 Set protocols and baud rate (46)2.9.2 POSITION (PUBX,00) (47)2.9.2.1 Poll a PUBX,00 message (47)2.9.2.2 Lat/Long position data (47)2.9.3 RATE (PUBX,40) (48)2.9.3.1 Set NMEA message output rate (48)2.9.4 SVSTATUS (PUBX,03) (49)2.9.4.1 Poll a PUBX,03 message (49)2.9.5 TIME (PUBX,04) (49)2.9.5.1 Poll a PUBX,04 message (50)3 UBX protocol (51)3.1 UBX protocol key features (51)3.2 UBX frame structure (51)3.3 UBX payload deﬁnition rules (52)3.3.1 UBX structure packing (52)3.3.2 UBX reserved elements (52)3.3.3 UBX undeﬁned values (52)3.3.4 UBX conditional values (52)3.3.5 UBX data types (52)3.3.6 UBX ﬁelds scale and unit (53)3.3.7 UBX repeated ﬁelds (53)3.3.8 UBX payload decoding (54)3.4 UBX checksum (54)3.5 UBX message ﬂow (54)3.5.1 UBX acknowledgement (54)3.5.2 UBX polling mechanism (54)3.6 GNSS, satellite, and signal numbering (55)3.7 UBX message example (55)3.8 UBX messages overview (56)3.9 UBX-ACK (0x05) (59)3.9.1 UBX-ACK-ACK (0x05 0x01) (59)3.9.1.1 Message acknowledged (60)3.9.2 UBX-ACK-NAK (0x05 0x00) (60)3.9.2.1 Message not acknowledged (60)3.10 UBX-CFG (0x06) (60)3.10.1 UBX-CFG-CFG (0x06 0x09) (60)3.10.1.1 Clear, save and load conﬁgurations (60)3.10.2 UBX-CFG-RST (0x06 0x04) (61)3.10.2.1 Reset receiver / Clear backup data structures (61)3.10.3 UBX-CFG-SPT (0x06 0x64) (62)3.10.3.1 Conﬁgure and start a sensor production test (62)3.10.4 UBX-CFG-VALDEL (0x06 0x8c) (63)3.10.4.1 Delete conﬁguration item values (63)3.10.4.2 Delete conﬁguration item values (with transaction) (63)3.10.5 UBX-CFG-VALGET (0x06 0x8b) (64)3.10.5.1 Get conﬁguration items (65)3.10.5.2 Conﬁguration items (65)3.10.6 UBX-CFG-VALSET (0x06 0x8a) (66)3.10.6.1 Set conﬁguration item values (66)3.10.6.2 Set conﬁguration item values (with transaction) (67)3.11 UBX-ESF (0x10) (68)3.11.1 UBX-ESF-ALG (0x10 0x14) (68)3.11.1.1 IMU alignment information (68)3.11.2 UBX-ESF-INS (0x10 0x15) (69)3.11.2.1 Vehicle dynamics information (69)3.11.3 UBX-ESF-MEAS (0x10 0x02) (70)3.11.3.1 External sensor fusion measurements (70)3.11.4 UBX-ESF-RAW (0x10 0x03) (70)3.11.4.1 Raw sensor measurements (70)3.11.5 UBX-ESF-STATUS (0x10 0x10) (71)3.11.5.1 External sensor fusion status (71)3.12 UBX-INF (0x04) (72)3.12.1 UBX-INF-DEBUG (0x04 0x04) (72)3.12.1.1 ASCII output with debug contents (72)3.12.2 UBX-INF-ERROR (0x04 0x00) (73)3.12.2.1 ASCII output with error contents (73)3.12.3 UBX-INF-NOTICE (0x04 0x02) (73)3.12.3.1 ASCII output with informational contents (73)3.12.4 UBX-INF-TEST (0x04 0x03) (73)3.12.4.1 ASCII output with test contents (73)3.12.5 UBX-INF-WARNING (0x04 0x01) (74)3.12.5.1 ASCII output with warning contents (74)3.13 UBX-MGA (0x13) (74)3.13.1 UBX-MGA-ACK (0x13 0x60) (74)3.13.1.1 Multiple GNSS acknowledge message (74)3.13.2 UBX-MGA-BDS (0x13 0x03) (75)3.13.2.1 BeiDou ephemeris assistance (75)3.13.2.2 BeiDou almanac assistance (76)3.13.2.3 BeiDou health assistance (77)3.13.2.4 BeiDou UTC assistance (77)3.13.2.5 BeiDou ionosphere assistance (78)3.13.3 UBX-MGA-DBD (0x13 0x80) (78)3.13.3.1 Poll the navigation database (78)3.13.3.2 Navigation database dump entry (79)3.13.4 UBX-MGA-GAL (0x13 0x02) (79)3.13.4.1 Galileo ephemeris assistance (79)3.13.4.2 Galileo almanac assistance (80)3.13.4.3 Galileo GPS time oﬀset assistance (81)3.13.4.4 Galileo UTC assistance (82)3.13.5 UBX-MGA-GLO (0x13 0x06) (82)3.13.5.1 GLONASS ephemeris assistance (82)3.13.5.2 GLONASS almanac assistance (83)3.13.5.3 GLONASS auxiliary time oﬀset assistance (84)3.13.6 UBX-MGA-GPS (0x13 0x00) (84)3.13.6.1 GPS ephemeris assistance (84)3.13.6.2 GPS almanac assistance (86)3.13.6.3 GPS health assistance (86)3.13.6.4 GPS UTC assistance (87)3.13.6.5 GPS ionosphere assistance (87)3.13.7 UBX-MGA-INI (0x13 0x40) (88)3.13.7.1 Initial position assistance (88)3.13.7.2 Initial position assistance (88)3.13.7.3 Initial time assistance (89)3.13.7.4 Initial time assistance (90)3.13.7.5 Initial clock drift assistance (91)3.13.7.6 Initial frequency assistance (91)3.13.8 UBX-MGA-QZSS (0x13 0x05) (91)3.13.8.1 QZSS ephemeris assistance (92)3.13.8.2 QZSS almanac assistance (93)3.13.8.3 QZSS health assistance (93)3.13.9 UBX-MGA-SF (0x13 0x10) (94)3.13.9.1 Sensor fusion initialization data (94)3.13.9.2 Sensor fusion initialization data (94)3.14 UBX-MON (0x0a) (95)3.14.1 UBX-MON-COMMS (0x0a 0x36) (95)3.14.1.1 Communication port information (95)3.14.2 UBX-MON-GNSS (0x0a 0x28) (96)3.14.2.1 Information message major GNSS selection (96)3.14.3 UBX-MON-HW (0x0a 0x09) (96)3.14.3.1 Hardware status (97)3.14.4 UBX-MON-HW2 (0x0a 0x0b) (97)3.14.4.1 Extended hardware status (98)3.14.5 UBX-MON-HW3 (0x0a 0x37) (98)3.14.5.1 I/O pin status (98)3.14.6 UBX-MON-IO (0x0a 0x02) (99)3.14.6.1 I/O system status (99)3.14.7 UBX-MON-MSGPP (0x0a 0x06) (100)3.14.7.1 Message parse and process status (100)3.14.8 UBX-MON-PATCH (0x0a 0x27) (100)3.14.8.1 Installed patches (100)3.14.9 UBX-MON-RF (0x0a 0x38) (101)3.14.9.1 RF information (101)3.14.10 UBX-MON-RXBUF (0x0a 0x07) (102)3.14.10.1 Receiver buﬀer status (102)3.14.11 UBX-MON-RXR (0x0a 0x21) (102)3.14.11.1 Receiver status information (102)3.14.12 UBX-MON-SPAN (0x0a 0x31) (102)3.14.12.1 Signal characteristics (103)3.14.13 UBX-MON-SPT (0x0a 0x2f) (103)3.14.13.1 Sensor production test (103)3.14.14 UBX-MON-SYS (0x0a 0x39) (105)3.14.14.1 Current system performance information (105)3.14.15 UBX-MON-TXBUF (0x0a 0x08) (106)3.14.15.1 Transmitter buﬀer status (106)3.14.16 UBX-MON-VER (0x0a 0x04) (107)3.14.16.1 Receiver and software version (107)3.15 UBX-NAV (0x01) (107)3.15.1 UBX-NAV-ATT (0x01 0x05) (108)3.15.1.1 Attitude solution (108)3.15.2 UBX-NAV-CLOCK (0x01 0x22) (108)3.15.2.1 Clock solution (108)3.15.3 UBX-NAV-COV (0x01 0x36) (109)3.15.3.1 Covariance matrices (109)3.15.4 UBX-NAV-DOP (0x01 0x04) (109)3.15.4.1 Dilution of precision (109)3.15.5 UBX-NAV-EELL (0x01 0x3d) (110)3.15.5.1 Position error ellipse parameters (110)3.15.6 UBX-NAV-EOE (0x01 0x61) (110)3.15.6.1 End of epoch (110)3.15.7 UBX-NAV-GEOFENCE (0x01 0x39) (111)3.15.7.1 Geofencing status (111)3.15.8 UBX-NAV-HPPOSECEF (0x01 0x13) (111)3.15.8.1 High precision position solution in ECEF (111)3.15.9 UBX-NAV-HPPOSLLH (0x01 0x14) (112)3.15.9.1 High precision geodetic position solution (112)3.15.10 UBX-NAV-ORB (0x01 0x34) (113)3.15.10.1 GNSS orbit database info (113)3.15.11 UBX-NAV-PL (0x01 0x62) (114)3.15.11.1 Protection level information (114)3.15.12 UBX-NAV-POSECEF (0x01 0x01) (116)3.15.12.1 Position solution in ECEF (116)3.15.13 UBX-NAV-POSLLH (0x01 0x02) (116)3.15.13.1 Geodetic position solution (117)3.15.14 UBX-NAV-PVAT (0x01 0x17) (117)3.15.14.1 Navigation position velocity attitude time solution (117)3.15.15 UBX-NAV-PVT (0x01 0x07) (119)3.15.15.1 Navigation position velocity time solution (119)3.15.16 UBX-NAV-RELPOSNED (0x01 0x3c) (121)3.15.16.1 Relative positioning information in NED frame (122)3.15.17 UBX-NAV-SAT (0x01 0x35) (123)3.15.17.1 Satellite information (123)3.15.18 UBX-NAV-SBAS (0x01 0x32) (125)3.15.18.1 SBAS status data (125)3.15.19 UBX-NAV-SIG (0x01 0x43) (126)3.15.19.1 Signal information (126)3.15.20 UBX-NAV-SLAS (0x01 0x42) (127)3.15.20.1 QZSS L1S SLAS status data (127)3.15.21 UBX-NAV-STATUS (0x01 0x03) (128)3.15.21.1 Receiver navigation status (128)3.15.22 UBX-NAV-TIMEBDS (0x01 0x24) (130)3.15.22.1 BeiDou time solution (130)3.15.23 UBX-NAV-TIMEGAL (0x01 0x25) (130)3.15.23.1 Galileo time solution (130)3.15.24 UBX-NAV-TIMEGLO (0x01 0x23) (131)3.15.24.1 GLONASS time solution (131)3.15.25 UBX-NAV-TIMEGPS (0x01 0x20) (132)3.15.25.1 GPS time solution (132)3.15.26 UBX-NAV-TIMELS (0x01 0x26) (132)3.15.26.1 Leap second event information (132)3.15.27 UBX-NAV-TIMEQZSS (0x01 0x27) (133)3.15.27.1 QZSS time solution (134)3.15.28 UBX-NAV-TIMEUTC (0x01 0x21) (134)3.15.28.1 UTC time solution (134)3.15.29 UBX-NAV-VELECEF (0x01 0x11) (135)3.15.29.1 Velocity solution in ECEF (135)3.15.30 UBX-NAV-VELNED (0x01 0x12) (135)3.15.30.1 Velocity solution in NED frame (136)3.16 UBX-NAV2 (0x29) (136)3.16.1 UBX-NAV2-CLOCK (0x29 0x22) (136)3.16.1.1 Clock solution (136)3.16.2 UBX-NAV2-COV (0x29 0x36) (137)3.16.2.1 Covariance matrices (137)3.16.3 UBX-NAV2-DOP (0x29 0x04) (137)3.16.3.1 Dilution of precision (137)3.16.4 UBX-NAV2-EELL (0x29 0x3d) (138)3.16.4.1 Position error ellipse parameters (138)3.16.5 UBX-NAV2-EOE (0x29 0x61) (138)3.16.5.1 End of epoch (138)3.16.6 UBX-NAV2-POSECEF (0x29 0x01) (139)3.16.6.1 Position solution in ECEF (139)3.16.7 UBX-NAV2-POSLLH (0x29 0x02) (139)3.16.7.1 Geodetic position solution (139)3.16.8 UBX-NAV2-PVAT (0x29 0x17) (140)3.16.8.1 Navigation position velocity attitude time solution (140)3.16.9 UBX-NAV2-PVT (0x29 0x07) (142)3.16.9.1 Navigation position velocity time solution (142)3.16.10 UBX-NAV2-SAT (0x29 0x35) (144)3.16.10.1 Satellite information (144)3.16.11 UBX-NAV2-SBAS (0x29 0x32) (146)3.16.11.1 SBAS status data (146)3.16.12 UBX-NAV2-SIG (0x29 0x43) (147)3.16.12.1 Signal information (147)3.16.13 UBX-NAV2-SLAS (0x29 0x42) (148)3.16.13.1 QZSS L1S SLAS status data (148)3.16.14 UBX-NAV2-STATUS (0x29 0x03) (149)3.16.14.1 Receiver navigation status (149)3.16.15 UBX-NAV2-TIMEBDS (0x29 0x24) (151)3.16.15.1 BeiDou time solution (151)3.16.16 UBX-NAV2-TIMEGAL (0x29 0x25) (151)3.16.16.1 Galileo time solution (151)3.16.17 UBX-NAV2-TIMEGLO (0x29 0x23) (152)3.16.17.1 GLONASS time solution (152)3.16.18 UBX-NAV2-TIMEGPS (0x29 0x20) (153)3.16.18.1 GPS time solution (153)3.16.19 UBX-NAV2-TIMELS (0x29 0x26) (153)3.16.19.1 Leap second event information (153)3.16.20 UBX-NAV2-TIMEQZSS (0x29 0x27) (154)3.16.20.1 QZSS time solution (155)3.16.21 UBX-NAV2-TIMEUTC (0x29 0x21) (155)3.16.21.1 UTC time solution (155)3.16.22 UBX-NAV2-VELECEF (0x29 0x11) (156)3.16.22.1 Velocity solution in ECEF (156)3.16.23 UBX-NAV2-VELNED (0x29 0x12) (156)3.16.23.1 Velocity solution in NED frame (157)3.17 UBX-RXM (0x02) (157)3.17.1 UBX-RXM-COR (0x02 0x34) (157)3.17.1.1 Diﬀerential correction input status (157)3.17.2 UBX-RXM-MEASX (0x02 0x14) (158)3.17.2.1 Satellite measurements for RRLP (158)3.17.3 UBX-RXM-PMP (0x02 0x72) (160)3.17.3.1 PMP (LBAND) message (160)3.17.4 UBX-RXM-PMREQ (0x02 0x41) (160)3.17.4.1 Power management request (160)3.17.4.2 Power management request (161)3.17.5 UBX-RXM-QZSSL6 (0x02 0x73) (161)3.17.5.1 QZSS L6 message (161)3.17.6 UBX-RXM-RAWX (0x02 0x15) (162)3.17.6.1 Multi-GNSS raw measurements (162)3.17.7 UBX-RXM-RLM (0x02 0x59) (164)3.17.7.1 Galileo SAR short-RLM report (164)3.17.7.2 Galileo SAR long-RLM report (164)3.17.8 UBX-RXM-RTCM (0x02 0x32) (165)3.17.8.1 RTCM input status (165)3.17.9 UBX-RXM-SPARTN (0x02 0x33) (165)3.17.9.1 SPARTN input status (165)3.17.10 UBX-RXM-SPARTNKEY (0x02 0x36) (166)3.17.10.1 Poll installed keys (166)3.17.10.2 Transfer dynamic SPARTN keys (166)3.18 UBX-SEC (0x27) (167)3.18.1 UBX-SEC-SIG (0x27 0x09) (167)3.18.1.1 Signal security information (167)3.18.2 UBX-SEC-SIGLOG (0x27 0x10) (168)3.18.2.1 Signal security log (168)3.18.3 UBX-SEC-UNIQID (0x27 0x03) (168)3.18.3.1 Unique chip ID (169)3.19 UBX-TIM (0x0d) (169)3.19.1 UBX-TIM-TM2 (0x0d 0x03) (169)3.19.1.1 Time mark data (169)3.19.2 UBX-TIM-TP (0x0d 0x01) (170)3.19.2.1 Time pulse time data (170)3.19.3 UBX-TIM-VRFY (0x0d 0x06) (171)3.19.3.1 Sourced time veriﬁcation (171)3.20 UBX-UPD (0x09) (171)3.20.1 UBX-UPD-SOS (0x09 0x14) (171)3.20.1.1 Poll backup restore status (172)3.20.1.2 Create backup in ﬂash (172)3.20.1.3 Clear backup in ﬂash (172)3.20.1.4 Backup creation acknowledge (172)3.20.1.5 System restored from backup (173)4 RTCM protocol (174)4.1 RTCM introduction (174)4.2 RTCM 3.x conﬁguration (174)4.3 RTCM messages overview (174)4.4 RTCM 3.3 messages (175)4.4.1 Message type 1001 (175)4.4.1.1 L1-only GPS RTK observables (175)4.4.2 Message type 1002 (176)4.4.2.1 Extended L1-only GPS RTK observables (176)4.4.3 Message type 1003 (176)4.4.3.1 L1/L2 GPS RTK observables (176)4.4.4 Message type 1004 (177)4.4.4.1 Extended L1/L2 GPS RTK observables (177)4.4.5 Message type 1005 (177)4.4.5.1 Stationary RTK reference station ARP (177)4.4.6 Message type 1006 (178)4.4.6.1 Stationary RTK reference station ARP with antenna height (178)4.4.7 Message type 1007 (178)4.4.7.1 Antenna descriptor (179)4.4.8 Message type 1009 (179)4.4.8.1 L1-only GLONASS RTK observables (179)4.4.9 Message type 1010 (180)4.4.9.1 Extended L1-Only GLONASS RTK observables (180)4.4.10 Message type 1011 (180)4.4.10.1 L1&L2 GLONASS RTK observables (180)4.4.11 Message type 1012 (181)4.4.11.1 Extended L1&L2 GLONASS RTK observables (181)4.4.12 Message type 1033 (181)4.4.12.1 Receiver and antenna descriptors (181)4.4.13 Message type 1074 (182)4.4.13.1 GPS MSM4 (182)4.4.14 Message type 1075 (182)4.4.14.1 GPS MSM5 (182)4.4.15 Message type 1077 (183)4.4.15.1 GPS MSM7 (183)4.4.16 Message type 1084 (184)4.4.16.1 GLONASS MSM4 (184)4.4.17 Message type 1085 (184)4.4.17.1 GLONASS MSM5 (184)4.4.18 Message type 1087 (185)4.4.18.1 GLONASS MSM7 (185)4.4.19 Message type 1094 (185)4.4.19.1 Galileo MSM4 (185)4.4.20 Message type 1095 (186)4.4.20.1 Galileo MSM5 (186)4.4.21 Message type 1097 (186)4.4.21.1 Galileo MSM7 (187)4.4.22 Message type 1124 (187)4.4.22.1 BeiDou MSM4 (187)4.4.23 Message type 1125 (188)4.4.23.1 BeiDou MSM5 (188)4.4.24 Message type 1127 (188)4.4.24.1 BeiDou MSM7 (188)4.4.25 Message type 1230 (189)4.4.25.1 GLONASS L1 and L2 code-phase biases (189)5 SPARTN protocol (190)5.1 SPARTN introduction (190)5.2 SPARTN conﬁguration (190)5.3 SPARTN messages overview (190)5.4 SPARTN messages (191)5.4.1 Message type 0, sub-type 0 (191)5.4.1.1 GPS orbit, clock, bias (OCB) (191)5.4.2 Message type 0, sub-type 1 (191)5.4.2.1 GLONASS orbit, clock, bias (OCB) (192)5.4.3 Message type 0, sub-type 2 (192)5.4.3.1 Galileo orbit, clock, bias (OCB) (192)5.4.4 Message type 0, sub-type 3 (193)5.4.4.1 BeiDou orbit, clock, bias (OCB) (193)5.4.5 Message type 0, sub-type 4 (194)5.4.5.1 QZSS orbit, clock, bias (OCB) (194)5.4.6 Message type 1, sub-type 0 (195)5.4.6.1 GPS high-precision atmosphere correction (HPAC) (195)5.4.7 Message type 1, sub-type 1 (195)5.4.7.1 GLONASS high-precision atmosphere correction (HPAC) (195)5.4.8 Message type 1, sub-type 2 (196)5.4.8.1 Galileo high-precision atmosphere correction (HPAC) (196)5.4.9 Message type 1, sub-type 3 (197)5.4.9.1 BeiDou high-precision atmosphere correction (HPAC) (197)5.4.10 Message type 1, sub-type 4 (198)5.4.10.1 QZSS high-precision atmosphere correction (HPAC) (198)5.4.11 Message type 2, sub-type 0 (199)5.4.11.1 Geographic area deﬁnition (GAD) (199)5.4.12 Message type 3, sub-type 0 (199)5.4.12.1 Basic-precision atmosphere correction (BPAC) (199)6 Conﬁguration interface (201)6.1 Conﬁguration database (201)6.2 Conﬁguration items (201)6.3 Conﬁguration layers (202)6.4 Conﬁguration interface access (203)6.4.1 UBX protocol interface (203)6.5 Conﬁguration data (203)6.6 Conﬁguration transactions (204)6.7 Conﬁguration reset behavior (205)6.8 Conﬁguration overview (205)6.9 Conﬁguration reference (206)6.9.1 CFG-BDS: BeiDou system conﬁguration (206)6.9.2 CFG-GEOFENCE: Geofencing conﬁguration (206)6.9.3 CFG-HW: Hardware conﬁguration (207)6.9.4 CFG-I2C: Conﬁguration of the I2C interface (209)6.9.5 CFG-I2CINPROT: Input protocol conﬁguration of the I2C interface (209)6.9.6 CFG-I2COUTPROT: Output protocol conﬁguration of the I2C interface (209)6.9.7 CFG-INFMSG: Information message conﬁguration (209)6.9.8 CFG-MOT: Motion detector conﬁguration (210)6.9.9 CFG-MSGOUT: Message output conﬁguration (211)6.9.10 CFG-NAV2: Secondary output conﬁguration (231)6.9.11 CFG-NAVHPG: High precision navigation conﬁguration (231)6.9.12 CFG-NAVSPG: Standard precision navigation conﬁguration (232)6.9.13 CFG-NMEA: NMEA protocol conﬁguration (236)6.9.14 CFG-QZSS: QZSS system conﬁguration (238)6.9.15 CFG-RATE: Navigation and measurement rate conﬁguration (238)6.9.16 CFG-RINV: Remote inventory (239)6.9.17 CFG-RTCM: RTCM protocol conﬁguration (239)6.9.18 CFG-SBAS: SBAS conﬁguration (240)6.9.19 CFG-SEC: Security conﬁguration (241)6.9.20 CFG-SFCORE: Sensor fusion (SF) core conﬁguration (242)6.9.21 CFG-SFIMU: Sensor fusion (SF) inertial measurement unit (IMU) conﬁguration (242)6.9.22 CFG-SFODO: Sensor fusion (SF) odometer conﬁguration (243)6.9.23 CFG-SIGNAL: Satellite systems (GNSS) signal conﬁguration (244)6.9.24 CFG-SPARTN: SPARTN conﬁguration (245)6.9.25 CFG-SPI: Conﬁguration of the SPI interface (245)6.9.26 CFG-SPIINPROT: Input protocol conﬁguration of the SPI interface (246)6.9.27 CFG-SPIOUTPROT: Output protocol conﬁguration of the SPI interface (246)6.9.28 CFG-TP: Time pulse conﬁguration (246)6.9.29 CFG-TXREADY: TX ready conﬁguration (248)6.9.30 CFG-UART1: Conﬁguration of the UART1 interface (248)6.9.31 CFG-UART1INPROT: Input protocol conﬁguration of the UART1 interface (249)6.9.32 CFG-UART1OUTPROT: Output protocol conﬁguration of the UART1 interface (249)6.9.33 CFG-UART2: Conﬁguration of the UART2 interface (250)6.9.34 CFG-UART2INPROT: Input protocol conﬁguration of the UART2 interface (250)6.9.35 CFG-UART2OUTPROT: Output protocol conﬁguration of the UART2 interface (251)6.9.36 CFG-USB: Conﬁguration of the USB interface (251)6.9.37 CFG-USBINPROT: Input protocol conﬁguration of the USB interface (251)6.9.38 CFG-USBOUTPROT: Output protocol conﬁguration of the USB interface (252)6.10 Legacy UBX message ﬁelds reference (252)Conﬁguration defaults (258)Related documents (281)Revision history (282)1 General information1.1 Document overviewThis document describes the interface of the u-blox F9 high precision sensor fusion GNSS receiver. The interface consists of the following parts:•NMEA protocol•UBX protocol•RTCM protocol•SPARTN protocol•Conﬁguration interfaceSome of the features described here may not be available in the receiver, and some mayrequire speciﬁc conﬁgurations to be enabled. See the applicable data sheet for availability of the features and the integration manual for instructions for enabling them.Previous versions of u-blox receiver documentation combined general receiver description and interface speciﬁcation. In the current documentation the receiver description isincluded in the integration manual.See also Related documents.1.2 Firmware and protocol versionsu-blox generation 9 receivers execute ﬁrmware from internal ROM or from internal code-RAM. If the ﬁrmware image is stored in a ﬂash it is loaded into the code-RAM before execution. It is also possible to store the ﬁrmware image in the host system. The ﬁrmware is then loaded into the code-RAM from the host processor. (Loading the ﬁrmware from the host processor is not supported in all products.) If there is no external ﬁrmware image, then the ﬁrmware is executed from the ROM.The location and the version of the boot loader and the currently running ﬁrmware can be found in the boot screen and in the UBX-MON-VER message. If the ﬁrmware has been loaded from a connected ﬂash or from the host processor, it is indicated by text "EXT". When the receiver is started, the boot screen is output automatically in UBX-INF-NOTICE or NMEA-Standard-TXT messages if conﬁgured using CFG-INFMSG. The UBX-MON-VER message can be polled using the UBX polling mechanism.The following u-center screenshots show an example of a u-blox receiver running ﬁrmware loaded from ﬂash:The following information is available (✓) from the boot screen (B) and the UBX-MON-VER message (M):B M Example Information✓u-blox AG - Start of the boot screen.✓HW UBX 9 00190000Hardware version of the u-blox receiver.✓00190000✓✓EXT CORE 1.00 (61b2dd)Base (CORE) ﬁrmware version and revision number, loaded from externalmemory (EXT).EXT LAP 1.00 (12a3bc)Product ﬁrmware version and revision number, loaded from external memory(EXT). Available only in some ﬁrmware versions. See below for a list of productacronyms.✓✓ROM BASE 0x118B2060Revision number of the underlying boot loader ﬁrmware in ROM.✓✓FWVER=HPG 1.12Product ﬁrmware version number, where:•SPG = Standard precision GNSS product•HPG = High precision GNSS product•ADR = Automotive dead reckoning product•TIM = Time sync product•LAP = Lane accurate positioning product•HPS = High precision sensor fusion product•DBS = Dual band standard precision•MDR = Multi-mode dead reckoning product•PMP = L-Band Inmarsat point-to-multipoint receiver•QZS = QZSS L6 centimeter level augmentation service (CLAS) messagereceiver•DBD = Dual band dead reckoning product•LDR = ROM bootloader, no GNSS functionality✓✓PROTVER=34.00Supported protocol version.✓✓MOD=ZED-F9P Module name (if available).✓✓GPS;GLO;GAL;BDS List of supported major GNSS (see GNSS identiﬁers).✓✓SBAS;QZSS List of supported augmentation systems (see GNSS identiﬁers).B M Example Information✓ANTSUPERV=AC SD PDoS SR Conﬁguration of the antenna supervisor (if available), where:•AC = Active antenna control enabled•SD = Short circuit detection enabled•OD = Open circuit detection enabled•PDoS = Short circuit power down logic enabled•SR = Automatic recovery from short state enabled✓PF=FFF79Product conﬁguration.✓BD=E01C GNSS band conﬁguration.The "FWVER" product ﬁrmware version indicates which ﬁrmware is currently running. This is referred to as "ﬁrmware version" in this and other documents.The revision numbers should only be used to identify a known ﬁrmware version. They arenot necessarily numeric nor are they guaranteed to increase with newer ﬁrmware versions.Similarly, ﬁrmware version numbers can have additional non-numeric informationappended, such as in "5.00B03".Not every entry is output by all u-blox receivers. The availability of some of the information depends on the product, the ﬁrmware location and the ﬁrmware version.The product ﬁrmware version and the base ﬁrmware version relate to the protocol version:Product ﬁrmware version Base ﬁrmware version Protocol versionHPS 1.00EXT CORE 1.00 (500086)33.00HPS 1.20EXT CORE 1.00 (a669b8)33.20HPS 1.21EXT CORE 1.00 (e2b374)33.21HPS 1.30EXT CORE 1.00 (a59682)33.301.3 Receiver conﬁgurationu-blox positioning receivers are fully conﬁgurable with UBX protocol messages. The conﬁguration used by the receiver during normal operation is called the "current conﬁguration". The current conﬁguration can be changed during normal operation by sending UBX-CFG-VALSET messages over any I/O port. The receiver will change its current conﬁguration immediately after receiving a conﬁguration message. The receiver will always use the current conﬁguration only.The current conﬁguration is loaded from permanent conﬁguration hard-coded in the receiver ﬁrmware (the defaults) and from non-volatile memory (user conﬁguration) on startup of the receiver. Changes made to the current conﬁguration at run-time will be lost when there is a power cycle, a hardware reset or a (complete) controlled software reset (see Conﬁguration reset behavior).See Conﬁguration interface for a detailed description of the receiver conﬁguration system, the explanation of the conﬁguration concept and its principles and interfaces.The conﬁguration interface has changed from earlier u-blox positioning receivers. Thereis some backwards compatibility provided in UBX-CFG conﬁguration messages. Users are strongly advised to only use the Conﬁguration interface. See also Legacy UBX messageﬁelds reference.See the integration manual for a basic receiver conﬁguration most commonly used.。

LTR-553ALS-WA_DS_V1.0(1)

Property of Lite-On Only1. DescriptionThe LTR-553ALS-WA is an integrated low voltage I2C digital light sensor [ALS] and proximity sensor [PS] with built-in emitter, in a single miniature chipled lead-free surface mount package. This sensor converts light intensity to a digital output signal capable of direct I2C interface. It provides a linear response over a wide dynamic range from 0.01 lux to 64k lux and is well suited to applications under high ambient brightness. With built-in proximity sensor (emitter and detector), LTR-553ALS-WA offers the feature to detect object at a user configurable distance.The sensor supports an interrupt feature that removes the need to poll the sensor for a reading which improves system efficiency. The sensor also supports several features that help to minimize the occurrence of false triggering. This CMOS design and factory-set one time trimming capability ensure minimal sensor-to-sensor variations for ease of manufacturability to the end customers.2. Features∙I2C interface (Fast Mode @ 400kbit/s)∙Ultra-small ChipLED package∙Built-in temperature compensation circuit∙Low active power consumption with standby mode∙Supply voltage range from 2.4V to 3.6V capable of 1.7V logic voltage∙Operating temperature range from -30︒C to +70︒C∙RoHS and Halogen free compliant∙Light SensorClose to human eye spectral responseImmunity to IR / UV Light SourceAutomatically rejects 50 / 60 Hz lightings flicker6 dynamic range from 0.01 lux to 64k lux16-bit effective resolution∙Proximity SensorBuilt-in LED driver, emitter and detectorProgrammable LED drive settings11-bit effective resolutionHigh ambient light suppressionPart No.:LTR-553ALS-WA DATA SHEET Page: 1 of 41Property of Lite-On OnlyProperty of Lite-On Only5. Outline DimensionsNotes:1. All dimensions are in millimetersPart No.:LTR-553ALS-WA DATA SHEET Page: 3 of 41Property of Lite-On Only 6. Functional Block DiagramLTR-553ALSProperty of Lite-On Only LTR-553ALSProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On Only2Property of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On Only11. Pseudo Codes ExamplesControl Registers// The Control Registers define the operating modes and gain settings of the ALS and PS of LTR-553.// Default settings are 0x00 for both registers (both in Standby mode).Slave_Addr = 0x23 // Slave address of LTR-553 device// Enable ALSRegister_Addr = 0x80 // ALS_CONTR registerCommand = 0x01 // For Gain X1// For Gain X2, Command = 0x05// For Gain X4, Command = 0x09// For Gain X8, Command = 0x0D// For Gain X48, Command = 0x19// For Gain X96, Command = 0x1DWriteByte(Slave_Addr, Register_Addr, Command)// Enable PSRegister_Addr = 0x81 // PS_CONTR registerCommand = 0x03 // Gain = 16// For Gain = 32, Command = 0x0B// For Gain = 64, Command = 0x0FWriteByte(Slave_Addr, Register_Addr, Command)PS LED Registers// The PS LED Registers define the LED pulse modulation frequency, duty cycle and peak current.// Default setting is 0x7F (60kHz, 100%, 100mA).Slave_Addr = 0x23 // Slave address of LTR-553 device// Set LED Pulse Freq 30kHz (duty cycle 100%, peak curr 100mA)Register_Addr = 0x82 // PS_LED registerCommand = 0x1F // Pulse Freq = 30kHz, (duty cyc 100%, peak curr 100mA)// For Pulse Freq = 40kHz, (100%, 100mA), Command = 0x3F// For Pulse Freq = 50kHz, (100%, 100mA), Command = 0x5F// For Pulse Freq = 60kHz, (100%, 100mA), Command = 0x7F// For Pulse Freq = 70kHz, (100%, 100mA), Command = 0x9F// For Pulse Freq = 80kHz, (100%, 100mA), Command = 0xBF// For Pulse Freq = 90kHz, (100%, 100mA), Command = 0xDF// For Pulse Freq = 100kHz, (100%, 100mA), Command = 0xFF WriteByte(Slave_Addr, Register_Addr, Command)// Set LED Duty Cycle 25% (pulse freq 60kHz, peak curr 100mA)Register_Addr = 0x82 // PS_LED registerCommand = 0x67 // Duty Cycle = 25%, (pulse freq 60kHz, peak curr 100mA)// For Duty Cycle = 50%, (60kHz, 100mA), Command = 0x6F// For Duty Cycle = 75%, (60kHz, 100mA), Command = 0x77// For Duty Cycle = 100%, (60kHz, 100mA), Command = 0x7F WriteByte(Slave_Addr, Register_Addr, Command)Part No.:LTR-553ALS-WA DATA SHEET Page: 33 of 41Property of Lite-On Only// Set LED Peak Current 5mA (pulse freq 60kHz, duty cycle 100%)Register_Addr = 0x82 // PS_LED registerCommand = 0x78 // Peak Current = 5mA, (pulse freq 60kHz, duty cyc 100%)// For Peak Current = 10mA, (60kHz, 100%), Command = 0x79// For Peak Current = 20mA, (60kHz, 100%), Command = 0x7A// For Peak Current = 50mA, (60kHz, 100%), Command = 0x7B WriteByte(Slave_Addr, Register_Addr, Command)PS Measurement Rate// The PS_MEAS_RATE register controls the PS measurement rate.// Default setting of the register is 0x02 (repeat rate 100ms)Slave_Addr = 0x23 // Slave address of LTR-553 device// Set PS Repeat Rate 50msRegister_Addr = 0x84 // PS_MEAS_RATE registerCommand = 0x00 // Meas rate = 50ms// For Meas rate = 500ms, Command = 0x04WriteByte(Slave_Addr, Register_Addr, Command)ALS Measurement Rate// The ALS_MEAS_RATE register controls the ALS integration time and measurement rate.// Default setting of the register is 0x03 (integration time 100ms, repeat rate 500ms)Slave_Addr = 0x23 // Slave address of LTR-553 device// Set ALS Integration Time 200ms, Repeat Rate 200msRegister_Addr = 0x85 // ALS_MEAS_RATE registerCommand = 0x12 // Int time = 200ms, Meas rate = 200ms// For Int time = 400ms, Meas rate = 500ms, Command = 0x1B WriteByte(Slave_Addr, Register_Addr, Command)ALS Data Registers (Read Only)// The ALS Data Registers contain the ADC output data for the respective channel.// These registers should be read as a group, with the lower address being read first.Slave_Addr = 0x23 // Slave address of LTR-553 device// Read back ALS_DATA_CH1Register_Addr = 0x88 // ALS_DATA_CH1 low byte addressReadByte(Slave_Addr, Register_Addr, Data0)Register_Addr = 0x89 // ALS_DATA_CH1 high byte addressReadByte(Slave_Addr, Register_Addr, Data1)// Read back ALS_DATA_CH0Register_Addr = 0x8A // ALS_DATA_CH0 low byte addressReadByte(Slave_Addr, Register_Addr, Data2)Register_Addr = 0x8B // ALS_DATA_CH0 high byte addressReadByte(Slave_Addr, Register_Addr, Data3)ALS_CH1_ADC_Data = (Data1 << 8) | Data0 // Combining lower and upper bytes to give 16-bit Ch1 dataALS_CH0_ADC_Data = (Data3 << 8) | Data2 // Combining lower and upper bytes to give 16-bit Ch0 dataPart No.:LTR-553ALS-WA DATA SHEET Page: 34 of 41Property of Lite-On OnlyALS / PS Status Register (Read Only)// The ALS_PS_STATUS Register contains the information on Interrupt, ALS and PS data availability status.// This register is read only.Slave_Addr = 0x23 // Slave address of LTR-553 device// Read back RegisterRegister_Addr = 0x8C // ALS_PS_STATUS register addressReadByte(Slave_Addr, Register_Addr, Data)Interrupt_Status = Data & 0x0A // Interrupt_Status = 8(decimal) → ALS Interrupt// Interrupt_Status = 2(decimal) → PS Interrupt// Interrupt_Status = 10(decimal) → Both InterruptNewData_Status = Data & 0x05 // NewData_Status = 4(decimal) → ALS New Data// NewData_Status = 1(decimal) → PS New Data// NewData_Status = 5(decimal) → Both New DataALS_Data_Valid = Data & 0x80 // ALS_Data_Valid = 0x00 → ALS New Data is valid (usable)// ALS_Data_Valid = 0x80 → ALS New Data is invalid, discard andwait for new ALS dataPS Data Registers (Read Only)// The PS Data Registers contain the ADC output data.// These registers should be read as a group, with the lower address being read first.Slave_Addr = 0x23 // Slave address of LTR-553 device// Read back PS_DATA registersRegister_Addr = 0x8D // PS_DATA low byte addressReadByte(Slave_Addr, Register_Addr, Data0)Register_Addr = 0x8E // PS_DATA high byte addressReadByte(Slave_Addr, Register_Addr, Data1)PS_ADC_Data = (Data1 << 8) | Data0 // Combining lower and upper bytes to give 16-bit PS data Interrupt Registers// The Interrupt register controls the operation of the interrupt pins and function.// The default value for this register is 0x08 (Interrupt inactive)Slave_Addr = 0x23 // Slave address of LTR-553 device// Set Interrupt Polarity for Active Low, both ALS and PS triggerRegister_Addr = 0x8F // Interrupt Register addressCommand = 0x03 // Interrupt is Active Low and both ALS and PS can trigger// For Active High Interrupt, both trigger, Command = 0x07// For Active High Interrupt, ONLY ALS trigger, Command = 0x06// For Active High Interrupt, ONLY PS trigger, Command = 0x05 WriteByte(Slave_Addr, Register_Addr, Command)Part No.:LTR-553ALS-WA DATA SHEET Page: 35 of 41Property of Lite-On OnlyALS Threshold Registers// The ALS_THRES_UP and ALS_THRES_LOW registers determines the upper and// lower limit of the interrupt threshold value.// Following example illustrates the setting of the ALS threshold window of// decimal values of 200 (lower threshold) and 1000 (upper threshold)Slave_Addr = 0x23 // Slave address of LTR-553 device// Upper Threshold Setting (decimal 1000)ALS_Upp_Threshold_Reg_0 = 0x97 // ALS Upper Threshold Low Byte Register addressALS_Upp_Threshold_Reg_1 = 0x98 // ALS Upper Threshold High Byte Register addressData1 = 1000 >> 8 // To convert decimal 1000 into two eight bytes register values Data0 = 1000 & 0xFFWriteByte(Slave_Addr, ALS_Upp_Threshold_Reg_0, Data0)WriteByte(Slave_Addr, ALS_Upp_Threshold_Reg_1, Data1)// Lower Threshold Setting (decimal 200)ALS_Low_Threshold_Reg_0 = 0x99 // ALS Lower Threshold Low Byte Register addressALS_Low_Threshold_Reg_1 = 0x9A // ALS Lower Threshold High Byte Register addressData1 = 200 >> 8 // To convert decimal 200 into two eight bytes register values Data0 = 200 & 0xFFWriteByte(Slave_Addr, ALS_Low_Threshold_Reg_0, Data0)WriteByte(Slave_Addr, ALS_Low_Threshold_Reg_1, Data1)PS Threshold Registers// The PS_THRES_UP and PS_THRES_LOW registers determines the upper and// lower limit of the interrupt threshold value.// Following example illustrates the setting of the PS threshold window of// decimal values of 200 (lower threshold) and 1000 (upper threshold)Slave_Addr = 0x23 // Slave address of LTR-553 device// Upper Threshold Setting (decimal 1000)PS_Upp_Threshold_Reg_0 = 0x90 // PS Upper Threshold Low Byte Register addressPS_Upp_Threshold_Reg_1 = 0x91 // PS Upper Threshold High Byte Register addressData1 = 1000 >> 8 // To convert decimal 1000 into two eight bytes register values Data0 = 1000 & 0xFFWriteByte(Slave_Addr, PS_Upp_Threshold_Reg_0, Data0)WriteByte(Slave_Addr, PS_Upp_Threshold_Reg_1, Data1)// Lower Threshold Setting (decimal 200)PS_Low_Threshold_Reg_0 = 0x92 // PS Lower Threshold Low Byte Register addressPS_Low_Threshold_Reg_1 = 0x93 // PS Lower Threshold High Byte Register addressData1 = 200 >> 8 // To convert decimal 200 into two eight bytes register values Data0 = 200 & 0xFFWriteByte(Slave_Addr, PS_Low_Threshold_Reg_0, Data0)WriteByte(Slave_Addr, PS_Low_Threshold_Reg_1, Data1)Part No.:LTR-553ALS-WA DATA SHEET Page: 36 of 41Property of Lite-On OnlyProperty of Lite-On OnlyProperty of Lite-On Only Recommended Land PatternProperty of Lite-On OnlyProperty of Lite-On OnlyPart No.: LTR-553ALS-WA DATA SHEETPage: 41 of 41BNS-OD-C131/A4 - Rev 1.0 – 22 May 201315. Package Dimension for Tape and ReelNote:1. All dimensions are in millimetersNotes:1. All dimensions are in millimeters (inches)2. Empty component pockets sealed with top cover tape3. 7 inch reel - 2500 pieces per reel4. In accordance with ANSI/EIA 481-1-A-1994 specifications。

克伊利·7002开关系统数据手册说明书

1.888.KEITHLEY (U.S. only) SideTextSWITCHINGANDCONTROLA G R E A T E R M E A S U R E O F C O N F I D E N C ETen-slothighdensityswitchmainframe The Model 7002 Switch System is a 10-slot mainf rame that supports up to400 2-pole mul t i p lex e r channels or 400 matrix crosspoints. The front panelincludes a unique in t er a c t ive display of chan n el status for quick pro g ram-ming. Scanning speeds of up to 300 channels per second are possible withthe high density switch cards. The wide selection of more than 30 d ifferentswitch cards makes the 7002 one of the most flexible switch i ng main-frames avail a ble.Reduce the Size and Costof Your Switching Application.up to 400 channels of 2-pole switching. A single Model 7002 mainframecan accommodate up to ten 40-channel cards. That’s 400 channels in asingle full-rack package that is only 178mm high (7 in). This level of density provides some impor-tant advantages. First, it reduces the amount of switching hardware required for a given ap p li c a t ion. Second, it provides high flexibility. The high density cards can be used with the special signal cardsto cover all your signal needs for a large application with one m ainframe.The 7002 is fully compatible with all 7001 switch cards. From thisf ig u r a t ion flex i b il-a m p le, the outputs of a mul t ip lex e r card can be connectedt i p lex e r cards can be con n ect e d to formlex e r. Intercard wiring is eliminated by using the an a l og backplane to formThe interactive front panel display helps shorten the time requiredAn optional light pen provides point and click pro g ram m ing from thep lete switch patterns.Automatic card configuration. When the high density cards are installed,the 7002 au t o m at i c al l y configures each slot independently for the propercard. The channel status display on the front panel adjusts to show eachcard’s capacity and con f ig u r a t ion.Front panel info key. At the touch of a button, the operator receives con-text-sensitive, on-line information to help configure the system. This infor-mation is displayed on a 52-character alphanumeric display for clear andreadable messages. There is no need to refer constantly to the operator’smanual. All information messages, operating instructions, and prompts areavailable in English, German, and French. Just select the desired languagein the con f ig u r a t ion menu.Programmable channel closure restrictions. The 7002 allows specificchannels to be locked out from closure. This restriction can be conditionalbased on the open/close state of other channels or crosspoints. This capa-bility is useful to prevent certain signals from being accidentally connectedto high power circuits, for example.DC, RF, and optical switchcapabilityInteractive channel statusdisplaySERVICES AVAILABLE7002-3Y-EW 1-year factory warranty extended to 3 years from date of shipment19811.888.KEITHLEY (U.S. only)A G R E A T E R M E A S U R E O F C O N F I D EN CE7002 7002Switch/Control Mainframe400-channelSystem Throughput300 channel per second scanning. The 7002 can scan through up to 300 chan-nels per second. This scan process can be controlled by the internal time base of the 7002 or through external triggers. The scan sequence is con t rolled by what appears in the scan list. The scan list can include channels, ranges of channels, and memory locations. This ap p roach gives max i m um flexibility while obtaining maximum through p ut.Built-in Scan Control and trigger Link. The built-in scan control eliminates the need for the computer to control every step of the test pro-cedure. Simply program the 7002 to control the channel spacing, scan spacing, and number of scans. Trigger Link gives you access to six inde-pen d ent hardware trigger lines on a single cable.SYSTEMCAPACitY: 10 plug-in cards per mainframe.MeMoRY: Battery backed-up storage for 500 switch pat t erns. SWitCh SettLiNg tiMe: Automatically selected by the main-frame. For different switchcards, 7002 will be set to the slow-est relay settling time. Additional time from 0 to 99999.999s econds can be added in 1ms increments.tRiggeR SouRCeS:External Trigger (TTL-compatible, programmable edge, 600ns min i m um pulse, rear panel BNC).IEEE-488 bus (GET, *TRG)Trigger LinkTHROUGHPUTeXeCutioN SPeeD oF SCAN LiSt (channels or memory l ocationsper s econd):ChannelsMemoriesBreak-Before-MakeOFF 300243ON 270189tRiggeR eXeCutioN tiMe (maximum time from ac t i v a t ion of trig g er Source to start of switch open or close 2):Source Latency Jitter GET1 200 µs <15 µs *TRG2, 3 3.0 ms Trigger Link 200 µs <10 µs External200 µs<10 µs Timer <25 µsNOTES1. Excluding switch settling time.2. Assuming no IEEE-488 commands are pending execution.3. Display off.IEEE-488 COMMAND EXECUTION TIMECommand Execution Time 1CLOS (@1!1)<8 ms + Relay Settle Time NOTES1. Measured from the time at which the command terminator is taken from the bus to relay energize. With display OFF.IEEE-488 BUS IMPLEMENTATIONStANDARDS CoNFoRMANCe: Conforms to SCPI-1990, IEEE-488.2, and IEEE-488.1.MuLtiLiNe CoMMANDS: DCL, LLO, SDC, GET, GTL, UNT, UNL, SPE, SPD.uNiLiNe CoMMANDS: IFC, REN, EOI, SRQ, ATN.iNteRFACe FuNCtioNS: SH1, AH1, T5, TE0, L4, LE0, SR1, RL1, PP0, DC1, DT1, C0, E1.All aspects of 7002 op e r a t ion are available from the front panel or over the IEEE-bus interface. The 7002 conforms to IEEE-488.2 and the SCPI (Standard Com m ands for Programmable Instru m ents) command language protocol.• Scan List • Scan Spacing • Channel Spacing • Number of Scans • Number of Channels • Trigger Source• Single Channel Mode • Channel Restrictions • Save Mainframe Con f ig u r a t ion Setups • Digital I/O • Card Pair • Channel Delay • Number of Poles• Channel Pattern MemoryGENERALDiSPLAY: Dual-line vacuum fluorescent. 1st line: 20-char-ac t er alphanumeric. 2nd line: 32-character alphanu-meric. Chan n el status LED grid.Light PeN oPtioN: Provides interactive programming of channels, cross points, scan lists, and memory.ReAR PANeL CoNNeCtoRS: IEEE-488; 9-pin DB9 Female; 8-pin micro DIN for Trigger Link; 8-pin micro DIN for Trigger Link expansion; BNC for External Trigger; BNC for Channel ReadyPoWeR: 100V to 240Vrms, 50/60Hz, 110VA max i m um.eMC: Complies with European Union Directive 89/336/ EEC, EN61326-1.SAFetY: Conforms to European Union Directive 73/23/EEC, EN61010-1).eMi/RFi: Meets VDE 0871B and FCC Class B.eNViRoNMeNt: operating: 0°C to 50°C, <80% RH (0°C to 35°C). Storage: –25°C to +65°C.DiMeNSioNS, Weight: 178mm high × 438mm wide × 448mm deep (7 in × 171⁄4 in × 175⁄8 in). Net weight 9.1kg (20 lb).。

Linear and nonlinear optical fiber chapter5 - optical amplifiers

5.3 Fiber Amplifiers (3)
Processes inside gain fiber Pumping: Relaxation: Inversion: Stimulated Emission: Excitation of Er3+ ions from ground state to a pump level (used pump wavelengths: 980nm, 1480nm) Fast non-radiating transition from pump level to upper laser level Er3+ ions remain excited for (comparatively) long time meta stable state, τspont ≈ 10ms Amplification of propagating signal (and of noise) by transition to ground state
Fiber Amplifiers • Fiber attenuation decreases received power for longer link lengths: repeated amplification of signal necessary Compensation of Attenuation by Amplifiers
Energy
λpump λsignal
relaxation spontaneous emission
lower laser level (ground state) pumping 1480nm or 980nm
λpump
pumping
λsp
5. Optical Amplifiers - 8

SST38LF6401RT 4M ×16 CMOS Advanced Multi-Purpose F

SummaryThe SST38LF6401RT is a 4M ×16 CMOS Advanced Multi-Purpose Flash Plus (Advanced MPF+) upgraded for space applications. It is manufactured with SST proprietary, high-performance CMOS SuperFlash ® technology. The split-gate cell design and thick-oxide tunneling injector attain better reliability and manufacturability compared with alternate approaches. The SST38L-F6401RT writes (program or erase) with a 3.0V to 3.6V power supply. This device conforms to JEDEC standard pin assignments for ×16 memories.SST38LF6401RT Parallel Rad Tolerant Flash MemoryFeatures• Density: 64 Mbit• Read access time: 90 ns • Page size (bytes): 8• Temperature range: –55°C to +125°C • Endurance: 10,000 cycles • Organized as 4M ×16• Single voltage read and write operations : 3.0V to 3.6V • Superior reliability, endurance: up to 10,000 cycles mini-mum, greater than 100 years data retention•Low-power consumption (typical values at 5 MHz)• Active current: 4 mA (typical)• Standby current: 3 µA (typical)• Auto low-power mode: 3 µA (typical)• 128-bit unique ID• Security-ID feature, 256 word, user one-time programmable• Protection and security features, hardware boot block protection/WP# input• Hardware Reset Pin (RST#)•Fast read and page read access times: 90 ns page read access times, 4-word page read buffer• Latched address and data• Fast erase times: sector-erase time: 18 ms (typical), block-erase time: 18 ms (typical), chip-erase time: 40 ms (typical)• Erase-suspend/resume capabilities• Fast word and write-buffer programming times:• Word-program time: 7 µs (typical)• Write buffer programming time: 1.75 µs/word(typical)• 16-word write buffer• Automatic write timing: internal V pp generation• End-of-write detection, toggle bits, data# polling, ry/by# output• CMOS I/O compatibility• JEDEC standard, Flash EEPROM pinouts and command sets• Pin, uniform (32 KWord) and non-uniform (8 KWord) op-tions available, user-controlled individual block (32 KWord) protection, using software only methods • Password protection • CFI Compliant•Packages available: 48-lead TSOP ceramic or plasticThe Microchip name and logo, the Microchip logo and SuperFlash are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. All other trademarks mentioned herein are property of their respective companies.© 2020, Microchip Technology Incorporated. All Rights Reserved. 11/20 DS00003649AWhat is SuperFlash Technology?SuperFlash Technology is an innovative, highly reliable and versatile type of NOR Flash memory invented by Silicon Storage Technology (SST, which is owned by Microchip). SuperFlash memory is much more flexible and reliable than competing non-volatile memories. This technology utilizes a split-gate cell architecture which uses a robust thick-oxide process that requires fewer mask steps resulting in a lower-cost nonvolatile memory solution with excellent data retention and higher reliability.Advantages of SuperFlash Technology• Fast, fixed program and erase times (typical chip-erase time: 40 ms)• No pre-programming or verify required prior to erase (Results in significantly lower power consumption)• Superior reliability (10K cycles and 100 years data retention)• Inherent small sector size (4 KB erase sector vs. 64 KB), results in faster re-write operations and contributes to lowering overall power consumptionSpace Environment• Full wafer lot traceability• 48-lead hermetic ceramic dual flat package (CDFP)• Space-grade screening and qualification (QML and ESCC flow)• T otal ionizing dose: better than 50 Krad, (biased & unbiased) • Heavy ions and protons tested• Single event latch-up immune with a LET > 78 MeV .cm²/mg • Full SEU characterization• No SEU corruption up to 46 MeV .cm²/mgFunctional Block Diagram®。

Bose Professional PowerSpace P4300+ 四通道音频放大器说明书

versatile power amplifierProduct OverviewThe Bose Professional PowerSpace P4300+ amplifier combines power and DSP into a 1RU, four-channel design for quick-turn installations. Part of a comprehensive platform of loudspeakers, controls, and software thathelp installers deliver premium commercial sound systems efficiently, PowerSpace+ amplifiers feature aquick-setup workflow. An onboard configuration utilityand intuitive browser-based UI present common tasksin a logical manner, so you can configure the system faster, reducing installation time while increasing setup accuracy. Once installed, proprietary algorithms offer predictable performance while optional interfaces — such as ControlCenter analog zone controllers — make operation easy for end users. For premium commercial applications, PowerSpace+ models provide amplification and DSP in one integrated, easy-to-configure package.Applications Retail stores Restaurants and bars Hospitality venues Conference centers SchoolsAuxiliary zonesKey Features300 watts per channel and works seamlessly with Bose Professional loudspeakers, DSPs, and controls to create complete commercial sound systemsBuilt-in DSP, including SmartBass processing, routing, level control, delays, limiters, Bose Professional loudspeaker EQs, plus input and area EQsPowerSpace configuration utility facilitates setup with an integrated webserver and intuitive browser-based UI, including real-time control with signal and thermal monitoringOpti-Voice paging provides a smooth transition between music and announcementsIntegrated features to simplify commercial installations: Dedicated input for 600 Ω telephone or mic paging, independent 600 Ω music-on-hold and line-level aux outputs, and a NO/NC mute connectionLoad-independent outputs deliver full channel power to either low-impedance loads (4–8 Ω) or high-impedance(70/100V) loads without bridgingI-Share outputs deliver 2X power level into low-impedance (2–4 Ω) or high-impedance (70/100V) loads by combining the current of both channelsAuto-standby mode saves power when audio signal falls below a set threshold after 20 minutes, then wakes when audio returnsIntuitive end-user operation — optional ControlCenter CC-1, CC-2, and CC-3 analog zone controllers provide easy volume control and source selectionversatile power amplifier Technical Specificationsversatile power amplifierversatile power amplifier1.Power switch – In/Out standby mode2. Power LEDSolid white LED indicates power is on.Blinking white LED indicates the unit is in auto standby mode.Solid red LED indicates a power supply fault.Blinking red LED indicates a thermal fault.3. Input 1, 2, 3, 4 signal LED – Each LED operatesindependently:Green LED indicates signal is present.Amber LED indicates signal is near clipping.Red LED indicates clipping.4. Output 1, 2, 3, 4 limit LED – Each LED operatesindependently:LED is amber when the amplifier is limiting the corresponding output due to exceeding the outputs’ V Peak or V RMS limits.LEDs will display solid red if an amplifier fault is detected.LEDs will blink red when all outputs are muted.1.Output attenuation 1, 2, 3, 4 – Output attenuators for each output. Turn the controls clockwise to decrease attenuation and counter-clockwise to increase attenuation.2. ControlCenter – RJ-45 input connector for BoseProfessional ControlCenter CC-1, CC-2, CC-3 analog zone controllers or CV41 4-to-1 converter only.3. Mute – Contact closure connection where a shortacross the mute connector will mute all outputs. Mute polarity can be inverted by a DIP switch.4. Output – 8-terminal block connector for loudspeakerconnections. Each channel can deliver up to 300 watts regardless of load into 4 Ω, 8 Ω, 70V, or 100V. Each output pair can be I-Shared.5. Ethernet – Connect amplifier to a switch or laptopEthernet port to configure via the web-based configuration utility.6. Music-on-hold – Dedicated 600 Ω music-on-holdinterface.7. Auxiliary output – Line-level auxiliary output.8. Input – Inputs 1 and 2 support balanced line-levelinputs (Euroblock) or unbalanced inputs (stereo RCA). Inputs 3 and 4 are balanced inputs, and Input 4 also supports either a 600 Ω telephone paging input or a PTT/VOX dynamic microphone input.9. AC inlet – Removing the AC cord when the amplifier ison is equivalent to powering down using the front panelpower switch and is an acceptable power-down method.Front PanelRear Panelversatile power amplifierPowerSpace, Opti-Voice, and SmartBass are trademarks of Transom Post OpCo LLC. Bose is a trademark of Bose Corporation. All other trademarks are the property of their respective owners. ©2023 Transom Post OpCo LLC. All rights reserved.Mechanical Diagrams 11. Dimensions are shown in millimeters over inches.Front View Rear ViewLeft View Top View Bottom ViewRight View44[1.7]32[1.2]483[19.0]406[16.0]466[18.3]420[16.5]。

MT3420B

±0.01 ±1.0
µA
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
Note 2: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following
Shutdown Mode VEN = 0V, VIN=4.2V
µA
150 300
µA
40
75
µA
0.1
1.0
µA
TA = 25°C
0.588 0.600 0.612
Regulated Feedback
L Voltage VFB
TA = 0°C ≤ TA ≤ 85°C TA = -40°C ≤ TA ≤ 85°C
Operating Temperature Range … -40°C to +85°C Lead Temperature(Soldering,10s) …..…..+300°C Storage Temperature Range ……-65°C to 150°C
PIN CONFIGURATION
ENTIAL PIN DESCRIPTION
AEROSEMI
MT3420B
1.5MHz, 2A Synchronous Step-Down Converter
FEATURES
GENERAL DESCRIPTION
• High Efficiency: Up to 96% • 1.5MHz Constant Frequency Operation • 2A Output Current • No Schottky Diode Required • 2.3V to 6V Input Voltage Range • Output Voltage as Low as 0.6V • PFM Mode for High Efficiency in Light Load • 100% Duty Cycle in Dropout Operation • Low Quiescent Current: 40μA • Short Circuit Protection • Thermal Fault Protection • Inrush Current Limit and Soft Start • <1μA Shutdown Current • SOT23-6 package

迈兰奧克高性能网络开关介绍说明书

©2020 Mellanox Technologies. All rights reserved.†For illustration only. Actual products may vary.Mellanox provides the world’s smartest switch, enabling in-network computing through the Co-Design Scalable Hierarchical Aggregation and Reduction Protocol (SHARP)™ technology. QM8790 has the highest fabric performance available in the market with up to 16Tb/s of non-blocking bandwidth with sub-130ns port-to-port latency.SCALING-OUT DATA CENTERS WITH HDR 200G INFINIBANDFaster servers, combined with high-performance storage and applications that use increasingly complex computations are causing data bandwidth requirements to spiral upward. As servers are deployed with next generation processors, High-Performance Computing (HPC) environments and Enterprise Data Centers (EDC) will need every last bit of bandwidth delivered with Mellanox’s next generation of HDR InfiniBand, high-speed, smart switches.WORLD’S SMARTEST SWITCHBuilt with the Mellanox Quantum InfiniBand switch device, the QM8790 provides up to forty 200Gb/s ports, with full bi-directional bandwidth per port. These stand-alone switches are an ideal choice for top-of-rack leaf connectivity or for building small to extremely large sized clusters.QM8790 is the world’s smartest network switch, designed to enable in-network computing through the Co-Design Scalable Hierarchical Aggregation and Reduction Protocol (SHARP)™ technology. The Co-Design architecture enables the usage of all active data center devices to accelerate thecommunications frameworks using embedded hardware, resulting in an order of magnitude application performance improvements.QM8790 enables efficient computing with features such as static routing, adaptive routing, congestion control and enhanced VL mapping to enable modern topologies (SlimFly, Dragonfly+, 6DT). These ensure the maximum effective fabric bandwidth by eliminating congestion hot spots.The QM8790 switch has best-in-class design to support low power consumption. Power is further reduced upon partial port utilization.COLLECTIVE COMMUNICATION ACCELERATIONCollective communication describes communication patterns in which all members of a group ofcommunication endpoints participate. Collective communications are commonly used in HPC protocols such as MPI and SHMEM.40-port Non-blocking Externally Managed HDR 200Gb/s InfiniBand Smart SwitchQM8790Mellanox Quantum ™HDR Edge SwitchPRODUCT BRIEFSWITCH SYSTEM †350 Oakmead Parkway, Suite 100, Sunnyvale, CA 94085Tel: 408-970-3400 • Fax: © Copyright 2020. Mellanox Technologies. All rights reserved.Mellanox, Mellanox logo, and Connect-X are registered trademarks of Mellanox Technologies, Ltd. Mellanox Quantum and Scalable Hierarchical Aggregation and Reduction Protocol (SHARP) are trademarks of Mellanox Technologies, Ltd. All other trademarks are property of their respective owners.Mellanox QM8790 InfiniBand Switchpage 2The Mellanox Quantum switch improves the performance of selected collective operations by processing the data as it traverses the network, eliminating the need to send data multiple times between endpoints.It also supports the aggregation of large data vectors at wire speed to enable MPI large vector reduction operations, which are crucial for machine learning applications.HDR100QM8790 together with the Mellanox ConnectX ®-6 adapter card support HDR100. By utilizing two pairs of two lanes per port, the QM8790 can support up to 80 ports of 100G to create the densest TOR switchavailable in the market. This is a perfect solution for double dense racks with more than 40 servers per rack and also helps small-medium deployments with the need to scale to 3-level fat-tree, to lower power, latency and space.BUILDING EFFICIENT CLUSTERSQM8790 is the industry’s most cost-effective building block for deploying high performance clusters and data centers. Whether looking at price-to-performance or energy-to-performance, QM8790 offers superior performance, low power and scale, reducing capital and operating expenses, and providing the best return-on-investment.Mellanox QM8790–19’’ rack mountable 1U chassis –40 QSFP56 non-blocking ports with aggregate data throughput up to 16Tb/s (HDR)Switch Specifications–Compliant with IBTA 1.21 and 1.3 –9 virtual lanes:8 data + 1 management –256 to 4Kbyte MTU–Adaptive Routing –Congestion control –Port Mirroring –VL2VL mapping–4X48K entry linear forwarding databaseManagement Ports–I 2C (RJ45)–System reset buttonConnectors and Cabling–QSFP56 connectors–Passive copper or active fiber cables –Optical modulesIndicators–Per port status LED Link, Activity –System LEDs: System, fans, power supplies –Unit ID LEDPower Consumption–Contact Mellanox SalesPower Supply–Dual redundant slots –Hot plug operation –Input range:100-127VAC, 200-240VAC–Frequency: 50-60Hz, single phase AC, 4.5A, 2.9ACooling–Front-to-rear or rear-to-front cooling option–Hot-swappable fan unitFEATURESSafety–CB –cTUVus –CE –CUEMC (Emissions)–CE –FCC –VCCI –ICES –RCMOperating Conditions–Temperature:–Operating 0ºC to 40ºC–Non-Operating -40ºC to 70ºC –Humidity:–Operating 10% to 85% non-condensing–Non-Operating 10% to 90% non-condensing–Altitude: Up to 3200mAcoustic–ISO 7779 –ETS 300 753Others–RoHS compliant –Rack-mountable, 1U –1-year warrantyCOMPLIANCETable 1 - Part Numbers and Descriptions53778PB Rev 2.1。

ANALOG DEVICES ADN2830 数据手册

aADN2830 Information furnished by Analog Devices is believed to be accurate andreliable. However, no responsibility is assumed by Analog Devices for itsuse, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. T rademarks and registered trademarks are the property of their respective companies.One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 Fax: 781/326-8703© 2003 Analog Devices, Inc. All rights reserved.REV.AContinuous Wave Laser FUNCTIONAL BLOCK DIAGRAMMPDIBMON IMPDMON ALS FAIL DEGRADE V GNDR PSETMODEFEATURESBias Current Range 4 mA to 200 mAMonitor Photodiode Current 50 ␮A to 1200 ␮A Closed-Loop Control of Average PowerLaser FAIL and Laser DEGRADE Alarms Automatic Laser Shutdown, ALSFull Current Parameter Monitoring5 V Operation–40؇C to +85؇C Temperature Range5 mm ؋ 5 mm 32-Lead LFCSP Package APPLICATIONSFiber Optic Communication GENERAL DESCRIPTIONThe ADN2830 provides closed-loop control of the average optical power of a continuous wave (CW) laser diode (LD) after initial factory setup. The control loop adjusts the laser IBIAS to maintain a constant back facet monitor photodiode (MPD) current and thus a constant laser optical power. The external PSET resistor is adjusted during factory setup to set the desired optical power. R PSET is set at 1.23/I AV, where I AVis the MPD current corresponding to the desired optical power. Programmable alarms are provided for laser fail (end of life) and laser degrade (impending fail).To provide monitoring of the MPD current, the MPD can be connected to the IMPD pin. In this case, the MPD current is mirrored to the IMPDMON pin to provide a monitor and internally to the PSET pin to close the control loop.By closing the feedback using IBMON rather than an MPD connected to PSET, the device is configured to control a constant current in the laser rather than a constant optical output power.Average Power Controller查询ADN2830供应商REV. A–2–ADN2830–SPECIFICATIONSParameterMinTypMaxUnitConditions/CommentsLASER BIAS (BIAS)Output Current IBIAS 4200mA Compliance Voltage 1.2V CCV IBIAS during ALS 40µA ALS Response Time 10µs MONITOR PD (IMPD)Current501200µA Input Voltage1.6V POWER SET INPUT (PSET)Capacitance 80pF Input Current 501200µA Voltage1.15 1.231.35V ALARM SET (ASET)Allowable Resistance Range 1.213k ΩVoltage 1.151.23 1.35V Hysteresis5%LOGIC INPUTS (ALS, MODE)V IH 2.4V V IL0.8V ALARM OUTPUTS (Internal 30 k Ω Pull-Up)V OH 2.4V V OL 0.4V IBMON IMPDMON IBMON, Division Ratio 100A/A IMPDMON Division Ratio 1A/A Compliance Voltage 0V CC – 1.2V SUPPLY I CC 225mA IBIAS = 0V CC4.55.05.5VNOTES 1Temperature range: –40°C to +85°C.2I CC for power calculation is the typical I CC given.Specifications subject to change without notice.(V CC = 5 V ؎ 10%. All specifications T MIN to T MAX , unless otherwise noted 1.Typical values as specified at 25؇C.)REV. A ADN2830–3–ABSOLUTE MAXIMUM RATINGS 1(T A = 25°C, unless otherwise noted.)V CC to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 V Digital Inputs (ALS, Mode) . . . . . . . . .–0.3 V to V CC + 0.3 V Operating Temperature RangeIndustrial . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C Storage Temperature Range . . . . . . . . . . –65°C to +150°C Junction Temperature (T J Max ) . . . . . . . . . . . . . . . . . 150°C θJA Thermal Impedance 2 . . . . . . . . . . . . . . . . . . . .32°C/W 32-Lead LFCSP Package,Power Dissipation . . . . . . . . . . . . . .(T J Max –T A )/θJA mW Lead Temperature (Soldering 10 sec) . . . . . . . . . . . . . .300°CNOTES 1Stresses above those listed under Absolute Maximum Ratings may cause perma-nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating condi-tions for extended periods may affect device reliability.2θJA is defined when the part is soldered onto a 4-layer board.ORDERING GUIDEModelTemperature Range Package Description ADN2830ACP32–40°C to +85°C 32-Lead LFCSP ADN2830ACP32-REEL7–40°C to +85°C 32-Lead LFCSP ADN2830ACP32-REEL–40°C to +85°C32-Lead LFCSPCAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADN2830 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.REV. AADN2830–4–PIN CONFIGURATION16 NC 15 NC 14 GND113 NC V CC 2 25NC 26GND2 274 I B M O N 12 V CC 5 11 10 PAVCAP 9 PAVCAPG N D 1A S E T 2N C 3P S E T 4I M P D 5I M P D M O N 6G N D 4 7V C C 4 8IBIAS 28GND2 29GND2 30IBIAS 31NC 323 I B M O N 2 G N D 31 V C C 30 A L S 9 F A I L 8 D E G R A D E 7 M O D EV CC 1NC = NO CONNECTPIN FUNCTION DESCRIPTIONSPin No.Mnemonic Function1GND Supply Ground2ASET Alarm Current Threshold Set Pin 3NC No Connect4PSET Average Optical Power Set Pin 5IMPDMonitor Photodiode Input6IMPDMON Mirrored Current from Monitor Photodiode—Current Source 7GND4Supply Ground 8V CC 4Supply Voltage9PAVCAP Average Power Loop Capacitor 10PAVCAP Average Power Loop Capacitor 11V CC 1Supply Voltage 12V CC 5Supply Voltage 13NC No Connect 14GND1Supply Ground 15NC No Connect 16NC No Connect17MODE Mode Select: Tied to ALS = Standalone, High = Parallel Current Booster 18DEGRADE DEGRADE Alarm Output 19FAIL FAIL Alarm Output20ALS Automatic Laser Shutdown 21V CC 3Supply Voltage 22GND3Supply Ground23IBMON Bias Current Monitor Output—Current Source 24IBMON Bias Current Monitor Output—Current Source 25V CC 2Supply Voltage 26NC No Connect 27GND2Supply Ground28IBIAS Laser Diode Bias Current 29GND2Supply Ground 30GND2Supply Ground31IBIAS Laser Diode Bias Current 32NCNo ConnectREV. A ADN2830–5–GENERALLaser diodes have current-in to light-out transfer functions as shown in Figure 1. Two key characteristics of this transfer func-tion are the threshold current, I TH , and slope in the linear region beyond the threshold current, referred to as slope efficiency (LI).I TH CURRENTP AVO P T I C A L P O W E RFigure ser Transfer FunctionCONTROLA monitor photodiode (MPD) is required to control the laser diode. The MPD current is fed into the ADN2830 to control the power, continuously adjusting the bias current in response to the laser’s changing threshold current and light to current (LI) slope (slope efficiency).The ADN2830 uses automatic power control (APC) to maintain a constant power over time and temperature.The average power is controlled by the R PSET resistorconnected between the PSET pin and ground. The PSET pin is kept 1.23 V above GND. For an initial setup, the R PSET resis-tor can be calculated using the following formula.R V I PSET AV=123.where I AV is average MPD current.Note the I PSET will change from device to device. It is not required to know exact values for LI and MPD optical coupling.LOOP BANDWIDTH SELECTIONCapacitor values greater than 22 nF are used to set the actual loop bandwidth. This capacitor is placed between the PAVCAP pin and ground. It is important that the capacitor is a low leak-age multilayer ceramic with an insulation resistance greater than 100 G Ω or a time constant of 1000 sec, whichever is less.ALARMSThe ADN2830 has two active high alarms, DEGRADE and FAIL. A resistor between ground and the ASET pin is used to set the current at which these alarms are raised. The current through the ASET resistor is a ratio of (N ϫ 200):1 to the FAIL alarm threshold (N is the number of ADN2830s in parallel).The DEGRADE alarm will be raised at 90% of this level.Example:I mA N I mA FAIL DEGRADE ==∴=50145,I I N mAA ASET BIASTRIP =×==µ20050200250*R V I Ak ASET ASET ===123123250492...µΩThe laser degrade alarm, DEGRADE, gives a warning of imminent laser failure if the laser diode degrades further or environmental condi-tions continue to stress the laser diode, e.g., increasing temperature.The laser fail alarm, FAIL, is activated when:•The ASET threshold is reached.•The ALS pin is set high. This shuts off the modulation and bias currents to the laser diode, resulting in the MPD current dropping to zero.DEGRADE will only be raised when the bias current exceeds 90% of the ASET current.MONITOR CURRENTSIBMON and IMPDMON are current controlled current sources from V CC . They mirror the bias and MPD current for increased monitoring functionality. An external resistor to GND gives a voltage proportional to the current monitored. If the IMPDMON function is not used, the IMPD pin must be grounded and the monitor photodiode must be tied directly to the PSET pin.AUTOMATIC LASER SHUTDOWNWhen ALS is logic high, the bias current is turned off. Correct operation of ALS can be confirmed by the fail alarm being raised when ALS is asserted. Note that this is the only time DEGRADE will be low while FAIL is high.MODEThe MODE feature on the ADN2830 allows the user to operate more than one ADN2830 in parallel current boosting mode to achieve up to N ϫ 200 mA of bias current (N is the number of ADN2830s in parallel). When using parallel boosting mode, one device is run as the master, the other as the slave. The MODE pin on the master is tied to ALS and the MODE pin on the slave is tied high (see Figure 3 for reference circuit).ALARM INTERFACESThe FAIL and DEGRADE outputs have an internal 30 k Ωpull-up resistor that is used to pull the digital high value to V CC.However, the alarm output may be overdriven with an external resistor allowing the alarm interfacing to non-V CC levels.Non-V CC alarm output levels must be below the V CC used for the ADN2830.*The smallest value for R ASET is 1.2 k Ω, as this corresponds to the IBIAS maximum of N ϫ 200 mA.REV. AADN2830–6–POWER CONSUMPTIONThe ADN2830 die temperature must be kept below 125°C.The exposed paddle should be connected in such a manner that it is at the same potential as the ADN2830 ground pins. Power consumption can be calculated using the following formulas.T T P DIE AMBIENT A =+×θJI I CC CCMIN=P V I IBIAS V CC CC BIAS PIN=×+×()_␮F V TO PIN 8Figure 2.Test Circuit, Standalone Mode, IMPD Input Not UsedREV. A ADN2830–7–␮F Figure 3.Test Circuit, Second ADN2830 Used in Parallel Current Boosting Mode to Achieve 400 mA Max IBIASREV. AADN2830–8–␮F NOTES1.FOR DIGIT AL CONTROL, REPLACE R PSET WITH A DIGIT AL POTENTIOMETER FROM ANALOG DEVICES: ADN2850 10-BIT RESOLUTION, 35 ppm/؇C TC, EEPROM; AD5242 8-BIT RESOLUTION, 30 ppm/؇C TC.2.TOT AL CURRENT TO LASER = IBIAS + IBIAS ؋ R1/R2.3.FOR BEST ACCURACY , SIZE R1 TO HAVE A MAXIMUM VOL T AGE DROP ACROSS IT WITHIN THE HEADROOM CONSTRAINTS.4.FOR 250 mA EXTRA IBIAS (450 mA TOT AL) FROM AMP1, USE AD8591 AMPLIFIER. AMP1 IS THE OPERA TIONAL AMPLIFIER SHOWN IN THIS FIGURE.5.FOR 350 mA EXTRA IBIAS (550 mA TOT AL) FROM AMP1, USE ANALOG DEVICES’ SSM2211 AMPLIFIER. AMP1 ISTHE OPERA TIONAL AMPLIFIER SHOWN IN THIS FIGURE.Figure 4.The ADN2830 Configured with Current Multiplier␮F Figure 5.The ADN2830 Configured as Average Power Controller (Bias Current Sourced)REV. A ADN2830–9–␮F Figure 6.The ADN2830 Configured as a Controlled Current Source by Feeding Back the Bias Monitor Current to R PSETREV. AADN2830–10–OUTLINE DIMENSIONS32-Lead Frame Chip Scale Package [LFCSP](CP-32)Dimensions shown in millimetersCOMPLIANT TO JEDEC STANDARDS MO-220-VHHD-2PLANECOPLANARITY0.08PIN 1INDICATORSQRevision HistoryLocationPage6/03—Data Sheet changed from REV. 0 to REV. A.Changes to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10–11–)A(3/6––23C –12–。

ASUS 主板规格说明书

HP Desktop PCs - Motherboard SpecificationsMotherboard Supplier ASUSSystem BIOS Core Brand Asus/AMIBoard Form Factor uATXProcessor Brand AMDProcessor Socket Type Socket-A (PGA462)Processor Families AthlonXP (Thoroughbred,Barton),Maximum Processor Core Frequency <=2.16Ghz (2700+) Thoroughbred <=2.2GHz Barton (3200+)Processor Front Side Bus Frequency 266/333/400MHzHyper Threading Support naProcessor VRM SpecificationChipset Name Crush18D (nForce2 400) Chipset "North Bridge" & RevisionChipset "South Bridge" & Revision MCP2Super I/O ITE IT8712F-AFlash BIOS Device Type & Density 4Mb Flash EEPROM Memory Type DDR SDRAMMemory Speed PC2700/PC2100 Memory Sockets 2 DIMMSingle or Dual Channel System Memory Single channel Maximum Memory Up to 2.0GBAGP Graphics Support YesAGP Graphics Maximum Mode naIntegrated Graphics (UMA) Supplier Up onlyIntegrated Graphics Shared Memory naTV-Out Device noneTV-Out Configuration noneIntegrated AC'97 Audio Support none5.1 channel Audio Support AC'97 DownAC'97 Codec Device Realtek ALC650 Passive Speaker Output (amplified) M,LI,LO,SOAudio SP-DIF Output noneAudio SP-DIF Input noneRear Audio Jacks (Mic,Line-In,Line-Out) Mic, Line-In, Line-Out Internal CD-Audio In Connector 2Front Audio Line-In/Headphone/Mic LI/HP/MICEthernet MAC/PHY Device Realtek 8201BL Integrated IEEE-1394 Support YesIntegrated IEEE-1394 MAC/PHY Device Agere FW802C-PHYOnboard 1394 Maximum Transfer Rate (Mbps)400MbpsIEEE-1394 Ports (Total) 2IEEE-1394 Front Ports (on pin header) 1IDE/ATAPI UDMA Modes ATA-100/66/33Expansion Slots (AGP/PCI) 1 AGP, 3 PCIUSB Interface Specification (2.0/1.1) USB 2.0USB Ports (Total) 6USB Front Ports (on pin headers) 2USB Rear Ports (at rear I/O area) 4Serial, Parallel, Floppy, PS2 Kbd &Mouse Ports1S, 1P, 1F, PS2 K+MFan Headers (CPU, System, Chipset) CPU, System1CPU Fan Speed Control (for active fansink) YesSystem Fan Speed Control YesSuffix (Legend Below) -UL6EUGraphics card (up, not on motherboard) LLAN on motherboard (ethernet)E1394 on motherboardCopyright Hewlett-Packard Co. 1994-2003This information is subject to change without notice andis provided "as is" with no warranty.Hewlett-Packard shall not be liable for any direct,indirect, special, incidental or consequential damagesin connection with the use of this material.。

挤压机部件中英文对照

annex1EXTRUSION PRESSHYDRAULIC CIRCUITCONTROL SYSTEMCONTAINEREXIT HOLEDIE PACKMAIN PUMPSframeaccessoryLOW SPEED PUMPCONTAINER SEALING PUMPAUXILIARY PUMPFILTERING PUMPSOIL-TO-WATER HEAT EXCHANGERHYDRAULIC MANIFOLDSPRE-FILLING VALVEOIL TANKELETRIC MOTORP3/16billet loaderreaction beam DANIEL挤压机部件中英文对照P2/16cylindersDie cassettedummy blockCounter platenP5/16tie rodscasingsmain cylinder platendie platennutshydraulic jacksmain beamsVariable displacement main pumpsproportional valvehigh-pressure pumprelief valveSmall pumpsmain ramcontainer holderbutt shear/Discard shearP8/16Side cylinders Discard shear bladeP4/16P9/16Discard knocker P10/16DIE pack cylinder P11/16Variable Delivery pump Low speed pump Axial pump P12/16Filter mesh Oil tank Heater resistance Main Pump Motor Auxiliary Pump Motor Low speed pump motor Cooling pump Motor Sealing pump motor annex2 P2/76MOVABLE CROSSHEADCONTAINER SHIFTING CYLINDERSDIE STACK LOCKING DEVICESHEAR BLADE LUBRICATION SYSTEMDIE CHANGING SYSTEMDISCARD DETECTIONDUMMY BLOCK LUBRICATION SYSTEMLUBRICATION SYSTEMP13/16P9/16TOOLING SETPRESS EXIT MOUTH SAFETY SYSTEMWATER COOLING DEVICE (ENGINEERING ONLY)HIGH PRESSURE CIRCUITLOW PRESSURE CIRCUITCOOLING SYSTEMFILTERING SYSTEMHYDRAULIC CONTROL (MANIFOLDS)HIGH AND LOW PRESSURE PIPINGAC MOTORS ACINCOMING LINEMAIN MOTOR STARTERSAUXILIARY MOTOR STARTERHEATER CIRCUITDIE HEATER CIRCUITPLC SYSTEM FOR EXTRUSION CONTROLP3/76POWER SUPPLY FOR AUTOMATION COMPONENTSCONTROLS CARDS SENSORSMACHINE ACCESSORYEXTRUSION PRESS CONTROL DESKLOCAL CONTROL PULPITTERMINAL BOX (REMOTE I/O) AND SENSORDP/DP- TCP/IP INTERFACE DP/DP- TCP/IPHUMAN MACHINE INTERFACEMOTOR CABLESSAFETY RELAY (PILZ PNOZ MULTI)Extrusion PLC control systemP8/76stemtie rodsP10/76BedplateThe support framesStandard embedded partbolts and nutsTie rods housings and casingsP11/76Main cylinderlong bronze bushesmain ramP12/76side cylindersmoving crossheadSquare casingsP13/76flat guidesP14/76sliding blocksThe stem pressure ringslide shifting cylinderstem locking deviceconnection housingsStem locking ringP15/76double acting cylindersP16/76container centering keysheat insulationP17/76thermocouplesResistance heatingP19/76Double Channel Air Cooling SystemThe fixed vertical shearP20/76The tie rod housings and the casings bearing seats Die stack locking devicebladeScrew adjustment deviceAutomatic discard knockerpneumatic cylindernozzleslubrication tankDiscard detectionA photocell detectorbasketdie slideThe die carrierauxiliary shearP25/76robotized armhorizontally shifting saddleA mechanical stopa limit switchchainP26/76dummy blockmantlelinerP28/76container cleaning ringOne bushA safety mouthP29/76Fixed guiding systemthe safety Cover plateVideo camera systemManifold block and electrical system P30/76heat exchangershot water tankelectrical resistancesrollers with bearingsP32/76Axial piston pumpsClose loop controlProportional valveAmplifierelectronic control cardsP33/76safety valvesA high pressure pumpMain pumpsSlow speed pumpContainer sealing pumprespective coupling jointsInductive pump swivel angler transducer P34/76Damping bearings for shock absorption HP control valvesHP pumpsFilterning pumpoil cooling systemP35/76clogging gaugeOn/off valveP36/76Anti-dust filtersoil level indicatorOil level transducerTemperature transducerP37/76Manifold with circulating valves for the HP axial piston pumps change-over valvesOne manifold for stem movement controlOne manifold for main cylinders controlOne manifold for side cylinders controlOne Manifold for shear controlOne manifold for die slide controlOne manifolds for Container controlOne manifolds for the pre-filling valvesolenoid valvesLED indicatorP39/76Variable Delivery pumpOn board LP and HP pipingP40/76pipe clampsflangesjunction blocksP41/76three-pole circuit breakerVoltage and current measuring equipmentSingle-phase AC control transformer3-pole on-load isolator switchfuses/automatic circuit breakerSoft startercontactor with thermal relayP44/76Ampere meterP45/76I/O interfacenetwork interfaceSpare memoryP46/76Linear transducerProximity switchP47/76Photocelloptical sensorExtrusion press Control deskKey locksMushroom buttonKeyboardsHMI systemdedicated selector, andilluminated pushbuttonlamp indicationP48/76Local control pulpitmonitorHuman machine interfaceCPUHard diskCaseP50/76Special cablesCables trayEMERGENCY OFF Pushbuttons P51/76actuatorscontrol boxesP63/76CurvesInterlock挤压机液压回路控制系统挤压筒出料孔模具组件主泵框架附件低速泵挤压筒密封泵辅泵过滤泵油到水热交换器液压阀组预充阀油箱电机铝锭装载机前梁液压缸模座挤压垫前梁张立柱套筒后梁前梁螺母液压千斤顶主梁变量主泵比例阀高压泵安全阀低速泵主柱塞挤压筒支撑压余剪侧缸压余剪刀片压余锤模具组液压缸变量泵低速泵轴向泵滤网油箱加热电阻主泵电机辅泵电机低速泵电机冷却泵电机密封泵电机活动横梁挤压筒滑移液压缸模具锁紧装置刀片润滑系统模具更换站压余检测挤压垫润滑系统润滑系统工具挤压机出口保护系统水冷装置（仅提供设计）高压回路低压回路冷却系统过滤系统高压控制（阀组）高低压管道电机进线主电机启动辅助电机启动加热器电路模具加热器电路挤压控制的PLC 系统自动化元件电源控制卡传感器设备配件挤压机操控台本地控制站接线盒（远程I/O)和传感器接口人机界面电机电缆安全继电器挤压机PLC控制系统挤压杆张立柱挤压机机座支撑框架标准预埋件螺栓螺母有张力柱套筒主缸长青铜套主柱塞侧缸活动横梁方形衬套平板导位滑块挤压杆压力环滑动横移油缸挤压杆锁紧装置连接套挤压杆锁紧环双动侧液压缸挤压筒的中心销隔热材料热电偶电阻加热元件双通道空冷系统垂直布置的固定式剪张力柱套支撑座模座锁紧装置刀片螺栓调节装置自动压余打落器气动缸喷嘴润滑缸压余检测光电检测元件压余筐模具滑块模具套辅助剪机械手水平滑动鞍座机械挡块限位开关拖链挤压垫外套内衬挤压筒清洁环剔除套安全出口固定导向系统安全挡板视频导向系统阀块和电气系统热交换器热水箱电阻丝带轴承的辊道轴向柱塞泵闭环控制比例阀放大器电控卡安全阀高压泵主泵低速泵挤压筒密封泵联轴器电感式泵旋转角度传感器减震阻尼轴承高压控制阀高压泵过滤泵油冷系统堵塞测量仪表开关阀防尘过滤器油位指示器油位传感器温度传感器高压轴向柱塞泵循环阀块更换阀台挤压杆运动控制阀台主缸控制阀台侧缸控制阀台剪刀控制阀台模具移动控制阀台挤压筒控制阀台预充阀阀台电磁阀LED 指示灯变量泵随机高低压管线管夹法兰连接块三极断路开关电压和电流测量装置单相AC控制变压器三极带负荷隔离开关熔断器/自动断路器软启动带继电器的接触器电流表I/O 接口网络接口备用存储器线性传感器接近开关光电管光电传感器挤压机操控台键锁开关蘑菇头开关键盘HMI 系统专用选择器发光按钮指示灯本地控制站人机界面硬盘机箱特殊电缆电缆槽事故急停按钮执行器控制箱曲线图联锁。

稳定的高功率激光系统在高级引力波探测器中的应用

Stabilized high-power laser system forthe gravitational wave detector advancedLIGOP.Kwee,1,∗C.Bogan,2K.Danzmann,1,2M.Frede,4H.Kim,1P.King,5J.P¨o ld,1O.Puncken,3R.L.Savage,5F.Seifert,5P.Wessels,3L.Winkelmann,3and B.Willke21Max-Planck-Institut f¨u r Gravitationsphysik(Albert-Einstein-Institut),Hannover,Germany2Leibniz Universit¨a t Hannover,Hannover,Germany3Laser Zentrum Hannover e.V.,Hannover,Germany4neoLASE GmbH,Hannover,Germany5LIGO Laboratory,California Institute of Technology,Pasadena,California,USA*patrick.kwee@aei.mpg.deAbstract:An ultra-stable,high-power cw Nd:Y AG laser system,devel-oped for the ground-based gravitational wave detector Advanced LIGO(Laser Interferometer Gravitational-Wave Observatory),was comprehen-sively ser power,frequency,beam pointing and beamquality were simultaneously stabilized using different active and passiveschemes.The output beam,the performance of the stabilization,and thecross-coupling between different stabilization feedback control loops werecharacterized and found to fulﬁll most design requirements.The employedstabilization schemes and the achieved performance are of relevance tomany high-precision optical experiments.©2012Optical Society of AmericaOCIS codes:(140.3425)Laser stabilization;(120.3180)Interferometry.References and links1.S.Rowan and J.Hough,“Gravitational wave detection by interferometry(ground and space),”Living Rev.Rel-ativity3,1–3(2000).2.P.R.Saulson,Fundamentals of Interferometric Gravitational Wave Detectors(World Scientiﬁc,1994).3.G.M.Harry,“Advanced LIGO:the next generation of gravitational wave detectors,”Class.Quantum Grav.27,084006(2010).4. B.Willke,“Stabilized lasers for advanced gravitational wave detectors,”Laser Photon.Rev.4,780–794(2010).5.P.Kwee,“Laser characterization and stabilization for precision interferometry,”Ph.D.thesis,Universit¨a t Han-nover(2010).6.K.Somiya,Y.Chen,S.Kawamura,and N.Mio,“Frequency noise and intensity noise of next-generationgravitational-wave detectors with RF/DC readout schemes,”Phys.Rev.D73,122005(2006).7. B.Willke,P.King,R.Savage,and P.Fritschel,“Pre-stabilized laser design requirements,”internal technicalreport T050036-v4,LIGO Scientiﬁc Collaboration(2009).8.L.Winkelmann,O.Puncken,R.Kluzik,C.Veltkamp,P.Kwee,J.Poeld,C.Bogan,B.Willke,M.Frede,J.Neu-mann,P.Wessels,and D.Kracht,“Injection-locked single-frequency laser with an output power of220W,”Appl.Phys.B102,529–538(2011).9.T.J.Kane and R.L.Byer,“Monolithic,unidirectional single-mode Nd:Y AG ring laser,”Opt.Lett.10,65–67(1985).10.I.Freitag,A.T¨u nnermann,and H.Welling,“Power scaling of diode-pumped monolithic Nd:Y AG lasers to outputpowers of several watts,”mun.115,511–515(1995).11.M.Frede,B.Schulz,R.Wilhelm,P.Kwee,F.Seifert,B.Willke,and D.Kracht,“Fundamental mode,single-frequency laser ampliﬁer for gravitational wave detectors,”Opt.Express15,459–465(2007).#161737 - $15.00 USD Received 18 Jan 2012; revised 27 Feb 2012; accepted 4 Mar 2012; published 24 Apr 2012 (C) 2012 OSA7 May 2012 / Vol. 20, No. 10 / OPTICS EXPRESS 1061712. A.D.Farinas,E.K.Gustafson,and R.L.Byer,“Frequency and intensity noise in an injection-locked,solid-statelaser,”J.Opt.Soc.Am.B12,328–334(1995).13.R.Bork,M.Aronsson,D.Barker,J.Batch,J.Heefner,A.Ivanov,R.McCarthy,V.Sandberg,and K.Thorne,“New control and data acquisition system in the Advanced LIGO project,”Proc.of Industrial Control And Large Experimental Physics Control System(ICALEPSC)conference(2011).14.“Experimental physics and industrial control system,”/epics/.15.P.Kwee and B.Willke,“Automatic laser beam characterization of monolithic Nd:Y AG nonplanar ring lasers,”Appl.Opt.47,6022–6032(2008).16.P.Kwee,F.Seifert,B.Willke,and K.Danzmann,“Laser beam quality and pointing measurement with an opticalresonator,”Rev.Sci.Instrum.78,073103(2007).17. A.R¨u diger,R.Schilling,L.Schnupp,W.Winkler,H.Billing,and K.Maischberger,“A mode selector to suppressﬂuctuations in laser beam geometry,”Opt.Acta28,641–658(1981).18. B.Willke,N.Uehara,E.K.Gustafson,R.L.Byer,P.J.King,S.U.Seel,and R.L.Savage,“Spatial and temporalﬁltering of a10-W Nd:Y AG laser with a Fabry-Perot ring-cavity premode cleaner,”Opt.Lett.23,1704–1706 (1998).19.J.H.P¨o ld,“Stabilization of the Advanced LIGO200W laser,”Diploma thesis,Leibniz Universit¨a t Hannover(2009).20. E.D.Black,“An introduction to Pound-Drever-Hall laser frequency stabilization,”Am.J.Phys.69,79–87(2001).21.R.W.P.Drever,J.L.Hall,F.V.Kowalski,J.Hough,G.M.Ford,A.J.Munley,and H.Ward,“Laser phase andfrequency stabilization using an optical resonator,”Appl.Phys.B31,97–105(1983).22. A.Bullington,ntz,M.Fejer,and R.Byer,“Modal frequency degeneracy in thermally loaded optical res-onators,”Appl.Opt.47,2840–2851(2008).23.G.Mueller,“Beam jitter coupling in Advanced LIGO,”Opt.Express13,7118–7132(2005).24.V.Delaubert,N.Treps,ssen,C.C.Harb,C.Fabre,m,and H.-A.Bachor,“TEM10homodynedetection as an optimal small-displacement and tilt-measurement scheme,”Phys.Rev.A74,053823(2006). 25.P.Kwee,B.Willke,and K.Danzmann,“Laser power noise detection at the quantum-noise limit of32A pho-tocurrent,”Opt.Lett.36,3563–3565(2011).26. A.Araya,N.Mio,K.Tsubono,K.Suehiro,S.Telada,M.Ohashi,and M.Fujimoto,“Optical mode cleaner withsuspended mirrors,”Appl.Opt.36,1446–1453(1997).27.P.Kwee,B.Willke,and K.Danzmann,“Shot-noise-limited laser power stabilization with a high-power photodi-ode array,”Opt.Lett.34,2912–2914(2009).28. ntz,P.Fritschel,H.Rong,E.Daw,and G.Gonz´a lez,“Quantum-limited optical phase detection at the10−10rad level,”J.Opt.Soc.Am.A19,91–100(2002).1.IntroductionInterferometric gravitational wave detectors[1,2]perform one of the most precise differential length measurements ever.Their goal is to directly detect the faint signals of gravitational waves emitted by astrophysical sources.The Advanced LIGO(Laser Interferometer Gravitational-Wave Observatory)[3]project is currently installing three second-generation,ground-based detectors at two observatory sites in the USA.The4kilometer-long baseline Michelson inter-ferometers have an anticipated tenfold better sensitivity than theirﬁrst-generation counterparts (Inital LIGO)and will presumably reach a strain sensitivity between10−24and10−23Hz−1/2.One key technology necessary to reach this extreme sensitivity are ultra-stable high-power laser systems[4,5].A high laser output power is required to reach a high signal-to-quantum-noise ratio,since the effect of quantum noise at high frequencies in the gravitational wave readout is reduced with increasing circulating laser power in the interferometer.In addition to quantum noise,technical laser noise coupling to the gravitational wave channel is a major noise source[6].Thus it is important to reduce the coupling of laser noise,e.g.by optical design or by exploiting symmetries,and to reduce laser noise itself by various active and passive stabilization schemes.In this article,we report on the pre-stabilized laser(PSL)of the Advanced LIGO detector. The PSL is based on a high-power solid-state laser that is comprehensively stabilized.One laser system was set up at the Albert-Einstein-Institute(AEI)in Hannover,Germany,the so called PSL reference system.Another identical PSL has already been installed at one Advanced LIGO site,the one near Livingston,LA,USA,and two more PSLs will be installed at the second #161737 - $15.00 USD Received 18 Jan 2012; revised 27 Feb 2012; accepted 4 Mar 2012; published 24 Apr 2012 (C) 2012 OSA7 May 2012 / Vol. 20, No. 10 / OPTICS EXPRESS 10618site at Hanford,WA,USA.We have characterized the reference PSL and theﬁrst observatory PSL.For this we measured various beam parameters and noise levels of the output beam in the gravitational wave detection frequency band from about10Hz to10kHz,measured the performance of the active and passive stabilization schemes,and determined upper bounds for the cross coupling between different control loops.At the time of writing the PSL reference system has been operated continuously for more than18months,and continues to operate reliably.The reference system delivered a continuous-wave,single-frequency laser beam at1064nm wavelength with a maximum power of150W with99.5%in the TEM00mode.The active and passive stabilization schemes efﬁciently re-duced the technical laser noise by several orders of magnitude such that most design require-ments[5,7]were fulﬁlled.In the gravitational wave detection frequency band the relative power noise was as low as2×10−8Hz−1/2,relative beam pointingﬂuctuations were as low as1×10−7Hz−1/2,and an in-loop measurement of the frequency noise was consistent with the maximum acceptable frequency noise of about0.1HzHz−1/2.The cross couplings between the control loops were,in general,rather small or at the expected levels.Thus we were able to optimize each loop individually and observed no instabilities due to cross couplings.This stabilized laser system is an indispensable part of Advanced LIGO and fulﬁlled nearly all design goals concerning the maximum acceptable noise levels of the different beam pa-rameters right after installation.Furthermore all or a subset of the implemented stabilization schemes might be of interest for many other high-precision optical experiments that are limited by laser noise.Besides gravitational wave detectors,stabilized laser systems are used e.g.in the ﬁeld of optical frequency standards,macroscopic quantum objects,precision spectroscopy and optical traps.In the following section the laser system,the stabilization scheme and the characterization methods are described(Section2).Then,the results of the characterization(Section3)and the conclusions(Section4)are presented.ser system and stabilizationThe PSL consists of the laser,developed and fabricated by Laser Zentrum Hannover e.V.(LZH) and neoLASE,and the stabilization,developed and integrated by AEI.The optical components of the PSL are on a commercial optical table,occupying a space of about1.5×3.5m2,in a clean,dust-free environment.At the observatory sites the optical table is located in an acoustically isolated cleanroom.Most of the required electronics,the laser diodes for pumping the laser,and water chillers for cooling components on the optical table are placed outside of this cleanroom.The laser itself consists of three stages(Fig.1).An almostﬁnal version of the laser,the so-called engineering prototype,is described in detail in[8].The primary focus of this article is the stabilization and characterization of the PSL.Thus only a rough overview of the laser and the minor modiﬁcations implemented between engineering prototype and reference system are given in the following.Theﬁrst stage,the master laser,is a commercial non-planar ring-oscillator[9,10](NPRO) manufactured by InnoLight GmbH in Hannover,Germany.This solid-state laser uses a Nd:Y AG crystal as the laser medium and resonator at the same time.The NPRO is pumped by laser diodes at808nm and delivers an output power of2W.An internal power stabilization,called the noise eater,suppresses the relaxation oscillation at around1MHz.Due to its monolithic res-onator,the laser has exceptional intrinsic frequency stability.The two subsequent laser stages, used for power scaling,inherit the frequency stability of the master laser.The second stage(medium-power ampliﬁer)is a single-pass ampliﬁer[11]with an output power of35W.The seed laser beam from the NPRO stage passes through four Nd:YVO4crys-#161737 - $15.00 USD Received 18 Jan 2012; revised 27 Feb 2012; accepted 4 Mar 2012; published 24 Apr 2012 (C) 2012 OSA7 May 2012 / Vol. 20, No. 10 / OPTICS EXPRESS 10619power stabilizationFig.1.Pre-stabilized laser system of Advanced LIGO.The three-staged laser(NPRO,medium power ampliﬁer,high power oscillator)and the stabilization scheme(pre-mode-cleaner,power and frequency stabilization)are shown.The input-mode-cleaner is not partof the PSL but closely related.NPRO,non-planar ring oscillator;EOM,electro-optic mod-ulator;FI,Faraday isolator;AOM,acousto-optic modulator.tals which are longitudinally pumped byﬁber-coupled laser diodes at808nm.The third stage is an injection-locked ring oscillator[8]with an output power of about220W, called the high-power oscillator(HPO).Four Nd:Y AG crystals are used as the active media. Each is longitudinally pumped by sevenﬁber-coupled laser diodes at808nm.The oscillator is injection-locked[12]to the previous laser stage using a feedback control loop.A broadband EOM(electro-optic modulator)placed between the NPRO and the medium-power ampliﬁer is used to generate the required phase modulation sidebands at35.5MHz.Thus the high output power and good beam quality of this last stage is combined with the good frequency stability of the previous stages.The reference system features some minor modiﬁcations compared to the engineering proto-type[8]concerning the optics:The external halo aperture was integrated into the laser system permanently improving the beam quality.Additionally,a few minor designﬂaws related to the mechanical structure and the optical layout were engineered out.This did not degrade the output performance,nor the characteristics of the locked laser.In general the PSL is designed to be operated in two different power modes.In high-power mode all three laser stages are engaged with a power of about160W at the PSL output.In low-power mode the high-power oscillator is turned off and a shutter inside the laser resonator is closed.The beam of the medium-power stage is reﬂected at the output coupler of the high power stage leaving a residual power of about13W at the PSL output.This low-power mode will be used in the early commissioning phase and in the low-frequency-optimized operation mode of Advanced LIGO and is not discussed further in this article.The stabilization has three sections(Fig.1:PMC,PD2,reference cavity):A passive resonator, the so called pre-mode-cleaner(PMC),is used toﬁlter the laser beam spatially and temporally (see subsection2.1).Two pick-off beams at the PMC are used for the active power stabilization (see subsection2.2)and the active frequency pre-stabilization,respectively(see subsection2.3).In general most stabilization feedback control loops of the PSL are implemented using analog electronics.A real-time computer system(Control and Data Acquisition Systems,CDS,[13]) which is common to many other subsystems of Advanced LIGO,is utilized to control and mon-itor important parameters of the analog electronics.The lock acquisition of various loops,a few #161737 - $15.00 USD Received 18 Jan 2012; revised 27 Feb 2012; accepted 4 Mar 2012; published 24 Apr 2012 (C) 2012 OSA7 May 2012 / Vol. 20, No. 10 / OPTICS EXPRESS 10620slow digital control loops,and the data acquisition are implemented using this computer sys-tem.Many signals are recorded at different sampling rates ranging from16Hz to33kHz for diagnostics,monitoring and vetoing of gravitational wave signals.In total four real-time pro-cesses are used to control different aspects of the laser system.The Experimental Physics and Industrial Control System(EPICS)[14]and its associated user tools are used to communicate with the real-time software modules.The PSL contains a permanent,dedicated diagnostic instrument,the so called diagnostic breadboard(DBB,not shown in Fig.1)[15].This instrument is used to analyze two different beams,pick-off beams of the medium power stage and of the HPO.Two shutters are used to multiplex these to the DBB.We are able to measureﬂuctuations in power,frequency and beam pointing in an automated way with this instrument.In addition the beam quality quantiﬁed by the higher order mode content of the beam was measured using a modescan technique[16].The DBB is controlled by one real-time process of the CDS.In contrast to most of the other control loops in the PSL,all DBB control loops were implemented digitally.We used this instrument during the characterization of the laser system to measure the mentioned laser beam parameters of the HPO.In addition we temporarily placed an identical copy of the DBB downstream of the PMC to characterize the output beam of the PSL reference system.2.1.Pre-mode-cleanerA key component of the stabilization scheme is the passive ring resonator,called the pre-mode-cleaner(PMC)[17,18].It functions to suppress higher-order transverse modes,to improve the beam quality and the pointing stability of the laser beam,and toﬁlter powerﬂuctuations at radio frequencies.The beam transmitted through this resonator is the output beam of the PSL, and it is delivered to the subsequent subsystems of the gravitational wave detector.We developed and used a computer program[19]to model theﬁlter effects of the PMC as a function of various resonator parameters in order to aid its design.This led to a resonator with a bow-tie conﬁguration consisting of four low-loss mirrors glued to an aluminum spacer. The optical round-trip length is2m with a free spectral range(FSR)of150MHz.The inci-dence angle of the horizontally polarized laser beam is6◦.Theﬂat input and output coupling mirrors have a power transmission of2.4%and the two concave high reﬂectivity mirrors(3m radius of curvature)have a transmission of68ppm.The measured bandwidth was,as expected, 560kHz which corresponds to aﬁnesse of133and a power build-up factor of42.The Gaussian input/output beam had a waist radius of about568µm and the measured acquired round-trip Gouy phase was about1.7rad which is equivalent to0.27FSR.One TEM00resonance frequency of the PMC is stabilized to the laser frequency.The Pound-Drever-Hall(PDH)[20,21]sensing scheme is used to generate error signals,reusing the phase modulation sidebands at35.5MHz created between NPRO and medium power ampliﬁer for the injection locking.The signal of the photodetector PD1,placed in reﬂection of the PMC, is demodulated at35.5MHz.This photodetector consists of a1mm InGaAs photodiode and a transimpedance ampliﬁer.A piezo-electric element(PZT)between one of the curved mirrors and the spacer is used as a fast actuator to control the round-trip length and thereby the reso-nance frequencies of the PMC.With a maximum voltage of382V we were able to change the round-trip length by about2.4µm.An analog feedback control loop with a bandwidth of about 7kHz is used to stabilize the PMC resonance frequency to the laser frequency.In addition,the electronics is able to automatically bring the PMC into resonance with the laser(lock acquisition).For this process a125ms period ramp signal with an amplitude cor-responding to about one FSR is applied to the PZT of the PMC.The average power on pho-todetector PD1is monitored and as soon as the power drops below a given threshold the logic considers the PMC as resonant and closes the analog control loop.This lock acquisition proce-#161737 - $15.00 USD Received 18 Jan 2012; revised 27 Feb 2012; accepted 4 Mar 2012; published 24 Apr 2012 (C) 2012 OSA7 May 2012 / Vol. 20, No. 10 / OPTICS EXPRESS 10621dure took an average of about65ms and is automatically repeated as soon as the PMC goes off resonance.One real-time process of CDS is dedicated to control the PMC electronics.This includes parameters such as the proportional gain of the loop or lock acquisition parameters.In addition to the PZT actuator,two heating foils,delivering a maximum total heating power of14W,are attached to the aluminum spacer to control its temperature and thereby the roundtrip length on timescales longer than3s.We measured a heating and cooling1/e time constant of about2h with a range of4.5K which corresponds to about197FSR.During maintenance periods we heat the spacer with7W to reach a spacer temperature of about2.3K above room temperature in order to optimize the dynamic range of this actuator.A digital control loop uses this heater as an actuator to off-load the PZT actuator allowing compensation for slow room temperature and laser frequency drifts.The PMC is placed inside a pressure-tight tank at atmospheric pressure for acoustic shield-ing,to avoid contamination of the resonator mirrors and to minimize optical path length changes induced by atmospheric pressure variations.We used only low-outgassing materials and fabri-cated the PMC in a cleanroom in order to keep the initial mirror contamination to a minimum and to sustain a high long-term throughput.The PMCﬁlters the laser beam and improves the beam quality of the laser by suppress-ing higher order transverse modes[17].The acquired round-trip Gouy phase of the PMC was chosen in such a way that the resonance frequencies of higher order TEM modes are clearly separated from the TEM00resonance frequency.Thus these modes are not resonant and are mainly reﬂected by the PMC,whereas the TEM00mode is transmitted.However,during the design phase we underestimated the thermal effects in the PMC such that at nominal circu-lating power the round-trip Gouy-phase is close to0.25FSR and the resonance of the TEM40 mode is close to that of the TEM00mode.To characterize the mode-cleaning performance we measured the beam quality upstream and downstream of the PMC with the two independent DBBs.At150W in the transmitted beam,the circulating power in the PMC is about6.4kW and the intensity at the mirror surface can be as high as1.8×1010W m−2.At these power levels even small absorptions in the mirror coatings cause thermal effects which slightly change the mirror curvature[22].To estimate these thermal effects we analyzed the transmitted beam as a function of the circulating power using the DBB.In particular we measured the mode content of the LG10and TEM40mode.Changes of the PMC eigenmode waist size showed up as variations of the LG10mode content.A power dependence of the round-trip Gouy phase caused a variation of the power within the TEM40mode since its resonance frequency is close to a TEM00mode resonance and thus the suppression of this mode depends strongly on the Gouy phase.We adjusted the input power to the PMC such that the transmitted power ranged from100W to 150W corresponding to a circulating power between4.2kW and6.4kW.We used our PMC computer simulation to deduce the power dependence of the eigenmode waist size and the round-trip Gouy phase.The results are given in section3.1.At all circulating power levels,however,the TEM10and TEM01modes are strongly sup-pressed by the PMC and thus beam pointingﬂuctuations are reduced.Pointingﬂuctuations can be expressed toﬁrst order as powerﬂuctuations of the TEM10and TEM01modes[23,24].The PMC reduces theﬁeld amplitude of these modes and thus the pointingﬂuctuations by a factor of about61according to the measuredﬁnesse and round-trip Gouy phase.To keep beam point-ingﬂuctuations small is important since they couple to the gravitational wave channel by small differential misalignments of the interferometer optics.Thus stringent design requirements,at the10−6Hz−1/2level for relative pointing,were set.To verify the pointing suppression effect of the PMC we used DBBs to measure the beam pointingﬂuctuations upstream and downstream #161737 - $15.00 USD Received 18 Jan 2012; revised 27 Feb 2012; accepted 4 Mar 2012; published 24 Apr 2012 (C) 2012 OSA7 May 2012 / Vol. 20, No. 10 / OPTICS EXPRESS 10622Fig.2.Detailed schematic of the power noise sensor setup for theﬁrst power stabilizationloop.This setup corresponds to PD2in the overview in Fig.1.λ/2,waveplate;PBS,polar-izing beam splitter;BD,glassﬁlters used as beam dump;PD,single element photodetector;QPD,quadrant photodetector.of the PMC.The resonator design has an even number of nearly normal-incidence reﬂections.Thus the resonance frequencies of horizontal and vertical polarized light are almost identical and the PMC does not act as polarizer.Therefore we use a thin-ﬁlm polarizer upstream of the PMC to reach the required purity of larger than100:1in horizontal polarization.Finally the PMC reduces technical powerﬂuctuations at radio frequencies(RF).A good power stability between9MHz and100MHz is necessary as the phase modulated light in-jected into the interferometer is used to sense several degrees of freedom of the interferometer that need to be controlled.Power noise around these phase modulation sidebands would be a noise source for the respective stabilization loop.The PMC has a bandwidth(HWHM)of about 560kHz and acts toﬁrst order as a low-passﬁlter for powerﬂuctuations with a-3dB corner frequency at this frequency.To verify that the suppression of RF powerﬂuctuations is sufﬁ-cient to fulﬁll the design requirements,we measured the relative power noise up to100MHz downstream of the PMC with a dedicated experiment involving the optical ac coupling tech-nique[25].In addition the PMC serves the very important purpose of deﬁning the spatial laser mode for the downstream subsystem,namely the input optics(IO)subsystem.The IO subsystem is responsible,among other things,to further stabilize the laser beam with the suspended input mode cleaner[26]before the beam will be injected into the interferometer.Modiﬁcations of beam alignment or beam size of the laser system,which were and might be unavoidable,e.g., due to maintenance,do not propagate downstream of the PMC toﬁrst order due to its mode-cleaning effect.Furthermore we beneﬁt from a similar isolating effect for the active power and frequency stabilization by using the beams transmitted through the curved high-reﬂectivity mirrors of the PMC.2.2.Power stabilizationThe passiveﬁltering effect of the PMC reduces powerﬂuctuations signiﬁcantly only above the PMC bandwidth.In the detection band from about10Hz to10kHz good power stability is required sinceﬂuctuations couple via the radiation pressure imbalance and the dark-fringe offset to the gravitational wave channel.Thus two cascaded active control loops,theﬁrst and second power stabilization loop,are used to reduce powerﬂuctuations which are mainly caused by the HPO stage.Theﬁrst loop uses a low-noise photodetector(PD2,see Figs.1and2)at one pick-off port #161737 - $15.00 USD Received 18 Jan 2012; revised 27 Feb 2012; accepted 4 Mar 2012; published 24 Apr 2012 (C) 2012 OSA7 May 2012 / Vol. 20, No. 10 / OPTICS EXPRESS 10623of the PMC to measure the powerﬂuctuations downstream of the PMC.An analog electronics feedback control loop and an AOM(acousto-optic modulator)as actuator,located upstream of the PMC,are used to stabilize the power.Scattered light turned out to be a critical noise source for thisﬁrst loop.Thus we placed all required optical and opto-electronic components into a box to shield from scattered light(see Fig.2).The beam transmitted by the curved PMC mirror has a power of about360mW.This beam isﬁrst attenuated in the box using aλ/2waveplate and a thin-ﬁlm polarizer,such that we are able to adjust the power on the photodetectors to the optimal operation point.Afterwards the beam is split by a50:50beam splitter.The beams are directed to two identical photode-tectors,one for the control loop(PD2a,in-loop detector)and one for independent out-of-loop measurements to verify the achieved power stability(PD2b,out-of-loop detector).These pho-todetectors consist of a2mm InGaAs photodiode(PerkinElmer C30642GH),a transimpedance ampliﬁer and an integrated signal-conditioningﬁlter.At the chosen operation point a power of about4mW illuminates each photodetector generating a photocurrent of about3mA.Thus the shot noise is at a relative power noise of10−8Hz−1/2.The signal conditioningﬁlter has a gain of0.2at very low frequencies(<70mHz)and ampliﬁes the photodetector signal in the im-portant frequency range between3.3Hz and120Hz by about52dB.This signal conditioning ﬁlter reduces the electronics noise requirements on all subsequent stages,but has the drawback that the range between3.3Hz and120Hz is limited to maximum peak-to-peak relative power ﬂuctuations of5×10−3.Thus the signal-conditioned channel is in its designed operation range only when the power stabilization loop is closed and therefore it is not possible to measure the free running power noise using this channel due to saturation.The uncoated glass windows of the photodiodes were removed and the laser beam hits the photodiodes at an incidence angle of45◦.The residual reﬂection from the photodiode surface is dumped into a glassﬁlter(Schott BG39)at the Brewster angle.Beam positionﬂuctuations in combination with spatial inhomogeneities in the photodiode responsivity is another noise source for the power stabilization.We placed a silicon quadrant photodetector(QPD)in the box to measure the beam positionﬂuctuations of a low-power beam picked off the main beam in the box.The beam parameters,in particular the Gouy phase,at the QPD are the same as on the power sensing detectors.Thus the beam positionﬂuctuations measured with the QPD are the same as the ones on the power sensing photodetectors,assuming that the positionﬂuctuations are caused upstream of the QPD pick-off point.We used the QPD to measure beam positionﬂuctuations only for diagnostic and noise projection purposes.In a slightly modiﬁed experiment,we replaced one turning mirror in the path to the power sta-bilization box by a mirror attached to a tip/tilt PZT element.We measured the typical coupling between beam positionﬂuctuations generated by the PZT and the residual relative photocurrent ﬂuctuations measured with the out-of-the-loop photodetector.This coupling was between1m−1 and10m−1which is a typical value observed in different power stabilization experiments as well.We measured this coupling factor to be able to calculate the noise contribution in the out-of-the-loop photodetector signal due to beam positionﬂuctuations(see Subsection3.3).Since this tip/tilt actuator was only temporarily in the setup,we are not able to measure the coupling on a regular basis.Both power sensing photodetectors are connected to analog feedback control electronics.A low-pass(100mHz corner frequency)ﬁltered reference value is subtracted from one signal which is subsequently passed through several control loopﬁlter stages.With power stabilization activated,we are able to control the power on the photodetectors and thereby the PSL output power via the reference level on time scales longer than10s.The reference level and other important parameters of these electronics are controlled by one dedicated real-time process of the CDS.The actuation or control signal of the electronics is passed to an AOM driver #161737 - $15.00 USD Received 18 Jan 2012; revised 27 Feb 2012; accepted 4 Mar 2012; published 24 Apr 2012 (C) 2012 OSA7 May 2012 / Vol. 20, No. 10 / OPTICS EXPRESS 10624。

利特 RT8509 3A 14V 升压 DC DC 转换器数据手册说明书

RT8509®©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Ordering InformationNote :Richtek products are :` RoHS compliant and compatible with the current require-ments of IPC/JEDEC J-STD-020.` Suitable for use in SnPb or Pb-free soldering processes.Pin ConfigurationsWDFN-10L 3x3(TOP VIEW)3A, 14V Step-Up DC/DC ConverterGeneral DescriptionThe RT8509 is a high performance switching boost converter that provides a regulated supply voltage for active matrix thin film transistor (TFT) liquid crystal displays (LCDs).The RT8509 incorporates current mode, fixed-frequency,pulse width modulation (PWM) circuitry with a built in N-MOSFET to achieve high efficiency and fast transient response.The RT8509 has a wide input voltage range from 2.8V to 14V. In addition, the output voltage can be adjusted up to 24V via an external resistive voltage divider. The maximum peak current is limited to 4.5A (typ.). Other features include programmable soft-start, over voltage protection, and over temperature protection.The RT8509 is available in a WDFN-10L 3x3 package.Featuresz 90% Efficiencyz Adjustable Output Up to 24Vz 2.8V to 14V Input Supply Voltage z Input Supply Under Voltage Lockout z Fixed 1.2MHz Switching Frequency z Programmable Soft-Start z V OUT Over Voltage Protection z Over Temperature Protection z Thin 10-Lead WDFN PackagezRoHS Compliant and Halogen FreeApplicationszGIP TFT LCD PanelsMarking InformationH4= : Product CodeYMDNN : Date CodeTypical Application CircuitSS VIN VSUP LXLXOUT L1Package TypeQW : WDFN-10L 3x3 (W-Type)RT8509Lead Plating SystemG : Green (Halogen Free and Pb Free)RT8509©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Function Block DiagramLXSS GNDRT8509©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Electrical CharacteristicsRecommended Operating Conditions (Note 4)z Ambient T emperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C zJunction T emperature Range --------------------------------------------------------------------------------------------−40°C to 125°CAbsolute Maximum Ratings (Note 1)z LX, VSUP to GND ---------------------------------------------------------------------------------------------------------−0.3V to 28V z VIN, EN to GND ------------------------------------------------------------------------------------------------------------−0.3V to 16.5V z Other Pins to GND --------------------------------------------------------------------------------------------------------−0.3V to 6.5V zPower Dissipation, P D @ T A = 25°CWDFN-10L 3x3-------------------------------------------------------------------------------------------------------------1.429W zPackage Thermal Resistance (Note 2)WDFN-10L 3x3, θJA -------------------------------------------------------------------------------------------------------70°C/W WDFN-10L 3x3, θJC -------------------------------------------------------------------------------------------------------8.2°C/W z Junction T emperature -----------------------------------------------------------------------------------------------------150°Cz Storage T emperature Range --------------------------------------------------------------------------------------------−65°C to 150°C z Lead Temperature (Soldering, 10sec.)--------------------------------------------------------------------------------260°C zESD Susceptibility (Note 3)HBM (Human Body Model)----------------------------------------------------------------------------------------------2kV MM (Machine Model)-----------------------------------------------------------------------------------------------------200VRT8509©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Note 1. Stresses beyond those listed “Absolute Maximum Ratings ” may cause permanent damage to the device. These arestress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability.Note 2. θJA is measured at T A = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC ismeasured at the exposed pad of the package.Note 3. Devices are ESD sensitive. Handling precaution is recommended.Note 4. The device is not guaranteed to function outside its operating conditions.RT8509©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Boost Reference Voltage vs. Input Voltage11.11.21.31.41.52468101214Input Voltage (V)B o o s t R e f e r e n c e V o l t a g e (V)Boost Current Limit vs. Input Voltage2345672468101214Input Voltage (V)B o o s tC u r r e n t L i m i t (A )Typical Operating CharacteristicsBoost Efficiency vs. Load Current5060708090100B o o s t E f f i c i e n c y (%)Boost Efficiency vs. Load Current5060708090100B o o s t E f f i c i e n c y (%)11.11.21.31.41.5-50-25255075100125Temperature (°C)B o o s t R e f e r e n c e V o l t a g e (V )90010001100120013001400-50-25255075100125Temperature (°C)B o o s t F r e q u e n c y (k H z )RT8509©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Application InformationThe RT8509 is a high performance step-up DC/DC converter that provides a regulated supply voltage for panel source driver ICs. The RT8509 incorporates current mode,fixed frequency, Pulse Width Modulation (PWM) circuitry with a built in N-MOSFET to achieve high efficiency and fast transient response. The following content contains detailed description and information for component selection.Boost RegulatorThe RT8509 is a current mode boost converter integrated with a 24V/3.5A power switch, covering a wide V IN range from 2.8V to 14V. It performs fast transient responses to generate source driver supplies for TFT LCD display. The high operation frequency allows use of smaller components to minimize the thickness of the LCD panel.The output voltage can be adjusted by setting the resistive voltage-divider sensing at the FB pin. The error amplifier varies the COMP voltage by sensing the FB pin to regulate the output voltage. For better stability, the slope compensation signal summed with the current sense signal will be compared with the COMP voltage to determine the current trip point and duty cycle.Soft-StartThe RT8509 provides soft-start function to minimize the inrush current. When powered on, an internal constant current charges an external capacitor. The rising voltage rate on the COMP pin is limited from V SS = 0V to 1.24V and the inductor peak current will also be limited at the same time. When powered off, the external capacitor will be discharged until the next soft-start time.The soft-start function is implemented by the external capacitor with a 5μA constant current charging to the soft-start capacitor. Therefore, the capacitor should be large enough for output voltage regulation. A typical value for soft-start capacitor is 33nF . The available soft-start capacitor range is from 10nF to 100nF.If C SS < 220pF , the internal soft-start function will be turned on and period time is approximately 1ms.OUT REF REF R1V = V x 1, where V = 1.25V (typ.)R2⎛⎞+⎜⎟⎝⎠The recommended value for R2 shoul d be at least 10k Ωwithout some sacrificing. Place the resistive voltage divider as close as possible to the chip to reduce noise sensitivity.Loop CompensationThe voltage feedback loop can be compensated with an external compensation network consisting of R3. Choose R3 to set high frequency integrator gain for fast transient response and C1 to set the integrator zero to maintain loop stability. For typical application, V IN = 5V,V OUT = 13.6V, C OUT = 4.7μF x 3, L1 = 4.7μH, while the recommended value for compensation is as follows :R3 = 56k Ω, C1 = 1nF.Over Current ProtectionThe RT8509 boost converter has over current protection to limit the peak inductor current. It prevents large current from damaging the inductor and diode. During the On-time,once the inductor current exceeds the current limit, the internal LX switch turns off immediately and shortens the duty cycle. Therefore, the output voltage drops if the over current condition occurs. The current limit is also affected by the input voltage, duty cycle, and inductor value.Over Temperature ProtectionThe RT8509 boost converter has thermal protection function to prevent the chip from overheating. When the junction temperature exceeds 155°C, the function shuts down the device. Once the device cools down by approximately 10°C, it will automatically restart to normal operation. To guarantee continuous operation, do not operate over the maximum junction temperature rating of 125°C.Inductor SelectionThe inductance depends on the maximum input current.As a general rule, the inductor ripple current range is 20%to 40% of the maximum input current. If 40% is selectedOutput Voltage SettingThe regulated output voltage is shown as the following equation :RT8509©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.where η is the efficiency of the converter, I IN(MAX) is themaximum input current, and I RIPPLE is the inductor ripple current. The input peak current can then be obtained by adding the maximum input current with half of the inductor ripple current as shown in the following equation :PEAK IN(MAX)I 1.2 x I =Note that the saturated current of the inductor must be greater than I PEAK . The inductance can eventually be determined according to the following equation :2IN OUT IN 2OUT OUT(MAX)OSC x (V )x(V V )L 0.4 x (V )xI x f η−=where f osc is the switching frequency. For better system performance, a shielded inductor is preferred to avoid EMI problems.Diode SelectionSchottky diodes are chosen for their low forward voltage drop and fast switching speed. When selecting a Schottky diode, important parameters such as power dissipation,reverse voltage rating, and pulsating peak current should all be taken into consideration. A suitable Schottky diode's reverse voltage rating must be greater than the maximum output voltage and its average current rating must exceed the average output current. Last of all, the chosen diode should have a sufficiently low leakage current level, since it will increase with temperature.Output Capacitor SelectionThe output ripple voltage is an important index for estimating chip performance. This portion consists of two parts. One is the product of the inductor current with the ESR of the output capacitor, while the other part is formed by the charging and discharging process of the output capacitor. As shown in Figure 1, ΔV OUT1 can be evaluated based on the ideal energy equalization. According to the definition of Q, the Q value can be calculated as the following equation :IN L OUT IN L OUT IN OUT OUT1OUT OSC111Q x I I I I I I 222V 1x xC x V V f ⎡⎤⎛⎞⎛⎞=+Δ−+−Δ−⎜⎟⎜⎟⎢⎥⎝⎠⎝⎠⎣⎦=Δwhere f OSC is the switching frequency, and ΔI L is the inductor ripple current. Bring C OUT to the left side to estimate the value of ΔV OUT1 according to the following equation :OUTOUT1OUT OSC D x I V x C x f ηΔ=where D is the duty cycle and η is the boost converter efficiency. Finally, taking ESR into account, the overall output ripple voltage can be determined by the following equation :OUTOUT IN OUT OSC D x I V I x ESR x C x f ηΔ=+The output capacitor, C OUT , should be selected accordingly.TimeFigure 1. The Output Ripple Voltage without theContribution of ESRInput Capacitor SelectionLow ESR ceramic capacitors are recommended for input capacitor applications. Low ESR will effectively reduce the input voltage ripple caused by switching operation. A 10μF capacitor is sufficient for most applications.Nevertheless, this value can be decreased for lower output current requirement. Another consideration is the voltage rating of the input capacitor which must be greater than the maximum input voltage.OUT OUT(MAX)IN(MAX)IN RIPPLE IN(MAX)V x I I =x V I = 0.4 x I ηas an example, the inductor ripple current can be calculated according to the following equations :RT8509©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Thermal ConsiderationsFor continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula :P D(MAX) = (T J(MAX) − T A ) / θJAwhere T J(MAX) is the maximum junction temperature, T A is the ambient temperature, and θJA is the junction to ambient thermal resistance.For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA , is layout dependent. For WDFN-10L 3x3 packages, the thermal resistance, θJA , is 70°C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at T A = 25°C can be calculated by the following formula :P D(MAX) = (125°C − 25°C) / (70°C/W) = 1.429W for WDFN-10L 3x3 packageThe maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA . The derating curve in Figure 2 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation.Figure 2. Derating Curve of Maximum Power DissipationLayout ConsiderationsFor high frequency switching power supplies, the PCBlayout is important to get good regulation, high efficiency and stability. The following descriptions are the guidelines for better PCB layout.` For good regulation, place the power components asclose as possible. The traces should be wide and short enough especially for the high current output loop.` The feedback voltage divider resistors must be near thefeedback pin. The divider center trace must be shorter and the trace must be kept away from any switching nodes.` The compensation circuit should be kept away from thepower loops and be shielded with a ground trace to prevent any noise coupling.` Minimize the size of the LX node and keep it wide andshorter. Keep the LX node away from the FB.` The exposed pad of the chip should be connected to astrong ground plane for maximum thermal consideration.Figure 3. PCB Layout GuidePlace C 2 as close to VIN as possible.close to the IC as possible. The traces should be wide and short, especially for the high-current loop.The compensation circuit 0.00.20.40.60.81.01.21.41.60255075100125Ambient Temperature (°C)M a x i m u m P o w e r D i s s i p a t i o n (W )W-Type 10L DFN 3x3 PackageRichtek Technology Corporation5F, No. 20, Taiyuen Street, Chupei CityHsinchu, Taiwan, R.O.C.Tel: (8863)5526789Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.。

Hexagon Optiv Classic 322 数字测量设备说明书

DATA SHEET OPTIV CLASSIC 322PRODUCT DESCRIPTIONThe Optiv Classic 322 combines optical and tactile measurement in one system (optional touch-trigger probe).The system supports multi-sensor measurements using the Vision sensor (CMOS colour camera, motorised CNC zoom) and the touch-trigger probe HP-TM. The Optiv Classic 322 provides easy pallet station integration with good accessibility to the measuring table from all sides. Measurement software is PC-DMIS.FIELDS OF APPLICATION• Shop floor and inspection room• Versatile geometry measurements and GD&T analysisDESIGNDesign principle : Benchtop unit of proven cross-table design with a solid metal base frame as a standardGuides : Mechanical linear guides on all axes, counterbalance on Z axisDrives : DC servo motors, power transmission via plain shafts in conjunction with rolling ring drivesLength measuring system : Incremental, optoelectronic length measuring systemResolution of the scales : 0.05 µmMEASURING RANGE (X x Y x Z)OPTIV CLASSIC 322X300 mm (11.5 in.)256 mm (10 in.)256 mm (10 in.)Y200 mm (7.5 in.)175 mm (6.5 in.)175 mm (6.5 in.)Z200 mm (7.5 in.)(2)200 mm (7.5 in.)(2)200 mm (7.5 in.)(2)(1) Vision sensor <—> Touch-trigger probe, see page 6. (2) At a maximum workpiece depth in Y of 140 mm, otherwise Z = 80 mm.LOADING CAPACITY• Load-bearing capacity of the table up to 16 kgDIMENSIONS IN MM AND WEIGHTS IN KG• Dimensions see machine layout on page 5• Machine weight 260 kg + base frame 45 kgMEASURING ACCURACY(3)XY measuring accuracy MPE (Exy) = (2.8 + L/150) µm XY measuring accuracy MPE (Exy) = (2.8 + L/150) µmZ measuring accuracy MPE (Ez) = (5.0 + L/150) µm Z measuring accuracy MPE (Ez) = (5.0 + L/150) µm(3) The conditions of acceptance of Hexagon Metrology Vision apply. L = measurement length in mm.HEXAGON MANUFACTURING INTELLIGENCE | 2OPTIV CLASSIC 322 AIRBORNE NOISE EMISSIONS• The A-weighted emission sound pressure level at operator’s position is less than 70 db(A). ENVIRONMENTAL REQUIREMENTS• Air humidity 45 % - 75 % RL, non-condensing• Environmental temperature 20 °C ± 2 °C• Permissible temperature gradient 1.0 °C/h, 2.0 °C/d, 1.0 °C/m• Max. installation height 2000 m above sea levelTHROUGHPUT• Max. traversing speed : X, Y = 165 mm/s, Z = 60 mm/sVISION SENSORTechnical description :• Sensor for non-contact measurement of smallest and closely toleranced features- H igh resolution digital 1/1.8-inch CMOS colour camera with Gigabit Ethernet interface, for interference-free,low noise image reproduction- Maximum optical precision due to low distortion optics : Motorised CNC zoom- Powerful image processing> Fast, precision video autofocus> Automatic feature detection, geometry and bad pixel video filters> C ontour scanning mode : Sophisticated set of user-selectable algorithms to setup edge detection,intelligent, automatic selection of the most suitable setting for the measurement> Best fit routines> A utoTune : Transferability of measuring programs between machines of the same type> M ultiCapture : MultiCapture allows all 2D features within a field of view to be captured simultaneously,regardless of the feature type. Inspection speeds can be increased by 35 % or more, depending on the featuresize and density. The capture sequence for groups of features using MultiCapture is also automaticallyoptimised, creating the most efficient possible path with the fewest number of stage movements.> R GB Sensitivity Adjustments for colour cameras : Software controls for Red/Green/Blue (RGB) sensitivity inimages from a colour camera allow for fine control adjustment over image contrast. This capability improvesoverall consistency in vision inspection in general and is especially useful for coloured parts where edges can bedifficult to capture with grayscale or lighting modifications alone.Illumination for Vision sensor :• Coaxial LED top light• LED back light• Multi-segment LED ring light : 4 quadrants• Laserpointer (simplifies navigation during the measuring program generation)CNC zoom :• M otorised zoom, for a continuous adjustment of field of view and resolution : Standard: 6.5x• H igh resolution digital 1/1.8-inch CMOS colour camera (H 1280 x V 1024) with Gigabit Ethernet interface MAGNIFICATION VARIANTS OF THE 6.5X CNC ZOOM(1)Standard0.74x to 4.4x920 to 1309.2 x 7.3 1.53 x 1.227.2 bis 1.249x to 295x(1) Values rounded. (2) Optical. (3) Without multi-segment LED ring light (When using a multi-segment LED ring light, these values are reduced by the amount of the overall heightof the ring light (approx. 30 mm).). (4) On a 22-inch (16:9) monitor, PC-DMIS “Scale to Fit” —> OFF. | HEXAGON MANUFACTURING INTELLIGENCE3TOUCH-TRIGGER PROBE HP-TM (OPTIONAL)• T he5-way touch-trigger probe consistsof the sensor body and the stylus holding module that are magnetically connected to each other.• T he stylus holding modules are available in four versions with different trigger forces.±X, ±Y, +Z M8 thread(probe body),M2 thread(styli)Four :• L Flow force• S Fstandardforce• M Fmediumforce• E Fextendedforce0.35 µm(LF module),0.35 µm(SF module),0.50 µm(MF module),0.65 µm(EF module)± 0.60 µm(LF module),± 0.80 µm(SF module),± 1.00 µm(MF module),± 2.00 µm(EF module)0.055 N,L = 10 mm(LF module),0.08 N,L = 10 mm(SF module),0.10 N,L = 25 mm(MF module),0.10 N,L = 50 mm(EF module)X/Y = +/- 16°,Z = + 5 mmHR-P with4 slotsMutual measuring range Vision sensor <—> Touch-trigger probe, see page 6.CONTROL SYSTEM AND SAFETY REGULATIONS• Machine control unit : DELL computer system with Microsoft Windows 10 Professional (64 bit)• CNC controller : Microprocessor CNC with vector path control• S afety equipment:- E mergency-Stop circuit with Emergency-Stop button- A xis drive via rolling ring drive with safety slip clutch- S cale signal monitoring- P rotective covers for the axes’ drives- C ollision protection for touch-trigger probes• S afety regulations:- D IN EN ISO 12100-1 and -2 (Safety of machinery)- DIN EN 60204-1 (Safety of machinery - Electrical equipment of machines)- DIN EN ISO 13849-1 (Safety of machinery - Safety-related parts of control systems)- D IN EN 61000-4-2 and -4 (Electromagnetic compatibility EMC, immunity of machines)- D IN EN 55011 (Industrial, scientific and medical equipment - Radio-frequency disturbance characteristics) SUPPLY DATA• I nput voltage power supply 115-230 V ± 10%• F requency 50/60 Hz ± 5%• P ower consumption (max.) 690 WOPTIONAL EQUIPMENT• T ouch-trigger probe HP-TM• S tylus module changing rack HR-P with 4 slots• R otary indexing table• P eriphery:- W orktable- P rinters,monitorsHEXAGON MANUFACTURING INTELLIGENCE | 4OPTIV CLASSIC 322 MACHINE LAYOUT | HEXAGON MANUFACTURING INTELLIGENCE5HEXAGON MANUFACTURING INTELLIGENCE | 6STAGE LAYOUTOPTIV CLASSIC 322 ROTARY INDEXING TABLE (OPTIONAL)ROTARY INDEXING TABLE FOROPTIV CLASSIC 322, 432, 443 ANDOPTIV PERFORMANCE 322In this separate data sheet, you will findfurther information on the optionally availablerotary indexing table. | HEXAGON MANUFACTURING INTELLIGENCE7Hexagon Manufacturing Intelligence helps industrial manufacturers develop the disruptive technologies of today and the life-changing products of tomorrow. As a leading metrology and manufacturing solution specialist, our expertise in sensing, thinking and acting – the collection, analysis and active use of measurement data – gives our customers the confidence to increase production speed and accelerate productivity while enhancing product quality. Through a network of local service centres, production facilities and commercial operations across five continents, we are shaping smart change in manufacturing to builda world where quality drives productivity. For more information, visit .Hexagon Manufacturing Intelligence is part of Hexagon (Nasdaq Stockholm: HEXA B; ), a leading global provider of information technologies that drive quality and productivity across geospatial and industrial enterprise applications.COORDINATE MEASURING MACHINES 3D LASER SCANNINGSENSORSPORTABLE MEASURING ARMS SERVICESLASER TRACKERS & STATIONS MULTISENSOR & OPTICAL SYSTEMS WHITE LIGHT SCANNERS METROLOGY SOFTWARE SOLUTIONS CAD / CAMSTATISTICAL PROCESS CONTROL AUTOMATED APPLICATIONS MICROMETERS, CALIPERS AND GAUGES DESIGN AND COSTING SOFTWARE© 2018 Hexagon AB and / or its subsidiaries and affiliates. All rights reserved. This document is accurate as of its publication date. Information is subject to change without notice.。

三洋PLC-XF70 XGA数字多媒体投影仪说明书

9,000 ANSI LUMENS z TRUE XGA z DIGITAL MULTIMEDIA PROJECTORIssued 01/08 © 2008 SANYOIMPRESSVIELY BRIGHT, HIGH CONTRAST IMAGEUtilizing two high–output 330-watt NSHA lamps as its light source, the PLC-XF70,S p e c i f i c a t i o n sResolution XGA (1024 x 768)Brightness 9,000 ANSI Lumens (2-lamp mode) 4,500 ANSI Lumens (1-lamp mode)Uniformity90% (corner to center) LCD Panel System 1.8” TFT p-Si x 3 Number of Pixels 2,359,296 (786,432 x 3)Contrast Ratio 2000:1Projection Lens Lens Sold Separately Image Size Dependent on LensAspect Ratio 4:3Throw Distance Dependent on Lens Zoom/Focus Dependent on Lens Throw Ratio Dependent on Lens Zoom RatioDependent on Lens Power Lens ShiftUp/Down Ratio 8:1 – 1:8Left/Right Ratio 3:2 – 2:3 (Dependent on Lens)Digital Keystone Correction V +/- 40°, H +/- 20° Projection Lamp 330W NSHA x 2Scanning Frequency H Sync: 15-120kHz, V Sync: 48-120HzDot Clock 230MHzColor SystemPAL/PAL-M/PAL-N/SECAM/NTSC/NTSC4.43 Computer Compatibility UXGA, SXGA+, SXGA, WXGA, XGA , SVGA, VGAVoltage 100-240V 50/60 HzBTU Rating 3242 dB Rating48dBA Power Consumption 950WDimensions (WxHxD) 20.9”x10.5”x29.8” (not including protrusion)Net Weight60.8lbs (w/o lens)User MaintenanceReplace filter cartridge, Replace lamp assemblyDetachable Input Panels Input 1Digital Visual Interface (DVI-D) • Analog (D-sub15) Input 2 RGBHV & Component &Composite (5-BNC)•S-video (Mini DIN 4-pin) Input 3Open for Optional Board Input 4Open for Optional BoardFixed Input / Output Panel Serial in & Serial out (D-Sub 9 x 2) • USB (type B)• Wired RC jack (Stereo mini)Included AccessoriesWired/RF Remote Control • Two “AA” type batteries • Owner’s manual (CD-ROM & Quick Reference Guide)• AC power cord • VGA Cable• Lens Mount Adapters (POA-LNA02 & POA-LNA01)• Real Color Manager Pro CD-ROM Optional AccessoriesPOA-MD23ADI – DVI-D & D-sub15 Board POA-MD25VD3 – 5BNC Board & S-Video POA-MD13NET2 – Network BoardPOA-MD21WARP – WARP & Blending Board POA-MD17SDID – HD-SDI & SD-SDI Input Board POA-LNA02 – Lens Mount Adapter(for LNS-W02, W02KS, M01, S01 lenses) POA-LNA01 – Lens Mount Adapter (for all other lenses) POA-CA-RC30 – Wired Remote Cable 610 337 0262 – Replacement Lamp 645 095 3286 – Replacement Remote 610 335 9830 – Replacement CartridgeWarrantyThree years parts and labor; 90 days original lamp;Quick Repair Program under warrantyBecause its products are subject to continuous improvement, SANYO reserves the right to modify product design and specifications without notice and without incurring any obligations.L e n s S p e c i f i c a t i o n sType Short Fixed Short ZoomOn-AxisShort Fixed Short Zoom Short Zoom Standard Zoom 2 Standard Zoom 3 Semi-LongZoomLong ZoomLong Zoom Part No. LNS-W01Z LNS-W02Z LNS-W03 LNS-W04 LNS-W06 LNS-S02Z LNS-S03LNS-M01Z LNS-T02LNS-T03Zoom NoYes (power)NoYes (power)Yes (power)Yes (power)Yes (power)Yes (power)Yes (power)Yes (power)Throw Ratio 1.2:1 1.35 – 1.8:1 0.8:11.5 –2.0:1 1.2 – 1.5:1 2.0 – 2.6:1 2.6 –3.5:1 3.5 –4.6:1 4.6 – 6.0:1 6.2 – 9.0:1 F Stop 2.5 2.5 – 2.9 2.6 1.7 – 2.3 2.3 – 2.8 2.0 – 2.3 1.7 – 2.6 2.0 – 2.6 2.0 – 2.9 2.2 – 2.5 Lens Shift 8:1 – 1:8 8:1 – 1:8 1:1 8:1 – 1:8 8:1 – 1:8 10:0 – 0:10 8:1 – 1:8 8:1 – 1:8 8:1 – 1:8 8:1 – 1:8 Weight12.8 lbs. 5.5 lbs. 6.6 lbs 6.2 lbs. 6.6 lbs. 4.2 lbs. 8.2 lbs. 4.2 lbs. 6.8 lbs. 16.1 lbs.PRESENTATION TECHNOLOGIES Lens sold separately。

DemonstrationofC...

Demonstration of Compact 2x2 Multimode InterferenceCoupler on Silicon NanomembraneAmir Hosseini *1, David N. Kwong 1, Harish Subbaraman 2, and Ray T. Chen *1 1Microelectronics Research Center, Electrical and Computer Engineering Department, University of Texas at Austin, Austin, TX, 78758 2Omega Optics, Inc., 10306 Sausalito Dr, Austin, TX 78759 *Correspondingauthors:*****************.edu,**************,Fax:+1-512-471-8575Abstract: We designed and fabricated a 2x2 tapered multimode interference coupler on silicon-on-insulator with dimensions of 12.88μm×3μm. The device keeps a 50/50 splitting ratio over a 50nm bandwidth. To our best knowledge this is the most compact 2x2 MMI demonstrated.©2010 Optical Society of AmericaOCIS codes: (130.3120) Integrated optics devices; (130.2790) Guided waves1. IntroductionMultimode interference (MMI) devices based on self-imaging are key components in photonic integrated circuits (PICs) as they provide different NxM couplers with different output power distributions [1, 2, 3]. Since the MMI length is proportional to the square of the MMI width, the MMI length can be shortened by a factor of three to four in width-tapered MMIs [4, 5, 6, 7]. Linear and parabolic tapers were investigated and it was shown that while linear tapers result in shorter devices, the power splitting ratio deviates from 50/50 due to induced phase differences in the images formed at the middle of the multimode sections [4]. Parabolic 2x2 MMIs have been used as beam splitters[1, 4, 5], optical switches [8], and all-optical flip flops [9].Previously, a parabolically tapered 2x2 using air-cladded SU-8 rectangular waveguides was demonstrated [6]. Despite the advantage of polarization independent waveguide structure, optical coupling imposed a lower limit on the separation between the excess waveguides at the input and output, and therefore it increased the size of the MMI coupler (34.2μm x 5.3μm). In this paper we present a 2x2 MMI designed and fabricated on silicon nanomembrane. The high index contrast enables realization of ultra-short MMIs by reducing the proximity limitations [4] through large light confinement inside the silicon waveguide structure. Using eigenmode decomposition based simulations, we fine tune the device length from theoretical calculation. The device is 12.88μm x 3μm, which is the smallest tapered 2x2 MMI presented to date. Experimental investigation results show large bandwidth over 50nm.Fig. 1 (a) a schematic of the parabolically tapered 2x2 MMI. (b) Variations of the effective refractive indices of the zeroth and first order modes versus waveguide width for the waveguide structure shown in the inset. The refractive indices of the silicon, the buried oxide and the top cladding PECVD oxide are 3.47, 1.45 and 1.46, respectively. h=230nm and λ=1550nm.2. Parabolically tapered 2x2 MMI designA 3-dB MMI device is shown in Figure 1(a). The width of the MMI at the input and output is W l . The MMI width is parabolically tapered down to W s in the middle of the MMI according to [4]22)2//()2/)(()(L z L W W W z W s l s −−+=(1)where z and L are the direction of the propagation and the MMI length, respectively. A 2x2 MMI is designed to have a general interference (GI) two-fold self imaging at z =L . For a GI two-fold self imaging, the difference in the accumulated phases of the zeroth (φ0) and the first (φ1) order modes is 3π/2 at the MMI output (z =L ) given by [5]2/3)]()([)()()(0010101πϕϕϕ=−=−=Δ∫L eff eff dz k z n z n L L L (2)where n eff0 and n eff1 are the effective indices of the zeroth and the first order modes, respectively, k 0=2π/λ0 and λ0 is the free-space wavelength. We design a tapered 2x2 MMI based on the silicon-on-insulator (SOI) waveguide structure as shown in the inset of Figure 1(b). We assume the transverse electric polarization (TE). The variations of n eff0 and n eff1 for silicon thickness h =230nm at λ=1550nm for changes in the waveguide width are shown in Figure 1(b) calculated from Rsoft’s FIMSIM simulations. We select W l =3μm and W s =1.5μm, for which we find L =12.98μm. The input and output access waveguides are designed to match the local taper angle at the two end sides of the tapered MMI as shown in Figure 1(a). We select the access waveguide width W w =1.3μm, which is wide enough to minimize the accumulated modal phase errors at the end of the multimode region [10, 11]. Avoiding the accumulated phase errors is the key to realize high transmission and high uniformity [11].We model the designed 2x2 MMI using the eigenmode decomposition based PhotonDesign’s FIMMPROP simulations. In order to fine-tune the device length we excite both input waveguide with the same input power and maximize the total transmission. Figure 2(a) shows the field profile (Ey) for the designed tapered MMI. Figure 2(b) shows the transmission versus L . The maximum transmission is found to be 97% at L=12.88μm, which is very close to the theoretically calculated value (12.98μm). Therefore, the multimode region dimensions are 12.88μm x 3μm, which are the smallest experimentally demonstrated to date.Fig. 2, eigenmode decomposition based FIMMPROP simulations for W l =3μm, W s = 1.5μm and W w =1.3μm, (a) field profile (Ey) for L =12.88μm, (b) variations of the total output power to the total input power ratio versus MMI length, while both input waveguides are excited by the same power.3. Experimental measurement and characterizationThe MMIs are fabricated on a silicon-on-insulator (SOI) substrate with 3µm buried oxide layer (BOX). The MMIs are patterned using electron beam lithography, followed by reactive ion etching (RIE) and plasma-enhanced chemical vapor deposition (PECVD) of a 1µm thick silicon dioxide film for the top cladding. The details of the fabrication process will be reported separately. All the input channels are tapered to 2.5μm to match the input coupling lensed fiber and are fanned out for 60μm center-to-center separation. Figures 3(a) and (b) show top-down and tilted SEM images of the fabricated compact tapered 2x2 MMI.Transverse-electric field from an external cavity tunable laser source is coupled into one of the input waveguides through a tapered and lensed polarization maintaining fiber (PMF). A CCD camera captured top-down images of the scattered light at the cleaved output waveguide facets. Figure 3(c) shows the experimental setup and the image of the output facet from the CDD camera when one of the input waveguides is excited by a single wavelength laser (λ=1550nm). In order to investigate the bandwidth of the tapered 2x2 MMI, a broad-band laser diode was used to excite one the input waveguides. The output transmission spectrum, the difference of the two output channel normalized to the input spectrum, is shown in Figure 3(d). The bandwidth over which the deviation in the splitting ratio is less than 3dB is over 50nm.In summary, we designed and fabricated a compact tapered 2x2 MMI coupler on SOI. High output uniformity demonstrated over a large bandwidth prove the device’s potential for use as a passive or active component in integrated photonic circuits.Fig. 3, SEM images of the fabricated compact tapered 2x2 MMI coupler (a) top-down image, (b) titled-angle image. The SEM pictures are taken before the deposition of the top silica cladding layer. The SEM pictures show the device before the disposition of the top cladding layer. (c) The experimental setup and the image of the output facet from the IR CCD camera. (d) Measured difference of the two output channels’ power normalized to the input excitation spectrum. In (c) and (d) only one of the input waveguides is excited.4. References[1] R. M. Jenkins, R. W. J. Devereux, and J. M. Heaton, “Waveguide beam splitters and recombiners based on multimode propagation phenomena,” Opt. Lett. 17, 991-993 (1992).[2] L. B. Soldano, E. C. M. Pennings, “Optical multi-mode interference devices based on self-imaging: principles and applications,” IEEE J. of Lightwave Technol. 13(4), 615-627 (1995).[3] D. J. Y. Feng, and T. S. Lay, “Compact multimode interference couplers with arbitrary power splitting ratio,” Opt. Express 16, 7175-7180 (2008)[4] D. S. Levy, R. Scarmozzino, Y. M. Li, and R. M. Osgood, Jr. , “A new design for ultracompact multimode interference-based 2×2 couplers,” IEEE Photonics Technology Letters, 10(1), 96-98 (1998).[5] D. Dai, and S. He, “Design of an ultrashort Si-nanowaveguide-based multimode interference coupler of arbitrary shape,” Appl. Opt. 47, 38-44 (2008)[6] L. Yang, B. Yang, Z. Sheng, J. W. Wang, D. X. Dai, and S. L. He, “Compact 2×2 tapered multimode interference couplers based on SU-8 polymer rectangular waveguides,” Appl. Phys. Lett. 93, 203304 (2008).[7] P.P. Sahu, “Parabolic tapered structure for an ultracompact multi-mode interference coupler,” Appl. Opt. 48, 206-211 (2009).[8] D. A. May-Arrioja, N. Bickel, and P. Likamwa, “Robust 2 × 2 Multimode Interference Optical Switch”, Opt. and Quantum Elect. 38(7), 557-566 (2006)[9] M. Takenaka, M. Raburn, and Y. Nakano, ‘All-optical flip-flop multimode interference bistable laser diode,” IEEE Photon. Technol. Lett.17(5), 968-970 (2005).[10] Y.C. Shi, D.X. Dai, and S.L. He, “Improved performance of a silicon-on-insulator-based multimode interference coupler by using taper structures,” Opt. Commun. 253 276. (2005)[11] A. Hosseini, D. N. Kwong, Yang Zhang, Yazhao Liu, and R. T. Chen, “On the Optimum Design for 1xN Multimode Interference Coupler based Beam Splitters,” OSA/IEEE Integrated Photonics Research, Silicon and Nano Photonics (IPR), to appear 2010。