CYONS1001L-LBXC中文资料
REX-C100 系列 模拟式温度控制器 说明书
Notes:Make sure that this Instruction Manual is always readily available to personnel who use the REX-C100 series.The contents of the Instruction Manual are subject to change without notice. If you have any questions regarding the manual,contact one of our sales people, our nearest sales office, or the place where you have purchased the controller.1.PRODUCT CHECKCheck whether the delivered product is as specified by referring to the following model code list.OModel codeC100 QQQ - Q ~ QQÎ Ï Ð Ñ Ò ÓÎControl actionÓSecond alarm [ALM2]F : PID action [Reverse action]N : No second alarmD : PID action [ Direct action]A : Deviation high alarm *2B : Deviation low alarm *2ÏInput typeC : Deviation high / low alarm *2See input range table “Model code” page 9D : Band alarmE : Deviation high alarm *3ÐInput rangeF : Deviation low alarm *3See input range table “Model code” page 9G : Deviation high / low alarm *3H : Process high alarm *2ÑControl output [OUT]J : Process low alarm *2M : Relay contact K : Process high alarm *3V : Voltage pulseL : Process low alarm *38 : Current 4 to 20mA DCP : Heater break alarm (CTL-6)G : Trigger (for triac driving) *1S : Heater break alarm (CTL-12)R : Control loop break alarm *4ÒFirst alarm [ALM1]N : No first alarm*1When control output is trigger output A : Deviation high alarm *2for triac driving, only the first alarm isB : Deviation low alarm *2available.C : Deviation high / low alarm *2*2Without hold action.D : Band alarm*3With hold actionE : Deviation high alarm *3*4As control loop break alarm, only eitherF : Deviation low alarm *3the first alarm or second alarm is G : Deviation high / low alarm *3selected.H : Process high alarm *2J : Process low alarm *2CConfirm that power supply voltage is alsoK : Process high alarm *3the same as that specified when ordering.L : Process low alarm *3R : Control loop break alarm *4Accessories C Mounting brackets (2 pcs.)CInstruction manual(1 copy)REX-C100SERIESINSTRUCTION MANUALFig. 1Fig. 22.MOUNTING •DimensionsUnit : mm (inch)* Dimensions in inches are shown for reference•Mounting proceduresThickness of panel board:1 to 5mm or 5 to 9mm (0.04 to 0.20 inch or 0.20 to 0.35 inch)uWhen the controllers are mounted on panel with 1 to 5mm in thickness ÎMake a rectangular cutout corresponding to thenumber of controllers to be mounted on panel by referring to the panel cutout dimensions.ÏSince the mounting brackets are already installed onthe controller, insert the controller into the panel from the panel front without removal of the brackets (Fig. 1).uWhen the controllers are mounted on panel with 5 to 9m in thickness ÎRemove the mounting brackets from the controllerwith a slotted screwdriver.ÏEngage each mounting bracket with holes markedwith “5.9" on the housing (Fig. 2) and then insert the controller into the panel from the panel front.OCautions for mountingMo untingbracketAvoid the following location where the controller is mounted.C Location where ambient temperature is more than 50E C (122E F) or less than 0E C (32E F).C Location where humidity is high.C Location where corrosive gas is generated.C Location where strong vibration and shock exist.C Location where flooding and oil splash exist.C Location where much dust exists.CLocation where inductive disturbance is large and otherlocation where bad influence is exerted on electric instrument.3.WIRING•Rear terminalsNotes1.Terminals which are not used according to the controller type are all removed.2.For thermocouple input, no metal piece is attached to terminal No. 10. Instead, the temperature compensationelement in the internal assembly is projected through a hole at terminal No. 10.Do not damage the above temperature compensation element when the internal assembly is removed from the case.O Cautions for wiring(1)Conduct input signal wiring away from instrument, electric(3)For wiring, use wires conforming to domesticequipment power and load lines as such as possible to avoid standard of each country.noise induction.(4)About 5 to 6 sec. are required as the(2)Conduct instrument power wiring so as not to be influenced preparation time of contact output duringby noise from the electric equipment power.power ON. Use a delay relay whenthe outputIf it is assumed that a noise generation source is located near line, is used for an external interlock circuit.the controller and the controller is influenced by noise, use anoise filter (select the filter by checking instrument power(5)The figures below show the REX-C100 circuit supply voltage.)configuration. When connecting wires, notethat the power, input, MCU and output circuitsC Sufficient effect may not be obtained depending on the are isolated independently, while the inside offilter. Therefore, select the filter by referring to its the input and outputcircuits are not isolated.frequency characteristic, etc.ÎFor instrument power wiring, if it is assumed that noiseexerts a bad influence upon the controller, shorten thedistance between twisted power supply wire pitches.(The shorter the distance between the pitches, the moreeffective for noise reduction).ÏInstall the noise filter on the panel which is alwaysgrounded and minimize the wiring distance between thenoise filter output side and the controller power terminals.Otherwise, the longer the distance between output sideand instrument power terminals, the less effective for REX-C100 circuit configurationnoise.ÐDo not install fuses and / or switches on the filter outputsignal since this may lessen filter effect.WIRING AND NAME OF PARTS•Wiring exampleREX-C100F GG-M*-~2N-HA OF PARTSÑSet-value increment keyC Used when the number needs to be increasedfor set-value change.ÒMeasured-value (PV) display unit [Green]C Displays measured-value (PV)C Displays a parameter symbol in the parametersetting mode.ÓSet-value (SV) display unit [Orange]C Displays set-value (SV)C Displays set-value corresponding to theparameter symbol displayed on the measured-value (PV) display unit.ÎSet (SET) keyC The set-value thus changed is enteredÔControl output (OUT) lamp [Green]C Parameters in the parameter setting mode are C Lights up when the control output is turnedON.selected in due order.C Can select PV / SV display mode, SV settingÕAuto-tuning (AT) lamp [Green]mode, and parameter setting modes.C Flashes during auto-tuning.ÏSetting digit shift keyÖFirst alarm (ALM1) lamp [Red]C Used when the cursor (brightly lit) is moved to C Lights up when the first alarm is turned ON.the digit whose number needs to be changed for C When a control loop break alarm (LBA) is set-value change.selected as the first alarm, this lamp lights up.ÐSet-value decrement key×Second alarm (ALM2) lamp [Red]C Used when the number needs to be decreased C Lights up when second alarm is turned ON.for set-value change.C When either a heater break alarm (HBA) orcontrol loop break alarm (LBA) is selected asthe second alarm, this lamp lights up.5.OPERATION•Calling-up procedure of each mode:Press the key.Input type code / input range displayThis controller, with the power turned ON, displaysautomatically the input type code on the measured-value (PV)display unit and the input range, on the set-value (SV) displayunit, respectively.Example : For a controller with the K thermocouple inputtype and input range from 0 to 1372E C.ÎDisplays the input type code.: Indicates input abbreviation.unit. ( : E F)input type code table).ÏDisplays the input range.< Input type code >Code Input Type Code Input typeRSBW5Re/W26RePLIIPt100JPt100PV / SV display modeC Displays measured-value (PV) on the measured-value(PV) display unit and set-value (SV) on the set-value (SV)display unit. Usually the control is set to this modeexcepting that the set-value (SV) and/or the parameter set-value are changed.PV / SV display modeC Pressing the key lights the least significant digit onvalue (SV).In order to register the value whose setting was changed,always press the key after the value is changed.sec. in the PV / SV display or SV setting mode, thecontroller is set to the parameter setting mode.C Parameters in the parameter setting mode changes in dueorder every time the key is pressed (See page 6).and keys are pressed.C In order to register the value whose setting was changed,press the key after change to shift to the nextsec.•When no key is operated for more than 1 minute.•Parameter typesThe following parameter symbols are displayed one by one every time the key is pressed.Current transformer input (CT)Setting is not possible.Set heater break alarm value byreferring to this value.Display input value from thecurrent transformerCTSecond alarm Set alarm set-value of second alarm.AL2Control loopbreak alarm (LBA)0.0 to 200.0 min.Set control loop break alarmset-value.Cannot be set to “0.0".8.0LbAAuto-tuning (AT)0 : Auto-tuning end or stop1 : Auto-tuning startTurns the auto-tuningON/OFF.ATUIntegral time (I)1 to 3600 sec.Eliminates offset occurringcontrol is performed. I actionturns OFF with I set to “0".240IAnti-reset windup (ARW)1 to 100% of proportional band.Prevents overshoot and/orundershoot caused by integralaction. I action turns OFFwith this action set to “0".100ArSet data lock 0100 : No set data locked (Allparameters changeable)0101 : Set data locked (All parametersnot changeable)0110 : Only the set-value (SV) ischangeable with the set data locked.Performs set data changeenable / disable.0100LCK* The second alarm (or first alarm), heater break alarm, control loop break alarm parameter symbols are not simultaneously displayed. * Heater break alarm is not available on a current output.C Parameter setting procedure Setting set-value (SV)Following is an example of setting the set-value (SV) to 200E C. (PV : 30E C)Î Set to the set modeÏ Shift of the digit brightly litÐ Set-value increase or decrease ÑSet-value entryPress the key to Press the key to shift Press the key to set “2".After finishing the setting,enter the SV setting mode.the digit which lights brightlypress thekey. All ofController returns to the PV/SV display mode.Example : When a temperature of 199E C is changed to 200E C.Set-value increase or decreasePress the key to shift the digit brightly lit to the least significant digit. Press the key to change “9" to “0", therebyobtaining 200E C. The same applies to set-value decrease.Example : For changing 200 to -100.Minus (-) value settingPress the key to shift the digit brightly lit to the hundreds digit. Press the key to decrement figures in order of÷ 0 ÷ -1.Setting parameters other than set-value In the PV/SV display modeIn the parameter setting modeKey operational cautions CFor this controller, the value whose setting was changed is not registered. It is registered for the first time it is shifted to the next parameter by pressing the key.setting mode, set data lock is activated.In this case, change the “” parameter set-value to “0100".the parameter setting mode.Press thekey by the required number of times untilkey after the setting is finished in the parameters).When no parameter setting is required, return the controller to the PV/SV display mode.¬Pay attention to the following when the parameters described below are set.Auto-tuning (AT)C Prior to starting the auto-tuning function, end all the parameter settings other than PID and control loop break alarm(LBA).Heater break alarm (HBA)C Set heater break alarm set-value to a value about 85% current transformer input value. However, when power supplyvariations are large, set the alarm to a slightly smaller value.In addition, when two or more heaters are connected in parallel, set the alarm to a slightly larger value so that it is activated even with only one heater is broken. (However, within the value of a current transformer input value).C When the heater break alarm set-value is set to “0.0" or the current transformer is not connected, the heater breakalarm is turned ON.Control loop break alarm (LBA)C Usually set the set-value of the LBA to a value twice the integral time (I).O Set data locking procedureThis controller is provided with a set data locking function which disables each set-value change by the front key and also the auto-tuning function. Use this function for malfunction prevention at the end of each setting.C Press the key by the required number of(PV) display unit.C Press the , and keys to set the•Display at error occurrence< Heater break alarm >Display CauseMeasure(Lights)C Controlled object trouble (No power supply,incorrect wiring, etc).C Sensor trouble (Sensor disconnected, shorted, etc).C Actuator trouble (Weld relay contact, incorrectwiring, relay contact not closed, etc).C Output circuit trouble (Weld internal relay contact,relay contact not opened or closed, etc).C Input circuit trouble (The measured-value does notchange even if input changes, etc).Control system check(Error cause cannot bespecified)Check whether there is no effectby disturbances (Other heatsource, etc).LBA set time check< Overscale, Underscale >Input type Input display rangeTCK-30 to +1372E C -30 to +2502E F J-30 to +1200E C -30 to +2192E F R, S-30 to +1769E C -30 to +3216E F B-30 to +1820E C -30 to +3308E F E-30 to +1000E C -30 to +1832E F T-199.9 to +400.0E C -199.9 to +752.0E F N-30 to +1300E C -30 to +2372E F PLII-30 to +1390E C -30 to +2534E F L-30 to +800E C -30 to +1600E F U-199.9 to +600.0E C -199.9 to +999.9E F W5Re/W26Re-30 to +2320E C -30 to +4000E FRTDPt100JPT100-199.9 to +649.0E C Pt100-199.9 to +999.9E F。
Olympus 1X71 用户手册说明书
UCL Institute of Child HealthUser guide Olympus 1X71Dr Bertrand VernayLight Microscopy Facility ManagerWellcome building, Office W2.09Tel Office: 42224TelMobile************Email:***************.ukRevised December 2014Table of contentspage 3 ......... O wnershippage 3 ........ Access Rulespage 3 ......... O lympus Customer Support Contactpage 4 ........ General SpecificationsMicroscopy Techniques AvailableObjectivesFilter CubesCameraFluorescence IlluminationPixels to Microns CalibrationConsumables Listpage 5 ......... Quick User GuidesTransmitted LightEpifluorescenceImage Capturepage 6 ......... Halogen Lamp Operationpage 7 .... Kohler Illuminationpage 8 ........ Adjusting the Objective Correction Collar page 9 ........ Prior Lumen200 Metal Halide Lamp Operation page 10 .. Image Capture with HClmagepage 11 ... Selecting the Right Fluorochrome/Filter Setpage 11 DAPIpage 12 Endow GFP/EGFP Bandpasspage 13 DsRed(TRITC/Cy3)page 14 Cy5page 15 Cy7page 16 ....Prior Lumen200 Spectral Outputpage 17 ... Hamamatsu ORCA-R2 Spectral ResponseOwnershipProf. Jane Sowden, Developmental Biology Unit (Purchased in 2011)Access Rules∙No access without prior training by the Light Microscopy Facility Staff ∙Free of hourly charge for Sowden and Ferretti groups, £1 hourly charge for all other users towards the cost of the consumables is expected ∙Prof. Sowden team has priority over other users.∙Users must always record their activity in the Log book∙Problem(s) with the microscope should be reported as soon as they are noticedOlympus customer support service: /microscopy The system is not covered by a maintenance contractOlympus requires a PO number before sending an engineerGeneral specificationsMicroscopy techniques available∙Brightfield∙Phase contrast∙EpitluorescenceObjectives∙O ly mpu s UP l an FL N 10x Ph1 NA0.3 WD10.0 mm∙Olympus LUCPlanFLN 20x Ph1 NA 0.45 WD 6.6-7.8 with correction collar ∙Olympus LUCPlanFLN 40x Ph2 NA 0.6 WD 3.0-4.2 with correction collar ∙Ze is s o bj ec t ive s c an al s o be use dCamera (see p16)Hamamatsu ORCA R2 CCD Camera with HClmage Capture SoftwareFluorescence illumination (see p16)Prior Lumen 200 Metal Halide Light Source (2000 hours/bulb)Pixels to Microns calibration5x objective binning 1x1 1 pixel = 1.88 um10x objective binning 1x1 1 pixel = 1.03 um20x objective binning 1x1 1 pixel = 0.514 um40x objective binning 1x1 1 pixel = 0.256 umCalibration with a micrometer under transmitted white ligh tConsumables listPrice correct as of November 2013∙Prior Lumen 200 bulb LM375 (£550, Prior Scientific Instruments Ltd)∙Prior Lumen 200 light guide LM587 (£400, Prior Scientific Instruments Ltd)∙Halogen bulb 12V/100W (£1.8, Technical Lamp Supplies UK)Quick user guidesUsers must always record their activity in the Log bookTransmitted light1.Halogen Lamp Power Supply Unit TH4 "ON"2.Light Path selector on "Ocular"3.Kohler illumination adjusted4.Correct phase ring in position (10x & 20x Ph1, 40x Ph2)5.Filter cube on po sition #6EpifluorescenceWarnings:Do not shut the unit down within 30 minutes of powering up the unit.∙After shutting down the unit allow 30 minutes before re-powering up ∙After shutting down the unit allow 30 minutes before changing the bulb. Failure to do so is likely to result in damage to the bulb.1.Prior Lumen 200 module on2.Prior Lumen 200 intensity knob >0%3.Light Path selector lever on "Ocular"4.Correct filter cube in position5.Fluorescence shutter openImage Capture1.Start Camera controller (press until LED turns green)puter on (Login: Jane/ Password: Ja*e)3.HClmage software open4.Light Path selector lever on Camera5.Correct transmitted light/epifluorescence set-up6."L i v e"mo de7.Adjust exposure time accordingly. Make use of the Histogram and the Saturatio noptions8."A b o r t"9."C a p t u r e l"10.S a v e a s in M y D o cu me n ts>U s e r N ame_U n i t>Fi le N am e.t i f11.Shut-down: exit HClmage, log out windows session, camera on stand-by (pressuntil LED turns orange)Halogen lamp operation:Turning on the lamp1.Make sure the light intensity control knob (5) is in the MIN (minimum intensity)position on the microscope frame.2.Make sure the light intensity control knob (1) is in the MIN (minimum intensity)position on the TH4 module.3.Set the main switch (2) to "I" (ON) on the TH4 module.4.On the microscope front, press the transmitted light ON-OFF button (6) so thatthe button is illuminated.5.Adjust the brightness with the light intensity control knob (5).6.To turn OFF, set the transmitted light ON-OFF button (6) to OFFHalogen lamp operation:T urning off the lamp1.Set the light intensity control knob (5) to the MIN (minimum intensity) position onthe microscope frame.2.Set the light intensity control knob (1) to the MIN (minimum intensity) position onthe TH4 module.3.Set the main switch (2) to "0" (OFF) on the TH4 module.Kohler illumination:1.Rotate the turret (1) to the "BF" position. (Any of positions 3,4 or 5, position 1=Ph1, 2 = Ph2)2.Slide the aperture iris diaphragm lever (2) to fully open the diaphragm.3.Slide the field iris diaphragm lever (3) to the fully open position.4.Engage the 10x objective and bring the specimen into focu s.ing the field iris diaphragm lever (3), completly close the field iris diaphragm.6.Rotate the condensor height adjustment knob (4) to bring the field iris diaphragmimage into focus.7.Center the field iris diaphragm (3) using the condenser centering kno bs (5).8.Open the field iris diaphragm (3) until its image reach the limits of the field of view,adjust the centering if necessary.9.Open the field iris diaphragm (3) until not visible.Step 6 Step 7 Step 8 Step 9Adjusting the objective correction collarCorrection is possible according to the vessel bottom thickness.1.When the thickness of the vessel bottom is known, match the scale reading of thecorrection collar to the thickness of the vessel in use.or2.If the thickness of the vessel is unknown or diverge from the manufacturerspecifications, the optimum position for the correction collar can be obtained by judging the image resolution and contrast. When a satisfactory image is not obtain after focusing:1. Rotate the correction collar to the left and right, refocus each time andcompare the images.2 Then rotate the collar in the direction yielding a better image, rotate thecorrection collar to the left and right, refocus each time and compare theimages.3 Repeat this cycle until the position with the optimum image is found.20x Correction Collar 40x Correction CollarCorrection Collar Scale0 mm0.17 mm (glass coverslip #1.5)0.5 mm1 mm (most tissue culture plates)1.5 mm2 mmPrior Lumen200 Metal Halide Lamp Operation:Starting Up the Lumen1.Switch the Lumen power switch on.2.Make sure the ventilation vent on the left hand side is unobstructed or the lampwill overheat resulting in automatic shutdown and damage to the module.3.Allow 1-5 minutes for light to reach 70% of output.4.Allow 30 minutes for the Lumen to reach operational temperature.5.Warning: Do not power down the unit within 30 mins of power up. This may re-duce the effective lifetime of the bulb.Shutting down the LumenThe following warnings apply as damage to the bulb may result if instructions not followed:1.Warning: Do not shut the unit down within 30 minutes of powering up the unit.2.Warning: After shutting down the unit allow 30 minutes before re-powering up orchanging the bulb. Failure to do so is likely to result in damage to the bulb.Warning: the airoutlet for heatventilation mustnot but obstructed[Mono: 1 Channel ⏹ Mono: 1 Channel v•[C10600-100 (O R CA-R 2) S IN: 011316 ⏹C10600-106 (CIRCA-R2) SP!: 011316--- — X CaptureXBinning and SubArray Advanced Camera PropertiesBinning and SubArray Advanced Camera PropertiesusL IP r o c e s s i n gIF! 0uL P r oc es s in gD e p t h16 b itBinning and SubArray Binning [1 Sub-Array ResetPreset Sizes[1344 x 1024 ⏹X 0 0 L i e d a g .:Width 1344 Image Capture with HClmage1. Click the Capture pane.2. Click Live for a live image from the camera3. Camera binning or image sub-array can be set in the Binning SubArray panel.4. In the Camera Control panel, adjust exposure/gain manually or automatically by clicking on Auto Expose; view the intensity distribution in the histogram.5. Check Sat. (saturation) in the histogram of the Image Display to guard against image saturation. Saturated pixel are indicated in Red. Yellow indicates pixels ap -proaching saturation.6. Adjust camera exposure and gain settings as necessary7. Click Abort.8. Click Capture1 to acquire an image.9.Click the Save icon to save the image in My Documents>UserName_Unit>file name.tifC a p t u r eMEMCapturelAbort1Capture1iY 2/ C a m e r a C o n t r o l1 Li n 1,1.A.M.Pi n M.,11Auto ExposeAu to Expos eT e m p e r a t u r e [C ] Current100 Camera ControlTemperature [C]OffsetB4UDefault ⏹DefaultGain Exposure 00.10000(OffsetG a i n E x pos u re 0 ! ;0. 10400C 1Ilkstogursr ;401Lopg:• ItE•4 • a-YO 0Height 1024I lb O..^ • la Coorto0wpo•d • ItI P f o r H O V I. M o o n.. t l e f r a89Selecting the right fluorochrome/filter setPosition #149000 - ET - DAPIExciter 350/50xbeamsplitter 400113Emitter ET460/50m550Wavelength (nm)Position #241017 EndowGFP/EGFP Bandpass Emitter ET470/40xBeamsplitter 495LPEmitter ET 525/50mPosition #349005 - ET - DSRed (TRITC/Cy3) Exciter ET545/30xBeamsplitter T570LPXREmitter ET620/60m100Position #4 49006 - ET - Cy5 emitter ET620/60xBeamsplitter T660LPXR Emitter ET700/75n,Position #549007 - ET - Cy7Exciter ET710/75xBeamsplitter T760LPXREmitter ET810/90m700 750 800 850Wavelength (nm)T7601pxrHClmage Live。
XXXXXX-XXX-XX-IN1001-01 简化版
24VDC
无源 24VDC 24VDC
无源
4~20mA. DO无源触点 DO无源触点 DO有源接点 DO有源接点
（SIS）
DO有源接点制
220V AC
SIC-103-015
DCS
无源
4~20mA.
JI-103-015 HS-103-015
MCC MCC/DCS
4~20mA DI无源触点
称重系统
4~20mA
无源
四线制
HS-121-001 SOLENOID VAVLE
220V AC 24VDC
DO有源接点
TT-120-011 一体化温度变送器
RCV-120-009
气动切断阀 火灾 安全
RCV-120-010 气动三通切断阀
4~20mA.DC
DI无源触点 DI无源触点
(SIS) DI无源触点
第 2 张共 2 张 of
输入信号
电源电压 输入卡地址 输出信号
输出卡地址
备注
INPUT SIGN.
POWER VOL. 无源
INPUT ADD.
OUTPUT SIGN. 4~20mA.
OUTPUT ADD.
REMARKS
MCC/DCS
DI无源触点
DO无源触点
DO无源触点
WE-111-008
称重系统
（SIS）
OUTPUT ADD.
REMARKS 二线制
四线制
RCV-103-003
气动切断阀 全
火灾安
FT-104-002
质量流量计
DI无源触点 DI无源触点
(SIS)
4~20mA
220V AC 24VDC
SCALANCE X101-1 商品说明书
24 V
6GK5101-1BB00-2AA3 Page 1/4
06/28/2018
Subject to change without notice © Copyright Siemens
● at DC / maximum
Supply voltage, current consumption, power loss Supply voltage ● external ● external Type of voltage / of the supply voltage Product component / fusing at power supply input Fuse protection type / at input for supply voltage Consumed current ● maximum Power loss [W] ● at DC / at 24 V
Compact 40 mm 125 mm 124 mm 0.55 kg
Yes Yes Yes
No No
FM3611: Class 1, Divison 2, Group A, B, C, D / T.., Class 1, Zone 2, Group IIC, T.. EN 600079-15 II 3 G EEx nA II T.. KEMA 06 ATEX 0021 X
Yes
Yes Yes Yes Yes Yes No 134 y
/snst
/simatic-net https:// /industry/infocenter /bilddb /cax https://
Security information
UL 60950-1, CSA C22.2 No. 60950-1 UL 1604 and UL 2279-15 (Hazardous Location), Class 1 / Division 2 / Group A, B, C, D / T.., Class 1 / Zone 2 / Group IIC / T.. EN 61000-6-3 EN 61000-6-4:2001 EN 61000-6-2:2001, EN 61000-6-4:2001 Yes Yes Yes
ADC1001CCJ-1中文资料
ADC100110-Bit µP Compatible A/D ConverterGeneral DescriptionThe ADC1001is a CMOS,10-bit successive approximation A/D converter.The 20-pin ADC1001is pin compatible with the ADC08018-bit A/D family.The 10-bit data word is read in two 8-bit bytes,formatted left justified and high byte first.The six least significant bits of the second byte are set to zero,as is proper for a 16-bit word.Differential inputs provide low frequency input common mode rejection and allow offsetting the analog range of the converter.In addition,the reference input can be adjusted enabling the conversion of reduced analog ranges with 10-bit resolution.Key Specificationsn Resolution 10bitsn Linearity error ±1LSBn Conversion time200µSFeaturesn ADC1001is pin compatible with ADC0801series 8-bit A/D convertersn Compatible with NSC800and 8080µP derivatives —no interfacing logic neededn Easily interfaced to 6800µP derivatives n Differential analog voltage inputsn Logic inputs and outputs meet both MOS and TTL voltage level specificationsn Works with 2.5V (LM336)voltage reference n On-chip clock generatorn 0V to 5V analog input voltage range with single 5V supplyn Operates ratiometrically or with 5V DC ,2.5V DC ,or analog span adjusted voltage reference n 0.3"standard width 20-pin DIP packageConnection DiagramOrdering InformationTemperature Range 0˚C to +70˚C −40˚C to +85˚C Order Number ADC1001CCJ-1ADC1001CCJPackage OutlineJ20AJ20ATRI-STATE ®is a registered trademark of National Semiconductor Corp.ADC1001Dual-In-Line PackageDS005675-11Top ViewJune 1999ADC100110-Bit µP Compatible A/D Converter©1999National Semiconductor Corporation Absolute Maximum Ratings(Notes1,2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.Supply Voltage(V CC)(Note3) 6.5V Logic Control Inputs−0.3V to+18V Voltage at Other Inputs and Outputs−0.3V to(V CC+0.3V) Storage Temperature Range−65˚C to+150˚C Package Dissipation at T A=25˚C875mW Lead Temp.(Soldering,10seconds)300˚C ESD Susceptibility(Note10)800VOperating Conditions(Notes1,2) Temperature Range T MIN≤T A≤T MAX ADC1001CCJ−40˚C≤T A≤+85˚C ADC1001CCJ-10˚C≤T A≤+70˚C Range of V CC 4.5V DC to6.3V DCConverter CharacteristicsConverter Specifications:V CC=5V DC,V REF/2=2.500V DC,T MIN≤T A≤T MAX and f CLK=410kHz unless otherwise specified.Parameter Conditions MIn Typ Max Units Linearity Error±1LSB Zero Error±2LSB Full-Scale Error±2LSB Total Ladder Resistance(Note9)Input Resistance at Pin9 2.2 4.8KΩAnalog Input Voltage Range(Note4)V(+)or V(−)GND−0.05V CC+0.05V DC DC Common-Mode Error Over Analog Input Voltage Range±1⁄8LSB Power Supply Sensitivity V CC=5V DC±5%Over±1⁄8LSBAllowed V IN(+)and V IN(−)Voltage Range(Note4)AC Electrical CharacteristicsTiming Specifications:V CC=5V DC and T A=25˚C unless otherwise specified.Symbol Parameter Conditions MIn Typ Max Units T c Conversion Time(Note5)80901/f CLKf CLK=410kHz195220µsf CLK Clock Frequency(Note8)1001260kHzClock Duty Cycle4060% CR Conversion Rate In Free-Running INTR tied to WR with4600conv/s Mode CS=0V DC,f CLK=410kHzt W(WR)L Width of WR Input(Start Pulse CS=0V DC(Note6)150ns Width)t ACC Access Time(Delay from C L=100pF170300ns Falling Edge of RD to OutputData Valid)t1H,t0H TRI-STATE®Control(Delay C L=10pF,R L=10k125200ns from Rising Edge of RD to(See TRI-STATE TestHi-Z State)Circuits)t WI,t RI Delay from Falling Edge300450ns of WR or RD to Reset of INTRt1rs INTR to1st Read Set-Up Time550400nsC IN Input Capacitance of Logic57.5pFControl InputsC OUT TRI-STATE Output57.5pFCapacitance(Data Buffers)2DC Electrical CharacteristicsThe following specifications apply for V CC=5V DC and T MIN≤T A≤T MAX,unless otherwise specified.Symbol Parameter Conditions MIn Typ Max Units CONTROL INPUTS[Note:CLK IN is the input of a Schmitt trigger circuit and is therefore specified separately]V IN(1)Logical“1”Input Voltage V CC=5.25V DC 2.015V DC (Except CLK IN)V IN(0)Logical“0”Input Voltage V CC=4.75V DC0.8V DC (Except CLK IN)I IN(1)Logical“1”Input Current V IN=5V DC0.0051µA DC(All Inputs)I IN(0)Logical“0”input Current V IN=0V DC−1−0.005µA DC(All Inputs)CLOCK INV T+CLK IN Positive Going 2.7 3.1 3.5V DC Threshold VoltageV T−CLK IN Negative Going 1.5 1.8 2.1V DC Threshold VoltageV H CLK IN Hysteresis0.6 1.3 2.0V DC (V T+)−(V T−)OUTPUTS AND INTRV OUT(0)Logical“0”Output Voltage I OUT=1.6mA,V CC=4.75V DC0.4V DCV OUT(1)Logical“1”Output Voltage I O=−360µA,V CC=4.75V DC 2.4V DCI O=−10µA,V CC=4.75V DC 4.5V DCI OUT TRI-STATE Disabled Output V OUT=0.4V DC0.1−100µA DCLeakage(All Data Buffers)V OUT=5V DC0.13µA DCI SOURCE V OUT Short to GND,T A=25˚C 4.56mA DCI SINK V OUT Short to V CC,T A=25˚C9.016mA DC POWER SUPPLYI CC Supply Current(Includes f CLK=410kHz,Ladder Current)V REF/2=NC,T A=25˚Cand CS=1 2.5 5.0mANote1:Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.DC and AC electrical specifications do not apply when operatingthe device beyond its specified operating conditions.Note2:All voltages are measured with respect to GND,unless otherwise specified.The separate A GND point should always be wired to the D GND.Note3:A zener diode exists,internally,from V CC to GND and has a typical breakdown voltage of7V DC.Note4:For V IN(−)≥V IN(+)the digital output code will be all zeros.Two on-chip diodes are tied to each analog input(see Block Diagram)which will forward conductfor analog input voltages one diode drop below ground or one diode drop greater than the V CC supply.Be careful,during testing at low V CC levels(4.5V),as high level analog inputs(5V)can cause this input diode to conduct—especially at elevated temperatures,and cause errors for analog inputs near fullscale.The spec al-lows50mV forward bias of either diode.This means that as long as the analog V IN does not exceed the supply voltage by more than50mV,the output code willbe correct.To achieve an absolute0V DC to5V DC input voltage range will therefore require a minimum supply voltage of4.950V DC over temperature variations,initial tolerance and loading.Note5:With an asynchronous start pulse,up to8clock periods may be required before the internal clock phases are proper to start the conversion process.The start request is internally latched,see Figure3.Note6:The CS input is assumed to bracket the WR strobe input and therefore timing is dependent on the WR pulse width.An arbitrarily wide pulse width will holdthe converter in a reset mode and the start of conversion is initiated by the low to high transition of the WR pulse(see Timing Diagrams).Note7:All typical values are for T A=25˚C.Note8:Accuracy is guaranteed at f CLK=410kHz.At higher clock frequencies accuracy can degrade.Note9:The V REF/2pin is the center point of a two resistor divider(each resistor is2.4kΩ)connected from V CC to ground.Total ladder input resistance is the sumof these two equal resistors.Note10:Human body model,100pF discharged through a1.5kΩresistor.3Typical Performance CharacteristicsTRI-STATE Test Circuits and WaveformsLogic Input Threshold Voltage vs Supply VoltageDS005675-14Delay From Falling Edge of RD to Output Data Valid vs Load CapacitanceDS005675-15CLK IN Schmitt Trip Levels vs Supply VoltageDS005675-16Output Current vs TemperatureDS005675-17DS005675-3t 1H ,C L =10pFDS005675-4t r =20nsDS005675-5t 0H ,C L =10pFDS005675-6t r =20ns 4TRI-STATE Test Circuits and Waveforms(Continued)Timing DiagramsDS005675-7Output Enable and Reset INTRDS005675-8*All timing is measured from the50%voltage points.5Timing Diagrams(Continued)Byte Sequencing For The20-Pin ADC1001Byte8-Bit Data Bus ConnectionOrder DB7DB6DB5DB4DB3DB2DB1DB0 MSB1st Bit9Bit8Bit7Bit6Bit5Bit4Bit3Bit2LSB2nd Bit1Bit0000000 Functional DescriptionThe ADC1001uses an advanced potentiometric resistive ladder network.The analog inputs,as well as the taps of this ladder network,are switched into a weighted capacitor array. The output of this capacitor array is the input to a sampled data comparator.This comparator allows the successive ap-proximation logic to match the analog difference input volt-age[V IN(+)−V IN(−)]to taps on the R network.The most sig-nificant bit is tested first and after10comparisons(80clock cycles)a digital10-bit binary code(all“1”s=full-scale)is transferred to an output latch and then an interrupt is as-serted(INTR makes a high-to-low transition).The device may be operated in the free-running mode by connecting INTR to the WR input with CS=0.To ensure start-up under all possible conditions,an external WR pulse is required dur-ing the first power-up cycle.A conversion in process can be interrupted by issuing a second start command.On the high-to-low transition of the WR input the internal SAR latches and the shift register stages are reset.As long as the CS input and WR input remain low,the A/D will remain in a reset state.Conversion will start from1to8clock peri-ods after at least one of these inputs makes a low-to-high transition.A functional diagram of the A/D converter is shown in Figure3.All of the inputs and outputs are shown and the major logic control paths are drawn in heavier weight lines.The conversion is initialized by taking CS and WR simulta-neously low.This sets the start flip-flop(F/F)and the result-ing“1”level resets the8-bit shift register,resets the Interrupt (INTR)F/F and inputs a“1”to the D flop,F/F1,which is at the input end of the10-bit shift register.Internal clock signals then transfer this“1”to the Q output of F/F1.The AND gate, G1,combines this“1”output with a clock signal to provide a reset signal to the start F/F.If the set signal is no longer present(either WR or CS is a“1”)the start F/F is reset and the10-bit shift register then can have the“1”clocked in, which allows the conversion process to continue.If the set signal were to still be present,this reset pulse would have no effect and the10-bit shift register would continue to be held in the reset mode.This logic therefore allows for wide CS and WR signals and the converter will start after at least one of these signals returns high and the internal clocks again provide a reset signal for the start F/F.After the“1”is clocked through the10-bit shift register(which completes the SAR search)it causes the new digital word to transfer to the TRI-STATE output latches.When this XFER signal makes a high-to-low transition the one shot fires,set-ting the INTR F/F.An inverting buffer then supplies the INTR output signal.Note that this SET control of the INTR F/F remains low for aproximately400ns.If the data output is continuously en-abled(CS and RD both held low),the INTR output will still signal the end of the conversion(by a high-to-low transition),because the SET input can control the Q output of the INTR F/F even though the RESET input is constantly at a“1”level. This INTR output will therefore stay low for the duration of the SET signal.When data is to be read,the combination of both CS and RD being low will cause the INTR F/F to be reset and the TRI-STATE output latches will be enabled.Zero and Full-Scale AdjustmentZero error can be adjusted as shown in Figure1.V IN(+)is forced to+2.5mV(+1⁄2LSB)and the potentiometer is ad-justed until the digital output code changes from000000 0000to0000000001.Full-scale is adjusted as shown in Figure2,with the V REF/2 input.With V IN(+)forced to the desired full-scale voltage less11⁄2LSBs(V FS−11⁄2LSBs),V REF/2is adjusted until the digital output code changes from1111111110to111111 1111.6Functional Description(Continued)Typical Application DS005675-9Note11:V IN(−)should be biased so that V IN(−)≥−0.05V when potentiom-eter wiper is set at most negative voltage position.FIGURE1.Zero Adjust CircuitDS005675-10FIGURE2.Full-Scale AdjustDS005675-1 7Block DiagramDS005675-13 Note12:CS shown twice for clarity.Note13:SAR=Successive Approximation Register.FIGURE3.8Physical Dimensions inches(millimeters)unless otherwise notedLIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices orsystems which,(a)are intended for surgical implantinto the body,or(b)support or sustain life,andwhose failure to perform when properly used inaccordance with instructions for use provided in thelabeling,can be reasonably expected to result in asignificant injury to the user.2.A critical component is any component of a lifesupport device or system whose failure to performcan be reasonably expected to cause the failure ofthe life support device or system,or to affect itssafety or effectiveness.National SemiconductorCorporationAmericasTel:1-800-272-9959Fax:1-800-737-7018Email:support@National SemiconductorEuropeFax:+49(0)180-5308586Email:europe.support@Deutsch Tel:+49(0)180-5308585English Tel:+49(0)180-5327832Français Tel:+49(0)180-5329358Italiano Tel:+49(0)180-5341680National SemiconductorAsia Pacific CustomerResponse GroupTel:65-2544466Fax:65-2504466Email:sea.support@National SemiconductorJapan Ltd.Tel:81-3-5639-7560Fax:81-3-5639-7507 Cavity Dual-In-Line Package(J)(Side Brazed)Order Number ADC1001CCJ or ADC1001CCJ-1NS Package Number J20AADC100110-BitµPCompatibleA/DConverter National does not assume any responsibility for use of any circuitry described,no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.。
Celmi s.r.l. S1D模型分析力量传输器商业说明书
ANALOG WEIGHT TRANSMITTER MODEL S1DCELMI s.r.l. Tel: +39 024******* Largo Brugnatelli 13/16 Page 1 of 3 Fax: +39 024******* 20090 Buccinasco (MI) ************** Italy Applications:The analog weight transmitter model S1D has been designed for electronic weighing systems with strain-gages load cells and is suitable for installation in any industrial or residential plant.Typical applications are:- Overload control for cranes - Silo level measurement - PLC weight inputMain features:- Suitable for max 4 strain-gage load cells - Load cell supply short circuit protection - Standard analog signal output- Zero and span adjustment by step switches + 20 turn pot.- Wiring and load cell failure control - DIN bracket mounting- 24 V a.c. supply or 24 V d.c. - Optional isolated analog outputSpecification:Power supply: 24 V a.c., ±10%, 50/60 Hz, 4 VA Option : 24 V d.c.Load cell supply : 10 V cc, max 120 mA Load cell number : max 4 - 350 ohm load cells Measuring range : From 0,25 to 3 mV/V Tare compensation : ± 80% of measuring range Analog output : Standard 4-20 mA, 400 ohm max Combined error : 0,1 % o of measuring range Zero / span thermal drift : 2,0 µV/°C max / 0,01 % reading/°C Operating/stocking temp. : -20 + 50 °C / -40 + 80 °C Wiring : Terminal board for 2,5 mm 2 wire max Protection : IP00 Weight / packing volume : 0,3 kg / 0,9 dm 3ANALOG WEIGHT TRANSMITTER MODEL S1DCELMI s.r.l. Tel: +39 024******* Largo Brugnatelli 13/16 Page 2 of 3 Fax: +39 024******* 20090 Buccinasco (MI) ************** Italy Description:Model S1D weight transmitter is an analog instrument specifically designed for industrial electronic weighing.The instrument generates the load cell stabilized voltage supply and converts the low voltage signal delivered by the load cells, into a standard 4-20 mA analog signal usable by any normal control and supervisor equipment (display, PLC, PC, ecc.).The load cell supply is short circuit protected with autoreset by power supply on/off switching.Analog output is a standard 4-20 mA non isolated suitable for connection to any conventional equipment. The circuit includes the control of any failure (open or short circuit) inside the load cell or relevant wiring and alarms the failure condition by driving the output signal over 20,8 mA or below 3,2 mA.Zero and span adjustments are performed trough 20 turn potentiometers plus coarse dip-switch adjustment.Options:Output signal: Standard availabilty is 4-20 mA.Analog output optoisolation: The mA analog output does not normally requires to be isolated; however, some specific applications (such as interconnection with motor drive controls) may require the use of this option.Model options:Specify the complete model number, together with the required functions; to allow correction of misunderstanding or writing errors.Base model S1D- X X X Output signal 4 - 20 mA 0 Analog output optoisolation NO 0 YES 1 Supply 24 V a.c. 0 24 V d.c. 1 110 V a.c. 2InstallationThe unit have to be installed on DIN bracket (EN50022) at an height suitable for easy operation in environments with temperature within spec. limits and without humidity condensation, aggressive or explosive vapours.The supporting structure must not have high vibrations; eventually vibration smoothers should be provided. Distance between load cells and the instrument should be kept to the minimum; possibly connect the load cell cable directly to the instrument; long distance connections may be carefully checked against required accuracy and installation conditions.ANALOG WEIGHT TRANSMITTER MODEL S1DCELMI s.r.l. Tel: +39 024******* Largo Brugnatelli 13/16 Page 3 of 3 Fax: +39 024******* 20090 Buccinasco (MI) ************** Italy WiringWiring have to be done on the basis of terminal board connection diagram and according to local standard and regulations.Always use needle type wire terminator and install an external switch with fuse on power supply connection (eventually common to other instruments).WARNING:Load cell, analog output and serial signal cables must run separate from power cables.。
自由系列NEMA接触器——产品概述说明书
Freedom Series NEMA Contactors – Overview• Market leader in NEMA power control • Most complete line in the industry• Ideal for project construction, HVAC, pump and industrial applications • Open and enclosed versionsType CN15/CN55 NEMA Contactors – Model SelectionNEMA Size Continuous Ampere Rating Maximum UL Horsepower 3-Pole Non-Reversing 3-Pole Reversing 1-Phase 3-Phase 115V 230V 208V 240V 480V 600V Catalog Number 1Catalog Number 10091/311-1/21-1/222CN15AN3_B CN55AN3_B 018123355CN15BN3_B CN55BN3_B 127237-1/27-1/21010CN15DN3_B CN55DN3_B 24537-1/210152525CN15GN3_B CN55GN3_B 390––25305050CN15KN3_CN55KN3_4135––4050100100CN15NN3_CN55NN3_5270––75100200200CN15SN3_CN55SN3_6540––150200400400CN15TN3_B CN55TN3_B 7810––200300600600CN15UN3_CN55UN3_821215––400450900900CN15VN3_CN55VN3_1 When ordering, replace magnet coil alpha designation in catalog number (_) with proper code suffi x from table below.2Common control. For separate 120V control, insert letter D in seventh position of listed catalog number (ex. CN15VND3C).Magnet Coils (AC and DC) – Model SelectionCoil Volts and Hertz Code Suffi x Coil Volts and Hertz Code Suffi x 120/60, 110/50240/60, 220/50480/60, 440/50600/60, 550/50A B C D 380-415/50550/5024/60, 24/50 424/50L N T U 208/60277/60208-240/60 3240/50E H J K32/5048/6048/50V W Y3 NEMA Sizes 00 and 0 only.4NEMA Sizes 00 and 0 only. Sizes 1 through 8 are 24/60 only.NEMA Contactors forthe Construction MarketNEMA Size 1 ContactorAuxiliary Contacts – Model SelectionSide-Mounted, NEMA Sizes 00 to 2, IEC Sizes A to K Description Contact Confi guration Code 5Catalog Number 1NO 1NC1001C320KGS1C320KGS21NO-1NC 2NO 2NC1NO-1NCI1NO (EC) - 1NC (LO)1NCI112002N/A N/A N/AC320KGS3C320KGS4C320KGS5C320KGS6C320KGS7C320KGS85This two-digit code is found on the auxiliary contact to assist in identifying the specifi c contact confi guration. The fi rst digit indicates the quantity of NO contacts and the second indicates the quantity of NC contacts.Additional Freedom Series auxiliary contacts are available. For a complete listing of theseaccessories, see the Control Products & Services Catalog (CA08102001E), Tab 33.Eaton Corporation Electrical Group1000 Cherrington Parkway Moon Township, PA 15108United States877-ETN-CARE (877-386-2273)© 2009 Eaton Corporation All Rights ReservedPublication No. TD03301007EApril 2009PowerChain Management is a registered trademark of Eaton Corporation. All other trademarks are property of their respective owners.Quick Selector TD03301007EApril 2009NEMA Contactors for the Construction MarketFreedom Series NEMA Starters – Overview• Three-phase, full voltage magnetic starters most commonly used to switch ACmotor loads • Bimetallic ambient compensated overload relays • These overload relays feature:• Interchangeable heater packs adjustable ±24% to match motor FLA • Selectable manual or automatic reset operation• Single-phase protection, Class 20 or Class 10 trip time • Overload trip indication•Electrically isolated NO-NC contacts (pull RESET button to test)• Also available with solid-state overload relays (see T ab 33 of the Control Products & Services Catalog, CA08102001E)Type AN16/An56 NEMA Starters – Model SelectionNEMA Size Continuous Ampere Rating Service-Limit Current Ratings 2Maximum UL Horsepower3-Pole Non-Reversing 3-Pole Reversing Vertical Reversing 1-Phase 3-Phase 115V 230V 208V 240V 480V 600V Catalog Number 1Catalog Number 1Catalog Number 1009111/311-1/21-1/222AN16AN0_C AN56AN0_C –01821123355AN16BN0_C An56BN0_C AN56BNV0_12732237-1/27-1/21010AN16DN0_B AN56DN0_B AN56DNV0_2455237-1/210152525AN16GN0_B AN56GN0_B AN56GNV0_390104––25305050AN16KN0_AN56KN0_AN56KNV0_4135156––4050100100AN16NN0_AN56NN0_AN56NNV0_5270311––75100200200AN16SN0_B AN56SN0_B –6540621––150200400400AN16TN0_C AN56TN0_B –7810932––200300600600AN16UN0_B AN56UN0_B –8312151400––400450900900AN16VN0_BAN56VN0_B–1 When ordering, replace magnet coil alpha designation in catalog number (_) with proper code suffi x from table below.2The service-limit current ratings represent the maximum RMS current, in amperes, which the controller shall be permitted to carry for protracted periods in normal service. At service-limit current ratings, termperature rises shall be permitted to exceed those obtained by testing the controller at its continuous current rating. The current rating of overload relays or trip current of other motor protective devices used shall not exceed the service-limit current rating of the controller.3Common control. For separate 120V control, insert letter D in seventh position of listed catalog number (ex. CN15VND3C).Magnet Coils (AC and DC) – Model SelectionCoil Volts and Hertz Code Suffi x Coil Volts and Hertz Code Suffi x 120/60, 110/50240/60, 220/50480/60, 440/50600/60, 550/50A B C D 380-415/50550/5024/60, 24/50 524/50L N T U 208/60277/60208-240/60 4240/50E H J K32/5048/6048/50V W Y4 NEMA Sizes 00 and 0 only.5NEMA Sizes 00 and 0 only. Sizes 1 through 8 are 24/60 only.Freedom Series Non-Reversing StarterNEMA Size 1Freedom Series Reversing StarterNEMA Size 1Freedom Series Auxiliary ContactsAuxiliary Contacts – Model SelectionSide-Mounted, NEMA Sizes 00 to 2, IEC Sizes A to K Description Contact Confi guration Code 6Catalog Number 1NO 1NC1001C320KGS1C320KGS21NO-1NC 2NO 2NC1NO-1NCI1NO (EC) - 1NC (LO)1NCI112002N/A N/A N/AC320KGS3C320KGS4C320KGS5C320KGS6C320KGS7C320KGS86This two-digit code is found on the auxiliary contact to assist in identifying the specifi c contact confi guration. The fi rst digit indicates the quantity of NO contacts and the second indicates the quantity of NC contacts.Additional Freedom Series auxiliary contacts are available inNEMA sizes 3 to 8 and IEC sizes L to Z. For a complete listing of these accessories, see the Control Products & Services Catalog (CA08102001E), Tab 33.。
GBS-92120F-CXX0G资料
Optoway GBS-92120F-CXX0G********************************************************************************************************************************************************************************************************************************************************************************************************************************************OPTOWAY TECHNOLOGY INC. No .38, Kuang Fu S. Road, Hu Kou, Hsin Chu Industrial Park, Hsin Chu, Taiwan 3031GBS-92120F-CXX0G (RoHS Compliant)5V / CWDM / 2.125 Gb/s Single-Mode Gigabit Interface Converter (GBIC)**********************************************************************************************************************************************************************FEATURESl 18-Wavelength CWDM GBIC Transceivers l Up to 2. 5 Gbps Bi-directional Data Linksl Compliant with 1X / 2X Fibre Channel FC-PI 13.0 l Compliant with Gigabit Interface Converter (GBIC) Specification Rev. 5.5l CWDM DFB Laser Transmitter l APD High Sensitivity Receiverl Multi-rate Operation for 2.5 / 2.125 / 1.062 / 1.25 Gbps l Duplex SC Connectorl 30 dB Power Budget At Least l SCA-2 Host Connector l Single +5 V Power Supplyl RoHS Compliantl Differential PECL Inputs and Outputs l TTL RX-LOS Output l Hot Pluggablel Class 1 Laser International Safety Standard IEC-60825 CompliantAPPLICATIONSl Switch to Switch Interfacel High Speed Interface for File Servers l Bus Extension Application l Data Storagel Dual Rate 1.06 / 2.125 Gb/s Fibre ChannelDESCRIPTIONThe GBS-92120F-CXX0G series optical transceivers meet the Gigabit Interface Converter (GBIC) specification Rev. 5.5. It satisfies the optical interface specifications defined in IEEE 802.3z Drift 5.0 1000 BASE-SX for Gigabit Ethernet and 1x/2x Fiber Channel FC-PI13.0. This module is designed for single-mode fiber and operates at a nominal wavelength of CWDM. There are eighteen center wavelengths availablefrom 1270 nm to 1610 nm, each step 20 nm. A guaranteed minimum optical link budget of 30 dB is offered. The transmission distance is depended on the wavelength and loss of fiber. The transmitter section uses a multiple quantumwell CWDM DFB laser and is a class 1 laser compliant according to International Safety Standard IEC-60825. The receiver section uses an integrated InGaAs detector preamplifier (IDP) mounted in an optical header and a limiting post-amplifier IC. A PECL input / output logic interface is used. TTL RX-LOS output simplifies interface to external circuitry. A 20-pin SCA-2 host connector is used to connect the converter to the host system.LASER SAFETYThis single mode transceiver is a Class 1 laser product. It complies with IEC-60825 and FDA 21 CFR 1040.10 and 1040.11. The transceiver must be operated within the specified temperature and voltage limits. The optical ports of the module shall be terminated with an optical connector or with a dust plug.ORDER INFORMATIONP/No.Bit Rate (Gb/s)FC-PIPower Budget (dB) Wavelength (nm) Package Temp.(o C) TX Power (dBm) RX Sens. (dBm) RoHS Compliant GBS-92120F-CXX0G 2.125/1.063 200/100> 30 CWDM * SC GBIC0 to 705 to 0-30YesCWDM Wavelength (0 to 70oC)Central Wavelength Min. (nm) Typ. (nm) Max. (nm) Central Wavelength Min. (nm) Typ. (nm) Max. (nm) -C270 1264.5 1270 1277.5 -C450 1444.5 1450 1457.5 -C290 1284.5 1290 1297.5 -C470 1464.5 1470 1477.5 -C310 1304.5 1310 1317.5 -C490 1484.5 1490 1497.5 -C330 1324.5 1330 1337.5 -C510 1504.5 1510 1517.5 -C350 1344.5 1350 1357.5 -C530 1524.5 1530 1537.5 -C370 1364.5 1370 1377.5 -C550 1544.5 1550 1557.5 -C390 1384.5 1390 1397.5 -C570 1564.5 1570 1577.5 -C410 1404.5 1410 1417.5 -C590 1584.5 1590 1597.5 -C430 1424.5 1430 1437.5 -C610 1604.5 1610 1617.5CWDM *: 18 Wavelengths from 1270 nm to 1610 nm, each step 20 nm.***********************************************************************************************************************************************************************OPTOWAY TECHNOLOGY INC. No .38, Kuang Fu S. Road, Hu Kou, Hsin Chu Industrial Park, Hsin Chu, Taiwan 303Absolute Maximum RatingsParameterSymbol Min Max Units NotesStorage Temperature Tstg -40 85 o COperating Temperature Topr -5 70 o C Air flow 1m/sec Power Supply Voltage Vcc -0.5 6 V Input Voltage----0.5VccVRecommended Operating ConditionsParameterSymbol Min Typ Max Units ConditionsPower Supply Voltage Vcc 4.75 5 5.25 V Reference to GND.Power Supply Current I TX + I RX 200 300 mAOperating Temperature Topr 070 oC Air flow 1m/secData Rate1.0625 / 1.252.125 / 2.52.5Gb/sTransmitter Specifications (0o C < Topr < 70o C, 4.75V < Vcc < 5.25V)ParameterSymbol Min Typ Max Units NotesOpticalOptical Transmit Power Po 0 --- 5 dBm 1 Output Center Wavelength λ λ-5.5 λ λ+7.5 nm 2Output Spectrum Width∆λ --- 1 nm -20 dB Width Side Mode Suppression Ratio SMSR 30 dB Extinction Ratio E R 9 --- dBOptical Rise Time t r 150 ps 20% to 80% value Optical Fall Time t f 150 ps 20% to 80% valueElectricalDifferential Input Voltage V IH - V IL 0.65 2.0 Vp-p Transmit Fault LoadTX-FAULT LOAD 4.7 10 k Ω 3Transmit Fault Output-Low V TX-FAULT -L 0.0 0.5 V Transmit Fault Output-High V TX-FAULT-H Vcc – 0.5Vcc + 0.3 V TX-Disable Input - Low V TX-DISABLE -L 0 0.8 V TX-Disable Input - High V TX-DISABLE-H2.0 Vcc + 0.3 V TX-Disable Assert Time t_off 10 µsTX-Disable Negate Timet-on 1 ms Time to initialize, includes reset of TX-FAULTt-int300 ms TX FAULT from fault to assertiont-fault 100 µsTX-Disable time to start resett-reset10µs1. Output power is power coupled into a 9/125 µm SM fiber.2. ITU-T G.694.2 CWDM wavelength from 1270 nm to 1610 nm, each step 20 nm.3. Pull-up resistor on host Vcc.Receiver Specifications(0o C < Topr < 70o C, 4.75 V < Vcc < 5.25V)Parameter Symbol Min Typ Max Units NotesOpticalSensitivity @2.125Gb/s @BER=10-12SENS --- --- -30 dBm 4 Maximum Input Power Pin -9 --- dBm 4Signal detect – Hysteresis 1.0 --- dBWavelength of Operation 1260 --- 1620 nmRX-LOS – Asserted Pa --- --- -30 dBm Transition: low to high RX-LOS – Deasserted Pd -40 --- --- dBm Transition: high to low ElectricalDifferential Output Voltage ±RX-DAT 0.37 2.0 Vp-pData Output Rise Time Tr RX-DAT0.35 nsData Output Fall Time Tf RX-DAT0.35 nsReceiver Loss of Light Load RX-LOS LOAD 4.7 10 kΩ 5Loss of Signal Output Voltage --- Low RX-LOS L0 0.5 VLoss of Signal Output Voltage --- High RX-LOS H 2.4 Vcc VLoss of Signal Assert Time (off to on) T A,RX-LOS100 µsLoss of Signal Deassert Time (on to off) T D,RX-LOS100 µs4.Minimum sensitivity and saturation levels at BER=1E-12 for a 27-1 PRBS.5.Pull-up resistor on host Vcc.*********************************************************************************************************************************************************************** OPTOWAY TECHNOLOGY INC. No.38, Kuang Fu S. Road, Hu Kou, Hsin Chu Industrial Park, Hsin Chu, Taiwan 303***********************************************************************************************************************************************************************OPTOWAY TECHNOLOGY INC. No .38, Kuang Fu S. Road, Hu Kou, Hsin Chu Industrial Park, Hsin Chu, Taiwan 303A sequence value of 1 indicates that the signal is in the first group to engage during plugging of a module. A sequence value of 2 indicates that the signal is the second and last group. The two guide pins on the connector are electrically connected to the transceiver circuit ground. These two guide pins make contact with circuit prior to sequence 1 signals.Module Definition Module DefinitionMOD-DEF(0) PIN 4MOD-DEF (1) PIN 5MOD-DEF (2) PIN 6Interpretation byHost4TTL LowSCLSDASerial module definitionprotocolModule Definition 4 specifies a serial definition protocol. For this definition, upon power up, MOD-DEF(1:2) appear as no connector (NC) and MOD-DEF(0) is TTL LOW. When the host system detects this condition, it activates the serial protocol. The protocol uses the 2-wire serial CMOS E 2PROM protocol of the ATMEL AT24C01A/02/04 family of components.*********************************************************************************************************************************************************************** OPTOWAY TECHNOLOGY INC. No.38, Kuang Fu S. Road, Hu Kou, Hsin Chu Industrial Park, Hsin Chu, Taiwan 303。
NSi812x高可靠双通道数字隔离器数据手册说明书
C O NF ID EN T IA LNSi8120/NSi8121/NSi8122: High ReliabilityDual-Channel Digital IsolatorsDatasheet (EN) 1.8Product OverviewThe NSi812x devices are high reliability dual-channel digital isolator. The NSi812x device is safety certified by UL1577 support several insulation withstand voltages (3.75kV rms , 5kV rms ), while providing high electromagnetic immunity and low emissions at low power consumption. The data rate of the NSi812x is up to 150Mbps, and the common-mode transient immunity (CMTI) is up to 150kV/us. The NSi812x device provides digital channel direction configuration and the default output level configuration when the input power is lost. Wide supply voltage of the NSi812x device support to connect with most digital interface directly, easy to do the level shift. High system level EMC performance enhance reliability and stability of use. AEC-Q100 (Grade 1) option is provided for all devices.Key Features• Up to 5000V rms Insulation voltage• Date rate: DC to 150Mbps• Power supply voltage: 2.5V to 5.5V • All devices are AEC-Q100 qualified • High CMTI: 150kV/us • Chip level ESD: HBM: ±6kV• High system level EMC performance:Enhanced system level ESD, EFT, Surge immunity• Default output high level or low level option • Isolation barrier life: >60 years• Low power consumption: 1.5mA/ch (1 Mbps) • Low propagation delay: <15ns • Operation temperature: -40℃~125℃ • RoHS-compliant packages:SOIC-8 narrow body SOIC-16 wide bodySafety Regulatory Approvals• UL recognition: up to 5000V rms for 1 minute per UL1577• CQC certification per GB4943.1-2011• CSA component notice 5A • DIN VDE V 0884-11:2017-01Applications• Industrial automation system • Isolated SPI, RS232, RS485• General-purpose multichannel isolation • Motor controlFunctional Block DiagramsC O NF ID EN T IA LIndex1.0 ABSOLUTE MAXIMUM RATINGS .............................................................................................................................. 3 2.0 SPECIFICATIONS ........................................................................................................................................................... 3 2.1. E LECTRICAL CHARACTERISTICS .................................................................................................................................................. 3 2.2. TYPICAL PERFORMANCE CHARACTERISTICS ........................................................................................................................... 7 2.3. P ARAMETER M EASUREMENT I NFORMATION . (8)3.0 HIGH VOLTAGE FEATURE DESCRIPTION (9)3.1. INSULATION AND SAFETY RELATED SPECIFICATIONS (9)3.2. DIN VDE V 0884-11（VDE V 0884-11）:2017-01 INSULATION CHARATERISTICS ....................................................................... 9 3.3. R EGULATORY INFORMATION ................................................................................................................................................... 11 4.0 FUNCTION DESCRIPTION ..........................................................................................................................................11 5.0 APPLICATION NOTE ................................................................................................................................................... 12 5.1. PCB L AYOUT ...................................................................................................................................................................... 12 5.2. H IGH SPEED PERFORMANCE ................................................................................................................................................... 12 5.3. T YPICAL S UPPLY C URRENT E QUATIONS ..................................................................................................................................... 13 6.0 PACKAGE INFORMATION ......................................................................................................................................... 13 7.0 TAPE AND REEL INFORMATION ............................................................................................................................. 17 8.0 ORDER INFORMATION .............................................................................................................................................. 20 9.0 REVISION HISTORY . (21)C O NF ID EN T IA L1.0 ABSOLUTE MAXIMUM RATINGSPower Supply Voltage VDD1, VDD2 -0.5 6.5 V Maximum Input Voltage VINA, VINB -0.4 VDD+0.41 V Maximum Output Voltage V OUTA , V OUTB -0.4 VDD+0.41 VMaximum Input/Output Pulse VoltageVINA, VINB, V OUTA , V OUTB-0.8VDD+0.8VPulse width should be less than 100ns, and the duty cycle should be less than 10%Common-Mode Transients CMTI ±150 kV/us Output currentIo -15 15mAMaximum Surge Isolation VoltageV IOSM5.3kVOperating Temperature Topr -40125 ℃Storage Temperature Tstg -40150℃Electrostatic dischargeHBM±6000VCDM±2000V1 The maximum voltage must not exceed 6.5V.2.0 SPECIFICATIONS2.1. ELECTRICAL CHARACTERISTICS(VDD1=2.5V~5.5V, VDD2=2.5V~5.5V, Ta=-40℃ to 125℃. Unless otherwise noted, Typical values are at VDD1 = 5V, VDD2 = 5V, Ta =25℃)Power on ResetVDD POR2.2 V POR threshold as during power-upVDD HYS 0.1 V POR threshold Hysteresis Input ThresholdV IT1.6 V Input Threshold at rising edge V IT_HYS 0.4 V Input Threshold Hysteresis High Level Input Voltage V IH 2 V Low Level Input Voltage V IL 0.8 V High Level Output Voltage V OH VDD-0.3 V I OH ≤ 4mA Low Level Output VoltageV OL0.3VI OL ≤ 4mAC O NF ID EN T IA LOutput Impedance R out 50 ohm Input Pull high or low CurrentI pull 8 15 uA Start Up Time after POR trbs 40 usec Common Mode Transient ImmunityCMTI±100±150kV/us(VDD1=5V± 10%, VDD2=5V± 10%, Ta=-40℃ to 125℃. Unless otherwise noted, Typical values are at VDD1 = 5V, VDD2 = 5V, Ta = 25℃)Supply currentNSi8120 I DD1(Q0) 0.58 0.87 mAAll Input 0V for NSi8120x0 Or All Input at supply for NSi8120x1 I DD2(Q0) 1.18 1.77 mA I DD1(Q1) 2.92 4.38 mA All Input at supply for NSi8120x0 Or All Input 0V for NSi8120x1I DD2(Q1) 1.241.86mAI DD1(1M) 1.71 2.56 mA All Input with 1Mbps, C L =15pFI DD2(1M)1.382.07mAI DD1(10M) 1.78 2.67 mA All Input with 10Mbps, C L =15pF I DD2(10M)3.24.8mA I DD1(100M)2.103.15 mA All Input with 100Mbps, C L =15pFI DD2(100M)21.031.5mANSi8121/ NSi8122 I DD1(Q0) 1.031.55 mA All Input 0V for NSi812xx0 Or All Input at supply for NSi812xx1 I DD2(Q0) 1.00 1.5 mA I DD1(Q1)2.203.3 mA All Input at supply for NSi812xx0Or All Input 0V for NSi812xx1 I DD2(Q1)2.133.2 mA I DD1(1M) 1.72 2.58 mA All Input with 1Mbps, C L =15pFI DD2(1M) 1.68 2.52 mA I DD1(10M) 2.62 3.93 mA All Input with 10Mbps, C L =15pFI DD2(10M) 2.71 4.06 mA I DD1(100M) 11.01 16.5 mA All Input with 100Mbps, C L = 15pF I DD2(100M)12.8 19.2 mA Data RateDR 0 150 MbpsC O NF ID EN T IA LPropagation Delayt PLH 5 8.20 15 ns See Figure 2.7 , C L = 15pF t PHL 5 10.56 15 ns See Figure 2.7, C L = 15pF Pulse Width Distortion |t PHL – t PLH | PWD5.0nsSee Figure 2.7 , C L = 15pFRising Time t r 5.0 ns See Figure 2.7 , C L = 15pF Falling Timet f 5.0 ns See Figure 2.7 , C L = 15pFPeak Eye Diagram Jitter t JIT (PK) 350 ps Channel-to-Channel Delay Skewt SK (c2c) 2.5 nsPart-to-Part Delay Skewt SK (p2p)5.0ns(VDD1=3.3V± 10%, VDD2=3.3V± 10%, Ta=-40℃ to 125℃. Unless otherwise noted, Typical values are at VDD1 = 3.3V, VDD2 = 3.3V, Ta =25℃)Supply currentNSi8120 I DD1(Q0) 0.550.83mA All Input 0V for NSi8120x0 Or All Input at supply for NSi8120x1 I DD2(Q0) 1.12 1.68 mA I DD1(Q1) 2.87 4.3 mA All Input at supply for NSi8120x0 Or All Input 0V for NSi8120x1 I DD2(Q1)1.18 1.77mA I DD1(1M)1.72.55mA All Input with 1Mbps, C L = 15pFI DD2(1M)1.271.91 mA I DD1(10M) 1.732.6 mA All Input with 10Mbps, C L = 15pF I DD2(10M)2.413.6 mA I DD1(100M) 2.05 3.08 mA All Input with 100Mbps, C L = 15pF I DD2(100M)14.0521.08mANSi8121/ NSi8122 I DD1(Q0) 0.98 1.47 mA All Input 0V for NSi812xx0 Or All Input at supply for NSi812xx1 I DD2(Q0) 0.95 1.43 mA I DD1(Q1) 2.14 3.21 mA All Input at supply for NSi812xx0 Or All Input 0V for NSi812xx1 I DD2(Q1) 2.08 3.12 mA I DD1(1M) 1.63 2.45 mA All Input with 1Mbps, C L = 15pFI DD2(1M) 1.59 2.39 mA I (10M)2.223.33mAAll Input with 10Mbps,C O NF I D EN T IA LI DD2(10M) 2.25 3.38 mA C L = 15pFI DD1(100M) 7.57 11.36 mA All Input with 100Mbps, C L = 15pF I DD2(100M)8.5 12.75 mA Data RateDR 0 150 Mbps Minimum Pulse Width PW 5.0 nsPropagation Delayt PLH 5 9.20 15 ns See Figure 2.7 , C L = 15pF t PHL5 10.40 15 ns See Figure 2.7, C L = 15pF Pulse Width Distortion |t PHL – t PLH | PWD5.0nsSee Figure 2.7 , C L = 15pFRising Time t r 5.0 ns See Figure 2.7 , C L = 15pF Falling Timet f5.0 nsSee Figure 2.7 , C L = 15pFPeak Eye Diagram Jitter t JIT (PK) 350psChannel-to-Channel Delay Skewt SK (c2c)2.5nsPart-to-Part Delay Skew t SK (p2p)5.0ns(VDD1=2.5V± 10%, VDD2=2.5V± 10%, Ta=-40℃ to 125℃. Unless otherwise noted, Typical values are at VDD1 = 2.5V, VDD2 = 2.5V, Ta =25℃)Supply currentNSi8120I DD1(Q0) 0.53 0.8 mA All Input 0V for NSi8120x0 Or All Input at supply for NSi8120x1 I DD2(Q0) 1.11.65 mA I DD1(Q1)2.85 4.28 mA All Input at supply for NSi8120x0 Or All Input 0V for NSi8120x1 I DD2(Q1)1.15 1.73 mA I DD1(1M) 1.632.45 mA All Input with 1Mbps, C L = 15pFI DD2(1M) 1.21 1.82 mA I DD1(10M) 1.68 2.52 mA All Input with 10Mbps, C L = 15pFI DD2(10M) 2.05 3.08 mA I DD1(100M) 1.95 2.93 mA All Input with 100Mbps, C L = 15pFI DD2(100M)10.415.6mANSi8121/ NSi8122I DD1(Q0) 0.96 1.44 mA All Input 0V for NSi812xx0 Or All Input at supply for NSi812xx1I (Q0)0.931.395mAF ID EN T IA LI DD1(Q1) 2.11 3.165 mA All Input at supply for NSi812xx0Or All Input 0V for NSi812xx1 I DD2(Q1) 2.05 3.075 mA I DD1(1M) 1.58 2.37 mA All Input with 1Mbps, C L = 15pFI DD2(1M) 1.54 2.31 mA I DD1(10M) 2.02 3.03 mA All Input with 10Mbps, C L = 15pFI DD2(10M) 2.04 3.06 mA I DD1(100M) 6.03 9.045 mA All Input with 100Mbps, C L = 15pF I DD2(100M)6 9 mAData RateDR 0 150 Mbps Minimum Pulse Width PW 5.0 nsPropagation Delayt PLH 5 10 15 nsSee Figure 2.7 , C L = 15pF t PHL5 10 15nsSee Figure 2.7, C L = 15pFPulse Width Distortion |t PHL – t PLH | PWD5.0nsSee Figure 2.7 , C L = 15pFRising Time t r5.0ns See Figure 2.7 , C L = 15pF Falling Timet f5.0 ns See Figure 2.7 , C L = 15pFPeak Eye Diagram Jitter t JIT (PK)350ps Channel-to-Channel Delay Skewt SK (c2c)2.5ns Part-to-Part Delay Skew t SK (p2p)5.0ns2.2. TYPICAL PERFORMANCE CHARACTERISTICSFigure 2.1 NSi8120 VDD1 Supply Current vs Data Rate Figure 2.2 NSi8120 VDD2 Supply Current vs Data RateC OE2.3. PARAMETER MEASUREMENT INFORMATIONC LFigure 2.7 Switching Characteristics Test Circuit and WaveformFigure 2.8 Common-Mode Transient Immunity Test CircuitC O NF ID EN T IA L3.0 HIGH VOLTAGE FEATURE DESCRIPTION3.1. INSULATION AND SAFETY RELATED SPECIFICATIONSMinimum External Air Gap (Clearance)L(I01) 4.0 8.0 mm Shortest terminal-to-terminal distance through air Minimum External Tracking (Creepage)L(I02)4.08.0mmShortest terminal-to-terminal distance across the package surfaceMinimum internal gap DTI 20 um Distance through insulationTrackingResistance(Comparative Tracking Index) CTI>400VDIN EN 60112 (VDE 0303-11); IEC 60112Material GroupⅡ3.2. DIN VDE V 0884-11（VDE V 0884-11）:2017-01 INSULATION CHARATERISTICSSOIC-8 SOIC-16 Installation Classification per DIN VDE 0110For Rated Mains Voltage ≤ 150V rms Ⅰto Ⅳ Ⅰto Ⅳ For Rated Mains Voltage ≤ 300V rms Ⅰto Ⅲ Ⅰto Ⅳ For Rated Mains Voltage ≤ 400V rms Ⅰto Ⅲ Ⅰto Ⅳ Climatic Classification10/105/2110/105/21 Pollution Degree per DIN VDE 0110, Table 122Maximum repetitive isolation voltageVIORM 565 849 Vpeak Input to Output Test Voltage, Method B1V IORM × 1.5 = V pd (m) , 100%production test, t ini = t m = 1 sec, partial discharge < 5 pCV pd (m)8471273VpeakInput to Output Test Voltage, Method AAfter Environmental Tests Subgroup 1V IORM × 1.2= V pd (m) , t ini = 60 sec, t m = 10 sec, partial V pd (m)6781018VpeakC O N T IA LAfter Input and /or Safety Test Subgroup 2 and Subgroup 3 V IORM × 1.2= V pd (m) , t ini = 60 sec, t m = 10 sec, partialdischarge < 5 pC V pd (m)6781018VpeakMaximum transient isolation voltage t = 60 sec VIOTM 5300 7000 Vpeak Maximum Surge Isolation VoltageTest method per IEC60065,1.2/50uswaveform, VTEST=VIOSM×1.3VIOSM53845384VpeakIsolation resistance VIO =500V RIO >109 >109 Ω Isolation capacitance f = 1MHzCIO 0.6 0.6pFInput capacitanceCI22pF Total Power Dissipation at 25℃Ps1499 mW Safety input, output, or supply currentθJA = 140 °C/W, V I = 5.5 V, T J = 150 °C, T A = 25 °C Is160mAθJA = 84 °C/W, V I = 5.5 V, T J = 150 °C, T A = 25 °C237 mA Case TemperatureTs150150℃Figure 3.2 NSi8120W/NSi8121W/NSi8122W Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN VDE V 0884-11C O NF ID EN T IA L3.3. REGULATORY INFORMATIONThe NSi8120N/NSi8121N/NSi8122N are approved by the organizations listed in table.UL 1577 Component Recognition Program 1Approved under CSA ComponentAcceptance Notice 5ADIN VDE V 0884-11:2017-012Certified by CQC11-471543-2012 GB4943.1-2011Single Protection, 3750V rms Isolation voltageSingle Protection, 3750V rms IsolationvoltageBasic Insulation 565Vpeak, V IOSM =5384VpeakBasic insulation at 400V rms (565Vpeak)File (E500602)File (E500602)File (5024579-4880-0001)File (pending)1 In accordance with UL 1577, each NSi8120N/NSi8121N/NSi8122N is proof tested by applying an insulation test voltage ≥ 4500 Vrms for 1 sec.2 In accordance with DIN VDE V 0884-11, each NSi8120N/NSi8121N/NSi8122N is proof tested by applying an insulation test voltage ≥ 847 V peak for 1 sec(partial discharge detection limit = 5 pC). The * marking branded on the component designates DIN VDE V 0884-11 approval.The NSi8120W/NSi8121W/NSi8122W are approved by the organizations listed in table.UL 1577 Component Recognition Program 1Approved under CSAComponent Acceptance Notice5ADIN VDE V 0884-11(VDE V 0884-11):2017-012 Certified by CQC11-471543-2012 GB4943.1-2011Single Protection, 5000V rms Isolation voltageSingle Protection, 5000V rmsIsolation voltageBasic Insulation 849Vpeak, V IOSM =5384Vpeak Basic insulation at 800V rms (1131Vpeak) Reinforced insulation at 400V rms (565Vpeak)File (E500602)File (E500602)File (5024579-4880-0001)File (pending)1 In accordance with UL 1577, each NSi8120W/NSi8121W/NSi8122W is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 sec.2 In accordance with DIN VDE V 0884-11, each NSi8120W/NSi8121W/NSi8122W is proof tested by applying an insulation test voltage ≥ 1273 V peak for 1 sec(partial discharge detection limit = 5 pC). The * marking branded on the component designates DIN VDE V 0884-11 approval.4.0 FUNCTION DESCRIPTIONThe NSi812x is a Dual-channel digital isolator based on a capacitive isolation barrier technique. The digital signal is modulated with RF carrier generated by the internal oscillator at the Transmitter side. Then it is transferred through the capacitive isolation barrier and demodulated at the Receiver side.The NSi812x devices are high reliability dual-channel digital isolator with AEC-Q100 qualified. The NSi812x device is safety certified by UL1577 support several insulation withstand voltages (3.75kV rms , 5kV rms ), while providing high electromagnetic immunity and low emissions at low power consumption. The data rate of the NSi812x is up to 150Mbps, and the common-mode transient immunity (CMTI) is up to 150kV/us. The NSi812x device provides digital channel direction configuration and the default output level configuration when the input power is lost. Wide supply voltage of the NSi812x device support to connect with most digital interface directly, easy to do the level shift. High system level EMC performance enhance reliability and stability of use.The NSi812x has a default output status when VDDIN is unready and VDDOUT is ready as shown in Table 4.1, which helps for diagnosis when power is missing at the transmitter side. The output B follows the same status with the input A within 1us after powering up.C O NF ID EN T IA LCopyright © 2019, NOVOSENSEPage 12 Table 4.1 Output status vs. power statusH Ready Ready H Normal operation.L Ready Ready L XUnreadyReadyL HThe output follows the same status with the input within 60us after input side VDD1 is powered on.X Ready Unready XThe output follows the same status with the input within 60us after output side VDD2 is powered on.5.0 APPLICATION NOTE5.1. PCB LAYOUTThe NSi812x requires a 0.1 µF bypass capacitor between VDD1 and GND1, VDD2 and GND2. The capacitor should beplaced as close as possible to the package. Figure 5.1 to Figure 5.4 show the recommended PCB layout, make sure the space under the chip should keep free from planes, traces, pads and via. To enhance the robustness of a design, the user may also include resistors (50–300 Ω ) in series with the inputs and outputs if the system is excessively noisy. The series resistors also improve the system reliability such as latch-up immunity.The typical output impedance of an isolator driver channel is approximately 50 Ω, ±40%. When driving loads where transmission line effects will be a factor, output pins should be appropriately terminated with controlled impedance PCB traces.Figure5.1 Recommended PCB Layout — Top Layer Figure5.2 Recommended PCB Layout — Bottom LayerFigure5.3 Recommended PCB Layout — Top Layer Figure5.4 Recommended PCB Layout — Bottom Layer5.2. HIGH SPEED PERFORMANCEFigure 5.5 shows the eye diagram of NSi812x at 200Mbps data rate output. The result shows a typical measurement on the NSi812x with 350ps p-p jitter.C O NF ID EN T IA LFigure5.5 NSi812x Eye Diagram5.3. TYPICAL SUPPLY CURRENT EQUATIONSThe typical supply current of NSi812x can be calculated using below equations. I DD1 and I DD2 are typical supply currents measured in mA, f is data rate measured in Mbps, C L is the capacitive load measured in pFNSi8120:I DD1 = 0.19 *a1+1.45*b1+0.82*c1. I DD2 = 1.36+ VDD1*f* C L *c1*10-9When a1 is the channel number of low input at side 1, b1 is the channel number of high input at side 1, c1 is the channel number of switch signal input at side 1.NSi8121/ NSi8122:I DD1 = 0.87 +1.26*b1+0.63*c1+ VDD1*f* C L *c2*10-9I DD2 = 0.87 +1.26*b2+0.63*c2+ VDD1*f* C L *c1*10-9When b1 is the channel number of high input at side 1, c1 is the channel number of switch signal input at side 1, b2 is the channel number of high input at side 2, c2 is the channel number of switch signal input at side 2.6.0 PACKAGE INFORMATIONVDD GND 22VDD INA GND 2VDD 2Figure 6.1 NSi8120N Package Figure 6.2 NSi8121N PackageC O NF ID EN T IA LVDD INBGND 22Figure 6.3 NSi8122N PackageFigure 6.4 SOIC8 Package Shape and Dimension in millimeters (inches)Table6.1 NSi8120N/ NSi8121N/ NSi8122N Pin Configuration and DescriptionNSi8121N PIN NO.NSi8122N PIN NO.SYMBOL FUNCTION1 1 1 VDD1 Power Supply for Isolator Side 12 7 2 INA Logic Input A3 3 6 INB Logic Input B4 4 4 GND1 Ground 1, the ground reference for Isolator Side 15 5 5 GND2 Ground 2, the ground reference for Isolator Side 26 6 3 OUTB Logic Output B7 2 7 OUTA Logic Output A888VDD2Power Supply for Isolator Side 2C O NFVDD GND GND 2VDD 2GND 2GND NC NCNC VDD GND GND 2VDD 22GND NC NC NCFigure 6.5 NSi8120W Package Figure 6.6 NSi8121W PackageVDD INB GND GND 2VDD 2GND 2GND NC NC NCFigure 6.7 NSi8122W PackageFigure 6.8 WB SOIC16 Package Shape and Dimension in millimeters and (inches)C O NF ID EN T IA LTable 6.2 NSi8120W/ NSi8121W/ NSi8122W Pin Configuration and Description1 1 1 GND1 Ground 1, the ground reference for Isolator Side 12 2 2 NC No Connection.3 3 3 VDD1 Power Supply for Isolator Side 14 13 4 INA Logic Input A5 5 12 INB Logic Input B6 6 6 NC No Connection.7 7 7 GND1 Ground 1, the ground reference for Isolator Side 18 8 8 NC No Connection. 9 9 9 GND2 Ground 2, the ground reference for Isolator Side 210 10 10 NC No Connection. 11 11 11 NC No Connection. 12 12 5OUTB Logic Output A 13 4 13OUTALogic Output B 14 14 14 VDD2 Power Supply for Isolator Side 215 15 15 NC No Connection.161616GND2Ground 2, the ground reference for Isolator Side 27.0TAPE AND REEL INFORMATIONLAITNEDIFNOCC O NF ID EN T IA LFigure 7.1 Tape and Reel Information of SOIC8LAITNEDIFNOCFigure 7.2 Tape and Reel Information of WB SOIC16NF ID EN T IA L8.0 ORDER INFORMATIONNSi8120N0 3.75 2 0 150 Low -40 to 125℃ NO SOIC8 NSi8120N1 3.75 2 0 150 High -40 to 125℃ NO SOIC8 NSi8121N0 3.75 1 1 150 Low -40 to 125℃ NO SOIC8 NSi8121N1 3.75 1 1 150 High -40 to 125℃ NO SOIC8 NSi8122N0 3.75 1 1 150 Low -40 to 125℃ NO SOIC8 NSi8122N1 3.75 1 1 150 High -40 to 125℃ NO SOIC8 NSi8120W0 5 2 0 150 Low -40 to 125℃ NO WB SOIC16 NSi8120W1 5 2 0 150 High -40 to 125℃ NO WB SOIC16 NSi8121W0 5 1 1 150 Low -40 to 125℃ NO WB SOIC16 NSi8121W1 5 1 1 150 High -40 to 125℃ NO WB SOIC16 NSi8122W0 5 1 1 150 Low -40 to 125℃ NO WB SOIC16 NSi8122W1 5 1 1 150 High -40 to 125℃ NO WB SOIC16 NSi8120N0Q 3.75 2 0 150 Low -40 to 125℃ YES SOIC8 NSi8120N1Q 3.75 2 0 150 High -40 to 125℃ YES SOIC8 NSi8121N0Q 3.75 1 1 150 Low -40 to 125℃ YES SOIC8 NSi8121N1Q 3.75 1 1 150 High -40 to 125℃ YES SOIC8 NSi8122N0Q 3.75 1 1 150 Low -40 to 125℃ YES SOIC8 NSi8122N1Q 3.75 1 1 150 High -40 to 125℃ YES SOIC8 NSi8120W0Q 5 2 0 150 Low -40 to 125℃ YES WB SOIC16 NSi8120W1Q 5 2 0 150 High -40 to 125℃ YES WB SOIC16 NSi8121W0Q 5 1 1 150 Low -40 to 125℃ YES WB SOIC16 NSi8121W1Q 5 1 1 150 High -40 to 125℃ YES WB SOIC16 NSi8122W0Q 5 1 1 150 Low -40 to 125℃ YES WB SOIC16 NSi8122W1Q 5 1 1 150 High -40 to 125℃YES WB SOIC16 NOTE: All packages are RoHS-compliant with peak reflow temperatures of 260 °C according to the JEDEC industry standard classifications and peak solder temperatures. All devices are AEC-Q100 qualified.Part Number Rule:NSi(81)(2)(1)(N)(1)(Q)C O NF ID EN T IA LNSi8120/NSi8121/NSi81229.0 REVISION HISTORY1.0 Original2017/11/15 1.1 Change to Ordering information2018/3/26 1.2 Add maximum operation current specification. 2018/6/20 1.3 Change block diagram 2018/7/28 1.4 Correct Table 6.2 Pin No.2018/8/20 1.5 Add specification “Input Pull high or low Current” 2018/9/10 1.6 Add “Maximum Input/Output Pulse Voltage” 2018/10/91.7 Change to Ordering information 2018/12/20 1.8 Change Certification Information2019/06/17。
SLB_C
0°C 到+70°C(32°F 到 158°F) - 25°C 到+70°C(-13°F 到 158°F) - 25°C 到+70C(-13°F 到 158°F)
♦ 只有在必要时才接触电子板。 ♦ 在接触电子板之前，先将身体所带的静电释放。 ♦ 电子板不要接触绝缘体，如塑料、绝缘桌面及由人造纤维制成的布料或衣物等。 ♦ 电子板放于良导体表面上。 ♦ 电子板或元件只允许储存、装运在导电的包装盒内(如导电的塑料盒或金属容器
等)。
♦ 如果包装材料不导电，电子板必须包上一层导电材料，如导电的泡沫橡胶或铝箔 等。
地运行。
0-2
6SE7085-0NX84-0FJ0 Siemens Electrical Drives Ltd.
使用说明书 SIMOVERT MASTERDRIVES
SLB-SIMOLINK 板
定义和警告
! 当心
小心静电放电(ESD)击穿元件
电路板中包含有静电敏感元件，如处理不当，这些元件极易损坏。当您接触电子板时， 应注意以下事项：
5
显 示 ......................................................................................................................................... 5-1
6
启 动 ......................................................................................................................................... 6-1
Emaux SSC Mini盐水氯化器快速用户指南说明书
Clorador salinoSSC MiniGuía rápida de usuarioApreciado cliente:Gracias por elegir este sistema de cloración salina SSC Mini.En la siguiente página, al pulsar sobre cada sección encontrará la información principal sobre este equipo.Permítanos invitarle a conocer con más detalle toda nuestra gama de productos.Si pulsa en el logo Emaux más abajo, un enlace URL le llevará a nuestra página web.Esperamos que le guste!Índice1.Advertencias de seguridad2.Características principales3.Esquema de instalación4.Guía de montaje5.Operación del equipo6.Mantenimiento7.Diagnóstico de averías1.Advertencias de seguridadAntes de instalar este producto, lea y siga las siguientes notas e instrucciones:•Toda la instalación, procedimientos de operación y mantenimiento debe ser realizado por un profesional cualificado, o bien por una persona que ha sido instruida adecuadamente.•Desconecte siempre la unidad de control cuando realice cualquier labor sobre el equipo.•Asegúrese cablear el equipo de tal modo que el clorador de sal funcione cuando la bomba de filtración esté funcionando.•Después del mantenimiento periódico, verifique que el sistema no tiene fugas.•Si los componentes eléctricos del aparato se mojan, desenchúfelo inmediatamente.•El aumento de la cantidad de sal en la piscina de agua aumenta la probabilidad de sufrir corrosión u otros procesos de deterioro dentro del equipo de su piscina.•Puede generarse cloro gas si el clorador se activa cuando la bomba de filtración no funciona correctamente.•Para la limpieza química, use el equipo de seguridad adecuado y consulte las instrucciones del producto químico sobre cómo manejar y desechar dichos productos.2.Características principales Datos técnicos del equipoModeloSSC Mini 230V, 50 –60Hz Caudal máximo25 m 3/h Producción máx.20 g/h Presión máxima 2.5 barEntrada/Salida 50 mm 1 ½’’ BSP 60 mm 2’’ BSPSalinidad3000 ppm Temperatura10 to 45 ºC Vol. piscina máx.90 m 3Balance químico recomendado AlimentaciónLeyenda1 Bomba de filtraci6n2 Filtro3 Bomba de calor*4 V. antiretorno5 Sonda de pH*Opcional...2l6 Bomba dosificadora7 Tanque de pH -8 lnyección pH -9 Unidad de control SSCMini10 Celcula electrolitica SSCMini11 By-pass de celula...1t693 741 5// 8lA p iscina3.Esquema de instalaciónA d esagüe De p iscinaIr a Índice Ir a guía de instalaciónPara una instalación correcta, siga lasrecomendaciones que se enumeran a continuación:4.Guía de instalaciónUnidad de control•Elija un área bien ventilada, respetando siempre la longitud del cable de la celda, así como las características principales del equipo SSC Mini.•La unidad de control debe mantenerse alejada de la luz solar, de cualquier fuente de calor o de cualquier almacenamiento de productos químicos.•Fije la unidad de control verticalmente a 1,5metros sobre el nivel del suelo y al menos 3metros de la piscina.•Conecte la bomba de manera que la unidad de control funcione siempre y cuando el sistema SSC lo haga, como se comenta en 1. Advertencias de seguridad .•Vigile con la parte posterior del equipo: puede alcanzar temperaturas elevadas.•Si está instalando este sistema en una piscina de yeso, espere al menos 1 mes después de haber construido la piscina para poner en marcha la unidad. De esta manera el yeso podrá curar adecuadamente.•Se recomienda instalar un ánodo de sacrificio y unirlo, así como los otros componentes metálicos de la piscina, a la tierra principal, para así evitar corrosión galvánica.Célula electrolítica•La célula debe colocarse horizontalmente, cerca del retorno de la piscina.•Para optimizar la eficacia del cloro, la celda debe ser canalizada como se muestra en el 3.Esquema de instalación.•Debe instalarse respetando el sentido de flujo de en la carcasa de la celda.•Se recomienda un by-pass en la celdaelectrolítica.•Si hay un sistema de calefacción o UV, es muy recomendable instalar una válvula de retención después de estos componentes.•Antes de conectar o manipular los conectoreseléctricos de la celda, asegúrese de que la fuente de alimentación no esté conectada.•Conecte el cable de acuerdo con la númeración que aparecen en los conectores, como se ve en las imagen inferior.•Antes de probar el sistema hidráulico, espere 24 horas después de haber pegado la tubería para asegurar el secado de la cola.Conexión de la célula a5.Operación del equipoPara lograr la instalación correcta, siga las recomendaciones que se detallan a continuación:•Añada la sal antes de encender el sistema. Elclorador SSC Mini debe estar apagado. Esperehasta que la sal se disuelva haciendo funcionar la bomba y colocando la válvula de 6 vías en modo de recirculación.•Agregue la sal en distintas veces y lugares parafacilitar su disolución.•Los principales parámetros químicos debenmantenerse en torno a los siguientes valoresmostrados en la sección 2.Característicasprincipales•No mantener es e balance químic o puede:•Dañar y reducir la vida útil de la célula.•Inactivar la eficacia del cloro.•Deteriorar los componentes de la piscina.•El balance de agua y un buen ambiente deoperación deben estar asegurados para garantizar una piscina segura.•En caso de calor extremo o muchos bañistas,aumente la potencia de salida del sistema SSC oagregar cloro sólido / líquido.Panel de controlLEDs1.Baja vida de célula:deterioro de la célula.2.Sin flujo:no hay agua en la célula.3.Alarma general: Ver 7.Solución de problemas4.Modo stand-by: La unidad no produce acorde con el horario establecido.5.Operación normal: La unidad estáproduciendo acorde con el horario establecido de filtración.6.Supercloración: La unidad estáproduciendo durante24 horas sin interrupción.9.Potencia: Cada LED representsa6 min de producción. Ejemplo: 3 LEDs equivale a 18 min, 4 LEDs equivale a 24 min, etc.Botones7.Supercloración:produce cloro24 horas seguidas.8.Control de potencia: Alarga(+) o acorta(-) el tiempo de producción.6.Mantenimiento•En función de la dureza del agua, la célula debe ser revisada periódicamente para evitar un aumento de incrustación.•Como se dijo en 5. Operación del equipo, es obligatorio mantener el balance químico en el rango especificado. De no hacerlo, la garantía de la célula podría quedar anulada.•Para limpiar la celda, proceda de la siguiente manera:1.Desconecta la unidad de control.2.Retire la célula de su carcasa después dehaber drenado la tubería donde está.3.Enjuague con agua fresca la célula paraeliminar cualquier residuo u otra partícula.4.Siguiendo las instrucciones de seguridadmencionadas en 1. Advertencias deseguridad, mezcle 1 parte de ácidomuriático con 4 de agua dulce en un balde.Siempre agregue ácido al agua,nunca alrevés.5.Introduzca la célula en esta solución. Repitadespués de haber enjuagado con aguafresca. No frote con un cepillo de metal.6.Luego, enjuague la celda con agua frescay vuelva a ensamblarla.7.Antes de volver a encender el equipo, dejeque la célula se llene de agua.•Una dureza del agua muy alta puede causar incrustación excesiva. Para evitarlo, drene un poco de agua y vuelva a llenar con agua descalcificada.•Al lavar y vaciar el filtro, desconecte la unidad de control para no producir cloro sin que pueda ser evacuado del sistemaPROBLEMA POSIBLE CAUSA POSIBLE SOLUCIÓNBaja producción de cloroUnidad de controlno conectadaRevise la alimentacióneléctrica y el cablehacia la célulaInsuficienteproducción de cloroIncremente las horasde funcionamientoFusible fundido Desconécte el equipoy cambie el fusible pH alto Ajústelo entre 7.0 y 7.6Incrustamiento encélulaLea la sección6.Mantenimiento Falta de agua en lacélulaRevise la instalaciónhidráulicaBajo nivel de salAñada sal acorde lasección5.Operacióndel equipo Alto nivel deestabilizanteDrene el agua y rellenecon agua fresca Baja temperatura deaguaEncienda elcalentador7.Solución de problemasPROBLEMA POSSIBLE CAUSA POSSIBLE SOLUCIÓNFalta de caudal Válvulas cerradas Revise la posición delas válvulasLa bomba notrabajacorrectamenteRevise elfuncionamiento de labombaFiltro sucio Limpie el filtroAire en el sistema Revise entradas deaire y nivel de aguaIncorrecto voltaje deentrada Bajo nivel de sal y/o incrustación en célula Error en cable/célula Indicadores de displayAlto nivel de sal Temperatura del agua fuera de rango Revise los parámetros eléctricos de alimentación Compruebe el estado del cable o célula Revise el nivel de sal y/o el estado de la célula Desagüe un poco la piscina y añada agua fresca Ajuste la temperatura acorde los rangos de 2.Características principales POSIBLE SOLUCIÓN SIGNIFICADO。
Rugby 200 SC产品说明书
FMC LATINOAMERICA S.A. SUCURSAL Av. República de Panamá 3531, Of. 1203. San Isidro, Lima – PerúNombre: Rugby® 200 SC TELÉFONOS DE EMERGENCIA: CICOTOX 0800-13040 3287700 Junio – 2018 ESSALUD 4118000 (opción 4) Página 1 de 2FICHA TÉCNICA RUGBY® 200 CS PLAGUICIDA QUÍMICO DE USO AGRÍCOLANEMATICIDA AGRÍCOLA CAPSULAS EN SUSPENSIÓN (CS) Reg. PQUA Nro. 911 SENASATitular del Registro: FMC LATINOAMÉRICA S.A. SUCURSALCOMPOSICIÓN: Cadusafos............................................................................................................................................................ 200 g/L Aditivos....................................................................................................................................................... c.s.p . 1 LRugby® 200 CS es un nematicida no sistémico que actúa por contacto e ingestión. Pertenece al grupo de los fosforados, y como tal inhibe la enzima colinesterasa, sobreexcitando el sistema nervioso del nematodo y finalmente causándole la muerte. Rugby® 200 CS se prepara diluyendo la dosis indicada en un recipiente con agua, mezclar y luego, completar con agua hasta el volumen requerido. Aplicar con inyector o Venturi al sistema de riego, en caso no disponer sistema de riego, usar equipo de aplicación dirigido al cuello de planta (drench).Rugby® 200 CS , SOLO DEBE APLICARSE AL SUELO, NUNCA AL FOLLAJE. El suelo debe estar en capacidad de campo. NUNCA APLIQUE EN SUELOS SECOS. “CONSULTE CON UN INGENIERO AGRÓNOMO”P.C. P eríodo de carencia en días. L.M.R.: Límite máximo de residuos en ppm (partes por millón). N.A.: No aplica- Máximo 1 aplicación por Campaña. Considerando 1 campaña al año. Dosis máxima 15 L/ha. - Aplicar a la presencia de la plaga, teniendo mayor cuidado en la etapa de desarrollo radicular. - De persistir la plaga, usar otro nematicida de diferente mecanismo de acción para evitar la resistencia -No aplicar en floración.CULTIVOS NOMBRE DE LA PLAGA DOSIS P.C. (días) LMR ppm Común Científico L/ha Vid Nematodo del nudo Meloidogyne incognita 10-15 70 0.01 Pimiento Nematodo del nudo Meloidogyne incognita 15 N.A. 0.01 Papa Nematodo quiste de la papa Globodera pallida 15 102 0.01Nombre: Rugby® 200 CS junio - 2018Página 2 de 2 En pimiento: Aplicar después del transplante.En papa: El campo a tratar debe estar manejado bajo rotación de cultivos. Se debe realizar una buena preparación del terreno. Se debe realizar el deshierbo manual. Para el monitoreo de la plaga debe realizarse muestreos y observacionesen el campo. La humedad del suelo debe estar en capacidad de campo. Posterior a la aplicación del producto, se debe distanciar el siguiente riego hasta donde sea agronómicamente posible.Llenar con agua el tanque de aplicación hasta Ia mitad, agregue Ia cantidad de MARSHAL® recomendado agitando bieny completar luego con más agua.•El producto no es fitotóxico al cultivo a la dosis dada, según las indicaciones dadas.•Rugby® 200 CS Puede aplicarse en mezcla con la mayoría de plaguicidas, excepto los de reacción alcalina, sin embargo se recomienda realizar mezclas preliminares para evaluar la compatibilidad física, química y biológica delos productos.•Grupo químico: Organofosforado.•En caso de ingestión, no provocar el vómito, ni dar agua a la persona si está inconsciente. Llévelo al médico.•En caso de contacto con los ojos, manténgalos abiertos y lávelos inmediatamente con agua limpia durante 15 min.Consultar al médico.•En caso de contacto con la piel, retirar la ropa y zapatos y lavar la piel con abundante agua y jabón.•En caso de inhalación, retirar al paciente a un lugar fresco y aplicar respiración artificial si fuera necesario. Consultar al médico.ANTÍDOTO: Emplear sulfato de atropina, de 1 a 2 mg cada 15 minutos (intravenosa o intramuscular) hasta síntomas de atropinización o hasta un máx. de 30 mg; también puede administrar 2 -PAM o toxigonin (Merck), en dosis de 1 a 2 g porvía intravenosa lentamente. Para menores de 12 años la dosis inicial es de 0.05 mg/Kg de peso, repitiendo de 0.02-0.05mg/kg de peso. Contraindicaciones: morfina, fenotiazinas y teofilina.EN CASO DE INTOXICACIÓN, LLAME AL MÉDICO INMEDIATAMENTEO LLEVE AL PACIENTE AL MÉDICO Y MUÉSTRELE LA ETIQUETADESPUÉS DE USAR EL CONTENIDO, ENJUAGUE TRES VECES ESTE ENVASE Y VIERTALA SOLUCIÓN EN LA MEZCLA DE APLICACIÓN Y LUEGO INUTILÍCELO, TRITURÁNDOLO OPERFORÁNDOLO Y DEPOSÍTELO EN EL LUGAR DESTINADO POR LAS AUTORIDADESLOCALES PARA ESTE FIN.REALIZAR OBLIGATORIAMENTE EL TRIPLE LAVADO DEL PRESENTE ENVASE.DEVUELVA EL ENVASE TRIPLE LAVADO AL CENTRO DE ACOPIO AUTORIZADO.Frasco de 1 LPresentaciones:。
CY7C67300-100AI资料
CY7C67300 EZ-Host™ Programmable EmbeddedUSB Host/Peripheral ControllerTABLE OF CONTENTS1.0 INTRODUCTION (10)1.1 EZ-Host Features (10)2.0 TYPICAL APPLICATIONS (11)3.0 FUNCTIONAL OVERVIEW (11)3.1 Processor Core (11)3.1.1 Processor (11)3.1.2 Clocking (11)3.1.3 Memory (11)3.1.4 Interrupts (11)3.1.5 General Timers and Watchdog Timer (11)3.1.6 Power Management (11)4.0 INTERFACE DESCRIPTIONS (11)4.1 USB Interface (13)4.1.1 USB Features (13)4.1.2 USB Pins. (14)4.2 OTG Interface (14)4.2.1 OTG Features (14)4.2.2 OTG Pins. (14)4.3 External Memory Interface (14)4.3.1 External Memory Interface Features (14)4.3.2 External Memory Access Strobes (14)4.3.3 Page Registers (15)4.3.4 Merge Mode (15)4.3.5 Program Memory Hole Description (15)4.3.6 DMA to External Memory Prohibited (15)4.3.7 External Memory Interface Pins (16)4.3.8 External Memory Interface Block Diagrams (17)4.4 General Purpose I/O Interface (GPIO) (18)4.4.1 GPIO Description (18)4.4.2 Unused Pin Descriptions (18)4.5 UART Interface (18)4.5.1 UART Features (18)4.5.2 UART Pins. (18)4.6 I2C EEPROM Interface (18)4.6.1 I2C EEPROM Features (18)4.6.2 I2C EEPROM Pins. (18)4.7 Serial Peripheral Interface (18)4.7.1 SPI Features (19)4.7.2 SPI Pins (19)4.8 High-speed Serial Interface (19)4.8.1 HSS Features (19)4.8.2 HSS Pins (20)4.9 Programmable Pulse/PWM Interface (20)4.9.1 Programmable Pulse/PWM Features (20)4.9.2 Programmable Pulse/PWM Pins. (20)4.10 Host Port Interface (20)4.10.1 HPI Features (20)4.10.2 HPI Pins. (21)TABLE OF CONTENTS (continued)4.11 IDE Interface (21)4.11.1 IDE Features (22)4.11.2 IDE Pins (22)4.12 Charge Pump Interface (22)4.12.1 Charge Pump Features (23)4.12.2 Charge Pump Pins. (23)4.13 Booster Interface (23)4.13.1 Booster Pins. (24)4.14 Crystal Interface (25)4.14.1 Crystal Pins (25)4.15 Boot Configuration Interface (25)4.16 Operational Modes (26)4.16.1 Coprocessor Mode (26)4.16.2 Standalone Mode (26)5.0 POWER-SAVINGS AND RESET DESCRIPTION (27)5.1 Power-Savings Mode Description (27)5.2 Sleep (27)5.3 External (Remote) wakeup Source (27)5.4 Power-On-Reset Description (27)5.5 Reset Pin (27)5.6 USB Reset (27)6.0 MEMORY MAP (28)6.1 Mapping (28)6.1.1 Internal Memory (28)6.1.2 External Memory (28)7.0 REGISTERS (30)7.1 Processor Control Registers (30)7.1.1 CPU Flags Register [0xC000] [R] (30)7.1.2 Bank Register [0xC002] [R/W] (31)7.1.3 Hardware Revision Register [0xC004] [R] (31)7.1.4 CPU Speed Register [0xC008] [R/W] (32)7.1.5 Power Control Register [0xC00A] [R/W] (33)7.1.6 Interrupt Enable Register [0xC00E] [R/W] (35)7.1.7 Breakpoint Register [0xC014] [R/W] (36)7.1.8 USB Diagnostic Register [0xC03C] [R/W] (37)7.1.9 Memory Diagnostic Register [0xC03E] [W] (38)7.2 External Memory Registers (39)7.2.1 Extended Page n Map Register [R/W] (39)7.2.2 Upper Address Enable Register [0xC038] [R/W] (39)7.2.3 External Memory Control Register [0xC03A] [R/W] (40)7.3 Timer Registers (41)7.3.1 Watchdog Timer Register [0xC00C] [R/W] (41)7.3.2 Timer n Register [R/W] (42)7.4 General USB Registers (42)7.4.1 USB n Control Register [R/W] (42)7.5 USB Host Only Registers (45)7.5.1 Host n Control Register [R/W] (45)7.5.2 Host n Address Register [R/W] (46)TABLE OF CONTENTS (continued)7.5.3 Host n Count Register [R/W] (46)7.5.4 Host n Endpoint Status Register [R] (47)7.5.5 Host n PID Register [W] (48)7.5.6 Host n Count Result Register [R] (49)7.5.7 Host n Device Address Register [W] (50)7.5.8 Host n Interrupt Enable Register [R/W] (50)7.5.9 Host n Status Register [R/W] (52)7.5.10 Host n SOF/EOP Count Register [R/W] (53)7.5.11 Host n SOF/EOP Counter Register [R] (53)7.5.12 Host n Frame Register [R] (54)7.6 USB Device Only Registers (54)7.6.1 Device n Endpoint n Control Register [R/W] (55)7.6.2 Device n Endpoint n Address Register [R/W] (56)7.6.3 Device n Endpoint n Count Register [R/W] (57)7.6.4 Device n Endpoint n Status Register [R/W] (57)7.6.5 Device n Endpoint n Count Result Register [R/W] (59)7.6.6 Device n Port Select Register [R/W] (60)7.6.7 Device n Interrupt Enable Register [R/W] (60)7.6.8 Device n Address Register [W] (63)7.6.9 Device n Status Register [R/W] (63)7.6.10 Device n Frame Number Register [R] (65)7.6.11 Device n SOF/EOP Count Register [W] (66)7.7 OTG Control Registers (66)7.7.1 OTG Control Register [0xC098] [R/W] (66)7.8 GPIO Registers (68)7.8.1 GPIO Control Register [0xC006] [R/W] (68)7.8.2 GPIO n Output Data Register [R/W] (70)7.8.3 GPIO n Input Data Register [R] (70)7.8.4 GPIO n Direction Register [R/W] (71)7.9 IDE Registers (71)7.9.1 IDE Mode Register [0xC048] [R/W] (71)7.9.2 IDE Start Address Register [0xC04A] [R/W] (72)7.9.3 IDE Stop Address Register [0xC04C] [R/W] (72)7.9.4 IDE Control Register [0xC04E] [R/W] (73)7.9.5 IDE PIO Port Registers [0xC050 - 0xC06F] [R/W] (74)7.10 HSS Registers (74)7.10.1 HSS Control Register [0xC070] [R/W] (75)7.10.2 HSS Baud Rate Register [0xC072] [R/W] (77)7.10.3 HSS Transmit Gap Register [0xC074] [R/W] (77)7.10.4 HSS Data Register [0xC076] [R/W] (78)7.10.5 HSS Receive Address Register [0xC078] [R/W] (78)7.10.6 HSS Receive Counter Register [0xC07A] [R/W] (79)7.10.7 HSS Transmit Address Register [0xC07C] [R/W] (79)7.10.8 HSS Transmit Counter Register [0xC07E] [R/W] (79)7.11 HPI Registers (80)7.11.1 HPI Breakpoint Register [0x0140] [R] (80)7.11.2 Interrupt Routing Register [0x0142] [R] (81)7.11.3 SIEXmsg Register [W] (82)7.11.4 HPI Mailbox Register [0xC0C6] [R/W] (83)7.11.5 HPI Status Port [] [HPI: R] (83)TABLE OF CONTENTS (continued)7.12 SPI Registers (85)7.12.1 SPI Configuration Register [0xC0C8] [R/W] (86)7.12.2 SPI Control Register [0xC0CA] [R/W] (87)7.12.3 SPI Interrupt Enable Register [0xC0CC] [R/W] (89)7.12.4 SPI Status Register [0xC0CE] [R] (89)7.12.5 SPI Interrupt Clear Register [0xC0D0] [W] (90)7.12.6 SPI CRC Control Register [0xC0D2] [R/W] (91)7.12.7 SPI CRC Value Register [0xC0D4] [R/W] (92)7.12.8 SPI Data Register [0xC0D6] [R/W] (92)7.12.9 SPI Transmit Address Register [0xC0D8] [R/W] (93)7.12.10 SPI Transmit Count Register [0xC0DA] [R/W] (93)7.12.11 SPI Receive Address Register [0xC0DC [R/W] (93)7.12.12 SPI Receive Count Register [0xC0DE] [R/W] (94)7.13 UART Registers (94)7.13.1 UART Control Register [0xC0E0] [R/W] (94)7.13.2 UART Status Register [0xC0E2] [R] (95)7.13.3 UART Data Register [0xC0E4] [R/W] (96)7.14 PWM Registers (96)7.14.1 PWM Control Register [0xC0E6] [R/W] (97)7.14.2 PWM Maximum Count Register [0xC0E8] [R/W] (98)7.14.3 PWM n Start Register [R/W] (99)7.14.4 PWM n Stop Register [R/W] (99)7.14.5 PWM Cycle Count Register [0xC0FA] [R/W] (100)8.0 PIN DIAGRAM (101)9.0 PIN DESCRIPTIONS (101)10.0 ABSOLUTE MAXIMUM RATINGS (105)11.0 OPERATING CONDITIONS (105)12.0 CRYSTAL REQUIREMENTS (XTALIN, XTALOUT) (105)13.0 DC CHARACTERISTICS (105)13.1 USB Transceiver (106)14.0 AC TIMING CHARACTERISTICS (107)14.1 Reset Timing (107)14.2 Clock Timing (107)14.3 SRAM Read Cycle (108)14.4 SRAM Write Cycle (109)14.5 I2C EEPROM Timing (110)14.6 HPI (Host Port Interface) Write Cycle Timing (111)14.7 HPI (Host Port Interface) Read Cycle Timing (112)14.8 IDE Timing (113)14.9 HSS BYTE Mode Transmit (113)14.10 HSS Block Mode Transmit (113)14.11 HSS BYTE and BLOCK Mode Receive (113)14.12 Hardware CTS/RTS Handshake (114)15.0 REGISTERS SUMMARY (114)16.0 ORDERING INFORMATION (118)17.0 PACKAGE DIAGRAMS (118)LIST OF FIGURESFigure 1-1. Block Diagram (10)Figure 4-1. Page n Registers External Address Pins Logic (15)Figure 4-2. Interfacing to 64k × 8 Memory Array (17)Figure 4-3. Interfacing up to 256k × 16 for External Code/Data (17)Figure 4-4. Interfacing up to 512k × 8 for External Code/Data (17)Figure 4-5. Charge Pump (23)Figure 4-6. Power Supply Connection With Booster (24)Figure 4-7. Power Supply Connection Without Booster (24)Figure 4-8. Crystal Interface (25)Figure 4-9. Minimum Standalone Hardware Configuration – Peripheral Only (26)Figure 6-1. Memory Map (29)Figure 7-1. Processor Control Registers (30)Figure 7-2. CPU Flags Register (30)Figure 7-3. Bank Register (31)Figure 7-4. Revision Register (31)Figure 7-5. CPU Speed Register (32)Figure 7-6. Power Control Register (33)Figure 7-7. Interrupt Enable Register (35)Figure 7-8. Breakpoint Register (36)Figure 7-9. USB Diagnostic Register (37)Figure 7-10. Memory Diagnostic Register (38)Figure 7-11. External Memory Control Registers (39)Figure 7-12. Extended Page n Map Register (39)Figure 7-13. External Memory Control Register (39)Figure 7-14. External Memory Control Register (40)Figure 7-15. Timer Registers (41)Figure 7-16. Watchdog Timer Register (41)Figure 7-17. Timer n Register (42)Figure 7-18. General USB Registers (42)Figure 7-19. USB n Control Register (43)Figure 7-20. USB Host Only Register (45)Figure 7-21. Host n Control Register (45)Figure 7-22. Host n Address Register (46)Figure 7-23. Host n Count Register (46)Figure 7-24. Host n Endpoint Status Register (47)Figure 7-25. Host n PID Register (49)Figure 7-26. Host n Count Result Register (49)Figure 7-27. Host n Device Address Register (50)Figure 7-28. Host n Interrupt Enable Register (50)Figure 7-29. Host n Status Register (52)Figure 7-30. Host n SOF/EOP Count Register (53)Figure 7-31. Host n SOF/EOP Counter Register (54)Figure 7-32. Host n Frame Register (54)Figure 7-33. USB Device Only Registers (55)Figure 7-34. Device n Endpoint n Control Register (55)Figure 7-35. Device n Endpoint n Address Register (57)Figure 7-36. Device n Endpoint n Count Register (57)Figure 7-37. Device n Endpoint n Status Register (58)Figure 7-38. Device n Endpoint n Count Result Register (60)LIST OF FIGURES (continued)Figure 7-39. Device n Port Select Register (60)Figure 7-40. Device n Interrupt Enable Register (61)Figure 7-41. Device n Address Register (63)Figure 7-42. Device n Status Register (63)Figure 7-43. Device n Frame Number Register (65)Figure 7-44. Device n SOF/EOP Count Register (66)Figure 7-45. OTG Registers (66)Figure 7-46. OTG Control Register (66)Figure 7-47. GPIO Registers (68)Figure 7-48. GPIO Control Register (68)Figure 7-49. GPIO n Output Data Register (70)Figure 7-50. GPIO n Input Data Register (70)Figure 7-51. GPIO n Direction Register (71)Figure 7-52. IDE Registers (71)Figure 7-53. IDE Mode Register (71)Figure 7-54. IDE Start Address Register (72)Figure 7-55. IDE Stop Address Register (72)Figure 7-56. IDE Control Register (73)Figure 7-57. HSS Registers (74)Figure 7-58. HSS Control Register (75)Figure 7-59. HSS Baud Rate Register (77)Figure 7-60. HSS Transmit Gap Register (77)Figure 7-61. HSS Data Register (78)Figure 7-62. HSS Receive Address Register (78)Figure 7-63. HSS Receive Counter Register (79)Figure 7-64. HSS Transmit Address Register (79)Figure 7-65. HSS Transmit Counter Register (79)Figure 7-66. HPI Registers (80)Figure 7-67. HPI Breakpoint Register (80)Figure 7-68. Interrupt Routing Register (81)Figure 7-69. SIEXmsg Register (82)Figure 7-70. HPI Mailbox Register (83)Figure 7-71. HPI Status Port (83)Figure 7-72. SPI Registers (85)Figure 7-73. SPI Configuration Register (86)Figure 7-74. SPI Control Register (87)Figure 7-75. SPI Interrupt Enable Register (89)Figure 7-76. SPI Status Register (89)Figure 7-77. SPI Interrupt Clear Register (90)Figure 7-78. SPI CRC Control Register (91)Figure 7-79. SPI CRC Value Register (92)Figure 7-80. SPI Data Register (92)Figure 7-81. SPI Transmit Address Register (93)Figure 7-82. SPI Transmit Count Register (93)Figure 7-83. SPI Receive Address Register (93)Figure 7-84. SPI Receive Count Register (94)Figure 7-85. UART Registers (94)Figure 7-86. UART Control Register (94)Figure 7-87. UART Status Register (95)LIST OF FIGURES (continued)Figure 7-88. UART Data Register (96)Figure 7-89. PWM Registers (96)Figure 7-90. PWM Control Register (97)Figure 7-91. PWM Maximum Count Register (98)Figure 7-92. PWM n Start Register (99)Figure 7-93. PWM n Stop Register (99)Figure 7-94. PWM Cycle Count Register (100)Figure 8-1. EZ-Host Pin Diagram (101)LIST OF TABLESTable 4-1. Interface Options for GPIO Pins (12)Table 4-2. Interface Options for External Memory Bus Pins (12)Table 4-3. USB Port Configuration Options (13)Table 4-4. USB Interface Pins (14)Table 4-5. OTG Interface Pins (14)Table 4-6. External Memory Interface Pins (16)Table 4-7. UART Interface Pins (18)Table 4-8. I2C EEPROM Interface Pins (18)Table 4-9. SPI Interface Pins (19)Table 4-10. HSS Interface Pins (20)Table 4-11. PWM Interface Pins (20)Table 4-12. HPI Interface Pins (21)Table 4-13. HPI Addressing (21)Table 4-14. IDE Throughput (22)Table 4-15. IDE Interface Pins (22)Table 4-16. Charge Pump Interface Pins (23)Table 4-17. Charge Pump Interface Pins (24)Table 4-18. Crystal Pins (25)Table 4-19. Boot Configuration Interface (25)Table 5-1. Wakeup Sources (27)Table 7-1. Bank Register Example (31)Table 7-2. CPU Speed Definition (32)Table 7-3. Force Select Definition (38)Table 7-4. Memory Arbitration Select (38)Table 7-5. Period Select Definition (41)Table 7-6. USB Data Line Pull-up and Pull-down Resistors (44)Table 7-7. Port A/B Force D± State (44)Table 7-8. Port Select Definition (47)Table 7-9. PID Select Definition (49)Table 7-10. Mode Select Definition (69)Table 7-11. Mode Select Definition (72)Table 7-12. IDE PIO Port Registers (74)Table 7-13. Scale Select Field Definition for SCK Frequency (86)Table 7-14. CRC Mode Definition (91)Table 7-15. UART Baud Select Definition (95)Table 7-16. Prescaler Select Definition (97)Table 9-1. Pin Descriptions (101)Table 12-1. Crystal Requirements (105)Table 13-1. DC Characteristics (105)Table 13-2. DC Characteristics: Charge Pump (106)Table 15-1. Register Summary (114)Table 16-1. Ordering Information (118)1.0 INTRODUCTIONEZ-Host™ (CY7C67300) is Cypress Semiconductor’s first full-speed, low-cost multiport host/peripheral controller. EZ-Host is designed to easily interface to most high-performance CPUs to add USB host functionality. EZ-Host has its own 16-bit RISC processor to act as a coprocessor or operate in standalone mode. EZ-Host also has a programmable I/O interface block allowing a wide range of interface options.Figure 1-1. Block Diagram1.1EZ-Host Features•Single-chip programmable USB dual-role (Host/Peripheral) controller with two configurable Serial Interface Engines (SIEs) and four USB ports•Support for USB On-The-Go (OTG) protocol•On-chip 48-MHz 16-bit processor with dynamically switchable clock speed•Configurable I/O block supporting a variety of I/O options or up to 32 bits of General Purpose I/O (GPIO)•4K x 16 internal masked ROM containing built-in BIOS that supports a communication ready state with access to I2C EEPROM Interface, external ROM, UART, or USB•8K x 16 internal RAM for code and data buffering•Extended memory interface port for external SRAM and ROM•16-bit parallel Host Port Interface (HPI) with a DMA/Mailbox data path for an external processor to directly access all of the on-chip memory and control on-chip SIEs•Fast serial port supports from 9600 baud to 2.0 Mbaud•SPI support in both master and slave•On-chip 16-bit DMA/Mailbox data path interface•Supports 12-MHz external crystal or clock•3.3V operation•Package option — 100-pin TQFP2.0 Typical ApplicationsEZ-Host is a very powerful and flexible dual role USB controller that supports a wide variety of applications. It is primarily intended to enable host capability in applications such as:•Set-top boxes•Printers•KVM switches•Kiosks•Automotive applications•Wireless access points.3.0 Functional Overview3.1Processor Core3.1.1ProcessorEZ-Host has a general-purpose 16-bit embedded RISC processor that runs at 48 MHz.3.1.2ClockingEZ-Host requires a 12-MHz source for clocking. Either an external crystal or TTL level oscillator may be used. EZ-Host has an internal PLL that produces a 48-MHz internal clock from the 12-MHz source.3.1.3MemoryEZ-Host has a built-in 4K × 16 masked ROM and an 8K × 16 internal RAM. The masked ROM contains the EZ-Host BIOS. The internal RAM can be used for program code or data.3.1.4InterruptsEZ-Host provides 128 interrupt vectors. The first 48 vectors are hardware interrupts and the following 80 vectors are software interrupts.3.1.5General Timers and Watchdog TimerEZ-Host has two built-in programmable timers and a Watchdog timer. All three timers can generate an interrupt to the EZ-Host.3.1.6Power ManagementEZ-Host has one main power saving mode, Sleep. Sleep mode pauses all operations and provides the lowest power state.4.0 Interface DescriptionsEZ-Host has a wide variety of interface options for connectivity. With several interface options available, EZ-Host can act as a seamless data transport between many different types of devices.See Table4-1 and Table4-2 to understand how the interfaces share pins and which can coexist. It should be noted that some interfaces have more then one possible port location selectable through the GPIO Control Register [0xC006]. Below are some general guidelines:•HPI and IDE interfaces are mutually exclusive.•If 16-bit external memory is required, then HSS and SPI default locations must be used.•I2C EEPROM and OTG do not conflict with any interfaces.Notes:1.Default interface location.2.Alternate interface location.Table 4-1. Interface Options for GPIO Pins GPIO Pins HPIIDEPWMHSSSPIUARTI2C OTGGPIO31SCL/SDA GPIO30SCL/SDAGPIO29OTGIDGPIO28TX [1]GPIO27RX [1]GPIO26PWM3CTS [1]GPIO25GPIO24INT IOREADY GPIO23nRD IOR GPIO22nWR IOW GPIO21nCS GPIO20A1CS1GPIO19A0CS0GPIO18A2PWM2RTS [1]GPIO17A1PWM1RXD [1]GPIO16A0PWM0TXD [1]GPIO15D15D15GPIO14D14D14GPIO13D13D13GPIO12D12D12GPIO11D11D11MOSI [1]GPIO10D10D10SCK [1]GPIO9D9D9nSSI [1]GPIO8D8D8MISO [1]GPIO7D7D7TX [2]GPIO6D6D6RX [2]GPIO5D5D5GPIO4D4D4GPIO3D3D3GPIO2D2D2GPIO1D1D1GPIO0D0D0Table 4-2. Interface Options for External Memory Bus Pins MEM Pins HPIIDEPWMHSS SPIUARTI2COTGD15CTS [2]D14RTS [2]D13RXD [2]D12TXD [2]D11MOSI [2]D10SCK [2]D9nSSI [2]D8MISO [2]D[7:0]A[18:0]CONTROL4.1USB InterfaceEZ-Host has two built-in Host/Peripheral SIEs and four USB transceivers that meet the USB 2.0 specification requirements for full and low speed (high speed is not supported). In Host mode, EZ-Host supports four downstream ports, each support control, interrupt, bulk, and isochronous transfers. In Peripheral mode, EZ-Host supports one peripheral port with eight endpoints for each of the two SIEs. Endpoint 0 is dedicated as the control endpoint and only supports control transfers. Endpoints 1 though 7 support Interrupt, Bulk (up to 64 Bytes/packet), or Isochronous transfers (up to 1023 Bytes/packet size). EZ-Host also supports a combi-nation of Host and Peripheral ports simultaneously as shown in Table4-3.Table 4-3. USB Port Configuration OptionsPort Configurations Port 1A Port 1B Port 2A Port 2BOTG OTG–––OTG + 2 Hosts OTG–Host HostOTG + 1 Host OTG–Host–OTG + 1 Host OTG––HostOTG + 1 Peripheral OTG–Peripheral–OTG + 1 Peripheral OTG––Peripheral4 Hosts Host Host Host Host3 Hosts Any Combination of Ports2 Hosts Any Combination of Ports1 Host Any Port2 Hosts + 1 Peripheral Host Host Peripheral–2 Hosts + 1 Peripheral Host Host–Peripheral2 Hosts + 1 Peripheral Peripheral–Host Host2 Hosts + 1 Peripheral–Peripheral Host Host1 Host + 1 Peripheral Host–Peripheral–1 Host + 1 Peripheral Host––Peripheral1 Host + 1 Peripheral–Host–Peripheral1 Host + 1 Peripheral–Host Peripheral–1 Host + 1 Peripheral Peripheral–Host–1 Host + 1 Peripheral Peripheral––Host1 Host + 1 Peripheral–Peripheral–Host1 Host + 1 Peripheral–Peripheral Host–2 Peripherals Peripheral–Peripheral–2 Peripherals Peripheral––Peripheral2 Peripherals–Peripheral–Peripheral2 Peripherals–Peripheral Peripheral–1 Peripheral Any Port4.1.1USB Features•USB 2.0-compliant for full and low speed•Up to four downstream USB host ports•Up to two upstream USB peripheral ports•Configurable endpoint buffers (pointer and length), must reside in internal RAM•Up to eight available peripheral endpoints (one control endpoint)•Supports Control, Interrupt, Bulk, and Isochronous transfers•Internal DMA channels for each endpoint•Internal pull-up and pull-down resistors•Internal Series termination resistors on USB data lines4.1.2USB Pins.Table 4-4. USB Interface PinsPin Name Pin NumberDM1A22DP1A23DM1B18DP1B19DM2A9DP2A10DM2B4DP2B54.2OTG InterfaceEZ-Host has one USB port that is compatible with the USB On-The-Go supplement to the USB 2.0 specification. The USB OTG port has a various hardware features to support Session Request Protocol (SRP) and Host Negotiation Protocol (HNP). OTG is only supported on USB PORT 1A.4.2.1OTG Features•Internal Charge Pump to supply and control VBUS•VBUS Valid Status (above 4.4V)•VBUS Status for 2.4V< VBUS <0.8V•ID Pin Status•Switchable 2KΩ internal discharge resistor on VBUS•Switchable 500Ω internal Pull-up resistor on VBUS•Individually switchable internal Pull-up and Pull-down resistors on the USB Data Lines4.2.2OTG Pins.Table 4-5. OTG Interface PinsPin Name Pin NumberDM1A22DP1A23OTGVBUS11OTGID41CSwitchA13CSwitchB124.3External Memory InterfaceEZ-Host provides a robust interface to a wide variety of external memory arrays. All available external memory array locations can contain either code or data. The CY16 RISC processor directly addresses a flat memory space from 0x0000 to 0xFFFF. 4.3.1External Memory Interface Features•Supports 8-bit or 16-bit SRAM or ROM•SRAM or ROM can be used for code or data space•Direct addressing of SRAM or ROM•Two external memory mapped page registers4.3.2External Memory Access StrobesAccess to external memory is sampled asynchronously on the rising edge of strobes with a minimum of one wait state cycle. Up to seven wait state cycles may be inserted for external memory access. Each additional wait state cycle stretches the external memory access time by 21 nsec. An external memory device with 12-nsec access time is necessary to support 48-MHz code execution.4.3.3Page RegistersEZ-Host allows extended data or program code to be stored in external SRAM, or ROM. The total size of extended memory can be up to 512K bytes. The CY16 processor can access extended memory via two address regions of 0x8000-0x9FFF and 0xA000-0xBFFF. The page register 0xC018 can be used to control the address region 0x8000-0x9FFF and the page register 0xC01A controls the address region of 0xA000-0xBFFF.Figure4-1 illustrates that when the nXMEMSEL pin is asserted the upper CPU address pins are driven by the contents of the Page x Registers.Figure 4-1. Page n Registers External Address Pins Logic4.3.4Merge ModeMerge modes enabled through the External Memory Control Register [0xC03] allow combining of external memory regions in accordance with the following:•nXMEMSEL is active from 0x8000 to 0xBFFF•nXRAMSEL is active from 0x4000 to 0x7FFF when RAM Merge is disabled; nXRAMSEL is active from 0x4000 to 0xBFFF when RAM Merge is enabled•nXROMSEL is active from 0xC100 to 0xDFFF when ROM Merge is disabled; nXROMSEL is active from 0x8000 to 0xDFFF (excluding the 0xC000 to 0xC0FF area) when ROM Merge is enabled4.3.5Program Memory Hole DescriptionCode residing in the 0xC000-0xC0FF address space is not accessible by the cpu.4.3.6DMA to External Memory ProhibitedEZ-Host supports an internal DMA engine to rapidly move data between different functional blocks within the chip. This DMA engine is used for SIE1, SIE2, HPI, SPI, HSS, and IDE but it can only transfer data between the specified block and internal RAM or ROM. Setting up the DMA engine to transfer to or from an external memory space might result in internal RAM data corruption because the hardware (i.e HSS/HPI/SIE1/SIE2/IDE) does not explicitly check the address range. For example, setting up a DMA transfer to external address 0x8000 might result in a DMA transfer into address 0x0000.External Memory Related Resource Considerations:•By default A[18:15] are not available for general addressing and are driven high on power up. The Upper Address Enable Register must be written appropriately to enable A[18:15] for general addressing purposes.•47k ohm external pull-up on A15-pin for 12-MHz crystal operation.•During the 3-msec BIOS boot procedure the CPU external memory bus is active.•ROM boot load value 0xC3B6 located at 0xC100.•HPI, HSS, SPI, SIE1, SIE2, and IDE can't DMA to external memory arrays.•Page 1 banking is always enabled and is in effect from 0x8000 to 0x9FFF.•Page 2 banking is always enabled and is in effect from 0xA000 to 0xBFFF.•CPU memory bus strobes may wiggle when chip selects are inactive.4.3.7External Memory Interface PinsTable 4-6. External Memory Interface PinsPin Name Pin Number nWR64nRD62 nXMEMSEL (optional nCS)34nXROMSEL (ROM nCS)35nXRAMSEL (RAM nCS)36A1896A1795A1697A1538A1433A1332A1231A1130A1027A925A824A720A617A58A47A33A22A11nBEL/A099nBEH98D1567D1468D1369D1270D1171D1072D973D874D776D677D578D479D380D281D182D0834.3.8External Memory Interface Block DiagramsFigure4-2 illustrates how to connect a 64k × 8 memory array (SRAM/ROM) to the EZ-Host external memory interface.Figure 4-2. Interfacing to 64k × 8 Memory ArrayFigure4-3 illustrates the interface for connecting a 16-bit ROM or 16-bit RAM to the EZ-Host external memory interface. In 16-bit mode, up to 256K words of external ROM or RAM are supported. Note that the Address lines do not map directly.Figure 4-3. Interfacing up to 256k × 16 for External Code/DataFigure4-4 illustrates the interface for connecting an 8-bit ROM or 8-bit RAM to the EZ-Host external memory interface. In 8-bit mode, up to 512K bytes of external ROM or RAM are supported.Figure 4-4. Interfacing up to 512k × 8 for External Code/Data4.4General Purpose I/O Interface (GPIO)EZ-Host has up to 32 GPIO signals available. Several other optional interfaces use GPIO pins as well and may reduce the overall number of available GPIOs.4.4.1GPIO DescriptionAll Inputs are sampled asynchronously with state changes occurring at a rate of up to two 48-MHZ clock cycles. GPIO pins are latched directly into registers, a single flip-flop.4.4.2Unused Pin DescriptionsUnused USB pins should be three-stated with the D+ line pulled high through the internal pull-up resistor and the D- line pulled low through the internal pull-down resistor.Unused GPIO pins should be configured as outputs and driven low.4.5UART InterfaceEZ-Host has a built-in UART interface. The UART interface supports data rates from 900 to 115.2K baud. It can be used as a development port or for other interface requirements. The UART interface is exposed through GPIO pins.4.5.1UART Features•Supports baud rates of 900 to 115.2K•8-N-14.5.2UART Pins.Table 4-7. UART Interface PinsPin Name Pin NumberTX42RX434.6I2C EEPROM InterfaceEZ-Host provides a master only I2C interface for external serial EEPROMs. The serial EEPROM can be used to store application specific code and data. This I2C interface is only to be used for loading code out of EEPROM, it is not a general I2C interface. The I2C EEPROM interface is a BIOS implementation and is exposed through GPIO pins. Please refer to the BIOS documentation for additional details on this interface.4.6.1I2C EEPROM Features•Supports EEPROMs up to 64KB (512K bit)•Auto-detection of EEPROM size4.6.2I2C EEPROM Pins.Table 4-8. I2C EEPROM Interface PinsPin Name Pin NumberSMALL EEPROMSCK39SDA40LARGE EEPROMSCK40SDA394.7Serial Peripheral InterfaceEZ-Host provides a SPI interface for added connectivity. EZ-Host may be configured as either an SPI master or SPI slave. The SPI interface can be exposed through GPIO pins or the External Memory port.。
背光L1001说明书
8
mA
Oscillator frequency振荡频率
Fosc
Hz
4、APPLICATION DIAGRAM＆PAD Description
PAD
NAME
X
Y.
说明
1
IND
－189.5
123.5
调制脉冲输出
2
EL1
－189.5
392
1/8脉冲输出14
TP
204.5
L1001说明书
1、FEATURES功能叙述
L1001为EL背光源驱动电路。工作电压为1.5V或3V。周边元件只需一只电感，
一只二极体和二只三极管。
L1001提供一个高电平的有效的触发端。
*CMOS工艺，高可靠性，高稳定性*内置延时功能（3秒）
*极低的功耗* EL1和EL2的选择可适应不同的这PCB板
266.5
内部测试
5
OSCI
195
141
内部振荡输入
6
OSCO
195
－392
内部振荡输出
7
SEL1
55
－392
选择IND输出类型
8
TG
－189.5
－392
触发输入
9
VDD
－189.5
－247
电源正极
10
SEL2
－189.5
－102
1/8脉冲输出2
`
size:1.02*0.62mm2
* 1.5V和3V电压皆可工作*改变电感参数可驱动大面积EL片。适用于电子表、
电话机、VCD等。
2
*钟表、礼品、电话机、VCD等背光源、妆饰等。
3
PARAMETER
SCI Dual NPN Bias Resistor Transistors 数据手册说明书
MUN5211DW1,NSBC114EDXV6,NSBC114EDP6Dual NPN Bias Resistor TransistorsR1 = 10 k W, R2 = 10 k WNPN Transistors with Monolithic Bias Resistor NetworkThis series of digital transistors is designed to replace a single device and its external resistor bias network. The Bias Resistor Transistor (BRT) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base-emitter resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space.Features•Simplifies Circuit Design•Reduces Board Space•Reduces Component Count•S and NSV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements;AEC-Q101 Qualified and PPAP Capable*•These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS CompliantMAXIMUM RATINGS(T A = 25°C, common for Q1 and Q2, unless otherwise noted)Rating Symbol Max Unit Collector-Base Voltage V CBO50Vdc Collector-Emitter Voltage V CEO50Vdc Collector Current − Continuous I C100mAdc Input Forward Voltage V IN(fwd)40Vdc Input Reverse Voltage V IN(rev)10Vdc Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. ORDERING INFORMATIONDevice Package Shipping†MUN5211DW1T1G,SMUN5211DW1T1G*SOT−3633,000 / Tape & Reel NSVMUN5211DW1T2G*SOT−3633,000 / Tape & Reel NSVMUN5211DW1T3G*SOT−36310,000 / Tape & Reel NSBC114EDXV6T1G,NSVBC114EDXV6T1G*SOT−5634,000 / Tape & Reel NSBC114EDXV6T5G SOT−5638,000 / Tape & ReelNSBC114EDP6T5G SOT−9638,000 / Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging SpecificationsMARKING DIAGRAMSPIN CONNECTIONS7A M GG17A/A=Specific Device CodeM=Date Code*G=Pb-Free Package (Note: Microdot may be in either location) *Date Code orientation may vary depending up-on manufacturing location.SOT−363CASE 419BSOT−563CASE 463A(1)(2)(3)(6)(5)(4)SOT−963CASE 527ADM1A7A M GG16THERMAL CHARACTERISTICSCharacteristic Symbol Max Unit MUN5211DW1 (SOT−363) ONE JUNCTION HEATEDTotal Device DissipationT A = 25°C(Note1)(Note2)Derate above 25°C(Note1)(Note2)P D1872561.52.0mWmW/°CThermal Resistance,(Note1) Junction to Ambient(Note2)R q JA670490°C/WMUN5211DW1 (SOT−363) BOTH JUNCTION HEATED (Note3)Total Device DissipationT A = 25°C(Note1)(Note2)Derate above 25°C(Note1)(Note2)P D2503852.03.0mWmW/°CThermal Resistance,Junction to Ambient(Note1)(Note2)R q JA493325°C/WThermal Resistance, Junction to Lead(Note1)(Note2)R q JL188208°C/WJunction and Storage Temperature Range T J, T stg−55 to +150°C NSBC114EDXV6 (SOT−563) ONE JUNCTION HEATEDTotal Device DissipationT A = 25°C(Note1)Derate above 25°C(Note1)P D3572.9mWmW/°CThermal Resistance,Junction to Ambient(Note1)R q JA350°C/WNSBC114EDXV6 (SOT−563) BOTH JUNCTION HEATED (Note3)Total Device DissipationT A = 25°C(Note1)Derate above 25°C(Note1)P D5004.0mWmW/°CThermal Resistance,Junction to Ambient(Note1)R q JA250°C/WJunction and Storage Temperature Range T J, T stg−55 to +150°C NSBC114EDP6 (SOT−963) ONE JUNCTION HEATEDTotal Device DissipationT A = 25°C(Note4)(Note5)Derate above 25°C(Note4)(Note5)P D2312691.92.2MWmW/°CThermal Resistance,Junction to Ambient(Note4)(Note5)R q JA540464°C/WNSBC114EDP6 (SOT−963) BOTH JUNCTION HEATED (Note3)Total Device DissipationT A = 25°C(Note4)(Note5)Derate above 25°C(Note4)(Note5)P D3394082.73.3MWmW/°CThermal Resistance,Junction to Ambient(Note4)(Note5)R q JA369306°C/WJunction and Storage Temperature Range T J, T stg−55 to +150°C 1.FR−4 @ Minimum Pad.2.FR−4 @ 1.0×1.0 Inch Pad.3.Both junction heated values assume total power is sum of two equally powered channels.4.FR−4 @ 100mm2, 1 oz. copper traces, still air.5.FR−4 @ 500mm2, 1 oz. copper traces, still air.ELECTRICAL CHARACTERISTICS (T A=25°C, common for Q1 and Q2, unless otherwise noted)Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICSCollector-Base Cutoff Current (V CB=50V, I E=0)I CBO−−100nAdcCollector-Emitter Cutoff Current (V CE=50V, I B=0)I CEO−−500nAdcEmitter-Base Cutoff Current (V EB=6.0V, I C=0)I EBO−−0.5mAdcCollector-Base Breakdown Voltage (I C=10m A, I E=0)V(BR)CBO50−−VdcCollector-Emitter Breakdown Voltage (Note6) (I C=2.0mA, I B=0)V(BR)CEO50−−VdcON CHARACTERISTICSDC Current Gain (Note6) (I C=5.0mA, V CE=10V)h FE3560−Collector-Emitter Saturation Voltage (Note6) (I C=10mA, I B=0.3mA)V CE(sat)−−0.25VInput Voltage (Off)(V CE=5.0V, I C=100m A)V i(off)− 1.2−VdcInput Voltage (On)(V CE=0.2V, I C=10mA)V i(on)−2.0−VdcOutput Voltage (On)(V CC=5.0V, V B=2.5V, R L=1.0k W)V OL−−0.2VdcOutput Voltage (Off)(V CC=5.0V, V B=0.5V, R L=1.0k W)V OH4.9−−Vdc Input Resistor R17.01013k W Resistor Ratio R1/R20.8 1.0 1.2Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.6.Pulsed Condition: Pulse Width=300ms, Duty Cycle ≤2%.Figure 1. Derating CurveAMBIENT TEMPERATURE (°C)PD,POWERDISSIPATION(mW)(1) SOT−363; 1.0×1.0 Inch Pad(2) SOT−563; Minimum Pad(3) SOT−963; 100mm2, 1 oz. Copper TraceTYPICAL CHARACTERISTICS MUN5211DW1, NSBC114EDXV6Figure 2. V CE(sat) vs. I CI C , COLLECTOR CURRENT (mA)1010.1Figure 3. DC Current GainFigure 4. Output Capacitance 0.10.010.001I C , COLLECTOR CURRENT (mA)100010010I C , COLLECTOR CURRENT (mA)Figure 5. Output Current vs. Input Voltage1010.1V in , INPUT VOLTAGE (V)Figure 6. Input Voltage vs. Output Current3.62.80.41.20V R , REVERSE VOLTAGE (V)V C E (s a t ), C O L L E C T O R −E M I T T E R V O L T A G E (V )h F E , D C C U R R E N T G A I N0.81.62.02.43.2C o b , O U T P U T C A P A C I T A N C E (p F )I C , C O L L E C T O R C U R R E N T (m A )V i n , I N P U T V O L T A G E (V )TYPICAL CHARACTERISTICSNSBC114EDP6Figure 7. V CE(sat) vs. I CFigure 8. DC Current GainI C , COLLECTOR CURRENT (mA)I C , COLLECTOR CURRENT (mA)0.010.11Figure 9. Output CapacitanceFigure 10. Output Current vs. Input VoltageV R , REVERSE VOLTAGE (V)V in , INPUT VOLTAGE (V)Figure 11. Input Voltage vs. Output CurrentI C , COLLECTOR CURRENT (mA)V C E (s a t ), C O L L E C T O R −E M I T T E R V O L T A G E (V )h F E , D C C U R R E N T G A I NC o b , O U T P U T C A P A C I T A N C E (p F )I C , C O L L E C T O R C U R R E N T (m A )V i n , I N P U T V O L T A G E (V )SC −88/SC70−6/SOT −363CASE 419B −02ISSUE YDATE 11 DEC 2012SCALE 2:1NOTES:1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.2.CONTROLLING DIMENSION: MILLIMETERS.3.DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.4.DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY AND DATUM H.5.DATUMS A AND B ARE DETERMINED AT DATUM H.6.DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP .7.DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OF THE FOOT.XXXM G G XXX = Specific Device Code M = Date Code*G = Pb −Free Package GENERICMARKING DIAGRAM*16STYLES ON PAGE 2DIM MIN NOM MAX MILLIMETERS A −−−−−− 1.10A10.00−−−0.10dddb 0.150.200.25C 0.080.150.22D 1.80 2.00 2.20−−−−−−0.0430.000−−−0.0040.0060.0080.0100.0030.0060.0090.0700.0780.086MIN NOM MAX INCHES0.100.004E1 1.15 1.25 1.35e 0.65 BSC L 0.260.360.462.00 2.10 2.200.0450.0490.0530.026 BSC0.0100.0140.0180.0780.0820.086(Note: Microdot may be in either location)*Date Code orientation and/or position may vary depending upon manufacturing location.*For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOLDERING FOOTPRINT*DIMENSIONS: MILLIMETERS0.306XRECOMMENDEDSIDE VIEWEND VIEWPLANEDETAIL AE A20.700.90 1.000.0270.0350.039L20.15 BSC 0.006 BSC aaa 0.150.006bbb 0.300.012ccc 0.100.0046X*This information is generic. Please refer to device data sheet for actual part marking.Pb −Free indicator, “G” or microdot “G ”, may or may not be present. Some products may not follow the Generic Marking.MECHANICAL CASE OUTLINEPACKAGE DIMENSIONSSTYLE 1:PIN 1.EMITTER 22.BASE 23.COLLECTOR 14.EMITTER 15.BASE 16.COLLECTOR 2STYLE 3:CANCELLEDSTYLE 2:CANCELLEDSTYLE 4:PIN 1.CATHODE2.CATHODE3.COLLECTOR4.EMITTER5.BASE6.ANODESTYLE 5:PIN 1.ANODE2.ANODE3.COLLECTOR4.EMITTER5.BASE6.CATHODESTYLE 6:PIN 1.ANODE 22.N/C3.CATHODE 14.ANODE 15.N/C6.CATHODE 2STYLE 7:PIN 1.SOURCE 22.DRAIN 23.GATE 14.SOURCE 15.DRAIN 16.GATE 2STYLE 8:CANCELLEDSTYLE 11:PIN 1.CATHODE 22.CATHODE 23.ANODE 14.CATHODE 15.CATHODE 16.ANODE 2STYLE 9:PIN 1.EMITTER 22.EMITTER 13.COLLECTOR 14.BASE 15.BASE 26.COLLECTOR 2STYLE 10:PIN 1.SOURCE 22.SOURCE 13.GATE 14.DRAIN 15.DRAIN 26.GATE 2STYLE 12:PIN 1.ANODE 22.ANODE 23.CATHODE 14.ANODE 15.ANODE 16.CATHODE 2STYLE 13:PIN 1.ANODE2.N/C3.COLLECTOR4.EMITTER5.BASE6.CATHODE STYLE 14:PIN 1.VREF2.GND3.GND4.IOUT5.VEN6.VCCSTYLE 15:PIN 1.ANODE 12.ANODE 23.ANODE 34.CATHODE 35.CATHODE 26.CATHODE 1STYLE 17:PIN 1.BASE 12.EMITTER 13.COLLECTOR 24.BASE 25.EMITTER 26.COLLECTOR 1STYLE 16:PIN 1.BASE 12.EMITTER 23.COLLECTOR 24.BASE 25.EMITTER 16.COLLECTOR 1STYLE 18:PIN 1.VIN12.VCC3.VOUT24.VIN25.GND6.VOUT1STYLE 19: PIN 1.I OUT2.GND3.GND4.V CC5.V EN6.V REF STYLE 20:PIN 1.COLLECTOR2.COLLECTOR3.BASE4.EMITTER5.COLLECTOR6.COLLECTORSTYLE 22:PIN 1.D1 (i)2.GND3.D2 (i)4.D2 (c)5.VBUS6.D1 (c)STYLE 21:PIN 1.ANODE 12.N/C3.ANODE 24.CATHODE 25.N/C6.CATHODE 1STYLE 23:PIN 1. Vn2.CH13.Vp4.N/C5.CH26.N/CSTYLE 24:PIN 1.CATHODE2.ANODE3.CATHODE4.CATHODE5.CATHODE6.CATHODESTYLE 25:PIN 1.BASE 12.CATHODE3.COLLECTOR 24.BASE 25.EMITTER6.COLLECTOR 1STYLE 26:PIN 1.SOURCE 12.GATE 13.DRAIN 24.SOURCE 25.GATE 26.DRAIN 1STYLE 27:PIN 1.BASE 22.BASE 13.COLLECTOR 14.EMITTER 15.EMITTER 26.COLLECTOR 2STYLE 28:PIN 1.DRAIN2.DRAIN3.GATE4.SOURCE5.DRAIN6.DRAINSTYLE 29:PIN 1.ANODE2.ANODE3.COLLECTOR4.EMITTER5.BASE/ANODE6.CATHODESC−88/SC70−6/SOT−363CASE 419B−02ISSUE YDATE 11 DEC 2012STYLE 30:PIN 1.SOURCE 12.DRAIN 23.DRAIN 24.SOURCE 25.GATE 16.DRAIN 1Note: Please refer to datasheet forstyle callout. If style type is not calledout in the datasheet refer to the devicedatasheet pinout or pin assignment.SOT −563, 6 LEADCASE 463A ISSUE HDATE 26 JAN 2021SCALE 4:16MECHANICAL CASE OUTLINEPACKAGE DIMENSIONSSOT −563, 6 LEADCASE 463A ISSUE HDATE 26 JAN 2021XX = Specific Device Code M = Month Code G = Pb −Free PackageXX MG GENERICMARKING DIAGRAM*1*This information is generic. Please refer todevice data sheet for actual part marking.Pb −Free indicator, “G” or microdot “G ”, may or may not be present. Some products maynot follow the Generic Marking.SOT −963CASE 527AD −01ISSUE EDATE 09 FEB 2010SCALE 4:1GENERICMARKING DIAGRAM*X = Specific Device Code M = Month Code*This information is generic. Please refer to device data sheet for actual part marking.Pb −Free indicator, “G” or microdot “ G ”,may or may not be present.DIM MIN NOM MAX MILLIMETERS A 0.340.370.40b 0.100.150.20C 0.070.120.17D 0.95 1.001.05E 0.750.800.85e 0.35 BSC 0.95 1.00 1.05HE ANOTES:1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.2.CONTROLLING DIMENSION: MILLIMETERS3.MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEADTHICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.4.DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS.XM 1STYLE 1:PIN 1.EMITTER 12.BASE 13.COLLECTOR 24.EMITTER 25.BASE 26.COLLECTOR 1STYLE 2:PIN 1.EMITTER 12.EMITTER23.BASE 24.COLLECTOR 25.BASE 16.COLLECTOR 1STYLE 3:PIN 1.CATHODE 12.CATHODE 13.ANODE/ANODE 24.CATHODE 25.CATHODE 26.ANODE/ANODE 1STYLE 4:PIN 1.COLLECTOR2.COLLECTOR3.BASE4.EMITTER5.COLLECTOR6.COLLECTOR STYLE 6:PIN 1.CATHODE2.ANODE3.CATHODE4.CATHODE5.CATHODE6.CATHODE STYLE 5:PIN 1.CATHODE2.CATHODE3.ANODE4.ANODE5.CATHODE6.CATHODE STYLE 7:PIN 1.CATHODE2.ANODE3.CATHODE4.CATHODE5.ANODE6.CATHODE STYLE 8:PIN 1.DRAIN2.DRAIN3.GATE4.SOURCE5.DRAIN6.DRAINSTYLE 9:PIN 1.SOURCE 12.GATE 13.DRAIN 24.SOURCE 25.GATE 26.DRAIN 1STYLE 10:PIN 1.CATHODE 12.N/C3.CATHODE 24.ANODE 25.N/C6.ANODE 1TOP VIEW SIDE VIEWDIMENSIONS: MILLIMETERSRECOMMENDED MOUNTING FOOTPRINTL 0.19 REF L20.050.100.156X MECHANICAL CASE OUTLINEPACKAGE DIMENSIONSPUBLICATION ORDERING INFORMATIONTECHNICAL SUPPORT North American Technical Support:Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 011 421 33 790 2910LITERATURE FULFILLMENT :Email Requests to:*******************onsemi Website: Europe, Middle East and Africa Technical Support:Phone: 00421 33 790 2910For additional information, please contact your local Sales Representative ◊。
艾迪斯莱·X20(c)SLX系列数字输入模块说明书
2 OverviewTable 2: Digital input modules3 Order dataX20SLX210/ X20SLX410X20SLX811X20SLX910Short descriptionIntelligent programmable modulessafe digital input module, safety controller, openSAFETY,SafeMOTION axes, 2 safe digital inputs, configurable input filter, 2 pulse outputs, 24 VDCsafe digital input module, safety controller, openSAFETY,SafeMOTION axes, 4 safe digital inputs, configurable input filter, 4 pulse outputs, 24 VDCX20 safe digital input module, coated, safety controller, openSAFETY, 11 openSAFETY nodes,4 SafeMOTION axes, 4 safe digital inputs, configurable input filter, 4 pulse outputs, 24 VDCsafe digital input module, safety controller, openSAFETY,SafeMOTION axes, 8 safe digital inputs, configurable input filter, 4 pulse outputs, 24 VDC, sin-safe digital input module, safety controller, openSAFETY,SafeMOTION axes, 20 safe digital inputs, configurable input filter, 4 pulse outputs, 24 VDCX20 safe digital input module, coated, safety controller, openSAFETY, 11 openSAFETY nodes,4 SafeMOTION axes, 20 safe digital inputs, configurable input filter, 4 pulse outputs, 24 VDCRequired accessoriesBus modulesX20 bus module, for X20 SafeIO modules, internal I/O power supply continuous, single-widthX20 bus module, for X20 SafeIO modules, internal I/O power supply continuousX20 bus module, for X20 SafeIO modules, with node number switch, internal I/O power supplycontinuousX20 bus module, coated, for X20 SafeIO modules, internal I/O power supply continuousTerminal blocksX20 terminal block, 12-pin, safety-keyedTable 3: X20SLX210, X20SLX410, X20cSLX410, X20SLX811, X20SLX910, X20cSLX910 - Order data4 Technical dataTable 4: X20SLX210, X20SLX410, X20cSLX410, X20SLX811, X20SLX910, X20cSLX910 - Technical data1)It is also important to take note of the danger warnings in the technical data sheet.2)If multiple SafeLOGIC-X controllers exist in the AS hardware tree, all but 1 must be disabled.3)Keep in mind that 8 BOOL count as 1 data point.4)Protection is provided for max. 30 minutes for continuous short circuits.Danger!Operating outside of technical data specifications is not permitted and can result in dangerous situ-ations.Information:For additional information about installation, see chapter "Installation notes for X20 safety modules"on page 67.X20SLXx10 - DeratingThe number of inputs that should be used at the same time depends on the operating temperature and the mounting orientation. The resulting amount can be looked up in the following table.The derating curve refers to operation at 28.8 VDC. When operated at 24 VDC and mounted horizontally, the derating curve is shifted to the right by the derating bonus specified in the technical data.If a dummy module is installed on the left, right or left and right next to the module, then the derating curve is shifted to the right by the derating bonus specified in the technical data (with horizontal mounting).X20SLX410X20SLX811X20SLX910Table 5: Derating in relation to operating temperature and mounting orientationInformation:Regardless of the values specified in the derating curve, the module cannot be operated above thevalues specified in the technical data.5 LED status indicatorsX20SLX210X20SLX410X20SLX811X20SLX910Table 6: Status displayDanger!Constantly lit "SE" LEDs indicate a defective module that must be replaced immediately.It is your responsibility to ensure that all necessary repair measures are initiated after an error occurs since subsequent errors can result in dangerous situations!6 PinoutsSI 1SI 2r 12e 000CSEX 20 S L X 210Pulse 1Pulse 2Figure 1: X20SLX210 - Pinout SI 1SI 2r 12e 000C SEX 20 S L X 410Pulse 1Pulse 234000CSI 3SI 4Pulse 3Pulse 4Figure 2: X20SLX410 - PinoutSI 1SI 2r 13e 24SEX 20 S L X 811Pulse 1Pulse 25768SI 3SI 4Pulse 3Pulse 4SI 7SI 5SI 8SI 6Figure 3: X20SLX811 - Pinout r 13e 14SEX 20 S L X 91015161718SI 9SI 10SI 11SI 12SI 5SI 6SI 7SI 8SI 1SI 2SI 3SI 4Pulse 1Pulse 3SI 151920123456789101112SI 16SI 14SI 13SI 20SI 19SI 18SI 17Pulse 4Pulse 2Figure 4: X20SLX910 - Pinout。
上海凯程智能柴油机泵中英文(1)
Intelligent Diesel Engine Pump
智能柴油机水泵
n n c c
智能水泵控制器具有控制GOV的功能，可以实现通过调速稳定出水压力的功能。控制器准确监测发动机的各 种工作状态，具备故障自动保护功能，同时将故障状态显示在LCD上。控制器带有SAE J1939接口，可和具 有J1939接口的多种电喷发动机ECU(ENGINE CONTROL UNIT)进行通信。
自动控制：柴油机泵组在接收到消防/管网压力或者是液位等其他自动控制信号后，做出自动启停，运行监 测的响应。
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UCR100 LECTROSONICS, INC. 多频率编码器接收器说明书
UCR100UHF Multi-Frequency Compact ReceiverINSTRUCTION MANUALRio Rancho, NM, USA Fill in for your records: Serial Number: Purchase Date:UCR1002LECTROSONICS, INC.Compact ReceiverRio Rancho, NM 3IntroductionThank you for selecting the Lectrosonics multi-fre-quency, UCR100 Receiver. The UCR100 is the result of extensive engineering experience with the very latest microprocessor advancements and technology.The Lectrosonics 100 System Receiver and companion transmitter are designed expressly for the most discrim-inating videographer and for other wireless applications needing superior audio quality, flexible operation, and outstanding durability. The compact size of the receiver provides ease of integration with most any compact video camera.Table of ContentsIntroduction .............................................................................................................................................................................................3General Technical Description ..............................................................................................................................................................4Features ................................................................................................................................................................................................4Dual Band Compandor .........................................................................................................................................................................4UCR100 Block Diagram ....................................................................................................................................................................4Pre-Emphasis/De-Emphasis .................................................................................................................................................................4Controls & Functions .............................................................................................................................................................................5Modulation LEDs ...................................................................................................................................................................................5Power ON/OFF Switch ..........................................................................................................................................................................5Power LED ............................................................................................................................................................................................5RF LED .................................................................................................................................................................................................5Audio Out Jack ......................................................................................................................................................................................5Audio Level Control ...............................................................................................................................................................................6Antenna .................................................................................................................................................................................................6Frequency Select Switches ...................................................................................................................................................................6Operating Instructions ...........................................................................................................................................................................7Indicator Quick Reference .....................................................................................................................................................................7Battery Instructions ...............................................................................................................................................................................7Troubleshooting ......................................................................................................................................................................................8Specifications and Features ..................................................................................................................................................................9Service and Repair ...............................................................................................................................................................................10Returning Units for Repair (10)UCR100LECTROSONICS, INC.4General Technical DescriptionFeaturesThe multi-frequency UCR100 FM Receiver is designed to operate with the Lectrosonics UM100 Transmitter and features microprocessor control of 256 frequencies of operation within each frequency block. Each block cov-ers 25.5 MHz with 0.1 MHz frequency spacing. Any one of ten different frequency blocks are factory available from 537.6 MHz to 805.5 MHz (except 608 to 614 MHz).The receiver’s unique microcontroller design provides simple operation for audio level/limit LED monitor-ing, RF level LED monitoring, squelch, easy on-the-fly frequency programming and low battery warning. The UCR100 Receiver uses 20 kHz FM deviation for ef-ficient use of the bandwidth and dual band companding for clean quiet audio. The receiver operates on one 9 Volt alkaline battery for up to 8 hours and features a blinking LED low battery indicator. The voltages are internally regulated for stability. The receiver is housed in a compact, rugged, lightweight aluminum enclosure. The unit features a durable integral swing-aside battery compartment door.Dual Band CompandorTraditionally, compandors have been a source of distor-tion in wireless microphone systems. The basic problem with conventional systems is that the attack and decay times are always a compromise. If the time constants are fast, high frequency transients will not be distorted, but this will cause low frequency distortion. If the time constants are slower, low frequency audio distortion will be low, but high frequency transients will then be distorted.The 100 system introduces the proven Lectrosonics ap-proach to solving this basic problem, called “dual-band companding.”There are actually two separate compandors in the 100 system, one for high frequencies and one for low fre-quencies. A crossover network separates the frequency bands at 1kHz with a 6dB per octave slope, followed by separate high and low frequency compandors. The attack and release times in the high frequency com-pandor are fast enough to keep high frequency tran-sient distortion at a low level, and the low frequency compandor uses slower time constants, reducing low frequency distortion to well below that of a conventional compandor.Pre-Emphasis/De-EmphasisThe signal to noise ratio of the 100 system is extended by utilizing pre-emphasis (HF boost) in the transmitter and de-emphasis (HF roll off) in the receiver. Pre-em-phasis and de-emphasis in an FM radio system usually provides about a 10dB improvement in the signal to noise ratio of the system, but the high frequency boost in the transmitter must be removed in a purely comple-mentary manner or else the frequency response of the original audio signal will be altered.The dual-band compandor in the 100 Series system essentially provides a dynamic pre-emphasis/de-em-phasis function with low distortion.UCR100 Block DiagramCompact ReceiverRio Rancho, NM5Modulation LEDsThe two modulation LED’s indicate the modulation(audio level) of the incoming signal and can be used for proper adjustment of the transmitter’s mic or audio level.The -20 LED glows when the transmitter modulation is at a high enough level to produce a good audio signal-to-noise ratio. It will normally flicker, or stay lit as you speak into the microphone. The 0 dB lamp indicates a “peak,” showing that the transmitter modulation is at maximum. Constant lighting of the 0 dB LED indicates that the audio gain in the transmitter may be set too high. It is normal and desirable that you see an occa-sional flicker of the 0 dB lamp in typical use.Power ON/OFF SwitchTurns the receiver on or off.Power LEDThe Power LED glows when the power switch is in the ON position and the battery is good. The power LED starts blinking when the battery is becoming exhausted and needs replacement. If the LED does not light up when the switch is turned on or during operation, replace the battery. In normal operation a new alkaline battery will operate the receiver approximately 5 hours before the LED starts blinking and will continue operat-ing for approximately another 3 hours before the LED goes off. At that point the unit and the other LED’s will continue operating for another hour or so but with some degradation in performance. During the low bat-tery blinking period the LED on time decreases as the battery becomes depleated. See the chart in Battery Instructions.The battery level is precision monitored by the internal microprocessor which also drives the Power LED for accurate battery condition.Controls & FunctionsIMPORTANT! When the battery voltage drops below 6 Volts, the power LED will remain off, but the other 3 LEDs will light up and a rush of audio noise and distortion will be heard as the squelch opens. This condition is normal, and is easily remedied by replacing the battery.RF LEDLights when the transmitter is turned on and the re-ceiver has a strong RF signal. The RF LED will start blinking when the RF carrier signal from the transmitter becomes too weak to produce a clean audio signal. The lamp will go out completely when the RF signal is absent or extremely weak.Audio Out JackThe 3.5mm mini phone jack provides an audio output that is controlled by the Audio LEVEL control on the front panel. Generally, the Audio LEVEL control would be set to provide the proper output level to match the required level for your video camera or other equip-ment.The 3.5mm mini jack will accommodate a mono plug (tip & sleeve) or a stereo type jack (tip/ring & sleeve) without harm to the unit. When using a pair of stereo headphones the audio will be mono but will drive both earphones in the correct (binaural) phase.The output at this mini connector jack is designed to also drive a standard impedance earphone, typically 30 Ohms (most common) and usually provides adequate volume for setup and testing. The sound from a low impedance ear phone (ie. 8 Ohms) will not be very loud and may be distorted at higher listening levels.Battery CompartmentPower ON/OFF SwitchModulation LEDsAudio LEVEL ControlAudio OUT JackRF LEDAntennaPower LEDFrequency Select Switches(Under Door)UCR100LECTROSONICS, INC.6 1.6M 100KAudio Level ControlAttenuates the audio output level of the receiver to match the input requirements of the equipment with which it is used. The 3.5mm Mini output jack on thefront panel provides an audio output at adjustable levels for low or high impedance, unbalanced inputs. At the extreme counter-clockwise position of the control knob, the output level of the Mini jack will be -50dBV at full modulation. In the fully clockwise position, the output level will be 0dBV (1 Vrms) at full modulation. intermedi-ate settings are sometimes necessary due to the varia-tions in different input compressors and ALC (automatic level control) circuits on various VCR’s and audio inputs. The markings around the control knob are provided simply as “memory markers;” they are not calibrated with reference to a specific output level.AntennaThe antenna is a 1/4 wavelength 50 ohm flexible non-removable antenna made of durable sheathed bronze wire.Frequency Select SwitchesThese two rotary switches adjust the center frequency of the carrier. The 1.6M is a coarse adjustment and the 100K is the fine adjustment. Each transmitter is factory aligned at the center of its operating range. The default position of the frequency select switches is in the center of the transmitter’s range. The receiver and transmitter switches must be set to the same number/letter combi-nation for proper operation.To gain access to these switches, slide the access door sideways with a fingernail.Frequency Select SwitchesCompact ReceiverRio Rancho, NM 71. Install the battery.2. Set the “FREQUENCY” switches on the side panelto match the switches on the T ransmitter.3. Connect the audio cable.4. Set the front panel switch to ON. Check to see thatthe red POWER LED lights up.5. THIS IS PERHAPS THE MOST IMPORTANT STEPIN THE SET UP PROCEDURE. Adjust the transmitter “gain”. See your transmitter manual (Operating Instructions section) for specific direc-tions on the proper gain adjustment of your particu-lar transmitter.6. Adjust the output control according to the type of in-put on your equipment. The input levels on different VCR’s and P A equipment vary, which may require that you set the output LEVEL control in an interme-diate position. T ry different settings and listen to the results. If the output of the receiver is too high, you may hear distortion or a loss of the natural dynam-ics of the audio signal. If the output is too low, you may hear steady noise (hiss) along with the audio. The UCR100 output was designed to drive camera line level inputs but can operate into camera MIC inputs if the receiver output is reduced to prevent Automatic Limiting Control “pumping” in the cam-era. The output signal level ranges from -50 dBV with the output control fully counter clockwise to 0 dBV with the output control fully clockwise when the transmitter signal is at full modulation.Indicator Quick ReferenceRF - This LED lights up when the transmitter is turned on. This indicates that the receiver is getting an ad-equate RF signal (carrier) from the transmitter.POWER - This LED lights up when the receiver is switched on. It indicates proper battery voltage when the receiver is using a battery. See chart in Battery Instructions.MODULATION - The “-20” LED lights up when anaudio signal is present at an adequate level to produce a good signal to noise ratio. The “0dB” LED lights up when the audio level is high and the signal is being compressed in the transmitter. An extremely high audio level may cause distortion.Operating InstructionsBattery InstructionsThe battery should be a 9 Volt alkaline or lithium, avail-able almost everywhere. An alkaline battery will provide up to 8 hours of operation and a lithium battery will provide up to 20 hours of operation. Carbon zinc batter-ies, even if marked “heavy duty” will only provide about 2 hours of operation. Rechargeable batteries will only operate the receiver for an hour or less. Make sure your batteries are marked “alkaline” or “lithium.” Short battery life is almost always caused by weak batteries or batteries of the wrong type.A steady “ON” LED corresponds to a fresh battery. The LED will blink to indicate a low battery condition and the need for a fresh battery. Continued use will fur-ther deplete the battery eventually causing the LED to automatically turn itself off and remain off until a fresh battery is installed.T o replace the battery, open the bottom battery door cover with your thumb, rotate the door until it is perpen-dicular with the case and allow the battery to fall out of the compartment into your hand. Observe the large and small holes in the battery contact pad before inserting a new battery. Insert the contact end of the battery first, making sure the contacts are aligned with the holes in the contact pad, and then swing the door closed. Y ou will feel it snap into place when it is fully closed. Hours Power LED 1 Solid On 2 Solid On 3 Solid On 4 Solid On 5 Solid On6 Blinks 90% on, 10% off7 Blinks 50% on, 50% off8 Blinks 10% on, 90% off9Off (Replace battery)UCR100LECTROSONICS, INC.8Before going through the following chart, be sure that you have a good battery in the receiver. The POWER LED should glow brightly.SYMPTOMPOSSIBLE CAUSENO POWER LED 1) Receiver switch in “OFF” position 2) Dead or weak battery 3) Battery missing4) Battery installed backwardsNO RF LED 1) T ransmitter not turned on 2) T ransmitter battery dead3) No microphone on the transmitter4) Receiver antenna positioned incorrectly5) T ransmitter and Receiver on different frequencies(FREQUENCY switches do not match transmitter switches)RF LED ON BUT NO SOUND AND NO MODULATION LEDs 1) T ransmitter audio level set to low 2) T ransmitter microphone not connected 3) Microphone switch in “OFF” position 4) Check transmitter modulation LEDs for possible transmitter problem MODULATION LED’s ON BUT NO SOUND1) Receiver LEVEL control turned down 2) Audio cable disconnected3) Recorder or sound system off or not properly adjustedDISTORTED SOUND 1) T ransmitter Audio Level set too high (check mod lamps on Transmitter)2) Weak batterySHORT RANGE1) T ransmitter or receiver antenna not clear of obstructionsHISS AND NOISE -- AUDIBLE DROPOUTS 1) T ransmitter gain (audio level) far too low. 2) Receiver antenna obstructed or damaged. 3) T ransmitter antenna obstructed or damaged. 4) Operating range too great.HISS AND NOISE – PUMPING 1) Camera or recorder has automatic level control. Use line level input on camera or recorder. If there is only a mic input, reduce the receiveroutput to near minimum.TroubleshootingCompact ReceiverRio Rancho, NM 9Available frequencies: 537.6 to 608 MHz, 614 to 691.1 MHz(Blocks 21 through 26)Each unit operates on a single block.Number of frequencies per block: 256 in 100 kHz steps Channel spacing: 100 kHzFrequency control: Crystal Controlled Phase Locked Loop Sensitivity:1 uv (20 dB SINAD)Signal/Noise ratio: 105 dB (system)Squelch quieting: 90 dBAM rejection:50 dB, 10 uv to 100 mv Modulation acceptance: +/-20 kHzSpurious rejection: Greater than 70 dB Third order intercept: 0 dBmFrequency response: 50 Hz to 18 kHz, (±2 db)Distortion: 1% max at 50% modulation (system)Audio output: 0 dBv (1 Vrms) UNBALANCED into 600 ohms Antenna:1/4 wave vertical (fixed)Front panel controls: Single knob controls Audio Output Level LED Indicators: Power (red), RF (green), Level (green), Limit (red)Battery Life: Single 9V Alkaline Battery for approximately8 hours operation.Power consumption: 60 ma.Weight: 7.3 oz with batterySize: 3.6 x 2.4 x 0.8 inches (housing only, belt clip andknob extend beyond the housing.)Specifications subject to change without notice.Specifications and FeaturesUCR100LECTROSONICS, INC.10Service and RepairIf your system malfunctions, you should attempt to correct or isolate the trouble before concluding that the equipment needs repair. Make sure you have followed the setup procedure and operating instructions. Check the interconnect-ing cables and then go through the Troubleshooting section in this manual.We strongly recommend that you do not try to repair the equipment yourself and do not have the local repair shop attempt anything other than the simplest repair. If the repair is more complicated than a broken wire or loose connec-tion, send the unit to the factory for repair and service. Don’t attempt to adjust any controls inside the units. Once set at the factory, the various controls and trimmers do not drift with age or vibration and never require readjustment. There are no adjustments inside that will make a malfunctioning unit start working .Lectrosonics’ Service Department is equipped and staffed to quickly repair your equipment. In warranty repairs are made at no charge in accordance with the terms of the warranty. Out-of-warranty repairs are charged at a modest flat rate plus parts and shipping. Since it takes almost as much time and effort to determine what is wrong as it does to make the repair, there is a charge for an exact quotation. We will be happy to quote approximate charges by phone for out-of-warranty repairs.Returning Units for RepairFor timely service, please follow the steps below:A. DO NOT return equipment to the factory for repair without first contacting us by email or by phone. We needto know the nature of the problem, the model number and the serial number of the equipment. We also need a phone number where you can be reached 8 A.M. to 4 P .M. (U.S. Mountain Standard Time).B. After receiving your request, we will issue you a return authorization number (R.A.). This number will help speedyour repair through our receiving and repair departments. The return authorization number must be clearly shown on the outside of the shipping container.C. Pack the equipment carefully and ship to us, shipping costs prepaid. If necessary, we can provide you with theproper packing materials. UPS is usually the best way to ship the units. Heavy units should be “double-boxed” for safe transport.D. We also strongly recommend that you insure the equipment, since we cannot be responsible for loss of or dam-age to equipment that you ship. Of course, we insure the equipment when we ship it back to you.Lectrosonics USA:Mailing address: Shipping address: Telephone:Lectrosonics, Inc. Lectrosonics, Inc. (505) 892-4501PO Box 15900 581 Laser Rd. (800) 821-1121 Toll-free Rio Rancho, NM 87174 Rio Rancho, NM 87124 (505) 892-6243 FaxUSA USAWeb: E-mail: **********************Lectrosonics Canada:M ailing Address: Telephone: E-mail:49 Spadina Avenue, (416) 596-2202 Sales: ***********************Suite 303A (877) 753-2876 T oll-free Service:*********************Toronto, Ontario M5V 2J1 (877-7LECTRO) (416) 596-6648 FaxCompact Receiver Rio Rancho, NM11ucr100man.indd 5 April 2011581 Laser Road NE • Rio Ranch o, NM 87124 USA • (505)892-4501•(800)821-1121•fax(505)892-6243•**********************LIMITED ONE YEAR WARRANTYThe equipment is warranted for one year from date of purchase against defects in materials or workmanship provided it was purchased from an authorized dealer. This warranty does not cover equipment which has been abused or damaged by careless handling or shipping. This warranty does not apply to used or demonstrator equipment.Should any defect develop, Lectrosonics, Inc. will, at our option, repair or replace any defective parts without charge for either parts or labor. If Lectrosonics, Inc. cannotcorrect the defect in your equipment, it will be replaced at no charge with a similar new item. Lectrosonics, Inc. will pay for the cost of returning your equipment to you.This warranty applies only to items returned to Lectrosonics, Inc. or an authorized dealer, shipping costs prepaid, within one year from the date of purchase.This Limited Warranty is governed by the laws of the State of New Mexico. It states the entire liablility of Lectrosonics Inc. and the entire remedy of the purchaser for any breach of warranty as outlined above. NEITHER LECTROSONICS, INC. NORANYONE INVOLVED IN THE PRODUCTION OR DELIVERY OF THE EQUIPMENT SHALL BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, CONSEQUENTIAL, OR INCIDENTAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THIS EQUIPMENT EVEN IF LECTROSONICS, INC. HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN NO EVENT SHALL THE LIABILITY OF LECTROSONICS, INC. EXCEED THE PURCHASE PRICE OF ANY DEFECTIVE EQUIPMENT.This warranty gives you specific legal rights. You may have additional legal rights which vary from state to state.。
Mini-Circuits 产品说明书.pdf_1719476179.5537326
USB-3SPDT-A18XLKey FeaturesUSB RF-SPDT SwitchProduct OverviewMini Circuits’ USB-3SPDT-A18XL is a general purpose USB controlled RF switch box containing three electro-mechanical SPDT, absorptive failsafe RF switches constructed in break-before-make configuration and powered by +24V DC with a switching time of 25 mSec typical. The three switches can be set up as: three independent SPDT switches, one SPDT and one SP3T switch, a single SP4T switch, or other configurations (see page 6 for details). The RF switches can be operated in all these configurations remotely using the supplied GUI program, or programmed by the user using the included API DLL com object. The RF switches operate over a wide frequency band from DC to 18GHz, have low insertion loss (0.2 dB typical) and high isolation (85dB typical) making the switch box perfectly suitable for a wide variety of RF applications.The USB-3SPDT-A18XL is constructed in a plastic case (size of 4.26” X 6.08” X 2.25”) with 9 SMA(F) connectors (IN, J1, J2 for each switch), a 2.1mm DC socket, and a USB type B port. The model is supplied along with a CD containing a graphical user interface program featuring an API DLL com object. Also included is a 2.7ft. USB cable, a power adapter suitable for both US and EU systems and 2 SMA Male/ SMA Male coaxial semiflex cables for configuring the switch box. Longer USB cables are available as an additional option.The Big Deal• Capable of 100 million cycles • Wide frequency (DC to 18GHz) • High power, 10W• 3 SPDT electromechanical, absorptive, RF switches (Isolation 85 dB typ.) configurable into a SP4T switch• USB HID device, includes control software with an API DLL com object compatible with 32/64 Bit operating systemsXtra Long Life 100 million cycles•Installation CD with Software includedCase Style: LM162550Ω DC to 18GHzApplications• Lab• Test equipment • Control systems• Switching a device in and out of a signal pathUSB RF-SPDT SwitchFeatures• Capable of 100 million cycles• Three DC to 18GHz SPDT absorptive failsafe RF switches in break-before-make configuration• Configurable into SP4T or SP3T switches• Electromechanical switching (Isolation 85 dB typ.)• High power handling, 10W• Greatly simplifies complex switching and timing setups • Easy installation and operation• Compatible with 32/64-bit Windows ® or Linux ®operating systems, as well as LabVIEW ®, Delphi ®, C++, C#, Visual Basic ®, and .NET software 1• Friendly Windows ® Graphical User Interface • Mounting bracket (Optional)• protected by US Patents 5,272,458; 6,414,577; 6,650,210; 7,633,361 and 7,843,289USB-3SPDT-A18XLXtra Long Life 100 million cycles•Order P/NDescriptionPrice B-3SPDT-A18XL USB RF SPDT Switch $980.00 ea.(1-9)RFSW-CDSoftware CD Included1USB-CBL-AB-3+ 2.7ft. USB cableIncluded1AC/DC-24AC/DC 24V DC Adapter Included1141U-4SM+ 4 in. RF cableIncluded2BKT-301-01+Bracket accessory 2$14.95 ea.(+1)Mini-Circuits RF Switch Control Program for USB RF SwitchInstallation CD with Software included50Ω DC to 18GHzNote 1: Windows and Visual Basic are registered trademarks of Microsoft Corporation. Linux is a registered trademark of Linus Torvalds. LabVIEW is a registered trademark of National InstrumentsCorp. Delphi is a registered trademark of Codegear LLC. Neither Mini-Circuits nor the Mini-Circuits USB-3SPDT-A18XL Switch are affiliated with or endorsed by the owners of the above referenced trademarks.Note 2: Bracket ordered separately.Mini-Circuits and the Mini-Circuits logo are registered trademarks of Scientific Components Corporation.Electrical SpecificationsNote 3: Power handling is specified with RF applied to the IN port and output load connected to either J1 or J2 of the respective switch.Absolute Maximum RatingsMinimum System Requirements24V DC IN(2.1mm center positive DC Socket)RF Switch A (J1, IN, J2)(SMA female)RF Switch B (J1, IN, J2)(SMA female)RF Switch C (J1, IN, J2)(SMA female)USB(USB type B receptacle)ConnectionsUSBIN J2J1IN J2J1IN J2J1Block DiagramElectrical Specifications (Continued)Permanent damage may occur if any of these limits are exceeded.*See page 3 for hot switching life. Exceeding the limits noted will result in reduced lifeAccessories IncludedUSB Cable: USB type A plug to USB type B plug • MCL P/N: USB-CBL-AB-3+ (2.7ft.)Two 4 inch coaxial SMA(M)- SMA(M) RF semiflex cables (Operating Temp. -55°C to +105°C)• MCL P/N: 141U-4SM+AC/DC 24V DC Power Adaptor with US and EU two pin power connectors(I max =0.83A, Operating Temp. 0°C to +40°C)• MCL P/N: AC/DC-24Configuration options• Power handling is specified with RF applied to the IN port and output load connected to either J1 or J2 of the respective switch.Outline Drawing: LM1625Outline Dimensions ( )inchmmStandardEWith bracket accessoryBracket ordered separately. For bracket ordering information seeAccessories information table on page 8.BRACKET OPTIONOrdering InformationAccessories InformationNote 4: RF cables used for additional configurations only, see page 6 for details.。
iScope 极光显微镜产品数据表说明书
IS.1053-PLPOLRi ™A N T I MI C R O B I AL PR O T E C T I O NL A Y E R unique rotating system allows the ergonomical positioning of both tubesntensity adjustable 3 W Köhler NeoLED™ illumination with internal 100-he larger aperture of NeoLED™ allows the optical systems of the iScope®microscope to produce images at higher resolutions, very close to thehe Köhler diaphragm provides homogeneous illumination andolarisation models with transmitted light only are supplied with: 360°rotatable polarization filter, 360° rotatable analyzer with 180 incrementsand nonius for 0.2 degree readout, Bertrand lens (build-in), 1 λ first red and1/4 λ retardation plate, a quartz wedge, 45 mm green and blue filters forquipped with a 50 W 12 V halogen epi-illumination and externalupplied with 360° rotatable polarization filter, 360° rotatable analyzerwith 180 increments and nonius for 0.2 degree readout, Bertrand lens(build-in), 1 λ first red plate, 1/4 λ retardation plate, a quartz wedge, sliderswith green/blue and white/neutral densitiy filter. 45 mm green and blueThe unique iCare Sensor is developed to avoid unnecessary loss of energyhe illumination of the microscope automatically switches off shortly afteriScope® allows users to easily insert the power cable into the back of theIS.1053-PLPOLiEuromex Microscopen bv • Papenkamp 20 • 6836 BD Arnhem • The Netherlands • T +31 (0) 26 323 22 11 • info@ • | M A T E R I A L S S C I E N C E |PROD UC T DATAS HEE TACCESSORIES AND SPARE PARTSIS.6210 EWF 10x/22 mm eyepieceIS.6210-C EWF10x/22 mm eyepiece with crosshairs IS.6210-PEWF10x/22 mm eyepiece with pointer IS.6210-CM E WF 10x/22 mm eyepiece with 10/100 micrometer andcrosshairsIS.6310 E WF 10x/20 mm eyepiece 30 mm tubeIS .6310-C EWF10x/20 mm eyepiece with crosshairs, 30 mm tube IS.6310-CM E WF 10x/20 mm eyepiece with 10/100 micrometer andcrosshairs, 30 mm tubeIS.6215 WF15x/16 mm eyepiece IS.6220 WF20x/12 mm eyepieceIS.6299Pair of eyecups for iScope infinity modelsF O R I S CO P E T R A N S M I T T E D P O L A R I Z AT I O NIS.7905-TP lan strain-free PLPOLi 5x/0.12 IOS objective, no cover glass correction. Working distance 15.5 mm IS.7910-T P lan strain-free PLPOLi 10x/0.25 IOS objective, 0.17 mm cover glass corrected. Working distance 10 mm IS.7920-T P lan strain-free PLPOLi 20x/0.40 IOS objective, 0.17 mm cover glass corrected. Working distance 5.1 mm IS.7940-T P lan strain-free PLPOLi 40x/0.65 IOS objective,0.17 mm cover glass corrected. Working distance 0.54 mm IS.7960-T P lan strain-free PLPOLi 60x/0.85 IOS objective,0.17 mm cover glass corrected. Working distance 0.14 mm IS.7900-TP lan strain-free PLPOLi 100/1.25 oil IOS objective, 0.17 mm cover glass corrected. Working distance 0.13 mmIS.9604 Quartz wedge in slider IS.9608 Analyzer 0-360° rotatableIS.9610 Lamda plate first red 530 nm in slider IS.9612Lamda/4 retardation plate in sliderF O R I S CO P E R E F L E C T E D P O L A R I Z AT I O NIS.7905-R P lan strain-free PLPOLRi 5x/0.12 IOS objective, no cover glass correction. Working distance 15.5 mm IS.7910-R P lan strain-free PLPOLRi 10x/0.25 IOS objective, no cover glass correction. Working distance 10 mm IS .7920-R P lan strain-free PLPOLRi 20x/0.40 IOS objective, no cover glass correction. Working distance 5.8 mm IS.7950-R P lan strain-free PLPOLRi 50x/0.75 IOS objective, no cover glass correction. Working distance 0.52 mm. IS.7900-RP lan strain-free PLPOLi S100x/0.80 infinity corrected IOS objective. No cover glass correction. Working distance 2.0 mm.IS .9602-R PolarizerIS.9604-R Quartz wedge in slider IS.9608-R 360° rotatable analyzer in slider IS .9610-R Lamda plate first red 530 nm IS.9612-R Lamda/4 retardation plate in sliderF O R A L L I S CO P E P O L A R I Z AT I O N M O D E L SIS.7202P lan PLi 2x IOS objective for iScope, working distance 18,3 mm. Best to be used together with swing-out condenserIS.9600Polarization filter, 45 mm for lamp house IS.9700 Blue opaque filter, 45 mm for lamp house IS.9702 Green opaque filter, 45 mm for lamp house IS.9704 Yellow opaque filter, 45 mm for lamp house IS.9706 White opaque filter, 45 mm for lamp house SL.5500 NeoLED™ replacement unitSL.3679 50 W 12 V spare bulb for unit (Ri type)AE.3684 T500 mA 250 V Fuses for iScopeAE.3685 T2 A 250 V Fuses for reflected illumination units power supply AE.5130 U niversal Ø 23.2 mm tube adapter with built-in 2x lens for SLR photo camera with APS-C sensor. Needs T2 adapter AE.5025 T2 ring for Nikon D SLR digital camera AE.5040 T2 ring for Canon EOS SLR digital cameraPB.5155Microscope slides 76 x 26 mm, ground edges, 50 pieces PB.5165 Cover glasses 18 x 18 mm, thickness 0.13-0.17 mm, 100 pieces PB.5168 Cover glasses 22 x 22 mm, thickness 0.13-0.17 mm, 100 pieces PB.5245 Lens cleaning paper, 100 sheets per pack PB.5255 Immersion oil (25 ml). n = 1.515PB.5274 Isopropyl alcohol 99% (200 ml)PB.5275C leaning kit: lens cleaning fluid, lint free lens tissue/paper, brush, air blower, cotton swabs。
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CYPRESS CONFIDENTIALPRELIMINARYOvationONS™ 1L - Laser Navigation SensorCYONS1001LFeatures•Laser Sensor—New OptiCheck™ technology—Selectable resolution 400, 800, and 1200 cpi—High speed motion detection (20 in/s Typ; 8G Typ)—Wide operating voltage: 2.7V to 3.6V—Self adjusting power saving modes—Self adjusting frame rate for optimum performance—Motion detect pin output—Internal oscillator — no crystal required—4-Wire SPI port—Fault tolerant laser drive circuitry on chip for eye safety compliance—Minimum number of passive components•Vertical Cavity Surface Emitting Laser (VCSEL)—Integrated within the sensor package—Optical power: Typ 0.520 mW at room temperature*—Wavelength: 850 nm Typ. (840 nm min., 870 nm max.)*•* Class-1 Laser products per IEC60825-1/A2: 2001 and EN60825-1/A1: 2002, with optical output power < 0.743 mW over all spec-ified operating temperatures and supply voltages, and with emissionwavelength between 840 and 870 nm•Molded Optic—12.78 mm distance from PCB to tracking surface Applications•Laser mice•Optical trackballs•Motion sensing applicationsFunctional DescriptionThe CYONS1001L is a two piece kit containing:1.An IC package (with 2 kV ESD) that integrates:ser Detector analog and digital circuitryb.VCSELc.Optical aperture2.A molded plastic piece containing a lens for collimation ofthe VCSEL beam and for imaging of the light scattered from the tracking surface onto the sensor portion of the laser detector. The molded optic has features for registration to the package and attachment to the PC board.Figure 1. CYONS1001L (Two Piece System)Block DiagramFigure 2. CYONS1001L Chip108.35.4Functional OverviewThe CYONS1001L is a complete laser navigation sensor. It resides on a printed circuit board within an optical solution. The CYONS1001L supplies all illumination and optical navigation functions to provide position change data. The CYONS1001L tracks on wide range of surfaces. The device also provides these functions:•SPI interface to USB microcontroller or wireless transmitter •Internal system clock•Fault tolerant laser power control meeting IEC 60825 class1 eye safety requirements When operated within the recommended operating conditions, (25°C; 3.3V) the sensor has this tracking performance: Parameter Min.Typ.Max.Unit Resolution4008001200cpi Speed20in/s Acceleration8GLift sense height 2.8mm Tracking error5% Zero motion1countPin Descriptions[1, 2]Pin QFN Signal Name Type# Of Pins Function14NCS (Chip Select)I1SPI chip select11SCK (Serial Clock)I1SPI clock input10MISO (Master In/Slave Out)O1SPI output15MOSI (Master Out/Slave In)I1SPI input20SHUTDOWN I1Enter Hibernate mode21MOTION O1Motion detect; active LOW output 28EXTCFG I1External configuration for factorytest26AVDD Power1Analog supply voltage2, 4, 9DVDD (Regulator Power)Power3Digital supply voltage25AGND Ground1Analog ground3, 30, Case bottom GND Ground1Digital ground5, 6, 7, 8, 9, 12, 13, 16, 17, 18, 19, 22,23, 24, 27, 31,32, 33, 34, 36, 37, 38, 39NC23No connect1, 35, 40, 41, 42Tie to DGND5Tie to GNDNotes1.SPI pin assignment assumes CYONS1001L is in SPI slave mode.2.See ““Power Supply Connections” on page4” for power and ground pin configurations.DVDD N 126301M 214D CYONS1001L3DGND 2M O T I O N21C S 411S C KAVDD 25AGNDDVDD 29DGND EXTCFG 280I S O 15M O S IDVDD40S H U T D O W NDGND D G N D2G N D 41D G N D40D G N D35Power Supply ConnectionsNoteAdditional power supply connections, setups, and specifications are documented in the CYONS1001L User Guide.Absolute Maximum RatingsParameter Min Typ Max Unit NotesStorage Temperature–4085°C Case temperatureOperating Temperature–1555°C Case temperatureLead Solder Temperature260°C10 secondsSupply Voltage–0.5 (tbd) 3.7 (tbd)VESD2kV All pins, HBM MIL 883 method 3015 Input Voltage–0.5V dd + 0.5VLatch Up Current100mAOperating ConditionsParameter Min Typ Max Unit NotesOperating Temperature545°CPower Supply Voltage 2.7 3.6VPower Supply Rise Time100µsSupply Noise—AVDD (sinusoidal)25mV p-p10 kHz–50 MHzSupply Noise—VDD, DVDD (sinusoidal)100mV p-p10 kHz–50 MHzSerial Port Clock Frequency 2.0MHz Active drive, 50% duty cycle Distance from Lens to Surface Plane12.53 2.7813.03mm Deviation from nominal will adverselyimpact lift detection.Distance from PCB to Tracking Surface12.5512.813.05mmLoad Capacitance100pF MOTION, MISODC Electrical CharacteristicsParameter Min Typ Max Unit NotesDC Supply Current (track mode)12.415.5mADC Supply Current (nap1 mode) 5.47.7mADC Supply Current (nap2 mode) 1.9 3.9mADC Supply Current (sleep mode)250380µAHibernate Supply Current45100µAInput Low Voltage0.8VInput High Voltage0.7V dd VInput Hysteresis100mVInput Leakage Current±1±10µA MOSI, NCSOutput Low Voltage0.7V MISO, MOTIONOutput High Voltage V dd – 0.7VInput Capacitance10pF MOSI, NCSAC Electrical CharacteristicsParameter Min Typ Max Unit NotesMotion Delay after Reset100msHibernate50ms From command to low currentWake from Hibernate100msMISO Rise Time150300ns100 pF loadMISO Fall Time150300ns100 pF loadMISO Delay after SCLK120nsMISO Hold Time0.5µsMOSI Hold Time200nsMOSI Setup Time120nsSPI Time between Write to Register30µs20µsSPI Time between Write to and Read fromRegistersSPI Time between Read and Subsequent Reads400µs4µsSPI Delay from Last Address Bit to First Data BitOutNCS Inactive after Burst Register Access500nsNCS to SCLK Active120nsSCLK to NCS Inactive (for read)120nsSCLK to NCS Inactive (for write)20µsNCS to MISO High Z500ns 5 pF load, Thevenin loadMOTION Rise Time150300ns100 pF loadMOTION Fall Time150300ns100 pF loadTransient Current Supply tbd mA Max supply current during input voltage ramp Ordering InformationPart Number Description Package Type Operating Range5–45°CCYONS1001L-LBXC Sensor in PQFN Package PQFN = Plastic Quad Flat(No Lead)Part Number Description Package Type Operating Range CYONSLENS1001-C Lens5–45°CPackage DiagramsFigure 3. Mechanical and LAND Pads DimensionsFigure 4. Molded OpticDocument #: 001-09868 Rev. *A Page 8 of 9This document is subject to change without notice, and may contain errors of omission or changes in parameters. OvationONS and OptiCheck are trademarks of Silicon Light Machines (a subsidiary of Cypress Semiconductor).PCB12.78 mmTracking SurfaceMOLDED OPTICPACKAGE2.78mmDocument History PageDocument Title: OvationONS™ 1L - Laser Navigation SensorDocument Number: 001-09868REV.ECN NO.Issue Date Orig. of Change Description of Change **49838807/21/2006XSY New Data Sheet*A90660004/03/2007XSY Updated DC Characteristics TableRemoved 1000 dpi resolution option。