440P-M18001中文资料
西门子MM440变频器常用参数设置111111111111111111
•«施耐德变频器Altivar31常用参数设置西门子MM440变频器常用参数设置一 2nd, 2010 by 起重机①参数号②参数功能③参数范围④参数说明/注释⑤起重常用设置值⑥默认设置值①P0000───②驱动装置显示───③无───④显示P0005设置的参数值───⑤无───⑥无①P0003───②用于定义用户参数访问的等级───③0~4───④1标准级3专家级───⑤根据需要选择───⑥无①P0005───②显示选择───③2~4000───④21频率25电压27电流───⑤一般选择21───⑥21①P0010───②调试参数过滤器───③0~30───④1快速调试30工厂的设定值───⑤P0010、P3900恢复为0───⑥0①P0295───②冷却风扇断电延迟时间───③0~3600───④这个时间以秒计───⑤180秒为宜───⑥0①P0304───②电动机的额定电压───③10~2000───④名牌数据实际为准───⑤380伏───⑥230伏①P0305───②电动机的额定电流───③0.01~10000───④名牌数据实际为准───⑤电流叠加A1+A2───⑥3.25A①P0307───②电动机的额定功率───③0.01~2000───④名牌数据实际为准───⑤功率叠加P1+P2───⑥0.75kw①P0308───②电动机额定功率因数───③0.0~1.0───④名牌数据实际为准───⑤cosφ───⑥0①P0311───②电动机的额定速度───③(0~40000)───④名牌数据实际为准───⑤980/1380───⑥0①P0700───②选择命令源───③(0~6)───④选择数字的命令信号源───⑤2代表由端子排输入───⑥2①P0701───②数字输入1的功能───③0~99───④选择数字1功能───⑤1───⑥1①P0702───②数字输入2的功能───③0~99───④选择数字2功能───⑤2───⑥12①P0703───②数字输入3的功能───③0~99───④选择数字3功能───⑤17───⑥9①P0704───②数字输入4的功能───③0~99───④选择数字4功能───⑤17───⑥9①P0705───②数字输入5的功能───③0~99───④选择数字5功能───⑤29───⑥15①P0706───②数字输入6的功能───③0~99───④选择数字6功能───⑤17───⑥15①P0732───②数字输出2的功能───③0~4000───④电动机抱闸投入───⑤52C───⑥52.7①P0733───②数字输出3的功能───③0~4000───④电动机抱闸投入───⑤52C───⑥0①P0970───②工厂复位───③0~1───④0代表禁止复位1代表参数复位───⑤根据需要决定───⑥无①P1000───②频率设定值的选择───③0～77───④3代表固定频率───⑤3───⑥2①P1004───②固定频率4───③-650～650───④快速频率的设定───⑤50───⑥50①P1080───②最低频率───③0～650───④设定马达最低频率───⑤20HZ───⑥0①P1082───②最高频率───③0～650───④设定马达最高频率───⑤50HZ───⑥50①P1120───②斜坡上升时间───③0～650───④斜坡函数曲线不带平滑圆弧时电动机从静止状态加速到最高频率P1082所用时间，如果设定的斜坡时间太短，就有可能导致变频器过流而跳闸───⑤4.0秒───⑥10s①P1121───②斜坡下降时间───③0～650───④同上───⑤3.0秒───⑥10s①P1130───②斜坡上升曲线的起始段圆弧时间───③0～40───④避免突变性的响应，从而使机械设备免受有害的冲击作用───⑤0.5秒───⑥0①P1131───②斜坡上升曲线的结束段圆弧时间───③0～40───④避免突变性的响应，从而使机械设备免受有害的冲击作用───⑤0.5秒───⑥0①P1132───②斜坡下降曲线的起始段圆弧时间───③0～40───④避免突变性的响应，从而使机械设备免受有害的冲击作用───⑤0.3秒───⑥0①P1133───②斜坡下降曲线的结束段圆弧时间───③0～40───④避免突变性的响应，从而使机械设备免受有害的冲击作用───⑤0.3秒───⑥0①P1215───②抱闸制动使能───③0～1───④0代表禁止电动机抱闸制动；1代表使能电动机抱闸制动；如果用P0731、P0732、P0733数字输出功能投入使用，制动继电器在点1打开，而在点2闭合───⑤1───⑥0①P1216───②抱闸制动释放的延迟时间───③0～20───④启动时不用斜坡函数曲线，立即输出f_min───⑤0───⑥1①P1217───②斜坡曲线结束后的抱闸时间───③0～20───④斜坡曲线下降到点2后，变频器以最小频率P1080运行的时间───⑤0───⑥1①P1237───②动力制动的工作/停止周期，定义制动电阻的工作/停止时间的比率───③0～5───④0代表禁止动力制动；1代表工作/停止时间的比率为5%；2代表工作/停止时间的比率为10%；3代表工作/停止时间的比率为20%；4代表工作/停止时间的比率为50%；5代表工作/停止时间的比率为100%；───⑤1───⑥0①P1300───②变频器的控制方式───③0～23───④控制电动机的速度和变频器的输出电压之间的相对关系，0代表行线性特性的V/F控制；1代表带磁通电流控制Fcc的V/F控制；20代表无传感器的矢量控制───⑤20───⑥0①P1800───②脉冲频率───③2～16───④设定变频器功率开关的调制脉冲频率，这一脉冲频率每级可以改变2KHZ.最低的脉冲频率取决于p1082即最大频率和P0310即电动机的额定功率，电动机频率的最大值P1082限定为脉冲调制频率P1800───⑤2───⑥4①P1910───②选择电动机数据是否自动检测───③0～20───④设置为3时，随后显示A0541.启动变频器，自动检测磁化曲线，稍后变频器停止，完成检测───⑤3───⑥0①P1960───②速度控制器的优化───③0～1───④矢量控制时做，当速度优化器优化功能投入时p1960=1，报警信号A0542将被激活。
PT4401N;PT4403N;PT4401A;PT4403A;中文规格书,Datasheet资料
For technical support and more information, see inside back cover or visit 75-W 48-V Input Isolated DC/DC ConverterFeatures•Up to 75W Output:20A @3.3V , 15A @5V •Input Voltage Range:36V to 75V•Programmable Output Voltage •91% Efficiency (PT4403)•1500 VDC Isolation •On/Off Control•Over-Current ProtectionSLTS160B(Revised 7/19/2002)•Differential Remote Sense•Output Over-Voltage Protection •Over-T emperature Shutdown •Undervoltage Lockout•Low Profile Package (12mm)•Compact PCB Layout:(Horizontal Config. 1.45in × 2.6in, V ertical Config. < 1 in 2)•Solderable Copper Case •Agency Approvals PendingFor technical support and more information, see inside back cover or visit PT4401VID4=1VID4=0VID3VID2VID1VID0VoutVout1111N/D * 1.30V 1110 2.10V 1.35V 1101 2.20V 1.40V 1100 2.30V 1.45V 1011 2.40V 1.50V 1010 2.50V 1.55V 1001 2.60V 1.60V 1000 2.70V 1.65V 0111 2.80V 1.70V 0110 2.90V 1.75V 0101 3.00V 1.80V 0100 3.10V 1.85V 0011 3.20V 1.90V 0010 3.30V 1.95V 0001 3.40V 2.00V 03.50V2.05VLogic 0=Pin 12 potential; (–)Remote Sense Logic 1=Open circuit (no pull-up resistors)Notes (i)See SOA curves or consult factory for appropriate derating(ii)The case pins on the through-hole package types (suffixes N &A) must be soldered. For more information see the applicable package outline drawing.Output Voltage Programming InformationPin Descriptions+Vin: The positive input for the module with respect to –V in . When powering the module from a –48V telecom central office supply, this input is connected to the primary system ground.–Vin: The negative input supply for the module, and the 0VDC reference for the Remote On/Off input. When powering the module from a +48V supply, this input is connected to the 48V(Return).Remote On/Off: A positive logic input that is referenced to –V in . Pulling this input down to –V in potential disables the module’s output. If this input is left open-circuit, the module will produce an output whenever a valid input source is applied.VID0 – VID4: Selects the set-point output voltage of the converter according to the applicable program code.VID0 – VID4 must either be connected to (–)Remote Sense or left open circuit. Note: For the PT4402 & PT4403,VID 4 is internally disabled and may be left open circuit.+Vo: The positive power output with respect to -V o , which is DC isolated from the input supply pins. If a negative output voltage is desired, +V o should be connected to the secondary circuit common and the output taken from –V o .–Vo: The negative power output with respect to +V o ,which is DC isolated from the input supply pins. This output is normally connected to the secondary circuit common when a positive output voltage is desired.+Remote Sense: Provides the converter with remote sense capability to regulate the set-point voltage directly at the load. When used with –Remote Sense, the regulation circuitry will compensate for voltage drop between the converter and the load. The pin may be left open circuit,but connecting it to +V o will improve load regulation.–Remote Sense: This is the logic ‘0’ reference for the inputs VID0 – VID4, and provides the converter with remote sense capability when used in conjunction with +Remote Sense. For optimum output voltage accuracy this pin should always be connected to –V o .PT4402VID4= × †VoutN/D *1.05V 1.10V 1.15V 1.20V 1.25V 1.30V 1.35V 1.40V 1.45V 1.50V 1.55V 1.60V 1.65V 1.70V 1.75VPT4403VID4= × †VoutN/D *3.40V 3.56V 3.72V 3.88V 4.05V 4.21V 4.37V 4.53V 4.69V 4.86V 5.02V 5.18V 5.34V 5.50V 5.67V*N/D = Output voltage is not defined†VID 4 (pin 11) of PT4402 & PT4403 is don’t care (×).Note:During operation, changes to the program code should be limited to 15% of V o so as to avoid activating the output OV protection.For technical support and more information, see inside back cover or visit Note A: All data listed in the above graphs has been developed from actual products tested at 25°C. This data is considered typical data for the DC-DC Converter.Note B: SOA curves represent operating conditions at which internal components are at or below manufacturer’s maximum rated operating temperature.Notes:(1)If (–)Remote Sense is not used, pin 12 must be connected to pin 13 for optimum output voltage accuracy.(2)The Remote On/Off input has an internal pull-up. If it is left open-circuit the module will operate when input power is applied. A discrete MOSFET orbipoloar transistor is recommended to control this input. The open-circuit voltage is typically 5V . See application notes for interface considerations.For technical support and more information, see inside back cover or visit Note A: All data listed in the above graphs has been developed from actual products tested at 25°C. This data is considered typical data for the DC-DC Converter.Note B: SOA curves represent operating conditions at which internal components are at or below manufacturer’s maximum rated operating temperature.Notes:(1)If (–)Remote Sense is not used, pin 12 must be connected to pin 13 for optimum output voltage accuracy.(2)The Remote On/Off input has an internal pull-up. If it is left open-circuit the module will operate when input power is applied. A discrete MOSFET orbipoloar transistor is recommended to control this input. The open-circuit voltage is typically 5V . See application notes for interface considerations.For technical support and more information, see inside back cover or visit Note A: All data listed in the above graphs has been developed from actual products tested at 25°C. This data is considered typical data for the DC-DC Converter.Note B: SOA curves represent operating conditions at which internal components are at or below manufacturer’s maximum rated operating temperature.Notes:(1)If (–)Remote Sense is not used, pin 12 must be connected to pin 13 for optimum output voltage accuracy.(2)The Remote On/Off input has an internal pull-up. If it is left open-circuit the module will operate when input power is applied. A discrete MOSFET orbipoloar transistor is recommended to control this input. The open-circuit voltage is typically 5V . See application notes for interface considerations.Operating Features and System Considerations for the PT4400 Series of Isolated DC/DC ConvertersOver-Current ProtectionT o protect against load faults, the PT4400 series incor-porates output over-current protection. Applying a load that exceeds the converter’s over-current threshold (see applicable specification) will cause the regulated output to momentarily fold back and shut down. Following shutdown the module will periodically attempt to auto-matically recover by initiating a soft-start power-up. This is often described as a “hiccup” mode of operation, whereby the module continues in the cycle of succesive shutdown and power up until the load fault is removed. Once the fault is removed, the converter then automatically recovers and returns to normal operation.Output Over-Voltage ProtectionThe PT4400 DC/DC converter series incorporates pro-tection circuitry that continually senses for an output overvoltage (OV) condition. The OV threshold auto-matically tracks the VID output voltage program setting to a level that is 25% higher than that programmed at the control pins, VID0 through VID4. If the converter output voltage exceeds this OV threshold, the converter is immediately shut down and remains in a latched-off state. In order to resume normal operation the converter must be actively reset. This can only be done by momen-tarily removing the input power to the converter. For failsafe operation and redundancy, the OV protection uses circuitry that is independent of the converter’s internal feedback loop.Over-Temperature ProtectionOver-temperature protection is provided by an internal temperature sensor, which closely monitors the tempera-ture of the converter’s metal case. If the case temperature exceeds a nominal 115°C, the converter will shut down. The converter will then automatically restart when the sensed temperature drops back to approximately 105°C. When operated outside its recommended thermal derating envelope (see data sheet SOA curves), the converter will typcially cycle on and off at intervals from a few seconds to one or two minutes. This is to ensure that the internal components are not permanently damaged from exces-sive thermal stress.Under-Voltage LockoutThe Under-Voltage Lock-Out (UVLO) is designed to prevent the operation of the converter until the input voltage is close to the minimum input voltage. The converter is held off when the input voltage is below the UVLO threshold, and turns on when the input voltage rises above the threshold. This prevents high start-up current during normal power-up of the converter, and minimizes the current drain from the input source during low input voltage conditions. The converter will meet full specifications when the minimum specified input voltage is reached. The UVLO circuitry also overrides the operation of the Remote On/Off control. Only when the input voltage is above the UVLO threshold will the Remote On/Off control be functional.Primary-Secondary IsolationThe PT4400 DC/DC converter series incorporates elec-trical isolation between the input terminals (primary) and the output terminals (secondary). All converters are production tested to a withstand voltage of 1500VDC. This specification complies with UL60950 and EN60950 and the requirements for operational isolation. This allows the converter to be configured for either a positive or negative input voltage source. The data sheet ‘Pin De-scriptions’ section provides guidance as to the correct reference that must be used for the external control signals. Fuse RecommendationsIf desired, an input fuse may be added to protect against the application of a reverse input voltage.Thermal ConsiderationsAirflow may be necessary to ensure that the module can supply the desired load current in environments with elevated ambient temperatures. The required airflow rate may be determined from the Safe Operating Area (SOA) thermal derating chart (see converter specifica-tions). The recommended direction for airflow is into, or perpendicular to, the longest side of the module’smetal case. See Figure 1.into (perpendicular to) the longest side.Figure 1For technical support and more information, see inside back cover or visit Using the Remote On/Off Function on the PT4400 Series of Isolated DC/DC ConvertersFor applications requiring output voltage On/Off control, the PT4400 DC/DC converter series incorporates a “Re-mote On/Off” control (pin 1). This feature can be used toswitch the module off without removing the applied input source voltage.The converter functions normally with Pin 1 open-circuit, providing a regulated output voltage when a valid source voltage is applied to +V in (pins 4, 5), with respect to-V in (pins 2, 3). When a low-level 1 ground signal is applied to pin 1, the converter output will be turned off. Figure 1 is an application schematic, which shows the typical use of the Remote On/Off function. Note the dis-crete transistor (Q1). The Remote On/Off pin has its own internal pull-up, allowing it to be controlled with an open-collector or open-drain device (See notes 2 & 3).T able 1 gives the threshold requirements.When placed in the “Off” state, the standby current drawn from the input source is typically reduced to less than 1mA.Table 1; Pin 1 Remote On/Off Control Requirements 1Parameter Min Typ MaxEnable (V IH) 4.5V——Disable (V IL)——0.8VV o/c [Open-Circuit] 5.0VI in [pin 1 at –V in]——–0.5mANotes:1.The Remote On/Off control uses –V in (pins 2, 3) as itsground reference. All voltages are with respect to –V in. e an open-collector device (preferably a discretetransistor) for the Remote On/Off input. A pull-upresistor is not necessary. T o disable the output voltage, the control pin should be pulled low to less than +0.8V.3.The Remote On/Off pin may be controlled with devices thathave a totem-pole output. This is provided the output high-level voltage (V OH) meets the module’s minimum V IH specified in T able 1. Do not apply more than +20V.If a TTL gate is used, a pull-up resistor may be required to the logic supply voltage.4.The PT4400 converters incorporate an “Under-VoltageLockout” (UVLO). The UVLO keeps the converter off until the input voltage is close to the minimumspecified operating voltage. This is regardless of the state of the Remote On/Off control. Table 2 gives the UVLO input voltage thresholds.Figure 1Turn-On Time: In the circuit of Figure 1, turning Q1 on applies a low-voltage to pin 1 and disables the converter output. Correspondingly, turning Q1 off allows pin 1to be pulled high by an internal pull-up resistor. The con-verter produces a regulated output voltage within 50ms. Figure 2 shows the output response of a PT4401 following the turn-off of Q1. The turn off of Q1 corresponds to the drop in Q1 Vgs. Although the rise-time of the output voltage is short (<5ms), the indicated delay time will vary depending upon the input voltage and the module’s internal timing. The output voltage of the PT4401 was set to 3.3V by connecting VID0 (pin 7), VID2 (pin 9), and VID3 (pin 10) to the (–)Remote Sense (pin 12). The waveforms were measured with 48VDC input voltage, and a 10A resistive load.Figure 2–Table 2; UVLO Thresholds 4Series V in Range UVLO ThresholdPT440036 – 75V32V ±2VQ1 Vgs (10V/Div)For technical support and more information, see inside back cover or visit Pin-Coded Output Voltage Adjustment on thePT4400 Programmable DC/DC ConvertersThe PT4400 series of isloated DC/DC converters have a programmable output voltage. In each case the desired output voltage must be selected from one of a number of discrete voltages using the voltage programming control pins. Depending on each model’s resolution and adjust-ment range, there are up to five control pins. They are identified VID0–VID4 (pins 7–11) respectively. By selectively strapping these control pins to (–)Remote Sense (pin 12), the output voltage can be programmed in incremental steps over the defined output voltage range. The program code and output voltage range of the PT4401 is also compatible with the “Voltage ID” code defined in the Intel® VRM 8.2 specification. Refer to Figure 1 for the connection schematic, and the product specification sheet for each model’s applicable program code.Notes:1.The programming convention is as follows:-Logic 0:Connect to pin 12 (–Remote Sense).Logic 1:Open circuit/open drain (See notes 2, & 4) 2.Do not connect pull-up resistors to the voltageprogramming pins.3.T o minimize output voltage error, always use pin 12(-Remote Sense) as the logic “0” reference. While -Vout (pins 13-16) can also be used for programming, doing so will degrade the voltage selection accuracy and loadregulation of the product.4.When VID0–VID4 are all open circuit (logic 1), theoutput voltage is undefined. In this state the outputvoltage of the converter cannot be guaranteed, and can vary with output load and input voltage.Figure 15.On all models other than the PT4401, the contol inputVID4 (pin 11) is internally disabled and not functional.6.If active devices are used to ground the voltage controlpins, low-level open drain MOSFET devices should beused over bipolar transistors. The inherent V ce(sat) inbipolar devices introduces errors in the device’s internalvoltage control circuit. Discrete transistors such as theBSS138 or IRLML2402 are examples of appropriatedevices.Active Voltage Programming:Special precautions should be taken when making changes to the voltage progam code while the output is active. This activity induces a transient, which may activate the module’s output over-voltage (OV) protection. Once triggered the OV protection circuit latches the output off, and requires the momentary removal of input power to reset the module. OV protection trips can be avoided by limiting the output voltage adjustment to no more than a 15% change from the initial voltage. Large transi-tions are best made with a series of incremental changes, allowing 100µs settling time between each program state. When using active devices to program the output voltage, their state should be asserted prior to input power being applied. An alternative is to pull pin 1 (Remote On/Off) to -V in (pins 2, 3) during the application of power, assert the required program code, and then release pin 1. The module will than initiate a soft-start power-up to the desired program voltage.–For technical support and more information, see inside back cover or visit PACKAGAddendum-Page 1PACKAGING INFORMATIONOrderable DeviceStatus(1)Package Type PackageDrawing Pins Package QtyEco Plan(2)Lead/Ball Finish MSL PeaPT4401N NRND SIP MODULEENM 218TBD Call TI Level-1-215C PT4403NOBSOLETE SIP MODULEENM21TBDCall TICall TI(1)The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.(2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.t information and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable fo Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retard in homogeneous material)(3)MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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MICROMASTER 440通用变频器
目录1 MICROMASTER 440 变频器的参数.................................................................... ................................... 1-1 1.1 MICROMASTER 440 变频器的系统参数.................简介.......................................................................1-2 1.2 快速调试(P0010=1)..... ................... ....................................................................................................1-4 1.3 命令和驱动数据组一概览........ ............. ......................... ......................................................................1-51.4 参数的说明......................................... .................................................................................................1-62 功能框图.............................................. .................................................................................................... 2-13 二进制互联连接（BiCo）功能................................................................................................................ 3-1 3.1 概述..................................................................................................................................................... 3-2 3.2 怎样进行BiCo 设置？......................................................................................................................... 3-2 3.3 BiCo 控制字和状态字的用法................................................................................................................. 3-43.4 BiCo 的连接............................................................ ............................................................................. 3-54 通讯....................................................................... .................................................................................. 4-1 4.1 采用的串行通讯接口............................................................................................................................ 4-2 4.2 串行通讯的工作情况............................ ................................................................................................. 4-2 4.2.1 概述.................................................................................................................................................... 4-2 4.2.2 RS485 的排障..................................................................................................................................... 4-3 4.3 采用通用的串行接口协议................................................................................ ................... ...................4-3 4.3.1 通讯报文的结构............................................................ ...................................................................... 4-4 4.3.2 USS 协议有关信息的详细说明........................................... .............................................................. 4-4 4.3.3 有效的数据字符.................................................................... .............................................................. 4-5 4.3.4 USS 的任务和应答.............................................................................................................................. 4-7 4.3.5 PKW 举例：..................................................................... .................................................................4-10 4.3.6 PZD 区域（过程数据区）................................................... .................................................................4-12 4.3.7 任务报文（主站→MICROMASTER4）................................................................................................4-12 4.3.8 应答报文（MICROMASTER4→主站）............................. ..................................................................4-13 4.3.9 MICROMASTER4 有关USS 通讯的参数设置.................. ..................................................................4-15 4.3.10 基本设定................................................................................................................... ........................4-16 4.3.11 一般的高级设置.................................................................................................................................4-16 4.3.12 较复杂的高级设置.............................................................................................................................4-17 4.3.13 与早期MICROMASTER 产品的兼容性....... . ...................................................................................4-17 4.3.14 读出和写入参数............................................... .................................................................................4-18 4.3.15 广播方式............................................................................................................................................4-19 4.3.16 通过USS 利用BiCo（二进制互联连接）...... . ....................................................................................4-19 4.4 PROFIBUS....................................................... . .................................................................................. 4-20 4.4.1 概况............................................................... . .................................................................................. 4-20 4.4.2 PROFIBUS 的使用........................................ .................................................................................... 4-20 4.5 PROFIBUS 模板............................................. . .................................................................................... 4-214.5.1 PROFIBUS 模板的特点................................. . .................................................................................. 4-215 高级操作板（AOP）..................................................... . .......................................................................... 5-1 5.1 警告和说明........................................................................ .................................................................... 5-4 5.1.1 特殊键的功能...................................................................................................................................... 5-4 5.2 应用举例............................................................................... . .............................................................. 5-5 5.2.1 采用AOP 控制单台变频器.......................................................... ....................................................... 5-55.2.2.3 网络控制－PC 方式.................................................................................................................... 5-7 5.2.3 参数的“读出”.............................................................. ................................................................. 5-8 5.2.4 参数的“下载”.................................................................. ............................................................... 5-9 5.2.5 AOP 的参数.................................................................... . ..................................................................5-10 5.2.6 从站方式和DriveMonitor 的操作................ . ....................................................................................5-10 5.2.7 MM3 参数的读出..................................... . .........................................................................................5-11 5.2.8 定时器的操作........................................... . .........................................................................................5-11 5.3 AOP 开始工作........................................................................................................................................5-14 5.3.1 接通电源和初始化............. . ...............................................................................................................5-14 5.3.2 语言文本的选择...................................... . ..........................................................................................5-15 5.3.3 开机“帮助”............................... . .....................................................................................................5-15 5.3.4 常规的操作屏幕.............................. . ..................................................................................................5-15 5.3.5 主菜单（机旁操作方式）.................................... . ..............................................................................5-16 5.3.6 请求等待................................................................ ............................................................................5-17 5.4 操作菜单................................................................................................................................................5-17 5.4.1 机旁操作方式下的操作........................................................................................................................5-17 5.4.1.1 通讯故障..........................................................................................................................................5-18 5.4.1.2 显示变频器的状态............... ............................................................................................................5-18 5.4.1.3 变频器类型的检验..................... ......................................................................................................5-18 5.4.2 主站方式下的操作................ . ............................................................................................................5-18 5.4.2.1 广播操作方式........................................... . .....................................................................................5-19 5.4.2.2 通讯故障..........................................................................................................................................5-19 5.5 选择操作方式.........................................................................................................................................5-19 5.5.1 机旁操作方式........................................................................................................... ......................... 5-20 5.5.2 主站方式................................................................................................................... ......................... 5-20 5.5.3 内部方式................................................................................................................... .........................5-20 5.5.4 从站方式.............................................................................................. ............................................. 5-20 5.5.5 PC 方式..................................................................................................... ........................................ 5-21 5.6 参数的访问............................................................................................................................................ 5-21 5.6.1 标准访问级的参数....................................................................... ...................................................... 5-21 5.6.2 功能键的使用................................................................................ .................................................... 5-22 5.6.2.1 屏幕显示滚动功能................................................................ .......................................................... 5-22 5.6.2.2 修改参数数值的某一位数字................................................ ............................................................ 5-22 5.6.2.3 跳转功能.......................................................................................................................................... 5-22 5.6.3 专家级参数................................................................................. ....................................................... 5-23 5.6.3.1 下标参数.............................................................................. ........................................................... 5-23 5.6.4 AOP 存储的参数组................................................................... ......................................................... 5-24 5.6.5 工程设计.................................................................................... ........................................................ 5-24 5.7 AOP 设定和组态.................................................................................................................................... 5-25 5.7.1 设定菜单..................................................................... ....................................................................... 5-25 5.7.1.1 背景亮度......................................................................................................................................... 5-25 5.7.1.2 屏幕对比度............................................................. ....................................................................... 5-26 5.7.1.3 用大字符显示.................................................................................................................................. 5-265.7.1.7 参数组的名称..................................................................................... ........................................... 5-27 5.7.1.8 设定时间/日期.......................................... ..................................................................................... 5-28 5.7.1.9 AOP 复位....................................................................................................................................... 5-28 5.8 故障指示............................................................................................................................................... 5-29 5.8.1 故障屏幕...................................................................................... ..................................................... 5-29 5.8.2 报警屏幕............................................................................................................................................ 5-30 5.8.3 多重故障................................................................................. .......................................................... 5-30 5.8.4 多重报警................................................................................. .......................................................... 5-30 5.8.5 故障和报警同时发生............................................................... .......................................................... 5-31 5.8.6 变频器的故障码....................................................................... ......................................................... 5-31 5.8.7 变频器的报警码........................................................................................ ........................................ 5-315.8.8 变频器的故障/ 报警记录（P0947）.............................................................................................. 5-316 编码器模板.............................................................................................................................................. 6-1 6.1 前言...................................................................................................................................................... 6-2 6.2 一般情况............................................................................................................................................... 6-3 6.3 安装...................................................................................................................................................... 6-4 6.3.1 准备工作................................................................................... ........................................................ 6-4 6.3.1.1 变频器的准备工作........................................................................................................................... 6-4 6.3.1.2 编码器模板的准备工作.......................................................... ......................................................... 6-5 6.3.2 接线方法的举例.................................................................................................................................. 6-8 6.4 调试................................................................................................................................................................. 6-9 6.4.1 TTL 编码器............................................................. ...........................................................................6-10 6.4.2 HTL 编码器................................................................... .....................................................................6-11 6.4.3 外接电源......................................................................... ...................................................................6-11 6.4.4 编码器模板的参数化........................................................ ..................................................................6-12 6.5 故障的排除............................................................................................................................................6-14 6.5.1 LED 指示灯............................................................ ...........................................................................6-14 6.5.2 故障码....................................................................... ........................................................................6-156.6 编码器模板的技术规格................................................... ......................................................................6-157 MICROMASTER 440 变频器的制动电阻..................................... ...........................................................7-1 7.1 技术数据...................................................................................... .........................................................7-2 7.2 安装.......................................................................................................................................................7-2 7.3 接线.......................................................................................................................................................7-2 7.4 制动电阻的接线和外形尺寸...................................................................................................................7-37.5 制动电阻的选型........................................................... .........................................................................7-48 选件安装图............................................................................................................................................... 8-1插图图4-1 典型的RS485 多站接口.................................................................................................................... 4-3 图4-2 通讯报文的结构................................................................................................................................. 4-4 图4-3 地址（ADR）的位号......................................................................................................................... 4-4图6-1 编码器模板的外观........................................................................................ .................................... 6-3 图6-2 变频器的铭牌........................................................................................................... ........................ 6-4 图6-3 选件的安装顺序........................................................................................................ ....................... 6-5图6-4 屏蔽接线端和PE 端子.......................................................................................... ......................... 6-5 图6-5 编码器模板上的LED 指示灯................................................................................. ......................... 6-6 图6-6 编码器模板的DIP 开关................................................................................................ .................... 6-7 图6-7 TTL 编码器的接线(5V DC) ................................................................................ ............................ 6-8 图6-8 HTL 编码器的接线(18V DC) .................................................................................. ........................ 6-8 图6-9 具有外接电源的编码器............................................................................................. ........................ 6-9 图6-10 编码器模板的安装方法....................................................................................... ............................ 6-9 图6-11 编码器模板上的LED 指示灯..........................................................................................................6-14表格表3-1 BiCo 的连接（r0019 至r0054）..................................... ................................................................. 3-5 表3-2 BiCo 的连接（r0055 至r1119）....................................... ............................................................. 3-6 表3-3 BiCo 的连接（r1170 至r2050）.......................................... .......................................................... 3-7 表3-4 BiCo 的连接（r2053 至r2294）............................................ ........................................................ 3-8 表4-1 任务识别标记ID 的定义............................................................ ....................................................... 4-7 表4-2 应答识别标记ID 的定义............................................................ ....................................................... 4-8 表4-3 对应答识别标记ID 的错误数值=“任务不能执行”的定义............... .................................................. 4-9 表4-4 PZD 区的结构..................................................................................... ..............................................4-12 表4-5 变频器的控制字（STW）................................................................ ................................................4-12 表4-6 变频器的状态字（PZD）.................................................................. ...............................................4-13 表4-7 实际例子........................................................................................ ....................................................4-14 表4-8 比较表（MICROMASTER4/早期生产的MIsCROMASTER 变频器）. ............................................4-18 表4-9 PROFIBUSSUB-D 插座的插针功能分配.............................................. ............................................ 4-23 表4-10 与数据传输速率相应的最大电缆长度................................................. ............................................ 4-23 表4-11 插头/座和电缆的订货号........................................................................ ............................. ........... 4-23 表4-12 技术数据.............................................................................................. ........................... .............. 4-24 表4-13 有关PROFIBUS 的订货资料................................................................... ...................................... 4-241 MICROMASTER 440 变频器的参数1.1 MICROMASTER 440 变频器的系统参数简介“参数说明”的编排格式如下。
M440变频器参数设定知识
MM440变频器为例介绍设置方法：1、基本操作面板BOP进行设置在缺省设置时，用BOP 控制电动机的功能是被禁止的。
如果要用BOP 进行控制，参数P0700 ＝1，参数P1000 ＝1。
第一步：设置将电机铭牌数据输入变频器内进行优化：为了能够查看变频器所有参数，我们先设置P0003＝3 P0004＝0P0010＝1 （进行快速调试）P0300设置电动机的类型含义 1为异步电动机 2为同步电动机P0304设置电动机的额定电压？ VP0305设置电动机的额定电流？ AP0307设置电动机的额定功率？ KWP0310设置电动机的额定频率 ? HzP0311设置电动机的额定转速 ? r/minP3900=1 含义结束快速调试其它参数按工厂设置使参数复位此时P0003可能恢复到默认的1级（标准级）如还需要更改参数重新将P0003＝3手动转车设置方法按第一步设置完成后（ BOP面板P0700 ＝1 P1000=1）（AOP面板P0700 ＝4 P1000=1）按电动机点动，按运行电动机，按停止电动机。
按改变电动机的转动方向，按增加输出频率，按减少输出频率。
变频器默认输出频率为5Hz,要想改变初始输出频率，只须改变P1040的值，即可改变初始输出频率，按你设定的初始频率运行。
如果您想要能够正→反或反→正方向进行增加或减小输出频率,应设定P1032＝0。
使电机只有单方向增加或减小输出频率应将P1032=1。
**** 通过PROFIBUS模板的通讯设置方法按第一步设置完成后设置站号P0918 必须与PLC组态配置的站号一致P1000=6 P0927=15(二进制数显示为1111) P0700=6说明： 1、变频器接收PLC的字第一个字为控制字，第二个字为主设定值。
（说明：变频器接收的字第一个PZD 字中位10 必须置1，这样，变频器才能将把它作为合法的过程数据来接收。
为此，必须在第一个PZD 字中把控制字1传送给变频器。
MT8801规格书-中文_Rev1.00
芯片标记：
MT8801 YY WW xxxx
生产内部代码 生产周代码 生产年代码
管脚描述
Name Pin No.
COMP
1
DSEN
2
VDD
3
CS
4
DRAIN 5,6
NC
7
GND
8
Description 内部误差放大器的输出引脚。用一个电容将其与地串联实现频率补偿。 输出电压的反馈引脚。 供给电压引脚。 内部 MOSFET 的源极，同时用来检测源极电流。 内部 MOSFET 的漏极。 无连接。 芯片地。
应用
待机电源 智能调光电源 其他需要独立供电模块的应用
典型应用电路
L
XP1
N
BRG
C1 D2
R3
R4
C2
R1
MT8801 3 VDD Drain 5 7 NC Drain 6 1 COMP CS 4 2 DSEN GND 8
C3
R2 L1
Vo (16V)
D1
C4 R5
GND
MT8801 Rev. 1.00
第6页
Maximizing IC Performance
MT8801
高 PF、降压型开关电源驱动器
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第1页
Maximizing IC Performance 极限参数
VDD 引脚电压 Drain 引脚电压 COMP/CS/DSEN 引脚电压 焊接温度 （10 秒） 存储温度
西门子440系列变频器培训课件
变频器维护保养
变频器常见故障分析
4、雷击、感应雷电 雷击或感应雷击形成的冲击电压有时也能造成变频器的损坏。此外，当电
源系统一次侧带有真空断路器时，断路器开闭也能产生较高的冲击电压。变 压器一次侧真空断路器断开时，通过耦合在二次侧形成很高的电压冲击尖峰。
变频器常见故障分析
2、安装环境 变频器属于电子器件装置，在其规格书中有详细安装使用环境的
要求。振动是对电子器件造成机械损伤的主要原因，对于振动冲击较 大的场合，应采用等避振措施；潮湿、腐蚀性气体及尘埃等将造成电 子器件生锈、接触不良、绝缘降低而形成短路，作为防范措施，应对 控制板进行防尘处理，并采用封闭式结构；温度是影响电子器件寿命 及可靠性的重要因素，特别是器件，应根据装置要求的环境条件安装 或避免日光直射。定期检查变频器的空气及冷却风扇也是非常必要的。 3、电源异常
振动通常是由于电机的脉动转矩及机械系统的共振引起的，特别是 当脉动转矩与机械共振电恰好一致时更为严重。噪声通常分为变频装 置噪声和电动机噪声，对于不同的安装场所应采取不同的处理措施： 利用变频器的频率屏蔽功能，使这些共振点排除在运行范围之外；变 频器噪声主要有冷却风扇抗器产生，因选用低噪声器件；在电动机与 变频器之间合理设置交流电抗器
变频器常见故障分析
2、电动机温度过高及运行范围 对于现有电机进行变频调速改造时，由于自冷电机在低速运行时
冷却能力下降造成电机过热。此外，因为变频器输出波形中所含有的 高次谐波势必增加电机的铁损和损，因此在确认电机的负载状态和运 行范围之后，采取以下的相应措施：对电机进行强冷或提高电机规格 等级；更换变频专机；限定运行范围，避开低速区。 3、振动、噪声
440变频器使用大全
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 A B C D E F
MICROMASTER 440变频器 0.12kW - 250kW
系统参数 排障 MICROMASTER 440 的技术规格 可选件
使用大全 用户文件
电磁兼容性 MICROMASTER 440 变频器的参数表 功能框图 二进制互联连接（BiCo）功能 通讯 高级操作板（ AOP ） 编码器 制动电阻
Email： techsupport@ad.siemens.de 星期一至星期五：上午 7： 00 至下午 5： 00 （当地时间） 西门子（中国）有限公司技术支持部 北京 电话： 传真： 010 – 64738566 010 – 64731096，647地址 用户可以在以下网址查到技术资料和一般信息： http：///products/sd。 联系地址： 如果您在阅读本手册时有什麽疑问或问题，请根据本手册封底的地址与西门子公司的办事处联 系。
本手册中对某些有效的功能可能未加说明。但是，在新的控制装置 中或进行服务时，并不因为西门子公司提供了这些功能而要承担任 未经书面许可，不得翻印、传播、或使用本手册及其相关内 何责任。 容。违者将对所造成的损害负法律责任。西门子公司保留一切 编审过程中，我们对本手册的内容与所述的硬件和软件的一致性进 权利，包括由专利许可、实用样机注册、或工程设计等所产生 行了审核。但是，仍然可能存在矛盾和谬误的地方，不可能保证它 的所有权利。 们完全一致。我们将定期检查本手册中涵盖的内容，并在以后修订 的版本中予以必要的修正。欢迎提出改进的建议。 © Siemens AG 2001。保留一切权利。 西门子公司的手册都是用无氯纸张印刷的，这种纸张的生产原料来 源于可持续生长的森林。打印和装订的过程中未使用化学溶剂。 MICROMASTER® 是西门子公司已注册的商标。 保留不予先通知而修改本手册的权利。
8001透氧仪中文说明书
Illinois Instruments, Inc. 8001 Oxygen Permeation Analyzer Operator’s Manual 8001 使用说明Illinois Instruments, Inc2401 Hiller Ridge RoadJohnsburg, IL 60050Tel: 815-344-6212Fax: 815-344-6332Web: 8001 IM Ver. 00 1 of 65Updated 02/20/04Illinois Instruments, Inc. 8001 Oxygen Permeation Analyzer Operator’s Manual目录第一章：简介第二章：操作原理第三章：安装3.1 电压选择器/保险盒3..2 连接气路3.2连接冷却循环器3.4 安装串行口控制器第四章：软件4.1 系统配置4.2 安装4.3 连接仪器第五章：系统校对5.1 用薄膜进行校对5.2用气体进行校对5.3BASELINE第六章：渗透测试6.1 测试设置6.2 预备薄膜6.3开始测试6.4结束测试6.5报告生成8001 IM Ver. 00 2 of 65Updated 02/20/04Illinois Instruments, Inc. 8001 Oxygen Permeation Analyzer Operator’s Manual 第七章：流速调节和RH（相对湿度）调节7.1流速调节7.2RH调节第八章：故障分析第九章：附件和更换零件第十章：维护和保修10.1 维护10.2 保修第十一章：技术指标8001 IM Ver. 00 3 of 65Updated 02/20/04Illinois Instruments, Inc. 8001 Oxygen Permeation Analyzer Operator’s Manual1.0简介谢谢你购买我们的仪器。
IRFP440中文资料
Symbol
D
G
S
Packaging
JEDEC STYLE TO-247
SOURCE DRAIN GATE
DRAIN (FLANGE)
4-347
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
LD
Measured from the drain Modified MOSFET
Lead, 6mm (0.25in) from Symbol Showing the
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
BVDSS VGS = 0V, ID = 250µA (Figure 10)
500
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VGS(TH) VGS = VDS, ID = 250µA
2.0
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IDSS VDS = Rated BVDSS, VGS = 0V
PowerPC 440中文资料
The PowerPC® 440 Core A high-performance, superscalar processor core for embedded applicationsIBM Microelectronics DivisionResearch Triangle Park, NC09/21/1999OverviewThe PowerPC 440 CPU core is the latest addition to IBM’s family of 32-bit RISC PowerPC embedded processor cores. The PPC440’s high-speed, superscalar design and Book E Enhanced PowerPC Architecture™ put it at the leading edge for high performance system-on-a-chip (SOC) designs. The PPC440 core marries the performance and features of standalone microprocessors with the flexibility, low power, and modularity of embedded CPU cores.Target ApplicationsThe PPC440 Core is primarily designed for applications in which maximum performance and extensive peripheral integration are the critical selection criteria.Target market segments for the PPC440 core include:•Consumer applications including digital cameras, video games, set-top boxes, and internet appliances •Office automation products such as laser printers, thin-client systems, and sub-notebooks •Storage and networking products such as RAID controllers, routers, ATM switches, cellular basestations, and network cardsFeatures•2-way superscalar design•Out-of-order issue, execution, and completion•Dynamic branch prediction•Single-cycle branch latency•Three execution pipelines•Single-cycle throughput on 32x32 multiply•24 DSP operations (16x16+32->32, MAC with single-cycle throughput)•Real-time non-invasive instruction traceTypical ApplicationA typical system on a chip design with the PPC440 Core uses the CoreConnect TM bus structure for system level communication. High bandwidth peripherals and the PPC440 core communicate with one another over the processor local bus (PLB). Less demanding peripherals share the on-chip peripheral bus (OPB) and communicate to the PLB through the OPB Bridge. The PLB and OPB provide common interfaces for peripherals and enable quick turnaround, custom solutions for high volume applications.F igure 1 shows an example PPC440 Core-based system on a chip, illustrating the two-level bus structure and modular core-based design.Figure 1. Example PPC440 Core + ASIC SpecificationsPerformance (Dhrystone 2.1)1000 MIPS @ 555MHz (est.), Nominal silicon, 1.8V, 55°C 720 MIPS @ 400MHz (est.), Slow silicon, 1.65V, 85°CFrequency0 – 400MHz , Slow silicon, 1.65V, 85°C555MHz nominalPower Dissipation 2.5mW / MHz @ 1.8V (est.), hard core with 32KI / 32KD cachesArchitecture32-bit PowerPC Book E compliant, application code compatible withall PowerPC processorsDie Size 4.0 mm2 for CPU only (est.)Caches0-64KB, 32-way to 128-way associativeTechnology0.18 µm CMOS copper technology0.12 µm L eff , 4 levels of metalPower Supply 1.8 VoltsTransistors 5.5M, hard core with 32KI / 32KD cachesOperating Range-40°C to 125°C, 1.6V to 1.9VData Bandwidth Up to 6.4 GB/sec via three 128-bit, 200MHz CoreConnect businterfacesTable 1- 440 CPU Core SpecificationsEmbedded Design SupportThe PPC440 Core, as a member of the PowerPC 400 Family, is supported by the IBM PowerPC Embedded Tools TM program, in which over 80 third party vendors have combined with IBM to provide a complete tools solution. Development tools for the PPC440 include C/C++ compilers, debuggers, bus functional models, hardware/software co-simulation environments, and real-time operating systems. As part of the tools program, IBM maintains a complete set of development tools by offering the High C/C++ Compiler, RISCWatch TM debugger with RISCTrace TM trace interface, VHDL and Verilog simulation models and a PPC440 Core Superstructure development kit.PPC440 CPU Core OrganizationPPC440 CPUThe PPC440 CPU operates on instructions in a dual issue, seven stage pipeline, capable of dispatching two instructions per clock to multiple execution units and to optional Auxiliary Processor Units (APUs). The PPC440 core is shown in Figure 2.Figure 2 - PPC440 Core Block DiagramThe pipeline contains the following stages, as shown in Figure 3:1.IFTH – Fetch instructions from instruction cache2.PDCD – Pre-decode; partial instruction decode3.DISS – Decode/Issue; final decode and issue to units4.RACC – Register Access; read from multi-ported General Purpose Register (GPR) file5.EXE1/AGEN – Execute stage 1; complete simple arithmetics, generate load/store address6.EXE2/CRD – Execute stage 2; multiplex in results from units in preparation for writing into GPRfile, Data Cache access7.WB – Writeback; write results into GPR file from integer operation or load operationFigure 3 - PPC440 CPU PipelineInstruction Fetch and Pre-decodeDuring the Instruction Fetch stage (IFTH), an entire cache line (eight words) is read into the instruction cache line read buffer. From there, the next two instructions in the pre-decode buffers PDCD0 and PDCD1 during the PDCD stage. The instruction cache is virtually indexed and tagged, and translation is performed in parallel with the cache access.Branch UnitThe PPC440 uses a Branch History Table (BHT) to maintain dynamic branch prediction of conditional branches. To perform dynamic branch prediction, a 2-bit counter in the BHT is used to decide whether prediction should agree or disagree with the normal PowerPC static branch prediction. The counter counts up if branch determination agrees, and down if it disagrees. Once the counter saturates, it can only count away from saturation. Therefore, four valid states exist: “Strongly agree”, “Agree”, “Disagree”, and “Strongly disagree”. By agreeing or disagreeing with static branch prediction, different branches can use the same counter in the BHT and have opposite static predictions, without the machine necessarily mispredicting a branch.The Branch Target Address Cache (BTAC) is used to predict branches and deliver their target addresses before the instruction cache can deliver the same data. It is accessed during IFTH, whereas normal branch prediction would not occur until PDCD, and therefore avoids a one cycle penalty. The BTAC is made up of an odd and even BTAC containing eight entries each. Only unconditional branches and bdnzinstructions are stored, which gives a significant performance boost while keeping the design straightforward.Decode and IssueThe four-entry decode queue accepts up to two instructions per clock submitted from the pre-decode buffers. Instructions always enter the lowest empty or emptying queue position, behind any instructions already in the queue. Therefore, the queue fills from the bottom up, instructions stay in order, and no bubbles exist in the queue. A significant portion of decode is performed in the lowest two positions (DISS0 and DISS1). Up to two instructions exit the queue based on the instructions’ decode and pipeline availability, and are issued to the RACC stage. DISS1 can issue out of order with respect to DISS0. Register AccessConceptually, the GPR file consists of thirty-two, 32-bit general purpose registers. It is implemented as two 6-port arrays, (one array for LRACC, one for IRACC) each with thirty-two, 32-bit registers containing three write ports and three read ports. On all GPR updating instructions, the appropriate GPR write ports will be written in order to keep the contents of the files the same. On GPR reads, however, the GPR read ports are dedicated to instructions that are dispatched to a RACC’s associated pipe(s). Execution PipelinesThe PPC440 contains three execution pipes: a load/store pipe (“L-pipe”), a simple integer pipe (“J-pipe”), and a complex integer pipe (“I-pipe”). The L-pipe and J-pipe instructions are dispatched from the LRACC; I-pipe instructions are dispatched from IRACC. The three pipes together perform all 32-bit PowerPC integer instructions in hardware compliant with the PowerPC Book E specification. Table 2 lists the rules for dispatching to each of the three execution pipes.L-pipe only Loads/stores1, cache instructions, mbar, msyncI-pipe or J-pipe2Add, addi, addis, and, andc, cntlzw, eqv, extsb, extsh, nand, neg, nor, or, orc, ori, oris, xori, xoris, rlwimi, rlwinm, rlwnm, slw, srw, subfI-pipe only Branches, multiplies, divides, move to/from DCR/SPR, indirect XER updates,indirect LR/CTR updates, indirect CR updates, CR-logicals, MAC instructions,mcrf, mcrxr, mtcrf, mfcr, compares, dlmzb, isync, rfi, rfci, sc, wrtee, wrteei,mtmsr, mfmsr, trapsTable 2 – Rules for Instruction IssueThe MAC unit is an auxiliary processor unit (APU) which adds 24 operations to the PPC440 instruction set. MAC instructions operate on either signed or unsigned 16 bit operands and accumulate the results in a 32-bit GPR. All MAC unit instructions have single cycle throughput. The MAC unit is contained within the I-pipe.1 The stwcx. instruction goes down both the L-pipe as well as the I-pipe, in order to update the CR.2 Instructions which update the CR or XER are not issued to the J-pipe.Instruction and Data CachesProcessor Local Bus (PLB) Memory AccessThe PPC440 has three independent 128-bit Processor Local Bus (PLB) master interfaces, one for instruction fetches, one for data reads, and a third for data writes. Memory accesses are performed through the PLB interfaces to/from the instruction cache (I-Cache) or data cache (D-Cache) units. Having three independent bus interfaces for the cache units provides maximum flexibility for designs to optimize system throughput. Memory accesses (loads/stores) which hit in the cache achieve single-cycle throughput.Cache ConfigurationThe PPC440 has separate instruction and data caches with 8 word (32 byte) cache lines. Instruction and data cache sizes are factory-configurable to any combination of 0KB, 8KB, 16KB, 32KB, or 64KB cache sizes. Configurable cache sizes provide designers with a parameter for optimizing the PPC440 to a desired price-performance for a particular application. The caches are highly associative, with associativity varying with cache size as shown in Table 3. High associativity enables advanced cache functions such as locking and transient memory regions (see “Cache Partitioning” below).Cache Size Ways8 KB3216KB6432KB6464KB128Table 3 – Number of Ways for Different PPC440 Cache SizesThe cache arrays are non-blocking. Non-blocking caches allow the PPC440 to overlap execution ofload/store instructions while instruction fetches take place over the PLB. The caches, therefore, continue supplying data and instructions without interruption to the pipeline. The PPC440 replaces cache lines according to a round-robin replacement policy.The initial PPC440A4 core offering will include a 32KB instruction cache and 32KB data cache. These caches are physically constructed using two, 16KB CAMRAM macros, each consisting of 8, 2KB sub-banks (or “sets”). This organization facilities low-power operation and fast hit/miss determination. Cache PartitioningThe PPC440 caches have the ability to be separated into “normal”, “transient”, and “locked” regions. Normal regions are what is traditionally thought of regarding cache replacement. Transient regions are used for data that is used temporarily and then not needed again, such as the data in a particular JPEG image. A separate transient region avoids castouts of more commonly accessed code in the normal region. The locked region is for code that is not to be cast out of the cache, and is the resulting region not included in the normal and transient regions. The regions are set via “victim” ceiling and floor pointers, as shown in Figure 4. Figure 4 shows two examples of cache partitioning, the left side shows separate transient and normal regions, and the right side shows part of the normal region overlapping with the transient region. The normal ceiling is defined as the top of the cache.Figure 4 – Two Examples of Cache PartitioningI-Cache Speculative Pre-fetchingThe I-Cache utilizes a programmable speculative pre-fetch mechanism to enhance performance. Software can enable up to three additional lines to be speculatively pre-fetched, using a burst protocol, upon any instruction cache miss. When this mode is enabled, the I-Cache controller will automatically inspect the I-Cache on a miss to see if any of up to the next three lines are also misses. If so, the hardware will present a burst request to the PLB immediately after the original line fill request. This speculative burst request takes advantage of the throughput capability of standard memory architectures such as SDRAM and brings in anticipated subsequent instructions after a miss. Furthermore, if the instruction stream branches away from the lines which are being speculatively filled, the burst request which is filling the speculative lines can be abandoned in the middle, and a new fill request at the branch target location immediately initiated. There is a programmable "threshold" to determine when to abandon a speculative line fill that may have been in progress at the time of a branch redirection. This threshold designates how many doublewords of the speculative cache line must be received to not abandon a current line fill. In this fashion, the speculative pre-fetch mechanism can be carefully tailored to provide optimum performance for specific applications and memory subsystems.D-Cache Line FillsThe D-Cache contains three line fill buffers and can queue up to four load misses to three separate cache lines. The PPC440 will then execute past these load misses, until the queue is full or the pipes are held waiting for a load value. The D-Cache controller places the target word on the bypass path as the fill buffer captures data words off the PLB. Additional requests of the cache line held in the fill buffer are also forwarded directly to the operand registers in the execute unit.D-Cache Non-cacheable Store GatheringThe D-Cache “gathers” up to 16 bytes for non-cacheable, write-through, and w/o allocate stores, and will burst the quadword to the PLB for fast writes to non-cacheable memory.D-Cache Write-Back and Write-Through ModesThe D-Cache supports write-back or write-through mode. In write-back mode, store hits are written to the cache and not to main memory. Main memory is later modified if and when the line is flushed from the cache. In write-through mode, the data cache controller writes main memory for store misses as well asstore hits; every store operation generates a PLB write request. (Although write-through requests to non-cacheable memory can be gathered as previously mentioned).D-Cache Store AllocationThe D-Cache can be programmed whether or not to allocate a line on a D-Cache store miss. Write-on-allocate is enabled by default. In this mode, a store miss to cacheable memory forces the data cache controller to allocate a line in the data cache and generate a line fill. In contrast, when “without allocate”is enabled, a store miss to cacheable memory will not allocate a line data cache and will simply write the data to memory.Big Endian and Little Endian SupportThe PPC440 supports big endian or little endian byte ordering for instructions and data stored in external memory. The PowerPC Book E architecture is endian neutral; each page in memory can be configured for big or little endian byte ordering via a storage attribute contained in the TLB entry for that region. Strapping signals on the PPC440 core initialize the beginning TLB entry’s endian attribute, so thePPC440 can boot from little or big endian memory.Memory Management Unit (MMU)The MMU supports multiple page sizes as well as a variety of storage protection attributes and access control options. Multiple page sizes improve TLB efficiency and minimize the number of TLB misses. The PPC440 gives programmers the flexibility to have any combination of the following eight possible page sizes in the translation look-aside buffer (TLB) simultaneously: 1KB, 4KB, 16KB, 64KB, 256KB,1MB, 16MB and 256MB. Having an extremely large page size allows users to define system memory with a minimal number of TLB entries, thereby simplifying TLB allocation and replacement. Small page sizes prevent the wasting of memory when allocating small areas of data.Each page of memory is accompanied by a set of storage attributes. These attributes include cacheability, write through/write back mode, big/little endian, guarded and four user-defined attributes. The user-defined attributes can be used to mark a memory page with an application-specific meaning. The guarded attribute controls speculative accesses. The big/little endian attribute marks a memory page as having big or little endian byte ordering. Write through/write back specifies whether memory is updated in addition to the cache during store operations.Two of the user-defined storage attributes can be programmed for special functions inside the core. One can be enabled to designate normal or transient cache regions. Another can be enabled to control whether or not store misses allocate a line in the D-Cache.Access control bits in the TLB entries enable system software to control read, write, and execute access for programs in both user and supervisor states.The MMU includes a 64-entry fully-associative unified TLB to reduce the overhead of address translation. Contention for the main TLB between data address and instruction address translation is minimized through the use of a four-entry instruction shadow TLB (ITLB) and an eight-entry data shadow TLB (DTLB). The ITLB and DTLB shadow the most recently used entries in the unified TLB. The MMU manages the replacement strategy of the ITLB and DTLB leaving the unified TLB to software control. Real-time operating systems are free to implement their own replacement algorithm for the unified TLB.Interrupt Handling LogicThe PPC440 services exceptions generated by error conditions, the internal timer facilities, debug events, and the external interrupt controller (EIC) interface. Altogether, there are sixteen different interrupt types supported.Interrupts are divided into two classes, critical and non-critical. Each class of interrupt has its own pair of save/restore registers for holding the program counter and machine state. Separate save/restore registers allow the PPC440 to quickly handle critical interrupts even within a non-critical interrupt handler. When an interrupt is taken, the PPC440 automatically writes the program counter and machine state to save/restore register SRR0 and SRR1 respectively for non-critical interrupts, or CSRR0 and CSRR1 respectively for critical interrupts. The machine status and program counter are automatically restored at the end of an exception handler when the return from interrupt (rfi) or return from critical interrupt (rfci) instruction is executed.TimersThe PPC440 contains a 64-bit time base and three timers: the Decrementer (DEC), the Fixed Interval Timer (FIT), and the WatchDog Timer (WDT). The time base counter increments synchronously with the CPU clock or an external clock source. The three timers are synchronous with the time base.The DEC is a 32-bit register that decrements at the time base increment rate. The user loads the DEC register with a value to create the desired delay. When the register reaches zero, the timer stops decrementing and generates a decrementer interrupt. Optionally, the DEC can be programmed to auto-reload the value last written to the DEC auto-reload register, after which the DEC continues to decrement.The FIT generates periodic interrupts based on one of four selectable bits in the time base. When the selected bit changes from 0 to 1, the PPC440 generates a FIT exception.The watchdog timer provides a periodic critical-class interrupt based on a selected bit in the time base. This interrupt can be used for system error recovery in the event of software or system lockups. Users may select one of four time periods for the interval and the type of reset generated if the watchdog timer expires twice without an intervening clear from software. If enabled, the watchdog timer generates a reset unless an exception handler updates the watchdog timer status bit before the timer has completed two of the selected timer intervals.Debug LogicAll architected resources on the PPC440 can be accessed through the debug logic. Upon a debug event, the PPC440 provides debug information to an external debug tool. Three different types of tools are supported depending on the debug mode: ROM Monitors, JTAG debuggers and instruction trace tools. Internal Debug ModeIn internal debug mode, a debug event enables exception-handling software at a dedicated interrupt vector to take over the PPC440 and communicate with a debug tool. Exception-handling software has read-write access to all registers and can set hardware or software breakpoints. ROM monitors typically use the internal debug mode.External Debug ModeIn external debug mode, the PPC440 enters stop state (i.e., stops instruction execution) when a debug event occurs. This mode offers a debug tool non-invasive read-write access to all registers in the PPC440 via the JTAG interface. Once the PPC440 is in stop state, the debug tool can start the PPC440, step an instruction, freeze the timers or set hardware or software break points. In addition to PPC440 control, the debug logic is capable of writing instructions into the instruction cache, eliminating the need for external memory during initial board bring up.Debug Wait ModeDebug wait mode offers the same functionality as external debug mode with one difference; in debug wait mode, the PPC440 will respond to interrupts and temporarily leave stop state to service them before returning to debug wait mode. In external debug mode, by contrast, interrupts are disabled while in stop state. Debug wait mode is particularly useful when debugging real-time control systems.Real-Time Trace Debug ModeIn real-time trace debug mode, instruction trace information is continuously broadcast to the trace port. When a debug event occurs, an external debug tool saves instruction trace information before and after the event. The number of traced instructions depends only on the memory buffer depth of the trace tool. Debug EventsDebug events signal the debug logic to either stop the PPC440, put the PPC440 in debug wait state, cause a debug exception, or save instruction trace information, depending on the debug mode. Table 4 on the following page lists the possible debug events and their description.Debug Event DescriptionBranch Taken A Branch Taken debug event occurs prior to the execution ofa taken branch instruction.Instruction Completion The Instruction Completion debug event occurs after thecompletion of any instruction.Return from Interrupt The Return From Interrupt debug event occurs after thecompletion of an rfi or rfci instruction.Interrupt The Interrupt debug event occurs after an interrupt is taken. Trap The Trap debug event occurs prior to the execution of a trapinstruction, where the trap condition is met.Instruction Address Compare (IAC)The IAC debug event occurs prior to the execution of aninstruction at an address that matches the contents of one offour IAC registers (IAC1, IAC2, IAC3, and IAC4).Alternatively, the registers can be combined to cause an IACdebug event prior to the execution of an instruction at anaddress contained in one of the following ranges as specifiedby the four IAC registers:IAC1 <= range < IAC2 (inclusive),IAC3 <= range < IAC4 (inclusive),range low < IAC1 < IAC2 <= range high (exclusive), orrange low < IAC3 < IAC4 <= range high (exclusive).Data Address Compare (DAC)The DAC debug event occurs prior to the execution of aninstruction that accesses a data address matching the contentsof one of the two DAC registers (DAC1 and DAC2).Alternatively, the registers can be combined to cause a DACdebug event occurs prior to the execution of an instructionthat accesses a data address within one of the followingranges specified by the two DAC registers:DAC1 <= range < DAC2 (inclusive), orrange low < DAC1 < DAC2 <= range high (exclusive). Data Value Compare (DVC)The Data Value Compare debug event occurs prior to theexecution of an instruction that accesses a data addressmatching one of the two DAC registers (or within a DACrange) and containing a particular data value as specified byone of the two DVC registers. The DVC debug event mayoccur when a selected data byte, half-word or word matchesthe corresponding element in DVC1 or DVC2. Unconditional Event An unconditional debug event is set by a debug tool throughthe JTAG port or by ASIC logic external to the PPC440.Table 4 - Debug EventsPower ManagementThe PPC440 core, in keeping with the IBM PowerPC 400 family tradition, utilizes aggressive power management techniques for minimizing power. The PPC440 utilizes three key techniques: redundant operand registers, half-cycle latch stabilization, and dynamic clock gating.Redundant Operand RegistersRedundant operand registers are used at various pipeline stages for feeding operands to each of the execution units. This saves power by preventing unused units from seeing the operand values being used by other units and improves performance by reducing loading and wire length in critical stages.Half-Cycle Latch StabilizationHalf-cycle stabilization latches minimize the propagation of glitches to downstream logic. This is easily employed since the PPC440 core contains a master/slave latch arrangement for scan-test purposes. Therefore, a master-only latch is simply needed in the logic path that is switching in the first half of a cycle. For example, if the select lines for a mux are being determined in the first half of a cycle, then by putting a master-only latch on these select lines before delivering them to the mux, the mux outputs are prevented from glitching while the select lines are being determined. Conversely, if the data lines are unstable in the first half of a cycle, a stabilization latch may be used on the data inputs, while leaving the select lines alone.Dynamic Clock GatingThe most important feature of the PPC440’s dynamic power management is the extensive use of clock gating. Given the PPC440’s master/slave latch organization, there are two possible gates that can be used. The relationship between them, and their relative affect on the clock splitter and hence power are shown in Figure 5.Figure 5 - PPC440 Clock GatingIn this figure, the early gate blocks the phase 1 clock and prevents the master latch from loading, while the late gate blocks the phase 2 clock and prevents the slave latch from loading. As illustrated in the simplified block diagram of the clock splitter, the early gate must arrive by mid-cycle -- which is when the system clock falls. If the gate is activated by this point, then the net effect is that internal to the clock splitter the fall on the system clock is never observed, and both the phase 1 and the phase 2 clock splitteroutputs remain stable, preventing any downstream master latches from loading, and hence their associated slave latches will not change either. This affords the maximum power savings, with the downstream logic dissipating no power other than leakage, and the clock splitter itself using almost zero power.In the event that the gate for a given latch cannot be determined by mid-cycle, the late gate can be used, which does not prevent the system clock fall and consequent phase 1 clock rise, but does prevent the corresponding next phase 2 clock rise. This does not save as much power, but the timing is much more relaxed and the power savings are still considerable.。
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本样本中列出的产品和 系统在制造和销售中通 过了 DIN EN ISO 9001 ( 认证号：N o . D E 000357 QM))和DIN EN ISO 14001(认证号：No. 0813420 UM 和 EMS 57390)。认证证书在所 有的 IQNet 国家都已注 册。
主要特征
调试简单
模块化的结构，因而组态 具有最大的灵活性
具有三个完全可编程的隔 离的数字输入
一个可标定的模拟输入 (0V 至 10V) ；它也可以作为第 4 个数字输入来使用。
一个可编程的模拟输出 (0mA 至 20mA)
一个完全可编程的继电器 输出 (30V ，直流 /5A，电阻 负载或 250V，交流 /2A， 感 性负载)
3
MICROMASTER420/430/440
一般介绍
选件
MICROMASTER 4 系列变频 器有以下选件可供用户选用:
滤波器 电抗器 操作面板 PROFIBUS 通讯模块 DeviceNet 通讯模块 CAN open 通讯模块 脉冲编码器脉冲计数模块 密封盖板 安装组合件等
变频器各个系列适用的操作面板和功能模块的配置
节能运行方式 负载转矩监控 ( 水泵的无水空转运行检测) 电动机的分级 (多泵循环) 控制
有 3 组驱动数据可供选择 集成的制动斩波器 (75 kW 以下) 转矩控制 具有二进制互联连接（BiCo）功能
MM430 变频器
110kW 至 250kW（VT）MM430 变频器是 MICROMASTER 变频器系列新的扩展型号。它的主要特点有：
8001用户手册V1.0
9
8001 应用说明 ........................................................................................................................13 9.1 9.2 9.3 9.4 9.5 9.6 9.7 9.8 9.9 9.10 芯片基本结构描述 .................................................................................................13 芯片数字逻辑特性 .................................................................................................14 外部电阻配置 .........................................................................................................14 芯片功耗 .................................................................................................................14 电源旁路 .................................................................................................................14 掉电模式 .................................................................................................................14 外围元件的选择 .....................................................................................................15 选择输入耦合电容 .................................................................................................15 设计参考实例 .........................................................................................................15 其它注意事项 .........................................................................................................15
西门子440-变频器参数的说明
西门子440变频器参数的说明由于西门子440变频器不是电梯专用的变频器，调整比较麻烦，也不是太好理解。
结合我们以前调试的经验，把参数总结给大家，以供参考，现就有关参数给大家做说明如下：基本参数P700=2，这是数字命令的信号源，可以选择由键盘（数值设为1）或端子排输入（数字设为2）在电机自学习时，要把它改为1，可以通过面板来操作；完成后可改为2 实现正常运行。
P701 、P702、P703 、P704、P705、P706 是数字输入1、2、3、4、5、6的功能，对应变频器的端子号5、6、7、8、16、17 。
我们定义为多段速度选择位1、2、3、和使能BICO 参数化，即分别设定为17、17、17、99、99、99P820=2835以1.6 m/s的电梯为例，其单层速度为28HZ，多层速度为45HZ。
我们以给定速度为判断条件，当给定速度小于35HZ时,激活单层曲线DDS0，否则激活DDS1。
另外，对于多层速度，我们对速度调节器的增益系数和积分时间常数做了一下切换，当实际速度小于7HZ时，激活DDS1，当实际速度大于7HZ时，激活DDS2，P2890=70%P2885=1024（r1024是实际的固定频率）P2885 是比较器1（说明书10-212页），当r1024大于或等于P2889时r2886=1; 当r1024小于P2889时r2886=0;要激活P2885 需要P2800=1 P2802[12]=1，比较的结果是r2886,我们把比较结果设在P2834（D—FF1即D-触发器1）中，P2834[0]=2886：0，置位P2834[1]=0：0，D-输入P2834[2]=0：0，存储脉冲P2834[3]=2813：0，复位D-触发器1有两个结果，r2835和r2836，而我们设定P820=2835，就选择DDS1。
而D-触发器1的激活级是P2801[12]，故我们设定P2801[12]=3（优先级）而当P821=2811=1时，则选择DDS2，其中用到的参数有r53.2 p1080变频器的实际频率是否大于或等于P1080如果是则是1，如果不是则是0；其结果由p2828（NOT1）转换后由r2829 输出，p2801[9]是p2828的激活级;而r2829又和r2835通过p2812（AND2）与后由r2813输出结果，p2812p2801[1]又是p2812的激活级r2813r53.4p2155变频器的实际频率是否大于P2155如果是则是1，如果不是则是0,这个结果又通过p2810（AND1）由2811输出p2801[0]是2810的激活级r2811P2828=53:2P840=722：3=数字输入4，（要求P704 设定为99，BICO）正向运行的ON/OFF命令P842=722：4=数字输入5，（要求P705 设定为99，BICO）反向运行的ON/OFF命令这两个参数的社的设定只有在P719=0时才能激活。
西门子440高级维修电工440考试题及答案
维修电工440变频器考试列题（试用enthone 440变频器公司）试题单试题代码：3.2.3试题名称：MM440变频器四段固定频率控制鉴定时限：60min1.操作条件（1）西门子MM440交流变频调速实训装置（2）三相交流异步电动机：YSJ7124P N=370W,U N=380V, I N=1.12A, n N=1400r/min ，f N=50HZ2.操作内容⑴、按图接线并通电，将变频器设置成数字量输入端口操作运行状态，线性V/F控制方式，四段固定频率控制。
有关电机参数及其他参数设置参照实训装置说明。
⑵、设置四段固定频率运行，上升时间为 5 秒，下降时间为 8 秒。
第一段固定频率为 Hz；第二段固定频率为 Hz；第三段固定频率为 Hz；第四段固定频率为 Hz；按以上要求写出变频器设置参数清单。
⑶、按以上要求自行设置参数并调试运行，结果向考评员演示。
⑷、将变频器设置成数字量输入端口操作及模拟量给定操作运行状态，改变给定电位器，观察转速变化情况。
并根据所要求的给定转速（或给定频率），记录此时给定电压为___V,频率为_____ Hz,转速为_____r/min,结果向考评员演示。
⑸、测量上述四段固定频率对应的转速，并画出以上四段速运行的n=f(t)曲线图，要求计算有关加减速时间，标明时间坐标和转速坐标值。
⑹、考评员在此电路上设置一个故障，考生根据故障现象,分析故障原因,并排除故障,使系统正常运行。
3. 操作要求（1）根据给定的设备和仪器仪表，在规定时间内完成接线、调试、运行及特性测量分析工作，达到考试规定的要求。
调试过程中一般故障自行解决。
（2）按要求写出变频器设置参数清单。
（3）按要求写出变频器模拟量给定操作运行状态时给定电压与频率、转速。
（4）测量与绘制四段速运行的n=f(t)曲线图，要求计算有关加减速时间，标明时间坐标和转速坐标值。
（5）根据故障现象，分析故障原因，并排除故障；使其运行正常。
凯尔贝类激光等离子电源HF440i中文手册
警告 当等离子机器开着的时候，用手接触枪头，会导致电击的危险。. 电击会导致生命. 在等离子机器开着的时候，永远不要用手接触割枪枪头。
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在等离子机器上可以看到警告标. 操作工或维修人员在操作机器之前，必须熟悉这些标示的意义。
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启动之前，工作台接工作电缆，工作台要接地 !
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440参数表
参数解释P003=3专家P004=0所有参数P0010=1快速调试P0100=0电源频率P0205=0变频器应用 恒转矩P0300=1异步电机P0304-P0311电机参数自学习设定P0700=2端子排（运行命令）P1000=3频率给定选择P1080=5HZ最小频率P1082=50最大频率P1120=3斜坡上升时间P1121=1.5斜坡下降时间P1300=20、0无传感矢量控制、无P GV/FP1500=0P1901=3辨识所有参数P3900=3快速调试结束P0400=0编码器类型P0408=1024脉冲数P0701=1端子5正转P0702=2端子6反转P0703=15端子7PP0704=15端子8P0705=15端子16P0706=9端子17P0725=1NPN方式P0731=52.3传动故障P0732=52.C传动抱闸P0748=---﹃-关键数字输出P1001=10正转1档P1002=10反转1档P1004=102档P1005=153档P1006=154档P1130=0.4启动S时间P1131=0.4到达S时间P1132=0.4减速S时间P1133=0.4停车S时间P1134=0平滑圆弧P1215=1电机抱闸使能P1237=4(3)动力制动起升设4 平移设3P1240=0动力制动的工作/停止周期P1021=1?关键P1020=0?关键电机抱闸使能P1215=1P0346=0.5电机磁化时间P1080=5HZP1216=0P1217=0能耗制动使能P1237=4(3)动力制动的工作/停止周期P1254=0P0201=380VP1240=0直流电压 （Vdc） 控制器的配置P1610=150连续转矩提升100%P1611=150连续转矩提升100%P005现实选择21显示频率25显示电压26直流回路电压27显示电流主钩45KW 93.5A 723转速比 141.73。
MM440西门子变频器1
（2）修改P0304 下标参数的操作步骤。 1）按“P” ，键访问参数，操作面板显示r0O00 。 2) 按“▲”键直到操作面板显示PO3O4 。 3) 按“P”，键进人参数数值访问级，操作面板显示nl000 。
4) 按“P ”,键显示当前的设定值 400 。 5) 按“P”键达到参数所需要的设定值380 ，操作面板显示设定值380 。 6) 按“P ”键确认并存储参数的数值，操作面板显示P0304 。
第一页，编辑于星期四：二十一点 十六分。
MM44 变频器可以作为许多生产设备的传动装置，例如物料运输系统、 纺织工业、电梯、起重设备、机械加工设备以及食品、饮料和烟草等工业。 它具有6 个多功能数字量输人端、两个模拟输人端（可以作为⑦ 和⑧ 多功 能数字量输人端使用）、3 个多功能继电器输出端、两个模拟量输出端 （0～20 mA ）。它采用BICO （二进制互联连接）技术、模块化设计，配置 非常灵活。它还具有详细的变频器状态信息和全面的信息功能，有多种可选 件供用户选用如用于与计算机通信的通信模块及用于进行现场总线通信的 ROFIBUS 通信模块。
第十二页，编辑于星期四：二十一点 十六分。
(2）跳转功能。在显示任何一个参数（rXXXX或PXXXX ) 时短时间按下此键，将立即 跳转到r0000。如果需要的话，可以接着修改其他的参数跳。转到r0000 后，按 此键将返回原来的显示点
(3）复位功能。在出现故障或报警的情况下，按此键可以将操作板上显示的故 障或报警信息复位
第二页，编辑于星期四：二十一点 十六分。
MM44O 变频器控制方式有矢量控制方式和V/f 控制方式。矢量控 制方式又有无传感器矢量控制（SLVO) 和带编码器的矢量控制（VC。 V/f 控制方式又有线性V/f 控制、多点V/f控制和磁通电流控制（FCC） 等。它具有快速电流限制（FCL）功能、内置的直流注人制动、复合 制动功能，外形尺寸为A～F 的MM440 变频器还具有内置的制动单元。 加速／减速斜坡特性具有可编程的平滑功能，它还具有比例积分和微 分（PID）控制功能的闭环控制，并具有过电流保护、过电压／欠电 压保护、变频器过热保护、电动机过热保护等功能。
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7-18
Position Interlock Switches
Safety Limit Switches
Imp
Description
The Imp offers safety switch performance of bigger units in the most compact case available. Designed with two mounting hole options and a choice of actuator positions, the Imp will fit in the most confined spaces.
Guardmaster limit switches can be used in other applications other than guard doors, for example on moving machine beds, crane arms, etc.
Operation of these limit switches is achieved by the sliding action of the guard or other moving object deflecting the plunger or lever. It is important that upon actuation, the guard or other moving objects should not pass completely over the switch and allow the plunger or lever to return to its original position.
Features
•Positive operation, forced disconnection of contacts •
Contacts, 1 N.C. & 1 N.O.
Imp 1Imp 2
Specifications
Standards
EN954-1, ISO13849-1, IEC/EN60204-1, NFPA79, EN1088, ISO14119, IEC/EN60947-5-1, ANSI B11.19, AS4024.1Category
Cat. 1 Device per EN954-1
Dual channel interlocks suitable for Cat. 3 or 4 systems
Approvals
CE marked for all applicable directives and CSA NRTL/C Safety Contacts 1 N.C. positive break Utilization Category AC 15
AC (Ue)500V 250V 100V (le)1A 2A 5A DC
250V 0.5A, 24V 2A Max. Switched Current/Voltage/Load
500V/500VA Thermal Current (lth)10A
Minimum Current 5V 5mA DC
Safety Contact Gap >2 x 2mm (0.079in)Rtd. Insulation Voltage (Ui) 500V Rtd. Impulse Withstand Voltage
(Uimp) 2500V Auxiliary Contacts 1 N.O.Pollution Degree
3
Actuator Travel for Positive Opening
2.5mm (0.098in)
Break Contact Min. Force 10N (2.25lb)Maximum Actuator Travel 5mm (0.197in)
Maximum Actuation Speed 160mm (6.29in) per sec Max. Actuation Frequency 2 Cycle per sec
Case Material UL approved glass filled polyester Actuator Material Acetal Protection IP30
Conduit Entry
3x break-outs
Operating T emperature -25°C to +80°C (-13°F to +176°F)Mounting
2 x M
3 front or 2 x M
4 top Mechanical Life 10,000,000 operations Electrical Life 1,000,000 operations Colour
Red
Position Interlock Switches
7-19
Safety Limit Switches
Imp
Product Selection
Dimensions—mm (inches)
Connections。