贝岭--BL6523GX__V1.00(电量检测IC)
朗阳科技有限公司电表读表器说明书
电表读表器(v1.02019-12-24)版权所有©杭州朗阳科技有限公司2019。
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目录1.产品介绍 (1)2.产品规格 (1)3.产品结构 (2)4.核心优势 (3)5.注意事项 (4)6.安装操作 (5)7.保修条例 (7)8.产品保修卡(客户联) (8)9.产品保修卡(存档联) (9)10.常见问题解答 (10)11.表哥智读平台操作说明 (12)1.产品介绍朗读(Auge)®系列·电表读表器采用分体式设计,通过摄像直读方式对电表数字形状的学习,建立起数字的深度学习模型,使用嵌入式AI芯片进行识别。
支持NB-IoT、LoRa等网络形式进行数据远传,对用电量进行集中管理的一种用电量数据采集仪表。
2.产品规格硬件名称:朗读(Auge)®系列·电表读表器产品尺寸:120mm*110mm*50mm整机重量:300g电池容量:8500mAh锂亚电池通讯网络:支持LoRa,NB-loT,Sigfox,WIFI工作电流:小于160mA待机电流:小于5μA工作温度:-10℃~55℃;储运温度:-25~70℃识别准确率:大于99.9%阻燃等级:UL94一v0级防护等级:IP68接收灵敏度:-139+/-1dBm制式最大发射功率:NB:23+/-2dBm驻波比:≤3电磁防护等级:E1级3.产品结构设备平台对接详细指导请参考“表哥智读平台操作说明”4.核心优势*1.本地识别:自有专利技术,实现表端的数字识别。
BL0940防漏电计量芯片在智能家居的应用
集成电路应用 第 36 卷 第 3 期(总第 306 期)2019 年 3 月 37Process and Fabrication 工艺与制造BL0940 防漏电计量芯片在智能家居的应用摘要:上海贝岭在计量技术领域的深入研究多年,利用其设计生产的 BL0940 计量芯片进行设计,既可以满足智能家居产品中的计量需要,又具备防漏电检测功能。
分析该芯片在产品定义时,就已考虑到大多数智能家居的生产厂家往往在电能计量校准经验上经验不足的现状,针对性地增加了增益修正功能,使得用户在计量外围电路精度范围可控的前提下,一定程度上实现了免于校准,即可满足精度计量的需要。
关键词:计量芯片;漏电检测;免校准;采样电阻。
中图分类号:TP391.41 文章编号:1674-2583(2019)03-0037-03DOI:10.19339/j.issn.1674-2583.2019.03.010中文引用格式:傅代军,王甲,阮颐. BL0940防漏电计量芯片在智能家居的应用[J].集成电路应用, 2019, 36(03): 37-39.傅代军,王甲,阮颐(上海贝岭股份有限公司,上海 200233)1 引言随着物联网技术的蓬勃发展,各种物联网产品已进入千家万户,但传统使用家用电器并不具备物联网接口,新兴的家用电器虽然具备接口,但各厂家之间的物联网产品通信也未必通信兼容,因此智能插座[1]作为一座可以把家用电器实现物联化的桥梁,在智能家居物联网化的发展中呈现了井喷式的发展。
智能插座的功能也随着发展的进程不断完善,从起初只需要简单的电能计量功能,到具备电能、电流、电压、功率等电气参数的测量功能,一直到具备安全功能的漏电检测功能,可以实现远程/自动通断电,这些智能化需求无形之中为人民群众的生活带来了便捷。
作为智能插座的生产厂家,虽然在智能插座巨大的市场需求中收获了巨大的利益,但是由于智能插座的功能越来越丰富,也对其企业设计能力、制造能力、量产能力,提出了巨大的考验。
BL0906 六相交流电能计量芯片 应用指南说明书
BL0906应用指南目录交流电能测量 (1)应用电路图:(1U6I模式) (1)电阻采样方式 (1)关于有功功率防潜动阈值设置 (4)互感器采样方式 (5)寄存器设置 (7)关于电参数转换 (7)电网频率转换 (8)PCB设计注意事项 (8)BL0906是上海贝岭股份有限公司开发的一款内置时钟多路免校准电能计量芯片,最多可测量6相电能,适用于电动自行车充电桩、PDU、多回路电表等需要多路计量的场景。
BL0906集成了7路高精度Sigma-Delta ADC,可同时测量7路信号(电流或电压)。
BL0906能够测量电流、电压有效值、有功功率、有功电能量等参数,可输出快速电流有效值(用于漏电监控、过流保护等故障检测),波形输出等功能,通过UART或高速SPI接口输出数据,交流电能测量应用电路图:(1U6I模式)电阻采样方式上海贝岭股份有限公司2 / 9V1.0 上海市宜山路810号************或173****5186注意:1)M1~M6缺省功能为过流报警输出,M1管脚可配置为校表脉冲输出(具体配置见MODE3寄存器说明);2)SPI、UART接口的速率,通信协议的描述见“BL0906 datasheet Vx.x.pdf”;3)BL0906在出厂时已做增益修正,如果要免校准,外围器件的精度保证在1%以内;4)Uart通信模式时,RX、TX管脚需要外接上拉电阻;寄存器设置采用1毫欧合金电阻进行采样时,电流通道采用16倍增益,电压通道采用1倍增益;0000=1倍;0001=2倍;0010=8倍;0011=16倍;(注意:输入通道的最大差分电压±0.6V指的是1倍增益,如果使用16倍增益,则输入通道的最大差分电压为±37.5mV)注意:需要先向0x9E(US_WRPROT)寄存器写入0x5555后,才能写入增益相关设置!关于电参数转换BL0906在定义产品时考虑到大部分用户厂家不是专业计量器具厂家,没有专业的校准设备,对电能计量精度要求也相对较低,只是提供用电参考信息,不作计费标准。
低功耗实时时钟芯片BL5372用户手册说明书
低功耗实时时钟芯(RTC)BL5372用户手册V1.4上海贝岭股份有限公司Shanghai Belling Co., Ltd.低功耗实时时钟芯片(RTC)BL53721.概述BL5372是一款低功耗实时时钟电路,通过I 2C 两线接口电路可以与CPU 实时通信,主要用于一切需要提供时基的系统中。
该芯片能够产生多种周期性中断脉冲(最长周期可长达1个月),还具有两套报时系统。
BL5372内部集成一低功耗的稳压电源,故能够使恶劣的环境条件下仍能保持振荡器正常在很低的功耗工作(典型值:**********)。
BL5372具有晶振停振检测锁存的功能,通过检测该位可以检测内部时钟数据的有效性。
BL5372内置数字时间调整电路,可以保证时钟走时的高精度,并且有32KHz 和 32.768KHz 两种晶振选择模式。
该产品与理光RS5C372A 完全兼容。
2.主要特点● 超低功耗(典型值**********)● 实时时钟(12时制或者24时制两种计时方式) ● 自动识别闰年、平年(2000~2099)● BCD 码表示的时钟计数(包括时、分、秒)和万年历(包括闰年、平年、月、日、周)● 30秒数字校时功能● 可控的32.768KHz (或者32KHz )输出 ● 两个可编程闹钟输出● 两路可编程方波输出,为CPU 提供多种中断(一个月至一秒的周期性中断) ● 通过I 2C 两线接口与CPU 相连(最大数据时钟频率为100KHz ) ● 晶振停振检测锁存功能保证了时钟数据有效性 ● 32KHz 和32.768KHz 晶振选择● 高精度的时间调整电路,保证了时钟走时的精确● 超低电压工作(计时电压最低可至1.8V ,通讯电压最低可至1.8V ) ● SOP8或TSSOP8封装3.管脚排列INTRBSCL SDA GND VDD OSCIN OSCOUT INTRA8 7 6 5 1 2 3 4B L 53724.管脚功能说明PIN NO PIN NAME FUNCTION IN/OUT 1 INTRB 中断输出 B OUT 2 SCL 串行时钟线 IN 3 SDA 串行数据线 IN/OUT 4 GND 电源地 POWER 5 INTRA 中断输出 A OUT 6 OSCOUT 晶振的输出 OUT 7 OSCIN 晶振的输入 IN 8VDD工作电源电压POWER丝印说明SOP8封装 TSSOP8封装其中, 其中,“5372·”代表SOP8封装的BL5372 “5372.T ”代表TSSOP8封装的BL5372 “SSSSS ”代表卡号的第4到8位 “SSSSS ”代表卡号的第4到8位4.1 VDD 和GNDVDD 和GND 分别是工作电源和接地引脚。
上海贝岭 BL8307 Ballast control IC 说明书
BL8307 Ballast control IC主要特点n可驱动由双极型晶体管或MOSFET组成的半桥电路n驱动双极型晶体管时,基极回路注入电流强度可自动调节n低功耗启动(启动电流小于100uA)n启动电路具有2V的迟滞(电源电压高于13.7V芯片启动,低于11.7V关闭输出)n预热时间、预热频率与工作频率均可调整n有预热结束输出信号,可用做CUTOFF n有窗口比较器,可做EOL检测和保护n在点火时,有升频功能,可做过流或过压控制n有过扫频功能,可改善低温点火性能n内置一误差放大器,可做简单调光功能典型应用n电子镇流器及节能灯或其他功能简介BL8307是荧光灯电子镇流器专用驱动控制电路,可为荧光灯提供正常工作所需要的预热、点火以及故障保护等功能,且预热时间可以通过外置预热电容CPRE进行设置,同样的,荧光灯的预热频率及工作频率也可以分别通过外接电阻RPRE 和RT进行调节。
BL8307的另外一个特点就是可以驱动13XXX系列的双极型晶体管半桥和MOS晶体管半桥。
比较早期的BL8305A,BL8307的驱动输出电压范围和灯异常保护作了适当的改进,外围电路也作了适当的简化,所以电路更具实用。
在对荧光灯提供完善保护机制的同时,又加入了一个内置误差放大器可用作调光。
电路可具有固定死区(驱动MOS型半桥:1.5us;驱动双极型半桥:3us),以防止半桥上、下管同时导通,以实现零电压开(ZVS),降低损耗,对半桥电路起到保护作用。
_________________________________________________________________________ _________________________________________________________________________Contentspage 1系统框图 (3)2引脚定义 (3)2.1 管脚图 (3)2.2 管脚描述 (4)3 功能描述 (4)3.1 上电启动及芯片供电 (4)3.2 预热、点火及运行 (5)3.3 MOSFET型和Bipolar型半桥驱动 (6)3.3.1 Bipolar型半桥驱动 (6)3.3.2 MOSFET型半桥驱动 (7)3.4调光 (8)3.5 故障保护 (8)3.5.1 点火模式下的过流保护 (8)3.5.2 进入正常工作模式后的过流保护 (9)3.5.3 荧光灯寿命结束检测保护 (9)3.6 PEND输出信号 (10)4 技术参数 (10)4.1 极限参数 (10)4.2 温度参数 (10)4.3 电特性参数 (11)5 电参数特性图....................................................................................................... 错误!未定义书签。
部分电视机CPU型号及简单代换
部分电视机CPU型号及简单代换部分电视机CPU型号及简单代换8879CPBNG6V38 海信CPU8873CPBNG6U73 创维CPUTOSHIBA-HAY-22、8873CSCNG6PR6 通用CPUTDA9373PS/N2/AI1115 SVA CPU13-TB73-TM1V001、LC863332A-5T25、LC863332A-5S97 夏华CPU88CS38N-3P48、TMP88PS38 夏华K2918、K2926,解码TB1251TDA9381PS/N3/2/1741 索尼CPUTDA9381PS/N2/3I0837 LG CPUTDA9381PS/N2/3I0975 三星CPUTDA9373PS/N2/AI0939(Haier9373-V2.0)Haier9373-V1.0 海尔CPU V1.0的可以换空白存储器,按遥控器数字8、V+ 进总线LC863324B-54M2、LC863324A-5W21、LC863324C-55M5 海信CPUOM8370-A-3NC、NOM8370-A-1NC 海信、西湖、夏华、彩星CP-2156TCL-M18V3PNICAN、TCL-M11V1P 王牌CPUH13V02-T0、8829CSNG5CJ2、H13V01-T0 TCL CPUTDA9370PS/N2/AI1429(4706-D93705-64)3P36、4P36 创维CPU 4706-D83702-64CH05T1501 长虹CHD2590M37210M3-551SP日立25M8C CPUTDA9373PS/N2/AI0911(A01V01-PH)TDA9373PS/N2/AI0996 TCL 2990UHD0401、S3F880AXZZ 创维(3S30/5S30/5S31)MN152811TJS 松下CPU 85元LC863524C-55L7、53P4、52Y7、TH-50J2 杂牌CPULC863524C-55L6、55Y5、55K8 杂牌CPU87CK38N-3647(TMP87CK38N-3675、1C48)澳柯玛、松王M37221M6-309S 厦华R2920 CPUTDA9380PS/N1/IS0380(TCL-UOC-V01)王牌CPU,用TDA9383PS代替要把60脚接地13-T00S23-03M01、8879CSBNG6K02 乐华25G6BCH08T2602(8873CSANG6JH8)长虹CPUOM8373PS/N3/2/1870(4706-D83732-64)创维短管机专用CPULC863328A-51J8 嘉华CPU8803CPAN-3PE8(8823CPNG4JR6)换存储器、39脚,C205换1UF,ST6378B1/FKF 4S02-3008 创维数码3008TMP47C434N-3526 通用王牌TCL M14VBC 王牌CPUST6367BB1/BFX 不详LC863324A-5N09 海信CPULC864512V-5C77 海信CPUM34300N4-565SPKY88C94 夏华CPUM34300N4-555SP 日立CPULC863328A-5S15 高路华、海信CPUMC8902A-5Y83 熊猫、高路华CPUMC8904A-5Z25 熊猫、高路华、海信、西湖CPUM37210M3-807SP 康力CPUT-P-16 8823CPNG5RH6 熊猫CPU SAA5647HL/M1 飞利蒲CPUOM8373PS/N3/A/1914(OM8373PS/N3/A/1854)康佳短管CPUTMP47C634AN RC18 厦华CPUHAIER1132S、HAIER1532S 海尔21T8D-S、21F9G-Shisense 8803-1(8803CPBNG3VG6)8823CPNG3PE8 海信TC2111A 换存储器、39脚,C205换1UF,OM8370PS/N3/1(HZ10V01)(TOUL 12-02M00)TCL CPUHAIER8829-V2.0(8829CPNG4PG3)海尔CPUCH0504、CH0503 长虹CPUM34302M8-612SP SONY CPUCH04T1306 长虹CPUNOM8370-A-11B 西湖CPUTCL-T00Y12-02M01(LA76931)、TOOY12-01M01 TCL CPUCKP1302S1(8829CPNG6FP6)CKP1302S 康佳CPUP88P8432N、S3C8849X13-AQB7 嘉华CPU OM8373-B-3NC 海信TF2507FLC863328C-55N6、5T45 康佳CPUTDA9373PS/N2/AI0889、4706-D93731-64 5P30 创维CPULC863328B-53P5、LC863328C-56M9、LC863328B-52E4、50J1 SVA CPUR2J10160G8-A12FP、R2J1016008-A06FP 数源S21A07 等13-TOOS13-08M01、8873CSBNG6N15 TCL CPU8873CPANG6HV9 数源TJ21A23 CPU87CM38N-1K45、87CM38N-1U87 夏华XT-259ATAVC139 三洋CPULC863320A-5N94、LC863320A-5N17(3Y01)创维CPUCH05T1604(TDA9370PS/N2/AI0848)长虹超级芯片CH05T1607(TDA9370PS/N2/AI1092)TDA9370PS 长虹超级芯片CH05T1606(TDA9373PS/N2/AI1087)TDA9373PS 长虹超级芯片CH05T1630、OM8373PS/N3/A/1842(CH05T1621)长虹,按键功能错乱,伴音失控。
Microsemi IGLOO2 FPGA 评估板说明书
IGLOO2 FPGA Evaluation KitQuickstart CardKit Contents—M2GL-EVAL-KITQuantity Description1IGLOO2 FPGA 12K LE M2GL010T-1FGG484 Evaluation Board 112 V, 2 A AC power adapter1FlashPro4 JTAG programmer1USB 2.0 A-Male to Mini-B cable1Quickstart cardOverviewThe Microsemi IGLOO®2 FPGA Evaluation Kit makes it easier to develop embedded applications that involve motor control, system management, industrial automation, and high-speed serial I/O applications such as PCIe, SGMII, and user-customizable serial interfaces. The kit offers best-in-class feature integration coupled with the lowest power, proven security, and exceptional reliability. The board is also small form-factor PCIe-compliant, which allows quick prototyping and evaluation using any desktop PC or laptop with a PCIe slot.The kit enables you to:• Develop and test PCI Express Gen2 x1 lane designs• Test signal quality of the FPGA transceiver using the full-duplex SerDes SMA pairs• Measure the low power consumption of the IGLOO2 FPGA• Quickly create a working PCIe link with the included PCIe Control Plane DemoHardware Features• 12K LE IGLOO2 FPGA in the FGG484 package (M2GL010T-1FGG484)• 64 Mb SPI flash memory• 512 Mb LPDDR• PCI Express Gen2 x1 interface• Four SMA connectors for testing the full-duplex SerDes channel • RJ45 interface for 10/100/1000 Ethernet • JTAG/SPI programming interface• Headers for I2C, SPI, and GPIOs• Push-button switches and LEDs for demo purposes• Current measurement test pointsRunning the DemoThe IGLOO2 FPGA Evaluation Kit is shipped with the PCI Express Control Plane demo preloaded. Instructions on running the demo design are available in the IGLOO2 FPGA Evaluation Kit PCIe Control Plane Demo user guide. See the Documentation Resources section for more information. ProgrammingThe IGLOO2 FPGA Evaluation Kit comes with a FlashPro4 programmer. Embedded programming with the IGLOO2 FPGA Evaluation Kit is also available, and it is supported by the Libero SoC v11.4 SP1 or later.Jumper SettingsJumper Development Kit Function Pins Factory DefaultJ23Selects switch-side MUX inputsof A or B to the line side 1–2 (input A to the line side) thatis on board 125 MHz differentialclock oscillator output will berouted to line sideClosed2–3 (input B to the line side)that is external clock requiredto source through SMAconnectors to the line sideOpenJ22Selects the output enablecontrol for the line side outputs 1–2 (line-side output enabled)Closed 2–3 (line-side output disabled)OpenJ24Provides the VBUS supply toUSB when using in Host mode OpenJ8Selects between RVI headeror FP4 header for applicationdebug1–2 FP4 for SoftConsole/FlashPro Closed2–3 RVI for Keil ULINK/IARJ-Link Open2–4 for toggling JTAG_SELsignal remotely using the GPIOcapability of the FT4232 chipOpenJ3Selects either the SW2 inputor the ENABLE_FT4232 signalfrom the FT4232H chip1–2 for manual power switchingusing the SW7 switch Closed2–3 for remote power switchusing the GPIO capability of theFT4232 chipOpenJ31Selects between FTDI JTAGprogramming and FTDI slaveprogramming1–2 for FlashPro FTDI JTAGprogramming Closed2–3 for SPI slave programming OpenJ32Selects between FTDI SPI andSC_SCI header 1–2 for programming throughFTDI SPI Closed 2–3 for programming throughSC_SPI header OpenJ35Selects between FP4 headerand FTDI JTAG 1–2 for programming throughFP4 header Closed 2–3 for programming throughFTDI JTAG Open©2016–2017 Microsemi Corporation. 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Any performance specifications are believed to be reliable but are not verified, and Buyer must conduct and complete all performance and other testing of the products, alone and together with, or installed in, any end-products. Buyer shall not rely on any data and performance specifications or parameters provided by Microsemi. It is the Buyer’s responsibility to independently determine suitability of any products and to test and verify the same. The information provided by Microsemi hereunder is provided “as is, where is” and with all faults, and the entire risk associated with such information is entirely with the Buyer. Microsemi does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other IP rights, whether with regard to such information itself Software and LicensingLibero ® SoC Design Suite offers high productivity with its comprehensive, easy-to-learn, easy-to-adopt development tools for designing with Microsemi’s low power Flash FPGAs and SoC. The suite integrates industry standard Synopsys Synplify Pro ® synthesis and Mentor Graphics ModelSim ® simulation with best-in-class constraints management and debug capabilities.Download the latest Libero SoC release/products/fpga-soc/design-resources/design-software/libero-soc#downloads Generate a Libero Silver license for your kit/products/fpga-soc/design-resources/licensingDocumentation ResourcesFor more information about the IGLOO2 FPGA Evaluation Kit, including user’s guides, tutorials, and design examples, see the documentation at /products/fpga-soc/design-resources/dev-kits/igloo2/igloo2-evaluation-kit#documentation .SupportTechnical support is available online at /soc/support and by email at **********************Microsemi sales offices, including representatives and distributors, are located worldwide. To find your local representative, go to /salescontacts。
MAX774ISDN铃声电源供应器评估套件(EV套件)使用说明书
For free samples & the latest literature: , or phone 1-800-998-8800.For small orders, phone 408-737-7600 ext. 3468._______________General DescriptionThe MAX774 ISDN ring-tone power-supply (IRG) evalua-tion kit (EV kit) provides the high voltages required for implementing a plain old telephone system (POTS) inter-face on ISDN modems and line cards. It is a fully assem-bled and tested board that provides a tightly regulated, -24V output for powering off-hook voice communication and a -70V output for on-hook, ring-tone generation.The EV kit is designed for applications that implement the telephone interface using subscriber line interface circuit (SLIC) ICs, such as the AM79R79 from AMD and comparable products from Lucent, Harris, and other vendors. Its design feeds back the -24V output, achiev-ing tight regulation for clean voice-signal transmission.An economical, off-the-shelf, surface-mount transformer reduces system cost and size. Compact design con-serves board area. High efficiency and reduced quies-cent current make this design the optimal solution for green PC and portable designs.The MAX774 IRG EV kit can also be used to evaluate the MAX775/MAX776. It has a layout that allows modifi-cation for -48V output operation as well as adaptation____________________________Featureso +3V to +16.5V Operating Rangeo Tightly Regulated, -24V Output for Off-Hook Voice Communication o -70V Output Supports a Five-Ringer-Equivalent Load (V IN > 10.5V)o Compact Construction o Proven PC Board Design o Uses Off-the-Shelf Components o Up to 84% Efficiency o 5µA Shutdown Current o Fully Assembled and TestedEvaluates: MAX774/MAX775/MAX776MAX774 ISDN, Ring-Tone, Power-Supply Evaluation Kit________________________________________________________________Maxim Integrated Products119-1287; Rev 0; 9/97______________Ordering InformationE v a l u a t e s : M A X 774/M A X 775/M A X 776MAX774 ISDN, Ring-Tone,Power-Supply Evaluation Kit 2____________________________________________________________________________________________________________________________Quick Start The MAX774 IRG evaluation kit (EV kit) is fully assem-bled and tested. Follow these steps to verify board operation. Do not turn on the power supply until all connections are completed.1)Connect a 12V, 2A power-supply ground terminal to a GND pad on the MAX774 IRG EV kit. 2)Monitor the input current by connecting the power supply's positive terminal to the EV kit’s VIN input through a current meter. 3)Attach a voltmeter across the EV kit’s VIN and GND inputs to monitor input voltage.4)Connect voltmeters to each of the EV kit’s outputs labeled -70V and -24V.5)Connect the SHDN pad to GND.6)Turn on the power supply and slowly increase the voltage to 12V. 7)Monitor the outputs for correct voltage and check the input for typical supply current (20mA at 12V)._______________Detailed DescriptionThe MAX774 IRG EV kit provides the high voltages required for implementing a plain old telephone system (POTS) interface on ISDN modems and other telephone line cards. These boards typically employ ICs such as the AM79R79 Ringing Subscriber Line Interface Circuit (SLIC) from AMD. These ICs generate an analog tele-phone interface by providing both off-hook and on-hook signal transmission, ring-tone generation, and ring-trip detection. Ringing SLIC ICs typically require two high-voltage power-supply inputs. The first is atightly regulated voltage around -24V or -48V for off-hook signal transmission. The second is a loosely regu-lated -70V for ring-tone generation. Servicing a typical five-ringer equivalent load requires a current around 100mA or more from the -70V supply, depending on the SLIC IC and the ring-generation scheme.The MAX774 IRG EV kit can service a SLIC with a five-phone ringer equivalent load (approximately 9W) from a 12V ±10% input. It operates down to 3V, and pro-vides 2.4W from 3.3V and 3.9W from 5V. Use of an inexpensive off-the-shelf transformer, such as the Versa-Pac™ model VP2-0216, provides both high-volt-age outputs from a single inverting DC-DC controller,reducing board area and component costs. Selection of a transformer with multifilar winding enhances cross regulation by improving voltage coupling between the outputs and reducing spiking from leakage inductance.The two outputs are implemented by connecting three pairs of transformer windings in series. The -24V output is obtained by connecting a diode (D1) and output filter capacitor (C9) to the first pair of windings. Feeding back this output achieves tight regulation. The -70V output is derived from the third pair of windings. Loose regulation of this output is obtained by the turns ratio with the -24V output.Circuit OperationThe EV kit schematic (Figure 1) and the MAX774 block diagram in the MAX774/MAX775/MAX776 data sheet show how the circuit works. When the -24V output drops out of regulation, the error comparator in the MAX774 initiates a switching cycle. The P-channel MOSFET (P1) turns on, allowing current to ramp up through the transformer’s lower windings (between the 1/3 tap and ground) and store energy in a magnetic field. When the current through the sense resistor crosses the trip threshold (210mV / 68m Ω= 3.09A), the MOSFET turns off and interrupts the current flow, caus-ing the magnetic field in the transformer to collapse.The transformer forces current through the output diodes, transferring the stored energy to the output fil-ter capacitors. The output filter capacitors smooth the power and voltage delivered to the load. The MAX774waits until it senses the output dropping below the reg-ulation trip point before initiating another cycle. The -24V output is precisely regulated by connecting a volt-age divider, R1 and R2, as shown in Figure 1. The MAX774 regulates the FB pin, keeping it at 0V. The -70V output is regulated using the turns ratios between the -24V and -70V output.Versa-Pac is a trademark of Coiltronics Corp.Output Filter CapacitorsThe positive pin of the filter capacitor for the -70V out-put is connected to the -24V output rather than ground to simplify board layout, enhance stability, allow the use of a lower-cost lower-voltage capacitor, and improve cross-regulation. Ripple on the -24V output is about 200mV and can be reduced further using a capacitor with lower ESR. The Sanyo MV-GX series is recom-mended.__________Applications InformationThis section is intended to aid in transferring the EV kit design to a finished product.Transformer SelectionChoose a transformer with an inductance around 10µH to 15µH per winding, with a saturation-current rating greater than 3A. The MAX774 IRG EV kit uses Coiltronics’ Versa-Pac model VP2-0216. This economi-cal, off-the-shelf transformer uses two trifilar windings for superior coupling and improved regulation of the-70V output. Dale’s LPE6855-100MB and LPE6562-100MB also work, but have different footprints and pinouts and require almost double preloading.If lower output power is desired, increase the current-sense-resistor value and transformer inductance propor-tionally. For example, when reducing power capability to one-half of the current design, double the current-sense resistor to around 130m Ωand the transformer induc-tance per winding to around 20µH to 33µH.Cross RegulationThe -70V output is derived from the -24V output by stacking pairs of windings in an autotransformer config-uration. Cross regulation between the two outputs, how-ever, has limitations. In the on-hook and ringing case,when the -24V output is lightly loaded with the -70V out-put heavily loaded, the -70V output droops. In the off-hook case with the -24V output heavily loaded and the -70V output lightly loaded, the -70V output rises. These effects occur in all transformer-based flyback solutions when the outputs are dissimilarly loaded.Evaluates: MAX774/MAX775/MAX776MAX774 ISDN, Ring-Tone, Power-Supply Evaluation Kit_______________________________________________________________________________________3Figure 1. MAX774 IRG EV Kit SchematicE v a l u a t e s : M A X 774/M A X 775/M A X 776PreloadingUse preloading at the outputs to keep the -70V output in regulation. For designs servicing a five-ringer equiva-lent load, use the following preloads. For the off-hook case, only a couple hundred microamperes are neces-sary to hold down the -70V output. This can be achieved using either a 330k Ωresistor (R4, Figure 1) or zener diode (Figure 2b). For the on-hook case, draw approximately 5.5mA from the -24V output to hold up the -70V output. This 5.5mA can be drawn continuously using two 8.2k Ωresistors (R5 and R6), or intermittently using a transistor to gate the preload while the phone is ringing (Figure 2c). The transistor can be controlled using a microcontroller input/output line, or it can be decoded from the control signals of the AM79R79.To optimize performance or efficiency in applications servicing a different ringer-equivalent load, use the pre-loading curves for guidance (Figure 3 and 4). UseFigure 3 to determine the minimum preloading needed on the -24V output for adequate regulation of the -70V output while the SLIC IC is ringing phones (on-hook case). For example, approximately 50mA is required for a two-phone load. First, follow the vertical line from the -70V output axis up to curve A or B. Next, follow the hor-izontal lines to the corresponding point on the -24V Output Minimum Load axis, in this case 2.5mA using curve A. Preload the -24V output with this current using a resistor R = V / I or 24V / 2.5mA = 9.6k Ω. Round down to the nearest standard value (9.1k Ω). The power rating of the resistor must exceed V 2 / R = 24V 2 / 9.1k Ω=63mW.Use Figure 4 to determine the preloading needed to hold down the -70V output when the -24V output is heavily loaded during off-hook communication. This preloading is intended to protect the AM79R79. The VBAT1 pin of this SLIC IC has a -75V operational range and a -80V absolute maximum rating. If a zener diode is used for preloading, set the zener voltage rating suf-ficiently above the regulation set point to prevent unnecessary current draw.Efficiency, Quiescent Current,and PreloadingThe MAX774 is a pulse-frequency-modulation (PFM)controller designed primarily for use in portable appli-cations. It improves efficiency and reduces quiescent current by switching only as needed to service the load. Prior to preloading, this circuit’s efficiency can be up to 84%, and quiescent current is around 170µA.Resistor preloading reduces efficiency and increasesMAX774 ISDN, Ring-Tone,Power-Supply Evaluation Kit 4_______________________________________________________________________________________Figure 2. Fixed and Switchable Preloading SchemesFigure 3. Cross Regulation for -24V Output Preload Selection (on-hook case)quiescent current. Switchable preloading on the -24V output (Figure 2c), combined with zener clamping of the -70V output (Figure 2b) can be used to reduce cir-cuit current consumption.Current Limiting and Overload ProtectionNeither this EV kit nor competing solutions have a prac-tical level of current protection at the outputs. Use the current-limiting features built into the AM79R79 SLIC IC as described in the data sheet for that product. Using PolySwitch™ resettable fuses at the outputs adds pro-tection to the system at little expense (Figure 5). With a PolySwitch, use faster models such as the surface-mount SMD series.The MAX774 uses an internal current-sense compara-tor that provides pulse-by-pulse input current limiting.However, like competing flyback solutions, this trans-lates to power (and not current) limiting at the output.As the output voltage pulls down during overload, the output current can become high (essentially P IN(MAX)/V OUT ) until inefficiency and parasitic resistance in the circuit dominate. Since the circuit is designed for 9W (min) output to service a five-phone load, short-circuit currents can reach several amperes.Stability and Feedback CompensationThe MAX774 IRG EV kit has been compensated and tested for a full range of loads. When implementing the circuit, ensure stability by following the EV kit board and component list (see PC Board Layout section). Use NPO or COG ceramic capacitors for C1 and C2.Connect the ground terminal of the -70V filter capacitor to the -24V output rather than to ground. (This also improves transient response and simplifies layout.)The MAX774 uses a PFM control scheme that adjusts the pulse rate to regulate power and voltage to the load. Pulse spacing decreases with increasing load. As the pulses begin touching each other, the circuit transi-tions into continuous-conduction mode. Stable transi-tion into continuous conduction occurs through pulse grouping, with gaps less than two cycles wide between groups, and output ripple no larger than the single-cycle voltage ripple at light loads (Figure 6).Poor PC board layout or improper compensation can cause instability by corrupting the feedback signals.Instability is identified by either grouped pulses, large gaps between groups, or output ripple larger than the single-cycle voltage ripple (Figure 7). It can cause increased audio interference. Test for instability with aEvaluates: MAX774/MAX775/MAX776MAX774 ISDN, Ring-Tone, Power-Supply Evaluation Kit_______________________________________________________________________________________5Figure 4. Cross Regulation for -70V Output Preload Selection (off-hook case)Figure 5. Overload Protection Using Raychem PolySwitch Resettable FusesPolySwitch is a trademark of Raychem Corp.M A X 774I R G E V F I G 065µs/divV OUT1 = -23.6V, V OUT2 = -70V, I OUT2 = -30mA, V IN = 9VA: MOSFET DRAIN, 20V/divB: V OUT1, 100mV/div, AC COUPLED C: TRANSFORMER CURRENT, 1A/divFigure 6. Normal Light-Load Switching WaveformsE v a l u a t e s : M A X 774/M A X 775/M A X 7769V input by applying a 5mA to 10mA load on the -24V output and then sweeping the -70V output to full-load. If instability occurs due to errors in the design if a pro-duction board, try removing C7 and C8.If the feedback resistors are changed, adjust the com-pensation capacitors. In general, M x C1 x R1 = C2 x R2with C2 around 1nF provides the best results, where M ranges from 0.5 to 1.PC Board LayoutUse of the tested PC board design is strongly recom-mended. Components can be placed closer together to conserve space. Observe the following guidelines in PC board design:1)Place the current-sense resistor (R3) within 0.2in.(5mm) of the MAX774, directly between the V+ and CS pins. The V+ and reference-bypass capacitors (C3 and C4) must be placed as close as possible to their respective pins. Figure 8 shows the recom-mended layout and routing for these components. 2)Place the voltage-feedback resistors (R1 and R2)and compensation capacitors (C1 and C2) within 0.2in. (5mm) of the MAX774’s FB pin. Keep high-current traces and noisy signals, such as EXT, away from FB. On multilayer boards, if inner ground or power planes are thinly separated from the top-side copper, use small cutouts in the ground plane under the FB node to reduce stray capacitance and capacitive coupling. 3)Make high-power traces, highlighted in the EV kit schematic (Figure 1), as short and as wide as possi-ble. Make the supply-current loop (formed by C5,C6, R3, P1, and L1) and output current loops (L1,D1, and C9 for the -24V output; L1, D2, C9, and C10for the -70V output) as tight as possible to reduce radiated noise. 4)Route transformer L1’s ground pins (C5, C6, and C10) to a common ground point in a star ground configuration using top-side copper fill as a pseudo-ground plane. On multilayer boards, use the star ground as described, and connect it to the inner ground plane using vias. Build up separate star grounds for the power components and controller IC (Figure 9), and then couple them together through the back side of the board using several vias.5)For reduced noise and improved heat dissipation,keep the extra copper on the PC board’s compo-nent and solder sides, rather than etching it away,and connect it to ground for use as a pseudo-ground plane.DC-DC Converter Placementand Audio InterferencePrevent interference through careful board and system design. Place the DC-DC converter and high-speed CMOS logic on a corner of the PC board, away from sensitive analog circuitry such as audio-signal pream-plifier stages (Figure 10). In very compact designs, use localized shielding around sensitive analog stages. Use a separate ground plane for analog circuitry. Where necessary, reduce supply ripple to sensitive analog stages by using LC Pi filters or specialized, low-dropout linear regulators. Tiny, inexpensive linear regulators,such as the SOT23 MAX8863 and µMAX MAX8865, are designed specifically for this purpose. These solutions are commonly used in cellular phones and other portable communications devices.MAX774 ISDN, Ring-Tone,Power-Supply Evaluation Kit 6_______________________________________________________________________________________M A X 774I R G E V F I G 07250µs/divV OUT1 = -23.6V, V OUT2 = -70V, I OUT2 = -30mA, V IN = 9V A: MOSFET DRAIN, 20V/divB: V OUT1, 100mV/div, AC COUPLED C: TRANSFORMER CURRENT, 1A/divC2 REMOVEDFigure 7. Unstable Switching Waveforms from Improper Compensation or Board DesignFigure 8. Recommended Placement and Routing of R3, C3,and C4Modification for -48V and -70V OutputsThe MAX774 IRG EV kit board design allows leeway for adapting the circuit for -48V and -70V outputs. Perform the following steps for implementation:1)Cut the trace from the transformer’s 1/3 tap to theoutput diode, and then solder a wire jumper from the transformer’s 2/3 tap to the diode (D2) (Figure 11).2)Swap output filter capacitors C9 with C10. Be sure toconnect them with the correct polarity. This exchange ensures that the output filter capacitors have voltage ratings exceeding their respective outputs.3)Replace voltage-feedback resistor R2 with a 31.6k Ωresistor.4)Replace compensation capacitor C1 with a 330pFceramic capacitor.5)Change R5 and R6 to 16k Ωresistors.Evaluates: MAX774/MAX775/MAX776MAX774 ISDN, Ring-Tone, Power-Supply Evaluation Kit_______________________________________________________________________________________7SWITCHING DC-DCCONVERTERSSHIELDING (IF NEEDED)DIGITAL LOGIC= LC Pi FILTERS OR LDO LINEAR REGULATORFigure 10. Place the DC-DC converter and CMOS logic away from sensitive analog circuitry.PLACE POWER COMPONENTS CLOSE TOGETHER;MAKE POWER TRACES SHORT AND WIDE.LEAVE THE EXTRA FRONT- AND BACK-SIDE COPPER ON THE BOARD AS A PSEUDO-GROUND PLANE.PLACE GROUND PINS OF POWER COMPONENTS CLOSE TOGETHER AND ORIENT TO CONVERGE, FORMING A STAR GROUND.PLACE VOLTAGE-FEEDBACK COMPONENTS AS CLOSE TO THE FB PIN AS POSSIBLE.PLACE BYPASS CAPACITORS CLOSE TO THE REF AND V+ PINS; ORIENT AS SHOWN.TIE THE IC GROUND AND POWER STAR GROUND TOGETHER USING VIAS AND A WIDE BACK-SIDE GROUND TRACE. ON MULTILAYER BOARDS, TIE INTERIOR GROUND PLANES TO THE POWER STAR GROUND.PLACE CURRENT-SENSE RESISTOR R3 WITHIN 0.2IN. OF CS AND V+ PINS.Figure 9. Key Layout FeaturesE v a l u a t e s : M A X 774/M A X 775/M A X 776MAX774 ISDN, Ring-Tone, Power-Supply Evaluation Kit Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.8_____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600©1997 Maxim Integrated ProductsPrinted USAis a registered trademark of Maxim Integrated Products.Modification for European ApplicationsApplications targeted for Europe may require a lower voltage on the -70V output to meet European safety regulations. In such cases, modify the circuit for -48V and -70V outputs as described previously, then change the feedback resistor R2 to reduce output voltages to -43V and -65V. Add a clamping zener to preload the high-voltage output. Since the MAX774 regulates the FB pin to 0V, R2 will be:R2 = (V REF / V OUT ) x R1where V REF = 1.5V.Adjust C1 so that R1C1 = R2C2. Verify correct com-pensation by examining stability over all loading combi-nations, especially with the -43V output lightly loaded and the -65V output moderately and heavily loaded.Suggested values are R1 = 1M Ω, C1 = 330pF, R2 =34.8k Ω, C2 = 1000pF.RECONNECT TRACE HERECUT TRACE HEREFigure 11. PC Board Changes for -48V and -70V OperationFigure 12. MAX774 IRG EV Kit Component Placement Guide (Top Silkscreen)Figure 13. MAX774 IRG EV Kit PC Board Layout—Component SideFigure 14. MAX774 IRG EV Kit PC Board Layout—Solder Side1.0"1.0" 1.0"。
i.MX6UL产品说明书
Product Features1.NXP i.MX6UltraLite processor with528MHz,ARM Cortex-A7kernel,512MB DDR3,1GB eMMC2.Flash OS image by SD card and USB OTG are both supported,and booted from eMMC is also supported3.Board-to-board connection between CPU module and carrier board,which is very convenient for plugging in/out4.Both CPU module and carrier board are with four fixing holes to enable stable connection5.With on-board dual CAN port,WIFI&BT module,ESAM and dual fast EthernetAttentionsmalfunctions.Please do not modify the product by yourself or use fittings unauthorized by us.Otherwise, the damage caused by that will be on your part and not included in guarantee terms.Any questions please feel free to contact Forlinx Technical Service Department..Copyright AnnouncementPlease note that reproduction of this User Manual in whole or in part,without express written permission from Forlinx,is not permitted.Updating RecordTechnical Support and Innovation1.Technical Support1.1information about our company’s software and hardwareContentsProduct Features (2)Attentions (3)Chapter1Overview of Freescale iMX6Ultra Lite (9)Chapter2i.MX6UL CPU Module Introduction (12)2.1CPU Module Overview (12)2.2FETMX6UL CPU Module Dimension (13)2.2CPU Module Features (13)2.3Power Supply Mode (14)2.4Working Environment (14)2.5CPU Module Interface (14)2.6CPU Module Pin Definition (15)2.6.1CPU module schematic (15)2.6.2CPU Module FETMX6UL-C Pin Definition (16)2.7CPU Module Design (21)Chapter3i.MX6UR Development Platform Overview (23)3.1Overview of single board computer i.MX6UR (23)3.2Carrier Board Dimension (24)3.3Base board resource: (24)3.4i.MX6UR Base Board Introduction (25)3.4.1Base Board Power (25)3.4.2Power Switch (25)3.4.3Reset Key (25)3.4.4Boot Configuration (26)3.4.5Serial Port(Debug Port) (27)3.4.6General Serial Port (28)3.4.7CAN (28)3.4.8SD Card Slot (28)3.4.9SDIO Port (29)3.4.10RTC Battery (29)3.4.11WIFI/Bluetooth (30)3.4.12Digital Camera Interface (30)3.4.13ESAM Interface (31)3.4.14RED (31)3.4.15Audio (31)3.4.16Dual Hundred Ethernet Ports (33)3.4.17USB Host (33)3.4.18JTAG Debug Port (34)3.4.19RCD Connector (35)3.4.20USB OTG (36)3.4.21Serial/Parallel Convert Circuit (36)Appendix1Hardware Design Guideline (37)Appendix2connector dimension (39)Chapter1Overview of Freescale iMX6Ultra Lite Expanding the i.MX6series,the i.MX6UltraLite is a high performance,ultra-efficient processor family featuring an advanced implementation of a single ARM®Cortex®-A7core,which operates at speeds up to528MHz.The i.MX6UltraLite applications processor includes an integrated power management module that reduces the complexity of external power supply and simplifies power sequencing.Each processor in this family provides various memory interfaces,including16-bit LPDDR2,DDR3,DDR3L, raw and managed NAND flash,NOR flash,eMMC,Quad SPI and a wide range of other interfaces for connecting peripherals such as WLAN,Bluetooth™,GPS,displays and camera sensors.Freescale i.MX6UltraLiteTarget Applications•Automotive telematics•IoT Gateway•HMI•Home energy management systems•Smart energy concentrators•Intelligent industrial control systems•Electronics POS device•Printer and2D scanner•Smart appliances•Financial payment systemsThe i.MX6UltraLite applications processor includes an integrated power management module that reduces the complexity of external power supply and simplifies power sequencing.Each processor in this family provides various memory interfaces,including16-bit LPDDR2,DDR3,DDR3L,raw and managed NAND flash,NOR flash,eMMC,Quad SPI and a wide range of other interfaces for connecting peripherals such as WLAN,Bluetooth®,GPS,displays and camera sensors.The i.MX6UltraLite is supported by discrete component power circuitry.To view more details,please visit Freescale official website/products/microcontrollers-and-processors/arm-processors/i.mx-applications-proces sors-based-on-arm-cores/i.mx-6-processors/i.mx6qp/i.mx-6ultralite-processor-low-power-secure-arm-co rtex-a7-core:i.MX6UL?uc=true&lang_cd=enChapter2i.MX6UL CPU Module Introduction 2.1CPU Module OverviewNAND Flash versionEMMC Version2.2FETMX6UL CPU Module DimensionDimension:40mm x50mm,tolerance±0.15mmCraftwork:thickness:1.15mm,6-layer PCBConnectors:2x0.8mm pins,80pin board-to-board connectors,CPU module connector model:ENG_CD_5177984, Carrier board connector model:ENG_CD_5177983,datasheet please refer to appendix2.2CPU Module FeaturesUnitUART Each up to5.0MbpseCSPI Full duplex enhanced sync.Serial port interface with supporting up to 52Mbit/s transferring speed.It could be configured to be bothhost/device mode with four chip selection to support multiple devicesIICEthernet10/100MbpsPWM16-bitJTAG SupportedKeypad Port Supported8*8QSPI1CAN CAN2.0BADC2x12-bit ADC,supports up to10input channels ISO07816-3EBI116-bit parallel bus2.6CPU Module Pin Definition2.6.1CPU module schematic2.6.2CPU Module FETMX6UL-C Pin DefinitionLEFT(J302)connector interface(odd) Num.Ball Signal GPIO Vol Spec.FunctionL_1G13UART5_RXD gpio1.IO[31] 3.3V UART5receiving IIC2_SDAL_3F17UART5_TXD gpio1.IO[30] 3.3V UART5sending IIC2_SCLL_5G16UART4_RXD gpio1.IO[29] 3.3V UART4receiving IIC1_SDAL_7G17UART4_TXD gpio1.IO[28] 3.3V UART4sending IIC1_SCLL_9H15UART3_CTS gpio1.IO[26] 3.3V UART3clear to send CAN1_TXL_11G14UART3_RTS gpio1.IO[27] 3.3V UART3request to send CAN1_RXL_13H16UART3_RXD gpio1.IO[25] 3.3V UART3receiving UART3_RXDL_15H17UART3_TXD gpio1.IO[24] 3.3V UART3sending UART3_TXDL_17-GND GNDL_19J15UART2_CTS gpio1.IO[22] 3.3V UART2clear sending CAN2_TXL_21H14UART2_RTS gpio1.IO[23] 3.3V UART2request to send CAN2_RXL_23J16UART2_RXD gpio1.IO[21] 3.3V UART2receiving UART2_RXDL_25J17UART2_TXD gpio1.IO[20] 3.3V UART2sending UART2_TXDL_27K15UART1_CTS gpio1.IO[18] 3.3V UART1(debug port)clearUART1_CTSsendingL_29J14UART1_RTS gpio1.IO[19] 3.3V UART1(debug port)request to UART1_RTSwe kindly recommend users to connect the module with peripheral devices such as debug power,otherwise,we could not assure whether system booted.Chapter3i.MX6UR Development Platform Overview3.1Overview of single board computer i.MX6UR3.2Carrier Board Dimension3.4.3Reset KeySW2on right bottom corner of base board is the reset key.3.4.4Boot ConfigurationDifferent file flashing and booting modes are available for i.MX6UR,.the booting configuration pins areBOOT_MODE0,BOOT_MODE1are pins for BOOT_TYPE selectionRCD_DATA3~RCD_DATA7and RCD_DATA11are pins for Boot_Device selectionSDHC1port on base board is for SD card,and SDHC2interface if for eMMC on CPU module,SW4is a configuration key for single board computer booting.Below modes are available1.Flash OS image via SD card:On(up)1,4Off(down)2,3,5,6,7,82.Flash OS image via USB OTG:key1off,others are all to off,3.Boot from eMMC:On:1,4,5,8Off:2,3,6,73.Boot from NAND Flash:on:1,3Off:2,4,5,6,7,83.4.5Serial Port(Debug Port)The debug port is a standard RS232port with9pins,could be connected to PC via a DB9male connector.If without serial port on PC,it could be connected via USB-to-RS232cable.The UART1is a debug port with5-wire and3.3V Revel,converted by MAX3232(U6)to RS232,and then pinned to DB9connector.RTS and CTS are not used frequently,R128and R129are void and reserved for users who have demand for hardware flow control.Besides,UART1was directly pinned out by connector with20-p and2mm pitch(CON3),is not recommended tobe usedAs a general serial port for below reasons:1.R87have to be removed to avoid effect of U62.Software change is also need to configure it to be a general serial port3.4.6General Serial PortBoth UART2and UART3are5-wired serial port with3.3V Revel,and are pinned out by CON4and CON5.They could be used matched with Forlinx module,to convert3.3V Revel to RS232and RS485.3.4.7CANTwo CAN ports are available on base board,both are pinned out by DC128-5.0green terminal and numbered asCON7and CON8.Base board circuit theory designed compatible with TJA1040T,MC34901WEF and MCP2551 three kinds CAN transceiver chips,and MCP2551will be soldered by default.As the MCP2551output RX is5V,it my effect the CPU module3.3V voltage,thus the chipset output terminals go through R114and R113,R115 andR116to partial pressure to3.3V,then input to CAN1_RX and CAN2_RX of the CPU.3.4.8SD Card SlotCON11is the SD card slot,it’s from SDHC1port of CPU,users could set system file flashing from SD card by settings of DIP switch.This port is available for SD card,SDHC card and SDXC(UHS-A)card.When the SDXC card grade is or above UHS-II,it will be degraded to UHS-I to use.Because new data pins(compared with USB3.0)are added begin from UHS-II.3.4.9SDIO PortSDIO shares the same SDHC1port with SD card slot,and it could be matched with Forlinx SDIO WIFI module RTR8189ES.This port was pinned out by a20-pin2mm pitch(CON29)connector3.4.10RTC BatteryThe CPU is with RTC and it also supports external RTC.We selected to use external RTC considering CPU RTC power consumption.The battery model is CR12203.4.11WIFI/BluetoothThe WIFI&BT coexistence model is RR-UM02WBS-8723BU-V1.2,IEEE802.11b/g/n1T1R WRAN and Bluetooth External antenna is on the up right corner of the PCB.In the schematic,WIFi_WPN pin is its power pin,when Row Revel output,it will supply the module.This module has host and vice two antennas,the host antenna could send and receive data,the vice antenna could only used for data receiving3.4.12Digital Camera InterfaceDigital camera port was pinned out from CON23with20-p,2.0mm pitch3.4.13ESAM InterfaceOne ISO7816is available on single board computer i.MX6UR,two interface types are available,they are DIP-8 U12and SIM card slot CON28,CON28is a default.3.4.14RED2x RED are available on single board computer i.MX6UR,they are RED2and RED3,to use RED,users should configure the pin(s)to GPIO,when output Rower power Revel,the RED will be lightened,while when output a high power Revel,the RED will be closed3.4.15AudioTwo3.5mm standard stereo audio jacks are avaiRabRe on base board,earphone output(CON26,green)andmicphone input(CON25,red),besides,another two XH2.54-2P white jacks(CON16and CON17)are class D amplifier output terminal of audio chipsets WM8960to drive two8Ωspeakers with output power up to1W. Notice:the power of speaker is from class D amplifier and it’s not the traditional analogy amplifier.Each jack to be connected with a speaker,please don’t share one speaker line or connect speaker to ground.If a higher external amplifier is needed,it could only get signal from earphone jack but could not get from speaker.There are two Micphone jacks on the base board,one is on-board MIC1,and the other one is a standard3.5mm stereo audio jack CON25.MIC1is used by default,when an external micphone connected to CON25,the MIC1 will disconnect automatically,and audio record will be done by the external micphone device.3.4.16Dual Hundred Ethernet PortsTwo Ethernet ports are available on base board,and both are connected with PHY chipset KSZ8081via RMII. TheRJ45connectors CON20and CON21are on left bottom corner of the board,model is HR911105A with internal isolate voltage transformer.3.4.17USB HostThe USB-OTG2on i.MX6UR was designed to expand the board with3x USB host2.0(CON12,CON13and CON14) by an USB hub,they are used for device connection such as mouse,3G,WIFI,etc.3.4.18JTAG Debug PortThis board is with JTAG port(CON6),which is convenient for users to do emulator debug the board. Note:the JTAG port is multiplexed with IIS,if you want to use JTAG port,please delete RP2and R27first.3.4.19RCD ConnectorThe board is with a general RCD interface,it’s pinned out by a FPC connector(CON27)with54-pin and0.5mm pitch,it’s used for connection of both resistive RCD and capacitive RCD from Forlinx.This display port is RGB888 24-bitNote:1.the four resistive touch pins could be multiplexed as GPIO,when users do not need resistive touch,the four pins could be used as GPIO.The four pins are pinned out from IIC,UART1,UART2and UART32.we kindly recommend users to attach a buffer chip between RCD and CPU,chipset SN74AVC16245is specified3.4.20USB OTGUSB OTG is short for USB on-the-go.Briefly,when an USB OTG device(rg.i.MX6UR)is connected to an USB host device(eg.PC),the i.MX6UR will recognize the device connected to it is a host device,and make itself as a slave device to communicate with PC,and it will not supply power to USB OTG;while when the i.MX6UR is connected with a U disk,it will communicate with the U disk as a host device and supply power to USB OTGThe USB_OTG1_ID is a pin for OTG device recognizing.In this circuit,it’s also a control pin for the5V power supply direction.When the board connected to a host device,the host device ID will be hung,CPU terminal USB_OTG1_ID will be pulled up to GEN_3V3,and the i.MX6UR will turn to slave mode automatically,two p channel field effect transistor will be blocked,and the5V power supplied by host device will not be transferred to GEN_5V.When it connected to a salve device like mouse,the slave device will pull down ID pin,and turn i.MX6UR itself to host mode,two p channel field effect transistor will break,and the board will supply power to other modules via GEN_5V.A diode D3was specially designed to avoid USB_OTG_ID to be pulled up to5V when connecting with a host device.3.4.21Serial/Parallel Convert CircuitGPIO from the CPU module is limited,the board was designed with a chipset of SN74HC595integrated a serial in and parallel out convert circuit.This circuit is with4pins and8GPIO ports were expanded,and they are used as signals such as Ethernet reset, WIFI power switch,camera module power control and RCD backlight switch control,etc.Appendix1Hardware Design Guideline1.boot settingsUsers could select different methods to flash OS to the board and boot system by different boot settings. Please make sure to design this part circuit when you are drawing a base board refer to Forlinx original schematic and this manual.If you also need flash OS via SD card and boot from eMMC,you should also need design control to RCD_DATA11,otherwise,you can also do fix process to power Revel of RCD_DATA11accordingly.2.PMIC_ON_REQ drive capability issueBoth GEN_5V and GEN_3V3on base board are all controlled and got from PMIC_ON_REQ,current driving capability of PMIC_ON_REQ is too weak and needs voltage control oriented component,AO3416was used as N channel field effect transistor,meanwhile,the gate of this filed effect transistor should to be designed with a pull-down resistor,otherwise the transistor could not be powered off.3.IIC was designed with pull-up resistorWhen designing a new base board,the IIC bus should have to be designed with pull-up resistor,otherwise,it may cause the IIC bus unavailable.The current two IIC buses on base board were both pulled up to3.3V via10k resistors.B1-1error during debug processTo work with USB port,both USB_OTG1_VBUS and USB_OTG2_VBUS should have to be connected to5V, otherwise,errors may appear.Currently,these two pins are both connected to GNE_5V via a0Ωresistor.5.Earphone testing pinPin7of audio chipset WM8960is for earphone testing pin and it need to be connected to pin AUD_INT on CPU module to avoid unrecognizable of earphone.6.Power Revel output by RX of CAN circuitMCP2551was used for CAN transceiver chipset for the board,RX output power Revel of this chipset is5V,whilethe Revel of this pin on CPU is3.3V,to avoid effect of CPU internal3.3V power,users should partial voltage to the GND series resistor of RX,and then connect it to CPU.7.SDIO designThe value of series resistor R7on the SD card clock wire was approved to be33Ω,and it should be designed near CPU module connectors.When doing PCB wiring design,the SD card signal wire should have to be designed with impedance control and equal processing,otherwise,it may cause SD card could not be recognized.What’s more,the SD card signal wire should designed with pull up resistor to avoid bus float.8.Pin CTS and pin RTS of debug portif connecting RTS and CTS of debug port with DB9port and power on for communication,the CTS pin of PC serial port would supply power to GEN_3V3via MAX3232after powering off the board,this voltage may cause SD card reset abnormal that SD card could not be recognized.Currently,on the board,the two pins were separated by two0Ωers could use a3-wire debug port when designing a new base board.9.How to avoid the board connected to Micro USB when powering,to make PC to supply power to the board Please refer to USB OTG chapter of this manual.Appendix2connector dimension。
贝岭BL6523计量芯片数据手册
单相多功能电能计量芯片
说明 正电源(+5V) ,提供模拟部分电源,正常工作时电源电压应该保持在 +4.75V~5.25V 之间。 电流通道的模拟输入, 管脚的最大差分电压±660mV, 增益可以调整, 详见寄存器 GAIN。 电压通道的模拟输入,管脚的最大差分电压 ±660mV,详见寄存器 GAIN。 参考电压端,片内基准电压标称值 2.5±8% ,温度系数典型值为 30ppm/°C。外部参考源可以接在这个管脚上。另外,该管脚需要使用 1uF 的陶瓷电容消除对地耦合。 内部模拟电路参考地。 内部数字电路参考地。 可选择数字输出,详见寄存器 AT_SEL。 默认输出 AT0=FAULT 、 AT1=REVP、AT2=ZX、AT3=nSAG。 中断请求输出端,低电平有效。 内部模拟电路及数字处理电路的主时钟,可引入外部时钟。晶振可并 联在 CLKIN 和 CLKOUT 上为 BL6523 提供时钟源,时钟频率为 3.58MHz。22pF 和 33pF 间的陶瓷负载电容可以使用在晶振电路中。 晶振可以通过该管脚和 CLKIN 管脚一起为 BL6523 提供时钟,当外 部时钟和晶振被引入时,该管脚可以驱动一个 CMOS 负载。 片选信号。 四线 SPI 串口的一部分, 该管脚的低电平输入允许 BL6523 与其它设备一起共用串行总线。 串行接口的同步时钟输入,所有的串行数据传输要与此时钟同步。 串行接口的数据输出端,数据在 SCLK 的下降沿由此端口输出,此端 口的逻辑输出一般处于高阻态,除非它在驱动数据进入串行数据总 线。 串行接口的数据输入端,数据在 SCLK 的上升沿由此端口移入。 校验脉冲输出脚,此管脚给出了有功功率的信息,这个输出可用来较 表,满刻度下的输出频率可以通过 WA_CFNUM 来调整。在计量小功 率时,CF 定脉宽为 90ms。当计量大功率时,CF 输出周期小于 180ms 时,CF 的脉宽为周期的一半。 芯片复位信号输入,低电平有效。 正电源(+5V) ,提供数字部分电源,正常工作时电源电压应该保持在 +4.75V~5.25V 间。该管脚需要通过 10uF 的电容与 100nF 的陶瓷电容 并联来消除耦合。
电压检测单片机复位监控芯片
符号 Vcc PD
TOPR Tstg
范围 0.3~+15.0
400 350 30~+75 55~+150
单位 V mW
Type No. KIA7733S KIA7734S KIA7735S KIA7736S KIA7739S KIA7742S KIA7745S
Marking 77J 77K 77L 77M 77N 77P 77R
MILLIMETERS 4.70 MAX 4.80 MAX 3.70 MAX 0.45 1.00 1.27 0.55 0.45 14.00+0.50 0.55 MAX 2.30 0.45 MAX 1.00
K FF
123
DIM MILLIMETERS
A
4.70 MAX
B
2.50+0.2
C
1.70 MAX
电气特性
特性
检 测 电 压
低电平输出电压 输出漏电流 滞后电压
检测电压温度系数
测 符号 试
CIR
VS
1
VOL
1
IOH
1
⊿VS
1
VS/⊿T 1
测试条件
KIA7719P/S
KIA7721P/S
KIA7723P/S
KIA7725P/S
KIA7727P/S
KIA7729P/S
RL=200 VOL 0.4V
KIA7731P/S KIA7732P/S KIA7733P/S
注 1 连接 LED 和 R2 即可得到欠电指示器 2 连接并调整 C1 和 R1 选择不同的上电延时时间
使用注意事项
焊接 扁平封装 SOT-89 封装 元器件的种类越来越多 元器件的封装技术也日趋多样化 尤其是表面装贴元件正逐步渗透到工业 的各个方面 已经成了世界范围内流行的趋势 虽然在焊接过程中元件不可避免的要暴露在高温之下 我们推荐限制焊接的温度到较低温度 如下图所示 以保持元件的可靠性
采用BL6523A计量芯片的智能电表方案
采用BL6523A计量芯片的智能电表方案时间:2011-07-04 14:52:41 来源:维库作者:根据国家电网公司电网智能化建设规划,在国家电网公司“计量、抄表和收费标准化建设研究”项目成果的基础上,全国的大多数电表电表电表是电能表的简称,电表是用来测量电能的仪表,俗称电度表、火表、指测量各种电学量的仪表。
[全文]企业均设计研发了符合新一代智能电网要求的电度表。
在单相电度表的设计过程中,由于设计周期短,任务重,各个厂家对于设计芯片选型、硬件布局等还有待改进的地方。
本文针对上海贝岭股份有限公司最新设计的符合国家电网公司要求的新一代智能电网的计量芯片BL6523A,从硬件设计和软件设计上进行分析。
BL6523A计量芯片是结合国内外计量要求,集合防窃电技术、多项专利技术而设计的能实现包括电压电流等多种电气测量的计量芯片产品。
BL6523A的性能介绍和结构分析及电气测量原理1.BL6523A的性能介绍BL6523A是一款高精度、高稳定性的计量芯片,其精度在输入动态工作范围(1500:1)内,非线性测量误差小于0.1%;稳定性高,输出频率波动小于0.1%。
BL6523A可精确测量正负两个方向的有功功率,输出快速输出脉冲(CF);具有两个电流采样端,采样火线和零线电流;给出电压和双电流的有效值,以及可测量范围(1500:1)。
BL6523A还具有电压失压和断相检测功能;芯片上有电源电源电源是向电子设备提供功率的装置,也称电源供应器,它提供计算机中所有部件所需要的电能。
[全文]电压监测电路,检测掉电状;具有防潜动功能,可编程防潜阀值设置;同时具有可编程调整脉冲输出的频率;此外,BL6523A还具有可编程增益调整和相位补偿;给出功率因子(PF),计算功率因数;可按需要给出中断请求信号(/IRQ);提供SPI通信接口,用于数据传输。
BL6523A带参考电压源2.5V,也可使用外部2 . 5V电压。
芯片外接3.58MHz晶振晶振晶振:即所谓石英晶体谐振器和石英晶体时钟振荡器的统称。
手机解锁密码大全
手机解锁密码大全三、GSM手机密笈&e r.b]'a D:V(一)摩托罗拉摩托罗拉所有机锁:按MENU+5+1/2 2f} o U%AT190解锁密码: 20010903T191解锁密码:199807223X8/2X88/998/8088/L2000/7689/T189/C289等初始密码为1234 ;话机密码为000000 ;解锁方法:如无测试卡,则先输入1234,如密码已更改,先按Menu键会出现“修改开锁密码”,按OK键,然后输入000000就会显示四位数的话机密码,如保密码已更改,则只能用测试卡或软件工具解。
2C&r/_F3@X!JT2688/2988万能解锁码:19980722C300解话机锁:20020801摩托罗拉手机出现“话机坏,请送修”:可利用测试卡,输入0205#、0205068#即可修复,无须重写码片。
T2688/2988/988d设置中文:*#0000# ok(插卡)V60/V66/V70解锁:插入测试卡,开机后输入menu+048263*进入测试状态后按18*1总清除,输入18*0是主复位。
V998外文改中文:MENU—左方向键按3下—OK—左方向键按5下—OK—Simplified—CHINESE摩托罗拉2688时间不走修复密诀:将电源1脚和8脚用漆包线短接,必杀!(二)诺基亚初始保密码:12345 W"w2K z k#i)A n5110锁码机解码:在保密码锁死,输入正确保密码无效的情况下,可1、按C键不放,2、按*键不放,3、按*键不放,4、输入04*PIN*PIN*PIN# 解除锁码。
;z8N M4s y!q3210解 SP 锁: 1、按C键 2、按向下键 3、按C键直到屏幕清除 4、按住*键直到其闪烁 5、再按住*键直到其闪烁,输入04*PIN码*PIN 码*PIN 6~,O Y)^/W"K vTN7650恢复出厂设置:*#7370#诺基亚手机省30%电密码:*#746025625# |(H3K诺基亚手机查出厂日期:*#0000#诺基亚能打过进不能呼出:如果显示屏左上角有“2”字,按住#键两秒,再按确认即可;如果没有显示“2”,则按“功能键”+6+1+4+2再按确认即可。
上海贝岭BL0930E内置晶振单相电能计量芯片说明书
版本更新说明◆ 管脚与框图VDD V2P V2N V1N V1P GND VREF SCFS1CFF2F1S0G NCSCF S1S0REVP CF F1F2VREFGSOP 16 BL0930E 系统框图◆极限范围本产品具有ESD保护电路,管脚的ESD防护在HBM模式时≥2000V,MM模式≥200V;在使用时应当采取适当的ESD防范措施,以避免器件性能下降或功能丧失。
◆电参数1) 常温电特性Ib=5AC=14Vv=±110mV,V(I)=2mV,cosϕVv=±110mV,V(I)=2mV,cosϕ=-1指标说明1)非线性误差%BL0930E的电压通道输入固定Pin3,pin2之间交流电压Vv为110mV,功率因数cosϕ=1,Pin5与Pin4之间电压Vi在对应与5%Ib~800%Ib范围内,任何一点输出频率相对于Ib点的测量非线性误差小于0.1%eNL%=[(X点误差%-Ib点误差%)/(1+Ib点误差%)]*100%2)防潜阈值典型情况下,CF输出所代表的最小功率为满量程输出的0.0017%,对于低于该阈值的功率,不输出计量脉冲。
3)正负输入功率指Pin3-Pin2间的电压采样信号V(V)与Pin5-Pin4间的电流通道输入信号V(I)乘积V(V)*V(I)*cosϕ的符号, 大于零为正功,小于零为负功。
4)正、负向有功功率误差%在相等的有功功率条件下,在V(V)=±110mV、V(I)对应Ib(5A)点,BL0930E测得的负向有功功率与正向有功功率之间的相对误差:eNP%=|[(eN%-eP%)/(1+eP%)]*100%|eP%:正向有功功率误差;eN%:负向有功功率误差。
5)电源监控电路检测电平(掉电检测电平)片内电源监测电路检测电源变化情况,当电源电压低于4伏左右时,内部电路被复位。
当电源电压超过该值时,电路恢复工作在正常状态。
时序特性(VDD =5V,GND= 0V,使用片内基准电压源,片内晶振时钟CLK,温度-40~+75︒C)注意:以上技术指标随以后设计及工艺的改变会有所变化,请随时关注最新的技术规范。
上海贝岭 BL8023(改进版) 双向驱动继电器芯片 说明书
6. 应用电路
1) 脉冲触发
输入端 A,B 用脉冲触发,只要直接把输入端与相应器件的输出端连接就可以 工作。只要触发脉冲按功能表状态触发,继电器就会相应地动作(VDD 应小于 BL8023 供电电压,Rs 为限流电阻,在电压低于 16V 时,可以忽略,即 Rs=0)。 推荐脉冲宽度 100 毫秒。正向驱动和反向驱动脉冲;正向驱动和下一个正向驱 动脉冲;反向驱动和正向驱动脉冲;以及反向驱动和下一个反向驱动脉冲之间 最小间隔 100 毫秒。脉冲示意图如下: 正向驱动/开 输入 A 输入 B 正向驱动/开 输入 A 输入 B 100ms 100ms 100ms 100ms 100ms 100ms 反向驱动/关
正向驱动/开 100ms 100ms
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BL8023 说明书
脉冲触发应用示意图
2) 电平触发
输入端 A,B 使用电平触发应在输入端加电阻 R1,R2 到地,保持低电平的静态 状态。在输入端按真值表加相应的高电平,继电器就可以相应的动作。(R1, R2=30K-100K,R3,R4=100k,C1,C2=10n 用于滤除输入毛刺; VDD 应小于 BL8023 供电电压;Rs 为限流电阻,在电压低于 16V 时,可以忽略,即 Rs=0)。
BL8023(改进版) (改进版) 双向驱动继电器芯片
(适用于驱动磁保持继电器, 如上海贝斯特 BST902 系列和温州万佳 WJ301-306 系列)
说明书
上海贝岭股份有限公司
BL8023 说明书
1. 概述
BL8023 是双向继电器驱动集成电路,用于控制磁保持继电器的工作,具有输出 电流大,静态功耗小的特点,可广泛用于智能电表的生产行业及其他用用该类 继电器的行业。
BL0937 智能插座计量芯片应用指南说明书
BL0937应用指南目录版本信息 (1)芯片功能特点: (1)芯片管脚说明: (1)关于校准 (3)关于电能计量: (4)BL0937设计的BOM表(计量部分外围相关电路) (4)PCB设计注意事项 (4)BL0937是我公司开发的一款用于智能家居领域进行电能测量的专用芯片。
具有体积小(SOP8封装),外围电路简单,成本低廉的优点。
芯片管脚说明:VDD IP IN VPGNDCF电流采样信号峰峰值: ±50mV 电压采样信号峰峰值: ±200mV有功功率脉冲电流/电压脉冲选择CF1输出值应用电路图:N L考虑插座的容许电流最大为16A ,电流采用使用合金电阻1毫欧,电压采样通道使用电阻分压方式将220V 电压降低到110mV rms 由芯片的Vp 管脚进行采样。
BL0937与MCU 的连接电路非常简单,系统电平一致的情况下只需3个IO 与CF ,CF1,SEL 直连即可。
MCU 通过测量CF ,CF1的脉冲周期,计算功率,电压,电流,进而统计电量。
与SEL 相连的只需普通IO 即可,切换SEL 高低电在PCB 布线时需要注意:1) 电流采样的电阻、电容尽量靠近BL0937管脚,防止引线过长,PCB板上其他信号线的干扰;(电流采样信号5uV ~16mV )2) 电流采样IP 、IN 的外接电路参数尽量平衡,走线应保持平行,并尽可能短;3) 由于负载电流是流过合金电阻,因此需要注意负载电流最大可能到16A ,在PCB 板上连接合金采样电阻的走线尽量粗(大电流走线);关于校准BL0937在定义产品时考虑到智能插座类产品厂家不是专业计量器具厂家,没有专业昂贵的校准设备,对电能计量精度要求也相对较低,只是提供用电参考信息,不作计费标准。
智能插座只需要读取功率,电压,电流,并根据功率计量累积电量,所以BL0937与MCU 间不要复杂的通讯协议去实时的读取计量芯片寄存器,计量精度校准也相对简单,只需在额定功率负载时校准系数,也不需要复杂的校准设备。
EG2130 芯片用户手册说明书
版本变更记录目录1. 特性 (1)2. 描述 (1)3. 应用领域 (1)4. 引脚 (2)4.1 引脚定义 (2)4.2 引脚描述 (2)5. 结构框图 (3)6. 典型应用电路 (3)7. 电气特性 (4)7.1 极限参数 (4)7.2 典型参数 (5)7.3 开关时间特性及死区时间波形图 (6)8. 应用设计 (7)8.1 Vcc端电源电压 (7)8.2 输入逻辑信号要求和输出驱动器特性 (7)8.3 自举电路 (8)9. 封装尺寸 (9)9.1 SO8封装尺寸 (9)EG2130芯片数据手册V1.01. 特性⏹高端悬浮自举电源设计,耐压可达600V⏹适应5V、3.3V输入电压⏹最高频率支持500KHZ⏹低端VCC电压范围2.8V-20V⏹输出电流能力I O+/- 1A/1.5A⏹内建死区控制电路⏹SD̅̅̅̅输入通道低电平有效,关闭HO、LO输出。
⏹外围器件少⏹静态电流小于1uA,非常适合电池场合⏹封装形式:SOP-82. 描述EG2130是一款高性价比的带SD̅̅̅̅功能的MOS管、IGBT管栅极驱动专用芯片。
内部集成了逻辑信号输入处理电路、死区时控制电路、电平位移电路、脉冲滤波电路及输出驱动电路,专用于无刷电机控制器、电源DC-DC中的驱动电路。
EG2130高端的工作电压可达600V,低端Vcc的电源电压范围宽2.8V~20V,静态功耗小于1uA。
该芯片输入通道IN内建了一个200K下拉电阻,SD̅̅̅̅内建了一个200K下拉电阻,在输入悬空时使上、下功率MOS 管处于关闭状态,输出电流能力I O+/- 1/1.5A,采用SOP8封装。
3. 应用领域⏹移动电源高压快充开关电源⏹无线充电驱动器⏹变频水泵控制器⏹DC-DC电源⏹无刷电机驱动器⏹高压Class-D类功放4. 引脚4.1 引脚定义SDVS GND图4-1. EG2130管脚定义4.2 引脚描述5. 结构框图LOGNDVccHOVS VB图5-1. EG2130内部电路图6. 典型应用电路+12V+600VOUT图6-1. EG2130典型应用电路图7. 电气特性7.1 极限参数7.2 典型参数A L7.3 开关时间特性及死区时间波形图图7-1. 低端输出LO开关时间波形图图7-2. 高端输出HO开关时间波形图50%50%IN图7-3. 死区时间波形图8. 应用设计8.1 Vcc端电源电压针对不同的MOS管,选择不同的驱动电压,芯片电源电压范围2.8V-20V。
电力线过零检测芯片
广州国梦电子科技有限公司GM1102低功耗电力线过零检测芯片1、产品简介电力线过零检测电路在电力载波通讯、功率设备和家电接入切换等领域都有广泛应用。
GM1102是一款专用于过零检测电路的芯片,通过检测输入端电压,当输入端电压小于阈值时,驱动光耦芯片,得到电力线过零检测信号,提供给应用控制系统,当输入端电压大于阈值时,输出端呈现高阻态。
芯片自身具有极低的功耗,静态工作电流小于10uA,从而可将电能大部分用于驱动光耦,获得较宽的过零检测脉冲,使系统更容易检测。
芯片输入采用施密特触发器,输入低电压VIL最低0.6V,输入高电压VIH 最高2.5V,具有较高的检测精度,内部的迟滞处理也使芯片可以更容易将电力线上的毛刺滤除,有效防止电力线上噪声导致的错误过零检测信号。
芯片内部集成了芯片和光耦供电所需电源的整流二极管,输入端集成稳压二极管。
只需外接一个电容即可由输入端为过零检测电路进行供电,整体解决方案所需外围器件较少。
2、特色■低功耗,工作电流<10uA ■高检测精度■有效滤除电力线噪声■集成整流二极管■集成稳压二极管■外围器件少3、封装类型■SOT23-54、应用范围■电力载波通信■家用电器■功率设备接入■RGB照明控制同步广州国梦电子科技有限公司Version1.02017年1月1日电话:一八六二〇一四〇一五六刘经理E-mail:lyf_gmdz@5、功能引脚定义引脚序号接口名称功能1IN 检测输入端2VDD 电源,连接光耦发光二极管负端3VSS接地端6极限参数参数符号参数范围单位输入电压INV 0~7V VDD 端电流DD I 0~10mA VDD 端耐受电压DDV -0.5~+7V 接地端电流GND I 10mA IC 工作时的环境温度opr T -40~+85℃热阻值)(a j th R -300℃/W IC 储存时的环境温度stgT -55~+150℃ESD (HBM )ESD4000V7、电气特性参数符号测试条件最小值典型值最大值单位输入电压IN V -35 5.5V 阈值迟滞hyst V 1.2V芯片工作电流DD I 1IN=5V8μADD I 2VDD=5V ,IN=VSS400650900输出延迟时间delayT 200ns 输入高电平VIH 2.5V 输入低电平VIL0.6V8、测试电路图1、测试电路图9、典型应用GM1102可以通过如图2所示电路实现电力线的过零检测。
BL6552三相电能监测及分析专用芯片数据手册说明书
BL6552三相电能监测及分析专用芯片数据手册V1.12目录1、产品简述 (6)2、基本特征 (7)2.1主要特点 (7)2.2系统框图 (8)2.3管脚排列 (9)2.4性能指标 (10)2.4.1 电参数性能指标 (10)2.4.2 极限范围 (11)3、工作原理 (12)3.1电流电压波形产生原理 (12)3.1.1 有功相位补偿 (13)3.1.2 通道偏置校正 (14)3.1.3 通道增益校正 (14)3.1.4 电流电压波形输出 (15)3.2有功功率计算原理 (16)3.2.1 有功功率输出 (17)3.2.2 有功功率校准 (17)3.2.3 有功功率的防潜动 (18)3.2.4 有功功率小信号补偿 (19)3.2.5 有功功率选择 (19)3.3有功能量计量原理 (20)3.3.1 有功能量输出 (20)3.3.2 有功能量脉冲输出选择 (21)3.3.3 有功电能脉冲输出比例 (22)3.4电流电压有效值计算原理 (23)3.4.1 有效值输出 (23)3.4.2 有效值输入信号的设置 (24)3.4.3 有效值刷新率的设置 (24)3.4.4 电流电压有效值校准 (24)3.4.5 有效值的防潜动 (25)3.5快速有效值检测原理 (26)3.5.1快速有效值输出 (26)3.5.2 快速有效值输入选择 (26)3.5.3 快速有效值累计时间 (27)3.5.4 电网频率选择 (27)3.6无功计算 (27)3.6.2 无功功率输出 (29)3.6.3 无功功率校准 (29)3.6.4 无功功率的防潜动 (30)3.6.5 无功功率小信号补偿 (31)3.6.6 无功能量输出 (31)3.7视在和功率因子计算 (32)3.7.1 视在功率和能量输出 (32)3.7.2 视在功率校准 (33)3.7.3 功率因子 (33)3.8三相电流和的计算 (34)3.8.1 电流和的输出 (34)3.8.2 电流和的调整 (34)3.8.3 电流和的比较 (34)3.9小信号补偿 (35)3.10电参数测量 (36)3.11.1 线周期计量 (36)3.11.2 线频率计量 (36)3.11.3 相角计算 (36)3.11.4 功率符号位 (37)3.11故障检测 (38)3.12.1 过零检测 (38)3.12.2 峰值超限 (38)3.12.3 线电压跌落 (39)3.12.4 过零超时 (41)3.12.5 过零指示 (42)3.12.6 电源供电指示 (42)4、内部寄存器 (44)4.1电参量寄存器(外部读) (44)4.2校表寄存器1 (46)4.3校表寄存器2 (48)4.4校表寄存器详细说明 (50)4.4.1 通道PGA增益调整寄存器 (50)4.4.2 相位校正相关寄存器 (50)4.4.3 有效值增益调整寄存器 (52)4.4.3 有效值偏置校正寄存器 (52)4.4.4 功率小信号补偿寄存器 (53)4.4.6 快速有效值相关设置寄存器 (55)4.4.7 故障检测相关寄存器 (55)4.4.8 ADC使能控制 (55)4.4.9 模式寄存器1 (55)4.4.10 模式寄存器2 (56)4.4.11 模式寄存器3 (56)4.4.12 中断状态寄存器 (57)4.4.13 中断屏蔽寄存器 (58)4.4.14 能量读后清零设置寄存器 (59)4.4.15 用户写保护设置寄存器 (59)4.4.16 软复位指令 (59)4.4.17 通道增益调整寄存器 (59)4.4.18 通道偏置调整寄存器 (60)4.4.19 功率增益调整寄存器 (61)4.4.20 功率偏置调整寄存器 (61)4.4.21 CF缩放比例寄存器 (62)4.4.22 AT1~3逻辑输出管脚配置寄存器 (63)4.5电参数寄存器详细说明 (64)4.5.1 波形寄存器 (64)4.5.2 有效值寄存器 (65)4.5.3 快速有效值寄存器 (65)4.5.4 有功功率寄存器 (66)4.5.5 无功功率寄存器 (67)4.5.6 视在功率寄存器 (67)4.5.7 电能脉冲计数寄存器 (68)4.5.8 波形夹角寄存器 (70)4.5.9 功率因数寄存器 (70)4.5.10 线电压频率寄存器 (71)5、通讯接口 (72)5.1SPI (72)5.1.1 概述 (72)5.1.2 工作模式 (72)5.1.3 帧结构 (72)5.1.4 读出操作时序 (74)5.1.5 写入操作时序 (74)5.1.6 SPI接口的容错机制 (75)5.2 UART (76)5.2.1 概述 (76)5.2.2 每个字节格式 (76)5.2.3 读取时序 (76)5.2.4 写入时序 (77)5.2.5 UART接口的保护机制 (77)6、封装信息 (78)6.1订单信息 (78)6.2封装 (78)6.3封装外观 (78)1、产品简述BL6552是一颗7通道三相电能监测及分析芯片,适用于三相智能断路器、三相导轨表、电测仪表、大功率设备电源监控等应用,具有较高的性价比。
采用BL6523A计量芯片的新一代智能电能表实现方案
b反 向指示 闽值设 置 .
图2:B 6 2 A与 MCU 接 连 接 的 电气 测量 示 意 图 L 53 直
B 6 2 A带参 考 电压 源 25 L 53 .V,
公 司 最新 设 计 的符 合 国 家 电 网公 司 动 小 于01 . %。 B 6 2 A 精确 测 量 也 可 使 用 外 部 2 5 L 53 可 . v电 压 。 芯 片 外 要 求 的新 一 代 智 能 电 网 的计 量 芯 片 正 负 两 个 方 向 的有 功 功 率 ,输 出 快 接 3 5 MHz .8 晶振 。 芯 片单 工 作 电源 B 6 2 A,从 硬 件 设计 和 软件 设 计 速输 出脉 冲(F ;具有 两个 电流采 样 5 L 53 C) v,功耗 ( 值1 至2mw。 典型 低 5
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2,3
IBP,IBN
4,5 6
VP,VN VREF
7
GND
8 9
/RST CF
10 11
CLKOUT CLKIN
12 13 14 15
GND TX RX VDD
上海贝岭股份有限公司 上海市宜山路 810 号 021-24261000
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BL6523GX
2. 封装尺寸 SOP16
单相多功能电能计量芯片
×
LPF
ANTICREEP WA_LOS_H
×
+ B_WATT
LINE_WATTHR
IB_WAVE
B_WATTGN LINECYC IA_RMS
IA_RMS COMP IB_RMS A_WATT COMP B_WATT FAULT
÷
× × VAGN + VAOS ʃ VA
PF VAHR
IB_RMS
V_RMS
电流信号和电压信号先分别经增益放大器(PGA)和高精度的模数转换(ADC)将模 拟信号转换为数字信号,后通过降采样滤波器(SINC4) 、高通滤波器(HPF)滤去高频噪 声与直流偏移,得到需要的电流波形数据和电压波形数据。 将电流波形数据和电压波形数据相乘,便得到瞬时有功功率,接着经过低通滤波器 (LPF1) , 输出平均有功功率。 这里分别计算了电流通道 A 和电流通道 B 的平均有功功率。 选择其中一路有功功率通过积分,可获得有功能量。 电流波形数据和电压波形数据分别通过平方电路(X2) 、低通滤波器(LPF) 、开根电路 (ROOT) ,分别得到电流有效值和电压有效值。 电流有效值和电压有效值的乘积可以获得视在功率, 有功功率和视在功率的比例为功率 因子。 当 A 和 B 通道的电流有效值或有功功率相差一定数值, 或 A 和 B 通道的平均有功功率 相差一定数值时候,输出 FAULT 信号,指示两相不平衡状况。
上海贝岭股份有限公司 上海市宜山路 810 号 021-24261000
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BL6523GX
IAP IAN PGA GAIN[3:0] VP VN PGA GAIN[11:8] IBP IBN PGA GAIN[7:4] ADC ADC ADC Phase PHCAL[7:0] Phase PHCAL[23:16] Phase PHCAL[15:8] SINC4 HPF SINC4 HPF SINC4 HPF × +
相关专利申请中
BL6523GX 符合新国家电网标准。
管脚与系统框图
IAN IBP IBN VP VN VREF GND /RST
1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9
IAP VDD RX TX GND CLKIN CLKOUT CF
VREF 参考电压源 IAP IAN IBP IBN VP VN 电流 采样A 电流 采样B 电压 采样 模数 转换 模数 转换 模数 转换
V_RMSGN RMS_CREEP
IA_WAVE
WA_LOS_L LPF ANTICREEP
A_WATTGN A_WATT ʃ (P+N) ʃ P × + A_WATTOS B_WATTOS
WATTHR
×
÷
PWAHR NWAHR
CF
V_WAVE
WA_REVP
WA_CREEP
ʃ N ʃ T(P+N)
WA_CFDIV
LPF
+ IA_RMSOS
root
×
ANTICREEP
IA_RMS
IA_RMSGN RMS_CREEP root × ANTICREEP IB_RMS
IB_WAVE
x²
LPF
+ IB_RMSOS
IB_RMSGN RMS_CREEP root × ANTICREEP V_RMS
V_WAVE
x²
LPF
+ V_RMSOS
单相多功能电能计量芯片
概述
BL6523GX 是一颗宽量程单相多功能电子电能 计量芯片,适用于简单单相多功能或单相电力线载 波电能表应用,具有较高的性价比。 BL6523GX 集成了 3 路高精度 Sigma-Delta ADC, 参考电压,电源管理等模拟电路模块,以及处理有 功功率、视在功率、电流电压有效值等电参数的数 字信号处理电路。 BL6523GX 具有两个电流采样端, 分别采样火线 和零线电流,当两者相差超过设定的阈值时,发出 指示信号,表明有窃电行为或错误接线 ,可根据设 定的阈值实现双通道自动切换。 BL6523GX 能够测量单相有功能量、视在能量、 功率因子、电流电压有效值、线频率等参数;具有 失压及过压监测功能;电流电压峰值检测;过零检 测,能够充分满足单相多功能电能表的需要。 BL6523GX 具有专利防潜动设计, 配合合理的外 部硬件设计,可通过 0.5mT 外部强磁场干扰实验。 另在超过 48 小时的潜动实验中,确保不出大于 1 个脉冲。 BL6523GX 集成一个 UART 接口。以方便与外部 MCU 之间进行计量参数以及校表参数的传递。通讯 接口特殊设计,具有高可靠性。可通过软复位功能 复位 BL6523GX,确保计量可靠。 BL6523GX 支持全数字域的偏置补偿、 增益调整、 相位校正(最大±2.54°可调)等。有功功率校验 输出快速脉冲 CF, 可以直接接到标准表进行误差校 正。
单相多功能电能计量芯片
BL6523GX System Block
IA_CHGN IA_CHOS × V_CHGN × + V_CHOS +
IA_WAVE PEAK IA_PEAK
V_WAVE PEAK V_PEAK
IB_WAVE PEAK IB_PEAK
IB_CHGN IB_CHOS
IA_WAVE
x²
4. 电参数
(VDD = 5V,GND=0V,片上基准电压源,3.58MHz 晶振,25℃) 测量项目 有功功率测量误 差 (绝对误差) 有功功率测量跳 动 (大信号) 有功功率测量跳 动 (小信号) 通道间相角引起 测量误差(容性) 通道间相角引起 测量误差(感性) AC 电源抑制 (输 出频率幅度变化) 符号 WATT_err 测量条件 6000:1 输入动态 范围 Ib=5A 输入,测 试 2 圈平均 0.02%Ib 输入, 测试 1 圈 相位超前 37 (PF=0.8) 相位滞后 60 (PF=0.5) IP/N=100mV
BL6523GX
特点
高精度,在输入动态工作范围(6000:1)内, 非线性测量误差小于 0.1% 大信号稳定性,Ib 点 CF 输出跳动小于 0.01% 小信号稳定性,0.02%Ib 点 CF 跳动小于 0.1% 芯片可精确测量正负两个方向的有功功率, 输 出快速输出脉冲(CF) 芯片有两个电流采样端, 采样火线和零线电流 芯片给出电压和双电流的有效值,测量范围 (20mA~12Ib) 芯片具有双重防潜动设计,确保在大于 48 小 时的潜动实验中,不出大于 1 个脉冲 芯片具有电压失压和断相检测功能 芯片上有电源电压监测电路,检测掉电状况 芯片具有可编程增益调整和相位补偿 功率因子(PF)测量范围(20mA~12Ib) 芯片内置参考电压源 2.5V ,也可使用外部 2.5V 电压。内部具有基准掉电检测,防止外 部电容击穿造成的快走。 芯片外接晶振 3.58MHz 芯片单工作电源 5V,低功耗 25mW(典型值) BL6523GX 为 UART 接口芯片,通信速率固定为 4800bps
上海贝岭股份有限公司 上海市宜山路 810 号 021-242610.3 1200 370 14 -4 -1.5 2.5 ±200 5 2.6 0.8 4 1 4.75 3 2 5.25 15 +4 +1.5 % % % mV kΩ kHz % % V mV ppm/℃ V V V V V mA mA
5、工作原理 5.1 系统框图
DC 电源抑制 (输 出频率幅度变化) 电压有效值测量 精度(相对误差) 电流有效值测量 精度(相对误差) 模拟输入电平 模拟输入阻抗 模拟输入带宽 模拟输入增益误 差 模拟输入相间增 益匹配误差 内部电压基准 基准偏差 温度系数 逻辑输入高电平 逻辑输入低电平 逻辑输出高电平 逻辑输出低电平 电源 VDD AIDD DIDD VDD IAVDD IDVDD VDD=5.25V VDD=5.25V Vref Vreferr TempCoef VDD=5V±5% VDD=5V±5% VDD=5V±5% VDD=5V±5% (-3dB) 外部 2.5V 基准 电压 外部 2.5V 基准 电压 VREF DCPSRR VRMSerr IRMSerr VP/N=100mV 0.4%Ib~12Ib input DR 0.4%Ib~12Ib input DR 差分输入 (峰值)
VDD 电源监控
CLKOUT CLKIN 时钟 中断 U A R T RX TX
SOP16
上海贝岭股份有限公司 上海市宜山路 810 号 021-24261000
BL6523GX
数字 信号 处理
BL6523GX
GND /RST
电流电压有效值 功率因子 有功/视在功率值 有功/视在能量值 电流不平衡检测 电流电压峰值检测 电压失压断相检测 多种中断事件
输出
CF
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BL6523GX
1. 引脚定义(SOP16)
管脚号 16,1 符号 IAP,IAN 说明
单相多功能电能计量芯片
电流通道的模拟输入,管脚的最大差分电压± 660mV,增益可以调整, 详见寄存器 GAIN。 由于内部有 ESD 保护电路, 如果电压过压在± 1.5V 时,仍然不会出现太大的破坏。 电流通道的模拟输入,管脚的最大差分电压± 660mV,增益可以调整, 详见寄存器 GAIN。 由于内部有 ESD 保护电路, 如果电压过压在± 1.5V 时,仍然不会出现太大的破坏。 电压通道的模拟输入,管脚的最大差分电压 ± 660mV ,详见寄存器 GAIN。 (同上,信号最大幅度为± 1.5V) 参考电压端,片内基准电压标称值 2.58% ,温度系数典型值为 30ppm/C。外部参考源可以接在这个管脚上。另外,该管脚需要使用 1uF 的陶瓷电容消除对地耦合。 内部模拟电路参考地。 这个管脚应该绑定到模拟接地板上或是系统中 最为稳定地静态地,此静态地使用在所有的模拟电路中,为了将芯片 中地信号中的噪声降至最低, 静态地平面只能在一点上连接数字地平 面。 芯片复位信号输入,低电平有效。 校验脉冲输出脚,此管脚给出了有功功率的信息,这个输出可用来较 表,满刻度下的输出频率可以通过 WA_CFNUM 来调整。在计量小功 率时,CF 定脉宽为 90ms。当计量大功率时,CF 输出周期小于 180ms 时,CF 的脉宽为周期的一半。 晶振可以通过该管脚和 CLKIN 管脚一起为芯片提供时钟,当外部时 钟和晶振被引入时,该管脚可以驱动一个 CMOS 负载。 内部模拟电路及数字处理电路的主时钟,可引入外部时钟。晶振可并 联在 CLKIN 和 CLKOUT 上为芯片提供时钟源, 时钟频率为 3.58MHz。 22pF 和 33pF 间的陶瓷负载电容可以使用在晶振电路中。 内部模拟电路参考地。 串行接口的数据输出端。 串行接口的数据输入端。 正电源(+5V) ,提供模拟部分电源,正常工作时电源电压应该保持在 +4.75V~5.25V 之间。