A new collector structure for NPT-IGBT with low dose p- Si injection layer and high dose p+
英飞凌芯片简史-IGBT看这一篇就够了
IGBT 1234567,看这一篇就够了话说公元2018年,IGBT江湖惊现第六代和第七代的掌门人,一时风头无两,各路吃瓜群众纷纷猜测二位英雄的出身来历。
不禁有好事者梳理了一下英家这些年,独领风骚的数代当家掌门人,分别是:呃,好像分不清这都谁是谁?呃,虽然这些IGBT“掌门人”表面看起来都一样,但都是闷骚型的。
只能脱了衣服,做个“芯”脏手术。
像这样,在芯片上,横着切一刀看看。
好像,有点不一样了。
故事,就从这儿说起吧。
史前时代-PTPT是最初代的IGBT,它使用重掺杂的P+衬底作为起始层,在此之上依次生长N+ buffer,N- base外延,最后在外延层表面形成元胞结构。
它因为截止时电场贯穿整个N-base区而得名。
它工艺复杂,成本高,而且需要载流子寿命控制,饱和压降呈负温度系数,不利于并联,虽然在上世纪80年代一度呼风唤雨,但在80年代后期逐渐被NPT取代,目前已归隐江湖,不问世事,英飞凌目前所有的IGBT 产品均不使用PT技术。
初代盟主——IGBT2特征:平面栅,非穿通结构(NPT)NPT-IGBT于1987年出山,很快在90年代成为江湖霸主。
NPT与PT不同在于,它使用低掺杂的N-衬底作为起始层,先在N-漂移区的正面做成MOS结构,然后用研磨减薄工艺从背面减薄到 IGBT 电压规格需要的厚度,再从背面用离子注入工艺形成P+ collector。
在截止时电场没有贯穿N-漂移区,因此称为“非穿通”型IGBT。
NPT不需要载流子寿命控制,但它的缺点在于,如果需要更高的电压阻断能力,势必需要电阻率更高且更厚的N-漂移层,这意味着饱和导通电压Vce(sat)也会随之上升,从而大幅增加器件的损耗与温升。
技能:低饱和压降,正温度系数,125℃工作结温,高鲁棒性因为N-漂移区厚度大大降低了,因此Vce(sat)相比PT大大减少。
正温度系数,利于并联。
名号:DLC,KF2C,S4…等等,好像混进了什么奇怪的东西!没写错!S4真的不是IGBT4,它是根正苗红的IGBT2,适用于高频开关应用,硬开关工作频率可达40kHz。
韩国KEC IGBT规格书 KGT15N120NDA
2009. 11. 11
Revision No : 0
2/8
KGT15N120NDA
ELECTRICAL CHARACTERISTIC OF DIODE
CHARACTERISTIC Diode Forward Voltage SYMBOL VF IF = 15A TEST CONDITION TC=25 TC=125 Diode Reverse Recovery Time trr IF = 15A di/dt = 200A/¥ s TC=25 TC=125 Diode Peak Reverse Recovery Current Irr TC=25 TC=125 TC=25 TC=125 MIN. TYP. 1.8 1.9 230 270 24 27 2400 3640 MAX. 2.5 V 300 ns 31 A 4000 nC UNIT
¡⁄ ¡⁄ ¡⁄ ¡⁄ High speed switching High system efficiency Soft current turn-off waveforms Extremely enhanced avalanche capability
d D E
H
KGT15N120NDA
A N O
THERMAL CHARACTERISTIC
CHARACTERISTIC Thermal Resistance, Junction to Case (IGBT) Thermal Resistance, Junction to Case (DIODE) Thermal Resistance, Junction to Ambient SYMBOL R¥Ł R¥Ł R¥Ł
2009. 11. 11
Revision No : 0
APT40GR120B_S 1200V 40A 电子管参数表说明书
SymbolParameterRatingsUnitV ces Collector Emitter Voltage 1200VV GE Gate-Emitter Voltage±30I C1Continuous Collector Current @ T C = 25°C 88AI C2Continuous Collector Current @ T C = 100°C 40I CM Pulsed Collector Current 1160SCWT Short Circuit Withstand Time: V CE = 600V, V GE = 15V, T C =125°C 10μs P D Total Power Dissipation @ T C = 25°C500W T J ,T STGOperating and Storage Junction Temperature Range -55 to 150°C T LMax. Lead Temp. for Soldering: 0.063" from Case for 10 Sec.300MAXIMUM RATINGSAll Ratings: T C = 25°C unless otherwise speci fi ed.STATIC ELECTRICAL CHARACTERISTICSAPT40GR120S 1200V, 40A, V CE(on)= 2.5V TypicalMicrosemi Website - CAUTION: These Devices are Sensitive to Electrostatic Discharge. Proper Handling Procedures Should Be Followed.SymbolParameterMinTyp Max UnitV (BR)CES Collector-Emitter Breakdown Voltage (V GE = 0V, I C = 1.0mA)1200VoltsV CE(ON)Collector-Emitter On Voltage (V GE = 15V, I C = 40A, T j = 25°C) 2.5 3.2Collector-Emitter On Voltage (V GE = 15V, I C = 40A, T j = 125°C) 3.5Collector-Emitter On Voltage (V GE = 15V, I C = 88A, T j = 25°C) 3.2 I CES Collector Cut-off Current (V CE = 1200V, V GE = 0V, T j = 25°C) 2101000μA Collector Cut-off Current (V CE = 1200V, V GE = 0V, T j = 125°C) 2100I GESGate-Emitter Leakage Current (V GE = ±20V)±250nAThe Ultra Fast NPT - IGBT ® is a new generation of high voltage power IGBTs. Using Non-Punch-Through Technology, the Ultra Fast NPT-IGBT ® offers superior ruggedness and ultrafast switching speed.Features• Low Saturation Voltage • Low Tail Current• RoHS Compliant• Short Circuit Withstand Rated • High Frequency Switching to 50KHz • Ultra Low Leakage CurrentUnless stated otherwise, Microsemi discrete IGBTs contain a single IGBT die. This device is recommended for applications such as induction heating (IH), motor control, general purpose inverters and uninterruptible power supplies (UPS).V GE(TH) Gate Threshold Voltage (V CE = V GE , I C = 2.0mA, T j = 25°C)3.55.06.5052-6400 R e v B 5-2020APT40GR120B_STHERMAL AND MECHANICAL CHARACTERISTICSDYNAMIC CHARACTERISTICSSymbolCharacteristicMinTypMaxUnitR θJC Junction to Case Thermal Resistance .25°C/W R θJA Junction to Ambient Thermal Resistance40W T Package Weight.22oz 6.2gTorqueMounting Torque (TO-247 Package), 4-40 or M3 screw10in-lbf 6.2N ∙m1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.2 Pulse test: Pulse Width < 380μs , duty cycle < 2%.3 See Mil-Std-750 Method 3471.4 R G is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)5 E on2 is the clamped inductive turn on energy that includes a commutating diode reverse recovery current in the IGBT turn on energy loss. A combi device is used for the clamping diode.6 E off is the clamped inductive turn-off energy measured in accordance with JEDEC standard JESD24-1.Microsemi reserves the right to change, without notice, the speci fi cations and information contained herein.SymbolParameterTest ConditionsMin TypMax UnitC ies Input Capacitance Capacitance V GE = 0V, V CE = 25Vf = 1MHz 3980pF C oes Output Capacitance320C res Reverse Transfer Capacitance 80V GEP Gate to Emitter Plateau Voltage Gate Charge V GE = 15V V CE = 600V I C = 40A7VQ g 3Total Gate Charge 210nCQ ge Gate-Emitter Charge 25Q gc Gate- Collector Charge 90t d(on) Turn-On Delay Time Inductive Switching (25°C)V CC = 600V V GE = 15V I C = 40A R G = 4.3 Ω 4T J = +25°C22nst r Current Rise Time 25 t d(off) Turn-Off Delay Time163t f Current Fall Time40E on2 5Turn-On Switching Energy 13753000μJE off 6Turn-Off Switching Energy 9061650t d(on Turn-On Delay Time Inductive Switching (125°C)V CC = 600VV GE = 15V I C = 40A R G = 4.3 Ω 4T J = +125°C22nst r Current Rise Time 25t d(off)Turn-Off Delay Time 185t f Current Fall Time47E on2 5Turn-On Switching Energy 19163500μJE off 6Turn-Off Switching Energy11862500052-6400 R e v B 5-2020APT40GR120B_STYPICAL PERFORMANCE CURVES204060801001200 25 50 75 100 125 1501.01.52.02.53.03.54.04.55.0246810121416180 100 200 3001234566 8 10 12 14 1650100150200250***********501001502002503000 4 8 12 16 20 24 28 32010203040506070800 1 2 3 4 5 6V CE , COLLECTOR-TO-EMITTER VOLTAGE (V)FIGURE 1, Output Characteristics (T = 25°C)I C , C O L L E C T O R C U R R E N T (A )V CE , COLLECTOR-TO-EMITTER VOLTAGE (V)FIGURE 2, Output Characteristics (T J = 25°C)I C , C O L L E C T O R C U R R E N T (A )V GE , GATE-TO-EMITTER VOLTAGE (V) FIGURE 4, Transfer CharacteristicsI C , C O L L E C T O R C U R R E N T (A )V GE , GATE-TO-EMITTER VOLTAGE (V)FIGURE 5, On State Voltage vs Gate-to-Emitter VoltageV C E , C O L L E C T O R -T O -E M I T T E R V O L T A G E (V )GATE CHARGE (nC)FIGURE 8, Gate chargeV G E , G A T E -T O -E M I T T E R V O L T A G E (V )T J , Junction Temperature (°C)FIGURE 3, On State Voltage vs Junction Temperature V C E , C O L L E C T O R -T O -E M I T T E R V O L T A G E (V )T C , Case Temperature (°C)FIGURE 7, DC Collector Current vs Case TemperatureI C , D C C O L L E C T O R C U R R E N T (A )0.750.800.850.900.951.001.051.10 -.50 -.25 0 25 50 75 100 125 150T J , JUNCTION TEMPERATUREFIGURE 6, Threshold Voltage vs Junction Temperature V G S (T H ), T H R E S H O L D V O L T A G E (N O R M A L I Z E D )052-6400 R e v B 5-202011010020 30 40 50 60 70 8010100100010 20 30 40 50 60 70 80 9010010001000070010005000***********10010001000010 20 30 40 50 60 70 80I CE , COLLECTOR-TO-EMITTER CURRENT (A) FIGURE 11, Turn-On Time vs Collector CurrentS W I T C H I N G T I M E (n s )I CE , COLLECTOR-TO-EMITTER CURRENT (A) FIGURE 12, Turn-Off Time vs Collector Current S W I T C H I N G T I M E (n s )R G , GATE RESISTANCE (Ω)FIGURE 14, Energy Loss vs Gate ResistanceI CE , COLLECTOR-TO-EMITTER CURRENT (A) FIGURE 13, Energy Loss vs Collector CurrentS W I T C H I N G E N E R G Y L O S S (μJ )T J , JUNCTION TEMPERATURE (°C)FIGURE 15, Energy Losses vs Junction TemperatureS W I T C H I N G E N E R G Y L O S S E S (μJ )S W I T C H I N G E N E R G Y L O S S (μJ )1.0E −111.0E −101.0E −91.0E −8***********V CE , COLLECTOR-TO-EMITTER VOLTAGE (VOLTS) C , C A P A C I T A N C E (p F )0.1110100300 1 10 100 1000 2000V CE , COLLECTOR-TO-EMITTER VOLTAGE FIGURE 16, Minimum Switching Safe Operating AreaI C , C O L L E C T O R C U R R E N T (A )V CC FIGURE 10, Inductive Switching Test Circuit 052-6400 R e v B 5-2020APT40GR120B_STYPICAL PERFORMANCE CURVES00.050.100.150.200.250.3010-410-310-20.1 1 10Z θJ C , T H E R M A L I M P E D A N C E (°C /W )RECTANGULAR PULSE DURATION (SECONDS)Figure 17, Maximum Effective Transient Thermal Impedance, Junction-To-Case vs Pulse DurationDimensions in Millimeters and (Inches )1.22 (.048)1.32 (.052){3 Plcs}Dimensions in Millimeters (Inches)and Leads are Platede3 SAC: 100% Sn PlatingTO-247 Package OutlineD 3PAK Package Outlinee3 SAC: 100% Sn Plating052-6400 R e v B 5-2020。
IGBT基本特性解析
• VF ~ ; BV ~ VF 该模型的缺点: • 忽略了空穴电流
Bipolar Transistor/MOSFET Model
Emitter/cathode MOSFET
n+
p+ J2
p base
n- base
J1
p+
Collector/Anode
E IE IBJT
CI
等效电路
ICE VG
Reverse Characteristics
VCE Forward Characteristics
输出特性
反向阻断:NPT IGBT有, PT IGBT方向阻断电压低
IGBT 设计优化的三角折中
IGBT 的发展
Recent and Future IGBT Evolution
N+ P-body
N+ P-body
J2
N-
J1 P+
IGBT的闩锁效应
闩锁效应 IGBT中寄生的晶闸管开启,闩锁效应发生。电流迅速 增大,最终IGBT热击穿。
闩锁发生的条件 npn+ pnp=1
E RS
CI
发生闩锁效应时的电流
避免闩锁效应发生的方法: •降低NPN 管的电流增益, •降低PNP 管的电流增益; •降低NPN 管和PNP管的电流增益.
IC C
IMOS G
I E IMOS IBJT
IMOS Ie I B,BJT
I BJT Ih IC,BJT
Electron Current
Hole Current
I E IMOS IBJT
IMOS Ie I B,BJT
IGBT Basics
History of the Fairchild IGBT
Fairchild Semiconductor began developing the IGBT in 1992. This was later than its competitors for a power semiconductor company. However, Fairchild Semiconductor was able to catch up with its leading competitors with the development of the third generation 600V IGBT and 1500V ultra-fast IGBT for 220V power IH applications in 1995. In 1996, Fairchild Semiconductor developed the 600V rugged type RUF series with its own stripe pattern. This has strengthened short circuit withstanding capability, which makes it suitable for motor control applications such as inverters. Following this development, Fairchild Semiconductor used trench technology in 1998 to develop the 400V IGBT for camera strobes and the 900V IGBT for 110V power IH applications. Both of these require low-loss high current conduction capabilities. These design achievements indicated that Fairchild Semiconductor now possessed both planar and trench technologies. In particular, Fairchild has achieved world-class quality in 1998 by developing 1200V IGBT using SDB (silicon direct bonding) technology. Fairchild began research on SDB in 1996. Unlike existing technology, which uses an epi-grown wafer, SDB technology binds P+ substrate and N- substrate directly to allow easier manipulation of the thickness of the N- substrate. This enables easier fabrication of high voltage IGBTs. Specifically, as the formation of a high density N+ buffer layer is possible, fast switching characteristics can be obtained without high density electron irradiation, which increases the leakage current and decreases reliability. Hence, it enables the production of high speed, highly efficient and reliable IGBTs. It is also suitable for large capacity drives, as it has the same temperature characteristics as the NPT IGBT, which is suitable for a parallel drive. In the year 2000, Fairchild has applied this technology to develop 1500V and 1700V IGBTs. These can be used in 220V 1φ IH applications. Now, Fairchild is in the process of developing IPMs (Intelligent Power Modules), which are IGBT Inverter Modules that combine the control ICs in order to provide a lot of intelligent functions. The IPMs will drastically change the three-phase AC/DC Motor Speed Control arenas paving the way for reliable, compact and high performance desibruary 2001
IGBT技术发展综述
IG BT技术发展综述叶立剑,邹勉,杨小慧(南京电子器件研究所,南京210016)摘要:绝缘栅双极晶体管(IG BT)自问世以来,在结构设计、加工工艺和应用开发等方面得到了很大的发展。
概述了IG BT的一般结构和发展历史,着重介绍了近年来几个专利技术中IG BT结构设计和制造方面的新进展。
特别是宽禁带半导体材料SiC的异军突起,为IG BT技术开辟了一个新的发展空间。
关键词:绝缘栅双极晶体管;专利;碳化硅;掺砷中图分类号:T N389 文献标识码:A 文章编号:10032353X(2008)1120937204R evie w on Development of IGBT TechnologyY e Lijian,Z ou Mian,Y ang X iaohui(Nanjing Electronic Devices Institute,Nanjing210016,China)Abstract:Since insulated gate bipolar transistor(IG BT)appeared,its structure design,processing and application are developed greatly.The general structure and developed history of IG BT are briefly described and new progress for its structure design and manu facture related to several patent technologies in recent years are introduced.S pecially,a new developing domain is opened up for IG BT technology because the wide2bandgap semiconductor SiC is coming to the fore.K ey w ords:IG BT;patent;SiC;As2dopingEEACC:26500 引言能源消耗日益增大,特别是电力的需求矛盾日趋尖锐,大力发展新型电力电子器件已成为一项重要课题,IG BT是现在乃至将来小型化、低噪声、智能化和高性能的中、小容量电力电子装置的首选器件,尤其是IG BT模块及电脑电路一体化的智能功率模块(IPM)与先进的ASIC和现场可编程门阵列(FPG A)等智能控制相结合,将使未来电力电子装置的体积大为缩小。
英飞凌IGBT及DIODE简介
Vbrces 650V @ 25°C Low Qg Low Coss / Eoss High Softness (H5) Co-pak diode robustness, low Qrr, high dI/dt, dV/dt
•Higher design margin •Cosmic radiation robustness in Solar •Low driving losses „cheap“ driver possible •High efficiency at light load •Low losses in resonant topology smaller resonant tank •low Rgon=Rgoff, Plug&Play replacement (H5) , easy of use. •Low EMI High Reliability in resonant topologies (ZVS/LLC) concerning hard commutation capability of anti-parallel diode
9/16/2013 Copyright © Infineon Technologies 2010. All rights reserved.
Turn-off controllability
Double Pulse characterization Turn-off
0.40
Vce=400V, Tc=25°C, Vge=15V, Ic=20A
25° C
Trade-off previous generation
150° C
TRENCHSTOP™5
TRENCHSTOP™5
At 150°C junction temperature the TRENCHSTOPTM5 offers: The same Vce(sat) value as the TRENCHSTOPTM family
Super Low Loss and Compact Intelligent Modules (IPM) with 6th Gen. IGBT and new gate driver
Super Low Loss and Compact Intelligent Modules (IPM)with 6th Gen. IGBT and new gate driverS. Kobayashi, M. Watanabe, S. Igarashi, Fuji Electric Systems Co., Ltd.Robert Zhan, Fuji Electric Hong Kong Co., Ltd.AbstractFuji Electric has long been involved in efforts to develop innovative power electronics technology which is crucial for protecting the global environment and reducing CO2 emissions. 6th Gen. IGBT(V-IGBT) has been developed as a key device for innovative power converters. By using the V-IGBT chip technology, new gate driving technology, over current protection technology and noise reduction technologies, 6th Gen. Intelligent Power Modules(IPM) which have low power loss and highly reliable performance were realized. The new IPM will contribute to make Robotics, Machine Tools and Conveyance Machines miniature, highly efficient and long life.1. IntroductionProtection of global environment and reduction of CO2emissions are crucial problems to be solved. Both technologies to create renewal energy and to save energy attracts great deal of attention. Fuji Electric has been involving to develop Power Electronics technology which is a key technology for converting energy to electric power for more than 40 years. And IGBT modules have become more important component to realize highly efficient power converters.The newly developed 6th Gen. IGBT(V-IGBT) which is using optimized Trench Gate and Field Stop technologies can break through trade-off among On-state voltage, switching power loss and Radiation noise and is offering highly cost-performance power modules.[1]On the other hands Fuji Electric has also been introducing IPM since 1988 and providing numerous numbers of IPM to industrial applications after R-IPM was developed in 1997 by using on-chip temperature sensor technology and protection technology which can realize highly reliable power modules.[2]In this paper the 6th Gen. IPM(V-IPM) is reported, which utilizes V-IGBT chip technology, and newly developed gate driver IC. [3] 2. Requirements for IGBTmodules and breakthroughTechnologyBoth low power loss and high short-circuit withstand capability are fundamental characteristics for IGBT modules. Power loss mainly consists of the on-state loss, which is generated by VCE(sat) and collector current, and the switching power loss, which consists of the turn-on power loss and the turn-off power loss.IGBT has to have enough short-circuit withstand capability in order to prevent destruction before a gate drive circuit shutdown it several micro seconds after over-current detection circuit detects short-circuit current.Fig. 1 Trade-off relationship among VCE(sat) , Turn-off loss and SC capabilityHowever, as shown in Fig. 1, there are trade-off relationship among VCE(sat), the turn-off switching loss and the short-circuit capability.In order to breakthrough the trade-off, it is required to develop not only innovative IGBT chip technology but also high speed protection technology against short-circuit by cooperating with gate drive circuit and current detection methods.In the meantime as IGBT modules apt to EMI noise because of switching high DC bus voltage and big current, it is also requested to be environment-friendly device which reduces noise. However there is another trade-off relationship between EMI noise and the turn-on switching loss too. It is necessary to improve gate driving technology and wiring patterning technology for circuit board as well as IGBT chip technology and Diode chip technology.And the more IGBT modules are requested to hold long power cycle life time which is determined by the life cycle of aluminum wire bonding and the thermal fatigue of solder layer. Robots, machine tools and elevators are typical applications which have very severe operating conditions as short interval of acceleration and deceleration with high switching current. Low power loss IGBT and diode chips, highly reliable wire bonding and solder joint technologies and good heat spreading technology will realize ideal device having long power cycling capability. 3. History of Fuji IPM andCurrent ProblemsIn 1988, Fuji Electric commercialized the first Intelligent Power Module(IPM) which used bipolar transistor chips and a gate driving circuit board. It was applied to AC servo controller.In 1991, the first IGBT-IPM was developed which made gate driver board smaller.In 1997, Fuji introduced all silicon IPM, R-IPM, which utilized 3rd Gen. IGBT chips with on-chip temperature sensor as shown in Fig. 2. As both on-chip sensor and protection circuit in gate driving IC can detect chip temperature quickly and shutdown IGBT safely, R-IPM offered highly reliable power module against overheating and expands its application area to machine tools, robots and elevators. [2]4th Gen. IGBT, which uses Non-punch through (NPT) chip technology, were applied in 2002 and 5th Gen. IGBT, which uses Trench gate and NPT technologies were applied in 2004 into IPM. They have contributed to miniaturize machines and to improve efficiency. Functions and characteristics which are required for IPM are not only to include gate driving circuits in a power module, which can shorten design time and make circuit board smaller, but also to hold highly reliable short-circuit protection, to reduce EMI noise and to hold long power cycle life time and compactness of IPM package.V-IPM has been strongly requested to solve those problems.Fig. 2 On-chip temperature sensor in IPM4. 6th Gen IGBT V-seriesBoth Trench gate and Field stop technologies were firstly applied into 1200V 5th Gen IGBT, U-series, in 2002, which made die size 30% smaller than previous generation. In 2007 Fuji developed 6th Gen. IGBT by optimization of those technologies and solve following problems in the market.[1]#1 Lower on-state voltage with thinner n- drift layer of IGBT as shown in Fig. 3#2 Optimization of gate structure to reduce EMI noise#3 Highly reliable chip design to prevent degradation at as high as 175 deg C#4 Sufficient short-circuit capability at 150 deg C to avoid destructionFig. 3 Comparison of chip structuresfor 600V IPMsBoth new IGBT chips having lower power loss and the new DBC substrate could make die size 30% smaller than 5th Gen IGBT modules as shown in Fig. 4.Fig. 4 Reduction of IGBT die sizeVarious packages of V-IGBT modules have been commercialized already which have ratings as 600V 50A up to 1200V 600A.High power modules such as 1200V 1400A and High voltage modules such as 1700V are under development.5. New Technologies for V-IPM 5-1 Improvement of trade-off among VCE(sat), Eoff and SC capabilityIn conventional IPM, IGBT is required to have minimum 10 microseconds of short-circuit withstand capability(SC capability) as shown in Fig. 5 because it takes 5 microseconds and more to shutdown SC current after the current was detected. When the trade-off between VCE(sat) and Eoff of IGBT will be improved the SC current will be bigger than that of a conventional IGBT as shown in Fig. 5, and it will become hard to protect safely.In order to solve the problem, the new gate driver IC which has quicker response time than that of conventional one and can shorten delay time to 2 microseconds as shown in Fig. 5. It helps to apply new IGBT having optimized trade-off and realize to reduce the on-state loss and Eoff of IPM. [3]Fig. 5 Comparison of short-circuit waveforms5-2 Reduction of EonAs a result of lower IGBT input capacitance and a new gate driving method which can keep gate current constant at all operating temperature range, the tail of VCE during turn-on becomes shorter and Eon is reduced by approx. 35% as shown in Fig. 6.Fig. 6 Comparison of Turn-on waveformsConditions: Ed=300V, Iout=50Arms, fc=10kHz,Tj=125 degC, 3-arms modulation Device Ratings : 600V, 150AFig. 7 Comparison of total power lossFig.7 shows examples of power loss comparison among various IPM generations. The loss in V-IPM is approx. 29% smaller than R-IPM(3rd Gen. ), 18% small than R3-IPM(4th Gen.) and 11% than U-IPM(5th Gen.).5-3 Reduction of radiation noiseA trade-off relation exists between radiation noise and the turn-on loss(Eon). Eon can be reduced when dIc/dt is increased and radiation noise can be reduced when dIc/dt is decreased. In order to breakthrough the trade-off, new wiring pattern for internal layout of IPM package is employed. Radiated electric field is calculated by equation (1) [4] and can be weakened by designing smaller area between positive and negative DC bus lines. The new package, as shown in Fig. 8 is using new DBC layout on which DC(+) is close to DC(-) and can achieve 3dB lower radiation noise than that of a conventional IPM even smaller power loss is realized, as shown in Fig.9.Blue pattern: DC(-) linePink pattern: DC(+) lineNote: Actual products have color of copper. Fig. 8 New wiring patter in V-IPM packageFig. 9Comparison of radiation noise (results ofrelative comparison test at Fuji Electric)5-4 Shortening dead timeInverter circuits for AC motor drives arerequired to output smooth sine-wave havingsmall distortion and to turn round rotors evenly.On the other hands a dead time interval isneeded to prevent overlapping of on-state of theupper and lower IGBTs in an inverter circuit.Since the dead time interval causes distortion ofoutput waveform, it is requested to shorten theinterval. With the V-IPM switching time has beenoptimized by improving the temperaturecharacteristics and reducing fluctuation duringswitching by gate driver IC. As a result of thosetechniques V-IPM offers 1.0 microseconds ofminimum dead time in stead of 2.4 microsecondsin conventional IPMs. Fig. 10 shows the effect ofshorter dead time at input terminal on outputwaveform of a inverter circuit.(a) Output waveform with distortion(b) Output waveform without distortion Electric field:E(V/m)E = 1.32 ×10-14 ×f2× S × I /r (1)f : frequencyI : currentS : arear : distanceFig.10 Comparison of output waveforms5-5 Separate alarm output pulsefor each causeA conventional IPM outputs 2 microseconds single alarm pulse, from which the cause of an alarm can not be identified. In V-IPM the alarm pulse width changes for each cause as shown in Table 1 enabling cause analysis to be performed more quickly when trouble-shooing.Table 1 Alarm pulse width for each cause 6. New Package Line-upfor V-IPMFour types of new package cover current ratings from 20A up to 400A for 600V device and from 10A up to 200A for 1200V devices. Because of smaller die size of IGBT chips, driver IC chips and compact internal wiring layouts, small and thin packages can be applied from 50A up to 200A for 600V. 400A IPM with and without dynamic brake chopper is newly added into the line-up, as shown in Table 2.P626, P630 and P631 packages are designed to have enough number of pins to output alarm signal from upper arms.All packages are compatible to RoHS regulation and can build environment friendly machines.Table 2 Line-up of V-IPMTable 3 New packages for V-IPM7. ConclusionV-series IPMs(V-IPM) that incorporate 6th Gen. IGBT chips, which are using Trench gate and Field stop technologies, and gate driver IC chips, which have features as short response time against short-circuit and small temperature characteristics of gate driving, into newly designed packages have been introduced. The V-IPM can realize a compact size and highly reliable AC motor drives, especially for applications such as NC machine tools, Robots, Factory Automation and Elevators.8. Reference[1] Y. Kobayashi, E. Mochizuki, M. Otsuki, T.Miyasaka: The New concept IGBT-PIM with the 6th generation V-IGBT chip technology, 2007 PCIM Nurnberg[2] T. Kajiwara, A. Yamaguchi, Y. Hoshi, K.Sakurai: New Intelligent Power Multi-Chips Modules With Junction Temperature Detecting Function. 1998 ISPSD PP. 281-284 [3] M. Momose, K. Kumada, H. Wakimoto, Y.Onozawa, A. Nakamori, K. Sekigawa, M.Watanabe, T. Yamazaki, N. Fujishima: A 600V Super Low Loss IGBT with Advanced Micro-P Structure for the next Generation IPM, 2010 ISPSD[4] S. Igarashi, S. Takizawa, K. Kuroki, T.Shimizu: Analysis and Reduction Method of EMI Radiation Noise from Converter System, 1998 PESC’98。
IGBT
CARACTERISTIQUES STATIQUES
TENUE AU dV/dt Le dV/dt "statique". ( même pb pour le MOSFET)
Le cas typique où l'IGBT est soumis à ce dv /dt est le bras de pont . Lafermeture du composant complémentaire provoque unevariation de tension (dv/dt) aux bornes de l'IGBT ( ou du MOSFET) .
Grille Emetteur
N+ N+ N+ N+
P
Reverse-Blocking IGBT / MBS: - Caisson P+ pour tenir la tension inverse - Forte injection => composant peu rapide (qqs kHz)
1
STRUCTURE DE l’IGBT
RETOUR SUR LE MOSFET: Composantes de la RDS(on)
Rds(on) =Rch + Ra + Rd Rch = résistancedu canal Ra = résistance d'accès (incluant en particulier la résistance de la couche d'accumulation induite par la grille) Rd = résistance de la zone épitaxiéeN- (zone "drift")
H20R1202苏泊尔电磁炉常用IGBT管参数
Reverse Conducting IGBT with monolithic body diodeFeatures: • Powerful monolithic Body Diode with very low forward voltage• Body diode clamps negative voltages• TrenchStop and Fieldstop technology for 1200 V applicationsoffers :- very tight parameter distribution - high ruggedness, temperature stable behavior• NPT technology offers easy parallel switching capability due topositive temperature coefficient in V CE(sat) • Low EMI• Qualified according to JEDEC 1for target applications • Pb-free lead plating; RoHS compliant• Complete product spectrum and PSpice Models : /igbt/Applications: • Inductive Cooking • Soft Switching Applications TypeV CEI CV CE(sat ),Tj=25°C T j,max Marking PackageIHW20N120R 1200V 20A 1.65V175°CH20R120 PG-TO-247-3-21Maximum RatingsParameter Symbol Value Unit Collector-emitter voltage V C E 1200 V DC collector current T C = 25°C T C = 100°CI C30 15 Pulsed collector current, t p limited by T jmaxI C p u l s 45 Turn off safe operating area (V CE ≤ 1200V, T j ≤ 175°C) - 45 Diode forward current T C = 25°C T C = 100°CI F20 13 Diode pulsed current, t p limited by T jmaxI F p u l s 30 Diode surge non repetitive current, t p limited by T jmax T C = 25°C, t p = 10ms, sine halfwave T C = 25°C, t p ≤ 2.5µs, sine halfwave T C = 100°C, t p ≤ 2.5µs, sine halfwave I F S M 50 130 120 AGate-emitter voltageTransient Gate-emitter voltage (t p < 5 ms) V G E±20 ±25V Power dissipation T C = 25°C P t o t 405 W Operating junction temperature T j -40...+175 Storage temperatureT s t g -55...+175 Soldering temperature, 1.6mm (0.063 in.) from case for 10s- 260°C1J-STD-020 and JESD-022PG-TO-247-3-21®Thermal ResistanceParameter SymbolConditionsMax.Value Unit CharacteristicIGBT thermal resistance,junction – caseR t h J C 0.38Diode thermal resistance,junction – caseR t h J C D 0.38Thermal resistance, junction – ambient R t h J A 40K/WElectrical Characteristic, at T j = 25 °C, unless otherwise specifiedValueParameter SymbolConditionsmin. Typ. max.Unit Static CharacteristicCollector-emitter breakdown voltage V(B R)C E S V G E=0V, I C=500µA1200 - - Collector-emitter saturation voltage V C E(s a t)V G E = 15V, I C=15AT j=25°C T j=125°C T j=175°C ---1.652.02.01.85--Diode forward voltage V F V G E=0V, I F=7.5AT j=25°C T j=150°C T j=175°C ---1.251.31.31.4--Gate-emitter threshold voltage V G E(t h)I C=0.5mA,V C E=V G E 5.1 5.8 6.4VZero gate voltage collector current I C E S V C E=1200V,V G E=0VT j=25°C T j=175°C ----52500µAGate-emitter leakage current I G E S V C E=0V,V G E=20V- - 100nA Transconductance g f s V C E=20V, I C=15A- 8.5 -S Integrated gate resistor R G i n t none ΩDynamic Characteristic Input capacitance C i s s - 1114 - Output capacitanceC o s s - 62 - Reverse transfer capacitance C r s sV C E =25V, V G E =0V, f =1MHz- 53 - pF Gate chargeQ G a t eV C C =960V, I C =15A V G E =15V- 61 - nCInternal emitter inductancemeasured 5mm (0.197 in.) from caseL E- 13 - nHSwitching Characteristic, Inductive Load, at T j =25 °CValueParameter Symbol Conditions min. Typ. max. UnitIGBT Characteristic Turn-off delay time t d (o f f ) - 455 - Fall time t f - 76 - ns Turn-on energy E o n - - - Turn-off energy E o f f - 1.1 - Total switching energy E t sT j =25°C,V C C =600V,I C =15A V G E =0 /15V, R G =54Ω, L σ2)=180nH, C σ2)=39pF- 1.1 -mJSwitching Characteristic, Inductive Load, at T j =175 °CValueParameter Symbol Conditions min. Typ. max. UnitIGBT Characteristic Turn-off delay time t d (o f f ) - 566 - Fall time t f - 119 - ns Turn-on energy E o n - - - Turn-off energy E o f f - 1.8 - Total switching energyE t sT j =175°CV C C =600V,I C =15A,V G E = 0 /15V, R G = 54Ω,L σ=180nH 2),C σ=39pF 2)- 1.8 -mJ2)Leakage inductance L σ and Stray capacity C σ due to dynamic test circuit in Figure E.I C , C O L L E C T O R C U R R E N T10Hz100Hz 1kHz 10kHz 100kHz0A20A40AI C , C O L L E C T O R C U R R E N T1V 10V 100V 1000V1A10Af , SWITCHING FREQUENCYV CE , COLLECTOR -EMITTER VOLTAGEFigure 1. Collector current as a function ofswitching frequency for hard switching (turn-off)(T j ≤ 175°C, D = 0.5, V CE = 600V, V GE = 0/+15V, R G = 54.1Ω) Figure 2. IGBT Safe operating area(D = 0, T C = 25°C, T j ≤175°C;V GE =15V)P t o t , D I S S I P A T E D P O W E R25°C50°C 75°C 100°C 125°C 150°C0W 50W 100W 150W 200W 250W 300W350W I C , C O L L E C T O R C U R R E N T25°C50°C 75°C 100°C 125°C 150°C0A10A20A30A40AT C , CASE TEMPERATURET C , CASE TEMPERATUREFigure 3. Power dissipation as a function ofcase temperature (T j ≤ 175°C)Figure 4. DC Collector current as a functionof case temperature (V GE ≥ 15V, T j ≤ 175°C)I C , C O L L E C T O R C U R R E N T0.0V0.5V1.0V1.5V2.0V2.5V0A10A20A30A40AI C , C O L L E C T O R C U R R E N T0V 1V 2V 3V0A10A20A30A40AV CE , COLLECTOR -EMITTER VOLTAGEV CE , COLLECTOR -EMITTER VOLTAGEFigure 5. Typical output characteristic(T j = 25°C) Figure 6. Typical output characteristic(T j = 175°C)I C , C O L L E C T O R C U RR E N T0V2V4V6V8V10V12V0A10A20A30A40AV C E (s a t ), C O L L E C T O R -E M I T T S A T U R A T I O N V O L T A G E-50°C0°C 50°C 100°C 150°C0.0V0.5V 1.0V 1.5V 2.0V 2.5V 3.0V3.5VV GE , GATE-EMITTER VOLTAGET J , JUNCTION TEMPERATUREFigure 7. Typical transfer characteristic(V CE =20V)Figure 8. Typical collector-emittersaturation voltage as a function of junction temperature (V GE =15V)t , S W I T C H I N GT I M E S0A 5A 10A 15A 20A 25A100ns1000nst , S W I T C H IN G T I M E S30Ω60Ω90Ω100 ns1000 nsI C , COLLECTOR CURRENTR G , GATE RESISTORFigure 9. Typical switching times as afunction of collector current (inductive load, T J =175°C,V CE =600V, V GE =0/15V, R G =54Ω, Dynamic test circuit in Figure E) Figure 10. Typical switching times as afunction of gate resistor (inductive load, T J =175°C,V CE =600V, V GE =0/15V, I C =15A, Dynamic test circuit in Figure E)t , S W I T C H I N GT I M E S0°C 25°C 50°C 75°C 100°C 125°C 150°C10ns100nsV G E (t h ), G A T E -E M I T T T R S H O L D V O L T A G E-50°C0°C 50°C 100°C2V3V4V5V6VT J , JUNCTION TEMPERATURET J , JUNCTION TEMPERATUREFigure 11. Typical switching times as afunction of junction temperature (inductive load, V CE =600V, V GE =0/15V, I C =15A, R G =54Ω, Dynamic test circuit in Figure E)Figure 12. Gate-emitter threshold voltage asa function of junction temperature (I C = 0.5mA)E , S W I T C H I N G E N E R G Y L O S S E S0A5A10A15A20A25AE , S W I T C H I N G E N E R GY L O S S E S30Ω60Ω90ΩI C , COLLECTOR CURRENTR G , GATE RESISTORFigure 13. Typical turn-off energy as afunction of collector current (inductive load, T J =175°C,V CE =600V, V GE =0/15V, R G =54Ω, Dynamic test circuit in Figure E) Figure 14. Typical turn-off energy as afunction of gate resisto (inductive load, T J =175°C,V CE =600V, V GE =0/15V, I C =15A, Dynamic test circuit in Figure E)E , S W I T C H I N G E N E R G Y L O S S E S0°C50°C100°C150°C 0.0mJ0.5mJ1.0mJ1.5mJE , S W I T C H I N G E N E R G Y L O S S E S400V500V 600V 700V0.0mJ0.5mJ1.0mJ1.5mJ2.0mJT J , JUNCTION TEMPERATUREV CE , COLLECTOR -EMITTER VOLTAGEFigure 15. Typical turn-off energy as afunction of junction temperature (inductive load, V CE =600V, V GE =0/15V, I C =15A, R G =54Ω, Dynamic test circuit in Figure E)Figure 16. Typical turn-off energy as afunction of collector emitter voltage(inductive load, T J =175°C, V GE =0/15V, I C =15A, R G =54Ω, Dynamic test circuit in Figure E)V G E , G A T E -E M I T T E R V O L T A GE0nC 50nC 100nC0V5V10V15Vc , C A P A C I T A N C E0V10V 20V10pF100pF1nFQ GE , GATE CHARGEV CE , COLLECTOR -EMITTER VOLTAGEFigure 17. Typical gate charge(I C =15 A) Figure 18. Typical capacitance as a functionof collector-emitter voltage (V GE =0V, f = 1 MHz)Z t h J C , T R A N S I E N T T H E R M A L R E S I S T A N C E10µs100µs 1ms 10ms 100ms10-2K/W10-1K/WZ t h J C , T R A N S I E N T T H E R M A L R E S I S T A N C E10µs100µs 1ms 10ms 100ms10-2K/W10-1K/Wt P , PULSE WIDTHt P , PULSE WIDTHFigure 19. IGBT transient thermal resistance (D = t p / T )Figure 20. Typical Diode transient thermal impedance as a function of pulse width (D =t P /T )I F , F O R W A R D C U R R E N T0.0V0.5V1.0V1.5V0A 5A10A15AV F , F O R W A R D V O L T A G E-50°C 0°C 50°C 100°C 150°C0.0V0.5V1.0V1.5V2.0VV F , FORWARD VOLTAGET J , JUNCTION TEMPERATUREFigure 21. Typical diode forward current as a function of forward voltageFigure 22. Typical diode forward voltage as a function of junction temperaturePG-TO247-3-21Leakage inductance Lσ =180nH and Stray capacity Cσ =39pF.Edition 2006-01Published byInfineon Technologies AG81726 München, Germany© Infineon Technologies AG 11/2/06.All Rights Reserved.Attention please!The information given in this data sheet shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party.InformationFor further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office ().WarningsDue to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office.Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to supportand/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.。
IGBT基本特性
IGBT正向压降
V F V P N V drift V ACC V JFET V CH
VJFET 在VF 中占较大比重,甚至使I-V特性出现 snap-back。
改进措施: 增加JFET区的掺杂浓度。
N+ P-body N+ P-body
J2
NJ1
P+
IGBT的闩锁效应 闩锁效应 IGBT中寄生的晶闸管开启,闩锁效应发生。电流迅速 增大,最终IGBT热击穿。 闩锁发生的条件 npn+ pnp=1
Gourab Majumdar, and Tadaharu Minato
Power Device Works, Mitsubishi Electric Corporation
新型IGBT发展趋势
IGBT 的阻断特性
IGBT 的静态特性主要考虑的四个方面 BVces Vce(on) Vth
SCSOA
C
I
等效电路
ICE VG
VCE Reverse Characteristics Forward Characteristics
反向阻断:NPT IGBT有,
输出特性
PT IGBT方向阻断电压低
IGBT 设计优化的三角折中
IGBT 的发展
Recent and Future IGBT Evolution
PNP ( PT IGBT )
导通状态下的载流子分布
Emitter/cathode Polysilicon gate window Polysilicon gate region
p+
J2
n+ p base PiN
W IGBT n- base J1
电力半导体器件5.2 IEGT
IEGT 是1998年在IGBT 结构的基础上开发的另一种的MOS-双极型复合器件。
通过结构的改进,在IEGT 中引入电子注入增强(IE)效应:只增加发射极侧的电子注入,同时限制集电极的空穴注入,从而改善器件的通态特性和开关特性之间IEGT是由IGBT派生而来的:或将Planar-IGBT的栅极加长IGBT在Trench-IGBT中增加虚拟元胞 IEGT按栅极结构类型分平面栅IEGT(Planar-IEGT)沟槽栅IEGT(Trench-IEGT)沟槽-平面栅IEGT(T P-IEGT)一、IEGT 结构分类:§5.2.1 IEGT 的结构特点2014-10-23西安理工大学电子工程系 本科生 《电力半导体器件》电子沟道(-)(+)(+)(-)空穴2014-10-23西安理工大学电子工程系 本科生 《电力半导体器件》沟道沟道沟道(-)(-)(+)(+)(+)空穴电子电子AA ’62014-10-23西安理工大学电子工程系 本科生 《电力半导体器件》 (a) Planar with n-layer(b) Trench with n-layer and dummy cellsn 型载流子存储层n 型载流子存储层虚拟元胞3. EP-IGBT 与CSTBT TM (Carrier Stored Trench-gate Bipolar Transistor )n 载流子存储层浓度高于n -漂移区,使于p 基区与n 层间的内电势差增加(约0.2V )。
该内电势相当于一个空穴势垒,阻止集电区注入到n -区的空穴顺利通过,使其在n 层下面存储,导致IE 效应。
电子电子电子电子西安理工大学电子工程系 本科生 《电力半导体器件》U GE空穴电子沟道沟道IEGT 导通状态载流子分布更接近pin 二极管分布§5.2.2 IEGT 的工作原理一. 工作原理载流子密度9本科生 《电力半导体器件》 沟道沟道>0,U GE >U T 时, IEGT 的p 基区表面产生导电沟道,由于栅极较宽、存在虚拟元胞或n 型载流子存储层,使得具有与IGBT 的正向阻断和关断特性机理是正向导通机理稍有不同IEGT 的工作原理112014-10-23西安理工大学电子工程系 本科生 《电力半导体器件》 的模型及等效电路等效电路等效结构及其载流子浓度分布导通时等效电路导通期间的IEGT MOSFET 与pin 串联,与IGBT 相同与IGBT 的区别,只是电导调制效应加强§5.2.3 IEGT 的特点、发展及应用优点:1.与IGBT 比,压降更低,速度更快,可靠性相当;2.与GTO 比,有相似的低通态压降,开关功耗更低,耐用一. IEGT 特点2.5kV -1kA Press Pack IGBT、有源电力滤波器( APF)等电力设备。
IGBT基础教程-选型(上)(中英)
IGBT基础教程:第一部分---选型(上)作者:Jonathan Dodge P.E., Senior Applications Engineer John HessVice President, Marketing Microsemi's Advanced Power Technology绝缘栅双极晶体管(IGBT)将MOS栅极易驱动性和低传导损耗结合在一起,并正在迅速取代功率双极晶体管作为高电流和高电压应用设备的选择。
艰难的在开关速度和导通损耗之间权衡,这种境况现在正被很好的转变,IGBT正在蚕食高频率,高效率的功率MOSFET领地。
事实上,行业的趋势是在除了非常低电流的应用以外,用IGBT取代功率MOSFET。
第1部分可以帮助您了解权衡与选择IGBT器件,并且相对容易的概述IGBT技术及应用。
第2部分提供了一个例子详细的介绍了IGBT的资料信息。
如何选择IGBT本节是有意摆在技术讲解之前的。
回答下列的重要问题,将有助于为特定的应用选择适当的IGBT。
非穿通(NPT)和穿通(PT)器件之间的差异,以及术语和图表将稍后解释。
1. 什么是工作电压?IGBT的关断电压最高应不超过VCES的80%。
2. 这是硬或软开关?PT器件更适合于软开关,因其可以减少尾电流,但是,NPT器件将一直工作。
3.流过IGBT的电流都有什么?首先用简短的语言对用到的电流做一个大致的介绍。
对于硬开关应用,频率—电流图很有用,可帮助确定器件是否适合应用。
在应用时需要考虑到数据表由于测试条件不同而存在的差异,如何做到这一点稍后将有一个例子。
对于软开关应用,可从IC2开始着手。
4.什么是理想的开关速度?如果答案是“更高,更好”,那么PT器件是最好的选择。
同样,使用频率—电流图可以帮助选择硬开关应用的器件。
5.短路承受能力必要吗?对于应用如马达驱动器,答案是肯定的,而且开关频率也往往是相对较低。
这时将需要NPT器件。
开关电源往往不需要短路耐受力。
高压 IGBT 数据手册说明书
HGTG18N120BND1200 V NPT IGBTHGTG18N120BND is based on Non- Punch Through (NPT)IGBT designs. The IGBT is ideal for many high voltage switching applications operating at moderate frequencies where lowconduction losses are essential, such as: UPS, solar inverter, motor control and power supplies.Formerly Developmental Type TA49304.Ordering InformationPART NUMBER PACKAGE BRANDHGTG18N120BNDTO-24718N120BNDNOTE: When ordering, use the entire part number.SymbolEGCFeatures•26 A, 1200 V , T C = 110°C•Low Saturation V oltage: V CE (sat) = 2.45 V @ I C = 18 A •Typical Fall Time . . . . . . . . . . . . . 140ns at T J = 150°C •Short Circuit Rating •Low Conduction LossPackagingJEDEC STYLE TO-247TO-247GCEAbsolute Maximum Ratings T C = 25o C, Unless Otherwise SpecifiedHGTG18N120BND UNIT Collector to Emitter V oltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .BV CES1200V Collector Current ContinuousAt T C = 25o C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I C2554AAt T C = 110o C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I C11026A Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I CM160AGate to Emitter V oltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V GES±20VGate to Emitter V oltage Pulsed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V GEM±30V Switching Safe Operating Area at T J = 150o C (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .SSOA100A at 1200VPower Dissipation Total at T C = 25o C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P D390WPower Dissipation Derating T C > 25o C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.12W/o C Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T J, T STG-55 to 150o C Maximum Lead Temperature for Soldering. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T L260o CShort Circuit Withstand Time (Note 2) at V GE = 15V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t SC8μsShort Circuit Withstand Time (Note 2) at V GE = 12V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t SC15μs CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.NOTES:Pulse width limited by maximum junction temperature.1.V2.CE(PK) = 960V, T J = 125o C, R G = 3Ω.Electrical Specifications T C = 25o C, Unless Otherwise SpecifiedPARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Collector to Emitter Breakdown Voltage BV CES I C = 250μA, V GE = 0V1200--V Emitter to Collector Breakdown Voltage BV ECS I C = 10mA, V GE = 0V15--V Collector to Emitter Leakage Current I CES V CE = 1200V T C = 25o C--250μAT C = 125o C-300-μAT C = 150o C--4mACollector to Emitter Saturation Voltage V CE(SAT)I C = 18A,V GE = 15V T C = 25o C- 2.45 2.7V T C = 150o C- 3.8 4.2VGate to Emitter Threshold Voltage V GE(TH)I C = 150μA, V CE = V GE 6.07.0-V Gate to Emitter Leakage Current I GES V GE = ±20V--±250nA Switching SOA SSOA T J = 150o C, R G = 3Ω, V GE = 15V,L = 200μH, V CE(PK) = 1200V100--A Gate to Emitter Plateau Voltage V GEP I C = 18A, V CE = 600V-10.5-VOn-State Gate Charge Q G(ON)I C = 18A,V CE = 600V V GE = 15V-165200nC V GE = 20V-220250nCCurrent Turn-On Delay Time t d(ON)I IGBT and Diode at T J = 25o CI CE = 18AV CE = 960VV GE = 15VR G = 3ΩL = 1mHTest Circuit (Figure 20)-2328nsCurrent Rise Time t rI-1722ns Current Turn-Off Delay Time t d(OFF)I-170200ns Current Fall Time t fI-90140ns Turn-On Energy E ON- 1.9 2.4mJ Turn-Off Energy (Note 3)E OFF- 1.8 2.2mJCurrent Turn-On Delay Time t d(ON)I IGBT and Diode at T J = 150o C I CE = 18A V CE = 960V V GE = 15V R G = 3Ω L = 1mHTest Circuit (Figure 20)-2126ns Current Rise Timet rI -1722ns Current Turn-Off Delay Time t d(OFF)I -205240ns Current Fall Time t fI -140200ns Turn-On Energy E ON - 3.7 4.9mJ Turn-Off Energy (Note 3)E OFF - 2.6 3.1mJ Diode Forward Voltage V EC I EC = 18A- 2.6 3.2V Diode Reverse Recovery Timet rrI EC = 18A, dI EC /dt = 200A/μs -6075ns I EC = 2A, dI EC /dt = 200A/μs-4455nsThermal Resistance Junction To CaseR θJCIGBT --0.32o C/W Diode--0.75o C/WNOTE:3. Turn-Off Energy Loss (E OFF ) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (I CE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss.Electrical SpecificationsT C = 25o C, Unless Otherwise Specified (Continued)PARAMETERSYMBOL TEST CONDITIONSMIN TYP MAX UNIT Typical Performance Curves Unless Otherwise SpecifiedFIGURE 1. T C , CASE TEMPERATURE (o C)I C E , D C C O L L E C T O R C U R R E N T (A )50602575100125150********V GE = 15V50DC COLLECTOR CURRENT vs CASETEMPERATUREFIGURE 2. V CE , COLLECTOR TO EMITTER VOLTAGE (V)1400800I C E , C O L L E C T O R T O E M I T T E R C U R R E N T (A )204060080040020010001200010012060T J = 150o C, R G = 3Ω, V GE = 15V , L = 200μHMINIMUM SWITCHING SAFE OPERATING AREAFIGURE 3. I CE , COLLECTOR TO EMITTER CURRENT (A)T J = 150o C, R G = 3Ω, L = 1mH, V CE = 960Vf M A X , O P E R A T I N G F R E Q U E N C Y (k H z )51104020501010030T C = 75o C, V GE = 15V , IDEAL DIODEf MAX1 = 0.05 / (t d(OFF)I + t d(ON)I )R ØJC = 0.32o C/W, SEE NOTES P C = CONDUCTION DISSIPATION (DUTY FACTOR = 50%)f MAX2 = (P D - P C ) / (E ON + E OFF )T CV GE110o C 12V15V 15V 75o C110o C75o C12V OPERATING FREQUENCY vs COLLECTOR TOEMITTER CURRENTFIGURE 4. V GE , GATE TO EMITTER VOLTAGE (V)I S C , P E A K S H O R T C I R C U I T C U R R E N T (A )t S C , S H O R T C I R C U I T W I T H S T A N D T I M E (μs )121314151651015202550100150200300t SCI SC30250V CE = 960V , R G = 3Ω, T J = 125o CSHORT CIRCUIT WITHSTAND TIMEFIGURE 5. 024V CE , COLLECTOR TO EMITTER VOLTAGE (V)I C E , C O L L E C T O R T O E M I T T E R C U R R E N T (A )0204068106080PULSE DURATION = 250μsDUTY CYCLE < 0.5%, V GE = 12V T C = -55o CT C = 25o CT C = 150o CCOLLECTOR TO EMITTER ON-STATE VOLTAGEFIGURE 6. I C E , C O L L E C T O R T O E M I T T E R C U R R E N T (A )V CE , COLLECTOR TO EMITTER VOLTAGE (V)406080246810201000T C = -55o CT C = 25o CT C = 150o CDUTY CYCLE < 0.5%, V GE = 15V PULSE DURATION = 250μsCOLLECTOR TO EMITTER ON-STATE VOLTAGEFIGURE 7. E O N 2, T U R N -O N E N E R G Y L O S S (m J )106I CE , COLLECTOR TO EMITTER CURRENT (A)8421510512253003540T J = 25o C, V GE = 12V , V GE = 15VT J = 150o C, V GE = 12V , V GE = 15VR G = 3Ω, L = 1mH, V CE = 960V 20TURN-ON ENERGY LOSS vs COLLECTOR TOEMITTER CURRENT FIGURE 8. 3.5I CE , COLLECTOR TO EMITTER CURRENT (A)E OF F , T U R N -O F F E N E RG Y L O S S (m J )0.5151051.02.51.53.04.04.52530R G = 3Ω, L = 1mH, V CE = 960VT J = 25o C, V GE = 12V OR 15VT J = 150o C, V GE = 12V OR 15V35402.020TURN-OFF ENERGY LOSS vs COLLECTOR TOEMITTER CURRENTFIGURE 9. I CE , COLLECTOR TO EMITTER CURRENT (A)t d I ,T U R N -O N D E L A Y T I M E (n s )5101520253035154025303540R G = 3Ω, L = 1mH, V CE = 960VT J = 25o C, T J = 150o C, V GE = 12VT J = 25o C, T J = 150o C, V GE = 15V20TURN-ON DELAY TIME vs COLLECTOR TOEMITTER CURRENTFIGURE 10. I CE , COLLECTOR TO EMITTER CURRENT (A)t r I ,R I S E T I M E (n s )100208060305402520154035100120R G = 3Ω, L = 1mH, V CE = 960VT J = 25o C, T J = 150o C, V GE = 12VT J = 25o C OR T J = 150o C, V GE = 15V TURN-ON RISE TIME vs COLLECTOR TOEMITTER CURRENTFIGURE 11. 1020520015100150I CE , COLLECTOR TO EMITTER CURRENT (A)t d (O F F )I , T U R N -O F F D E L A Y T I M E (n s )303502503004035R G = 3Ω, L = 1mH, V CE = 960V25V GE = 12V , V GE = 15V , T J = 25o CV GE = 12V , V GE = 15V , T J = 150o CTURN-OFF DELAY TIME vs COLLECTOR TOEMITTER CURRENT FIGURE 12. I CE , COLLECTOR TO EMITTER CURRENT (A)t f I , F A L L T I M E (n s )10525100150155020025030204035R G = 3Ω, L = 1mH, V CE = 960V1257517522525T J = 25o C, V GE = 12V OR 15VT J = 150o C, V GE = 12V OR 15VFALL TIME vs COLLECTOR TO EMITTERCURRENTFIGURE 13. I C E , C O L L E C T O R T O E M I T T E R C U R R E N T (A )50136891012V GE , GATE TO EMITTER VOLTAGE (V)111001501415200T C = 25o CT C = 150o CT C = -55o CPULSE DURATION = 250μsDUTY CYCLE < 0.5%, V CE = 20V 7TRANSFER CHARACTERISTIC FIGURE 14. V G E , G A T E T O E M I T T E R V O L T A G E (V )Q G , GATE CHARGE (nC)520010050150V CE = 400VV CE = 800VI G(REF) = 2mA, R L = 33.3Ω, T C = 25o CV CE = 1200V1015200GATE CHARGE WA VEFORMSFIGURE 15. V CE , COLLECTOR TO EMITTER VOLTAGE (V)C , C A P A C I T A N C E (n F )C RES 05101520251C IESC OES2456FREQUENCY = 1MHz3CAPACITANCE vs COLLECTOR TO EMITTERVOLTAGEFIGURE 16. I C E , C O L L E C T O R T O E M I T T E R C U R R E N T (A )V CE , COLLECTOR TO EMITTER VOLTAGE (V)10250102530DUTY CYCLE < 0.5%, T C = 110o C PULSE DURATION = 250μs201534V GE = 10V5V GE = 15V OR 12VCOLLECTOR TO EMITTER ON-STATE VOLTAGEFIGURE 17. t 1t 2P DSINGLE PULSE0.50.20.10.050.02t 1,RECTANGULAR PULSE DURATION (s)10-210-110010-510-310-210-110010-4DUTY FACTOR, D = t 1 / t 2PEAK T J = (P D X Z θJC X R θJC ) + T C Z θJ C ,N O R M A L I Z E D T H E R M A L R E S P O N S E0.01NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASEFIGURE 18. V F , FORWARD VOLTAGE (V)I F , F O R W A R D C U R R E N T (A )10011012345150o C25o CDIODE FORWARD CURRENT vs FORWARDVOLTAGE DROPFIGURE 19. I F , FORWARD CURRENT (A)1020702013060t , R E C O V E R Y T I M E S (n s )10405t rr t a50t b2T C = 25o C, dI EC /dt = 200A/μsRECOVERY TIMES vs FORWARD CURRENTTest Circuits and WaveformsFIGURE 20. R G = 3ΩL = 1mHV DD = 960V+-HGTG18N120BNDINDUCTIVE SWITCHING TEST CIRCUIT FIGURE 21. t fIt d(OFF)It rI t d(ON)I 10%90%10%90%V CEI CEV GEE OFFE ONSWITCHING TEST WAVEFORMSHandling Precautions for IGBTsInsulated Gate Bipolar Transistors are susceptible to gate-insulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler’s body capacitance is notdischarged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs can be handled safely if the following basic precautions are taken:1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as “ECCOSORBD™ LD26” or equivalent.2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband.3. Tips of soldering irons should be grounded.4. Devices should never be inserted into or removed from circuits with power on.5. Gate Voltage Rating - Never exceed the gate-voltage rating of V GEM . Exceeding the rated V GE can result in permanent damage to the oxide layer in the gate region.6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate open-circuited orfloating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup.7. Gate Protection - These devices do not have an internalmonolithic Zener diode from gate to emitter. If gate protection is required an external Zener is recommended.Operating Frequency InformationOperating frequency information for a typical device (Figure 3) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (I CE ) plots are possible using the information shown for a typical unit in Figures 5, 6, 7, 8, 9 and 11. The operating frequency plot (Figure 3) of a typical device shows f MAX1 or f MAX2; whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature.f MAX1 is defined by f MAX1 = 0.05/(t d(OFF)I + t d(ON)I ). Deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. Other definitions are possible. t d(OFF)I and t d(ON)I are defined in Figure 21. Device turn-off delay can establish an additional frequency limiting condition for anapplication other than T JM . t d(OFF)I is important when controlling output ripple under a lightly loaded condition.f MAX2 is defined by f MAX2 = (P D - P C )/(E OFF + E ON ). Theallowable dissipation (P D ) is defined by P D = (T JM - T C )/R θJC . The sum of device switching and conduction losses must not exceed P D . A 50% duty factor was used (Figure 3) and the conduction losses (P C ) are approximated by P C = (V CE x I CE )/2.E ON and E OFF are defined in the switching waveforms shown in Figure 21. E ON is the integral of the instantaneous power loss (I CE x V CE ) during turn-on and E OFF is the integral of theinstantaneous power loss (I CE x V CE ) during turn-off. All tail losses are included in the calculation for E OFF ; i.e., the collector current equals zero (I CE = 0).Mechanical DimensionsTO-247A03TRADEMARKSThe following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *Trademarks of System General Corporation, used under license by Fairchild Semiconductor.DISCLAIMERFAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE AP P LICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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10kV碳化硅混合MOS-IGBT器件的研究
集成电路应用 第 38 卷 第 4 期(总第 331 期)2021 年 4 月 1Research and Design 研究与设计摘要:研究新型10kV电压等级的碳化硅场效应晶体管结构, 具有碳化硅MOSFET的高频工作特性以及IGBT器件的大电流导通能力。
在传统碳化硅MOSFET结构的基础上,在器件底部漏极区加入了间隔式的集电极区。
在小电流情况下,电流从漏极区域流通,器件为单极型器件,拥有出色的高频性能。
在大电流情况下,集电极区PN结导通,器件开启类IGBT器件的双极型模式,显著降低器件正向导通电阻。
关键词:碳化硅,MOSFET,IGBT,沟槽,MMIGBT。
中图分类号:TN312,TN365 文章编号:1674-2583(2021)04-0001-03DOI:10.19339/j.issn.1674-2583.2021.04.001中文引用格式:崔京京,章剑锋.10kV碳化硅混合MOS-IGBT器件的研究[J].集成电路应用, 2021, 38(04): 1-3.类超高压碳化硅器件的开关频率也会因为存在少数载流子复合而受到限制。
另一方面,由于碳化硅P型衬底比较难以生长且电阻率远大于N型衬底,早期报导SiC IGBT主要是基于N型衬底,即集电极区为N型,外延层为P 型,同时为P型沟道,但这种结构由于必须使用负栅压驱动导通,且P型外延层电阻率更大,严重影响SiC IGBT的性能与应用[4]。
随着碳化硅材料生长技术的不断发展,目前已可以实现200µm厚度的高品质厚外延,掺杂浓度也可以低至1×1014cm -3[5]。
可通过减薄去除N型衬底,并背面注入形成P型集电极区的方法制成N型沟道超高电压IGBT,少数载流子(空穴)的寿命在目前制成的高压PIN二极管中已有测量报道,可以达到1.2μs [6].根据IGBT结构的特点,由于集电极区与漂移区存在一个PN结势垒,因此正向导通时必须首先克服集电区PN结自身的内建电势。
IGBT tutorial 1
IGBT tutorial: Part 1 - SelectionJonathan Dodge, P.E., Senior Applications E ngineer; John Hess, Vice President, Marketing, Microsemi's Advanced Pow er Technology3/8/2007 4:07 PM E STThe insulated gate bipolar transistors (IGBTs) combines an easily driven MOS gate and low conduction loss, and is quickly displacing power bipolar transistors as the device of choice for high current and high voltage applications. The balance in tradeoffs between switching speed, conduction loss, and ruggedness is now being finely tuned so that IGBTs are encroaching upon the high frequency, high efficienc y domain of power MOSFETs. In fact, the industry trend is for IGBTs to replace power MOSFETs except in very low current applications. Part 1 helps you understand the tradeoffs and helps with IGBT device selection, application and a relatively painless overview of IGBT technology. Part 2 provides an example walkthrough of IGBT datasheet information.How to select an IGBTThis section is intentionally placed before the technical discourse. Answers to the following set of burning questions will help determine which IGBT is appropriate for a particular application. The differences between Non Punch-Through (NPT) and Punch-Through (PT) devices as well as terms and graphs will be explained later.1. What is the operating voltage? The highest voltage the IGBT has to block should be no more than 80% of the VCES rating.2. Is it hard or soft switched? A PT device is better suited for soft switching due to reduced tail current, however a NPT device will also work.3. What is the current that will flow through the device? The first two numbers in the part number give a rough indication of the usable current. For hard switching applications, the usable frequency versus current graph is helpful in determining whether a device will fit the application. Differences between datasheet test conditions and the application should be taken into account, and an example of how to do this will be given later. For soft switching applications, the I C2 rating could be used as a starting point.4. What is the desired switching speed? If the answer is "the higher, the better", then a PT device is the best choice. Again, the usable frequency versus current graph can help answer this question for hard switching applications.5. Is short circuit withstand capability required? For applications such as motor drives, the answer is yes, and the switching frequency also tends to be relatively low. An NPT device would be required. Switch mode power supplies often don't require short circuit capability.IGBT overviewAn N-channel IGBT is basically an N-channel power MOSFET constructed on a p-type substrate, as illustrated by the generic IGBT cross section in Figure 1. (PT IGBTs have an additional n+ layer as well as will be explained.) Consequently, operation of an IGBT is very similar to a power MOSFET. A positive voltage applied from the emitter to gate terminals causes electrons to be drawn toward the gate terminal in the body region. If the gate-emitter voltage is at or above what is called the threshold voltage, enough electrons are drawn toward the gate to form a conductive channel across the body region, allowing current to flow from the collector to the emitter. (To be precise, it allows electrons to flow from the emitter to the collector.) This flow of electrons draws positive ions, orholes, from the p-type substrate into the drift region toward the emitter. This leads to a couple of simplified equivalent circuits for an IGBT as shown in Figure 2.Figure 1 N-Channel IGBT Cross SectionFigure 2 IGBT Simplified Equivalent CircuitsThe first circuit shows an N-channel power MOSFET driving a wide base PNP bipolar transistor in a Darlington configuration. The second circuit simply shows a diode in series with the drain of an N-channel power MOSFET. At first glance, it would seem that the on state voltage across the IGBT would be one diode drop higher than for the N-channel power MOSFET by itself. It is true in fact that the on state voltage across an IGBT is always at least one diode drop. However, compared to a power MOSFET of the same die size and operating at the same temperature and current, an IGBT can have significantly lower on state voltage. The reason for this is that a MOSFET is a majority carrier device only. In other words, in an Nchannel MOSFET only electrons flow. As mentioned before, the p-type substrate in an N-channel IGBT injects holes into the drift region. Therefore, current flow in an IGBT is composed of both electrons and holes. This injection of holes (minority carriers) significantly reduces the effective resistance to current flow in the drift region. Stated otherwise, hole injection significantly increases the conductivity, or the conductivity is modulated. The resulting reduction in on state voltage is the main advantage of IGBTs over power MOSFETs.Nothing comes for free of course, and the price for lower on state voltage is slower switching speed, especially at turn-off. The reason for this is that during turn-off the electron flow can be stopped rather abruptly, just as in a power MOSFET, by reducing the gate-emitter voltage below the threshold voltage. However, holes are left in the drift region, and there is no way to remove them except by voltage gradient and recombination. The IGBT exhibitsa tail current during turn-off until all the holes are swept out or recombined. The rate of recombination can be controlled, which is the purpose of the n+ buffer layer shown in Figure 1. This buffe r layer quickly absorbs trapped holes during turn-off. Not all IGBTs incorporate an n+ buffer layer; those that do are called punch-through (PT), those that do not are called non punch-through (NPT). PT IGBTs are sometimes referred to as asymmetrical, and NPT as symmetrical.The other price for lower on state voltage is the possibility of latchup if the IGBT is operated well outside the datasheet ratings. Latchup is a failure mode where the IGBT can no longer be turned off by the gate. Latchup can be induced in any IGBT through misuse. Thus the latchup failure mechanism in IGBTs warrants some explanation.Basic structureThe basic structure of an IGBT resembles a thyristor, namely a series of PNPN junctions. This can be explained by analyzing a more detailed equivalent circuit model for an IGBT shown in Figure 3.Figure 3 IGBT Model Showing Parasitic ThyristorA parasitic NPN bipolar transistor exists within all N channel power MOSFETS and consequently all N3channel IGBTs. The base of this transistor is the body region, which is shorted to the emitter to prevent it from turning on. Note however that the body region has some resistance, called body region spreading resistance, as shown in Figure 3. The P-type substrate and drift and body regions form the PNP portion of the IGBT. The PNPN structure forms a parasitic thyristor. If the parasitic NPN transistor ever turns on and the sum of the gains of the NPN and PNP transistors are greater than one, latchup occurs. Latchup is avoided through design of the IGBT by optimizing the doping levels and geometries of the various regions shown in Figure 1.The gains of the PNP and NPN transistors are set so that their sum is less than one. As temperature increases, the PNP and NPN gains increase, as well as the body region spreading resistance. Very high collector currentcan cause sufficient voltage drop across the body regi on to turn on the parasitic NPN transistor, and excessive localized heating of the die increases the parasitic transistor gains so their sum exceeds one. If this happens, the parasitic thyristor latches on, and the IGBT cannot be turned off by the gate and may be destroyed due to over-current heating. This is static latchup. High dv/dt during turn-off combined with excessive collector current can also effectively increase gains and turn on the parasitic NPN transistor. This is dynamic latchup, which is actu ally what limits the safe operating area since it can happen at a much lower collector current than static latchup, and it depends on the turn-off dv/dt. By staying within the maximum current and safe operating area ratings, static and dynamic latchup are avoided regardless of turn-off dv/dt. Note that turn-on and turn-off dv/dt, overshoot, and ringing can be set by an external gate resistor (as well as by stray inductance in the circuit layout).Punch through vs NPTPT versus NPT technologyConduction lossFor a given switching speed, NPT technology generally has a higher VCE(on) than PT technology. This difference is magnified further by fact that VCE(on) increases with temperature for NPT (positive temperature coefficient), whereas VCE(on) decreases with temperature for PT (negative temperature coefficient). However, for any IGBT, whether PT or NPT, switching loss is traded off against VCE(on). Higher speed IGBTs have a higher VCE(on); lower speed IGBTs have a lower VCE(on). In fact, it is possible that a very fast PT device can have a higher VCE(on) than a NPT device of slower switching speed.Switching lossFor a given VCE(on), PT IGBTs have a higher speed switching capability with lower total switching energy. This is due to higher gain and minority carrier lifetime reduction, which quenches the tail current.RuggednessNPT IGBTs are typically short circuit rated while PT devices often are not, and NPT IGBTs can absorb more avalanche energy than PT IGBTs. NPT technology is more rugged due to the wider base and lower gain of the PNP bipolar transistor. This is the main advantage gained by trading off switching speed with NPT technology. It is difficult to make a PT IGBT with greater than 600 Volt VCES whereas it is easily done with NPT technology. Advanced Power Technology does offer a series of very fast 1200 Volt PT IGBTs, the Power MOS 7��'IGBT series.Temperature effectsFor both PT and NPT IGBTs, turn-on switching speed and loss are practically unaffected by temperature. Reverse recovery current in a diode however increases with temperature, so temperature effects of an external diode in the power circuit affect IGBT turn-on loss. For NPT IGBTs, turn-off speed and switching loss remain relatively constant over the operating temperature range. For PT IGBTs, turn-off speed degrades and switching loss consequently increases with temperature. However, switching loss is low to begin with due to tail current quenching.As mentioned previously, NPT IGBTs typically have a positive temperature coefficient, which makes them well suited for paralleling. A positive temperature coefficient is desirable for paralleling devices because a hot device will conduct less current than a cooler device, so all the parallel devices tend to naturally share current. It is amisconception however that PT IGBTs cannot be paralleled because of their negative temperature coefficient. PT IGBTs can be paralleled because of the following:∙Their temperature coefficients tend to be almost zero and are sometimes positive at higher current.∙Heat sharing through the heat sink tends to force devices to share current because a hot device will heat its neighbors, thus lowering their on voltage.∙Parameters that affect the temperature coefficient tend to be well matched between devices.Possible IGBTsPossible IGBTsMicrosemi's Advanced Power Technology offers three series of IGBTs to cover a broad range of appli cations:∙Power MOS 7 Series " 600V and 1200V PT technology IGBTs designated by 'GP' in the part number, one of the fastest IGBTs on the market, designed for operation at high frequencies and/or for tail current sensitive applications such as soft switching.∙Thunderbolt Series " 600V only NPT technology IGBTs designated by 'GT' in the part number, fast IGBTs capable of 150kHz in hard switching applications, short circuit rated rugged devices suitable for switch-mode power supplies as well as motor drives.∙Fast Series " 600V and 1200V NPT technology IGBTs designated by 'GF' in the part number, short circuit rated rugged devices with low on voltage suitable for hard switching operation below 100kHz such as in motor drives.Power MOS 7 IGBTs from APT are uni que in that they are designed to switch extremely fast, and they incorporate a proprietary metal gate and open cell structure. The result is extremely low internal equivalent gate resistance (EGR), typically a fraction of an Ohm; one to two orders of magnitude lower than for poly-silicon gate devices. Low EGR enables faster switching and consequently lower switching loss. The metal gate and open cell structure also result in extremely uniform and fast excitation of the gate, minimizing hot spots during swit ching transients and improving reliability. An open cell structure is also more tolerant of defects induced during the manufacturing process.Datasheet walkthroughThe intent of datasheets provided by APT is to include relevant information that is useful and convenient for the power circuit designer, both for selection of the appropriate device as well as predicting its performance in an application. Graphs are provided to enable the designer to extrapolate from one set of operating conditions to another. It should be noted though that test results are very strongly circuit dependent, especially on stray emitter inductance but also on stray collector inductance and gate drive circuit design and layout. Different test circuits yield different results.The following walkthrough provides definition of terms in APT datasheets as well as further details on IGBT characteristics.HeadingFigure 4 APT Part Numbering for IGBTsRatingsMaximum ratingsV CES— collector-emitter voltageThis is a rating of the maximum voltage between the collector and emitter terminals with the gate shorted to the emitter. This is a maximum rating, and depending on temperature, the maximum permissible collectoremitter voltage could actually be less than the VCES rating. See the description of BVCES in Static Electrical Characteristics.V GE— gate-emitter voltageVGE is a rating of the maximum continuous voltage between the gate and emitter terminals. The purposes of this rating are to prevent breakdown of the gate oxide and to limit short circuit current. The actual gate oxide breakdown voltage is significantly higher than this, but staying within this rating at all times ensures application reliability.V GEM— gate emitter voltage transientVGEM is the maximum pulsed voltage between the gate and emitter terminals. The purpose of this rating is to prevent breakdown of the gate oxide. Transients on the gate can be induced not only by the applied gate drive signal but often more significantly by stray inductance in the gate drive circuit as well as feedback through the gate-collector capacitance. If there is more ringing on the gate than VGEM, stray circuit inductances probably need to be reduced, and/or the gate resistance should be increased to slow down t he switching speed. In addition to the power circuit layout, gate drive circuit layout is critical in minimizing the effective gate drive loop area and resulting stray inductances.If a clamping zener is used, it is recommended to connect it between the gate driver and the gate resistor rather than directly to the gate terminal. Negative gate drive is not necessary but may be used to achieve the utmost in switching speed while avoiding dv/dt induced turn-on. See application note APT9302 for more information on gate drive design.I C1, I C2— continuous collector currentI C1and I C2are ratings of the maximum continuous DC current with the die at its maximum rated junction temperature. They are based on the junction to case thermal resistance rating RθJC and the case temperature as follows:(1)This equation simply says that the maximum heat that can be dissipated,,equals the maximum allowable heat generated by conduction loss, V CE(on) X I C . There are no switching losses involved in I C1 and I C2. Solving for I C:(2)Of course V CE(on)depends upon I C(as well as junction temperature). Except at relatively low current, the relationship between IC and V CE(on) is fairly linear, as shown in Figure 5. Thus a linear approximation can be used to relate I C to V CE(on).Figure 5 Linear Approximation of IC versus V CE(on)The curve of V CE(on) is with the die at elevated temperature. (To calculate datasheet values, Microsemi uses the maximum V CE(on), which is higher than the typical V CE(on)to account for normal variations between parts.) The equation relating V CE(on) to I C is:(3)This equation is substituted into (2) for V CE(on) to solve for I C:(4)This is in the form of the familiar quadratic equationThe solution is:(5)I C in (5) represents the continuous DC current (with the device fully on) that causes the die to heat up to its maximum rated junction temperature. I C1 is the solution to (5) with T C equal to 25°C. I C2 is the solution to (5) with T C at an elevated temperature. This is a more useful rating than the traditional I C1 rating since operating at a case temperature of only 25°C is seldom feasible, however I C2 still does not take switching losses into account. Selection assistanceGraph of I C versus T CTo assist designers in the selection of devices for a particular application, APT provides a graph of maximum collector current versus case temperature. This graph is simply the solution to (5) over a range of case temperatures. Figure 6 shows an example. Note that in this case, the package leads limit the current to 100 Amps at low temperature, not the die.Figure 6 Maximum Collector Current versus Case TemperatureUsing the I C1 and I C2 ratingsThe I C1 and I C2 ratings and the graph of maximum collector current versus case temperature simply indicate the maximum theoretical continuous DC current that the device can carry, based on the maximum junction to case thermal resistance. Their purpose is mainly as figures of merit for comparing devices. For a soft switching application, I C2 is a good starting point for selecting a device. In a hard or soft switching application, the device might safely carry more or less current depending upon:∙switching losses∙duty cycle∙switching frequency∙switching speed∙heat sinking capacity∙thermal impedances and transientsThe point is that you cannot simply assume that the device can safely carry the same current in a switchmode power converter as is indicated in the I C1 or I C2 ratings or in the graph of maximum collector current versus case temperature.I CM— pulsed collector currentThis rating indicates how much pulsed current the device can handle, which is significantly higher than the rated continuous DC current. The purposes of the ICM rating are:∙To keep the IGBT operating in the "linear" region of its transfer characteristic. See Figure 7. There is a maximum collector current for a corresponding gate-emitter voltage that an IGBT will conduct. If the operating point at a given gate-emitter voltage goes above the linear region "knee" in Figure 7, any further increase in collectorcurrent results in a significant rise in collector-emitter voltage and consequent rise in conduction loss and possible device destruction. The I CM rating is set below the "knee" for typical gate drive voltages.∙To prevent burnout or latchup. Even if the pulse width is theoretically too short to overheat the die, significantly exceeding the I CM rating can cause enough localized die feature heating to result in a burnout site or latchup.∙To prevent overheating the die. The footnote "Repetitive rating: Pulse width limited by maximum junction temperature" implies that I CM is based on a thermal limitation depending on pulse width. This is always true for two reasons: 1) there is some margin in the I CM rating before risk of damage other than by the die exceeding its maximum junction temperature, and 2) no matter what the failure mechanism really is, overheating is almost always the observed end result anyway.∙To avoid problems with excessive current through the bond wires, although there would probably first be problems related to excessive current through the die.Figure 7 IGBT Transfer CharacteristicRegarding the thermal limitation on ICM, temperature rise depends upon the pulse width, time between pulses, heat dissipation, and V CE(on) as well as the shape and magnitude of the current pulse. Simply staying within the I CM limit does not ensure that the maximum junction temperature will not be exceeded. See the discussion of the Maximum Effective Transient Thermal Impedance curve for a procedure to estimate junction temperature during a current pulse.Safe Operating AreaI LM, RBSOA, and SSOA — safe operating areasThese ratings are all related. I LM is the amount of clamped inductive load current the device can safely switch in a snubberless hard switching application. Test circuit conditions are specified (case temperature, gate resistance, clamp voltage, etc.) The I LM rating is limited by the turn-off transient, where the gate was positive-biased andswitches to zero or negative bias. Hence the I LM rating and the Reverse Bias Safe Operating Area (RBSOA) are similar. The ILM rating is a maximum current, RBSOA is a maximum current at a specified voltage.Switching safe operating area (SSOA) is simply RBSOA at the full V CES voltage rating. Forward bias safe operating area (FBSOA), which covers the turn-on transient, is typically much higher than the RBSOA and is therefore typically not listed in the datasheet. The circuit designer does not need to worry about snubbers, minimum gate resistance, or limits on dv/dt as long as these ratings are not exceeded.E A S— single pulse avalanche energyAll devices that are avalanche energy rated have an E AS rating. Avalanche energy rated is synonymous with unclamped inductive switching (UIS) rated. E AS is both thermally limited and defect limited and indicates how much reverse avalanche energy the device can safely absorb with the case at 25°C and the die at or below the maximum rated junction temperature. The open cell structure used in Power MOS 7 �'mitigates the defect limitation on E AS. On the other hand, a defect in a closed cell structure can cause the cell to latchup under avalanche condition. Do not operate an IGBT intentionally in avalanche condition without thorough testing.Conditions for a test circuit are stated in a footnote, and the E AS rating is equal towhere L is the value of an inductor carrying a peak current i C, which is suddenly diverted into the collector of the device under test. It is the inductor's voltage, which exceeds the breakdown voltage of the IGBT, that causes the avalanche condition. An avalanche condition allows the inductor current to flow through the IGBT, even though the IGBT is in the off state. Energy stored in the inductor is analogous to energy st ored in leakage and/or stray inductances and is dissipated in the device under test. In an application, if ringing due to leakage and stray inductances does not exceed the breakdown voltage, then the device will not avalanche and hence does not need to dissipate avalanche energy.Avalanche energy rated devices offer a safety net depending on the margin between the voltage rating of the device and system voltages, including transients.P D— total power dissipationThis is a rating of the maximum power that the device can dissipate and is based on the maximum junction temperature and the thermal resistance RθJC at a case temperature of 25°C.(6)At case temperatures above 25°C, the linear derating factor is simply the inverse of RθJC.T J,T STG— operating and storage junction temperature rangeThis is the range of permissible storage and operating junction temperatures. The limits of this range are set to ensure a minimum acceptable device service life. Operating away from the limits of this range can significantly enhance the service life. It's actually an exponential function relating device life to junction temperature, but as a "rule of thumb", for thermally induced effects only, every 10°C reduction in junction temperature doubles the device life.Part 2 looks at static and dynamic electrical characteristics as well as thermal and mechanical characteristics, and useable frequency versus current. A datasheet extrapolation example is also provided.。
沟槽式FS-IGBT各部分对其性能的影响研究
沟槽式FS-IGBT各部分对其性能的影响研究张满红;邹其峰【摘要】沟槽式FS-IGBT是当前IGBT中最为先进的结构,它结合PT-IGBT和NPT-IGBT各自的优点,具有较薄的N-区以及FS场截止层,能够使导通压降更低并且可以有效减少关断时间和关断损耗.主要通过仿真软件Sentaurus TCAD对FS-IG-BT进行工艺与电学特性仿真,通过改变不同部分的参数,如栅极的长宽,N型漂移区的厚度,P-base区的注入剂量及能量等,研究对其性能的影响.结果表明栅极的长宽和漂移区厚度的增加会使BV变大,场截止层电阻率的增加会使导通电压变小,阈值电压会随着P-base区的注入剂量及能量的变大而变大.通过仿真结果得到了结构参数对器件性能的影响,为FS-IGBT的设计提供参考.【期刊名称】《现代电子技术》【年(卷),期】2018(041)014【总页数】5页(P5-9)【关键词】FS-IGBT;SentaurusTCAD;结构仿真;电学特性;性能影响;导通电压【作者】张满红;邹其峰【作者单位】华北电力大学现代电子科学研究所,北京 102206;华北电力大学现代电子科学研究所,北京 102206【正文语种】中文【中图分类】TN386-340 引言近年来世界能源消耗加剧以及电力需求的不断增加,大力开发新型电力电子器件已经变成了一项非常重要的任务。
随着科技的不断进步,所有的电力电子器件都有了飞速的发展,而在这些电力电子器件中发展速度最快的无疑是IGBT。
就现在的电力电子器件来看,IGBT是当前乃至将来小型化、低噪声、智能化、高性能电力电子装置的首选器件[1-2]。
IGBT设计之初就是为了兼有MOS管和双极型晶体管的优点,所以它在结构上主要由两部分组成,一个是输入极的MOS部分,另一个是输出极的BJT部分。
这样IGBT既能够在小驱动条件下快速开关,又具有较低的饱和压降。
由于IGBT在大电流、高速、高压等方面性能优越,成为了最为理想的开关器件[3]。
IGBT介绍
IGBT and Power MOSFET Modules SEMIKRON was the first enterprise worldwide to manu-facture isolated modules for power electronics as early as 1975 and is still the market leader in this area today. Isolated power modules featuring IGBTs (I nsulated G ate B ipolar T ransistors) or MOSFETs (M etal O xide F ield E ffect T ransistors) are the most frequently used switch components today.SEMIKRON IGBT and Power MOSFET modules are opti-mally tuned to a wide range of applications. For this rea-son, they are available in a great variety of designs, assemblies and connection technologies:- SEMITRANS TM,SEMITRANS TM M- SEMiX®- SKiM®- MiniSKiiP®- SKiiP®- SEMITOP®These module series, which differ greatly in their mecha-nical design and complexity, are equipped with IGBT and MOSFET chips featuring various technologies.This section contains information on the features these modules have in common. More details and product datasheets are given in the sections on SEMITRANS TM, SEMITRANS TM M, SEMiX®, SKiM® and MiniSKiiP®.For reasons of transparency, the specific product features and datasheets for the SKiiP® and SEMITOP® series have been dealt with separately in the sections on SKiiP® and SEMITOP®.Design of SEMIKRON power modules featuring IGBTs or MOSFETsIGBT and power MOSFET modules are assembled in a case on a common baseplate containing several power semiconductor chips (transistors, diodes, and possibly other components) which are electrically isolated from the mounting plate (heat sink).In SEMIKRON IGBT and MOSFET power modules, the rear side of the chips is soldered to the metallized surface of an insulation substrate by means of a special soldering method. This substrate is a DCB (Direct Copper Bonding) ceramic with AI2O3 or AIN as an insulating material. This insulating material combines electric isolating properties with good heat conduction. The bottom surface of the sub-strate, which is also metallized, is either soldered to the copper module baseplate (SEMITRANS TM, SEMiX®) or is pressed directly onto the heat sink (SKiM®, SKiiP®, MiniS-KiiP®, SEMITOP®) with a large thermal contact area. Front-side chip contact is made by thin aluminium bonding wires to the structured areas of the DCB, onto which the module connections are soldered (SEMITRANS TM, SEMiX®, SKiM®, SEMITOP®), or realized by pressure contacts (SKiiP®, MiniSKiiP®). SEMiX®, SKiM®, SKiiP® and MiniSKiiP® modules contain PTC or NTC sensors for measuring the heat sink tempe-rature; SKiiP® modules are additionally equipped with cur-rent sensors (compensating transducers).The MiniSKiiP® and SEMITOP® product groups also fea-ture CIB modules, bridge rectifiers and other topologies with diodes or thyristors in addition to the MOS and IGBT transistor modules.Some features of the SEMIKRON power modules with IGBTs or MOSFETs are listed in the following table: SEMITRANS TM IGBT, SEMITRANS TM MSEMiX®SKiM®SKiiP®MiniSKiiP®SEMITOP®* Under developmentMore details are contained in the product-specific sections and in the "IGBT and MOSFET Power Modules Applica-tion Manual."Design and basic features of the IGBT, MOSFET and free-wheeling diode chipsThe IGBT and MOSFET chips used by SEMIKRON are of the n-channel enhancement type, i.e. they are turned on by a positive gate control voltage (positive with regard to the emitter or source potential).Every IGBT or MOSFET chip consists of several thousand transistor cells as shown in the cut in Fig. 2. To illustrate their function, the charge carrier distribution in the forward state is also shown.Base-plateHeat sink Currentmeasure-mentTempera-ture mea-surementControl yes no no no noyes no no yes optional* no no optional*yes optional* no yes yes yes yesno no no yes nono no no no no2324Modules – Explanations – IGBT / MOSFET17-11-2004© by SEMIKRONFig. 1 Typical setup and function of a single cell and sym-bolsa) Power MOSFET (SIPMOS planar gate structure)b) IGBT (NPT standard chip with planar gate)The latest SEMIKRON power modules include recently developed IGBT chips featuring SPT (soft punch through)planar technology or MOSFET or IGBT chips in Field Stop technology with a trench gate structure. Fig. 2 shows sec-tional views of these transistor cells. For details on specific component features, please refer to the relevant data sheets or the "IGBT and MOSFET Power Modules Appli-cation Manual."Fig. 2 Sectionalviews of thelatest IGBT and MOSFET cellsa) SPT IGBTb) Field stop IGBT with trench gate structurec) MOSFET with trench gate structureOwing to their structure, MOSFETs are conductive in reverse direction. These "inverse diodes", as they are cal-25led, however, have very poor dynamic characteristics, a fact which restricts the use of MOSFETs in bridge circuits considerably - in particular when high voltages are invol-ved.IGBTs are reverse-blocking components. As the reverse voltage is low and generally not required in standard cir-cuits, SEMIKRON IGBT modules have free-wheeling dio-des connected in anti-parallel to the IGBTs.The free-wheeling diodes used in SEMIKRON IGBT modules are specially optimized CAL (C ontrolled A xial L ifetime) diodes ®, or specially developed HD CAL (H igh D ensity CAL) diodes. These fast, "super soft" planar dio-des are characterised by an optimal axial profile of the car-rier life time, which was achieved by an implantation pro-cess using helium ions and a basic carrier life time setting. This allows:• A low peak reverse current and thus a lower inrush load on the IGBTs in bridge circuits.•"Soft" decrease of the reverse current in the entire ope-rating temperature range, which minimizes switching surges and interference.•More robust performance when switching high di/dt up to 15 kA/µs * cm² in comparison to other diode types.•Good parallel connectability thanks to a weak negative temperature coefficient of the forward voltage.Compared with CAL diodes, the new HD CAL diodes show reduced forward voltages at negligibly higher swit-ching losses and an almost indifferent forward voltage temperature coefficient.Quantitative information on the diode features is contained in the relevant datasheets of the SEMIKRON modules.For more details please refer to the IGBT and MOSFET Power Modules Application Manual.Reverse and forward characteristicsFig. 3 shows the output characteristic of MOSFETs and IGBTs. Power modules are intended solely for switched mode, i.e. the "active" region (linear operation) must not be utilized for stationary operation (e.g. analogue ampli-fier).Fig. 3 a) Output characteristic of MOSFETsFig. 3 b) Output characteristic of IGBTsIn the forward blocking range , the reverse current I DSS or I CES increases slightly as the reverse voltage increases.An avalanche breakthrough occurs above the maximum rated reverse voltage V DDS or V CES , as specified in the datasheet.Various design features developed for modern MOSFETs create a certain "avalanche stability", i.e. for individual chips a specific avalanche energy E A is permissible. In power modules, however, several MOSFET chips whose blocking voltages are not entirely identical are often con-nected in parallel, which means that only the E A value gua-ranteed for a single chip can be utilized in a module.The break-down voltages of MOSFETs and IGBTs increase as the chip temperature rises. If power modules are used at very low ambient temperatures, it must be borne in mind that the V DSS or V CES specified in the data sheets apply to an ambient temperature of 25 °C.2617-11-2004© by SEMIKRONIn the forward state , MOSFETs and IGBTs have different characteristics.A MOSFET behaves like an ohmic resistor, i.e. its drain-source voltage is directly proportional to the drain current.The proportionality factor is referred to as the drain-source on-resistance and determines the power loss P cond in the fully conductive state (P cond = I 2D * R DS(on) ).R DS(on) rises with the junction temperature T j according to the following equation:For T j = 125 °C, this results in approximately twice the R DS(on) value specified in the datasheet for 25 °C. This must be taken into account for dimensioning.The forward characteristic of an IGBT in saturated state can be represented by a linear substitute characteristic as for diodes: V CEsat = V CE (T0) + r CE * I C .For SEMIKRON IGBT chips, the temperature coefficients of V CE(T0) and r CE are positive, meaning that V CEsat also rises with the temperature. This feature ensures operabi-lity in parallel connection which is typical for chips used in power modules, and it also ensures troublefree parallel connection of the modules as well as a high degree of switching robustness in SEMIKRON IGBT rmation on the module-specific linear substitute cha-racteristic (V CE(T0) and r CE for 25 °C and 125 °C) is contai-ned in the datasheets. For more details please refer to the "IGBT and MOSFET Power Modules Application Manual."For most IGBT module series, the collector-emitter satura-tion voltage V CEsat and the free-wheeling diode forward V F are specified in the datasheets at chip level. This data can be used to ascertain the power loss balances of the IGBTs and diodes. In the higher current range, the voltage drop I C * R CC'+EE' must also be taken into account in order to determine the total power losses in the modules, provided a total terminal resistance R CC'+EE' has been specified in the datasheet.Switching performanceThe SEMIKRON specifications on switching times contai-ned in the datasheets always refer to the standardised measuring circuits, current/voltage characteristics and switching time definitions given in Fig. 4 (MOSFET) and Fig.6 / Fig. 7 (IGBT).The following switching times t d(on): Turn-on delay time t d(off): Turn-off delay time tr : Rise time t f: Fall timet on = t d(on) + t r : Turn-on time t off = t d(off) + t f : Turn-off time are specified with the following parameters: supply voltage (V DD or V CC ), control voltage V GG , drain current I D or col-lector current I C , gate resistance R G and case temperature T case or chip temperature T j .Fig. 4 a) Measuring circuit for the determination of swit-ching times for Power MOSFETsFig. 4 b) Typical characteristic of gate-source voltage V GS and drain-source voltage V DS for IGBT turn-on/turn-off;Definition of switching timesAs shown in Fig. 4, the switching times specified in the datasheets for MOSFETs are determined for ohmic load and refer to the characteristics of the gate-source voltage during turn-on/turn-off. In practice, the current and voltage characteristics may deviate notably from the data given here, in particular for an ohmic-inductive load.IGBT switching times, on the other hand, are determined in a more realistic manner with an ohmic-inductive load (Fig. 5). Unlike MOSFETs, IGBTs are turned on by the positive control voltage V GG1 via gate resistance R 2 and turned off by the negative control voltage V GG2 via gate resistance R 3.Additional times as defined in future standards (t i in Figu-res 6 and 7) are used for the unambiguous definition of integration limits for the determination of switching losses E on (Turn-on loss energy) and E off (Turn-off loss energy)E on , E off = ∫ v * i dt t iHere, time and loss components which cannot be unambi-guously described by the switching time definitions are taken into consideration (e.g. the tail current characteristic for the IGBT).© by SEMIKRON17-11-2004Modules – Explanations – IGBT / MOSFET27Fig. 5 Measuring circuit for the determination of switching times for IGBTsFig. 6 and Fig. 7 illustrate switching time definitions on the basis of the typical current and voltage characteristics.Fig. 6 Typical characteristic of gate-emitter voltage VGE ,collector-emitter voltage V CE and collector current I C of an IGBT during turn-on; Switching time definitionsFig. 7 Typical characteristic of gate-emitter voltage V GE ,collector-emitter voltage V CE and collector current I C of an IGBT during turn-off; Switching time definitionsThe switching loss energies E on and E off , specified in the datasheets with the same parameters as the switching times were established by integrating the product of the collector (drain) current characteristic and the collector-emitter (drain-source) voltage characteristic across the total switching time. The switching losses specified for all SEMIKRON IGBT modules thus include both the turn-on losses resulting from the reverse current of the free-whee-ling diode in the IGBT and the turn-off losses during the collector tail current.The switching features of the integrated free-wheeling dio-desI RRM : Reverse peak currentQ rr : Reverse delay charge E rr : Turn-off loss energy(Parameters V CC , i F , di F /dt, V GG , R G , T j )are also determined with the aid of the measuring circuits shown in Fig. 6 / Fig.7.More details and guidelines for dimensioning are included in the "IGBT and MOSFET Power Modules Application Manual."Switching capability, robustness, SOAR ranges When hard switching is used with inductive loads, transi-stors must show an almost rectangular operating point curve i = f (u) between operating voltage and load current (cf. IGBT and MOSFET Power Modules Application Manual, Sections 1.2.3 and 2.3.3).The extent to which it is feasible to operate modules in rated conditions up to the specified overload conditions without risking module destruction is described in the SOA (S afe O perating A rea) diagrams:2817-11-2004© by SEMIKRON•SOA for single-pulse operation (SOA) with t p = pulse duration; T c = 25 °C; T j ≤ T jmax and periodic turn-on •RBSOA (R everse B iased SOA) for periodic turn-off with T j ≤ T jmax and specified V GE•SCSOA (S hort C ircuit SOA) for non-periodic switching off of short circuits with T j ≤ T jmax and a specified short-circuit duration t sc , circuit inductance L and gate-emitter voltage V GE = ± 15 V; limited, for example, to a maxi-mum of 1,000 short circuits at intervals > 1 s.Fig. 8 shows examples of the different SOA diagrams.Fig. 8 a) Single-pulse SOAFig. 8 b) RBSOAFig. 8 c) SCSOAThe SOA limits are as follows:•Maximum rated collector current (drain current): hori-zontal limit•Maximum rated collector-emitter (drain-source)voltage: vertical limit•Maximum rated power loss or chip temperature (diago-nal limit in the single-pulse SOA)Although the SOA limits do not explicitly rule out linear operation is not permissible for Power MOSFET and IGBT modules, because these modules have been designed solely as switching elements.For historical reasons, in most cases only SOA diagrams for single-pulse operation with varying pulse durations will be available for MOSFET power modules.RBSOAs, and in many cases even SCSOAs, are available for IGBT modules.All information on the SOA ranges applies to the chip level,which means, for example, that the maximum rated voltage V CES , as specified in the RBSOA, must be unders-hot at the terminals, depending on the internal module inductance. This defines the maximum current to be swit-ched off depending on all parasitic inductances in the load circuit and the drive conditions for the actual topology at a given operating voltage.For IGBT modules, the ratio of the maximum rated collec-tor current I cpuls in the RBSOA (vertical limit) to the nominal current I C (see datasheet) depends on the chip technology and the module rating I cnom , e.g. as a measuring condition for dynamic characteristics.For the IGBT chips used by SEMIKRON, the guide value is: I cpuls / I cnom = 2Details of the SCSOA can be found in the Application Manual, Section 3.6.2.IGBT chip technology and applicationThe use of different types of chips in the SEMIKRON IGBT modules SEMITRANS TM , SEMiX ®, SKiM ®, MiniSKiiP ®,Modules – Explanations – IGBT / MOSFET 29SKiiP ® and SEMITOP ® results in different module features (see the following tables):* This does not apply to new developments600 VIGBT chip technology NPT SEMITRANS ...063D SEMiX -SKiM ...063DMiniSKiiP ...063*..., ...065...SEMITOP ...063...V CEsat @ 25 °C 2.1 V E on + E off @ 125° C / 100 A 9 mJ Q G @ V GE -8/+15 V / 100 A350 nC1200 V IGBT chip techno-logy NPTLow loss NPT Ultra- fast NPTFSTrenchSPTSEMI- TRANS ...123D ...124D...125D ...126D ...128DSEMiX ---...126HD ...128D SKiM ---...126D ...128D Mini- SKiiP ...12*...--...126...-SKiiP ...120...--...123......122...SEMI-TOP ...123--...126-V CEsat 25°C 2.5 V 2.1 V 3.3 V 1.7 V 2.0 V E on + E off @ 125°C/100 A 28 mJ27 mJ15 mJ25 mJ21 mJQ G @ V GE - 8/+15 V / 100 A850 nC 850 nC 1000 nC 700 nC 1000 nC1700 V IGBT chiptechnology NPT Low lossNPTFS Trench SEMITRANS ...173D ...174D ...176DSEMiX --176HD SKiM --176D SKiiP...170...-...172...V CE @ 25 °C 3.4 V 2.6 V 2.0 V E on + E off @ 125 °C/100 A 90 mJ 110 mJ 100 mJ Q G @ V GE -8/+15V / 100 A1050 nC800 nC600 nCOwing to the different module features, the modules can be used in different recommended areas of application.The recommended switching rates for different SEMITRANS modules are 1200 V and 1700 V in con-verter applications (hard switching):1200 V1700 V。
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E V (b) Type Ill
Fig2. Energy band diagram for type 11 and tyy 111 at oollrrt0r region.
Takahide Sugiyama, Hiroyuki Ueda and Masayasu Ishiko
Power Device Div., Toyota Central R&D Labs., Inc. Nagakute, Aichi 480-11-561-63-4724 Fax: +8 1-561-63-6042 E-mail: t-sugiyama@mosk.tytlabs.co.jp
increase. In this paper, we propose a new collector structure with a low dose p- Si injection layer and a high dose p+ Ge contact layer for a thin wafer NPT-IGBT. This provides low contact resistances without sacrificing turnoff losses. We also demonstrate, for the first time, the performance of a thin wafer 1.2kV 200A IGBT using this new collector structure. Although NPT IGBTs are used as the motif device in this study, this proposed structure can also be applied effectively to thin wafer FS IGBTs [6].
DEVICE STRUCTURE AND CONCEPT Fig. 1 shows a cross-sectional view of each collector structure in this study. A collector structure with a conventional p- injection layer, the conventional structure with a p+ Si contact layer and the conventional structure with a p+ Ge contact layer are assigned as type I, type I1 and type 111, respectively. The proposed structure (type 111) corresponds to a structure where the p+ Si contact layer in type II is replaced with a p+ Ge contact layer. Additionally, Fig2 schematically shows an ideal energy-band diagram for the type 11 and type 111 structures. In type 11, the hole-injection from collector to base increases with increasing the pf dose in the contact layer. Moreover, the carrier transparency to the collector electrode is degraded by an increase in the contact layer thickness and the existence
INTRODUCTION IGBTs are one of the key components for realizing high-efficiency inverter system. In the automotive industry, compact and high-performance motor-inverter systems are indispensable for advanced hybrid vehicles. We have already developed 600V-200A-class low-loss and highly rugged planer IGBTs in 1997 and trench IGBTs in 2001 for the first mass production level hybrid vehicles [1,2]. On the other hand, new design concepts to improve IGBTs characteristics, other than regarding local lifetime control and trench gate structure, have been proposed lately. Especially, thin wafer IGBTs with a low dose injection layer are one of the main issues for middle voltage IGBTs from point of view of the performance and economical reasons. However, collector contact resistances are high because of the low canier concentration in the collector layer, while the good performance to the turnoff losses is provided by low hole-injection and good electron transparency [3,4]. Recently, to improve the low collector contact resistances, a structure where a high dose P+ contact layer is added on the low dose injection layer has been reported [SI. However, this structure has the possibility of causing not only an increase in hole-injection from the collector but also a degradation of electron transparency. Consequently, the turnoff losses
ABSTRACT We have proposed a new collector structure for thin wafer IGBTs to improve coutact resistances without sacrificing turnoff losses. The proposed structure bas a low dose p Si injection layer and a high dose pC Ge contact. We also demonstrate, for the first time, the performance of 1.2kV 2OOA class thin wafer NPT IGBTs using this new collector structure. As a result, from simulations and measurements, we found that the high dose p+ G e layer acts to suppress of hole-injection and also provides low contact resistauces without consequently sacrificing turnoll losses.
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In the proposed device (type Ill), turnoff times and on-state voltages were independent of the carrier concentration in the p+ contact layer, as shown in Fig. 3. As expected, the band offset (AEv) plays a part in creating this independent state, that is, the p+ Ge layer acts to suppress hole-injection froni the contact. In this case, the contact resistances might decrease due to the high concentration at the collector surface, though contact resistances could not be evaluated in this simulation. Fig. 4 shows the carrier (hole) distribution of type I1 and type Ill at a current density of 250A/cm2. Indeed, the injected carrier concentration at the n- base region in type 111 was lower than that in type II, in spite of the high boron doping concentration in the contact layer, which was specified as the same profile as that of type 11. From these simulation results, it is expected that contact resistances can be lowered without sacrificing turnoff losses by using this proposed collector structure.