64x 汇编指令 有关DSP

A 7-bit signed constant, src1, is shifted 2 bits to the left, then added to theaddress of the first instruction of the fetch packet that contains the ADDKPC instruction (PCE1). The result is placed in dst. The 3-bit unsigned constant, src2, specifies the number of NOP cycles to insert after the current instruction. This instruction helps reduce the number of instructions needed to set up the return address for a function call. src2 is added to src1. The result is placed in dst The upper and lower halves of the src1 operand are added to the upper and lower halves of the src2 operand. The values in src1 and src2 are treated as signed, packed 16-bit data and the results are written in signed, packed 16-bit format into dst. Performs 2s-complement addition between packed 8-bit quantities. The values in src1 and src2 are treated as packed 8-bit data and the results are written into dst in a packed 8-bit format. Performs a bitwise AND operation between src1 and src2. The result is placed in dst. The scst5 operands are sign extended to 32 bits. Performs a bitwise logical AND operation between src1 and the bitwise logical inverse of src2. The result is placed in dst. Performs an averaging operation on packed 16-bit data. For each pair of signed 16-bit values found in src1 and src2, AVG2 calculates the average of the two values and returns a signed 16-bit quantity in the corresponding position in the dst. Performs an averaging operation on packed 8-bit data. The values in src1 and src2 are treated as unsigned, packed 8-bit data and the results are written in unsigned, packed 8-bit format. For each unsigned, packed 8-bit value found in src1 and src2, AVGU4 calculates the average of the two values and returns an unsigned, 8-bit quantity in the corresponding positions in the dst. A 21-bit signed constant, cst21, is shifted left by 2 bits and is added to the address of the first instruction of the fetch packet that contains the branch instruction. The result is placed in the program fetch counter (PFC). The assembler/linker automatically computes the correct value for cst21 by the following formula: cst21 = (label - PCE1) >> 2 If two branches are in the same execute packet and both are taken, behavior is undefined. src2 is placed in the program fetch counter (PFC).
B IRP
B IRP(.unit) IRP .unit = .S2
B NRP
B NRP(.unit) NRP .unit = .S2 BDEC(.unit) src, dst .unit = .S1 or .S2
TMS320C64x 指令集 指令 语法 ABS ABS (.unit) src2, dst .unit = .L1 or .L2 ABS2 ABS2 (.unit) src2, dst .unit = .L1 or .L2 ADD ADD(.unit) src1, src2, dst .unit= .D1, .D2, .L1, .L2, .S1, .S2 ADDAB(.unit) src2, src1,dst .unit = .D1 or .D2
附录 C
64x 汇编指令
描述 The absolute value of src2 is placed in dst. The absolute values of the upper and lower halves of the src2 operand are placed in the upper and lower halves of the dst. src2 is added to src1. The result is placed in dst. For the C64x and C64x+ CPU, src1 is added to src2 using the byte addressing mode specified for src2. The addition defaults to linear mode. However, if src2 is one of A4-A7 or B4-B7, the mode can be changed to circular mode by writing the appropriate value to the AMR . The result is placed in dst. src1 is added to src2 using the doubleword addressing mode specified for src2. The addition defaults to linear mode. However, if src2 is one of A4-A7 or B4-B7, the mode can be changed to circular mode by writing the appropri-ate value to the AMR . src1 is left shifted by 3 due to doubleword data sizes. The result is placed in dst. For the C64x and C64x+ CPU, src1 is added to src2 using the halfword addressing mode specified for src2. The addition defaults to linear mode.However, if src2 is one of A4-A7 or B4-B7, the mode can be changed to circular mode by writing the appropriate value to the AMR . If circular addressing is enabled, src1 is left shifted by 1. The result is placed in dst. For the C64x and C64x+ CPU, src1 is added to src2 using the word addressing mode specified for src2. The addition defaults to linear mode. However, if src2 is one of A4-A7 or B4-B7, the mode can be changed to circular mode by writing the appropriate value to the AMR . If circular addressing is enabled, src1 is left shifted by 2. The result is placed in dst. A 16-bit signed constant, cst16, is added to the dst register specified. The result is placed in dst.
ADDAB
ADDAD
ADDAD(.unit) src2, src1,dst .unitunit) src2, src1, dst .unit = .D1 or .D2
ADDAW
ADDAW(.unit) src2, src1,dst .unit = .D1 or .D2
ADDK
ADDK(.unit) cst, dst .unit = .S1 or .S2
ADDKPC
ADDKPC(.unit)src1,dst,src2 .unit = .S2
ADDU ADD2
ADDU(.unit) src1, src2, dst .unit = .L1 or .L2 ADD2(.unit) src1, src2, dst .unit= .S1, .S2, .L1, .L2, .D1, .D2
AVGU4
AVGU4(.unit) src1, src2, dst .unit = .M1 or .M2
B displacement
B displacement(.unit) label .unit = .S1 or .S2
B register
B register (.unit) src2 .unit = .S2
ADD4
ADD4(.unit) src1, src2, dst .unit = .L1 or .L2
AND
ANDN
AVG2
(.unit) src1, src2, dst .unit= .L1, .L2, .S1, .S2, .D1, .D2 ANDN (.unit) src1, src2, dst .unit=.L1,.L2,S1, .S2, .D1, .D2 AVG2(.unit) src1, src2, dst .unit = .M1 or .M2