MAX5933E中文资料

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MAX3490EESA+中文资料

General DescriptionDevices in the MAX3483E family (MAX3483E/MAX3485E/MAX3486E/MAX3488E/MAX3490E/MAX3491E) are ±15kV ESD-protected, +3.3V, low-power transceivers for RS-485 and RS-422 communications. Each device con-tains one driver and one receiver. The MAX3483E and MAX3488E feature slew-rate-limited drivers that minimize EMI and reduce reflections caused by improperly termi-nated cables, allowing error-free data transmission at data rates up to 250kbps. The partially slew-rate-limited MAX3486E transmits up to 2.5Mbps. The MAX3485E,MAX3490E, and MAX3491E transmit at up to 12Mbps.All devices feature enhanced electrostatic discharge (ESD) protection. All transmitter outputs and receiver inputs are protected to ±15kV using IEC 1000-4-2 Air-Gap Discharge, ±8kV using IEC 1000-4-2 Contact Discharge, and ±15kV using the Human Body Model.Drivers are short-circuit current limited and are protect-ed against excessive power dissipation by thermal shutdown circuitry that places the driver outputs into a high-impedance state. The receiver input has a fail-safe feature that guarantees a logic-high output if both inputs are open circuit.The MAX3488E, MAX3490E, and MAX3491E feature full-duplex communication, while the MAX3483E,MAX3485E, and MAX3486E are designed for half-duplex communication.ApplicationsTelecommunicationsIndustrial-Control Local Area Networks Transceivers for EMI-Sensitive Applications Integrated Services Digital Networks Packet SwitchingFeatureso ESD Protection for RS-485 I/O Pins±15kV—Human Body Model±8kV—IEC 1000-4-2, Contact Discharge ±15kV—IEC 1000-4-2, Air-Gap Discharge o Operate from a Single +3.3V Supply—No Charge Pump Required o Interoperable with +5V Logic o Guaranteed 12Mbps Data Rate (MAX3485E/MAX3490E/MAX3491E)o Slew-Rate Limited for Errorless Data Transmission (MAX3483E/MAX3488E) o 2nA Low-Current Shutdown Mode(MAX3483E/MAX3485E/MAX3486E/MAX3491E)o -7V to +12V Common-Mode Input Voltage Range o Full-Duplex and Half-Duplex Versions Available o Industry-Standard 75176 Pinout (MAX3483E/MAX3485E/MAX3486E)o Current-Limiting and Thermal Shutdown for Driver Overload ProtectionMAX3483E/MAX3485E/MAX3486E/MAX3488E/MAX3490E/MAX3491E3.3V-Powered, ±15kV ESD-Protected, 12Mbps and Slew-Rate-Limited T rue RS-485/RS-422 T ransceivers________________________________________________________________Maxim Integrated Products119-1474; Rev 0; 4/99Selector GuideOrdering InformationOrdering Information continued at end of data sheet.For free samples & the latest literature: , or phone 1-800-998-8800.For small orders, phone 1-800-835-8769.M A X 3483E /M A X 3485E /M A X 3486E /M A X 3488E /M A X 3490E /M A X 3491E3.3V-Powered, ±15kV ESD-Protected, 12Mbps and Slew-Rate-Limited T rue RS-485/RS-422 T ransceiversABSOLUTE MAXIMUM RATINGSDC ELECTRICAL CHARACTERISTICS(V = +3.3V ±0.3V, T = T to T , unless otherwise noted. Typical values are at T = +25°C.)Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.Supply Voltage (V CC ).............................................................+7V Control Input Voltage (RE , DE).................................-0.3V to +7V Driver Input Voltage (DI)...........................................-0.3V to +7V Driver Output Voltage (A, B, Y, Z).......................-7.5V to +12.5V Receiver Input Voltage (A, B)..............................-7.5V to +12.5V Receiver Output Voltage (RO)....................-0.3V to (V CC + 0.3V)Continuous Power Dissipation (T A = +70°C)8-Pin SO (derate 5.88mW/°C above +70°C)..................471mW 8-Pin Plastic DIP (derate 9.09mW/°C above +70°C).....727mW14-Pin SO (derate 8.33mW/°C above +70°C)................667mW 14-Pin Plastic DIP (derate 10mW/°C above +70°C)......800mW Operating Temperature RangesMAX34_ _ EC_ _...................................................0°C to +70°C MAX34_ _ EE_ _.................................................-40°C to +85°C Storage Temperature Range.............................-65°C to +150°C Lead Temperature (soldering, 10sec).............................+300°CMAX3483E/MAX3485E/MAX3486E/MAX3488E/MAX3490E/MAX3491E3.3V-Powered, ±15kV ESD-Protected, 12Mbps and Slew-Rate-Limited T rue RS-485/RS-422 T ransceiversDC ELECTRICAL CHARACTERISTICS (continued)(V CC = +3.3V ±0.3V, T A = T MIN to T MAX , unless otherwise noted. Typical values are at T A = +25°C.)DRIVER SWITCHING CHARACTERISTICS—MAX3485E/MAX3490E/MAX3491E(V = +3.3V, T = +25°C.)DRIVER SWITCHING CHARACTERISTICS—MAX3486E(V = +3.3V, T = +25°C.)*MAX3488E and MAX3491E will be compliant to ±8kV per IEC 1000-4-2 Contact Discharge by September 1999.M A X 3483E /M A X 3485E /M A X 3486E /M A X 3488E /M A X 3490E /M A X 3491E3.3V-Powered, ±15kV ESD-Protected, 12Mbps and Slew-Rate-Limited T rue RS-485/RS-422 T ransceivers4_______________________________________________________________________________________DRIVER SWITCHING CHARACTERISTICS—MAX3483E/MAX3488E(V CC = +3.3V, T A = +25°C.)RECEIVER SWITCHING CHARACTERISTICS(V CC = +3.3V, T A = +25°C.)Note 1:∆V OD and ∆V OC are the changes in V OD and V OC , respectively, when the DI input changes state.Note 2:Measured on |t PLH (Y) - t PHL (Y)|and |t PLH (Z) - t PHL (Z)|.Note 3:The transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 80ns, thedevices are guaranteed not to enter shutdown. If the inputs are in this state for at least 300ns, the devices are guaranteed to have entered shutdown. See Low-Power Shutdown Mode section.MAX3483E/MAX3485E/MAX3486E/MAX3488E/MAX3490E/MAX3491E3.3V-Powered, ±15kV ESD-Protected, 12Mbps and Slew-Rate-Limited T rue RS-485/RS-422 T ransceivers_______________________________________________________________________________________5Typical Operating Characteristics(V CC = +3.3V, T A = +25°C, unless otherwise noted.)252015105000.51.01.52.02.53.53.0OUTPUT CURRENT vs.RECEIVER OUTPUT LOW VOLTAGEM A X 3483E -01OUTPUT LOW VOLTAGE (V)O U T P U T C U R R E N T (m A )-20-18-16-14-12-10-8-6-4-2000.51.01.52.02.53.53.0OUTPUT CURRENT vs.RECEIVER OUTPUT HIGH VOLTAGEM A X 3483E -02OUTPUT HIGH VOLTAGE (V)O U T P U T C U R R E N T (m A )3.003.053.103.153.203.253.30-40-20020406010080RECEIVER OUTPUT HIGH VOLTAGEvs. TEMPERATURETEMPERATURE (°C)O U T P U T H I G H V O L T A G E (V )00.10.20.30.40.50.60.70.8-40-2020406010080RECEIVER OUTPUT LOW VOLTAGEvs. TEMPERATURETEMPERATURE (°C)O U T P U T L O W V O L T A G E (V )2505075100125150175024681012OUTPUT CURRENT vs.DRIVER OUTPUT LOW VOLTAGEM A X 3483E -07OUTPUT LOW VOLTAGE (V)O U T P U T C U R R E N T (m A )100908070605040302010000.5 1.0 1.5 2.0 2.5 3.53.0DRIVER OUTPUT CURRENT vs.DIFFERENTIAL OUTPUT VOLTAGEM A X 3483E -05DIFFERENTIAL OUTPUT VOLTAGE (V)O U T P U T C U R R E N T (m A )1.61.71.81.92.02.12.22.32.42.62.5-40-20020406010080DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs. TEMPERATURETEMPERATURE (°C)D I F FE R E N T I A L O U T P U T V O L T A G E (V )-100-80-60-40-20543210-7-6-3-4-5-2-1OUTPUT CURRENT vs.DRIVER OUTPUT HIGH VOLTAGEM A X 3483E -08OUTPUT HIGH VOLTAGE (V)O U T P U T C U R R E N T (m A )M A X 3483E /M A X 3485E /M A X 3486E /M A X 3488E /M A X 3490E /M A X 3491E3.3V-Powered, ±15kV ESD-Protected, 12Mbps and Slew-Rate-Limited T rue RS-485/RS-422 T ransceivers0.80.70.91.01.11.2-40-2020406010080SUPPLY CURRENT vs. TEMPERATURETEMPERATURE (°C)S U P P L Y C U R R E N T (m A )Typical Operating Characteristics (continued)(V CC = +3.3V, T A = +25°C, unless otherwise noted.)0102030405060708010090-40-2020406010080SHUTDOWN CURRENT vs. TEMPERATUREM A X 3483E -10TEMPERATURE (°C)S H U T D O W N C U R R E N T (n A )Pin DescriptionMAX3483E/MAX3485E/MAX3486E/MAX3488E/MAX3490E/MAX3491E3.3V-Powered, ±15kV ESD-Protected, 12Mbps and Slew-Rate-Limited T rue RS-485/RS-422 T ransceivers_______________________________________________________________________________________7Figure 2. MAX3488E/MAX3490E Pin Configuration and Typical Operating CircuitFigure 3. MAX3491E Pin Configuration and Typical Operating CircuitFigure 1. MAX3483E/MAX3485E/MAX3486E Pin Configuration and Typical Operating CircuitM A X 3483E /M A X 3485E /M A X 3486E /M A X 3488E /M A X 3490E /M A X 3491E3.3V-Powered, ±15kV ESD-Protected, 12Mbps and Slew-Rate-Limited T rue RS-485/RS-422 T ransceivers8_______________________________________________________________________________________Figure 4. Driver V OD and V OC Figure 7. Driver Differential Output Delay and Transition TimesFigure 6. Receiver V OH and V OLFigure 5. Driver V OD with Varying Common-Mode VoltageMAX3483E/MAX3485E/MAX3486E/MAX3488E/MAX3490E/MAX3491E3.3V-Powered, ±15kV ESD-Protected, 12Mbps and Slew-Rate-Limited T rue RS-485/RS-422 T ransceivers_______________________________________________________________________________________9Figure 8. Driver Propagation TimesFigure 9. Driver Enable and Disable Times (t PZH , t PSH , t PHZ )Figure 10. Driver Enable and Disable Times (t PZL , t PSL , t PLZ )M A X 3483E /M A X 3485E /M A X 3486E /M A X 3488E /M A X 3490E /M A X 3491E3.3V-Powered, ±15kV ESD-Protected, 12Mbps and Slew-Rate-Limited T rue RS-485/RS-422 T ransceivers10______________________________________________________________________________________Figure 11. Receiver Propagation DelayFigure 12. Receiver Enable and Disable TimesNote 4: The input pulse is supplied by a generator with the following characteristics: f = 250kHz, 50% duty cycle, t r ≤6.0ns, Z O = 50Ω.Note 5: C L includes probe and stray capacitance._____________________Function TablesDevices with Receiver/Driver Enable(MAX3483E/MAX3485E/MAX3486E/MAX3491E)Table 1. Transmitting* B and A outputs are Z and Y, respectively, for full-duplex part (MAX3491E).X = Don’t care; High-Z = High impedanceTable 2. Receiving* DE is a “don’t care” (x) for the full-duplex part (MAX3491E).X = Don’t care; High-Z = High impedanceDevices without Receiver/Driver Enable(MAX3488E/MAX3490E)Table 3. TransmittingTable 4. Receiving___________Applications InformationThe MAX3483E/MAX3485E/MAX3486E/MAX3488E/MAX3490E/MAX3491E are low-power transceivers for RS-485 and RS-422 communications. The MAX3483E and MAX3488E can transmit and receive at data rates up to 250kbps, the MAX3486E at up to 2.5Mbps, and the MAX3485E/MAX3490E/MAX3491E at up to 12Mbps. The MAX3488E/MAX3490E/MAX3491E are full-duplex trans-ceivers, while the MAX3483E/MAX3485E/MAX3486E are half-duplex. Driver Enable (DE) and Receiver Enable (RE ) pins are included on the MAX3483E/MAX3485E/MAX3486E/MAX3491E. When disabled, the driver and receiver outputs are high impedance.Reduced EMI and Reflections (MAX3483E/MAX3486E/MAX3488E)The MAX3483E/MAX3488E are slew-rate limited, mini-mizing EMI and reducing reflections caused by improp-erly terminated cables. Figure 13 shows the driver output waveform of a MAX3485E/MAX3490E/MAX3491E transmitting a 125kHz signal, as well as the Fourier analysis of that waveform. High-frequency harmonics with large amplitudes are evident. Figure 14 shows the same information, but for the slew-rate-limited MAX3483E/MAX3488E transmitting the same signal. The high-frequency harmonics have much lower amplitudes,and the potential for EMI is significantly reduced.Low-Power Shutdown Mode(MAX3483E/MAX3485E/MAX3486E/MAX3491E)A low-power shutdown mode is initiated by bringing both RE high and DE low. The devices will not shut down unless both the driver and receiver are disabled (high impedance). In shutdown, the devices typically draw only 2nA of supply current.For these devices, the t PSH and t PSL enable times assume the part was in the low-power shutdown mode;the t PZH and t PZL enable times assume the receiver or driver was disabled, but the part was not shut down.MAX3483E/MAX3485E/MAX3486E/MAX3488E/MAX3490E/MAX3491E3.3V-Powered, ±15kV ESD-Protected, 12Mbps and Slew-Rate-Limited T rue RS-485/RS-422 T ransceivers______________________________________________________________________________________11INPUTS OUTPUT A, B RO ≥+0.2V 1≤-0.2V 0Inputs Open1INPUT OUTPUTS DI Z Y 101015MHz 500kHz/div 05MHz500kHz/div Figure 13. Driver Output Waveform and FFT Plot of MAX3485E/MAX3490E/MAX3491E Transmitting a 125kHz Signal Figure 14. Driver Output Waveform and FFT Plot of MAX3483E/ MAX3488E Transmitting a 125kHz SignalM A X 3483E /M A X 3485E /M A X 3486E /M A X 3488E /M A X 3490E /M A X 3491E3.3V-Powered, ±15kV ESD-Protected, 12Mbps and Slew-Rate-Limited T rue RS-485/RS-422 T ransceivers12______________________________________________________________________________________Figure 17. MAX3483E/MAX3488E Driver Propagation Delay Figure 19. MAX3483E/MAX3488E System Differential Voltage at 125kHz Driving 4000 Feet of Cable Figure 20. MAX3485E/MAX3490E/MAX3491E System Differential Voltage at 125kHz Driving 4000 Feet of CableDriver-Output Protection Excessive output current and power dissipation caused by faults or by bus contention are prevented by two mechanisms. A foldback current limit on the output stage provides immediate protection against short circuits over the whole common-mode voltage range (see Typical Operating Characteristics). In addition, a thermal shut-down circuit forces the driver outputs into a high-imped-ance state if the die temperature rises excessively.Propagation Delay Figures 15–18 show the typical propagation delays. Skew time is simply the difference between the low-to-high and high-to-low propagation delay. Small driver/receiver skew times help maintain a symmetrical mark-space ratio (50% duty cycle).The receiver skew time, |t PRLH- t PRHL|, is under 10ns (20ns for the MAX3483E/MAX3488E). The driver skew times are 8ns for the MAX3485E/MAX3490E/MAX3491E, 12ns for the MAX3486E, and typically under 50ns for the MAX3483E/MAX3488E.Line Length vs. Data Rate The RS-485/RS-422 standard covers line lengths up to 4000 feet. For line lengths greater than 4000 feet, see Figure 21 for an example of a line repeater.Figures 19 and 20 show the system differential voltage for parts driving 4000 feet of 26AWG twisted-pair wire at 125kHz into 120Ωloads.For faster data rate transmission, please consult the fac-tory.±15kV ESD Protection As with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. The driver outputs and receiver inputs of the MAX3483E family of devices have extra protection against static electricity. Maxim’s engineers have developed state-of-the-art structures to protect these pins against ESD of ±15kV without damage. The ESD structures withstand high ESD in all states: normal operation, shutdown, and powered down. After an ESD event, Maxim’s E versions keep working without latchup or damage.ESD protection can be tested in various ways; the transmitter outputs and receiver inputs of this product family are characterized for protection to the following limits:1)±15kV using the Human Body Model2)±8kV using the Contact-Discharge method specifiedin IEC 1000-4-23)±15kV using IEC 1000-4-2’s Air-Gap method.ESD Test Conditions ESD performance depends on a variety of conditions. Contact Maxim for a reliability report that documents test setup, test methodology, and test results.Human Body Model Figure 22a shows the Human Body Model and Figure 22b shows the current waveform it generates when dis-charged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of inter-est, which is then discharged into the test device through a 1.5kΩresistor.IEC 1000-4-2 The IEC 1000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifi-cally refer to integrated circuits. The MAX3483E family of devices helps you design equipment that meets Level 4 (the highest level) of IEC 1000-4-2, without the need for additional ESD-protection components.The major difference between tests done using the Human Body Model and IEC 1000-4-2 is higher peak current in IEC 1000-4-2, because series resistance is lower in the IEC 1000-4-2 model. Hence, the ESD with-stand voltage measured to IEC 1000-4-2 is generally lower than that measured using the Human Body Model. Figure 23a shows the IEC 1000-4-2 model, and Figure 23b shows the current waveform for the ±8kV IEC 1000-4-2, Level 4 ESD contact-discharge test.Figure 21. Line Repeater for MAX3488E/MAX3490E/MAX3491EMAX3483E/MAX3485E/MAX3486E/MAX3488E/MAX3490E/MAX3491E3.3V-Powered, ±15kV ESD-Protected, 12Mbps and Slew-Rate-Limited T rue RS-485/RS-422 T ransceivers ______________________________________________________________________________________13M A X 3483E /M A X 3485E /M A X 3486E /M A X 3488E /M A X 3490E /M A X 3491EThe air-gap test involves approaching the device with a charged probe. The contact-discharge method connects the probe to the device before the probe is energized.Machine ModelThe Machine Model for ESD tests all pins using a 200pF storage capacitor and zero discharge resis-tance. Its objective is to emulate the stress caused when I/O pins are contacted by handling equipment during test and assembly. Of course, all pins require this protection, not just RS-485 inputs and outputs.Typical ApplicationsThe MAX3483E/MAX3485E/MAX3486E/MAX3488E/MAX3490E/MAX3491E transceivers are designed for bidirectional data communications on multipoint bus transmission lines. Figures 24 and 25 show typical net-work applications circuits. These parts can also be used as line repeaters, with cable lengths longer than 4000 feet, as shown in Figure 21.To minimize reflections, the line should be terminated at both ends in its characteristic impedance, and stub lengths off the main line should be kept as short as possible. The slew-rate-limited MAX3483E/MAX3488E and the partially slew-rate-limited MAX3486E are more tolerant of imperfect termination.3.3V-Powered, ±15kV ESD-Protected, 12Mbps and Slew-Rate-Limited T rue RS-485/RS-422 T ransceivers14______________________________________________________________________________________Figure 22a. Human Body ESD Test ModelFigure 22b. Human Body Current WaveformFigure 23a. IEC 1000-4-2 ESD Test ModelFigure 23b. IEC 1000-4-2 ESD Generator Current WaveformMAX3483E/MAX3485E/MAX3486E/MAX3488E/MAX3490E/MAX3491E3.3V-Powered, ±15kV ESD-Protected, 12Mbps and Slew-Rate-Limited T rue RS-485/RS-422 T ransceivers______________________________________________________________________________________15Figure 25. MAX3488E/MAX3490E/MAX3491E Full-Duplex RS-485 NetworkFigure 24. MAX3483E/MAX3485E/MAX3486E Typical RS-485 NetworkM A X 3483E /M A X 3485E /M A X 3486E /M A X 3488E /M A X 3490E /M A X 3491E3.3V-Powered, ±15kV ESD-Protected, 12Mbps and Slew-Rate-Limited T rue RS-485/RS-422 T ransceiversTRANSISTOR COUNT: 761Chip InformationOrdering Information (continued)Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.16____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600©1999 Maxim Integrated ProductsPrinted USAis a registered trademark of Maxim Integrated Products.。

3933中文资料

Data Sheet 26301.100†The A3933SEQ is a three-phase MOSFET controller for use with bipolar brushless dc motors. It drives all n-channel external power FETs, allowing system cost savings and minimizing r (DS)on power loss.The high-side drive block is implemented with bootstrap capacitors at each output to provide the floating positive supply for the gate drive.The high-side circuitry also employs a unique “intelligent” FETmonitoring circuit that ensures the gate voltages are at the proper levels before turn-on and during the ON cycle. This device is targeted for applications with motor supplies from 12 V to 28 V.Internal fixed off-time PWM current-control circuitry can be used to regulate the maximum load current to a desired value. The peak load-current limit is set by the user’s selection of an input reference voltage and external sensing resistor. The fixed off-time pulse duration is set by a user-selected external RC timing network.A power-loss braking circuit brakes the motor on an under-voltage condition. The device is configured to either coast or dynamically brake the motor when this occurs.The A3933SEQ is supplied in a 32-lead rectangular (9 x 7) plasticchip carrier (quad pack) for minimum-area, surface-mount applica-tions.3933FEATURES AND BENEFITSI Drives External N-Channel FETs I Intelligent High-Side Gate DriveI Selectable Coast or Dynamic Brake on Power Down I Adjustable Dead Time for Cross-Conduction Protection I Selectable Fast or Slow Current-Decay Modes I Internal PWM Peak Current Control I Reset/Coast InputI 120° Hall Commutation with Internal Pullup I Internal 5-V RegulatorI Low-Side Synchronous Rectification I Direction ControlI PWM Speed-Control Input I Fault-Diagnostic Output IUnder-Voltage ProtectionTHREE-PHASE POWER MOSFET CONTROLLER115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-********THREE-PHASE POWER MOSFET CONTROLLERCopyright © 1999, Allegro MicroSystems, Inc.Functional Block DiagramRECOMMENDED OPERATING CONDITIONSSupply Voltage, V BB ...................................... 15 V to 28 Vor, if V BB = V CCOUT ................................... 12 V ±10%Logic Input Voltage Range, V IN .............. -0.3 V to +4.8 V Sense Voltage Range, V SENSE ........................ -1 V to +1 V RC Resistance.......................................... 10 k Ω to 100 k ΩPWM Frequency, f PWM ....................... 20 kHz to 100 kHzLOW-SIDE Dwg. FP-045V 1 OF 3 HIGH-SIDE DRIVERSTO 1 OF 3MOTOR PHASES TO LCAP3933THREE-PHASE POWER MOSFET CONTROLLERELECTRICAL SPECIFICATIONS at T A = 25°C, V BB = V CCOUT = 12 V, C load = 1000 pF, C boot = 0.047 µF (unless noted otherwise).LimitsParameterSymbolConditionsMinTypMaxUnitsSupply CurrentQuiescent Current I BB RESET low, f PWM = 40 kHz –1619mA RESET high–1517mA Reference Voltage V LCAP4.755.0 5.25V Ref. Volt. Load Regulation ∆V LCAP(∆ILCAP)I LCAP = 0 to -2 mA –1025mV Output VoltageV CCOUTV BB = 28 V10.81213.2V Output Voltage Regulation∆V CCOUT(∆ICCOUT)V BB = 28 V, I CCOUT = 0 to -10 mA––25mV Digital Logic LevelsLogic Input Voltage V IH 2.0––V V IL ––0.8V Logic Input CurrentI IH V IH = 2 V –<1.010µA I ILV IL = 0.8 V-70–-130µA Gate DriveLow-Side Output Voltage V GLxH 9.510.511.5V V GLxL I GLx = 1 mA––0.30V High-Side Output Voltage V GHxH 9.010.511.5V V GHxL I GHx = 1 mA ––0.25V Low-Side Output t rGLx 1 V to 8 V –50–ns Switching Time t fGLx 8 V to 1 V –40–ns High-Side Output t rGHx 1 V to 8 V –100–ns Switching Time t fGHx 8 V to 1 V –100–ns DEAD Timet DEADI DEAD = 10 µA –3000–ns (Source OFF to Sink ON)I DEAD = 215 µA –180–nsContinued —NOTES: 1.Typical Data is for design information only.2.Negative current is defined as coming out of (sourcing) the specified device terminal.115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-50003933THREE-PHASE POWER MOSFET CONTROLLERELECTRICAL SPECIFICATIONS at T A = 25°C, V BB = V CCOUT = 12 V, C load = 0.001 µF, C boot = 0.047 µF (unless noted otherwise), continued.LimitsParameterSymbolConditions MinTypMaxUnitsBootstrap CapacitorBootstrap Charge Current I Cx 50100150mA Bootstrap Output Voltage V Cx Reference Sx9.510.511.5V Leakage CurrentI Cx High side switched high, Sx = V BB–1520µA Current LimitOffset Voltage V io –0±5.0mV Input bias current I SENSE ––-1.0µA RC Charge Current I RC 8509451040µA RC Voltage Threshold V RCL 1.0 1.1 1.2V V RCH 2.73.0 3.2V PWM frequency Rangef PWM Operating 20–100kHz Protection CircuitryUndervoltage Threshold UVLO Increasing V BB 9.710.210.7V Decreasing V BB 9.35–10.35V Boot-Strap Capacitor Volt.V CxSx V BB = 12 V 9.5––V High-Side Gate-Source Volt.V GHxSx – 6.3–V Fault Output VoltageV FAULT I O = 1 mA––0.8V Brake FunctionBrake Cap. Supply Current I BRKCAP V BB = 8 V, BRKSEL ≥ 2 V –30–µA Low-Side Gate VoltageV GLxHV BB = 0, BRKCAP = 8 V–6.6–VNOTES: 1.Typical Data is for design information only.2.Negative current is defined as coming out of (sourcing) the specified device terminal.3933THREE-PHASE POWER MOSFET CONTROLLERTerminalName1PGND 2RESET 3GLC 4SC 5GHC 6CC 7GLB 8SB 9GHB 10CB 11GLA 12SA 13GHA 14CA 15V CCOUT 16LCAP 17FAULT 18MODE 19V BB 20H121H322H223DIR 24BRAKE 25BRKCAP 26BRKSEL 27PWM 28RC 29SENSE 30REF 31DEAD 32AGNDRESET — A logic input used to enable the device, internally pulled up to V LCAP (+5 V). A logic HIGH will disable the device and force all gate drivers to 0 V, coasting the motor. A logic LOW allows the gate drive to follow commutation logic.This input overrides BRAKE.GLA/GLB/GLC — Low-side, gate-drive outputs for external NMOS drivers. External series-gate resistors (as close aspossible to the NMOS gate) can be used to control the slew rate seen at the power-driver gate, thereby controlling the di/dt and dv/dt of the SA/SB/SC outputs. Each output is designed and specified to drive a 1000 pF load with a rise time of 50 ns.SA/SB/SC — Directly connected to the motor, these terminals sense the voltages switched across the load. These terminals are also connected to the negative side of the bootstrap capaci-tors and are the negative supply connections for the floating high-side drive.GHA/GHB/GHC — High-side, gate-drive outputs for external NMOS drivers. External series-gate resistors (as close aspossible to the NMOS gate) can be used to control the slew rate seen at the power-driver gate, thereby controlling the di/dt and dv/dt of the SA/SB/SC outputs. Each output is designed and specified to drive a 1000 pF load with a rise time of 100 ns.CA/CB/CC — High-side connections for the bootstrap capaci-tors, positive supply for high-side gate drive. The bootstrap capacitor is charged to approximately V CCOUT when theassociated output SA/SB/SC terminal is low. When the output swings high, the voltage on this terminal rises with the output to provide the boosted gate voltage needed for n-channel power FETs.Terminal Descriptionscontinued next page115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-50003933THREE-PHASE POWER MOSFET CONTROLLERFAULT — Open-drain output to indicate fault condition; will go active high for any of the following:1 – invalid HALL input code,2 – high-side, gate-source voltage less than 7 V,3 – bootstrap capacitor not sufficiently charged, or4 – under-voltage condition detected at V CCOUT .The fault state for gate-source and bootstrap monitors are cleared at each commutation. If the motor has stalled, then the fault can only be cleared by toggling the RESET terminal or power-up sequence.MODE — A logic input to set current-decay method, internally pulled up to V LCAP (+5 V). When in slow-decay mode (logic HIGH), only the high-side FET is switched open during a PWM OFF cycle. The fast-decay mode (logic LOW) switches both the source and sink FETs.H1/H2/H3 — Hall-sensor inputs; internally pulled up to V LCAP (+5 V). Configured for 120° electrical spacing.DIR — A logic input to reverse rotation, see commutation logic table. Internally pulled up to V LCAP (+5 V).BRAKE — A logic input to short out the motor windings for a braking function. A logic HIGH will turn ON the low-side FETs, turn OFF the high-side FETs. Internally pulled up to V LCAP (+5 V). The braking torque applied will depend on the speed.BRKCAP — Connection for reservoir capacitor. This terminal is used to provide a positive power supply for the sink-drive outputs for a power-down condition. This will allow predict-able braking, if desired. A blocking diode to V CCOUT is re-quired. A 4.7 µF capacitor will provide 6.5 V gate drive for 300 ms. If a power-down braking option is not needed(BRKSEL = LOW) then this terminal should be tied to V CCOUT .BRKSEL — A logic input to enable/disable braking on power-down condition. Internally pulled up to V LCAP (+5 V). If held low, the motor will coast on a power-down condition.PWM — Speed control input, internally pulled up to V LCAP(+5 V). A logic LOW turns OFF all drivers, a logic HIGH will turn ON selected drivers as determined by H1/H2/H3 input logic. Holding the terminal high allows speed/torque control solely by the current-limit circuit via REF analog voltage command.RC — An analog input used to set the fixed off time with an external resistor (R T ) and capacitor (C T ). The t blank time is controlled by the value of the external capacitor (see Applica-tions Information). As a rule, the fixed off time should not be less than 10 µs. The resistor should be in the range of 10 k Ω to 100 k Ω.SENSE — An analog input to the current-limit comparator.A voltage representing load current appears on this terminal during ON time, when it reaches REF voltage, the comparator trips and load current decays for the fixed off-time interval.Voltage transients seen at this terminal when the drivers turn ON are ignored for time t blank .REF — An analog input to the current-limit comparator.Voltage applied here sets the peak load current.I peak = V REF /R S .V CCOUT — A regulated 12 V output; supply for low-side gate drive and bootstrap capacitor charge circuits. It is good practice to connect a decoupling capacitor from this terminal to AGND,as close to the device terminals as possible. The terminal should be shorted to V BB for 12 V applications.V BB — The A3933 supply voltage. It is good practice toconnect a decoupling capacitor from this terminal to AGND, as close to the device terminals as possible. This terminal should be shorted to V CCOUT for 12 V applications.LCAP — Connection for decoupling capacitor for the internal 5 V reference. This terminal can source no more than 2 mA.DEAD — An analog input. A resistor between DEAD and LCAP is selected to adjust turn-off to turn-on time. This delay is needed to prevent shoot-through in the external power FETs.The allowable resistor range is 20 k Ω to 430 k Ω, whichconverts to deadtime of 210 ns to 2.1 µs, using the following equation:t DEAD = (6.75 x 10-12 x R DEAD ) + (75 x 10-9).AGND — The low-level (analog) reference point for the A3933.PGND — The reference point for all low-side gate drivers.Terminal Descriptions (cont’d)3933 THREE-PHASE POWER MOSFET CONTROLLER Commutation Truth TableLogic Inputs Driver OutputsH1H2H3DIR GLA GLB GLC GHA GHB GHC SA SB SCH L H H L L H H L L H Z L H L L H L L H L H L Z H L H H L H H L L L H L L H Z L H L H H L L L L H L Z H L H H H L H L L L H Z L H L L H H L H L H L L H L Z H L H L H L L L L H L Z H H L L L L H L L L H Z L H H H L L L H L H L L H L Z L H L L L L H H L L H Z L L H H L L L H L H L Z H L L L H L H L L L H L L H ZInput LogicMODE PWM RESET Mode OperationL L L Fast decay PWM chop mode, current decayL H L Fast decay Peak current limit, selected drivers ONH L L Slow decay PWM chop mode. current decayH H L Slow decay Peak current limit, selected drivers ONX X H Coast All gate drive outputs OFF, clear fault logicBrake ControlBRAKE BRKSEL Normal Operation Under Voltage or Power Loss ConditionL L Normal run mode Coast, all gate drive outputs OFFL H Normal run mode Dynamic brake, all sink gate drives ONH L Dynamic brake, all sink gate drives ON Coast, all gate drive outputs OFFH H Dynamic brake, all sink gate drives ON Dynamic brake, all sink gate drives ONL = Low Level, H = High Level, X = Don’t Care, Z = High Impedance115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-50003933THREE-PHASE POWER MOSFET CONTROLLERApplications Informationbootstrap capacitor. When the bootstrap capacitor has been properly charged, the high side is turned back ON. The circuit will allow three faults of this type within one commutation cycle before signaling a fault and coast the motor (all gate outputs go low).2)Bootstrap Monitor. The bootstrap capacitor is charged whenever a sink-side MOSFET is ON, Sx output goes low, and the load current recirculates. This happens constantly during normal operation. A 60 µs timer is started at the beginning of this cycle and the capacitor is charged with typically 100 mA.The bootstrap capacitor voltage is clamped at approximately 87% of V CCOUT . If the capacitor is not charged to the clamp voltage in 60 µs, a fault is signaled and the motor will coast.3)Undervoltage. The internal V CCOUT regulator supplies the low-side gate driver and the bootstrap charge current. It is critical to ensure that the voltages are at a proper level before enabling any of the outputs. The undervoltage circuit is active during power up and will force a motor coast condition until V CCOUT is greater than approximately 10 V.4)Hall Invalid. Illegal codes for the HALL inputs (000 or 111) will force a fault and coast the motor.Faults are cleared at the beginning of each commutation. If a stalled motor results from a fault, the fault can only be cleared by toggling the RESET terminal or by a power-up sequence.Current Control. Internal fixed off-time PWM circuitry is implemented to limit load current to a desired value. The external sense resistor combined with the applied analog voltage to REF terminal will set the peak current level approximatelyI TRIP ≈ V REF /R S .After the peak level is reached, the sense comparator trips and the load current will decay for a fixed off time.An external resistor (R T ) and capacitor (C T ) are used to set the fixed off-time period (t off = R T x C T ). The t off should be in the range of 10 µs to 50 µs. Longer values for t off can result in audible noise problems.Torque control can be implemented by varying the REF input voltage as long as the PWM input stays high. If direct control of the torque/current is desired by PWM input, a voltage can be applied to the REF input to set an absolute maximum current limit.Bootstrap Capacitor Selection. The high-side bootstrap circuit operates on a charge-transfer principle. The gate charge (Q g ) specification of the external power MOSFET must betaken into consideration. The bootstrap capacitor must be large enough to turn on the MOSFET without losing significant gate voltage. If the bootstrap capacitor is too large, it would take too long to charge up during the off portion of the PWM cycle. The capacitor value must be selected with both of these constraints in mind.1)Minimum bootstrap capacitor value to transfer charge. The charge on the bootstrap capacitor should be 20x greater than the gate charge (Q g ) of the power MOSFET.Example: For Q g = 0.025 µC, selectC boot = 20 x Q g /10.5 V = 0.047 µF.Check for maximum V g drop at turn on: dq = C boot x dV g , where Q g = dq.dV g = dq/C boot = 0.025 µC/0.047 µF = 532 mV.2)Calculate minimum PWM “OFF” cycle with C boot = 0.047 µF.dt = r o x C boot x ln(0.036/[Q g /C boot + 0.036])where r o = 20 ohms, the equivalent internal series resistance of the bootstrap capacitor monitor circuit.The sink-side MOSFET will be held OFF for this minimum time such that the bootstrap capacitor can be recharged independently of the PWM input frequency.The above equation is valid for PWM cycles after the bootstrap capacitor has been charged once. For the first cycle after a motor phase commutates from Hi-Z to GHx ON, or during the first charging cycle at power-up, the circuit will ignore PWM signals until it has been charged.The time required to charge up at power up and at commutation change is approximately:t = C boot x 7 V/0.1 AProtection Circuitry. The A3933 will protect the external MOSFETs by shutting down the gate drive if any of the following conditions are detected:1)Gate Source Monitor (high side only). The voltage on the GHx terminals must stay 7 V higher than the source. If this voltage droops below the threshold, the high side turns OFF,and the low-side gate will turn ON in an attempt to recharge the3933 THREE-PHASE POWER MOSFET CONTROLLER Applications Information (cont’d)PWM Blank. The capacitor (C T) also serves as the means to set the blank time duration. After the off time expires, the selected gates are turned back ON. At this time, large current transients can occur during the reverse recovery time (t rr) of the intrinsic body diodes of the external MOSFETs. To prevent the current-sense comparator from thinking the current spikes are a real overcurrent event, the comparator is blanked:t blank = 1.9 x C T/(1 mA-2/R T)The user must ensure that C T is large enough to cover the current-spike duration.Load Current Recirculation. If MODE has been set for slow decay, the high-side (source) driver will turn OFF forcing the current to recirculate through the pair of sink MOSFETs. If MODE has been selected for fast decay, both the selected high-and low-side gates are turned OFF, which will force the current to recirculate through one sink MOSFET and the high-side clamp diode. Synchronous rectification (only on the low side) allows current to flow through the MOSFET, rather than the clamp diode, during the decay time. This will minimize power loss during the off period. It is important to take into account that, when switching, the intrinsic diodes will conduct during the adjustable deadtime.Braking. The A3933 will dynamically brake by forcing all sink-side MOSFETs ON. This will effectively short out the BEMF. During braking, the load current can be approximated by:I BRAKE = V BEMF/R LPower Loss Brake. The BRKCAP and BRKSEL terminals provide a power-down braking option. By applying a logic level to input BRKSEL, the system can control if the motor is dynamically braked or is allowed to coast during an undervoltage event. The reservoir capacitor on the BRKCAP terminal provides the power to hold the sink-side gates ON after supply voltage is lost. A logic high on BRKSEL will brake the motor, a logic low and it will coast.Layout. Careful consideration must be given to PCB layout when designing high-frequency, fast-switching, high-current circuits.1)The analog ground (AGND), the power ground (PGND), and the high-current return of the external MOSFETs (the negative side of the sense resistor) should return separately to the negative side of the motor supply filtering capacitor. This will minimize the effect of switching noise on the device logic and analog reference.2)Minimize stray inductances by using short, wide copper runs at the drain and source terminals of all power MOSFETs. This includes motor lead connections, the input power buss, and the common source of the low-side power MOSFETs. This will minimize voltages induced by fast switching of large load currents.3)Kelvin connect the SENSE terminal PC trace to the positive side of the sense resistor.115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-50003933THREE-PHASE POWER MOSFET CONTROLLERDimensions in Inches(controlling dimensions)Dwg. MA-006-32 in5NOTES: 1. Lead spacing tolerance is non-cumulative.2. Exact body and lead configuration at vendor’s option within limits shown3933THREE-PHASE POWER MOSFET CONTROLLERDimensions in Millimeters(for reference only)Dwg. MA-006-32 mm5201413NOTES: 1. Lead spacing tolerance is non-cumulative.2. Exact body and lead configuration at vendor’s option within limits shownThe products described here are manufactured under one or more U.S.patents or U.S. patents pending.Allegro MicroSystems, Inc. reserves the right to make, from time totime, such departures from the detail specifications as may be required topermit improvements in the performance, reliability, or manufacturabilityof its products. Before placing an order, the user is cautioned to verify thatthe information being relied upon is current.Allegro products are not authorized for use as critical components inlife-support devices or systems without express written approval.The information included herein is believed to be accurate and reliable.However, Allegro MicroSystems, Inc. assumes no responsibility for its use;nor for any infringement of patents or other rights of third parties whichmay result from its use.115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-********THREE-PHASE POWER MOSFET CONTROLLERMOTOR DRIVERS FunctionOutput Ratings*Part Number †INTEGRATED CIRCUITS FOR BRUSHLESS DC MOTORS3-Phase Power MOSFET Controller —28 V 39333-Phase Power MOSFET Controller —50 V 39323-Phase Power MOSFET Controller —50 V 76002-Phase Hall-Effect Sensor/Driver 400 mA 26 V 3626Bidirectional 3-Phase Back-EMF Controller/Driver ±600 mA 14 V 89062-Phase Hall-Effect Sensor/Driver 900 mA 14 V 36253-Phase Back-EMF Controller/Driver ±900 mA 14 V 8902–A3-Phase Controller/Drivers ±2.0 A 45 V 2936 & 2936-120INTEGRATED BRIDGE DRIVERS FOR DC AND BIPOLAR STEPPER MOTORSDual Full Bridge with Protection & Diagnostics ±500 mA 30 V 3976PWM Current-Controlled Dual Full Bridge ±650 mA 30 V 3966PWM Current-Controlled Dual Full Bridge ±650 mA 30 V 3968PWM Current-Controlled Dual Full Bridge ±750 mA 45 V 2916PWM Current-Controlled Dual Full Bridge ±750 mA 45 V 2919PWM Current-Controlled Dual Full Bridge ±750 mA 45 V 6219PWM Current-Controlled Dual Full Bridge ±800 mA 33 V 3964PWM Current-Controlled Full Bridge ±1.3 A 50 V 3953PWM Current-Controlled Dual Full Bridge ±1.5 A 45 V 2917PWM Current-Controlled Dual Full Bridge ±1.5 A 45 V 2918PWM Current-Controlled Microstepping Full Bridge ±1.5 A 50 V 3955PWM Current-Controlled Microstepping Full Bridge ±1.5 A 50 V 3957PWM Current-Controlled Dual DMOS Full Bridge ±1.5 A 50 V 3972Dual Full-Bridge Driver ±2.0 A 50 V 2998PWM Current-Controlled Full Bridge ±2.0 A 50 V 3952DMOS Full Bridge PWM Driver ±2.0 A 50 V 3958Dual DMOS Full Bridge ±2.5 A 50 V 3971UNIPOLAR STEPPER MOTOR & OTHER DRIVERSVoice-Coil Motor Driver ±500 mA 6 V 8932–A Voice-Coil Motor Driver ±800 mA 16 V 8958Unipolar Stepper-Motor Quad Drivers 1 A 46 V 7024 & 7029Unipolar Microstepper-Motor Quad Driver 1.2 A 46 V 7042Unipolar Stepper-Motor Translator/Driver 1.25 A 50 V 5804Unipolar Stepper-Motor Quad Driver 1.8 A 50 V 2540Unipolar Stepper-Motor Quad Driver 1.8 A 50 V 2544Unipolar Stepper-Motor Quad Driver 3 A 46 V 7026Unipolar Microstepper-Motor Quad Driver 3 A 46 V 7044*Current is maximum specified test condition, voltage is maximum rating. See specification for sustaining voltage limits or over-current protection voltage limits. Negative current is defined as coming out of (sourcing) the output.†Complete part number includes additional characters to indicate operating temperature range and package style.Also, see 3175, 3177, 3235, and 3275 Hall-effect sensors for use with brushless dc motors.。

AD5933工作原理

AD5933工作原理AD5933是一款频率扫描阻抗测量系统，具有精确测量复杂阻抗的能力。

它是一款高性能的网络阻抗测量芯片，采用了混频器和锁相放大器的结构设计，在测量过程中，通过改变扫频信号的频率，可以快速获取待测物体的阻抗信息。

下面将详细介绍AD5933的工作原理。

首先，频率扫描部分。

AD5933通过产生一个连续的频率扫描信号来扫描待测物体的阻抗。

频率扫描信号是一个由数字控制的电流源产生的正弦波信号，其频率可以根据应用需求进行设置。

频率扫描信号经过一个可编程增益放大器进行放大，并进一步送入到待测物体中。

其次，信号处理部分。

AD5933采用了混频器和锁相放大器的技术来处理待测物体上的反射信号。

当频率扫描信号经过待测物体后，待测物体会发生阻抗变化导致信号的反射。

AD5933通过混频器将反射信号与参考信号进行混频，产生直流分量。

混频后的信号经过一个低通滤波器进行滤波，得到待测物体的实部和虚部。

最后，数据输出部分。

AD5933将经过信号处理后的实部和虚部输出到外部的微处理器或者计算机进行进一步处理。

这些数据可以用于计算待测物体的阻抗模数、相位、电阻、电感和电容等相关参数。

除了基本的工作原理外，AD5933还具有一些特殊的功能。

首先，它采用了对数放大器来提高动态范围和测量精度。

对数放大器可以将阻抗范围扩展到几个数量级，使得AD5933能够测量低阻抗和高阻抗的物体。

其次，AD5933还具有自动增益控制（AGC）功能，可以自动调整放大器的增益，以适应不同的测量环境。

此外，AD5933还支持外部参考电压输入和外部时钟输入，以满足特殊应用需求。

综上所述，AD5933是一款高性能的频率扫描阻抗测量系统。

它通过改变扫频信号的频率来获取待测物体的阻抗信息，并通过混频器和锁相放大器的结构设计实现了精确的测量。

AD5933具有广泛的应用领域，例如生物医学、材料科学、化学工程等。

它的工作原理简单明了，操作方便，能够提供准确可靠的测量结果。

MAX1239MEEE中文资料

AD5933应用

阻抗测量芯片AD5933原理及其应用时间：2010-03-04 23:48:25 来源：作者：1 AD5933芯片概述1.1 主要性能AD5933是一款高精度的阻抗测量芯片，内部集成了带有12位，采样率高达1MSPS的AD转换器的频率发生器。

这个频率发生器可以产生特定的频率来激励外部电阻，电阻上得到的响应信号被ADC采样，并通过片上的DSP进行离散的傅立叶变换。

傅立叶变换后返回在这个输出频率下得到的实部值R和虚部值I。

这样就可以很容易的计算出在每个扫描频率下的傅立叶变换的模和电阻的相角。

其中模＝，相角＝。

AD5933主要具有以下特性：λ可编程的频率发生器，最高频率可达100KHzλ作为设备通过口和主机通讯，实现频率扫面控制λ频率分辨率为27位（<0.1Hz）λ阻抗测量范围为100Ω到10MΩλ内部带有温度传感器，测量误差范围为±2℃λ带有内部时钟λ可以实现相位测量λ系统精度为0.5%λ可供选择的电源范围为2.7V到5Vλ正常工作的温度范围-40℃到+125℃λ 16脚SSOP封装1.2 AD5933的引脚定义图1给出了AD5933的封装图，表1给出了AD5933的引脚定义。

建议在使用时把所有的电源脚9、10、11都连到一起，统一连接到电源上，同样所有的地引脚12、13、14也都连接到一起，统一连接到系统地上图1 AD5933引脚排列表1 AD5933引脚定义1.3 主要应用AD5933可以广泛的应用在电化学分析、生物电极阻抗测量、阻抗谱分析、复杂阻抗测量、腐蚀监视和仪器保护、生物医学和自动控制传感器、无创检测、原材料性能分析以及燃料和电池状态监测等众多领域。

为阻抗的测量提供了很大的方便，单片集成技术大大的减小了仪器的体积，使得仪器使用更加方便。

简单的I2C通讯方式，方便用户操作，减小了用户编程的困难。

由于它给出的直接是变换后阻抗的实部和虚部数据，大大的简化了用户编程过程，节省了开发时间。

1SMA5918BT3G中文资料

1SMA5913BT3 Series1.5 Watt PlasticSurface MountZener Voltage RegulatorsThis complete new line of 1.5 Watt Zener Diodes offers the following advantages.Features•Standard Zener Breakdown V oltage Range − 3.3 V to 68 V •ESD Rating of Class 3 (>16 kV) per Human Body Model •Flat Handling Surface for Accurate Placement •Package Design for Top Slide or Bottom Circuit Board Mounting •Low Profile Package•Ideal Replacement for MELF Packages•Pb−Free Packages are AvailableMechanical Characteristics:CASE:V oid-free, transfer-molded plasticFINISH:All external surfaces are corrosion resistant with readily solderable leadsMAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES: 260°C for 10 secondsPOLARITY:Cathode indicated by molded polarity notch or cathode bandFLAMMABILITY RATING:UL 94 V−0 @ 0.125 inMAXIMUM RATINGSRating Symbol Value UnitDC Power Dissipation @ T L = 75°C, Measured Zero Lead Length (Note 1) Derate above 75°CThermal Resistance, Junction−to−LeadP DR q JL1.52050WmW/°C°C/WDC Power Dissipation @ T A = 25°C (Note 2) Derate above 25°CThermal Resistance, Junction−to−AmbientP DR q JA0.54.0250WmW/°C°C/WOperating and Storage Temperature Range T J, T stg−65 to+150°CStresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.1. 1 in square copper pad, FR−4 board.2.FR−4 Board, using ON Semiconductor minimum recommended footprint.Device Package Shipping†ORDERING INFORMATION1SMA59xxBT3SMA5000/Tape & Reel1SMA59xxBT3G SMA(Pb−Free)5000/Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our T ape and Reel Packaging Specifications Brochure, BRD8011/D.See specific marking information in the device marking column of the Electrical Characteristics table on page 2 of this data sheet.DEVICE MARKING INFORMATIONELECTRICAL CHARACTERISTICS (T A = 25°C unlessotherwise noted, V F = 1.5 V Max. @ I F = 200 mA for all types)Symbol ParameterV Z Reverse Zener Voltage @ I ZT I ZT Reverse CurrentZ ZT Maximum Zener Impedance @ I ZT I ZK Reverse CurrentZ ZK Maximum Zener Impedance @ I ZK I R Reverse Leakage Current @ V R V R Reverse Voltage I F Forward Current V F Forward Voltage @ I F I ZMMaximum DC Zener CurrentELECTRICAL CHARACTERISTICS (T A = 25°C unless otherwise noted, V F = 1.5 V Max. @ I F = 200 mA for all types)Device* (Note 3)Device Marking Zener Voltage (Note 4)Zener Impedance Leakage CurrentI ZM V Z (Volts)@ I ZT Z ZT @ I ZTZ ZK @ I ZK I R @ V R Min Nom Max mA W W mA m A Volts mA(dc)1SMA5913BT3, G 813B 3.13 3.3 3.47113.610500 1.050 1.04551SMA5914BT3, G 814B 3.42 3.6 3.78104.29.0500 1.035.5 1.04171SMA5915BT3, G 815B 3.70 3.9 4.1096.17.5500 1.012.5 1.03851SMA5916BT3, G 816B 4.08 4.3 4.5287.2 6.0500 1.0 2.5 1.03491SMA5917BT3, G 817B 4.46 4.7 4.9479.8 5.0500 1.0 2.5 1.53191SMA5918BT3, G 818B 4.84 5.1 5.3673.5 4.0350 1.0 2.5 2.02941SMA5919BT3, G 819B 5.32 5.6 5.8866.9 2.0250 1.0 2.5 3.02681SMA5920BT3, G 820B 5.89 6.2 6.5160.5 2.0200 1.0 2.5 4.02421SMA5921BT3, G 821B 6.46 6.87.1455.1 2.5200 1.0 2.5 5.22211SMA5922BT3, G 822B 7.127.57.8850 3.04000.5 2.5 6.02001SMA5923BT3, G 823B 7.798.28.6145.7 3.54000.5 2.5 6.51831SMA5924BT3, G 824B 8.649.19.5641.2 4.05000.5 2.57.01651SMA5925BT3, G 825B 9.51010.537.5 4.55000.25 2.58.01501SMA5926BT3, G 826B 10.451111.5534.1 5.55500.250.58.41361SMA5927BT3, G 827B 11.41212.631.2 6.55500.250.59.11251SMA5928BT3, G 828B 12.351313.6528.87.05500.250.59.91151SMA5929BT3, G 829B 14.251515.75259.06000.250.511.41001SMA5930BT3, G 830B 15.21616.823.4106000.250.512.2941SMA5931BT3, G 831B 17.11818.920.8126500.250.513.7831SMA5932BT3, G 832B 19202118.7146500.250.515.2751SMA5933BT3, G 833B 20.92223.11717.56500.250.516.7681SMA5934BT3, G 834B 22.82425.215.6197000.250.518.2631SMA5935BT3, G 835B 25.652728.3513.9237000.250.520.6561SMA5936BT3, G 836B 28.53031.512.5267500.250.522.8501SMA5937BT3, G 837B 31.353334.6511.4338000.250.525.1451SMA5938BT3, G 838B 34.23637.810.4388500.250.527.4421SMA5939BT3, G 839B 37.053940.959.6459000.250.529.7381SMA5940BT3, G840B40.854345.158.7539500.250.532.7351SMA5941BT3, G 841B 44.654749.358.06710000.250.535.8321SMA5942BT3, G 842B 48.455153.557.37011000.250.538.8291SMA5943BT3, G 843B 53.25658.8 6.78613000.250.542.6271SMA5944BT3, G 844B 58.96265.1 6.010015000.250.547.1241SMA5945BT3, G 845B 64.66871.4 5.512017000.250.551.7223.Tolerance and Voltage Regulation Designation − The type number listed indicates a tolerance of ±5%.4.V Z limits are to be guaranteed at thermal equilibrium.*The “G” suffix indicates Pb−Free package available.Figure 1. Steady State Power DeratingFigure 2. V Z − 3.3 thru 10 VoltsT, TEMPERATURE (°C)Figure 3. V Z = 12 thru 68 VoltsP D , M A X I M U MP O W E R D I S S I P A T I O N (W A T T S )I Z , Z E N E R C U R R E N T (m A )Z Z , D Y N A M I C I M P ED A N CE (O H M S )1002468101010.1V Z , ZENER VOLTAGE (VOLTS)1001010.1010203040V Z , ZENER VOLTAGE (VOLTS)V Z , ZENER VOLTAGE (VOLTS)1001050Figure 4. Zener Voltage − 3.3 to 12 VoltsFigure 5. Zener Voltage − 12 to 68 Volts Figure 6. Effect of Zener VoltageI Z , Z E N E R C U R R E N T (m A )6070801086420−2−4V Z , ZENER VOLTAGE (VOLTS), T E M P E R A T U R E C O E F F I C I E N T (m V / C )°θV Z 10070503020101020305070100V Z , ZENER VOLTAGE (VOLTS), T E M P E R A T U R E C O E F F I C I E N T (m V / C )°θV ZPACKAGE DIMENSIONSSMACASE 403D−02ISSUE Cǒmm inchesǓSCALE 8:1*For additional information on our Pb−Free strategy and solderingdetails, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOLDERING FOOTPRINT*DIM A MIN NOM MAX MINMILLIMETERS1.912.16 2.410.075INCHES A10.050.100.150.002b 1.27 1.45 1.630.050c 0.150.280.410.006D 2.29 2.60 2.920.090E 4.06 4.32 4.570.160L0.761.14 1.520.0300.0850.0950.0040.0060.0570.0640.0110.0160.1030.1150.1700.1800.0450.060NOM MAX 4.83 5.21 5.590.1900.2050.220H E STYLE 1:PIN 1.CATHODE (POLARITY BAND)2.ANODENOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: INCH.3.403D−01 OBSOLETE, NEW STANDARD IS 403D−02.ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。

MAX691AEWE中文资料

ELECTRICAL CHARACTERISTICS
(MAX691A, MAX800L: VCC = +4.75V to +5.5V, MAX693A, MAX800M: VCC = +4.5V to +5.5V, VBATT = 2.8V, TA = TMIN to TMAX, unless otherwise noted.)
BATT ON 5 LOW LINE 6
OSC IN 7 OSC SEL 8
MAX691A MAX693A MAX800L MAX800M
16 RESET 15 RESET 14 WDO 13 CE IN 12 CE OUT 11 WDI 10 PFO 9 PFI
DIP/SO
SuperCap is a registered trademark of Baknor Industries. MaxCap is a registered trademark of The Carborundum Corp.
元器件交易网
19-0094; Rev 7a; 12/96
Microprocessor Supervisory Circuits
MAX691A/MAX693A/MAX800L/MAX800M
_______________General Description
The MAX691A/MAX693A/MAX800L/MAX800M microprocessor (µP) supervisory circuits are pin-compatible upgrades to the MAX691, MAX693, and MAX695. They improve performance with 30µA supply current, 200ms typ reset active delay on power-up, and 6ns chipenable propagation delay. Features include write protection of CMOS RAM or EEPROM, separate watchdog outputs, backup-battery switchover, and a RESET output that is valid with VCC down to 1V. The MAX691A/ MAX800L have a 4.65V typical reset-threshold voltage, and the MAX693A/MAX800M’s reset threshold is 4.4V typical. The MAX800L/MAX800M guarantee power-fail accuracies to ±2%.

MAX832CWE中文资料

STEP-DOWN CONVER________________________________________________________________ Maxim Integrated Products
1
Call toll free 1-800-998-8800 for free samples or literature.
元器件交易网
5V/3.3V/3V/Adjustable-Output, 1A, Step-Down, PWM, Switch-Mode DC-DC Regulators MAX830–MAX833
ABSOLUTE MAXIMUM RATINGS
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V Switch Voltage with Respect to Input Voltage. . . . . . . . . . . . . . . . 50V Switch Voltage with Respect to GND (VSW negative) (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V FB/SENSE Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V, +10V SHUT Voltage (not to exceed VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V Note 1: Do not exceed switch-to-input voltage limitation.

AD5933阻抗测量芯片原理及其应用

AD5933阻抗测量芯片原理及其应用AD5933芯片的工作原理基于频率扫描技术。

频率扫描技术的基本原理是通过改变信号的频率，从而改变信号在被测物体中的传播速度和吸收程度，进而得到被测物体的阻抗数值。

AD5933芯片内部集成了数字锁相放大器、频率合成器和模数转换器等电路，可以实现频率扫描功能。

在生物医学领域，AD5933芯片能够用于测量生物体的阻抗，实现生物电阻抗成像。

生物电阻抗成像是一种无创且实时的成像技术，可以用于观察和分析生物体组织中的电阻抗分布情况，从而提供有关组织状态和功能的信息。

AD5933芯片可以通过扫描不同频率的信号，测量生物体不同部位的阻抗，并将测量结果反馈给计算机进行处理。

这种成像技术在医学诊断、医疗监测和健康评估等方面具有重要的应用价值。

在电化学领域，AD5933芯片可以用于电化学阻抗谱的测量。

电化学阻抗谱是通过测量电化学系统在不同频率下的电流响应来得到的，可以提供关于电化学体系性质和界面特性的信息。

AD5933芯片的高精度和稳定性使其能够准确地测量电化学体系的阻抗，并通过计算得到电化学参数。

这对于电化学传感器、电化学储能器件等的研究和开发具有重要意义。

在控制系统领域，AD5933芯片可以用于多变量控制系统、自适应控制系统和非线性控制系统的阻抗测量。

阻抗测量可以提供控制系统所需的关键参数，如体系动态特性和输入输出关系，从而实现对复杂控制系统的精确分析和设计。

AD5933芯片的高精度和快速响应能力使其适用于工业控制系统、航空航天控制系统等领域。

总之，AD5933阻抗测量芯片通过频率扫描技术实现了对复阻抗的高精度测量，广泛应用于生物医学、电化学和控制系统等领域。

它为这些领域的研究、诊断和控制提供了重要的技术支持，具有广阔的应用前景。

AD5933(中文版)

ADI Ӳ Ӳ ǈ ǈADI փ ă ǈ ADI Ӳ ă1 MSPS Ă12AD5933Rev. BInformation furnished by Analog Devices is believed to be accurate and reliable. However , no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. T rademarks and registered trademarks are the property of their respective owners.One Technology Way, P.O. Box 9106, N orwood, MA 02062-9106, U.S.A.Tel: 781.329.4700 Fax: 781.461.3113 ©2005–2010 Analog Devices, Inc. All rights reserved.05 1Պ ǈ 100 kHz Պ I2C Ր ǖ27 (<0.1 Hz) ǖ1 kΩ 10 MΩ100 Ω 1 kΩ և (±2°C) և ǖ0.5%ǖ2.7 V 5.5 V ǖ−40°C +125°C 16 SSOPԍ Ԣ/AD5933 ӄǈ 12 Ă1 MSPS (ADC)ă և ǈ և ADC ǈ DSP Վ (DFT) ăDFT և(R) և(I) ăǈ ă և և ǈ I2C ăADI AD5934ǈ 2.7 V 5.5 V Ă250 kSPS Ă12 ǈ ǈժ 16 SSOP ăAD5933Rev. B | Page 2 of 44................................................................................................... 1 ................................................................................................... 1 ................................................................................................... 1 ........................................................................................... 1 ........................................................................................... 3 ........................................................................................... 4!I 2C ........................................................... 6 ............................................................................. 7!ESD (7)..................................................................... 8 .................................................................................. 9 ................................................................................................. 12 ........................................................................................ 13! .................................................................................... 14! .............................................................. 15! .................................................................................... 15!DFT ................................................................................ 15! ................................................................................ 16! ............................................................................ 16! ....................................................................... 16! ....................................................................... 16! ....................................................................... 16 . (17)! ................................................................................ 17! ....................................................................... 17! ............................................. 17! Վ ...................................................... 17! ................................................................................ 18! .............................................................. 18! .............................................................. 18! .............................................................. 18! Վ .......................................................... 19! ................................................................................ 19! (21)................................................................................ 23 . (24)! ( 0x 80Ă 0x81) (24)!( 0x82Ă 0x83Ă 0x84) .................................................................. 25! ( 0x85Ă 0x86Ă 0x87) .................................................................. 26! ( 0x88Ă 0x89) ........................................................................................ 26! ( 0x8A Ă 0x8B) ....................................................................................... 26! ( 0x8F) .......................................... 27! (16 — 0x92Ă 0x93) ........................................................................................ 27!(16 — 0x94Ă 0x95Ă 0x96Ă 0x97) .............. 27 .. (28)! I 2C .......................................................................... 28! AD5933 .......................................................................... 29! .................................................................................... 29! .................................................................................... 30 . (31)! ............................................................................ 31! ǖ ........................................ 33! / ............................................................. 33! ................................................................... 34 AD5933 ................................................ 35ք .................................................................................... 36! ................................................................... 36 ӱ (37)! ӱ ............................................................................ 37! ....................................................................... 37! (XO) և .......................................................... 37! .................................................................................... 38! ................................................................................ 42 . (43)! (43)AD5933Rev. B | Page 3 of 442010 2 — ӲA ӲB “ ”և .............................................................................. 12008 5 — Ӳ0 ӲA ք .................................................................................... 1 ............................................................................................. 1 ՗1 ............................................................................................. 4 17 ......................................................................................... 13 “ ”և ................................................................... 13 19 .. (14)24 ......................................................................................... 18 “ ”և ................................................................... 19 “ ”և ........................................................... 21 “ ”և ................................................................... 24 “ ”և ............................................................... 31 ՗18 ......................................................................................... 35 “ ӱ”և ........................................................................ 37 “ ”և ................................................................... 432005 9 — Ӳ0ǖ ӲAD5933Rev. B | Page 4 of 44՗1Y 1 /1 K10 MΩ100 Ω 1 kΩ ǈ և0.5 % 2 V ǈ30 kHz ǈ200 kΩ5 630 ppm/°C21100 kHzՐ 0.1 Hz DDS 0.1 Hz Ր MCLK16.776 MHz և 316.776 MHz ևև 30 ppm/°C141.98 V p-p ք 451.48 V Ǘ5200 Ω T A = 25°C VOUT ±5.8 mA T A = 25°C 24 0.97 V p-p 650.76 V Ǘ72.4 kΩ VOUT ±0.25 mA 340.383 V p-p 8 50.31 V Ǘ91 kΩ VOUT ±0.20 mA 440.198 V p-p 1050.173 V Ǘ11600 Ω VOUT ±0.15 mA Բ60 dB հ −52 dB (0 MHz 1 MHz)−56 dB (±5 kHz)−85 dBǈVDD = 3.3 V ǈMCLK = 16.776 MHz ǈ2 V ǈ30 kHz ǈ200 kΩ 5 6 ǈ 200 kΩ 4 5 ǈPGA = ×1ăAD5933Rev. B | Page 5 of 44Y 1/1 nA VIN 60.01 pF VIN GND (C FB ) 3 pF Ǘժ6Ր 12250 kSPS ADC±2.0 °C −40°C +125°C Ր0.03 °C800(V IH )0.7 × VDD(V IL )0.3 × VDD 7 1 μA T A = 25°C 7 pF T A = 25°CVDD2.7 5.5 VIDD( )10 15 mA VDD = 3.3 V 17 25 mA VDD = 5.5 VIDD( )11 mA VDD = 3.3 V Ǘ( 0X80Ă 0X81)և16 mA VDD = 5.5 V IDD( )0.7 5 μA VDD = 3.3 V 1 8 μA VDD = 5.5 V1 Y −40°C +125°C ǈ 25°C ă2AD5933 ǈ ă3փ և ք ǈ 14Ă 15 16ă4Բ ǈ ǖ(V p-p) = [2/3.3] × VDDVDD ՗ ă 5Բ ǈ ǖ (V) = [2/3.3] × VDD VDD ՗ ă6՗ ԍ ǈ ăVOUT ă78Ă 15 16 ăAD5933Rev. B | Page 6 of 44I 2CǈVDD = 2.7 V 5.5 V ǈ T MIN T MAX ă1՗22T MIN ĂT MAXf SCL 400 kHz ǈ SCL t 1 2.5 μs ǈ SCLt 2 0.6 μs ǈ t HIGH ǈSCL t 3 1.3 μs ǈ t LOW ǈSCLt 4 0.6 μs ǈ t HD, STA ǈ / ԍ t 5 100 μs ǈ t SU, DAT ǈ t 63 0.9 μs ǈt HD, DAT ǈ ԍ 0 μs ǈt HD, DAT ǈ ԍ t 7 0.6 μs ǈ t SU, STA ǈ t 8 0.6 μs ǈ t SU, STO ǈt 9 1.3 μs ǈ t BUF ǈ t 10 300 nsǈt F ǈ SDA0 ns ǈt R ǈ (CMOS )SCL SDA t 11 300 ns ǈt F ǈ SCL SDA0 ns ǈ t F ǈ (CMOS )SDA 250 ns ǈ t F ǈ SDA20 + 0.1 C b 4 ns ǈt F ǈ SCL SDA C b 400 pF ǈ1 2ă2՗ ԍ ǈ ă3SDA ( SCL V IH MIN ) SCL ǈ Ղ 300 ns ԍ ă4C b ( ǖpF)ă ǈt R t F 0.3 VDD 0.7 VDD ăSCLSDA05324-002START CONDITIONREPEATED START CONDITIONSTOP CONDITION2. I 2CAD5933Rev. B | Page 7 of 44ǈT A = 25°C ă՗3DVDD GND −0.3 V +7.0 V AVDD1 GND −0.3 V +7.0 VAVDD2 GND −0.3 V +7.0 VSDA/SCL GND −0.3 V VDD + 0.3 VVOUT GND −0.3 V VDD + 0.3 VVIN GND −0.3 V VDD + 0.3 VMCLK GND −0.3 V VDD + 0.3 V(Y )−40°C +125°C−65°C +160°C 150°C SSOP ǈθJA 139°C/W θJC W /C °631 ( )! 260°C 10 40ESDǈă ǈփ՗ Ԩ և ǈ ăăESD( ) ă ӱ ă Ԩ ԍ ǈ ESD ǈ ă ǈESD ǈ Ն ăAD5933Rev. B | Page 8 of 44NCNC NC RFB VOUT NC MCLK NC = NO CONNECT05324-003IT IS RECOMMENDED TO TIE ALL SUPPLY CONNECTIONS (PIN 9, PIN 10,AND PIN 11)AND RUN FROM A SINGLE SUPPLY BETWEEN 2.7V AND 5.5V. IT IS ALSO RECOMMENDED TO CONNECT ALL GROUND SIGNALS TOGETHER (PIN 12, PIN 13,AND PIN 14).NOTES:1.3.՗4.Պ 1, 2, 3, 7 NC փ ă4 RFB և ă 45 ǈă5 VIN ă VDD/2 ă6 VOUT ă8 MCL Kă9 DVDD ă10 AVDD1 1ă11 AVDD2 2ă12 DGND ă13 AGND1 1ă14 AGND2 2ă15 SDA I 2C ă ǈ 10 kΩ VDD ă16 SCL I 2C ă ǈ 10 kΩ VDD ăAD5933Rev. B | Page 9 of 44350N U M B E R O F D E V I C E S30252015105 2.06VOLTAGE (V)1.921.94 1.96 1.982.00 2.022.0405324-0040.680.86VOLTAGE (V)0.700.720.740.760.780.800.820.84300N U M B E R O F D E V I C E S25201510505324-0074. 1 քǈVDD = 3.3 V7. 2 քǈVDD = 3.3 V1.30 1.75VOLTAGE (V)1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.700N U M B E R O F D E V I C E S3025201510505324-0053000.3700.400VOLTAGE (V)N U M B E R O F D E VI C E S2520151050.3750.3800.3850.3900.39505324-0085. 1 քǈVDD = 3.3 V8. 3 քǈVDD = 3.3 V300N U M B E R O F D E V I C ES252015105VOLTAGE (V)0.950.960.970.980.99 1.00 1.01 1.0205324-0060.2900.320VOLTAGE (V)0.2950.3000.3050.3100.315300N U M B E R O F D E V I C E S25201510505324-0096. 2 քǈVDD = 3.3 V9. 3 քǈVDD = 3.3 VAD5933Rev. B | Page 10 of 44VOLTAGE (V)0.1920.1940.1960.1980.2000.2020.2040.206300N U M B E R O F D E V I C E S25201510505324-01010. 4 քǈVDD = 3.3 V0.1600.205VOLTAGE (V)0.1650.1700.1750.1800.1850.1900.1950.20030N U M B E R O F D E V I C E S25201510505324-01111. 4 քǈVDD = 3.3 V15.810.8018MCLK FREQUENCY (MHz)I D D (m A )15.314.814.313.813.312.812.311.811.324681012141605324-01212. MCLK–1.00400PHASE (Degrees)P H A S E E R R O R (D e g r e e s )–0.2–0.4–0.6–0.85010015020025030035005324-01313.16.416.616.817.017.2OSCILLATOR FREQUENCY (MHz)C O U N T05324-0142468101216.416.616.817.017.2OSCILLATOR FREQUENCY (MHz)C O U N T05324-0162468101214. −40°C և ք16. 125°C և ք160246810121416.416.616.817.017.2OSCILLATOR FREQUENCY (MHz)C O U N T05324-01515. 25°C և ք2.7 V 5.5 V ǈAD5933 ǈ 0.5%ă(SFDR)DDS փ Ք ǈ հ հ ă Ք հ ă SFDR 0 Hz հ հ Բă SFDR ±200 kHz հ հ ă Բ(SNR)SNR հ Բǈ Ԟ(dB)՗ ăհ (THD)THD հ հ Բ ǈ V1 հ ǈV2ĂV3ĂV4ĂV5 V6 հ ă AD5933ǈTHDV12V3V4V V6VTHD25)Bd(02g o l+2+222+=5324-1717.FREQUENCYIMPEDANCE5324-1818.՗5. 3.3 V1 1.98 V p-p 1.48 V2 0.97 V p-p 0.76 V3 383 mV p-p 0.31 V4 198 mV p-p 0.173 VAD5933 ӄǈ12 Ă1 MSPS ADCăև ǈ և ADCǈ DSP DFT ăDFTև(R) և(I)ă ǖ! =! = tan−1(I/R)՗ Z(ω)ǈ ǈ18 ă22IR+AD5933 Ă Րă ǈ Պհ ǈ VOUTVIN և ă՗5 3.3 Vă VDD Բ ă ǈ5 V ǖ1 = 1.98 × =3V p-p1 = 1.48 × =2.24V p-p3.30.53.30.5DDS ǈSub-Hz Ր ăǈ ǈ ăDDSMCLK և ǈև ăDDS D3( և 0x81)ăVOUT05324-01919.19 ǈAD5933 Ԉ 27 DDS ǈ ă ( 0x82Ă 0x83 0x84)ă 27 Ր ǈ (MSB) և 0ǈ ǈ 24 Պ ăAD5933 0.1 Hz Պ Ր ăՊ 24 I 2C ăǖ Ă ă24 ǈՊ RAM 0x82Ă 0x83 0x84( և )ă DDS ǈ 1 ă !=(1) ǈ 30 kHz ǈժ 16 MHz MCLK ǈ Պ ǖ!= 0x0F5C28 0x0F Պ 0x82ǈ 0x5C Պ 0x83ǈ 0x28 Պ 0x84ă24 ǈՊ RAM 0x85Ă 0x86 0x87( և )ă DDS ǈ 2 ă !=!!!!!! (2) ǈ Ր 10 Hz ǈժ 16 MHzMCLK ǈ Պ ǖ!= 0x00014F 0x00 Պ 0x85ǈ 0x01 Պ 0x86ǈ 0x4F Պ 0x87ă9 ǈ՗ ă Պ RAM 0x88 0x89( և )ă Պ 511ăǈ 150 ǈ 0x00 Պ 0x88ǈ 0x96 Պ 0x89ăՊ ǈ ( 0x80 0x81ǈ և ) ă ( 0x8F) D2 ă ă ǖ0x94Ă0x95( և ) 0x96Ă0x97( և )Ǘ ă ǈ ă ǈ ă ǈ D3 1ǈ՗ ă 1ǈ օ ă2724×⎟⎟⎟⎟⎠⎞⎜⎜⎜⎜⎝⎛⎟⎠⎞⎜⎝⎛MCLK ≡⎟⎟⎟⎟⎠⎞⎜⎜⎜⎜⎝⎛⎟⎠⎞⎜⎝⎛16MHz 10Hz ≡×⎟⎟⎟⎟⎠⎞⎜⎜⎜⎜⎝⎛⎟⎠⎞⎜⎝⎛272416MHz 30kHz 2724×⎟⎟⎟⎟⎠⎞⎜⎜⎜⎜⎝⎛⎟⎠⎞⎜⎝⎛MCLK05324-02020.!ǈՂ Ӏ ǖ1. ă ǈՂ( 0x80 0x81) ǈ ă ǈVOUT VIN փ ă2. ă ӯ ǈ Qă ǈ ǈ ă !ǈ ă ǈ Պ ǈ փ ă ǈ ǈ ă3. ăǈADC ă ǈ ( )Պ 0x8A 0x8B( 34)ăDDS Պ ǈ ՗5 ă D10 D9 ( “ ( 0x80Ă 0x81)”և )ǈժ VOUT ăĂ Պ (PGA)Ă հ ADC ă 20 ă VOUT VIN ă VIN VDD/2 ă VIN ǈժ ă 4(RFB) 5 (VIN) ă Ղ PGA ԍ ADC (0 V VDD) ă PGA 5Ԡ 1Ԡǈ D8 ( և 0x80)ă հ ǈ 12 Ă1 MSPS ADC ăADC ԥ AD5933 DSP ǈ DFT ăDFTǈ DFT ăAD5933 DFT ՗ ǖǖX(f) f ă x(n) ADC ăcos(n ) sin(n ) DDS f ă 1024 Ԩ ǈ 16 ǈ ՚ ՗ և ևă ց ă∑−−=10230)))sin())(cos((()(n n j n n x f X՗6.D13…D0−40°C 11, 1011, 0000, 0000 −30°C 11, 1100, 0100, 0000 −25°C 11, 1100, 1110, 0000 −10°C11, 1110, 1100, 0000 −0.03125°C 11, 1111, 1111, 1111 0°C00, 0000, 0000, 0000 +0.03125°C 00, 0000, 0000, 0001 +10°C 00, 0001, 0100, 0000 +25°C 00, 0011, 0010, 0000 +50°C 00, 0110, 0100, 0000 +75°C 00, 1001, 0110, 0000 +100°C 00, 1100, 1000, 0000 +125°C 00, 1111, 1010, 0000 +150°C01, 0010, 1100, 0000D I G I T A L O U T P U T–40°C–0.03125°C –30°C11,1111,1111,111111,1100, 0100, 000011, 1011, 0000, 0000TEMPERATURE (°C)75°C150°C01, 0010,1100, 000000, 1001, 0110, 000000, 0000, 0000, 000105324-02121.AD5933 ă և (MCLK) ă ǈAD5933 16.776 MHz և ă( 0x81ǈ ՗11) D3Պ ǈ ă և ăփ և ք ǈ 14Ă 15 16ă13 ǈ 14 ă ă −40°C +125°C ă (+150°C) ǈ Վ ă ±2°C ăև ǈ ǈփ և ă ǈ և ăă ǈ ( 0x80 0x81) ă ( 800 μs)ǈ ǈ ă ( 0x8F)ǈ Ǘ 0x92 0x93 ( և )ă16 ǈ 14 ց ADC ă MSB ăD13 ă և ԍ –40°C ǈ +150°C ă ǈ 0x92 0x93 ՗6 ă 21 ă! = ADC (D)/32!= (ADC (D) – 16384)/32“ADC ” 14 ǈԈ ă != (ADC (D) – 8192)/32“ADC (D)” D13ǈ ADC ă101.598.55466FREQUENCY (kHz)I M P E D A N C E (k )101.0100.5100.099.599.0565860626405324-02222.օ DFT ă DFT ǖ != ǖR 0x94 0x95 ă I 0x96 0x97 ă ǈ ǖ ! = 0x038B = 907( )! = 0x0204 = 516( )!= =1043.506 ǈՂ Բ ă VOUT VIN ăǈ VOUT VIN ăǈ ǈ ǖ ! = 2 V p-p !Z CALIBRATION = 200 kΩPGA = ×1 ! = 200 kΩ != 30 kHzǈ ǖ ! = 0xF064 = −3996( )! = 0x227E = +8830( )!= =9692.106 != 22I R +)516907(22+)8830()3996(22+− ⎟⎠⎞⎜⎝⎛=⎟⎠⎞⎜⎝⎛1!= =515.819×1012ăԨ ǈ = 510 kΩă30 kHz ǈ ǖ ! = 0xFA3F = −1473( )! = 0x0DB3 = +3507( )!= =3802.863 ǖ !==ՎAD5933 ǈ Վ ă Վ ă 22 ă ǈ ă⎟⎟⎟⎟⎠⎞⎜⎜⎜⎜⎝⎛Ω200k 1))3507()1473((22+−×1Ω=Ω××−k 791.509863.380210819273.515112101.598.55466FREQUENCY (kHz)I M P E D A N C E (k )101.0100.5100.099.599.0565860626405324-02323.CURRENT-TO-VOLTAGE 05324-02424.ǈ Վ ǈժ ǈ ă 23 ăǈ Ղ ă Ă PGA ăǈ ǖ ! = 2 V (p-p) !Z UNKNOWN = 100.0 kΩPGA = ×1 ! = 3.3 V! = 100 kΩ != 55 kHz 65 kHzǖ ! 55 kHz 1.031224E-09 ! 65 kHz 1.035682E-09!(ΔGF) 1.035682E-09 − 1.031224E-09 = 4.458000E-12 !(ΔF) = 10 kHzǈ60 kHz ǖ1.033453E-9ă ă9-10031224.15kHz 10kHz 12-4.458000E ×+⎟⎠⎞⎜⎝⎛× 24 ǖ !×Ԩ ǈ ǖ VDD = 3.3 V! = 200 kΩZ UNKNOWN = 200 kΩPGA = ×1ADC 2 V p-p ăփ ǈ PGA ×5ǈ ADC ԏ ăՎ ǈ Ղ ǖ t t t1("PGA Z UNKNOWN×101.598.55466FREQUENCY (kHz)I M P E D A N C E (k )101.0100.5100.099.599.0565860626405324-02525. Վ7010FREQUENCY (kHz)% I M P E D A N C E E R R O R654321356010005324-02626. 1 ӥ Բ2.0010FREQUENCY (kHz)% I M P E D A N C E E R R O R35601001.81.61.41.21.00.80.60.40.205324-02727. 2 ӥ ԲՎՎ 30 ppm/°C ă 25100 kΩ Վ ă2(1 kΩ 10 kΩ)ǈ 27 ǖ! = 2 V p-p! ZCALIBRATION = 1 kΩ PGA = ×1! = 3.3 V!= 1 kΩAD5933 ă AD5933 փ ă ă ǈ 2 V p-p ǈR OUT 200 ΩăǈR OUT ă 26 31 ǈ 4 MHz 10 kHz ă1(0.1 kΩ 1 kΩ)ǈ 26 ǖ ! = 2 V p-p ! Z CALIBRATION = 100 Ω PGA = ×1! = 3.3 V!= 100 Ω0.3–0.310FREQUENCY (kHz)% I M P E D A N C E E R R O R35601000.20.10–0.1–0.205324-0283–910FREQUENCY (kHz)% I M P E D A N C E E R R O R35601001–1–3–5–705324-03028. 3 ӥ Բ 30. 5 ӥ Բ1.0–3.510FREQUENCY (kHz)% I M P E D A N C E E R R O R35601000.50–0.5–1.0–1.5–2.0–2.5–3.005324-02929. 4 ӥ Բ 4–1010FREQUENCY (kHz)% I M P E D A N C E E R R O R20–2–4–6–8356010005324-03131. 6 ӥ Բ3(10 kΩ 100 kΩ)ǈ 28 ǖ ! = 2 V p-p ! Z CALIBRATION = 10 kΩ PGA = ×1 ! = 3.3 V!= 10 kΩ5(1 MΩ 2 MΩ)ǈ 30 ǖ ! = 2 V p-p ! Z CALIBRATION = 100 Ω PGA = ×1! = 3.3 V!= 100 kΩ6(9 MΩ 10 MΩ)ǈ 31 ǖ ! = 2 V p-p ! Z CALIBRATION = 9 MΩ PGA = ×1! = 3.3 V!= 9 MΩ4(100 kΩ 1 MΩ)ǈ 29 ǖ ! = 2 V p-p ! Z CALIBRATION = 100 kΩ PGA = ×1 ! = 3.3 V!= 100 kΩAD5933 և և ă ǈ և 0x94 0x95 ǈ և 0x96 0x97 ă DFT և ևǈ փ ăǈ ǖ RC ǈ 0x94 0x95 0x96 0x97 ՚ ă ǈ փ ǈ (|Z|) DFT և և ǈ ǖ != ǈ ժ ă ǈ ǖ !=ǖ != Ղ AD5933ǈ ǈ ă ǈ Ք ǈ Ղ (Z UNKNOWN ) ă AD5933 ǈժ ă AD5933 ǈ ADC ă AD5933 և և ǈ AD5933 ă ǖ !(rads) = tan −1(I/R )(3)3 ǖ DDS AD5933 և հ ǈ AD5933 VOUT VIN ă22I R +×1⎟⎠⎞⎜⎝⎛=⎟⎠⎞⎜⎝⎛1 (|Z UNKNOWN |) (ZØ)ă (ZØ) օăօ AD5933 ǈ AD5933 VOUT VIN ǈժ 3 ă VOUT VIN ǈAD5933 Սփ ǈ AD5933 և ǈ ăǈ օՍ AD5933 VIN VOUT ǈ (Ԉ )ǈ ă (ZØ) ǖ Z Ø = (Φunknown - ∇system )ǖ∇system VIN VOUT ăΦunknown VIN VOUT ăZØ ǈ ăǈ AD5933 VOUT VIN ǈ ժ ǈ (ZØ)ăǈ −90°ă ǈ −90° ăǈ (ZØ)ǈ Ղ (∇system)ǈ VOUT VIN (Φunknown) ă2001801601401201008060402015k30k45k 60k 75k 90k105k120kFREQUENCY (Hz)S Y S T E M P H A S E (D e g r e e s )05324-03232.–100–90–80–70–60–50–40–30–20–1015k30k45k 60k 75k 90k105k120kFREQUENCY (Hz)P H A S E (D e g r e e s )05324-03333.32 220 kΩ (R FB = 220 kΩĂPGA = ×1) AD5933 10 pF ă32 ǈՂ ǖ ǈ ǈ Ղ ă( ZØ) ZØ( 33)ăǈ ǈ ă ǈ Ք ǈ Ք ăՔ x ă և ǈ և ǈ ǈ ǈ 180° Ք ă ǈ և և ǈ ǈ ǈ 180° Ք ă ǈ և ǈ և ǈ ǈ ǈ 360° ăǈ Ք և և ǈ ՗7ă(|Z|) )ZØǈ * ǈՍ և և ǈ (Z UNKNOWN ) և) * և) * Ǘ ǖ և ǖ|Z REAL | = |Z | × cos (ZØ)և ǖ|Z IMAG | = |Z | × sin (ZØ)34.՗9. (D15 D12)D15 D14 D13 D12 0 0 0 00 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1՗10. (D10 D9)D10 D9 Պ0 0 1 2.0 V p-p 0 1 4 200 mV p-p 1 0 3 400 mV p-p 1 1 21.0 V p-p( 0x80Ă 0x81)AD5933 16 ( 0x80 0x81)ǈ AD5933 ă ǖD15 D0 0xA000ă 4 MSB ǈ ǖ Ă ă0x80ǈ փ Վ 0x81 ă ǈ փ և ă ă փ Պ ( Ă )ă ǈՂ ǈ ( 34)ă՗11. (D11ĂD8 D0)D11D8 PGA Ǘ0 = ×5ǈ1 = ×1D7 ԍ ǈ 0D6 ԍ ǈ 0D5 ԍ ǈ 0D4D3 և ǈ 1և ǈ 0D2 ԍ ǈ 0D1 ԍ ǈ 0D0 ԍ ǈ 0!!DDSփ Պ ă օ ă ǈ ǈ Ղ ǈ Ս ăǈ ǈADC ă ǈ ( )Պ 0x8A 0x8B( 34)ă!օ ă օ Թժ DSP ă AD5933 ǈ Պ ǈ ADC ă!ǈ ă ǈ ăă ǈ ă ǈ ǈ ă 14 ց 0x92 0x93 ăAD5933 ă Ԉ 1010,0000,0000,0000 (0xA000)ă ǈVOUT VIN և GNDăӯ ă ǈVIN VOUT և ăՊ VOUT ăPGAPGA ADC 5Ԡ 1Ԡăă Ă փ ԥ ă ǈՂ ă( 0x82Ă 0x83Ă 0x84)ǖD23 D0 փ ă ǈ փ ăԈ 24 ՗ ă ǈ 30 kHz ( 16.0 MHz )ǈ 0x0F Պ 0x82ǈ 0x5C Պ 0x83ǈ 0x28 Պ 0x84ă ԍ 30 kHz ăՊ ǖ= 0x0F5C28≡×⎟⎟⎟⎟⎠⎞⎜⎜⎜⎜⎝⎛⎟⎠⎞⎜⎝⎛272416MHz30kHz՗12.0x88 D15 D9/D8/ 0x89 D8 D0/՗13.0x8A D15 D11/D10 D9 2D10 D9 0 0 0 1 × 21 0 ԍ1 1× 4D8 MSB0x8B D7 D0/( 0x85Ă 0x86Ă 0x87)ǖD23 D0 փ ă ǈ փ ăԈ 24 ՗ ă ǈ 16.0 MHz ǈ օ 10 Hz ǈ 0x00 Պ 0x85ǈ 0x01 Պ 0x86ǈ 0x4F Պ 0x87ă ǖ= 0x00014F 0x00Պ 0x85ǈ 0x01Պ 0x86ǈ 0x4F Պ 0x87ă( 0x88Ă 0x89)ǖD8 D0 փ ă ǈ փ ă≡×⎟⎟⎟⎟⎠⎞⎜⎜⎜⎜⎝⎛⎟⎠⎞⎜⎝⎛27216MHz 10Hz ă 9 D8 D0՗ ăD15 D9 ă ă Պ 511ă( 0x8A Ă 0x8B)ǖD10 D0 փ ă ǈ փ ( ՗13)ăĂ ǈ ADC ǈ ă / / ADC ă 9 D8 D0՗ ăՊ 2Ԡ 4Ԡǈ D10 D9 ă5 D15 D11 ă Պ 511 × 4 = 2044 ă ǈ 30 kHz ǈՊ ADC 511 × 4 × 33.33 μs = 68.126 ms ăADC 1024 Ԩǈ 0x94 0x97 ă 16.777 MHz ǈ 1 ms ă՗14. ( 0x8F)0000 0001 0000 0010 / 0000 0100 0000 1000 ԍ 0001 0000 ԍ 0010 0000 ԍ 0100 0000 ԍ 1000 0000ԍ( 0x8F)ă D7 D0 ՗ AD5933 ăD0 D4 D7 ǈփ՗ ă D1 ՗ ă AD5933 ǈ 1ă ՗ 0x94 0x97 ă Ă Ă ǈ ă ăD2 ՗ Պ ă Պ և ǈ 1ă ă/ǈD1 1ǈ՗ ă / / DDS / / ǈD1 ă ǈD1 0ăǈD2 1ă ǈ ă ǈ ă(16 — 0x92Ă 0x93)Ԉ AD5933 ՗ ă 16 ց ăD15 D14 ăD13 ă ǈ “ ”և ă(16 — 0x94Ă 0x95Ă 0x96Ă 0x97)ǖփ ă ǈ D1 1 ǈ ǈ՗ ăԈ և և ՗ ă 16 ց ă ǈՂ (√(Real2 + Imaginary2)) / ( )ǈ ǈ ă փ ăǈ ǈ՗ 0x92 0x93 ă ( 0x80 0x81) ǈ ǈ ă111R/WD7D6D5D4D3D2D1D0START CONDITIONBY MASTERACKNOWLEDGE BYAD5933SLAVE ADDRESS BYTEACKNOWLEDGE BY MASTER/SLAVESCLSDAREGISTER ADDRESS05324-03535.AD5933 I 2C ă ǈ ăAD5933 7 ă ǈ 0001101 (0x0D)ăI 2C35 I 2C ӯ ă Ǘ (SDA) ǈ (SCL)ԍ ă ǈ ă ǈ 8 ǈԈ 7 (MSB ) R/W ǈ ǈ (0 = ǈ1 = )ăǈ 9 ( ) ǈժ ԍ ă ǈ ԍ ă R/W 0ǈ ă R/W 1ǈ ă9 ǖ8 ă Ղ ǈժ ԍ ǈ ԥ ă ǈ ǈ ă ǈ ǈ ǈ ă R/W ǈ ă ǈ ǈ / ăǈ ă ǈ 10 ǈ ă ǈ 9 SDA ǈ փ ǈ փ ă 10 ǈ 10 ǈ ă05324-036A SA A W PPOINTER COMMAND 1011 0000SLAVE ADDRESSREGISTER ADDRESS TO POINT TO05324-0372՗16.1010 0000RAM Ǘև ă1010 0001RAM/ Ǘ և ă 1011 0000ă Ԉ ă36.37.05324-03838.AD5933փ փ ăԨև AD5933 ăԨև ՗ ՗15 ă ( 37)ǈ Ս ǈ ăǈ ǖ 1. SDA ă2. 7 ( )ă3. SDA ă4. ( ՗16Ǘ = 10110000)ă5. SDA ă6. ( )ă7. SDA ă8. SDA ăǈ ( 38)ă Ղ ă AD5933ǈ ă 1. SDA ă2. 7 ( )ă3. SDA ă4. 8 (1010 0000)ǈă5. SDA ă6. ǈă7. SDA ă 8. ă9. ǈ SDA ă 10. SDA ă!՗16 ăԨև ǈ Ս ă /ǈ ă ǈ ă ǈ ( 36)ǖ 1. SDA ă2. 7 ( )ă3. SDA ă4. ă5. SDA ă6. ă7. SDA ă8.SDA ă05324-03939.05324-04040.AD5933 I 2C ǖ ăAD5933 ǈ ǈ ăǈ ǈ ( 39)ǖ1. SDA ă2. 7 ( )ă3. SDA ă4. ă5. SDA փ ()ă6. SDA ǈ ăǈ ( 40)ă Ղ ă 1. SDA ă2. 7 ( )ă3. SDA ă4. (1010 0001)ǈă5. SDA ă6. ǈă7. SDA ă8. SDA ăՂ ă9. 7 ( )ă 10. SDA ă11. ă12. ǈ SDA ă 13. ǈ փ ǈ՗ ă 14. SDA ă05324-0482V p-p41. ևՔ ǈ AD5933 10 MΩ ăǈ VOUT VIN ( Ք ≤500 Ω)ǈ ǈ Վ ăVOUT ă I-V ԍ ǈ Ӏ “ ”և ă I-V ǈ VIN VDD/2ă I-V / փ ǈ ă(Z UNKNOWN ) ǈՂ VOUT ROUT( 41( ǈ (Z UNKNOWN ) ă ǈ ( ) R OUT ǈ ǈ Բ ăVOUT ǈ ǈ ă ՗17 ă ǈ AD5933 ǈՂ ǈ ǈ R OUT ǈ ( “ ”և )ă ՗ ǈ R OUT VOUT ǈ ( ±2 mA)ǈ Վ ă I-V ( 1/ ) ă 41 ă և ǈ AD5933 ă և (R1 R2) VOUT ǈ ǈժ ă41 ǈZ UNKNOWN ՚ և ǈ 1 Ωǈ ( AD820ĂAD8641ĂAD8531 )Ă Ă ăǈ VOUT (ROUT) Բǈ 41 և (ZUNKNOWN)ă և ROUTǈժZUNKNOWNăǈ ZUNKNOWN30 kHz 32 kHz 90 Ω 110 Ω ǈROUTă ǈ AD5933 41 և ă Ղ ԍ և Ք Բ ( ǈ /opamps)ăADI փ Կ ǈ Ք ăǖVDD = 3.3 VVOUT = 2 V p-pR2 = 20 kΩR1 = 4 kΩ= 500 ΩZUNKNOWN= 100 ΩPGA = ×1 R1/R2Բ ǈ VOUT ă R1 = 4 kΩ R2 = 20 kΩ ǈ 1/5ǈ 2 V p-p ǈ 400 mVă 400 mV/ 90 Ω = 4.4 mAă100 Ω Ă ǈ ă RFB I-V ǈ AD5933 ă ǈ RFB I-V ǈ ADC 400 mV (RFB = 100 Ω) 2 V p-p (RFB = 500 Ω)ă100 Ω VOUT VIN ǈ և փ ă41 ǈ AD5933 VDD/2ă ǈ և ( AD5933 1 ) AD5933 ԏ ǈՂ VDD/2 և ă05324-04142. թFREQUENCY (Hz)05324-04243. Վǖթ թ ǈ ǈ Վă ՗ փ ǈ թ ă ǈ թ ՗ ǈ փ ă ǈ փ թ ǈ փ ăAD5933 Ԣ27 ǈ Sub-Hz ăAD5933 ǈ ǈ ăAD5933 ǈ ă/RLC Վ ǈ RLC Վ ǈ 43 ă RLC ă ǈRLC ă ǈ Պ ǈAD5933 Ԣ ăă Վ ǈ Վ ՗ ă ǈ ăAD5933 ă AD5933ǈ ăփ ǈAD5933 80 kHz 100 kHz ă ă ă ǈ ǈ Վ ǈ AD5933 ă100k 100.1FREQUENCY (Hz)M O D U L U SP H A S E A N G L E100k05324-0431101001k 10k1001k10k44. հAD5933 ă ǈ Ă ă փ ǈ ǈ ă ǈ ǈ ǈ Ԩă ǈփ ǈ Ăӆ ǈ փ ă ă Ԩǈ ǈ և ă (EIS) ԥ ǈփ ăAD5933 ӄǈ և ǈ ăRC ǈ RC (R S ) ժ (R P C P ) ă ǖR S 10 Ω 10 kΩǈR P 1 kΩ 1 MΩǈC P 5 μF 70 μF ă 44 հ Ă ăǈ 0.1 Hz 100 kHz ă ԍ Ԩ փ ǈՂ ǈ ±20 mV ă ( ADuC702x) 10 0.1 kHz 100 kHz ǈժ ă 0.1 kHz 1 kHz ǈ 16.776 MHz Ք 500 kHz ă AD9834 և ǈ Պ ǈ MCLK ǈ ăAD5933՗18. AD5933 ՗(mV ǈ ) (V) (ppm/°C ǈ )0.1 Hz 10 Hz (μV p-p ǈ )ADR433B ±1.5 3. 0 3 3.75ADR433A ±4 3. 0 10 3.75 ADR434B ±1.5 4. 096 3 6.25ADR434A ±5 4. 096 10 6.25 ADR435B ±2 5.0 3 8 ADR435A ±6 5.0 10 8 ADR439B ±2 4.5 3 7.5 ADR439A±5.5 4.5 107.5AD5933 ǈ ăAD5933 ǖAVDD1ĂAVDD2 DVDD ă ă ǈ ǖ Ăppm Ă ă ǈ ă ǈ ǈ ADR43x ǈ Ք ǈ Ս ă ăAD5933 ǈ ă ǈ ADR395ǈ 100 μA ǈ ǈ 0.1 Hz 10 Hz 8 μV p-p ăă ԍ ӄ ԍ ă ǈ ăǈ ă Ր ǈ ăADR433 0.1 Hz 10 Hz ă՗18 AD5933 ăք!ǈ ӱ ք ă AD5933 ӱ և և ǈ և ӱ ă AD5933 AGND DGND ǈ ă AD5933ăAD5933 10 μF 0.1 μF ă ǈ0.1 μF ă10 μF ă0.1 μF Ղ (ESR) (ESI)ǈ ă և ǈ 0.1 μF ăԨ ǈ ǈժ ă Ը ǈ փ ӱ ă Ն ă ӱ ǈ ԍ Ե ǈ ӱ ă ӱք ǈ ӱ ǈ ք ă ǈ ӱ Ղ ăӱAD5933 ӱǈ փ AD5933ăӱ PC USB ǈ USB ӱ ăԈ ժ AD5933 ӱăEVAL-AD5933EB Ҿ CD ăPC ӱ ăMicrosoft® Windows® 2000 Windows XPăӱ 45 46ă ӱAD5933 ӱ AD5933 ă ӱ ӱ ǈ Ԉ ӱ ă ăӱ ǈ ă Ս ă (XO) ևӱ 16 MHz ăփ ǈ Ǘ ǈ ևCMOS ă05324-04445. EVAL-AD5933EBZ USB05324-04546. EVAL-AD5933EBZ05324-04647. EVAL-AD5933EB ӱAD593305324-04748. EVAL-AD5933EB ӱAD5933՗19Ք SMD 150 V X7R SMD ǈ0.1 μFǈ0603FEC 1301804C1, C3, C5 C9, C11,C15, C16, C 18 C22,C24, C26 C28, C32,C34, C36, C37, C39X5R ǈ10 μFǈ0805FEC 9402136C2, C4, C12 C14, C25,C30, C31, C33, C38, C40C10, C17 50 V X7R SMD ǈ22 pFǈ0603FEC 722-005C23 6.3 V X5R SMD ǈ2.2 μFǈ0603FEC 9402101C29, C35 16 V ǈ10 μFǈCAP\TAJ_B FEC 498-737C41 (×2)ǈCAP-7.5 MMC42 50 V NPO SMD ǈ15 pFǈ0603FEC 721-980C43 16 V X7R SMD ǈ1 μFǈ0603FEC 1310220CLK1, CLK2 SMB ǈ50 ΩFEC 1111349D4 ǈ0805FEC 1318243J1 USB Mini-B (USB-OTG)FEC 9786490J2 J6 / ӱǄ5 mm ǅFEC 151-789LK1 LK14 ӱǈ 0.1" SIP-2P FEC 1022247/FEC 150-411 R1 SMD 50 Ωǈ0603FEC 11706589341501 R2 ǈ ǈ200 kΩ R1/8WA2 FECR33 4 kΩ 4R43 20 kΩ 4R5, R6 SMD 100 kΩǈ0603FEC 9330402R7 SMD 0 Ωǈ0603FEC 9331662R8, R9 SMD 2.2 kΩǈ0603FEC 9330810R10 SMD 10 kΩǈ0603FEC 9330399R11 SMD 1 kΩǈ0805FEC 9332383R12, R13 SMD 20 kΩǈ0603FEC 9330771T1 T3, T5 T8 FEC 8731128VIN, VOUT SMB 50 ΩFEC 1111349U1 OP97 SO8NBU2 24LC64 IC EEPROM 64 KB 2.5 V SOIC8 SO8NB FEC 9758070U3 CY7C68013-CSP USB Cypress CY7C68013A-56LFXC LFCSP-56Digi-Key 428-1669-NDU4 ADR435 5 V SOIC-8ADR435ARZU5 ADP3303-3.3 SO-8NB ADP3303ARZ-3.3U6 AD5933/34 SSOP-16AD5933YRSZ/AD5934YRSZ Y1 XTAL-CM309S CM309S SMD crystal 24 MHz, XTAL_CM309S FEC 9509658Y2 3.3 VĂ16 MHz AEL-4313×4FEC 651-813Ԉǈӱ Ԉ Ԉ FEC 522-764A Mini-B Digi-Key 167-1011-NDUSB1 FEC = Farnell Electronics.2 ǈ ă3 R3 R4 փ ă4 ă。

MAX3222EEUP中文资料

Battery-Powered Equipment Cell Phones Cell-Phone Data Cables Notebook, Subnotebook, and Palmtop Computers
Applications
Printers Smart Phones xDSL Modems
_______________Ordering Information
PART
TEMP RANGE
PINPACKAGE
PKG CODE
MAX3222ECTP MAX3222ECUP
0°C to +70°C 0°C to +70°C
20 Thin QFNEP** (5mm x 5mm) 20 TSSOP
♦ For Low-Voltage or Data Cable Applications MAX3380E/MAX3381E: +2.35V to +5.5V, 1µA, 2Tx/2Rx, RS-232 Transceivers with ±15kV ESD-Protected I/O and Logic Pins
MAX3222EEPN -40°C to +85°C 18 Plastic DIP —
MAX3232ECAE 0°C to +70°C 16 SSOP
—
MAX3232ECWE 0°C to +70°C 16 Wide SO —
MAX3232ECPE 0°C to +70°C 16 Plastic DIP —
A proprietary low-dropout transmitter output stage delivers true RS-232 performance from a +3.0V to +5.5V power supply, using an internal dual charge pump. The charge pump requires only four small 0.1µF capacitors for operation from a +3.3V supply. Each device guarantees operation at data rates of 250kbps while maintaining RS-232 output levels. The MAX3237E guarantees operation at 250kbps in the normal operating mode and 1Mbps in the MegaBaud™ operating mode, while maintaining RS-232compliant output levels.

MAX3313EEUB-T中文资料

General DescriptionThe MAX3311E/MAX3313E are low-power, 5V EIA/TIA-232-compatible transceivers. All transmitter outputs and receiver inputs are protected to ±15kV using the Human Body Model, making these devices ideal for applications where more robust transceivers are required.Both devices have one transmitter and one receiver.The transmitters have a proprietary low-dropout trans-mitter output stage enabling RS-232-compatible opera-tion from a +5V supply with a single inverting charge pump. These transceivers require only three 0.1µF capacitors and will run at data rates up to 460kbps while maintaining RS-232-compatible output levels.The MAX3311E features a 1µA shutdown mode. In shutdown the device turns off the charge pump, pulls V- to ground, and the transmitter output is disabled.The MAX3313E features an INVALID output that asserts high when an active RS-232 cable signal is connected,signaling to the host that a peripheral is connected to the communication port.________________________ApplicationsDigital Cameras PDAs GPS POSTelecommunications Handy Terminals Set-Top BoxesFeatureso ESD Protection for RS-232-Compatible I/O Pins±15kV—Human Body Modelo 1µA Low-Power Shutdown (MAX3311E)o INVALID Output (MAX3313E)o Receiver Active in Shutdown (MAX3311E)o Single Transceiver (1Tx/1Rx) in 10-Pin µMAX PackageMAX3311E/MAX3313E±15kV ESD-Protected, 460kbps, 1µA,RS-232-Compatible Transceivers in µMAX________________________________________________________________Maxim Integrated Products1Pin Configurations19-1910; Rev 0; 1/01Ordering InformationFor price, delivery, and to place orders,please contact Maxim Distribution at 1-888-629-4642,or visit Maxim’s website at .Typical Operating CircuitM A X 3311E /M A X 3313E±15kV ESD-Protected, 460kbps, 1µA,RS-232-Compatible Transceivers in µMAX 2_______________________________________________________________________________________ABSOLUTE MAXIMUM RATINGSELECTRICAL CHARACTERISTICSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.V CC to GND.............................................................-0.3V to +6V V- to GND................................................................+0.3V to -7V V CC + |V-|............................................................................+13V Input VoltagesTIN, SHDN to GND...............................................-0.3V to +6V RIN to GND......................................................................±25V Output VoltagesTOUT to GND................................................................±13.2V ROUT, INVALID to GND.....................…-0.3V to (V CC + 0.3V)Short-Circuit DurationTOUT to GND.........................................................ContinuousContinuous Power Dissipation10-Pin µMAX (derate 5.6mW/°C above +70°C)..........444mW Operating Temperature RangesMAX331_ECUB.................................................0°C to +70°C MAX331_EEUB..............................................-40°C to +85°C Junction Temperature.....................................................+150°C Storage Temperature Range............................-65°C to +150°C Lead Temperature (soldering, 10s)................................+300°CMAX3311E/MAX3313E±15kV ESD-Protected, 460kbps, 1µA,RS-232-Compatible Transceivers in µMAX_______________________________________________________________________________________3ELECTRICAL CHARACTERISTICS (continued)TIMING CHARACTERISTICSM A X 3311E /M A X 3313E±15kV ESD-Protected, 460kbps, 1µA,RS-232-Compatible Transceivers in µMAX 4_______________________________________________________________________________________Typical Operating Characteristics(V CC = +5V, 0.1µF capacitors, transmitter loaded with 3k Ωand C L , T A = +25°C, unless otherwise noted.)0428612101410001500500200025003000SLEW RATEvs. LOAD CAPACITANCELOAD CAPACITANCE (pF)S L E W R A T E (V /µs )-5-4-3-2-10123456050010001500200025003000TRANSMITTER OUTPUT VOLTAGEvs. LOAD CAPACITANCELOAD CAPACITANCE (pF)T R A N S M I T T E R O U T P U T V O L T A G E (V )010001500500200025003000SUPPLY CURRENT vs. LOAD CAPACITANCELOAD CAPACITANCE (pF)Detailed DescriptionSingle Charge-Pump Voltage ConverterThe MAX3311E/MAX3313E internal power supply has a single inverting charge pump that provides a negative voltage from a single +5V supply. The charge pump operates in a discontinuous mode and requires a flying capacitor (C1) and a reservoir capacitor (C2) to gener-ate the V- supply.RS-232-Compatible DriverThe transmitter is an inverting level translator that con-verts CMOS-logic levels to EIA/TIA-232 compatible lev-els. It guarantees data rates up to 460kbps with worst-case loads of 3k Ωin parallel with 1000pF. When SHDN is driven low, the transmitter is disabled and put into tri-state. The transmitter input does not have an internal pullup resistor.RS-232 ReceiverThe MAX3311E/MAX3313E receiver converts RS-232signals to CMOS-logic output levels. The MAX3311E receiver will remain active during shutdown mode. The MAX3313E INVALID indicates when an RS-232 signal is present at the receiver input, and therefore when the port is in use.The MAX3313E INVALID output is pulled low when no valid RS-232 signal level is detected on the receiver input.MAX3311E Shutdown ModeIn shutdown mode, the charge pump is turned off, V- is pulled to ground, and the transmitter output is disabled (Table 1). This reduces supply current typically to 1µA.The time required to exit shutdown is less than 25ms.Applications InformationCapacitor SelectionThe capacitor type used for C1 and C2 is not critical for proper operation; either polarized or nonpolarized capacitors are acceptable. If polarized capacitors are used, connect polarity as shown in the Typical Operating Circuit . The charge pump requires 0.1µF capacitors. Increasing the capacitor values (e.g., by a factor of 2) reduces power consumption. C2 can beincreased without changing C1’s value. However, do not increase C1’s value without also increasing the value of C2 and C BYPASS to maintain the proper ratios (C1 to the other capacitors).When using the minimum 0.1µF capacitors, make sure the capacitance does not degrade excessively with temperature. If in doubt, use capacitors with a larger nominal value. The capacitor ’s equivalent series resis-tance (ESR) usually rises at low temperatures and influ-ences the amount of ripple on V-.To reduce the output impedance at V-, use larger capacitors (up to 10µF).Bypass V CC to ground with at least 0.1µF. In applica-tions sensitive to power-supply noise generated by the charge pump, decouple V CC to ground with a capaci-tor the same size as (or larger than) charge-pump capacitors C1 and C2.Transmitter Output when ExitingShutdownFigure 1 shows the transmitter output when exiting shutdown mode. The transmitter is loaded with 3k Ωin parallel with 1000pF. The transmitter output displays no ringing or undesirable transients as the MAX3311E comes out of shutdown. Note that the transmitter is enabled only when the magnitude of V- exceeds approximately -3V.High Data RatesThe MAX3311E/MAX3313E maintain RS-232-compati-ble ±3.7V minimum transmitter output voltage even atMAX3311E/MAX3313E±15kV ESD-Protected, 460kbps, 1µA,RS-232-Compatible Transceivers in µMAX5Figure 1. Transmitter Output when Exiting Shutdown or Powering Up10µs/divSHDNTOUT5V/div1.5V/divTIN = GNDTIN = V CCM A X 3311E /M A X 3313E±15kV ESD-Protected, 460kbps, 1µA,RS-232-Compatible Transceivers in µMAX 6_______________________________________________________________________________________high data rates. Figure 2 shows a transmitter loopback test circuit. Figure 3 shows the loopback test result at 120kbps, and Figure 4 shows the same test at 250kbps.±15kV ESD ProtectionAs with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electro-static discharges encountered during handling and assembly. The MAX3311E/MAX3313E driver outputsand receiver inputs have extra protection against static discharge. Maxim ’s engineers have developed state-of-the-art structures to protect these pins against ESD of ±15kV without damage. The ESD structures withstand high ESD in all states: normal operation, shutdown, and powered down. After an ESD event, Maxim ’s E versions keep working without latchup; whereas, competing products can latch and must be powered down to remove latchup.ESD protection can be tested in various ways. The transmitter outputs and receiver inputs of the product family are characterized for protection to ±15kV using the Human Body Model.ESD Test ConditionsESD performance depends on a variety of conditions.Contact Maxim for a reliability report that documents test setup, test methodology, and test results.Human Body ModelFigure 5 shows the Human Body Model, and Figure 6shows the current waveform it generates when dis-charged into low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest,which is then discharged into the test device through a 1.5k Ωresistor.Machine ModelThe Machine Model for ESD tests all pins using a 200pF storage capacitor and zero discharge resis-tance. Its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing. Of course, all pins require this protec-tion during manufacturing, not just RS-232 inputs and outputs. Therefore, after PC board assembly, the Machine Model is less relevant to I/O ports.Figure 4. Loopback Test Results at 250kbps2µs/divTOUTTINROUTFigure 3. Loopback Test Results at 120kbps 5µs/divTOUTTINROUTMAX3311E/MAX3313E±15kV ESD-Protected, 460kbps, 1µA,RS-232-Compatible Transceivers in µMAX_______________________________________________________________________________________7Figure 5. Human Body ESD Test ModelFigure 6. Human Body Current WaveformPin Configurations (continued)Chip InformationTRANSISTOR COUNT: 278M A X 3311E /M A X 3313E±15kV ESD-Protected, 460kbps, 1µA,RS-232-Compatible Transceivers in µMAX Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.8_____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600©2001 Maxim Integrated ProductsPrinted USAis a registered trademark of Maxim Integrated Products.______________________________________________________________Pin Description。

MAX4613EEE+中文资料

________________General DescriptionThe MAX4613 quad analog switch features on-resis-tance matching (4Ωmax) between switches and guar-antees on-resistance flatness over the signal range (9Ωmax). This low on-resistance switch conducts equally well in either direction. It guarantees low charge injec-tion (10pC max), low power consumption (35µW max),and an electrostatic discharge (ESD) tolerance of 2000V minimum per Method 3015.7. The new design offers lower off-leakage current over temperature (less than 5nA at +85°C).The MAX4613 quad, single-pole/single-throw (SPST)analog switch has two normally closed switches and two normally open switches. Switching times are less than 250ns for t ON and less than 70ns for t OFF .Operation is from a single +4.5V to +40V supply or bipolar ±4.5V to ±20V supplies.________________________ApplicationsSample-and-Hold Circuits Communication Systems Test Equipment Battery-Operated Systems Heads-Up DisplaysPBX, PABXGuidance and Control Systems Audio Signal Routing Military RadiosModems/Faxes____________________________Features♦Pin Compatible with Industry-Standard DG213♦Guaranteed R ON Match Between Channels (4Ωmax)♦Guaranteed R FLAT(ON)Over Signal Range (9Ωmax)♦Guaranteed Charge Injection (10pC max)♦Low Off-Leakage Current Over Temperature (<5nA at +85°C) ♦Withstands 2000V min ESD, per Method 3015.7♦Low R DS(ON)(85Ωmax)♦Single-Supply Operation +4.5V to +40V Bipolar-Supply Operation ±4.5V to ±20V ♦Low Power Consumption (35µW max)♦Rail-to-Rail Signal Handling ♦TTL/CMOS-Logic CompatibleMAX4613Quad, SPST Analog Switch________________________________________________________________Maxim Integrated Products 119-1362; Rev 3; 6/07________________Ordering InformationPin Configurations/___Functional Diagrams/TruthTable*Contact factory for dice specifications.**Contact factory for availability.***EP = Exposed PadFor pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,or visit Maxim’s website at .M A X 4613Quad, SPST Analog SwitchABSOLUTE MAXIMUM RATINGSELECTRICAL CHARACTERISTICS—Dual Supplies(V+ = 15V, V- = -15V, V L = 5V, GND = 0V, V INH = 2.4V, V INL = 0.8V, T A = T MIN to T MAX , unless otherwise noted.)Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.Voltage Referenced to GNDV+......................................................................................+44V V-.........................................................................................-44V V+ to V-..............................................................................+44V V L ...................................................(GND - 0.3V) to (V+ + 0.3V)Digital Inputs V S_V D_ (Note 1)...................(V- - 2V) to (V+ + 2V)or 30mA (whichever occurs first)Continuous Current (any terminal)......................................30mA Peak Current, S_ or D_(pulsed at 1ms, 10% duty cycle max)...........................100mAContinuous Power Dissipation (T A = +70°C)Plastic DIP (derate 10.53mW/°C above +70°C).............842mW Narrow SO (derate 8.70mW/°C above +70°C).............696mW QSOP (derate 8.3mW/°C above +70°C).......................667mW Thin QFN (derate 33.3mW/°C above +70°C)..............2667mW TSSOP (derate 6.7mW/°C above +70°C).....................457mW Operating Temperature RangesMAX4613C_ _......................................................0°C to +70°C MAX4613E_ _...................................................-40°C to +85°C Storage Temperature Range.............................-65°C to +165°C Lead Temperature (soldering, 10sec).............................+300°CNote 1:Signals on S_, D_, or IN_ exceeding V+ or V- are clamped by internal diodes. Limit forward current to maximum current rating.MAX4613Quad, SPST Analog Switch_______________________________________________________________________________________3ELECTRICAL CHARACTERISTICS—Dual Supplies (continued)(V+ = 15V, V- = -15V, V L = 5V, GND = 0V, V INH = 2.4V, V INL = 0.8V, T A = T MIN to T MAX , unless otherwise noted.)ELECTRICAL CHARACTERISTICS—Single Supply(V+ = 12V, V- = 0V, V L = 5V, GND = 0V, V INH = 2.4V, V INL = 0.8V, T A = T MIN to T MAX , unless otherwise noted.)M A X 4613Quad, SPST Analog Switch 4_______________________________________________________________________________________ELECTRICAL CHARACTERISTICS—Single Supply (continued)(V+ = 12V, V- = 0, V L = 5V, GND = 0V, V INH = 2.4V, V INL = 0.8V, T A = T MIN to T MAX , unless otherwise noted.)Note 2:Typical values are for design aid only,are not guaranteed and are not subject to production testing. The algebraic convention,where the most negative value is a minimum and the most positive value a maximum, is used in this data sheet.Note 3:Guaranteed by design.Note 4:On-resistance match between channels and flatness are guaranteed only with bipolar-supply operation. Flatness is definedas the difference between the maximum and the minimum value of on-resistance as measured at the extremes of the speci-fied analog signal range.Note 5:Leakage parameters I S(OFF), I D(OFF), I D(ON), and I S(ON)are 100% tested at the maximum rated hot temperature and guaranteed at +25°C.Note 6:Off-Isolation Rejection Ratio = 20log (V D /V S ).Note 7:Between any two switches.__________________________________________Typical Operating Characteristics(T A = +25°C, unless otherwise noted.)O N L E A K A G E (n A )-2-112-15015V S , V D (V)-10-5510ON LEAKAGE CURRENTSO F F L E A K A G E (n A )-1-0.50.51V S , V D (V)-15015-10-5510OFF LEAKAGE CURRENTSV I N (V )0.51.52.02.53.03.5±5±10±15±20BIPOLAR SUPPLY VOLTAGE (V)SWITCHING THRESHOLD vs. BIPOLAR SUPPLY VOLTAGE02550751001255101520V D (V)R D S (O N ) (Ω)150ON-RESISTANCE vs. V D (UNIPOLAR SUPPLY VOLTAGE)R D S (O N ) (Ω)306090120-20-1001020V D (V)0ON-RESISTANCE vs. V D (BIPOLAR SUPPLY VOLTAGE)R D S (O N ) (Ω)020406080100V D (V)-15015-10-5510ON-RESISTANCE vs. V D (BIPOLAR SUPPLY VOLTAGE AND TEMPERATURE)MAX4613Quad, SPST Analog Switch_______________________________________________________________________________________5_____________________________Typical Operating Characteristics (continued)(T A = +25°C, unless otherwise noted.)255075100125150R D S (O N ) (Ω)4812V D (V)ON-RESISTANCE vs. V D (UNIPOLAR SUPPLY VOLTAGE AND TEMPERATURE)T I M E (n s )4080120160±5±10±15±20BIPOLAR SUPPLY VOLTAGE (V)SWITCHING TIME vs. BIPOLAR SUPPLY VOLTAGET I M E (n s )05010015020010152025UNIPOLAR SUPPLY VOLTAGE (V)SWITCHING TIME vs. UNIPOLAR SUPPLY VOLTAGEQ (p C )-200-102010-15-1001015V D (V)CHARGE INJECTION vs.V D VOLTAGEQ (p C )-105-551015V D (V)10CHARGE INJECTION vs.V D VOLTAGEM A X 4613Applications InformationGeneral Operation1)Switches are open when power is off.2)I N_, D_, and S_ should not exceed V+ or V-, even with the power off.3)Switch leakage is from each analog switch terminal to V+ or V-, not to other switch terminals.Operation with Supply VoltagesOther than ±15VUsing supply voltages less than ±15V will reduce the analog signal range. The MAX4613 operates with ±4.5V to ±20V bipolar supplies or with a +4.5V to +40V single supply; connect V- to GND when operating with a single supply. Also, all device types can operate with unbalanced supplies such as +24V and -5V. V L must be connected to +5V to be TTL compatible, or to V+ for CMOS-logic level inputs. The Typical Operating Characteristics graphs show typical on-resistance with ±20V, ±15V, ±10V, and ±5V supplies. (Switching times increase by a factor of two or more for operation at ±5V.)Overvoltage ProtectionProper power-supply sequencing is recommended for all CMOS devices. Do not exceed the absolute maximum ratings because stresses beyond the list-ed ratings may cause permanent damage to the devices. Always sequence V+ on first, followed byV L , V-, and logic inputs. If power-supply sequencing is not possible, add two small, external signal diodes in series with supply pins for overvoltage protection (Figure 1). Adding diodes reduces the analog signal range to 1V below V+ and 1V above V-, but low switch resistance and low leakage char-acteristics are unaffected. Device operation is unchanged, and the difference between V+ and V-should not exceed +44V.Quad, SPST Analog Switch 6_______________________________________________________________________________________Figure 1. Overvoltage Protection Using External Blocking DiodesMAX4613Quad, SPST Analog Switch_______________________________________________________________________________________7Figure 2. Switching TimeFigure 3. Break-Before-Make Test CircuitTiming Diagrams/Test Circuits____________________Revision HistoryPages changed at Rev 3: 1, 9, 10M A X 4613Quad, SPST Analog Switch 8________________________________________________________________________________________________________________________Timing Diagrams/Test Circuits (continued)Figure 5. Off-Isolation Rejection RatioFigure 6. CrosstalkFigure 7. Source/Drain-Off CapacitanceFigure 8. Source/Drain-On CapacitanceMAX4613Quad, SPST Analog Switch_______________________________________________________________________________________9Pin Configurations (continued)Package Information(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to /packages .)M A X 4613Quad, SPST Analog Switch Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.10____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600©2007 Maxim Integrated Productsis a registered trademark of Maxim Integrated Products.Package Information (continued)(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to /packages .)。

MAX5933C中文资料

ELECTRICAL CHARACTERISTICS
(VCC = +24V (MAX5947A/B/C), VCC = +48V (MAX5933A–MAX5933F), GND = 0V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
Power-Up Rate
Ordering Information
PART
TEMP RANGE PIN-PACKAGE
MAX5933_ESA*
-40°C to +85°C 8 SO
MAX5947_ESA*
-40°C to +85°C 8 SO
*Insert the desired suffix from the Selector Guide into the blank to complete the part number.
元器件交易网
MAX5933A–MAX5933F/MAX5947A/B/C
Positive High-Voltage, Hot-Swap Controllers
ABSOLUTE MAXIMUM RATINGS
(Voltages Referenced to GND) VCC .........................................................................-0.3V to +85V SENSE, FB, ON ..........................................-0.3V to (VCC + 0.3V) TIMER, PWRGD, PWRGD.......................................-0.3V to +85V GATE ......................................................................-0.3V to +95V Maximum GATE Current ....................................-50mA, +150mA Maximum Current into Any Other Pin................................±50mA

MAX5937AAESA资料

MAX5936/MAX5937-48V Hot-Swap Controllers with V INStep Immunity and No R SENSE________________________________________________________________Maxim Integrated Products 119-3281; Rev 1; 1/05For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at .General DescriptionThe MAX5936/MAX5937 are hot-swap controllers for -10V to -80V rails. The MAX5936/MAX5937 allow circuit line cards to be safely hot-plugged into a live back-plane without causing a glitch on the power supply.These devices integrate a circuit-breaker function requiring no R SENSE .The MAX5936/MAX5937 provide a controlled turn-on for circuit cards, limiting inrush, preventing glitches on the power-supply rail, and preventing damage to board connectors and components. Before startup, the devices perform a Load Probe™ test to detect the presence of a short-circuit condition. If a short-circuit condition does not exist, the device limits the inrush current drawn by the load by gradually turning on the external MOSFET. Once the external MOSFET is fully enhanced, the MAX5936/MAX5937 provides overcur-rent and short-circuit protection by monitoring the volt-age drop across the R DS(ON)of the external power MOSFET. The MAX5936/MAX5937 integrate a 400mA fast G ATE pulldown to guarantee that the power MOSFET is rapidly turned off in the event of an overcur-rent or short-circuit condition.The MAX5936/MAX5937 protect the system against input voltage (V IN ) steps by providing V IN step immuni-ty. The MAX5936/MAX5937 provide an accurate UVLO voltage. The MAX5936 has an open-drain, active-low PGOOD output and the MAX5937 has an open-drain,active-high PGOOD output.The MAX5936/MAX5937 are offered with 100mV,200mV, and 400mV circuit-breaker thresholds, in addi-tion to a non-circuit-breaker option. These devices are offered in latched and autoretry fault management, are available in 8-pin SO packages, and specified for the extended (-40°C to +85°C) temperature range (see the Selector Guide ).ApplicationsServersTelecom Line Cards Network Switches Solid-State Circuit Breaker Network RoutersFeatures♦-10V to -80V Operation ♦No R SENSE Required♦Drives Large Power MOSFETS♦Programmable Inrush Current Limit During Hot Plug ♦100mV, 200mV, 400mV, and No-Circuit-Breaker Threshold Options ♦Circuit-Breaker Fault with Transient Rejection ♦Shorted Load Detection (Load Probe) Before Power MOSFET Turn-On ♦±2.4% Accurate Undervoltage Lockout (UVLO)♦Autoretry and Latched Fault Management Available ♦Low Quiescent CurrentPin ConfigurationLoad Probe is a trademark of Maxim Integrated Products, Inc.Ordering InformationNote:The first “_” represents A for the autoretry and L for the latched fault management option.The second “_” represents the circuit-breaker threshold. See the Selector Guide for additional information.Selector Guide and Typical Operating Circuit appear at end of data sheet.M A X 5936/M A X 5937-48V Hot-Swap Controllers with V IN Step Immunity and No R SENSE 2_______________________________________________________________________________________ABSOLUTE MAXIMUM RATINGSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.V EE , V OUT , PGOOD (PGOOD ), LP,STEP_MON to GND............................................+0.3V to -85V PGOOD (PGOOD ) to V OUT ....................................-0.3V to +85V PGOOD (PGOOD ), LP, STEP_MON to V EE ............-0.3V to +85V GATE to V EE ...........................................................-0.3V to +20V UVLO to V EE .............................................................-0.3V to +6V Input CurrentLP (internally, duty-cycle limited).........................................1A PGOOD (PGOOD ) (continuous).....................................80mAGATE (during 15V clamp, continuous)...........................30mA GATE (during 2V clamp, continuous).............................50mA GATE (during gate pulldown, continuous)......................50mA Continuous Power Dissipation (T A = +70°C)8-Pin SO (derate 5.9mW/°C above +70°C)..................471mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature .....................................................+150°C Storage Temperature Range ............................-65°C to +150°C Lead Temperature (soldering, 10s) ................................+300°CELECTRICAL CHARACTERISTICS(V= -10V to -80V, V = GND - V , V =V , R = 200Ω, UVLO open, T = -40°C to +85°C, unless otherwise noted.MAX5936/MAX5937-48V Hot-Swap Controllers with V INStep Immunity and No R SENSEELECTRICAL CHARACTERISTICS (continued)M A X 5936/M A X 5937-48V Hot-Swap Controllers with V IN Step Immunity and No R SENSE 4_______________________________________________________________________________________Note 2:All limits are 100% tested at +25°C and +85°C. Limits at -40°C and -10°C are guaranteed by characterization.Note 3:Delay time from a valid on-condition until the load probe test begins.Note 4:V EE or UVLO voltages below V UVLO,F or V UVLO_REF,F , respectively, are ignored during this time.Note 5:The time (V OUT - V EE ) > V SC + overdrive until (V GATE - V EE ) drops to approximately 90% of its initial high value.Note 6:The time when the PGOOD (PGOOD ) condition is met until the PGOOD (PGOOD ) signal is asserted.ELECTRICAL CHARACTERISTICS (continued)MAX5936/MAX5937-48V Hot-Swap Controllers with V INStep Immunity and No R SENSE_______________________________________________________________________________________5SUPPLY CURRENT vs. INPUT VOLTAGEM A Z 5936 t o c 01INPUT VOLTAGE (V)S U P P L Y C U R R E N T (m A )7060405030200.20.40.60.81.01.21.41.61.82.001080SUPPLY CURRENT vs. TEMPERATURETEMPERATURE (°C)S U P P L Y C U R R E N T (m A )603510-150.20.40.60.81.01.20-4085GATE-DRIVE VOLTAGE vs. INPUT VOLTAGEM A X 536 t o c 03INPUT VOLTAGE (V)G A T E -D R I V E V O L T A G E (V )7060405030206.57.07.58.08.59.09.510.010.56.01080GATE PULLDOWN CURRENTvs. GATE VOLTAGEM A X 5936 t o c 04V GATE (V)G A T E P U L L D O W N C U R R E N T (m A )986723451501001502002503003504004505000010RETRY TIME vs. TEMPERATURETEMPERATURE (°C)R E T R Y T I M E (s )603510-153.13.23.33.43.53.63.73.83.94.03.0-4085STARTUP WAVEFORMMAX5936 toc0640ms/divV IN 50V/div V GATE 10V/div V OUT 50V/div I IN 2A/divV PGOOD 50V/div MAX5936_A CIRCUIT-BREAKER EVENTMAX5936 toc071ms/divV GATE 10V/divV OUT 50V/divI IN 2A/divV PGOOD 50V/div Typical Operating Characteristics(V EE = -48V, GND = 0V, V IN = GND - V EE , all voltages are referenced to V EE , T A = +25°C, unless otherwise noted.)M A X 5936/M A X 5937-48V Hot-Swap Controllers with V IN Step Immunity and No R SENSE 6_______________________________________________________________________________________MAX5936_A SHORT-CIRCUIT EVENTMAX5936 toc08400ns/divV GATE 10V/divV OUT 50V/div I IN10A/divV PGOOD 50V/divNORMALIZED CIRCUIT-BREAKER THRESHOLD vs. TEMPERATUREM A X 5936 t o c 09TEMPERATURE (°C)N O R M A L I Z E D C I R C U I T -B R E A K E R T H R E S H O L D (%)603510-150.60.81.01.21.41.60.4-4085V OUT SLEW RATE vs. TEMPERATURETEMPERATURE (°C)S L E W R A T E (V /m s )603510-155.56.0 6.57.07.58.08.59.09.510.05.0-4085MAX5936_A INPUT VOLTAGE STEP EVENT (NO FAULT)4ms/divGATE OUT IN V PGOOD IN R LOAD = 75ΩMAX5936_A INPUT VOLTAGESTEP EVENT (FAULT)4ms/divGATE OUT IN V PGOODIN R LOAD = 75ΩGATE TO V EE CLAMP VOLTAGEAT POWER OFFI SINK (mA)G A T E C L A M P I N G V O L T A G E (V )181614121086420.51.01.52.02.53.00020GATE TO V EE CLAMP VOLTAGE MOSFET FULLY ENHANCEDI SINK (mA)G A T E C L A M P I N G V O L T A G E (V )1816121446810291011121314151617188020Typical Operating Characteristics (continued)(V EE = -48V, GND = 0V, V IN = GND - V EE , all voltages are referenced to V EE , T A = +25°C, unless otherwise noted.)MAX5936/MAX5937-48V Hot-Swap Controllers with V INStep Immunity and No R SENSE_______________________________________________________________________________________7Detailed DescriptionThe MAX5936/MAX5937 hot-swap controllers incorpo-rate overcurrent fault management and are intended for negative-supply-rail applications. The MAX5936/MAX5937 eliminate the need for an external R SENSE and include V IN input-step protection and load probe,which prevents powering up into a shorted load. They are intended for negative 48V telecom power systems where low cost, flexibility, multifault management, and compact size are required. The MAX5936/MAX5937 are ideal for the widest range of systems from those requiring low current with small MOSFETs to high-current systems requiring large power MOSFETs and low on-resistance.The MAX5936/MAX5937 control an external n-channel power MOSFET placed in the negative supply path of an external load. When no power is applied, the GATE output of the MAX5936/MAX5937 clamps the V GS of the MOSFET to 2V, keeping the MOSFET turned off. When power is applied to the MAX5936/MAX5937, the 2Vdown device pulling G ATE to V EE and the V GS of the MOSFET to 0V. As shown in Figure 2, this transition enables the MAX5936/MAX5937 to keep the power MOSFET continually off during the board insertion phase when the circuit board first makes contact with the backplane. Without this clamp, the GATE output of a powered-down controller would be floating and the MOSFET reverse transfer capacitance (gate-to-drain)would pull up and turn on the MOSFET gate when the MOSFET drain is rapidly pulled up by the V IN step dur-ing backplane contact. The MAX5936/MAX5937 G ATE clamp can overcome the gate-to-drain capacitance of large power MOSFETs with added slew-rate control (C SLEW ) capacitors while eliminating the need for addi-tional gate-to-source capacitance. The MAX5936/MAX5937 will keep the MOSFET off indefinitely if the supply voltage is below the user-set UVLO threshold or if a short circuit is detected in the load connected to the drain of the power MOSFET.M A X 5936/M A X 5937-48V Hot-Swap Controllers with V IN Step Immunity and No R SENSE 8_______________________________________________________________________________________The MAX5936/MAX5937 conduct a load-probe test after contact transients from the hot plug-in have settled. This follows the MAX5936/MAX5937 power-up (when the UVLO condition has been met for 220ms (t LP )) and prior to the turn-on of the power MOSFET. This test pulls a user-programmable current through the load (1A, max)for up to 220ms and tests for a voltage of 200mV across the load at V OUT . This current is set by an external resis-tor, R LP , between V OUT and LP (Figure 14). When the voltage across the load exceeds 200mV, the test is trun-cated and the GATE turn-on sequence is started. If at the end of the 220ms test period the voltage across the load has not reached 200mV, the load is assumed to be short-ed and the current to the load from the LP pin is shut off.The MAX5936A_/MAX5937A_ will timeout for 16 x t LP then retry the load-probe test. The MAX5936L_/MAX5937L_ will latch the fault condition indefinitely untilthe UVLO is brought below 1.125V for 1.5ms or the power is recycled. See the Applications Information section for recommendations on selecting R LP to set the current level.Upon successful completion of the load-probe test, the MAX5936/MAX5937 enter the power-up GATE cycle and begin ramping the G ATE voltage with a 52µA current source. This current source is restricted if V OUT begins to ramp down faster than the default 9V/ms slew rate.Charging up G ATE enhances the power MOSFET in a controlled manner and ramping V OUT at a user-settable rate controls the inrush current from the backplane. The MAX5936/MAX5937 continue to charge up the G ATE until one of two events occurs: a normal power-up GATE cycle is completed or a power-up to fault management is detected (see the GATE Cycles section in Appendix A ).Figure 1. Functional Block DiagramMAX5936/MAX5937-48V Hot-Swap Controllers with V INStep Immunity and No R SENSE_______________________________________________________________________________________9In a normal power-up GATE cycle, the voltage at V OUT (referenced to V EE ) ramps to below 72% of the circuit-breaker threshold voltage, V CB . At this time, the remaining GATE voltage is rapidly pulled up to full enhancement.PGOOD is asserted 1.26ms after GATE is fully enhanced (see Figure 4). If the voltage at V OUT remains above 72%of the V CB (when GATE reaches 90% of full enhance-ment), then a power-up to fault management fault has occurred (see Figure 5). GATE is rapidly pulled to V EE ,turning off the power MOSFET and disconnecting the load. PGOOD remains deasserted and the MAX5936/MAX5937 enter the fault management mode.When the power MOSFET is fully enhanced, the MAX5936/MAX5937 monitor the drain voltage (V OUT ) for circuit-breaker and short-circuit faults. The MAX5936/MAX5937 make use of the power MOSFET’s R DS(ON) as the current-sense resistance to detect excessive current through the load. The short-circuit threshold voltage,V SC , is twice V CB (V SC = 2 x V CB ) and is available in 100mV, 200mV, and 400mV thresholds. V CB and V SC are temperature-compensated (increasing with tempera-ture) to track the normalized temperature coefficient of R DS(ON) for typical power MOSFETs.When the load current is increased during full enhance-ment, this causes V OUT to exceed V CB but remains less than V SC , and starts the 1.2ms circuit-breaker glitch rejection timer. At the end of the glitch rejection period,if V OUT still exceeds V CB , the G ATE is immediately pulled to V EE (330ns), PGOOD (PGOOD ) is deasserted,and the part enters fault management. Alternatively,during full enhancement when V OUT exceeds V SC ,there is no glitch rejection timer. G ATE is immediately pulled to V EE , PG OOD is deasserted, and the part enters fault management.Figure 3. Load Probe Test During Initial Power-Up40ms/divV 20V/divV 20V/divV 20V/divALL VOLTAGESREFERENCED TO GND Figure 2. GATE Voltage Clamp During Power-Up 4ms/divC IN = 100µFFigure 4. MAX5936 Normal Condition 40ms/divFigure 5. MAX5936 Startup in Fault Condition40ms/divM A X 5936/M A X 5937-48V Hot-Swap Controllers with V IN Step Immunity and No R SENSE10______________________________________________________________________________________The V IN step immunity provides a means for transition-ing through a large step increase in V IN with minimal backplane inrush current and without shutting down the load. Without V IN step immunity (when the power MOSFET is fully enhanced), a step increase in V IN will result in a high inrush current and a large step in V OUT ,which can trip the circuit breaker. With V IN step immu-nity, the STEP_MON input detects the step before a short circuit is detected at V OUT and alters the MAX5936/MAX5937 response to V OUT exceeding V SC due to the step. The 1.25V voltage threshold at STEP_MON and a 10µA current source at STEP_MON allow the user to set the sensitivity of the step detection with an external resistor to V EE . A capacitor is placed between GND and the STEP_MON input, which, in con-junction with the resistor, sets the STEP_MON time con-stant. When a step is detected by the STEP_MON input to rise above its threshold (STEP TH ), the overcurrent fault management is blocked and remains blocked as long as STEP TH is exceeded. When STEP TH is exceed-ed, the MAX5936/MAX5937 take no action until V OUT rises above V SC or above V CB for the 1.2ms circuit-breaker glitch rejection period. When either of these conditions occurs, a step G ATE cycle begins and the GATE is immediately brought to V EE , which turns off the power MOSFET to minimize the resulting inrush current surge from the backplane and PGOOD remains assert-ed. GATE is held at V EE for 350µs, and after about 1ms,begins to ramp up thereby enhancing the power MOSFET in a controlled manner as in the power-up G ATE cycle. This provides a controlled inrush current to charge the load capacitance to the new supply volt-age (see the GATE Cycles section in Appendix A ).As in the case of the power-up G ATE cycle, if V OUT drops to less than 72% of the programmed V CB , inde-pendent of the state of STEP_MON, the G ATE voltageis rapidly pulled to full enhancement. PGOOD remains asserted throughout the step. Otherwise, if the STEP_MON input has decayed below its threshold but V OUT remains above 72% of the programmed V CB (when G ATE reaches 90% of full enhancement), (a step-to-fault management fault has occurred). GATE is rapidly pulled to V EE , turning off the power MOSFET and disconnecting the load, PG OOD (PGOOD ) is deasserted, and the MAX5936/MAX5937 enter the fault management mode.Fault ManagementFault management can be triggered by the following conditions:•V OUT exceeds 72% of V CB during G ATE ramp at 90% of full enhancement,•V OUT exceeds the V CB for longer than 1.2ms during full enhancement,•V OUT exceeds the V SC during full enhancement, and •Load-probe test fails.Once in the fault management mode, GATE will always be pulled to V EE to turn off the external MOSFET and PG OOD (PGOOD ) will always be deasserted. The MAX5936A_/MAX5937A_ have automatic retry following a fault while the MAX5936L_/MAX5937L remain latched in the fault condition.Autoretry Fault Management(MAX5936A_/MAX5937A_)If the MAX5936A_/MAX5937A_entered fault management due to circuit-breaker and short-circuit faults, the autoretry timer starts immediately. The timer times out in 3.5s (typ) and at the end of the timeout, the sequencer initiates a load-probe test. If this is successful, it starts a normal power-up GATE cycle.Figure 6. MAX5936 Response to a Step Input (V OUT < 0.74V CB )2ms/divC LOAD = 100µF R LOAD = 100ΩFigure 7. MAX5936 Response to a Step Input (V OUT > 0.74V CB )4ms/div40V 20VC LOAD = 100µF R LOAD = 20ΩMAX5936/MAX5937-48V Hot-Swap Controllers with V INStep Immunity and No R SENSE______________________________________________________________________________________11Latched Fault Management (MAX5936L_/MAX5937L_)When the MAX5936L_/MAX5937L_ enter fault manage-ment, they remain in this condition indefinitely until the power is recycled or until UVLO is brought below 1.125V for 1.5ms (typ) (when the short-circuit or circuit-breaker fault has cleared, the sequencer initiates a load-probe test). If this is successful, it starts a normal power-up GATE cycle. A manual reset circuit (Figure 8)can be used to clear the latch.Circuit-Breaker ThresholdsThe MAX5936/MAX5937 are available with 100mV,200mV, and 400mV circuit-breaker thresholds. The short-circuit voltage threshold (V SC ) is twice the circuit-breaker threshold voltage (V CB ). In the MAX5936/MAX5937, V CB and V SC are temperature-compensated (increasing with temperature) to track the normalized temperature gradient of typical power MOSFETs.The proper circuit-breaker threshold for an application depends on the R DS(ON) of the external power MOSFET and the maximum current the load is expected to draw.To avoid false fault indication and dropping of the load,the designer must take into account the load response to voltage ripples and noise from the backplane power supply, as well as switching currents in the downstream DC-DC converter that is loading the circuit. While the circuit-breaker threshold has glitch rejection that ignores ripples and noise lasting less than 1.2ms, the short-circuit detection is designed to respond very quickly (less than 330ns) to a short circuit. V SC and V CB must be selected from the three available rangeswith an adequate margin to cover all possible ripples,noise, and system current transients.The short-circuit and circuit-breaker voltages are sensed at V OUT , which is the drain of the power MOSFET. The R DS(ON)of the MOSFET is the current-sense resis-tance, so the total current through the load and load capacitance is the drain current of the power MOSFET.Accordingly, the voltage at V OUT as a function of MOSFET drain current is:V OUT = I D,MOSFET x R DS(ON)The temperature compensation of the MAX5936/MAX5937 is designed to track the R DS(ON) of the typi-cal power MOSFET. Figure 9 shows the typical normal-ized tempco of the circuit-breaker threshold along with the normalized tempco of R DS(ON) for two typical power MOSFETS. When determining the circuit-breaker threshold in an application, go to the data sheet of the power MOSFET and locate the manufacturer’s maxi-mum R DS(ON)at +25°C with a V GS of 10V. Next, find the figure presenting the tempco of normalized R DS(ON)or on-resistance vs. temperature. Because this curve is in normalized units typically with a value of 1 at +25°C,it is possible to multiply the curve by the drain voltage at +25°C and convert the curve to drain voltage. Now compare this curve to that of the MAX5936/MAX5937 normalized tempco of the circuit-breaker threshold to make a determination of the tracking error in mV between the power MOSFET [I D,MOSFET x R DS(ON)]and the MAX5936/MAX5937 over the application’s operating temperature range. If the tempco of the power MOSFET is greater than that of the MAX5936/MAX5937, then additional margin will be required in selecting the circuit-breaker and short-circuit voltages at higher temperatures as compared to +25°C. When dissipation in the power MOSFET is expected to lead to local temperature elevation relative to ambient condi-tions, then it becomes imperative that the MAX5936/MAX5937 be located as close as possible to the power MOSFET. The marginal effect of temperature differ-ences on circuit-breaker and short-circuit voltages can be estimated from a comparative plot such as Figure 9.MAX5936LN and MAX5937LNThe MAX5936LN and MAX5937LN do not have circuit-breaker and short-circuit thresholds and these faults are ignored. For these devices PG OOD (PGOOD )asserts 1.26ms after G ATE has ramped to 90% of full enhancement. The step detection function of the MAX5936LN and MAX5937LN responds to V IN and V OUT steps with the same voltage thresholds as the MAX5936_C and MAX5937_C.Figure 8. Resetting MAX5936L/MAX5937L after a Fault Condition Using a Push-Button SwitchM A X 5936/M A X 5937-48V Hot-Swap Controllers with V IN Step Immunity and No R SENSE12______________________________________________________________________________________PGOOD (PGOOD ) Open-Drain OutputThe power-good outputs, PG OOD (PGOOD ), are open drain and are referenced to V OUT . They assert and latch if V OUT ramps below 72% of V CB , and with the built-in delay this occurs 1.26ms after the external MOSFET becomes fully enhanced. PG OOD (PGOOD ) deasserts any time the part enters fault management. PG OOD (PGOOD ) has a delayed response to UVLO. The GATE goes to V EE when UVLO is brought below 1.125V for 1.5ms. This turns off the power MOSFET and allows V OUT to rise depending on the RC time constant of the load. PG OOD (PGOOD ), in this situation, deasserts when V OUT rises above V CB for more than 1.4ms or above V SC , whichever occurs first (see Figure 12b).Due to the open-drain driver, PG OOD (PGOOD )requires an external pullup resistor to GND. Due to this external pullup, PG OOD will not follow positive V IN steps as well as if it were driven by an active pullup. As a result, when PG OOD (PGOOD) is asserted high, an apparent negative glitch appears at PGOOD (PGOOD )during a positive V IN step. This negative glitch is a result of the RC time constant of the external resistor and the PGOOD pin capacitance lagging the V IN step.It is not due to switching of the internal logic. To mini-mize this negative transient, it may be necessary to increase the pullup current and/or to add a small amount of capacitance from PGOOD (PGOOD ) to GND to compensate for the pin capacitance.WARNING:For the MAX5936_N/MAX5937_N, PGOOD (PGOOD ) asserts 1.26ms after the power MOSFET is fully enhanced, independent of V OUT . Once the MOSFET is fully enhanced and UVLO is pulled below its respective threshold, G ATE pulls to V EE to turn off the power MOSFET and disconnect the load. When UVLO is cycled low, PG OOD (PGOOD ) is deasserted. In sum-mary, once the MOSFET is fully enhanced, the MAX5936_N/ MAX5937_N ignore V OUT and deassert PG OOD (PGOOD ) when UVLO goes low or when the power to the MAX5936_N/ MAX5937_N is fully recy-cled.Undervoltage Lockout (UVLO)UVLO provides an accurate means to set the turn-on volt-age level for the MAX5936/MAX5937. Use a resistor-divider network from G ND to V EE to set the desired turn-on voltage (Figure 11). UVLO has hysteresis with a rising threshold of 1.25V and a falling threshold of 1.125V.A startup delay of 220ms allows contacts and voltages to settle prior to initiating the startup sequence (Figure 12a).Figure 9. MAX5936/MAX5937 Normalized Circuit-Breaker Threshold (V CB )Figure 10. Circuit-Breaker Voltage Margin for High and Low Tempco Power MOSFETSMAX5936/MAX5937-48V Hot-Swap Controllers with V INStep Immunity and No R SENSE______________________________________________________________________________________13This startup delay is from a valid UVLO condition until the start of the load-probe test. There is glitch rejection on UVLO going low, which requires that V UVLO remains below its falling threshold for 1.5ms to turn off the part (Figure 12b). Use the following formula to calculate the MAX5936/MAX59337 turn-on voltage:Where V ON is the desired turn-on voltage of theMAX5936/MAX5937 and V UVLO_REF,R is the 1.25V UVLO rising threshold.Output Voltage (V OUT )Slew-Rate ControlThe V OUT slew rate controls the inrush current required to charge the load capacitor. The MAX5936/MAX5937have a default internal slew rate set for 9V/ms. The inter-nal circuit establishing this slew rate accommodates up to about 1000pF of reverse transfer capacitance (miller capacitance) in the external power MOSFET without effecting the default slew rate. Using the default slew rate, the inrush current required to charge the load capacitance is given by:I INRUSH (mA) = C LOAD (µF) x SR (V/ms)where SR = 9V/ms (default, typ).Applications InformationSelecting Resistor and Capacitorfor Step MonitorWhen a positive V IN step or ramp occurs, the V IN increase results in a voltage rise at both STEP_MON and V OUT relative to V EE . When the voltage at STEP_MON is above STEP TH the MAX5936/MAX5937block short-circuit and circuit-breaker faults. During this STEP_MON high condition, if V OUT rises above V SC , the MAX5936/MAX5937 immediately and very rapidly pull GATE to V EE . This turns off the power MOSFET to avoid inrush current spiking. G ATE is held low for 350µs.About 1ms after the start of G ATE pulldown, the MAX5936/MAX5937 begin to ramp GATE up to turn on the MOSFET in a controlled manner, which results in ramping V OUT down to the new supply level (see the GATE Cycles section in Appendix A ).Figure 11. Setting the MAX5936/MAX5937 Turn-On VoltageFigure 12. UVLO Timing Diagram。

MAX5939GESA中文资料

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at .
元器件交易网
-48V Hot-Swap Controllers with External RSENSE and High Gate Pulldown Current MAX5921/MAX5939
ABSOLUTE MAXIMUM RATINGS
All Voltages Are Referenced to VEE, Unless Otherwise Noted Supply Voltage (VDD - VEE )................................-0.3V to +100V DRAIN, PWRGD, PWRGD ....................................-0.3V to +100V PWRGD to DRAIN .............................................… -0.3V to +95V PWRGD to VDD .......................................................-95V to +85V SENSE (Internally Clamped) .................................-0.3V to +1.0V GATE (Internally Clamped) ....................................-0.3V to +18V UV and OV..............................................................-0.3V to +60V Current into SENSE...........................................................+40mA Current into GATE...........................................................+300mA Current into Any Other Pin................................................+20mA Continuous Power Dissipation (TA = +70°C) 8-Pin SO (derate 5.9mW/°C above +70°C)..................471mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature .....................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C

1SMA5930BT3中文资料

1. FR4 Board, using Motorola minimum recommended footprint, as shown in case 403B outline dimensions spec. 2. Non–repetitive current pulse. 3. Measured on 8.3 ms single half sine–wave or equivalent square wave, duty cycle = 4 pulse per minute maximum.
元器件交易网
Rating and Typical Characteristic Curves (TA = 25°C)
4 100
PD , MAXIMUM POWER DISSIPATION (WATTS)
IZ, ZENER CURRENT (mA) 125 150
3.2
10
813B 814B 815B 816B 817B 818B 819B 820B 821B 822B 823B 824B 825B 826B 827B 828B 829B 830B 831B 832B 833B 834B 835B 836B 837B 838B 839B 840B 841B 842B 843B 844B 845B
NOTE: Tolerance and Voltage Designation Tolerance designation – The type number listed indicates a tolerance of ±5%.
MOTOROLA 2
1SMA5913BT3 through 1SMA5945BT3
1SMA5913BT3 1SMA5914BT3 1SMA5915BT3 1SMA5916BT3 1SMA5917BT3 1SMA5918BT3 1SMA5919BT3 1SMA5920BT3 1SMA5921BT3 1SMA5922BT3 1SMA5923BT3 1SMA5924BT3 1SMA5925BT3 1SMA5926BT3 1SMA5927BT3 1SMA5928BT3 1SMA5929BT3 1SMA5930BT3 1SMA5931BT3 1SMA5932BT3 1SMA5933BT3 1SMA5934BT3 1SMA5935BT3 1SMA5936BT3 1SMA5937BT3 1SMA5938BT3 1SMA5939BT3 1SMA5940BT3 1SMA5941BT3 1SMA5942BT3 1SMA5943BT3 1SMA5944BT3 1SMA5945BT3

MAX3243EEWI中文资料

AutoShutdown is a trademark of Maxim Integrated Products. †Covered by U.S. Patent numbers 4,636,930; 4,679,134; 4,777,577; 4,797,899; 4,809,152; 4,897,774; 4,999,761; 5,649,210; and other patents pending.
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: , or phone 1-800-998-8800. For small orders, phone 408-737-7600 ext. 3468.
Selector Guide
NO. OF VCC RANGE DRIVERS/ (V) RECEIVERS 1/1 2/2 3/5 3.0 to 5.5 3.0 to 5.5 3.0 to 5.5 AUTOSHUTDOWN
Pin Configurations appear at end of data sheet. Typical Operating Circuits appear at end of data sheet.
VCC to GND ..............................................................-0.3V to +6V V+ to GND (Note 1) ..................................................-0.3V to +7V V- to GND (Note 1) ...................................................+0.3V to -7V V+ + |V-| (Note 1) .................................................................+13V Input Voltages T_IN, EN, FORCEON, FORCEOFF to GND ............-0.3V to +6V R_IN to GND ......................................................................±25V Output Voltages T_OUT to GND................................................................±13.2V R_OUT, R2OUTB, INVALID to GND .........-0.3V to (VCC + 0.3V) Short-Circuit Duration T_OUT to GND .........................................................Continuous Continuous Power Dissipation (TA = +70°C) 16-Pin SSOP (derate 7.14mW/°C above +70°C) ...........571mW 20-Pin Plastic DIP (derate 11.11mW/°C above +70°C)....889mW 20-Pin SSOP (derate 8.00mW/°C above +70°C) ...........640mW 28-Pin Wide SO (derate 12.50mW/°C above +70°C)............1W 28-Pin SSOP (derate 9.52mW/°C above +70°C)............762mW Operating Temperature Ranges MAX32_ _EC_ _ ....................................................0°C to +70°C MAX32_ _EE_ _..................................................-40°C to +85°C Storage Temperature Range .............................-65°C to +160°C Lead Temperature (soldering, 10sec) .............................+300°C