升压芯片之ST777_DataSheet
ST777中文资料
1/11October 2002s1V TO 6V INPUT GUARANTEES START-UP UNDER LOADsMAXIMUM OUTPUT CURRENT OF 300mA (778OR 779ADJUSTED TO 3V)sLOAD FULLY DISCONNECTED IN SHUTDOWNs TYPICAL EFFICIENCY OF 82%sINTERNAL 1A POWER SWITCH AND SYNCHRONOUS RECTIFIERsADJUSTABLE CURRENT LIMIT ALLOWS LOW-COST INDUCTORSs SUPPLY CURRENT OF 270µA (NO LOAD)s SHUTDOWN SUPPLY CURRENT 20µA sPACKAGE AVAILABLE:DIP-8AND SO-8DESCRIPTIONThe ST777/778/779are dc-dc converters that step-up from low voltage inputs requiring only three external components,an inductor (typically 22µH)and two capacitors.The device include a Sinchronous Rectifier that eliminates the need for an external catch diode,and allows regulation even when the input is greater than the output.Unlike others step-up DC-DC converters the ST777/778/779’s Sinchronous Rectifier turns off in the shutdown mode,fully disconnecting the output from the source.This eliminates the current drain associated with conventional step-up converters when off or in shutdown.Supply current is 270µA under no load and only 20µA in stand by mode.ST777/778/779LOW VOLTAGE INPUT,3-3.3V/5V/ADJUSTABLE OUTPUT DC-DC CONVERTER WITH SYNCHRONOUS RECTIFIERV INV O22µH100µF100µFR LIMI LIM L XINOUT PGND SEL AGND12345678SHDN1.25VVREFSHUTDOWN CONTROLDELAY TIMERDELAY TIMERt OFFt ONSWITCH DRIVERACTIVE RECTIFIERRECTIFIER CONTROL1:NSCHEMATIC DIAGRAMST777/778/7792/11ABSOLUTE MAXIMUM RATINGSAbsolute Maximum Ratings are those values beyond which damage to the device may occur.Functional operation under these condition is not implied.ORDERING CODESCONNECTION DIAGRAMPIN CONNECTIONSTHERMAL DATASymbol ParameterValue Unit V CCDC Input Voltage to GND -0.3to +7V LXSwitch off Pin Voltage -0.3to +7V Switch on Pin Voltage 30sec short to IN or OUTOUT,SHDN Output,Shutdown Voltage -0.3to +7V AGND to PGNDAnalog and Power Ground -0.3to +0.3V FBFB Pin Voltage-0.3to (OUT+0.3)V P TOT Continuous Power Dissipation (at T A =85°C)DIP-8550mW Continuous Power Dissipation (at T A =85°C)SO-8344T STG Storage Temperature Range-40to 150°C T OPOperating Ambient Temperature Range0to 85°CTYPE DIP-8SO-8ST777ST777ACN ST777ACD ST778ST778ACN ST778ACD ST779ST779ACNST779ACDPin No.SYMBOL NAME AND FUNCTION1ILIM Sets switch current limit input.Connect to IN for 1A current limit.A resistor from ILIM to IN sets lower peak inductor currents.2IN Input from battery3AGND Analog ground.Not internally connected to PGND.4PGND Power ground.Must be low impedance;solder directly to ground plane or star ground.Connect to AGND,close to the device.5LX Collector of 1A NPN power switch and emitter of Sinchronous Rectifier PNP .6OUT Voltage Output.Connect filter capacitor close to pin.7SHDNShutdown input disables power supply when low.Also disconnets load from input.Threshold is set at V IN /2.8SEL/N.C./FB -Selection pin for 3/3.3V version (778);-Not internally connected for 5V version (777);-Feedback pin for adjustable version (779).Symbol ParameterDIP-8SO-8Unit R thj-ambThermal Resistance Junction-ambient100160°C/WST777/778/7793/11ELECTRICAL CHARACTERISTICS (V IN =2.5V,C I =22µF,C O =100µF,SHDN and ILIM connected to IN,AGND connected to PGND,T A =0to 85°C,unless otherwise specified.Typical values are referred at T A =25°C)Note 1:Output in regulation,V OUT =V OUT (nominal)± 4%.Note 2:At hight V IN to V OUT differentials,the maximum load current is limited by the maximum allowable power dissipation in the package.Note 3:Start-up guaranteed under these load conditions.Note 4:Minimum value is production tested.Maximum value is guaranteed by design and is not production tested.Note 5:In the ST779supply current depends on the resistor divider used to set the output voltage.Note 6:V OUT is set to a target value of +5V by 0.1%external feedback resistors.V OUT is measured to be 5V±2.5%to guarantee the error comparator trip point.Symbol Parameter Test ConditionsMin.Typ.Max.Unit V START Start up Voltage I LOAD <10mA,T A =25°C (Note 1)1V V IN(MAX)Maximum Input Voltage (Note 1,2)6V V OOutput Voltage ST777779(set to 5V),(Note 3)I LOAD ≤ 30mA,V IN = 1.1V to 5V or I LOAD ≤ 80mA,V IN = 1.8V to 5V or I LOAD ≤ 130mA,V IN = 2.4V to 5V 4.85.05.2VOutput Voltage ST778(Note 3)SEL=0VI LOAD ≤ 50mA,V IN =1.1V to 3.3V or I LOAD ≤ 210mA,V IN =1.8V to 3.3V or I LOAD ≤ 300mA,V IN =2.4V to 3.3V 3.17 3.30 3.43VSEL=OPENI LOAD ≤ 30mA,V IN =1.1V to 3V or I LOAD ≤ 210mA,V IN =1.8V to 3V or I LOAD ≤ 300mA,V IN =2.4V to 3V2.883.00 3.12VOutput Voltage Range ST779(Note 4)2.76.5V I IN No Load Supply Current I LOAD =0mA,(Switch ON)(Note 5)270µAI SHDN Shutdown Supply Current SHDN=0V,(Switch OFF)2035µA I IN SHDNShutdown Input Current SHDN =0to V IN 15100nA SHDN =V IN to 5V 1240µA υEfficiencyI LOAD =100mA 82%V IH Shutdown Input Threshold V IN =1V to 6VV IN /2+0.25V I LIMCurrent Limit1.0A I LIM TEMPCO Current Limit TemperatureCoefficient-0.3%/°C t OFFMIN Minimum Switch Off Time 1.2µst ONMAXMaximum Switch ON TimeV IN =2.5V 4.5V IN =1.8V 6.5V IN =1V15V CESAT NPN Switch saturation VoltageI SW =400mA 0.25VI SW =600mA 0.33I SW =1000mA0.5V CESAT NPN Rectifier Forward DropI SW =400mA 0.18V I SW =600mA 0.22I SW =1000mA0.4V FB Error Comparator Trip Point ST779,over operating inputvoltage (Note 6)1.23±2%V I FB FB Pin Bias Current ST779,V FB =1.3V 50nA I LXSwitch Off Leakage Current 0.1µA Rectifier Off Leakage Current0.1µAST777/778/7794/11TYPICAL APPLICATION CIRCUITAPPLICATIONS INFORMATIONR1and R2must be placed only in ST779applications to set the output voltage according to the following equation:V OUT =(1.23)[(R1+R2)/R2]and to simplify the resistor selection:R1=R2[(V OUT /1.23)-1]It is possible to use a wide range of values for R2(10K Ωto 50K Ω)with no significant loss of accuracy thanks to the very low FB input current.To have 1%error,the current through R2must be at least 100times FB’s bias current.When large values are used for the feedback resistors (R1>50K Ω),stray output impedance at FB can incidentally add "lag"to the feedback response,destabilizing the regulator and creating a larger ripple at the output.Lead lengths and circuit board traces at the FB node should be kept pensate the loop by adding a "lead"compensation capacitor (C3,100pF to 1nF)in parallel with R1.The typical value of the L1inductor is 22µH,enough for most applications.However,are also suitable values ranging from 10µF to 47µF with a saturation rating equal to or greater than the peak switch -current limit.Efficiency will be reduced if the inductor works near its saturation limit,while will be maximized using an inductor with a low DC resistance,preferably under 0.2Ω.Connecting ILIM to V IN the maximum LX current limit (1A)is set.If this maximum value is not required is possible to reduce it connecting a resistor between ILIM and V IN (See Figure 16to choose the right value).The current limit value is misured when the switch current through the inductor begins to flatten and does’nt coincide with the max short circuit current.Even if the device is designed to tolerate a short circuit without any damage,it is strictly recommended to avoid a continuos and durable short circuit of the output to GND.To achieve the best performances from switching power supply topology,particular care to layout drawing is needed,in order to minimize EMI and obtain low noise.Moreover,jitter free operation ensures the full device functionality.Wire lengths must be minimized,filter and by-pass capacitors must be low ESR type,placed as close as possible to the integrated circuit.Solder AGND and PGND pins directly to a ground plane.ST777/778/7795/11TYPICAL CHARACTERISTICS (unless otherwise specified T j =25°C,C I =22µF,C O =100µF)Figure 1:Output Voltage vs TemperatureFigure 2:Output Voltage vs Temperature Figure 3:Efficiency vs Temperature Figure 4:Efficiency vs Input VoltageFigure 5:Efficiency vs Output CurrentFigure 6:Efficiency vs Low OutputCurrentST777/778/7796/11Figure 7:No Load Supply Current vs Input VoltageFigure 8:No Load Supply Current vs Temperature Figure 9:Shutdown Input Threshold vs Input VoltageFigure 10:Minimum Switch Off Time vs TemperatureFigure 11:Maximum Switch ON Time vs TemperatureFigure 12:FB Pin Bias Current vsTemperatureST777/778/7797/11Figure 13:Error Comparator Trip Point vs TemperatureFigure 14:Maximum Output Current vs Input Voltage Figure 15:Maximum Output Current vs Input VoltageFigure 16:Peak Inductor Current vs Current-LimitResistorST777/778/7798/11Figure 17:Line TransientFigure 18:Load Transient Figure 19:Switching WaveformFigure 20:Switching WaveformPRINTED DEMOBOARD (Not in scale)VoutVinVout (5V)IoutST777/779Vin=2.5VIout=10m A to 130m AVoutIswVin=1.1V Iout=30mAVoutIswVin=2.5VIout=30mA元器件交易网ST777/778/779 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for theconsequences of use of such information nor for any infringement of patents or other rights of third parties which may result fromits use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specificationsmentioned in this publication are subject to change without notice. This publication supersedes and replaces all informationpreviously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices orsystems without express written approval of STMicroelectronics.© The ST logo is a registered trademark of STMicroelectronics© 2002 STMicroelectronics - Printed in Italy - All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - MoroccoSingapore - Spain - Sweden - Switzerland - United Kingdom - United States.© 11/11。
T5557 DATASHEET
终结符是为码的开始和结束作标记的特殊阻尼型式，有两种类型：每个区前面的区终结符和始终随着最后区 的序列终结符。
e5550- 能共处的序列终结符由 1 ～4位周期数据值由所组成 。 在秒期间而且第四位时期, 调制被关上 (曼彻斯特编码–转变在)之上. 双相调制数据区段需要先固定的而且在组合中拖位序列，终结符被可靠的识别。
○6 可追溯数据结构图
T5557的 操 作 （Operating the T5557）
设定初值和上电复位延迟（Initialization and POR Delay）
上电复位(POR)电路保持活跃的直到到达一个适当的电压门槛。接着触发缺省的初始延迟序列。 在大约 192个场
频时钟期间，T5557 在存储器EEPROM 块 0 中的数据配置被初始化，并在存储区块 0 中储存。(见下图 )
记忆体是 330 bit 的 EEPROM, 被安排在 10 个块中，每个块有 33 bit，包括锁 bit 被同时规划。 第 0 页中的 0 块包含模式/配置数据, 在正常读操作期间是不被传输的。 第 0 页的块 7 可以被用户当做写保 护密码使用，即被保护的块值将不能改写，与最大区块的显示值配合，可设置某块值或第7块值不可见。
★ 从线卷感应到的 AC 电压经整流器变换出直流电压； ★ 时钟提取； ★为使IC到读取单元的数据传输（读），在线圈1、线圈 2 间可转换的负载； ★为使读取单元进入IC的数据传输（写）而设计的场中断间隙检测器； ★ ESD 保护电路。
数 据 速 率 发 生 器 （Data-rate Generator）
控 制 器 （Controller）
ST735SCD,ST735SCD, 规格书,Datasheet 资料
1/11October 2002sCONVERTS +4.0V TO +6.2V INPUT TO -5V OUTPUT (735S)OR +3.5V TO +9.0V TO A NEGATIVE ADJUSTABLE OUTPUT (735T)s 1W GUARANTEED OUTPUT POWER s 72%TYPICAL EFFICIENCY s 0.8mA QUIESCENT CURRENT s 1µA SHUTDOWN MODEs 300KHZ FIXED FREQUENCY OSCILLATOR s CURRENT MODE PWM CONVERTER s LOW NOISE AND JITTER s SOFT STARTs SIMPLE APPLICATION CIRCUIT sUNDERVOLTAGE LOCKOUT (735S)DESCRIPTIONThe ST735S/ST735T is a Bi-CMOS,inverting switch mode DC-DC regulator with internal Power MOSFET that generates a fixed -5V (S version)or a negative adjustable (T version)output voltage from a 4V (3.5V for the 735T)to 6.2V input voltage (9V for the 735T);is guaranteed an output current of 200mA for inputs greater than 4.5V.The quiescent current for this device is typically of 0.8mA and,in shutdown mode it is reduced to1µA.These power-conserving features,along with high efficiency and applications circuits,thaT lend itself to minaturization,make the ST735S/ST735T excellent in a broad range of on-card,HDD and portable equipment applications.These device employ a high performance current mode pulse with modulation (PWM)control scheme to provide tight output voltage regulation and low noise.The fixed frequency oscillator is factory trimmed to 300KHz,allowing for easy noise filtering.The regulator in production is tested to guarantee an output accuracy within ±5%over all specified conditions.ST735S ST735T300kHz,-5V/ADJ INVERTING,NEGATIVE OUTPUTCURRENT-MODE PWMREGULATORl c -O bs o e t eP r od u t (sl c )Ob so e t et eP r od u t (sST735S/ST735T2/11ABSOLUTE MAXIMUM RATINGSAbsolute Maximum Ratings are those values beyond which damage to the device may occur.Functional operation under these condition is not implied.Note 1:The input to output differential voltage is limited to V IN +|V OUT |<12.7VTHERMAL DATACONNECTION DIAGRAM (top view)PIN DESCRIPTIONSymbol ParameterValue Unit V IN DC Input Voltage (V IN to GND)for ST735S -0.3to +7V V IN DC Input Voltage (V IN to GND)for ST735T (Note 1)-0.3to +11V SHDN Shutdown Voltage (SHDN to GND)-0.3to V IN +0.3V V LX Switch Voltage (Lx to V IN )-12.5to +0.3V V FB Feedback Voltage (V OUT to GND)-11to +0.3V V OUT Output Voltage (V OUT to GND)-11to +0.3V Other Input Voltage (SS,CC to GND)-0.3to V ++0.3V I LX Peack Switch Current 2A P tot Power Dissipation at T j =70°C DIP-8725mW SO-8470T stg Storage Temperature Range-55to +150°CT opOperating Junction Temperature Range-40to +125°CSymbol ParameterDIP-8SO-8Unit R thj-caseThermal Resistance Junction-case28°C/WPin N°Symbol Name and Function1SHDN SHUT-DOWN Control (V CC =ON GND=Shutdown2V REF Reference Output Voltage 3SSSoft Start4CC Compensation Input 5V OUT Negative Output Voltage6GND Ground7LX Switch Output8V INPositive Supply -Voltage Inputl s Ob so e t ePr od u c t () -O bST735S/ST735T3/11ORDERING CODESTYPICAL APPLICATION CIRCUITNOTE:1)All capacitors are X7R ceramic2)C 5can be omitted if are used higher values for the input and output capacitors (suggested C 2=47µF,C 1=100µF).3)R 1and R 2must be placed is ST735T applications only.Their values are calculated by the following formula R 2=(|V OUT |/V REF )xR 1.For R 1can be chosen any value between 2k Ωand 20k ΩAPPLICATION CIRCUITTo achieve the best performances from switching power supply topology,particular care to layout drawing is needed,in order to minimize EMI and obtain low noise.Moreover,jitter free operation ensures the full device yout design proposed on demoboard helps to lower the developing time.Wire lengths must be minimized,filter and bypass capacitors must be low ESRtype,placed as close as possible to the integrated circuit.The 4.7µF (or 6.8µF)inductor must be chosen built on a core,taking care that saturation current should be higher than the peak LX switch current.See the Peak Inductor Current vs Output Current graph.PRINTED DEMOBOARD (not in scale)TYPE DIP-8SO-8SO-8(T&R)ST735S ST735SCN ST735SCD ST735SCD-TR ST735TST735TCNST735TCDST735TCD-TRl t l u )Ob so e t ePr od u c (s )- O bs o e t eP r od c t(sST735S/ST735T4/11ELECTRICAL CHARACTERISTICS OF ST735S (Refer to test circuit,V IN =5V,C IN =4.7µF,C OUT =10µF all X7R ceramic,L =4.7µH (Note1),I OUT =0mA,T amb =-40to 125°C,unless otherwise specified.Typical value are referred at T amb =25°C)Note 1:Utilize of 6.8µH permits to reach higher current capability at the same operating conditions Note2:Guaranteed by design,but not tested in production Note3:Tested at I VREF =125µASymbol ParameterTest ConditionsMin.Typ.Max.Unit V IN Input Voltage 4 6.2V V OUTOutput VoltageV IN =4.5V to 6.2V I OUT =0to 200mA T amb =-40to 125°C-5.25-5-4.75V V IN =4.0V to 6.2V I OUT =0to 175mA T amb =-40to 125°C-5.25-5-4.75V I OUTOutput CurrentV IN =4.5V to 6.2V T J =0to 125°C 200275mA V IN =4.5V to 6.2V I OUT =0to 175mA T amb =-40to 125°C 175mA V IN =4.0VV OUT =-5V175mAI SUPPLY Supply Current Includes Switch Current0.8 1.6mAI STANDBY Standby CurrentV SHDN =0V 110µA I SC Short Circuit Current V IN =5V 0.9A I PEAK LX Max Peak Current (Note 2)1.5A V LO Undervoltage Lock-out 3.54V ∆V OUT Line Regulation V IN =4.0V to 6.2V 0.1%/V ∆V OUT Load Regulation I OUT =0to 200mA 0.003%/mA V REF Reference Voltage T amb =25°C (Note 3) 1.225V ∆V REF Reference Drift T amb =-40to 125°C50ppm/°C R DSON LX ON Voltage 0.5ΩI LEAK LX Leakage Current V DS =10V 1µAI SH Shutdown Pin Current 1µA V IL Shutdown Input Low Threshold0.25V V IH Shutdown Input High Threshold2Vf OSC Maximum Oscillator Frequency 300KHz νEfficencyI OUT =100mA72%R CCCompensation Pin Impedance on CC Pin7.5K Ωl t l u )Ob so e t ePr od u c (s )- O bs o e t eP r od c t(sST735S/ST735T5/11ELECTRICAL CHARACTERISTICS OF ST735T (Refer to test circuit,V IN =5V,C IN =4.7µF,C OUT =10µF all X7R ceramic,L =4.7µH (Note1),I OUT =0mA,V O adjusted to -5V,T amb =-40to 125°C,unless otherwise specified.Typical value are referred at Tamb=25°C)Note 1:Utilize of 6.8µH permits to reach higher current capability at the same operating conditions Note2:Guaranteed by design,but not tested in production Note3:Tested at I VREF =125µASymbol ParameterTest ConditionsMin.Typ.Max.Unit V IN Input Voltage 3.59V V OOutput VoltageV IN =4.5V to 6.2V I OUT =0to 200mA T amb =-40to 125°C-5.25-5-4.75V V IN =4.0V to 6.2V I OUT =0to 175mA T amb =-40to 125°C-5.25-5-4.75V I OOutput CurrentV IN =4.5V to 6.2V T amb =0to 125°C 200275mA V IN =4.5V to 6.2V I OUT =0to 175mA T amb =-40to 125°C 175mA V IN =4.0VV OUT =-5V175mAI SUPPLY Supply Current Includes Switch Current0.8 1.6mAI STANDBY Standby CurrentV SHDN =0V 110µA I SC Short Circuit Current V IN =5V 0.9A I PEAK LX Max Peak Current (Note 2)1.5A V LO Undervoltage Lock-out 3.54V ∆V OUT Line Regulation V IN =4.0V to 6.2V 0.1%/V ∆V OUT Load Regulation I OUT =0to 200mA 0.003%/mA V REF Reference Voltage T amb =25°C (Note 3) 1.225V ∆V REF Reference Drift T amb =-40to 125°C50ppm/°C R DSON LX ON Voltage 0.5ΩI LEAK LX Leakage Current V DS =10V 1µAI SH Shutdown Pin Current 1µA V IL Shutdown Input Low Threshold0.25V V IH Shutdown Input High Threshold2Vf OSC Maximum Oscillator Frequency 300KHz νEfficencyI OUT =100mA72%R CCCompensation Pin Impedance on CC Pin7.5K ΩO-O ST735S/ST735T6/11TYPICAL CHARACTERISTICS (Referred to typical application circuit,T amb =25°C unless otherwise specified)Figure 1:Output Voltage vs TemperatureFigure 2:Reference Voltage vs Temperature Figure 3:Efficency vs TemperatureFigure 4:Efficency vs Ouput CurrentFigure 5:Efficency vs Low Ouput CurrentFigure 6:Supply Current vs TemperatureOo-OsST735S/ST735T7/11Figure7:Supply Current vs Input Voltage for ST735SFigure8:Supply Current vs Input Voltage for ST734TFigure9:Shutdown Threshold vs Temperature Figure10:Peack Inductor vs Output Current Figure11:Switch Current Limit vs Soft Start VoltageFigure12:Oscillator Frequency Vs Temperaturel l c )Ob so e t ePr o-O bs o e t eP r od u t (sST735S/ST735T8/11Figure 13:LX On Resistance vs TemperatureFigure 14:LX On Resistance vs Input Voltage Figure 15:Load TransientFigure 16:Load TransientFigure 17:Load TransientFigure 18:Switching WaveformV I =5V,I O =20mA to 200mA,C I =4.7µF,C O =100µF,t r =t f =1µs V I =5V,I O =20mA to 200mA,C I =4.7µF,C O =100µF,t f =1µsV I =5V,I O =20mA to 200mA,C I =4.7µF,C O =100µF,t r =1µsV I =5V,I O =100mAl slc)O b s oe t eP ro du ct()-O bs oe t eP ro dut(sST735S/ST735T11/11Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.© The ST logo is a registered trademark of STMicroelectronics© 2002 STMicroelectronics - Printed in Italy - All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States.© 芯天下--/。
PT7773A;PT7773C;PT7773N;中文规格书,Datasheet资料
Power Trends, Inc. 27715 Diehl Road, Warrenville, IL 60555 (800) 531-5782 Fax: (630) 393-6902 /powertrends /Ordering InformationPT7773❏ = 0.8 to 3.1 V oltsProgramming InformationVID4=1VID4=0VID3VID2VID1VID0Vout Vout1111 1.6V 0.80V 1110 1.7V 0.85V 1101 1.8V 0.90V 1100 1.9V 0.95V 1011 2.0V 1.00V 1010 2.1V 1.05V 1001 2.2V 1.10V 1000 2.3V 1.15V 0111 2.4V 1.20V 0110 2.5V 1.25V 0101 2.6V 1.30V 0100 2.7V 1.35V 0011 2.8V 1.40V 0010 2.9V 1.45V 0001 3.0V 1.50V 03.1V1.55VLogic 0 = Pin 12 potential (remote sense gnd)Logic 1 = Open circuit (no pull-up resistors)VID3 and VID4 may not be changed while the unit is operating.For dimensions and PC board layout, see Package Style 1020 and 1030•+5V input•5-bit Programmable: 0.8V to 3.1V @32A •High Efficiency•Input V oltage Range: 4.5V to 5.5V•Differential Remote Sense•27-pin SIP PackageFeaturesPower Trends, Inc. 27715 Diehl Road, Warrenville, IL 60555 (800) 531-5782 Fax: (630) 393-6902 /powertrendsPT Series Suffix (PT1234X )Case/PinConfigurationVertical Through-Hole N Horizontal Through-Hole A Horizontal Surface MountCh t t p ://o n e i c.c o m /IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI)reserve the right to make corrections,modifications,enhancements,improvements,and other changes to its products and services at any time and to discontinue any product or service without notice.Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by government requirements,testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design.Customers are responsible for their products andapplications using TI components.To minimize the risks associated with customer products and applications,customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any TI patent right,copyright,mask work right,or other TI intellectual property right relating to any combination,machine,or process in which TI products or services are rmation published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI.Reproduction of TI information in TI data books or data sheets is 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HT77xxFA 低功耗 200mA 同步升压转换器说明书
Rev. 1.2012022-06-06HT77xxFA低功耗200mA同步升压转换器特性•低供电电流：4μA •低纹波和低噪声 •效率高达95%•固定输出电压：2.7V/3.0V/3.3V/3.7V/5.0V •高输出电压精准度：±2% •输出电流：高达*********×V OUT ≤V IN ≤V OUT •低关机电流：0.1μA (典型值) •封装类型：3-pin SOT89，3-pin SOT23，5-pin SOT23应用领域•掌上电脑/ PDAs•便携式通信器/智能手机 •照相机/摄影机•电池供电设备：遥控器、无线滑鼠、血糖仪、电动剪及温湿度计等概述HT77xxFA 系列为DC/DC 高效同步升压转 换器。
此系列具有低启动电压的特点，非常适用于单节碱性电池应用。
CMOS 技术确 保低电源电流，以延长便携式产品的电源耐用性。
该系列芯片仅需三个外部元器件便可提供固定的2.7V/3.0V/3.3V/3.7V/5.0V 输出电压。
这些芯片为节省布局空间，采用同步架构， 内置萧特基二极体，且封装为3-pin SOT89， 3-pin SOT23和5-pin SOT23封装类型。
5-pin SOT23 封装包含芯片使能功能，在关机模式时可减小功耗。
选型表注：“xx ”表示输出电压。
典型应用电路V V OUTRev. 1.2022022-06-06LXOUTCEGND引脚图1CEOUTNCSOT23-5GNDOUTLX1SOT891GNDLXSOT23引脚说明建议工作范围注：极限参数表示超过此界限可能将对芯片造成损害。
建议工作范围表示芯片可正常工作的条件，但不包含特定限制条件。
电气特性V IN=0.6×V OUT，I OUT=10mA，Ta=25°C，除非另有说明Rev. 1.2032022-06-06Rev. 1.2042022-06-06V VOUT图1V DD图2典型性能特性V IN =0.6×V OUT ，C IN =10µF ，C OUT =10µF ，L=10µH (绕线电感)，Ta=25℃，除非另有说明Rev. 1.2052022-06-06HT7727FAHT7727FA 负载瞬态( I OUT =1mA to 100mA, 绕线电感)HT7727FA 线性瞬态(V IN =1.62V~2.43V , I OUT =150mA, 绕线电感)HT7727FA 电源 On/Off( V IN =1.62V , I OUT =150mA, 绕线电感)HT7727FA 芯片使能/除能(绕线电感)Rev. 1.2062022-06-06HT7727FA 工作 ( I OUT =0mA, 绕线电感)HT7727FA 工作 ( I OUT =150mA, 绕线电感)HT7730FAHT7730FA 负载瞬态( I OUT =1mA to 100mA, 绕线电感)HT7730FA 线性瞬态( V IN =1.8V~2.7V , I OUT =150mA, 绕线电感)HT7730FA电源 On/Off( V IN=1.8V, I OUT=150mA, 绕线电感)HT7730FA 芯片使能/除能(绕线电感) HT7730FA 工作( I OUT=0mA, 绕线电感)HT7730FA 工作( I OUT=150mA, 绕线电感)Rev. 1.2072022-06-06Rev. 1.2082022-06-06HT7733FAHT7733FA 负载瞬态( I OUT =1mA to 100mA, 绕线电感)HT7733FA 线性瞬态( V IN =1.98V~2.97V , I OUT =150mA, 绕线电感)HT7733FA 电源 On/Off( V IN =1.98V , I OUT =150mA, 绕线电感)HT7733FA 芯片使能/除能(绕线电感)HT7733FA 工作 ( I OUT=0mA, 绕线电感)HT7733FA 工作 ( I OUT=150mA, 绕线电感)HT7737FAHT7737FA 负载瞬态( I OUT=1mA to 150mA, 绕线电感)HT7737FA 线性瞬态( V IN=2.22V~3.33V, I OUT=150mA, 绕线电感)Rev. 1.2092022-06-06HT7737FA 电源 On/Off( V IN=2.22V, I OUT=150mA, 绕线电感)HT7737FA 芯片使能/除能(绕线电感) HT7737FA 工作 ( I OUT=0mA, 绕线电感)HT7737FA 工作 ( I OUT=150mA, 绕线电感)HT7750FARev. 1.20102022-06-06HT7750FA 负载瞬态( I OUT=1mA to 200mA, 绕线电感)HT7750FA 线性瞬态( V IN=3V~4.5V, I OUT=200mA, 绕线电感)HT7750FA 电源 On/Off( V IN=3V, I OUT=200mA, 绕线电感)HT7750FA 芯片使能/除能(绕线电感) HT7750FA 工作 ( I OUT=0mA, 绕线电感)HT7750FA 工作 ( I OUT=200mA, 绕线电感)Rev. 1.20112022-06-06V IN=0.6×V OUT，C IN=10μF，C OUT=10μF，L=2.2μH (积层电感)，Ta=25o C，除非另有说明HT7727FAHT7727FA负载瞬态( I OUT=1mA to 100mA, 积层电感)HT7727FA线性瞬态( V IN=1.62V~2.43V, I OUT=150mA, 积层电感)Rev. 1.20122022-06-06HT7727FA电源 On/Off( V IN=1.62V, I OUT=150mA, 积层电感)HT7727FA 芯片使能/除能(积层电感)HT7727FA工作( I OUT=0mA, 积层电感)HT7727FA工作( I OUT=150mA, 积层电感)Rev. 1.20132022-06-06HT7730FAHT7730FA负载瞬态(I OUT=1mA to 100mA, 积层电感)HT7730FA线性瞬态(V IN=1.8V~2.7V, I OUT=150mA , 积层电感)HT7730FA电源 On/Off(V IN=1.8V, I OUT=150mA, 积层电感)HT7730FA 芯片使能/除能(积层电感)Rev. 1.20142022-06-06HT7730FA工作( I OUT=0mA, 积层电感)HT7730FA工作( I OUT=150mA, 积层电感)HT7733FAHT7733FA负载瞬态( I OUT=1mA to 100mA, 积层电感)HT7733FA线性瞬态( V IN=1.98V~2.97V, I OUT=150mA, 积层电感)Rev. 1.20152022-06-06)HT7733FA 芯片使能/除能(积层电感HT7733FA电源 On/Off( V IN=1.98V, I OUT=150mA, 积层电感)Rev. 1.20162022-06-06HT7737FAHT7737FA负载瞬态( I OUT=1mA to 150mA, 积层电感)HT7737FA线性瞬态( V IN=2.22V~3.33V, I OUT=150mA, 积层电感)HT7737FA电源 On/Off( V IN=2.22V, I OUT=150mA, 积层电感)HT7737FA 芯片使能/除能(积层电感)Rev. 1.20172022-06-06HT7737FA工作( I OUT=0mA, 积层电感)HT7737FA工作( I OUT=150mA, 积层电感)HT7750FAHT7750FA负载瞬态( I OUT=1mA to 200mA, 积层电感)HT7750FA线性瞬态( V IN=3V~4.5V, I OUT=200mA, 积层电感)Rev. 1.20182022-06-06)HT7750FA 芯片使能/除能(积层电感HT7750FA电源 On/Off( V IN=3V, I OUT=200mA, 积层电感)HT7750FA工作( I OUT=0mA, 积层电感)HT7750FA工作( I OUT=200mA, 积层电感)Rev. 1.20192022-06-06功能描述HT77xxFA系列芯片是同步升压转换器，其静态电流低至4μA，采用脉冲频率调制(PFM) 控制器方案。
ST78系列_7805_7815_datasheet
November 2016 DocID2143 Rev 34 1/54This is information on a product in full production.L78Positive voltage regulator ICsDatasheet - production dataFeatures∙ Output current up to 1.5 A∙ Output voltages of 5; 6; 8; 8.5; 9; 12; 15; 18; 24 V∙ Thermal overload protection ∙ Short circuit protection∙ Output transition SOA protection∙ 2 % output voltage tolerance (A version) ∙ Guaranteed in extended temperature range (A version)DescriptionThe L78 series of three-terminal positiveregulators is available in TO-220, TO-220FP, D²PAK and DPAK packages and several fixed output voltages, making it useful in a wide range of applications.These regulators can provide local on-card regulation, eliminating the distribution problems associated with single point regulation. Each type embeds internal current limiting, thermal shut-down and safe area protection, making it essentially indestructible. If adequate heat sinking is provided, they can deliver over 1 A output current. Although designed primarily as fixed voltage regulators, these devices can be used with external components to obtain adjustable voltage and currents.Contents L78 Contents1Diagram (3)2Pin configuration (4)3Maximum ratings (5)4Test circuits (6)5Electrical characteristics (7)6Application information (23)6.1Design consideration (23)7Typical performance (31)8Package information (33)8.1TO-220 (dual gauge) package information (34)8.2TO-220 (single gauge) package information (36)8.3TO-220FP package information (38)8.4TO-220 packing information (40)8.5DPAK package information (41)8.6D²PAK (SMD 2L STD-ST) type A package information (44)8.7D²PAK (SMD 2L Wooseok-subcon.) package information (46)8.8D²PAK and DPAK packing information (49)9Ordering information (52)10Revision history (53)L78 Diagram1 DiagramFigure 1: Block diagramPin configuration L782 Pin configurationFigure 2: Pin connections (top view)L78Maximum ratings3 Maximum ratingsAbsolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.Figure 4: Application circuitsTest circuits L784 Test circuitsFigure 5: DC parameter5 Electrical characteristicsV I = 10 V, I O = 1 A, T J = 0 to 125 °C (L7805AC), T J = -40 to 125 °C (L7805AB), unlessotherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.unless otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.unless otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.unless otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.Refer to the test circuits, T J = 0 to 125 °C, V I = 14.5 V, I O = 500 mA, C I = 0.33 µF,C O = 0.1 µF unless otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.unless otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.unless otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.unless otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.unless otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.unless otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.6 Application information6.1 Design considerationThe L78 Series of fixed voltage regulators are designed with thermal overload protectionthat shuts down the circuit when subjected to an excessive power overload condition,internal short-circuit protection that limits the maximum current the circuit will pass, andoutput transistor safe-area compensation that reduces the output short-circuit current asthe voltage across the pass transistor is increased. In many low current applications,compensation capacitors are not required. However, it is recommended that the regulatorinput be bypassed with capacitor if the regulator is connected to the power supply filter withlong lengths, or if the output load capacitance is large. An input bypass capacitor should beselected to provide good high frequency characteristics to insure stable operation under allload conditions. A 0.33 µF or larger tantalum, mylar or other capacitor having low internalimpedance at high frequencies should be chosen. The bypass capacitor should bemounted with the shortest possible leads directly across the regulators input terminals.Normally good construction techniques should be used to minimize ground loops and leadresistance drops since the regulator has no external sense lead.The addition of an operational amplifier allows adjustment to higher or intermediate valueswhile retaining regulation characteristics. The minimum voltage obtained with thearrangement is 2 V greater than the regulator voltage.The circuit of Figure 13: "High current voltage regulator" can be modified to provide supplyprotection against short circuit by adding a short circuit sense resistor, RSC, and anadditional PNP transistor. The current sensing PNP must be able to handle the short circuitcurrent of the three terminal regulator Therefore a four ampere plastic power transistor isspecified.1. Although no output capacitor is need for stability, it does improve transient response.2. Required if regulator is located an appreciable distance from power supply filter.Figure 14: High output current with short circuit protectionFigure 16: Split power supply (± 15 V - 1 A)* Against potential latch-up problems.Figure 21: High input and output voltageFigure 22: Reducing power dissipation with dropping resistorThe circuit performs well up to 100 kHz.Figure 25: Adjustable output voltage with temperature compensationQ2 is connected as a diode in order to compensate the variation of the Q1 V BE with the temperature. C allows a slow rise time of the V O.Figure 26: Light controllers (VO(min) = VXX + VBE)Application with high capacitance loads and an output voltage greater than 6 volts need an external diode (see Figure 22: "Reducing power dissipation with dropping resistor") to protect the device against input short circuit. In this case the input voltage falls rapidly while the output voltage decrease slowly. The capacitance discharges by means of the base-emitter junction of the series pass transistor in the regulator. If the energy is sufficiently high, the transistor may be destroyed. The external diode by-passes the current from the IC to ground.7 Typical performance8 Package informationIn order to meet environmental requirements, ST offers these devices in different grades ofECOPACK® packages, depending on their level of environmental compliance. ECOPACK®specifications, grade definitions and product status are available at: .ECOPACK® is an ST trademark.8.1 TO-220 (dual gauge) package information8.2 TO-220 (single gauge) package information8.3 TO-220FP package information8.4 TO-220 packing information8.5 DPAK package information8.6 D²PAK (SMD 2L STD-ST) type A package information8.7 D²PAK (SMD 2L Wooseok-subcon.) package information8.8 D²PAK and DPAK packing informationFigure 47: Tape outlineFigure 48: Reel outline。
KT0933_datasheet_V1.3
Monolithic Digital AM/FM ReceiverRadio-on-a-Chip™Table of Content1.Electrical Specification (4)2.Typical performance characteristics (6)2.1.FM Characteristics (6)2.2.AM Characteristics (7)3.Pin List (8)4.Function Description (9)4.1.Overview (9)4.2.FM Receiver (9)4.3.AM Receiver (9)4.4.Operation Bands (9)4.5.Standby (9)4.6.Crystal and reference clock (9)4.7.Digital Signal Processing (10)4.7.1.FM Stereo Decoder (10)4.7.2.Mute / Softmute (11)4.7.3.Stereo / Mono Blending (12)4.7.4.Bass (12)4.7.5.Stereo DAC, Audio Filter and Driver (13)4.7.6.AM Channel Filter Bandwidth (13)4.7.7.Tune (13)4.7.8.SEEK (13)4.8.I2C Control Interface (13)4.9.Register Bank (17)4.9.1.DEVICEID0 (Address 0x0000) (17)4.9.2.DEVICEID1 (Address 0x0001) (17)4.9.3.KTMARK0 (Address 0x0002) (17)4.9.4.KTMARK1 (Address 0x0003) (17)4.9.5.PLLCFG0 (Address 0x0004) (17)4.9.6.PLLCFG1 (Address 0x0005) (17)4.9.7.PLLCFG2 (Address 0x0006) (17)4.9.8.PLLCFG3 (Address 0x0007) (17)4.9.9.SYSCLK_CFG0 (Address 0x0008) (18)4.9.10.SYSCLK_CFG1 (Address 0x0009) (18)4.9.11.SYSCLK_CFG2 (Address 0x000A) (18)4.9.12.XTALCFG (Address 0x000d) (18)4.9.13.RXCFG0 (Address 0x000e) (18)4.9.14.RXCFG1 (Address 0x000f) (19)4.9.15.BANDCFG3 (Address 0x0019) (19)4.9.16.MUTECFG0 (Address 0x001a) (19)4.9.17.G38KCFG0 (Address 0x001b) (20)4.9.18.SOFTMUTE0 (Address 0x001d) (20)4.9.19.SOFTMUTE1 (Address 0x001e) (20)4.9.20.SOFTMUTE2 (Address 0x001f) (20)4.9.21.SOFTMUTE3 (Address 0x0020) (21)4.9.22.SOFTMUTE4 (Address 0x0021) (21)4.9.23.SOFTMUTE5 (Address 0x0022) (21)4.9.24.SOUNDCFG (Address 0x0028) (22)4.9.25.FLT_CFG (Address 0x0029) (22)4.9.26.DSPCFG0 (Address 0x002a) (22)4.9.27.DSPCFG1 (Address 0x002b) (22)4.9.28.DSPCFG2 (Address 0x002c) (23)4.9.29.DSPCFG6 (Address 0x0030) (23)4.9.30.EMC_CFG0 (Address 0x0031) (24)4.9.31.DSPCFG7 (Address 0x0034) (24)4.9.32.DSPCFG8 (Address 0x0035) (24)4.9.33.AFC2 (Address 0x003e) (24)4.9.34.AFC3 (Address 0x003f) (25)4.9.35.ANACFG (Address 0x004e) (25)4.9.36.AMCALI0 (Address 0x0055) (25)4.9.37.AMDSP0 (Address 0x0062) (26)4.9.38.AMDSP1 (Address 0x0063) (26)4.9.39.AMDSP4 (Address 0x0066) (26)4.9.40.AMDSP7 (Address 0x0069) (27)4.9.41.STATUS10 (Address 0x0079) (27)4.9.42.SPARE0 (Address 0x0085) (28)4.9.43.FMCHAN0 (Address 0x0088) (28)4.9.44.FMCHAN1 (Address 0x0089) (28)4.9.45.AMCHAN0 (Address 0x008c) (28)4.9.46.AMCHAN1 (Address 0x008d) (28)4.9.47.STATUS0 (Address 0x00de) (29)4.9.48.STATUS4 (Address 0x00e2) (29)4.9.49.STATUS6 (Address 0x00e4) (29)4.9.50.STATUS7 (Address 0x00e5) (29)4.9.51.STATUS8 (Address 0x00e6) (30)4.9.52.AFC_STATUS0 (Address 0x00e8) (30)4.9.53.AFC_STATUS1 (Address 0x00e9) (30)4.9.54.AMSTATUS0 (Address 0x00ea) (30)4.9.55.AMSTATUS2 (Address 0x00ec) (31)4.9.56.AMSTATUS3 (Address 0x00ed) (31)5.Typical Application Circuit (32)6.Package Outline (33)7.Order Information (34)8.Revision History (34)9.Contact Information (35)1.Electrical SpecificationTable 4: AM Receiver Characteristics2.Typical performance characteristics2.1.FM CharacteristicsTest condition (Ta = 27℃, VDD= 3.0V, Crystal=32.768KHz, SNR=40dB, FMOD=1KHz, 75us de-emphasis,MONO=1,△F=22.5KHz,Without weighting filter)Test condition (Ta = 27℃, VDD= 3.0V, Crystal=32.768KHz, FMOD=1KHz, 75us de-emphasis, MONO=0,△F=75KHz,P in=60dBuVEMF, Without weighting filter)Test condition (Ta = 27℃, VDD= 3.0V, Crystal=32.768KHz, FMOD=1KHz, 75us de-emphasis, MONO=1,△F=22.5KHz,P in=60dBuVEMF, Without weighting filter)2.2.AM CharacteristicsTest condition (Ta = 27℃, VDD= 3.0V, Crystal=32.768KHz, SNR=20dB, FMOD=1KHz,AM modulation index=30%,Without weighting filter, ferrite antenna =420uH,distance between Tx&Rx antenna=60cm )Test condition (Ta = 27℃, VDD= 3.0V, Crystal=32.768KHz, SNR=20dB, FMOD=1KHz,AM modulation index=30%,Without weighting filter, ferrite antenna =420uH,distance between Tx&Rx antenna=60cm )3.Pin ListFigure 1：KT0933 Pin assignment (Top view)4.Function Description4.1.OverviewKT0933 offers a true single-chip, full-band FM/AM and versatile radio solution by minimizing the external components and offering a variety of configurations.4.2.FM ReceiverKT0933 enters FM mode by setting register AM_FM to 0. The FM receiver is based on the architecture of KT Micro’s latest generation FM receiver chips in mass production. There are no external filters or frequency-tuning devices thanks to a proprietary digital low-IF architecture consisting of a fully-integrated LNA, an automatic gain control (AGC), a set of high-performance ADCs, high-quality analog and digital filters, and an on-chip low-noise self-tuning VCO. The on-chip high-fidelity Class-AB driver further eliminates the need for external audio amplifiers and can drive stereo headphones directly.4.3.AM ReceiverKT0933 enters AM mode by setting register AM_FM to 1. The AM Receiver employs a similar digital low IF architecture and share many circuits with the FM receiver. The minimum AM channel spacing can be set to 1KHz. The bandwidth of the channel filter can be set to 1KHz to 5KHz to suit various requirements.The AM receiver in KT0933 can provide accurate and automatic AM tuning without manual alignment. It supports ferrite loop antenna with value between 360uH and 620uH.4.4.Operation BandsKT0933 supports wide FM band and AM bands. The FM receiver covers frequencies from 32MHz to 110MHz. The AM band is from 500KHz to 1750KHz.4.5.StandbyTo enter standby mode, the STDBY register shall be set to 1 through I2C interface. To quit standby mode, STDBY should be set to 0.4.6.Crystal and reference clockKT0933 integrates a low frequency crystal oscillator that supports 32.768KHz or 38KHz crystals. Alternatively a CMOS level external reference clock may be used by setting the RCLK_EN register to 1 and setting FPFD<19:0> according to the frequency of the reference clock. The FPFD<19:0> is the frequency value in the unit of 1/16Hz. In order to illuminate the usage of these bits clearly some examples are given in Table 6.Table 6: Examples using different crystal or reference clockode, the audio volume is gradually attenuated when the signal reception is weak. (i.e. whe n the RSSI and SNR are below a certain level as defined by AM_SMUTE_START_RSS I<2:0> or AM_SMUTE_START_ SNR<2:0>, respectively.) The attenuation slope can be configured through AM_SMUTE_SLOPE_ RSSI<2:0> or AM_SMUTE_SLOPE_SNR< 2:0>, respectively.The maximum attenuation of volume is -21dB when RSSI is used as soft mute judgment threshold. The maximum attenuation of volume is -12dB when RSSI is used as soft mutejudgment threshold. The maximum total attenuation of volume can be configured through AM_SMUTE_MIN_GAIN<2:0>.MONO playback mode can be forced by setting the MONO to 1.4.7.4. BassKT0933 provides bass boost feature for audio enhancement. The gain of the bass boost can be programmed through BASS<1:0>. With BASS<1:0>=00, this feature is disabled.4.7.5. Stereo DAC, Audio Filter and DriverTwo high-quality audio digital-to-analog converters (DAC) are integrated along with high-fidelity analog audio filters and class AB drivers. Headphones with impedance as low as 16ohms can be direct driven without adding external audio drivers. An integrated anti-pop circuit suppresses the click-and-pop sound during power up and power down.In order to suit different applications, the gain of the audio driver can be adjusted through register bits FM_GAIN<2:0> , AM_GAIN<3:0>and AM_VOLUME<3:0>and to avoid the saturation in output stage, the common mode voltage can also be adjust according to different power supply voltage through register bits AUDV_DCLVL<2:0>.4.7.6. AM Channel Filter BandwidthKT0933 provides programmable AM channel bandwidth from 1KHz to 5KHz through FLT_SEL <2:0>.4.7.7. TuneThe fully integrated LO synthesizer supports wide band operation. Before tuning，the register of Channel should be written，and then write the register TUNE. Channel tuning is started when the register TUNE is set to 1.In FM mode, the channel frequency is set by FM_CHAN<11:0> and is defined asFreq(KHz) = 50KHz × FM_CHAN<11:0>In AM mode, the channel frequency is set by AM_CHAN<14:0> and is defined asFreq(KHz) = 1KHz × AM_CHAN<14:0>4.7.8. SEEKKT0933 offers effective software based seek algorithm. Refer to application notes for more information.4.8.I2C Control InterfaceWrite Operations:BYTE WRITE:The write operation is accomplished via a 3-byte sequence:Serial address with write commandRegister addressRegister dataA write operation requires an 8-bit register address following the device address word and acknowledgment. Upon receipt of this address, the KT0933 will again respond with a “0” and then clock in the 8-bit register data. Following receipt of the 8-bit register data, the KT0933 will output a “0” and the addressing device, such as a microcontroller, must terminate the write sequence with a stop condition (see Figure 4).Read Operations:RANDOM READ:The read operation is accomplished via a 4-byte sequence:CURRENT ADDRESS READ:last address accessed during the last read or write operation, incremented by one. This address stays valid between operations as long as the chip power is maintained.Once the device address with the read/write select bit set to “1” is clocked in and acknowledged by the KT0933, the current address data word is serially clocked out. The microcontroller does not respond with an input “0” but does generate a following stop condition (see Figure 5).CURRENT REGISTER READPROCEDUREFigure 5: Serial Interface ProtocolNote:The serial controller supports slave mode only. Any register can be addressed randomly.The address of the slave in the first 7 bits and the 8th bit tells whether the master is receiving data from the slave or transmitting data to the slave. The I2C write address is 0x6C and the read address is 0x6D.CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods (see Figure6). Data changes during SCL high periods will indicate a start or stop condition as defined below.START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which must precede any other command (see Figure gure 7).STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop command will place the KT0933 in a standby power mode (see Figure 7).ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the KT0933 in 8-bit words. The KT0933 sends a “0” to acknowledge that it has received each word. This happens during the ninth clock cycle (see Figure 8).Figure 6: Clock and Data TransitionsFigure 7: Start and Stop DefinitionFigure 8: Acknowledge4.9.Register Bank4.9.1. DEVICEID0 (Address 0x0000)4.9.8. PLLCFG3 (Address 0x0007)4.9.9. SYSCLK_CFG0 (Address 0x0008)4.9.10. SYSCLK_CFG1 (Address 0x0009)4.9.14. RXCFG1 (Address 0x000f)4.9.17. G38KCFG0 (Address 0x001b)4.9.23. SOFTMUTE5 (Address 0x0022)4.9.24. SOUNDCFG (Address 0x0028)4.9.28. DSPCFG2 (Address 0x002c)4.9.30. EMC_CFG0 (Address 0x0031)4.9.34. AFC3 (Address 0x003f)4.9.37. AMDSP0 (Address 0x0062)4.9.40. AMDSP7 (Address 0x0069)4.9.42. SPARE0 (Address 0x0085)4.9.46. AMCHAN1 (Address 0x008d)4.9.47. STATUS0 (Address 0x00de)4.9.51. STATUS8 (Address 0x00e6)4.9.52. AFC_STATUS0 (Address 0x00e8)4.9.55. AMSTATUS2 (Address 0x00ec)5.Typical Application CircuitU16.Package OutlineSymbol Dimensions In MillimetersMin.Nom.Max.A - - 1.75A1 0.10 - 0.225A2 1.30 1.40 1.50A3 0.50 0.60 0.70b 0.24 - 0.30b1 0.23 0.254 0.28c 0.20 - 0.25c1 0.19 0.20 0.21D 4.80 4.90 5.00E 5.80 6.00 6.20E1 3.80 - 4.00e 0.635BSCh 0.25 - 0.50L 0.50 0.65 0.80L1 1.05BSCθ0 º- 8º7.Order Information8. Revision HistoryV1.0 Firstly Release.V1.1 Modified Electrical specification, Typical performance characteristics. V1.2 Modified Function description.V1.3 Modified Typical performance characteristics.9.Contact InformationBeijing KT Micro, Ltd.BeiWu New Technology Park, Building #4, 23 BeiWuCun Road, Haidian District, Beijing, ChinaZip Code: 100195Tel: +86-10-88891955+86-10-88891947(direct)Fax: +86-10-88891977Email: sales@Beijing KT Micro, Ltd. (US Office)999 Corporate Drive, Suite 170Ladera Ranch, CA 92694USATel: 949-713-4000Fax: 949-713-4004Email: sales@。
st7920 12864控制ic datasheet 数据手册 说明书
Character Generator RAM (CGRAM) 1024 bits
Character Generator ROM (CGROM) 2M bits
Cursor Blink Scroll Controller
Vss
Parallel/Serial converter and Attribute Circuit
Display Data RAM (DDRAM) 60 x 16 bits
33/49bit shift register
COM1 to Common COM33 Signal Driver
SEG1 to SEG64 64-bit shift register 64-bit latch circuit Segment Signal Driver
功能描述
本ST7920 點矩陣LCD控制/驅動IC，可以顯示字母、數字符號、㆗文字型及自訂圖塊顯示，它可以提供㆔種控制介面， 分別是8位元微處理器介面, 4位元微處理器介面及串列介面；所有的功能，包含顯示RAM，字型產生器，以及液晶驅動 電路和控制器，都包含在㆒個單晶片裡面，只要㆒個最小的微處理系統，就可以操作本LCD控制/驅動IC。 ST7920 的字型ROM 包括8192個16X16點的㆗文字形以及126個16X8點半寬的字母符號字型，另外繪圖顯示畫面提供 ㆒個64x256點的繪圖區域（GDRAM）及240點的ICON RAM，可以和文字畫面混和顯示，而且ST7920內含CGRAM提 供4組軟體可程式規劃的16X16造字功能。 ST7920 具有低功率電源消耗 (2.7V to 5.5V) 可以提供電池操作攜帶式產品的省電需求。 ST7920 LCD驅動器由33個common及64個segment所組成，Segment驅動器的擴充可以視需要由ST7921 Segment驅 動器來提供擴充顯示範圍的任務，㆒個ST7920可以顯示到1行8個字或是2行4個字，或是配合ST7921使用2行16個字的 顯示。 產 品 編 號 ST7920-0A ST7920-0B 產 品 功 能 內建 BIG-5碼 繁體㆗文字型 內建 GB碼 簡體㆗文字型
iw3616、3617、3630datasheet中文翻译(绝对真实)
产品特色大幅简化离线式LED驱动器设计●单级功率因数校正(PFC)与精确恒流(CC)输出相结合●输入/输出电容和变压器体积小●一次侧反馈控制，无需光耦电路，简化了电路设计●简化初级侧PWM调光接口●符合IEC61000-3-2标准高效节能和高兼容性●大幅提升效率，可达到85%以上●减少元件数量●总谐波失真<15%且PF>0.95●前沿、后沿和数字调光器●传感器和定时器精确稳定的性能●LED负载恒流精度不低于±5%●支持LED负载热插拔●1%-100%宽范围调光，调光无闪烁先进的保护及安全特性●通过自动重启动提供短路保护●开路故障检测模式●自动热关断重启动无论在PCB板上还是在封装上，都保证高压漏极引脚与其他所有信号引脚之间满足高压爬电要求应用●LED离线固态照明说明G7617 是一款的适用于LED调光控制的离线式两级交流/直流电源控制器，是适用于25W 输出功率的可调光LED 灯具的最优之选。
G7617符合电磁兼容性(EMC) IEC61000-3-2 标准，在120V AC或230V AC输入电压下其功率因数(PF) 可达到0.95 以上。
采用先进的数控技术来检测调光器的类型和相位，为调光器提供动态阻抗的同时可调节LED发光亮度，自动检测调光器类型和相位，从而实现了业内与模拟及数字调光器最广泛的兼容性。
G7617工作于准谐振工作模式，工作效率高，可工作于前沿后沿调光模式，也可工作于R 型、R-C型或R-L型调光控制模式。
G7617 符合热插拔LED 模块的固态照明行业标准Zhaga，同时还集成了调光功能的映射选项（位于白炽灯替代灯的NEMA SSL6 调光曲线内）。
G7617 系列有两个版本：针对120V AC输入应用进行优化的G7617-00 和针对230V AC 应用进行优化的G7617-01。
订购信息应用框图图1典型应用内部框图Vcc VinVcbVT CFGASU BisenseBdrvFdrvFisensePGNDAGND C O R E图2 内部框图引脚功能描述BV SENSE V IN BI SENSE B DRV CFG ASU V CCV CBV TFV SENSEFI SENSEF DRVAGNDPGND 图3. 引脚布局BV SENSE引脚：PFC电感电压反馈点，用于感知Boost电感的磁通状态。
777丝印二极管
handbook, 4 columns
k
a
MAM061
Fig.1 Simplified outline (SOD87) and symbol.
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134).
165
220
275
330
440
VR = VRRMmax;
−
see Fig.14
VR = VRRMmax;
−
Tj = 165 °C; see Fig.14
when switched from
IF = 0.5 A to IR = 1 A;
−
measured at IR = 0.25 A; see Fig.18
−
TYP.
− −
− −
− − − − − − − −
−
− −
MAX. UNIT
0.75 V 0.83 V
0.98 V 1.05 V
−V −V −V −V −V −V −V 1 µA
100 µA
25 ns 50 ns
1999 Nov 15
3
Philips Semiconductors
Ultra fast low-loss controlled avalanche rectifiers
trr
reverse recovery time
BYD77A to D
BYD77E to G
CONDITIONS IF = 1 A; Tj = Tj max; see Figs 12 and 13
OP77FZ,OP77FJZ,OP77EZ, 规格书,Datasheet 资料
Thermal Resistance .......................................................................6 ESD Caution...................................................................................6 Typical Performance Characteristics ..............................................7 Test Circuits..................................................................................... 10 Applications..................................................................................... 11 Precision Current Sinks............................................................. 12 Outline Dimensions ....................................................................... 15 Ordering Guide .......................................................................... 16
LED升压、升降压的驱动恒流IC推荐二
LED升压、升降压的驱动恒流IC推荐二美国美信集成产品公司MAX16831 可配置升降压型高功率LED 驱动IC MAX16831 是一款电流型、高亮LED(HBLED)驱动器，设计为通过控制2 个外部n 沟道MOSFET 来调节单串LED 的电流。
MAX16831 集成了宽范围亮度控制、固定频率HBLED 驱动器所需的全部组件。
MAX16831 可配置为降压型(buck)、升压型(boost)或升/降压型(buck-boost)电流调节器。
带有前沿消隐的电流模式简化了控制回路的设计。
内部斜率补偿可在占空比超过50%时保持电流环路的稳定。
MAX16831 工作于较宽的输入电压范围，并可承受汽车抛负载事件。
多个MAX16831 可相互同步或同步至外部时钟。
MAX16831 包含一个浮动亮度驱动器，驱动串联在LED 串的n 沟道MOSFET 实现亮度控制。
使用MAX16831 架构的HBLED 驱动器可在汽车应用中实现超过90%的效率。
MAX16831 还包括一个可源出1.4A、吸收2.5A 电流(sink)的栅极驱动器，用于在高功率LED 驱动器应用中驱动开关MOSFET，如车灯总成等。
亮度控制允许宽范围的PWM 调光，其频率可高达2kHz。
在较低的调光频率下可实现高达1000:1 的调光比。
MAX16831 提供带裸焊盘的32 引脚薄型QFN 封装，工作于-40°C至+125°C 汽车级温基本参数:宽输入范围:6V 至76V；集成LED 电流检测差分放大器；可驱动n 沟道MOSFET；具有浮动亮度驱动能力；LED 电流精度:5%；200Hz 片上斜坡发生器，可同步至外部PWM 亮度信号；可编程开关频率(125kHz 至600kHz)，可被同步；输出过压、负载开路、LED 短路、过热保护；低至107mV LED 电流检。
XL6013升压型LED恒流驱动器芯片(官方中文版)
n0.22V输出电流采样电压n输出可驱动2~10串1W LED n固定400KHz开关频率n最大2A开关电流n SW内置过压保护功能n93%以上转换效率n EN脚TTL关断功能n出色的线性与负载调整率n内置功率MOSn内置频率补偿功能n内置软启动功能n内置热关断功能n内置电流限制功能n SOP-8L封装应用n升压恒流驱动n显示器LED背光n通用LED照明器，可工作在DC5V到40V输入电压范围，低纹波，内置功率MOS。
XL6013内置固定频率振荡器与频率补偿电路，简化了电路设计。
当输入电压大于或等于12V时，XL6013可驱动5至10串1W LED。
PWM控制环路可以调节占空比从0~90%之间线性变化。
内置过电流保护功能与EN脚逻辑电平关断功能。
内部补偿模块可以减少外围元器件数量。
图1. XL6013封装引脚配置SWSW GNDGND图2. XL6013引脚配置表1.引脚说明引脚号 引脚名 描述1 EN 使能引脚，低电平关机，高电平工作，悬空时为高电平。
2 VIN 电源输入引脚，支持5V 到40V DC 范围电压输入，需要在VIN 与GND 之间并联电解电容以消除噪声。
3 FB 输出电流采样引脚，FB 参考电压为0.22V 。
4 NC 无连接。
5,6 SW 功率开关输出引脚，SW 是输出功率的开关节点。
7,8 GND接地引脚。
400KHz 60V 2A 开关电流升压型LED 恒流驱动器 XL6013方框图图3. XL6013方框图典型应用产品型号打印名称封装方式包装类型XL6013E1 XL6013E1 SOP-8L 2500只每卷XLSEMI无铅产品，产品型号带有“E1”后缀的符合RoHS标准。
绝对最大额定值（注1）参数符号值单位输入电压Vin -0.3到45 V输出开关引脚电压V SW-0.3到60 V电流采样引脚电压V FB-0.3到VIN V功耗P D内部限制mW热阻(SOP-8L)R JA100 ºC/W (结到环境，无外部散热片)最大结温T J-40到150 ºC操作结温T J-40到125 ºC贮存温度范围T STG-65到150 ºC引脚温度(焊接10秒) T LEAD260 ºC ESD (人体模型) >2000 V注1: 超过绝对最大额定值可能导致芯片永久性损坏，在上述或者其他未标明的条件下只做功能操作，在绝对最大额定值条件下长时间工作可能会影响芯片的寿命。
BQ25601D Datasheet说明书
BQ25601D 具备 USB 充电器检测功能、用于高输入电压和窄电压直流 (NVDC) 电源路径管理的 I2C 控制型 3A 单节电池充电器1 特性•高效 1.5MHz 同步开关模式降压充电器–在 2A 电流（5V 输入）下具有 92% 的充电效率–针对 USB 电压输入 (5V) 进行了优化–用于轻负载运行的可选低功耗脉冲频率调制 (PFM) 模式•支持 USB On-The-Go (OTG)–具有高达 1.2A 输出的升压转换器–在 1A 输出下具有 92% 的升压效率–精确的恒定电流 (CC) 限制–高达 500µF 容性负载的软启动–输出短路保护–用于轻负载运行的可选低功耗 PFM 模式•单个输入，支持 USB 输入和高电压适配器–支持 3.9V 至 13.5V 输入电压范围，绝对最大输入电压额定值为 22V–可编程输入电流限制（100mA 至 3.2A，分辨率为 100mA），支持 USB 2.0、USB 3.0 标准和高电压适配器 (IINDPM)–通过高达 5.4V 的输入电压限制 (VINDPM) 进行最大功率跟踪–VINDPM 阈值自动跟踪电池电压–自动检测 USB BC1.2、SDP、CDP、DCP 以及非标准适配器•高电池放电效率，电池放电 MOSFET 为 19.5mΩ•窄 VDC (NVDC) 电源路径管理–无需电池或深度放电的电池即可瞬时启动–电池充电模式下实现理想的二极管运行•BATFET 控制，支持运输模式、唤醒和完全系统复位•灵活的自主和 I2C 模式，可实现出色的系统性能•高集成度包括所有 MOSFET、电流感测和环路补偿•17µA 低电池泄漏电流•高精度–±0.5% 充电电压调节–±5% 1.5A 充电电流调节–±10% 0.9A 输入电流调节•安全相关认证：–TUV IEC 62368 认证2 应用•智能手机•便携式互联网设备和附件3 说明BQ25601D 器件是一款适用于单节锂离子和锂聚合物电池的高度集成型 3A 开关模式电池充电管理和系统电源路径管理器件。
ST7920-datasheet
ST Sitronix ST7920Chinese Fonts built in LCD controller/driver Main Featuresl Operation Voltage Range:Ø 2.7V to 5.5Vl Support 8-bit, 4-bit and serial bus MPU interfacel64 x 16-bit display RAM (DDRAM)ØSupports 16 words x 4 lines (Max)ØLCD display range 16 words x 2 linesl64 x 256-bit Graphic Display RAM (GDRAM)l2M-bits Character Generation ROM (CGROM): Support 8192 Chinese words (16x16 dot matrix)l16K-bit half-width Character Generation ROM (HCGROM):Supports 126 characters (16x8 dot matrix)l32-common x 64-segment (2 lines of character) LCD driversl Automatic power on reset (POR)l External reset pin (XRESET)l With the extension segment drivers, the display area can up to 16x2 linesl Built-in RC oscillator:Frequency is adjusted by an external resistor l Low power consumption designØNormal mode (450uA Typ VDD=5V)ØStandby mode (30uA Max VDD=5V) l VLCD (V0 to V SS): max 7Vl Graphic and character mixed display mode l Multiple instructions:ØDisplay ClearØReturn HomeØDisplay ON/OFFØCursor ON/OFFØDisplay Character BlinkØCursor ShiftØDisplay ShiftØVertical Line ScrollØReverse Display (by line)ØStandby Model Built-in voltage booster (2 times)VOUT: max 7Vl1/33 Duty (with ICON)Function DescriptionST7920 LCD controller/driver IC can display alphabets, numbers, Chinese fonts and self-defined characters. It supports 3 kinds of bus interface, namely 8-bit, 4-bit and serial. All functions, including display RAM, Character Generation ROM, LCD display drivers and control circuits are all in a one-chip solution. With a minimum system configuration, a Chinese character display system can be easily achieved.ST7920 includes character ROM with 8192 16x16 dots Chinese fonts and 126 16x8 dots half-width alphanumerical fonts. Besides, it supports 64x256 dots graphic display area for graphic display (GDRAM). Mix-mode display with both character and graphic data is possible. ST7920 has built-in CGRAM and provide 4 sets software programmable 16x16 fonts.ST7920 has wide operating voltage range (2.7V to 5.5V). It also has low power consumption. So ST7920 is suitable for battery-powered portable device.ST7920 LCD driver consists of 32-common and 64-segment. Company with the extension segment driver (ST7921) ST7920 can support up to 32-common x 256-segment display.Part Number Font CodeST7920-0A BIG-5 Code Set (Traditional Chinese)ST7920-0B GB Code Set (Simplified Chinese)ST7920-0C Chinese (Traditional/Simplified) & JapaneseST7920-0F Chinese (Traditional/Simplified), Japanese & KoreanST7920 Specification Reversion History Version Date DescriptionC1.7 2000/12/15 1. VCC changed to VDD.2. VLCD changed from VCC-V5 to V0-VSS.3. DC characteristics input High voltage (Vih) changed to 0.7VDD.4. DC characteristics output High voltage (Voh) changed to 0.8VDD.C1.8 2001/03/01 1. Chip Size changed.2. ICON 256 dots changed to 240 dots.3. XOFF normal high sleep Low changed to normal low sleep High.4. Added XOFF application.5. Modified application of ST7920: PIN 4~6 are floating. (PIN 4~6 are test pin)6. Modified voltage doubler CAP1P, CAP1M, CAP2M capacitors polarityC1.9 2001/05/28 1. Icon RAM TABLE changed. (TABLE-6)2. Booster description modified. (PAGE-29)3. AC Characteristics modified.4. Added 2Line 16 Chinese Word (32Com X 256Seg) application circuit.5. Added oscillation resistor’s relation to power consumption and frequency.C2.0 2001/07/03 1. Added Register initial values.2. Voltage booster CAP1M CAP1P polarity changed (PAGE-30).V2.0 2001/08/17 1. Modified Table 7 (PAGE-14).2. Change to English version.V2.0c 2001/10/18 1. Modified page-38 Serial interface timing diagram.V2.0d 2002/05/09 1. Add the standard code (Japan, GB code, BIG-5 code). V3.0 2002/10/11 1. Delete sleep mode function.V3.1 2003/04/11 1. Modified GDRAM Address (AC5…AC0, 00h…3Fh).V3.2 2003/09/09 1. Add the CGROM and HCGROM test application circuit. V3.3 2004/03/29 1. Updat the using method for ICON.V3.4 2005/5/24 1. ICON no used.V3.5 2005/5/24 1. Add VOUT voltage limitation.2. Remove IRAM related descriptions.V3.6 2005/6/6 1. Fix the check sum count number on Page 28~30.655360->655362, 10240->10242.2. Modify the description about serial interface.V3.7 2007/7/24 1. Add CGROM/HCGROM checksum operation time. V3.8 2007/12/20 1. Add “Clear DDRAM” step before check sum process. V3.9 2008/3/3 1. Modify 4-bit initial sequence.V4.0 2008/8/18 1. Add Font Code “0F” at Page 1.2. Modify the description of Font Code Table at Page 1.System Block DiagramPad Diagram301Origin: center of chip Coordinates: from pad centerChip size: 5305 X 4074 Pad open: 90 X 90Pad pitch: 125 unit: μm* Chip substrate must connect to VSSPAD Coordinates (Unit: um)No. Name X Y1 V0 -2548 18122 V1 -2548 16883 V2 -2548 15624 CLK -2548 14385 TT1 -2548 13126 TT2 -2548 11887 V3 -2548 10628 V4 -2548 9389 VSS -2548 81210 VDD -2548 68811 XRESET -2548 56212 CL1 -2548 43813 CL2 -2548 31214 VDD -2548 18815 M -2548 6216 DOUT -2548 -6217 RS -2548 -18818 RW -2548 -31219 E -2548 -43820 VSS -2548 -56221 OSC1 -2548 -68822 OSC2 -2548 -81223 PSB -2548 -93824 D0 -2548 -106225 D1 -2548 -118826 D2 -2548 -131227 D3 -2548 -143828 D4 -2548 -156229 D5 -2548 -168830 D6 -2548 -181231 D7 -2306 -193332 XOFF -2181 -193333 VOUT -2056 -193334 CAP3M -1931 -193335 CAP1P -1806 -193336 CAP1M -1681 -193337 CAP2P -1556 -193338 CAP2M -1431 -1933 No. Name X Y39 VD2 -1306 -193340 C[1] -1181 -193341 C[2] -1056 -193342 C[3] -931 -193343 C[4] -806 -193344 C[5] -681 -193345 C[6] -556 -193346 C[7] -431 -193347 C[8] -306 -193348 C[9] -181 -193349 C[10] -56 -193350 C[11] 69 -193351 C[12] 194 -193352 C[13] 319 -193353 C[14] 444 -193354 C[15] 569 -193355 C[16] 694 -193356 C[17] 819 -193357 C[18] 944 -193358 C[19] 1069 -193359 C[20] 1194 -193360 C[21] 1319 -193361 C[22] 1444 -193362 C[23] 1569 -193363 C[24] 1694 -193364 C[25] 1819 -193365 C[26] 1944 -193366 C[27] 2069 -193367 C[28] 2194 -193368 C[29] 2319 -193369 C[30] 2548 -181270 C[31] 2548 -168871 C[32] 2548 -156272C[33]Not use2548 -143873 S[64] 2548 -131274 S[63] 2548 -118875 S[62] 2548 -106276 S[61] 2548 -938No. Name X Y77 S[60] 2548 -81278 S[59] 2548 -68879 S[58] 2548 -56280 S[57] 2548 -43881 S[56] 2548 -31282 S[55] 2548 -18883 S[54] 2548 -6284 S[53] 2548 6285 S[52] 2548 18886 S[51] 2548 31287 S[50] 2548 43888 S[49] 2548 56289 S[48] 2548 68890 S[47] 2548 81291 S[46] 2548 93892 S[45] 2548 106293 S[44] 2548 118894 S[43] 2548 131295 S[42] 2548 143896 S[41] 2548 156297 S[40] 2548 168898 S[39] 2548 181299 S[38] 2319 1933 100 S[37] 2194 1933 101 S[36] 2069 1933 102 S[35] 1944 1933 103 S[34] 1819 1933 104 S[33] 1694 1933 105 S[32] 1569 1933 106 S[31] 1444 1933 107 S[30] 1319 1933 108 S[29] 1194 1933 109 S[28] 1069 1933 110 S[27] 944 1933 111 S[26] 819 1933 112 S[25] 694 1933 113 S[24] 569 1933 114 S[23] 444 1933 115 S[22] 319 1933 No. Name X Y 116 S[21] 194 1933 117 S[20] 69 1933 118 S[19] -56 1933 119 S[18] -181 1933 120 S[17] -306 1933 121 S[16] -431 1933 122 S[15] -556 1933 123 S[14] -681 1933 124 S[13] -806 1933 125 S[12] -931 1933 126 S[11] -1056 1933 127 S[10] -1181 1933 128 S[9] -1306 1933 129 S[8] -1431 1933 130 S[7] -1556 1933 131 S[6] -1681 1933 132 S[5] -1806 1933 133 S[4] -1931 1933 134 S[3] -2056 1933 135 S[2] -2181 1933 136 S[1] -2306 1933Pin DescriptionName No. I/O Connects to FunctionXRESET 11 I ―System reset input (low active).PSB 23 I ―Interface selection:0: serial mode;1: 8/4-bit parallel bus mode.RS(CS*) 17 I MPU Parallel Mode: Register select.0: Select instruction register (write)or busy flag, address counter (read); 1: Select data register (write/read). Serial mode: Chip select.1: chip enabled;0: chip disabled.When chip is disabled, SID and SCLK should be set as “H” or “L”. Transcient of SID and SCLK is not allowed.RW(SID*) 18 I MPU Parallel Mode: Read/Write control. 0: Write;1: Read.Serial Mode: Sserial data input.E(SCLK*) 19 I MPU Parallel Mode: 1: Enable trigger. Serial Mode: Serial clock.D4 to D7 28~31 I/O MPU Higher nibble data bus of 8-bit interface and data bus for 4-bit interfaceD0 to D3 24~27 I/O MPU Lower nibble data bus of 8-bit interface.CL1 12 O Extension segment drv. Latch signal for extension segment drivers.CL2 13 O Extension segment drv. Shift clock for extension segment drivers.M 15 O Extension segment drv. AC signal for extension segment drivers voltage inversion.DOUT 16 O Extension segment drv. Data output for extension segment drivers.COM1 toCOM3240~71 O LCD Common signals. SEG1 toSEG64136~73 O LCD Segment signals.V0 to V4 1~3,7,8 ――LCD bias voltage. V0 ~ V4 ≦7V.V DD10,14 I Power V DD : 2.7V to 5.5V. Vss 9,20 I Power VSS: 0V.OSC1, OSC2 21,22 I, O ResistorsUsing internal oscillator:5.0V R=33K;2.7V R=18K.Using external clock:Use OSC1 as external clock input.VOUT 33 O Resistors LCD voltage doubler output. VOUT ≦7V.*Note: The OSC pin must have the shortest wiring pattern of all other pins. To prevent noise from other signal lines, it should also be enclosed by the largest GND pattern. Poor anti-noise characteristics on the OSC line will result in malfunction, or adversely affect the clock’s duty ratio.Pin Description (continued)NameNo.I/OConnects toDescriptionCAP3M CAP1P CAP1M CAP2M 34 35 36 38 I/O CapacitorsCapacitor pins for voltage doubler Voltage ≦ 7V.XOFF 32 O ― Reserved (no connection). CAP2P37 ― ― Reserved (no connection). C[33]72O―Reserved (no connection).VD2 39 I Reference voltageVoltage doubler reference voltage.If use internal voltage doubler, please make sure that: l VD2 ≦ 3.5V orl VOUT ≦ 7V and CAP3M ≦7V. CLK TT1 TT24 5 6I― ― ―For CGROM/HCGROM checksum.Refer to checksum application.Note: 1. 7V>=VOUT>=V0>=V1>=V2>=V3>=V4 must be maintained 2.Two clock options: As shown below.3.When using voltage doubler (VOUT), it is recommended that the sum of those divide resistors (R1~R5) should be larger than 20K Ohm. So that the voltage doubler can provide sufficient power.R=33K (VDD=5.0V) R=18K (VDD=2.7V)ROSC1OSC2Clock inputVoltage DoublerVoltage DoublerReference VoltageVoltage Doubler mode: VD2 & Vout output characteristic Notes:l Total resistance of the Follower deviding resistors should larger than 20K Ohm.l Booster Capacitor uses 4.7uFl Panel size: 80mm x 28mm (check display)Function DescriptionSystem interfaceST7920 supports 3 kinds of bus interface to communicate with MPU: 8-bit parallel, 4-bit parallel and clock synchronized serial interface. Parallel interface is selected by PSB=”1” and serial interface is by PSB=”0”. 8-bit / 4-bit interface is selected by function set instruction DL bit.Two 8-bit registers (Data Register DR and Instruction Register IR) are used in ST7920 to access DRAM or Register. Data Register (DR) can access DDRAM, CGRAM and GDRAM through the address pointer implemented by Address Counter (AC). Instruction Register (IR) stores the instruction sent by MPU to ST7920.4 kinds of parallel interface access mode can be selected through RS and RW:RS RW DescriptionL L MPU write instruction to instruction register (IR)L H MPU read busy flag (BF) and address counter (AC)H L MPU write data to data register (DR)H H MPU read data from data register (DR)* The serial interface access modes do not have Read operation.Busy Flag (BF)ST7920 needs a process time for any received instruction. Before finishing the received instruction, any further instruction is not accepted. The process time of each instruction is not equal and the internal process is finished or not can be determined by the BF. Internal operation is in progress while BF=”1”, that means ST7920 is in busy state. No further instructions will be accepted until BF=”0”. MPU must check BF to determine whether the internal operation is finished or not before issuing instruction.Address Counter (AC)Address Counter (AC) is used as the address pointer of DDRAM, CGRAM and GDRAM. (AC) can be set by instruction. After that, accesses (Read/Write operations) to the memories, such as DDRAM, CGRAM or GDRAM, (AC) will be increased or decreased by 1 (according to the setting in “Entry Mode Set”Register). When RS=”0”, RW=”1” and E=”1” the value of (AC) will be output to DB6~DB0.Character Generation ROM (CGROM) and Half-width Character Generation ROM (HCGROM)ST7920 is built in a Character Generation ROM (CGROM) to provide 8192 16x16 character fonts and a Half-width Character Generation ROM to provide 126 8x16 alphanumeric characters. It is easy to support multi-language applications such as Chinese and English. Two consecutive bytes are used to specify one 16x16 character or two 8x16 half-width characters. Character codes are written into DDRAM and the corresponding fonts are mapped from CGROM or HCGROM to the display drivers.Character Generation RAM (CGRAM)ST7920 is built in a Character Generation RAM (CGRAM) to support user-defined fonts. Four sets of 16x16 bit-maped RAM spaces are available. These user-defined fonts are displayed the same ways as CGROM fonts by writing the related character code into the DDRAM.Display Data RAM (DDRAM)There are 64x2 bytes RAM spaces for the Display Data RAM. It can store display data such as 16 characters (16x16) by 4 lines or 32 characters (8x16) by 4 lines. However, only 2 character-lines (maximum 32 common outputs) can be displayed at one time. Character codes stored in DDRAM will refer to the fonts specified by CGROM, HCGROM and CGRAM.ST7920 can display half-width HCGROM fonts, user-defined CGRAM fonts and full 16x16 CGROM fonts. The character codes in 0000H~0006H will use user-defined fonts in CGRAM. The character codes in 02H~7FH will use half-width alpha numeric fonts. The character code larger than A1H will be treated as 16x16 fonts and will be combined with the next byte automatically. The 16x16 BIG5 fonts are stored in A140H~D75FH while the 16x16 GB fonts are stored in A1A0H~F7FFH. In short:1. To display HCGROM fonts:Write 2 bytes of data into DDRAM to display two 8x16 fonts. Each byte represents 1 character.The data is among 02H~7FH.2. To display CGRAM fonts:Write 2 bytes of data into DDRAM to display one 16x16 font.Only 0000H, 0002H, 0004H and 0006H are acceptable.3. To display CGROM fonts:Write 2 bytes of data into DDRAM to display one 16x16 font.A140H~D75FH are BIG5 code, A1A0H~F7FFH are GB code.The higher byte (D15~D8) is written first and the lower byte (D7~D0) is the next.Please refer to Table 5 for the relationship between DDRAM and the address/data of CGRAM.Graphic RAM (GDRAM)Graphic Display RAM has 64x256 bits bit-mapped memory space. GDRAM address is set by writing 2 consecutive bytes of vertical address and horizontal address. Two-byte data (16 bits) configures one GDRAM horizontal address. The Address Counter (AC) will be increased by one automatically after receiving the 16-bit data for the next operation. After the horizontal address reaching 0FH, the horizontal address will be set to 00H and the vertical address will not change. The procedure is summarized below:1. Set vertical address (Y) for GDRAM2. Set horizontal address (X) for GDRAM3. Write D15~D8 to GDRAM (first byte)4. Write D7~D0 to GDRAM (second byte)Please refer to Table 7 for Graphic Display RAM mapping.LCD driverST7920 embedded LCD driver has 33 commons and 64 segments to drive the LCD panel. Segment data from CGRAM, CGROM and HCGROM are shifted into the 64 bits segment latche to display. Extended segment driver (ST7921) can be used to extend the segment outputs upto 256 segments.DDRAM data (char. code) CGRAMAddr.CGRAM data(higher byte)CGRAM data(lower byte)B15~ B4 B3B2B1BB5B4B3B2B1BD15D14D13D12D11D1D9D8D7D6D5D4D3D2D1D0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 0 0 0 00 0 0 1 1 1 1 1 1 1 1 0 0 1 0 0 0 0 0 00 0 1 0 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 00 0 1 1 0 0 0 1 0 0 0 0 0 1 1 1 1 1 1 00 1 0 0 0 0 1 0 0 1 0 0 1 0 0 0 0 1 0 00 1 0 1 0 0 1 1 1 1 0 0 1 0 0 0 0 1 0 00 1 1 0 0 1 1 0 0 1 0 1 0 1 0 0 1 0 0 00 1 1 1 1 0 1 0 0 1 1 0 0 1 0 0 1 0 0 01 0 0 0 0 0 1 0 0 1 0 0 0 1 0 1 0 0 0 01 0 0 1 0 0 1 0 0 1 0 0 0 0 0 1 0 0 0 01 0 1 0 0 0 1 0 0 1 0 0 0 0 1 0 0 0 0 01 0 1 1 0 0 1 1 1 1 0 0 0 0 1 0 0 0 0 01 1 0 0 0 0 1 0 0 1 0 0 0 1 0 0 0 0 0 01 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 01 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 00 X 00 X 001 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 1 00 0 0 1 0 0 0 1 1 0 1 0 0 0 0 0 0 1 0 00 0 1 0 0 0 1 0 0 0 0 1 0 0 1 1 0 1 0 00 0 1 1 0 1 0 1 1 1 0 1 1 0 1 0 0 1 0 00 1 0 0 1 0 0 0 0 0 0 0 1 0 1 0 0 1 0 00 1 0 1 0 1 1 1 1 1 1 1 0 0 1 0 0 1 0 00 1 1 0 0 1 0 0 0 0 0 1 0 0 1 0 0 1 0 00 1 1 1 0 1 1 1 1 1 1 1 0 0 1 0 0 1 0 01 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0 0 1 0 01 0 0 1 0 1 1 1 1 1 1 1 0 0 1 0 0 1 0 01 0 1 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 0 01 0 1 1 0 1 1 1 1 1 1 1 1 0 0 0 1 0 01 1 0 0 1 0 1 0 0 0 0 0 1 0 1 0 0 1 0 01 1 0 1 1 0 1 1 1 1 1 1 1 0 0 1 1 1 0 01 1 1 0 1 0 1 0 0 0 0 0 1 0 0 0 1 0 0 00 X 01 X 011 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Table 5: DDRAM data (character code) vs. CGRAM data/address mapNote:1. DDRAM data (character code) bit1 and bit2 are identical with CGRAM address bit4 and bit5.2. CGRAM address bit0 to bit3 specify total 16 rows. Row-16 is for cursor display. The data in Row-16 will be logically OR to the cursor.3. CGRAM data for each address is 16 bits.4. To select the CGRAM font, the bit4 through bit15 of DDRAM data must be “0” while bit0 and bit3 are “don’t care”.Table 6 16x8 half-width charactersTable 7 GDRAM display coordinates and corresponding addressInstructionsST7920 offers basic instruction set and extended instruction set: Instruction Set 1: (RE=0: Basic Instruction)CodeInst.RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Description Exec time(540KHZ)Display Clear 0 0 0 0 0 0 0 0 0 1Fill DDRAM with "20H" and set DDRAM address counter (AC)to "00H".1.6 msReturn Home 0 0 0 0 0 0 0 0 1 XSet DDRAM address counter (AC) to "00H", and put cursorto origin ；the content of DDRAM are not changed72 usEntry ModeSet 0 0 0 0 0 0 0 1 I/D SSet cursor position and display shift when doing write or readoperation72 usDisplay Control 0 0 0 0 0 0 1 D C BD=1: Display ONC=1: Cursor ONB=1: Character Blink ON72 usCursorDisplay Control 0 0 0 0 0 1 S/C R/L X XCursor position and display shift control; the content ofDDRAM are not changed72 usFunctionSet 0 0 0 0 1 DL XREX XDL=1 8-bit interfaceDL=0 4-bit interfaceRE=1: extended instructionRE=0: basic instruction72 usSetCGRAM Address. 0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0Set CGRAM address to address counter (AC)Make sure that in extended instruction SR=0 (scroll orRAM address select)72 usSetDDRAM Address. 0 0 1AC6AC5 AC4 AC3 AC2 AC1 AC0Set DDRAM address to address counter (AC)AC6 is fixed to 072 usReadBusy Flag (BF) & AC. 0 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0Read busy flag (BF) for completion of internal operation, alsoRead out the value of address counter (AC)0 usWrite RAM 1 0 D7 D6 D5 D4 D3 D2 D1 D0 Write data to internal RAM(DDRAM/CGRAM/GDRAM)72 usRead RAM 1 1 D7 D6 D5 D4 D3 D2 D1 D0 Read data from internal RAM(DDRAM/CGRAM/GDRAM)72 usInstruction set 2: (RE=1: extended instruction)CodeInst.RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Description Exec time(540KHZ)Standby 0 0 0 0 0 0 0 0 0 1 Enter standby mode, any other instruction can terminate.COM1…32 are halted.72 usScroll orRAM Address. Select 0 0 0 0 0 0 0 0 1 SRSR=1: enable vertical scroll positionSR=0: enable CGRAM address (basic instruction)72 usReverse (by line) 0 0 0 0 0 0 0 1 R1 R0Select 1 out of 4 line (in DDRAM) and decide whether toreverse the display by toggling this instructionR1,R0 initial value is 0,072 usExtendedFunctionSet 0 0 0 0 1 DL X1REG 0DL=1 :8-bit interfaceDL=0 :4-bit interfaceRE=1: extended instruction setRE=0: basic instruction setG=1 :graphic display ONG=0 :graphic display OFF72 usSet ScrollAddress0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 SR=1: AC5~AC0 the address of vertical scroll 72 us Set GraphicDisplay RAM Address 0 0 1AC5AC4AC3AC3AC2AC2AC1AC1AC0AC0Set GDRAM address to address counter (AC)Set the vertical address first and followed the horizontaladdress by consecutive writingsVertical address range: AC5…AC0Horizontal address range: AC3…AC072 usNote:1. Make sure that ST7920 is not in busy state by reading the busy flag before sending instruction or data. If using delay loop instead, pleasemake sure the delay time is enough. Please refer to the instruction execution time.2. “RE” is the selection bit of basic and extended instruction set. After setting the RE bit, the value will be kept. So that the software doesn’thave to set RE every time when using the same instruction set.Initial Setting (Register flag) (RE=0: basic instruction) CodeInst.RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Description0 0 0 0 0 0 0 1 I/D SEntry ModeSet1 0 Cursor move to right ,DDRAM address counter (AC) plus 1 0 0 0 0 0 0 1 D C BDisplay Control0 0 Display, cursor and blink are ALL OFF 0 0 0 0 0 1 S/C R/LX XCURSOR DISPLAY SHIFTX X No cursor or display shift operation0 0 0 0 1 DL X 0 RE X XFUNCTIONSET18-bit MPU interface , basic instruction setInitial Setting (Register flag) (RE=1: extended instruction set) CodeInst.RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Description0 0 0 0 0 0 0 0 1 SRSCROLL OR RAM ADDR. SELECTAllow vertical scroll or set CGRAM address 00 0 0 0 0 0 1 R1 R0REVERSE0 0 Begin with normal and toggle to reverse0 0 0 0 1 DL X 1 RE G 0EXTENDED FUNCTIONSETGraphic display OFFDescription of basic instruction set lDisplay ClearThis instruction will change the following items: 1. Fill DDRAM with "20H"(space code).2. Set DDRAM address counter (AC) to"00H".3. Set Entry Mode I/D bit to be "1". Cursor moves right and AC adds 1 after write or read operation. l Return HomeSet address counter (AC) to "00H". Cursor moves to origin. Then content of DDRAM is not changed.l Enry Mode SetSet the cursor movement and display shift direction when doing write or read operation.I/D: Address Counter Control: (Increase/Decrease)When I/D = "1", cursor moves right, address counter (AC) is increased by 1. When I/D = "0", cursor moves left, address counter (AC) is decreased by 1. S: Display Shift Control: (Shift Left/Right)S I/D DESCRIPTION H H Entire display shift left by 1 H L Entire display shift right by 10 00 00 00 00 00 00 00 01 CodeCodeCodeRS RS RS RW RW RW DB7 DB7 DB7 DB6 DB6 DB6 DB5 DB5 DB5 DB4 DB4 DB4 DB1 DB1 DB1 DB2 DB2 DB2 DB3 DB3 DB3 0 1I/D 1XSDB0DB0DB0lDisplay ControlControls display, cursor and blink ON/OFF. D: Display ON/OFF control bit When D = "1", display ONWhen D = "0", display OFF, the content of DDRAM is not changed C: Cursor ON/OFF control bit When C = "1", cursor ON. When C = "0", cursor OFF.B: Character Blink ON/OFF control bitWhen B = "1", cursor position blink ON. Then display data (character) in cursor position will blink. When B = "0", cursor position blink OFFl Cursor/Display Shift ControlThis instruction configures the cursor moving direction or the display shifting direction. The content of DDRAM isnot changed.S/C R/L Description AC Value L L Cursor moves left by 1 position AC=AC-1 L H Cursor moves right by 1 position AC=AC+1 H L Display shift left by 1, cursor also follows to shift. AC=AC H H Display shift right by 1, cursor also follows to shift. AC=AC0 00 00 00 00 00 1 1 S/C D R/L CodeCodeRS RS RW RW DB7 DB7 DB6 DB6 DB5 DB5 DB4 DB4 DB1 DB1 DB2 DB2 DB3 DB3 C XBXDB0DB0ST7920V4.021/492008/08/18lFunction SetDL: 4/8-bit interface control bitWhen DL = "1", 8-bit MPU bus interface When DL = "0", 4-bit MPU bus interface RE: extended instruction set control bit When RE = "1", extended instruction set When RE = "0", basic instruction setIn same instruction cannot alter DL and RE at once. Make sure that change DL first then RE.l Set CGRAM AddressSet CGRAM address into address counter (AC) AC range is 00H …3FHMake sure that in extended instruction SR=0 (scroll address or RAM address select)l Set DDRAM AddressSet DDRAM address into address counter (AC). First line AC range is 80H …8FH Second line AC range is 90H …9FH Third line AC range is A0H …AFH Fourth line AC range is B0H …BFHPlease note that only 2 lines can be display with one ST7920.l Read Busy Flag (BF) and AddressRead busy flag (BF) can check whether the internal operation is finished or not. At the same time, the value of address counter (AC) is also read. When BF = “1”, further instruction(s) will not be accepted until BF = “0”.0 0 0 0 1 DL X RE CodeRS RW DB7 DB6 DB5 DB4 DB1 DB2 DB3 X XDB00 1 BF AC6 AC5 AC4 AC3 AC2 CodeRSRW DB7 DB6 DB5 DB4 DB1 DB2 DB3 AC1 AC0DB00 0 0 1 AC5 AC4 AC3 AC2 CodeRSRW DB7 DB6 DB5 DB4 DB1 DB2 DB3 AC1 AC0DB01AC6 AC5 AC4 AC3 AC2 CodeRS RW DB7 DB6 DB5 DB4 DB1 DB2 DB3 AC1 AC0DB0ST7920V4.022/492008/08/18l Write Data to RAMWrite data to the internal RAM and increase/decrease the (AC) by 1Each RAM address (CGRAM, DDRAM and GDRAM …) must write 2 consecutive bytes for 16-bit data. After receiving the second byte, the address counter will increase or decrease by 1 according to the entry mode set control bit.l Read RAM DataRead data from the internal RAM and increase/decrease the (AC) by 1After the operation mode changed to Read (CGRAM, DDRAM and GDRAM …), a “Dummy Read ” is required. There is no need to add a “Dummy Read ” for the following bytes unless a new address set instruction is issued.1 10 1 D7 D7 D6 D6 D5 D5 D4 D4 D3 D3 D2 D2 CodeCodeRS RS RW RW DB7 DB7 DB6 DB6 DB5 DB5 DB4 DB4 DB1 DB1 DB2 DB2 DB3 DB3 D1 D1 D0D0DB0DB0。
赛米控丹佛斯 配置IGBT M7芯片 SEMITRANS 2 SKM200GB12M7 数据表
Rev. 0.1–27.10.20231®2GBIGBT M7 ModulesSKM200GB12M7Target Data Features*•V CE(sat) with positive temperature coefficient•High overload capability•Low loss high density IGBT´s•Fast & soft switching inverse CAL diodes•Large clearance (10 mm) and creepage distances (20 mm)•Insulated copper baseplate using DBC Technology (Direct Bonded Copper) •UL recognized, file no. E63532Typical Applications•AC inverter drives •UPS•Electronic welders •Wind power •Public transportRemarks•Max. case temperature limited to T C = T S = 125 °C•Product reliability results are valid for T j = 150 °C (recommended T j,op = -40...+150 °C)•For storage and case temperature with TIM see document: ″Technical Explanations Thermal Interface Materials ″Absolute Maximum Ratings SymbolConditions Values UnitIGBT V CES 1200V I C T j =175°CT c =25°C 282A T c =80°C214A I Cnom 200A I CRM400A V GES -20 (20)V t psc V CC =800V V GE ≤ 15V V CES ≤ 1200 VT j =150°C8µs T j -40...175°C Inverse diodeV RRM T j =25°C 1200V I F T j =175°CT c =25°C 217A T c =80°C163A I FRM 400A I FSM t p =10ms, sin 180°, T j =25°C1180A T j -40...175°C Module I t(RMS)200A T stg module without TIM -40...125°C V isolAC sinus 50 Hz, t =1min4000VCharacteristics SymbolConditionsmin.typ.max.UnitIGBT V CE(sat)I C =200A V GE =15V chiplevel T j =25°C 1.55 1.88V T j =150°C 1.85V V CE0chiplevel T j =25°C 0.85 1.02V T j =150°C 0.75V r CE V GE =15V chiplevelT j =25°C 3.5 4.3m ΩT j =150°C5.5m ΩV GE(th)V CE = 10 V, I C =20mA5.466.6V I CES V GE =0V,V CE =1200V, T j =25°C 2.0mA C ies V CE =10V V GE =0Vf =1MHz 37.0nF C oes f =1MHz 1.18nF C res f =1MHz0.42nF Q G V GE =-8V ... + 15V 1780nC R Gint T j =25°C 2.0Ωt d(on)V CC =600V I C =200AV GE =+15/-15VT j =150°C t.b.d.ns t r T j =150°C t.b.d.ns E on T j =150°C 21mJ t d(off)T j =150°C t.b.d.ns t f T j =150°C t.b.d.ns E off T j =150°C 22mJR th(j-c)per IGBT0.195K/W R th(c-s)per IGBT, P12 (reference)t.b.d.K/W R th(c-s)per IGBT, HP-PCMt.b.d.K/W2Rev. 0.1–27.10.2023© by SEMIKRON®2GBIGBT M7 ModulesSKM200GB12M7Target Data Features*•V CE(sat) with positive temperature coefficient•High overload capability•Low loss high density IGBT´s•Fast & soft switching inverse CAL diodes•Large clearance (10 mm) and creepage distances (20 mm)•Insulated copper baseplate using DBC Technology (Direct Bonded Copper) •UL recognized, file no. E63532Typical Applications•AC inverter drives •UPS•Electronic welders •Wind power •Public transportRemarks•Max. case temperature limited to T C = T S = 125 °C•Product reliability results are valid for T j = 150 °C (recommended T j,op = -40...+150 °C)•For storage and case temperature with TIM see document: ″Technical Explanations Thermal Interface Materials ″Characteristics SymbolConditionsmin.typ.max.UnitInverse diodeV F = V EC I F =200AV GE =0V chiplevelT j =25°C 2.21 2.59V T j =150°C 2.31V V F0chiplevel T j =25°C 1.33 1.53V T j =150°C 1.03V r Fchiplevel T j =25°C 4.4 5.3m ΩT j =150°C 6.4m ΩI RRM I F =200A V GE =-15V V CC =600V T j =150°C t.b.d.A Q rr T j =150°C t.b.d.µC E rr T j =150°C15mJR th(j-c)per diode0.245K/W R th(c-s)per diode, P12 (reference)t.b.d.K/W R th(c-s)per diode, HP-PCMt.b.d.K/W Module L CE 30nH R CC'+EE'measured per switchT C =25°C 0.65m ΩT C =125°C1.09m ΩR th(c-s)1calculated without thermal coupling t.b.d.K/W R th(c-s)2including thermal coupling,T s underneath module, P12 (reference)t.b.d.K/W R th(c-s)2including thermal coupling,T s underneath module, HP-PCM -K/WM s to heat sink M635Nm M t to terminals M52.55Nm -Nm w160g© by SEMIKRON Rev. 0.1–27.10.20233GBIMPORTANT INFORMATION AND WARNINGSThis is an electrostatic discharge sensitive device (ESDS) according to international standard IEC 61340.*The specifications of Semikron Danfoss products may not be considered as any guarantee or assurance of product characteristics ("Beschaffenheitsgarantie"). The specifications of Semikron Danfoss products describe only the usual characteristics of Semikron Danfoss products to be expected in typical applications, which may still vary depending on the specific application. Therefore, products must be tested for the respective application in advance. Resulting from this, application adjustments of any kind may be necessary. Any user of Semikron Danfoss products is responsible for the safety of their applications embedding Semikron Danfoss products and must take adequate safety measures to prevent the applications from causing any physical injury, fire or other problem, also if any Semikron Danfoss product becomes faulty. Any user is responsible for making sure that the application design and realization are compliant with all laws, regulations, norms and standards applicable to the scope of application. Unless otherwise explicitly approved by Semikron Danfoss in a written document signed by authorized representatives of Semikron Danfoss, Semikron Danfoss products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. No representation or warranty is given and no liability is assumed with respect to the accuracy, completeness and/or use of any information herein, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Semikron Danfoss does not convey any license under its or a third party’s patent rights, copyrights, trade secrets or other intellectual property rights, neither does it make any representation or warranty of non-infringement of intellectual property rights of any third party which may arise from a user’s applications.4。
友台半导体有限公司ME2188 DC-DC升压转换器说明书
ME2188
■ 产品简介
系列芯片是采用CMOS 工艺制造的低静态电流的PFM 开关型同步整流DC/DC 升压转换器。
该
系列芯片采用先进的电路设计和制造工艺，极大地改善了开关电路固有的噪声问题，减小对周围电路的干扰，非常适合应用于电池供电的设备仪器。
■ 产品特点
■ 产品用途
■ 封装形式和管脚功能定义
● 1-3节电池供电的电子设备
● LED 手电筒、LED 灯、LED 背光源
● 无线鼠标、无线键盘、照相机、摄像机、PDA 、手持电话、电动玩具等便携设备
升压同步整流DC-DC
升压
■ 型号选择
■ 原理框图
同步整流DC-DC
■ 应用电路
■ 极限参数
注：极限参数是指无论在任何条件下都不能超过的极限值。
一旦超过此极限值，将有可能造成产品劣化等物理性损伤；同时在接近极限参数下，不能保证芯片可以正常工作。
升压同步整流DC-DC
■电学特性
■
Fig.1 Ci=100uF，Co=100uF，L1=47uH( 4X6)
升压同步整流DC-DC
Fig.3
Fig.4
Fig.5 RIN=100R,Co=100uF
Fig.2 RIN=100R,Co=100uF
R OP_SW
=(VIN-Vo)/Iout
Fig.7
R ON_SW =RIN*Vwave_L/(VIN-Vwave_L); RIN=10R,Co=100uF
Fig.6
升压同步整流DC-DC
ME2188C27
■ 特性曲线图 （M5G ）
3、输出电压 VS. 输出电流
升压同步整流DC-DC
■ 封装信息。
升压型LED恒流驱动器芯片XL6003
升压型LED恒流驱动器芯片XL6003400KHz 42V 2A Switching Current Boost LED Constant Current Driver XL6003Featuresn Wide 5V to 18V Input Voltage Range n 0.22V FB adjustable LED drive current n Directly drive 6 Series 1W LED atVIN>=12Vn Fixed 400KHz Switching Frequency n Max. 2A Switching Current Capability n Up to 92% efficiencyn Excellent line and load regulationn EN PIN TTL shutdown capability &With PWM Dimming Function n Internal Optimize Power MOSFET n Built in Soft-Start Functionn Built in Frequency Compensation n Built in Thermal Shutdown Function n Built in Current Limit Function n Available in SOP8 packageApplicationsn LED Lightingn Boost constant current driver n Monitor LED Backlighting n 7’ to 15’ LCD PanelsGeneral DescriptionThe XL6003 regulator is fixed frequency PWM Boost (step-up) LED constant current driver, capable of driving Series 1W LED units with excellent line and load regulation. The regulator is simple to use because it includes internal frequency compensation and a fixed-frequency oscillator so that it requires a minimum number of external components to work.The XL6003 could directly drive 6 Series 1W LED units atVIN>12V .The PWM control circuit is able to adjust the duty ratio linearly from 0 to 95%. An enable function, an over current protection function is built inside. An internal compensation block is built in to minimize external component count.Figure1. Package Type of XL6003400KHz 42V 2A Switching Current Boost LED Constant Current DriverXL6003Pin ConfigurationsSWEN FB VIN NCSW GNDGNDFigure2. Pin Configuration of XL6003 (Top View)Table 1 Pin DescriptionPin NumberPin Name Description1 ENEnable Pin. Drive EN pin low to turn off the device, drive it high to turn it on. Floating is default high.2 VINSupply V oltage Input Pin. XL6003 operates from a 5V to 18V DC voltage. Bypass Vin to GND with a suitably large capacitor to eliminate noise on the input.3 FB Feedback Pin (FB). The feedback threshold voltage is 0.22V .4 NC No Connected.5,6 SWPower Switch Output Pin (SW). Output is the switch node thatsupplies power to the output.7,8 GND Ground Pin.400KHz 42V 2A Switching Current Boost LED Constant Current Driver XL6003 Function BlockFigure3. Function Block Diagram of XL6003Typical Application CircuitFigure4. XL6003 Typical Application CircuitDatasheet400KHz 42V 2A Switching Current Boost LED Constant Current Driver XL6003Ordering InformationPart Number Marking ID Lead Free Lead Free Packing Type XL6003E1 XL6003E1 Tube PackageTemperature RangeXL6003TRE1XL6003E1Tape & ReelXLSEMI Pb-free products, as designated with “E1” suffix in the par number, are RoHS compliant.Absolute Maximum Ratings （Note1）ParameterSymbol Value Unit Input VoltageVin -0.3 to 20 V Feedback Pin Voltage V FB -0.3 to Vin V EN Pin VoltageV EN -0.3 to Vin V Output Switch Pin Voltage V Output -0.3 to 42 V Power DissipationP D Internally limitedmW Thermal Resistance (SOP8)(Junction to Ambient, No Heatsink, Free Air) R JA 100 oC/W Operating Junction Temperature T J -40 to 125 oC Storage TemperatureT STG -65 to 150 oC Lead Temperature (Soldering, 10 sec) T LEAD 260 oC ESD (HBM)>2000VNote1: Stresses greater than those listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.400KHz 42V 2A Switching Current Boost LED Constant Current Driver XL6003 XL6003 Electrical Characteristics T a = 25℃;unless otherwise specified.Symbol Parameter Test Condition Min. Typ. Max. Unit System parameters test circuit figure4VFB FeedbackV oltageVin = 5V to 12V, V out=24VIload=100mA209 220 231 mVEfficiency ?Vin=12V ,V out=24VIout=0.3A- 92 - %Electrical Characteristics (DC Parameters)Vin = 12V, GND=0V, Vin & GND parallel connect a 100uf/50V capacito r; Iout=100mA, T a = 25℃; the others floating unless otherwise specified.Parameters Symbol Test Condition Min. Typ. Max. Unit Input operation voltage Vin 5 18 V Shutdown Supply Current I STBY V EN=0V 70 100 uAQuiescent Supply Current I q V EN =2V,V FB =Vin2.5 5 mAOscillator Frequency Fosc 320 400 480 Khz Switch Current Limit I L V FB =0 2 AOutput Power NMOS Rdson Vin=12V,I SW=2A110 120 mohmEN Pin Threshold V EN High (Regulator ON)Low (Regulator OFF)1.40.8VI H V EN =2V (ON) 3 10 uA EN Pin Input LeakageCurrent ILV EN =0V (OFF) 3 10 uA Max. Duty Cycle D MAX V FB=0V 90 %400KHz 42V 2A Switching Current Boost LED Constant Current Driver XL6003Schottky Diode Selection TableCurrent SurfaceMountThrough Hole VR (The same as system maximum input voltage)20V 30V 40V 50V 60V1A √1N5817 1N5818 1N5819√ 1N5820 1N5821 1N5822√ MBR320 MBR330 MBR340 MBR350 MBR360 √ SK32 SK33 SK34SK35SK36 √ 30WQ03 30WQ04 30WQ05 √ 31DQ03 31DQ04 31DQ05 3A√SR302SR303SR304SR305SR306Typical System Application for VIN=5V to driver 3 x 1W series LED unitsFigure5. XL6003 System Parameters Test Circuit (5V ~ 3 x 1W LED)400KHz 42V 2A Switching Current Boost LED Constant Current Driver XL6003 Typical System Application for VIN>=12V to driver 6 x 1W series LED unitsFigure6. XL6003 System Parameters Test Circuit (12V ~ 6 x 1W LED)Typical System Application for VIN>=12V to driver 6 series x 28 parallelWhite LED ArrayFigure7. XL6003 System Parameters T est Circuit (12V ~ 6 x 28 White LED)400KHz 42V 2A Switching Current Boost LED Constant Current Driver XL6003 Typical System Application for SEPIC Buck-Boost LED DriverFigure8. XL6003 System Parameters T est Circuit (Buck-Boost LED Driver)Typical System Application for VIN>=12V to driver 6 x 1W series LED units With Dimming FunctionFigure9. XL6003 System Parameters Test Circuit (12V ~ 6 x 1W LED with Dimming Function)400KHz 42V 2A Switching Current Boost LED Constant Current Driver XL6003 Package InformationSOP8 Package Mechanical Dimensions。
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1/11October 2002s1V TO 6V INPUT GUARANTEES START-UP UNDER LOADsMAXIMUM OUTPUT CURRENT OF 300mA (778OR 779ADJUSTED TO 3V)sLOAD FULLY DISCONNECTED IN SHUTDOWNs TYPICAL EFFICIENCY OF 82%sINTERNAL 1A POWER SWITCH AND SYNCHRONOUS RECTIFIERsADJUSTABLE CURRENT LIMIT ALLOWS LOW-COST INDUCTORSs SUPPLY CURRENT OF 270µA (NO LOAD)s SHUTDOWN SUPPLY CURRENT 20µA sPACKAGE AVAILABLE:DIP-8AND SO-8DESCRIPTIONThe ST777/778/779are dc-dc converters that step-up from low voltage inputs requiring only three external components,an inductor (typically 22µH)and two capacitors.The device include a Sinchronous Rectifier that eliminates the need for an external catch diode,and allows regulation even when the input is greater than the output.Unlike others step-up DC-DC converters the ST777/778/779’s Sinchronous Rectifier turns off in the shutdown mode,fully disconnecting the output from the source.This eliminates the current drain associated with conventional step-up converters when off or in shutdown.Supply current is 270µA under no load and only 20µA in stand by mode.ST777/778/779LOW VOLTAGE INPUT,3-3.3V/5V/ADJUSTABLE OUTPUT DC-DC CONVERTER WITH SYNCHRONOUS RECTIFIERV INV O22µH100µF100µFR LIMI LIM L XINOUT PGND SEL AGND12345678SHDN1.25VVREFSHUTDOWN CONTROLDELAY TIMERDELAY TIMERt OFFt ONSWITCH DRIVERACTIVE RECTIFIERRECTIFIER CONTROL1:NSCHEMATIC DIAGRAMST777/778/7792/11ABSOLUTE MAXIMUM RATINGSAbsolute Maximum Ratings are those values beyond which damage to the device may occur.Functional operation under these condition is not implied.ORDERING CODESCONNECTION DIAGRAMPIN CONNECTIONSTHERMAL DATASymbol ParameterValue Unit V CCDC Input Voltage to GND -0.3to +7V LXSwitch off Pin Voltage -0.3to +7V Switch on Pin Voltage 30sec short to IN or OUTOUT,SHDN Output,Shutdown Voltage -0.3to +7V AGND to PGNDAnalog and Power Ground -0.3to +0.3V FBFB Pin Voltage-0.3to (OUT+0.3)V P TOT Continuous Power Dissipation (at T A =85°C)DIP-8550mW Continuous Power Dissipation (at T A =85°C)SO-8344T STG Storage Temperature Range-40to 150°C T OPOperating Ambient Temperature Range0to 85°CTYPE DIP-8SO-8ST777ST777ACN ST777ACD ST778ST778ACN ST778ACD ST779ST779ACNST779ACDPin No.SYMBOL NAME AND FUNCTION1ILIM Sets switch current limit input.Connect to IN for 1A current limit.A resistor from ILIM to IN sets lower peak inductor currents.2IN Input from battery3AGND Analog ground.Not internally connected to PGND.4PGND Power ground.Must be low impedance;solder directly to ground plane or star ground.Connect to AGND,close to the device.5LX Collector of 1A NPN power switch and emitter of Sinchronous Rectifier PNP .6OUT Voltage Output.Connect filter capacitor close to pin.7SHDNShutdown input disables power supply when low.Also disconnets load from input.Threshold is set at V IN /2.8SEL/N.C./FB -Selection pin for 3/3.3V version (778);-Not internally connected for 5V version (777);-Feedback pin for adjustable version (779).Symbol ParameterDIP-8SO-8Unit R thj-ambThermal Resistance Junction-ambient100160°C/WST777/778/7793/11ELECTRICAL CHARACTERISTICS (V IN =2.5V,C I =22µF,C O =100µF,SHDN and ILIM connected to IN,AGND connected to PGND,T A =0to 85°C,unless otherwise specified.Typical values are referred at T A =25°C)Note 1:Output in regulation,V OUT =V OUT (nominal)± 4%.Note 2:At hight V IN to V OUT differentials,the maximum load current is limited by the maximum allowable power dissipation in the package.Note 3:Start-up guaranteed under these load conditions.Note 4:Minimum value is production tested.Maximum value is guaranteed by design and is not production tested.Note 5:In the ST779supply current depends on the resistor divider used to set the output voltage.Note 6:V OUT is set to a target value of +5V by 0.1%external feedback resistors.V OUT is measured to be 5V±2.5%to guarantee the error comparator trip point.Symbol Parameter Test ConditionsMin.Typ.Max.Unit V START Start up Voltage I LOAD <10mA,T A =25°C (Note 1)1V V IN(MAX)Maximum Input Voltage (Note 1,2)6V V OOutput Voltage ST777779(set to 5V),(Note 3)I LOAD ≤ 30mA,V IN = 1.1V to 5V or I LOAD ≤ 80mA,V IN = 1.8V to 5V or I LOAD ≤ 130mA,V IN = 2.4V to 5V 4.85.05.2VOutput Voltage ST778(Note 3)SEL=0VI LOAD ≤ 50mA,V IN =1.1V to 3.3V or I LOAD ≤ 210mA,V IN =1.8V to 3.3V or I LOAD ≤ 300mA,V IN =2.4V to 3.3V 3.17 3.30 3.43VSEL=OPENI LOAD ≤ 30mA,V IN =1.1V to 3V or I LOAD ≤ 210mA,V IN =1.8V to 3V or I LOAD ≤ 300mA,V IN =2.4V to 3V2.883.00 3.12VOutput Voltage Range ST779(Note 4)2.76.5V I IN No Load Supply Current I LOAD =0mA,(Switch ON)(Note 5)270µAI SHDN Shutdown Supply Current SHDN=0V,(Switch OFF)2035µA I IN SHDNShutdown Input Current SHDN =0to V IN 15100nA SHDN =V IN to 5V 1240µA υEfficiencyI LOAD =100mA 82%V IH Shutdown Input Threshold V IN =1V to 6VV IN /2+0.25V I LIMCurrent Limit1.0A I LIM TEMPCO Current Limit TemperatureCoefficient-0.3%/°C t OFFMIN Minimum Switch Off Time 1.2µst ONMAXMaximum Switch ON TimeV IN =2.5V 4.5V IN =1.8V 6.5V IN =1V15V CESAT NPN Switch saturation VoltageI SW =400mA 0.25VI SW =600mA 0.33I SW =1000mA0.5V CESAT NPN Rectifier Forward DropI SW =400mA 0.18V I SW =600mA 0.22I SW =1000mA0.4V FB Error Comparator Trip Point ST779,over operating inputvoltage (Note 6)1.23±2%V I FB FB Pin Bias Current ST779,V FB =1.3V 50nA I LXSwitch Off Leakage Current 0.1µA Rectifier Off Leakage Current0.1µAST777/778/7794/11TYPICAL APPLICATION CIRCUITAPPLICATIONS INFORMATIONR1and R2must be placed only in ST779applications to set the output voltage according to the following equation:V OUT =(1.23)[(R1+R2)/R2]and to simplify the resistor selection:R1=R2[(V OUT /1.23)-1]It is possible to use a wide range of values for R2(10K Ωto 50K Ω)with no significant loss of accuracy thanks to the very low FB input current.To have 1%error,the current through R2must be at least 100times FB’s bias current.When large values are used for the feedback resistors (R1>50K Ω),stray output impedance at FB can incidentally add "lag"to the feedback response,destabilizing the regulator and creating a larger ripple at the output.Lead lengths and circuit board traces at the FB node should be kept pensate the loop by adding a "lead"compensation capacitor (C3,100pF to 1nF)in parallel with R1.The typical value of the L1inductor is 22µH,enough for most applications.However,are also suitable values ranging from 10µF to 47µF with a saturation rating equal to or greater than the peak switch -current limit.Efficiency will be reduced if the inductor works near its saturation limit,while will be maximized using an inductor with a low DC resistance,preferably under 0.2Ω.Connecting ILIM to V IN the maximum LX current limit (1A)is set.If this maximum value is not required is possible to reduce it connecting a resistor between ILIM and V IN (See Figure 16to choose the right value).The current limit value is misured when the switch current through the inductor begins to flatten and does’nt coincide with the max short circuit current.Even if the device is designed to tolerate a short circuit without any damage,it is strictly recommended to avoid a continuos and durable short circuit of the output to GND.To achieve the best performances from switching power supply topology,particular care to layout drawing is needed,in order to minimize EMI and obtain low noise.Moreover,jitter free operation ensures the full device functionality.Wire lengths must be minimized,filter and by-pass capacitors must be low ESR type,placed as close as possible to the integrated circuit.Solder AGND and PGND pins directly to a ground plane.ST777/778/7795/11TYPICAL CHARACTERISTICS (unless otherwise specified T j =25°C,C I =22µF,C O =100µF)Figure 1:Output Voltage vs TemperatureFigure 2:Output Voltage vs Temperature Figure 3:Efficiency vs Temperature Figure 4:Efficiency vs Input VoltageFigure 5:Efficiency vs Output CurrentFigure 6:Efficiency vs Low OutputCurrentST777/778/7796/11Figure 7:No Load Supply Current vs Input VoltageFigure 8:No Load Supply Current vs Temperature Figure 9:Shutdown Input Threshold vs Input VoltageFigure 10:Minimum Switch Off Time vs TemperatureFigure 11:Maximum Switch ON Time vs TemperatureFigure 12:FB Pin Bias Current vsTemperatureST777/778/7797/11Figure 13:Error Comparator Trip Point vs TemperatureFigure 14:Maximum Output Current vs Input Voltage Figure 15:Maximum Output Current vs Input VoltageFigure 16:Peak Inductor Current vs Current-LimitResistorST777/778/7798/11Figure 17:Line TransientFigure 18:Load Transient Figure 19:Switching WaveformFigure 20:Switching WaveformPRINTED DEMOBOARD (Not in scale)VoutVinVout (5V)IoutST777/779Vin=2.5VIout=10m A to 130m AVoutIswVin=1.1V Iout=30mAVoutIswVin=2.5VIout=30mAST777/778/779 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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