LTC3539EDCB-2-PBF中文资料
LTC3537EUD-PBF中文资料
13537faT YPICAL APPLICATIONF EATURESA PPLICATIONSD ESCRIPTION Synchronous Step-Up DC/DC Converter and 100mA LDOThe L TC ®3537 combines a high effi ciency, 2.2MHz step-upDC/DC converter with an idependent 100mA low dropout regulator (LDO). The step-up converter starts from an input voltage as low as 0.68V and contains an internal 0.4Ω switch and a 0.6Ω synchronous rectifi er that disconnects from the output when disabled in shutdown.A switching frequency of 2.2MH z minimizes solution footprint by allowing the use of tiny, low profi le inductors and ceramic capacitors. The current mode PWM design is internally compensated, reducing external parts count. Fixed frequency switching is maintained until a light load current is sensed, at which point Burst Mode ® operation is engaged to maximize effi ciency. For low noise operation, Burst Mode Operation can be disabled. Anti-ring circuitry reduces EMI by damping the inductor in discontinuous mode. Additional features include a low shutdown current of under 1μA and thermal overload protection.The integrated LDO regulator provides a very low noise, programmable low dropout supply.nHigh Effi ciency Step-Up DC/DC Converter and LDO Step-Upn V IN: 0.68V to 5V , V OUT : 1.5V to 5.25V I OUT : 100mA at 3.3V , V IN >0.8V n 2.2MHz Fixed Frequency Operation n Synchronous Rectifi er with Output Disconnect n Burst Mode Operation (Pin Selectable)Linear LDO Regulator n V IN : 1.8V to 5.5V , V OUT : 0.6V to 5V I OUT : 100mAn 100mV Dropout Voltage at 50mA n 24dB Ripple Rejection at f SW Combinedn Power Good Indicators n Low-Battery Comparator n 30μA I Q n Low Profi le 3mm × 3mm × 0.75mm PackagenWireless Microphonesn Portable Medical instrumentsn Noise Cancelling/Portable Headsets n RF and Audio PowerL , L T , L TC, L TM and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.Effi ciency and Power Lossvs Load CurrentLOAD CURRENT (mA)0.01E F F I C I E N C Y (%)POWER LOSS (mW)10080906020304070501001000100.111000.01100.13537 TA01b10001100ALKALINE0.8V TO 1.6VV OUTB 3.3V V OLDO 3V23537faP IN CONFIGURATIONA BSOLUTE MAXIMUM RATINGS V INB and V INL Voltage ...................................–0.3V to 6V SW DC Voltage .............................................–0.3V to 6V SW Pulsed (<100ns) Voltage .......................–0.3V to 7V FBB, FBL, PGDB, PGDL Voltage ...................–0.3V to 6V MODE, ENBST , ENLDO Voltage ...................–0.3V to 6V LBI and LBO Voltage ....................................–0.3V to 6V V OUTB , V OLDO ...............................................–0.3V to 6V Operating Temperature (Notes 2, 5) .........–40°C to 85°C Junction Temperature ...........................................125°C Storage Temperature Range ...................–65°C to 125°C(Note 1)161514135678TOP VIEWUD PACKAGE16-LEAD (3mm s 3mm) PLASTIC QFN 9171011124321MODE LBI SGND V INB V INLV OLDO FBL FBBL B OP G N D S WV O U T BP G D BE N B S TP G D LE N L D OT JMAX = 125°C, θJA = 68°C/W (Note 6)EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCBO RDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTIONTEMPERATURE RANGE L TC3537EUD#PBFL TC3537EUD#TRPBFLDBD16-Lead (3mm × 3mm) Plastic QFN–40°C to 85°CConsult L TC Marketing for parts specifi ed with wider operating temperature ranges.Consult L TC Marketing for information on non-standard lead based fi nish parts.For more information on lead free part marking, go to: http://www.linear .com/leadfree/ For more information on tape and reel specifi cations, go to: http://www.linear .com/tapeandreel/E LECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operatingtemperature range, otherwise specifi cations are at T A = 25°C. V INB = 1.2V , V OUTB = 3.3V , unless otherwise noted.SYMBOL PARAMETERCONDITIONS MIN TYP MAX UNITSBoost ConverterV INMIN Minimum Start-Up Voltage I LOAD = 1mA0.680.8V V OUTB Output Voltage Range l 1.5 5.25V V FBB Feedback Voltage l1.1791.21 1.240V I FBB Feedback Input Current 150nA I QSHDN Quiescent Current - Shutdown V ENBST = V ENLDO = 0V , Not Including SW Leakage,V OUTB = 0V0.021μA I QACTIVE Quiescent Current - Active Measured on V OUTB , Nonswitching, MODE = 1.2V , V ENLDO = 0V300500μA I QBURST Quiescent Current - BurstMeasured on V OUTB , FBB >1.24V , MODE = 1.2V , V ENLDO = 0V 15μAI NLEAK NMOS Switch Leakage Current V SW = 5V0.15μA I PLEAKPMOS Switch Leakage Current V SW = 5V , V OUTB = 0V0.110μA33537faE LECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operatingtemperature range, otherwise specifi cations are at T A = 25°C. V INB = 1.2V , V OUTB = 3.3V , unless otherwise noted.SYMBOL PARAMETERCONDITIONS MIN TYP MAX UNITSR NMOSNMOS Switch On ResistanceV OUTB = 1.8VV OUTB = 3.3V V OUTB = 5V 0.80.40.3ΩΩΩR PMOSPMOS Switch On ResistanceV OUTB = 1.8V V OUTB = 3.3V V OUTB = 5V 10.60.4ΩΩΩI LIM NMOS Current Limit (Note 4)l600750mA t LIMDELAYCurrent Limit Delay Time to Output (Note 3)40ns Max Duty Cycle V FBB = 1.15V l 8792%Min Duty CycleV FBB = 1.3Vl 0%f SW Switching Frequency l 2 2.22.4MHz V ENBSTH ENBST Input High Voltage 0.8V V ENBSTL ENBST Input Low Voltage 0.3V I ENBSTIN ENBST Input Current V ENBST = 5.5V1.5μA V MODEH MODE Input High Voltage 0.8VV MODEL MODE Input Low Voltage 0.3V I MODEIN MODE Input Current V MODE = 5.5V 1.5μA t SS Soft-Start Time 0.5ms V FBLBI LBI Feedback Voltage Falling Threshold 530553575mV LBI Hysteresis Voltage 35mV I LBIIN LBI Input Current V LBI = 1V 1050nA V LBOLOW LBO Voltage Low I LBO = 5mA 200mV I LBOLEAK LBO Leakage Current V LBO = 5.5V 0.011μA V PGDBLOW PGDB Voltage Low I PGDB = 5mA 200mV I PGDBLEAKPGDB Leakage Current V PGDB = 5.5V 0.011μA PGDB T rip Point Voltage V FBB Rising 94% V OUTBPGDB Hysteresis6%SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITSLDO RegulatorV INL Input Voltage Range 1.8 5.5V V OLDO Output Voltage Range I LOAD = 100mAV FBL 5V I OUTMAX Max Output Current l 100mA V FBLFeedback Voltage l590600610mV Line Regulation V INL = 1.8V to 5.5V 0.1%Load RegulationI LOAD = 10mA to 90mA 0.4%V DROPOUTDropout VoltageI O = 50mA 100mVThe l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at T A = 25°C. V INL = 3.3V , V OLDO = 3V , unless otherwise noted.43537faNote 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.Note 2: The L TC3537 is guaranteed to meet performance specifi cations from 0°C to 85°C. Specifi cations over the –40°C to 85°C operatingtemperature range are assured by design, characterization and correlation with statistical process controls.Note 3: Specifi cation is guaranteed by design and not 100% tested in production.E LECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operatingtemperature range, otherwise specifi cations are at T A = 25°C. V INL = 3.3V, V OLDO = 3V, unless otherwise noted.SYMBOL PARAMETER CONDITIONSMIN TYP MAX UNITS PSRR Ripple Rejection f = 2.2MHz at I LOAD = 100mA (Note 3)24dB I SHORT Short Circuit Current Limit V OLDO = 0Vl110150mA V ENLDOH ENLDO Input High Voltage 0.8VV ENLDOL ENLDO Input Low Voltage 0.3V I ENLDO ENLDO Input Current V ENLDO = 5.5V 1.5μA V PGDLLOW PGDL Voltage Low I PGDL = 5mA 200mV I PGDLLEAKPGDL Leakage Current V PGDL = 5.5V 0.011μA PGDL T rip Point V FBL Rising96% V OLDOPGDL Hysteresis3%Note 4: Current measurements are made when the output is not switching.Note 5: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specifi ed maximum operating junction temperature may result in device degradation or failure.Note 6: Failure to solder the exposed backside of the package to the PC board ground plane will result in a thermal resistance much higher than 68°C/W .53537faT YPICAL PERFORMANCE CHARACTERISTICS Effi ciency vs Load Current and V INB for V OUTB = 5VMaximum Output Current vs V INBMinimum Load Resistance During Start-Up vs V INBStart-Up Delay Time vs V INBBurst Mode Threshold Current vs V INBBurst Mode Threshold Current vs V INBEffi ciency vs Load Current andV INB for V OUTB = 1.8VEffi ciency vs Load Current and V INB for V OUTB = 3.3VNo-Load Input Current vs V INBT A = 25°C unless otherwise noted.LOAD CURRENT (mA)0.01E F F I C I E N C Y (%)POWER LOSS (mW)10080906020304070501001000100.111000.01100.13537 G0110001100LOAD CURRENT (mA)0.01E F F I C I E N C Y (%)POWER LOSS (mW)10080906020304070501001000100.111000.01100.13537 G0210001100V INB (V)0.5I I N(μA )100809060304050702010 2.51.53537 G033.5213LOAD CURRENT (mA)0.01E F F I C I E N C Y (%)POWER LOSS (mW)10080906020304070501001000100.111000.01100.13537 G0410001100V INB (V)0.5L O A D C U R R E N T (m A )10008009006002003004007005001000 3.532.51.53537 G054.5214V INB (V)0.8L O A D (Ω)1000100101.61.51.41.31.213537 G061.81.10.91.7V INB(V)1D E L A Y (μs )60302010504004.543.5323537 G0752.51.5V INB (V)0.8L O A D C U R R E N T (m A )35301510525200 1.41.31.213537 G081.51.10.9V INB (V)0.8L O A D C U R R E N T (m A )454035301510525200 1.81.61.43537 G0921.2163537faTYPICAL PERFORMANCE CHARACTERISTICSVoltage Feedback Change vs TemperatureStart-Up Voltage vs TemperatureBurst Mode Quiescent Current vs V OUTBT A = 25°C unless otherwise noted.TEMPERATURE (°C)–40V O L T A G E C H A N G E (%)0.050.00–0.10–0.15–0.20–0.25–0.3040602003537 G1680–20TEMPERATURE (°C)–40V I N B (V )0.800.750.700.650.600.550.5040602003537 G1780–20V OUTB (V)1.8I Q (μA )605030402010 3.84.33.32.83537 G184.82.3R DS(ON) vs V OUTBOscillator Frequency Change vs TemperatureR DS(ON) Change vs TemperatureV OUTB (V)1.5R D S (O N )(Ω)1.00.90.80.70.60.50.30.40.2 3.544.532.53537 G1352TEMPERATURE (°C)–40F R E Q U E N C Y C H A NG E (%)1–1–2–3–440602003537 G1480–20TEMPERATURE (°C)–40R D S (O N ) C H A N G E (%)3020100–10–20–3040602003537 G1580–20Burst Mode Threshold Current vs V INBBurst Mode Threshold Current vs V INBOscillator Frequency Change vs V OUTBV INB (V)0.8L O A D C U R R E N T (m A )6050403020100 2.31.83537 G101.3V INB (V)0.8L O A D C U R R E N T (m A )120100806040200 2.8 3.3 3.82.31.83537 G114.31.3V OUTB (V)1.5F R E Q U E N C Y C H A NG E (%)10–1–2–3–5–4–6 3.54 4.532.53537 G125273537faFixed Frequency SwitchingWaveform and VOUTBRippleBurst Mode WaveformsV OUTB and I INB During Soft-StartT YPICAL PERFORMANCE CHARACTERISTICS Load Current Step Response (from Burst Mode Operation)Load Current Step Response (Fixed Frequency)Load Current Step Response (Fixed Frequency)Load Current Step Response (from Burst Mode Operation)LDO Dropout Voltage vs Load CurrentT A = 25°C unless otherwise noted.LOAD CURRENT (mA)D R O P O U T V O L T A GE (m V )1401201008040602080706050409030203537 G2610010V OUTB 20mV/DIVI L10mA/DIVV INB = 2.4V V OUTB = 3.3V C OUTB = 4.7μF3537 G2010μs/DIVVINB = 2.4V V OUTB = 3.3V C OUT = 4.7μF3537 G22V OUTB 100mV/DIV I LOAD 100mA/DIV 100μs/DIVV INB = 2.4V V OUTB = 3.3V C OUT = 4.7μF3537 G23I LOAD 100mA/DIVV OUTB 100mV/DIV100μs/DIVV INB = 3.6V V OUTB = 5V C OUTB = 4.7μF3537 G24I LOAD 100mA/DIVV OUTB 100mV/DIV100μs/DIVV INB = 3.6V V OUTB = 5V C OUTB = 4.7μF3537 G25I LOAD 100mA/DIVV OUTB 100mV/DIV100μs/DIVV INB = 2.4V V OUTB = 3.3V C OUTB = 4.7μF3537 G19200ns/DIVSW 2V/DIVV OUTB 20mV/DIVENBSTV OUTB 2V/DIVI VINB 200mA/DIVV INB = 1.2V V OUTB = 3.3V C OUTB = 4.7μF I LOAD = 10mA3537 G21100μs/DIVLDO Input Ripple Rejection vs FrequencyFREQUENCY (kHz)A T T E N U A T I O I N (dB )3537 G2960504030201000.010.111010083537faTYPICAL PERFORMANCE CHARACTERISTICSLDO Load Current Step ResponseLDO Load Current Step Response LDO Load Current Step ResponseT A = 25°C unless otherwise noted.V INL = 5V V OLDO = 3V C OUT = 1μF3537 G32I LOAD 100mA/DIV V OLDO 100mV/DIV100μs/DIVV INL = 3.3V V OLDO = 3V C OUT = 1μF3537 G31I LOAD 100mA/DIVV OLDO 100mV/DIV100μs/DIVV INL = 5V V OLDO = 1.8V C OUT = 1μF3537 G33I LOAD 100mA/DIVV OLDO 100mV/DIV100μs/DIVLDO Current Limit vs TemperatureTEMPERATURE (°C)–40L O A D C U R R E N T (%)7654231–10–260402003537 G3080–20P IN FUNCTIONSMODE (Pin 1): Logic Controlled Input for the Auto-Burst Mode Feature.MODE = High: PWM operation with Burst ModeOperationMODE = Low: PWM operation onlyLBI (Pin 2): Low-Battery Comparator Non-Inverting Input. (Comparator enabled with ENBST or ENLDO)SGND (Pin 3): Signal Ground. Provide a short direct PCB path between GND and the (–) side of the input and output capacitors.V INB (Pin 4): Input Supply for the Step-Up Converter. Connect a minimum of 1μF ceramic decoupling capacitor from this pin to ground.PGDB (Pin 5): Power Good Indicator for the Boost Con-verter. This is an open-drain output that sinks current when V OUTB is greater than 94% of the programmed voltage. ENBST (Pin 6): Logic controlled shutdown input for the boost converter.ENBST = High: Normal operationENBST = Low: ShutdownPGDL (Pin 7): Power Good Indicator for the LDO Regulator. This is an open-drain output that sinks current when V OLDO is greater than 96% of the programmed voltage. ENLDO (Pin 8): Logic Controlled Shutdown Input for the LDO Regulator.ENLDO = High: Normal operationENLDO = Low: Shutdown FBB (Pin 9): Feedback Input to the g m Error Amplifi er of the Boost Converter. Connect resistor divider tap to this pin. The output voltage can be adjusted from 1.5V to 5.25V by:V OUTB = 1.2V • [1 + (R2/R1)]FBL (Pin 10): Feedback Input to the g m Error Amplifi er of the LDO. Connect resistor divider tap to this pin. The output voltage can be adjusted from 0.6V (typical) to 5V by:V OLDO = 0.6V • [1 + (R4/R3)]V OLDO (Pin 11): LDO Regulator Output. PCB trace from V OLDO to the output fi lter capacitor (1μF minimum) should be as short and as wide as possible.V INL (Pin 12): Input Supply for the LDO Regulator.V OUTB (Pin 13): Output Voltage Sense Input and Drain of the Internal Synchronous Rectifi er. PCB trace length from V OUTB to the output fi lter capacitor (4.7μF minimum) should be as short and wide as possible.SW (Pin 14): Switch Pin. Connect the inductor between SW and V INB. Keep these PCB trace lengths as short and wide as possible to reduce EMI. If the inductor current falls to zero or ENBST is low, an internal anti-ringing switch is connected from SW to V INB to minimize EMI.PGND (Pin 15): Power Ground. Provide a short direct PCB path between GND and the (–) side of the input and output capacitors.LBO (Pin 16): Low-Battery Comparator Output. (Open-Drain)Exposed Pad (Pin 17): Power Ground. The Exposed Pad must be soldered to the PCB.93537faBLOCK DIAGRAM103537faO PERATIONThe L TC3537 is a 2.2MHz synchronous step-up (boost) converter and LDO regulator housed in a 16-lead 3mm × 3mm QFN package. Included with the ability to startup and operate from inputs less than 0.7V, the L TC3537 features fi xed frequency, current mode PWM control for exceptional line and load regulation.The current mode architecture with adaptive slope com-pensation provides excellent transient load response, requiring minimal output fi ltering. Internal soft-start and loop compensation simplifi es the design process while minimizing the number of external components. With its low R DS(ON) and low gate charge internal N-channel MOSFET switch and P-channel MOSFET synchronous rectifi er, the L TC3537 achieves high effi ciency over a wide range of load currents. Automatic Burst Mode operation maintains high effi ciency at very light loads, reducing the quiescent current to just 30μA. Operation can be best understood by referring to the Block Diagram.LOW VOL TAGE START-UPThe L TC3537 step-up converter includes an independent start-up oscillator designed to operate at an input voltage of 0.68V (typical). Soft-start and inrush current limiting are provided during start-up, as well as normal mode. When either V INB or V OUTB exceeds 1.4V typical, the IC enters normal operating mode. When the output voltage exceeds the input by 0.24V, the IC powers itself from V OUTB instead of V INB. At this point the internal circuitry has no dependency on the V INB input voltage, eliminating the requirement for a large input capacitor. The input voltage can drop as low as 0.5V after start-up is achieved. The limiting factor for the application becomes the availability of the power source to supply suffi cient energy to the output at low voltages, and maximum duty cycle, which is clamped at 92% typical. Note that at low input voltages, small voltage drops due to series resistance become critical, and greatly limit the power delivery capability of the converter.LOW NOISE FIXED FREQUENCY OPERATIONSoft-StartThe L TC3537 contains internal circuitry to provide soft-start operation. The soft-start circuitry slowly ramps the peak inductor current from zero to its peak value of 750mA (typical) in approximately 0.5ms, allowing start-up into heavy loads. The soft-start circuitry is reset in the event of a shutdown command or a thermal shutdown. OscillatorAn internal oscillator sets the switching frequency to 2.2MHz.ShutdownShutdown of the boost converter is accomplished by pulling ENBST below 0.3V and enabled by pulling ENBST above 0.8V. Note that ENBST can be driven above V INB or V OUTB, as long as it is limited to less than the absolute maximum rating.Boost Error Amplifi erThe non-inverting input of the transconductance error amplifier is internally connected to the 1.2V reference and the inverting input is connected to FBB. Clamps limit the minimum and maximum error amp output voltage for improved large-signal transient response. Power converter control loop compensation is provided internally. An exter-nal resistive voltage divider from V OUTB to ground programs the output voltage via FBB from 1.5V to 5.25V.V OUTB=1.2V1+R2R1⎛⎝⎜⎞⎠⎟Boost Current SensingLossless current sensing converts the peak current signal of the N-channel MOSFET switch into a voltage that is summed with the internal slope compensation. The summed signal is compared to the error amplifi er output to provide a peak current control command for the PWM.113537faO PERATIONBoost Current LimitThe current limit comparator shuts off the N-channel MOSFET switch once its threshold is reached. The cur-rent limit comparator delay to output is typically 40ns. Peak switch current is limited to approximately 750mA, independent of input or output voltage, unless V OUTB falls below 0.8V, in which case the current limit is cut in half. Boost Zero Current ComparatorThe zero current comparator monitors the inductor cur-rent to the output and shuts off the synchronous rectifi er when this current reduces to approximately 30mA. This prevents the inductor current from reversing in polarity, improving effi ciency at light loads.Boost Synchronous Rectifi erTo control inrush current and to prevent the inductor cur-rent from running away when V OUTB is close to V INB, the P-channel MOSFET synchronous rectifi er is only enabled when V OUTB > (V INB + 0.24V).Boost Anti-Ringing ControlThe anti-ringing control connects a resistor across the inductor to prevent high frequency ringing on the SW pin during discontinuous current mode operation. Although the ringing of the resonant circuit formed by L and C SW (capacitance on SW pin) is low energy, it can cause EMI radiation.Boost Output DisconnectThe L TC3537 is designed to allow true output disconnect by eliminating body diode conduction of the internal P-channel MOSFET synchronous rectifi er. This allows V OUTB to go to zero volts during shutdown, drawing no current from the input source. It also allows inrush current limit-ing at turn-on, minimizing surge currents seen by the input supply. Note that to obtain the advantages of output disconnect, there cannot be an external Schottky diode connected between the SW pin and V OUTB. The output disconnect feature also allows V OUTB to be pulled high, above the nominal regulation voltage, without any reverse current into the power source connected to V INB.Thermal Overload ProtectionIf the die temperature exceeds 160°C typical, the L TC3537 boost converter will shut down. All switches will be off and the soft-start capacitor will be discharged. The boost converter will be enabled when the die temperature drops by approximately 15°C.BOOST BURST MODE OPERATIONWhen enabled (MODE pin high), the L TC3537 will auto-matically enter Burst Mode operation at light load current and return to fi xed frequency PWM mode when the load increases. Refer to the Typical Performance Characteristics to see the Burst Mode Threshold Current vs V INB. The load current at which Burst Mode operation is entered can be changed by adjusting the inductor value. Raising the inductor value will lower the load current at which Burst Mode operation is entered.In Burst Mode operation, the L TC3537 still switches at a fi xed frequency of 2.2MHz, using the same error amplifi er and loop compensation for peak current mode control. This control method eliminates any output transient when switching between modes. In Burst Mode operation, en-ergy is delivered to the output until it reaches the nominal voltage regulation value, then the L TC3537 transitions to sleep mode where the outputs are off and the L TC3537 consumes only 30μA of quiescent current from V OUTB including the current required to keep the LDO enabled. When the output voltage droops slightly, switching re-sumes. This maximizes effi ciency at very light loads by minimizing switching and quiescent losses. Burst Mode output voltage ripple, which is typically 1% peak-to-peak, can be reduced by using more output capacitance (10μF or greater), or with a small capacitor (10pF to 50pF) con-nected between V OUTB and FBB.As the load current increases, the L TC3537 will automati-cally leave Burst Mode operation. Note that larger output capacitor values may cause this transition to occur at lighter loads. Once the L TC3537 has left Burst Mode operation and returned to normal operation, it will remain there until the output load is reduced below the burst threshold.123537fa133537faOPERATIONBurst Mode operation is inhibited during start-up and soft-start and until V OUTB is at least 0.24V greater than V INB .The L TC3537 will operate at a continuous PWM frequency of 2.2MH z by connecting MODE to GND. At very light loads, the L TC3537 will exhibit pulse-skip operation.LDO REGULATOR OPERATIONThe L TC3537 includes an independent 100mA low dropout linear regulator (LDO). The V INL pin can be connected to an independent source or connected to the output of the boost regulator . An input capacitor on V INL is optional, but it will help to improve transient responses. The LDO willoperate with a V INL down to 1.5V , but specifications are guaranteed with V INL from 1.8V to 5.5V .ShutdownShutdown of the LDO is accomplished by pulling ENLDO below 0.3V and enabled by pulling ENLDO above 0.8V . Note that ENLDO can be driven above V INL or V OLDO , as long as it is limited to less than the absolute maximum rating. In the event that the LDO output voltage is held above the input voltage, the LDO goes in to shutdown until the output drops back below the input voltage. In shutdown the LDO will block reverse current from V OLDO to V INL .LDO Error Amplifi erThe non-inverting input of the transconductance error amplifi er is internally connected to a 0.6V reference and the inverting input is connected to FBL. The control loop compensation is provided internally. An external resistive voltage divider from V OLDO to ground programs the output voltage via FBL from 0.6V to 5V .V OLDO =0.6V 1+R4R3⎛⎝⎜⎞⎠⎟LDO Current Sensing and LimitingCurrent is sensed across an internal resistor . The guaran-teed minimum output current is 100mA.LOW-BATTERY INDICATORThe L TC3537 includes a low-battery comparator . The non-inverting input of the comparator is internally connected to a 0.6V reference and the inverting input is connected to LBI. An external resistive voltage divider from V INL to ground programs the threshold voltage. When the volt-age at LBI drops below 0.6V , the open-drain N-channel MOSFET will turn on. The N-channel MOSFET device is forced off when both the step-up converter and LDO are in shutdown.V LBI =0.6V 1+R6R5⎛⎝⎜⎞⎠⎟BOOST POWER-GOOD INDICATORThe L TC3537 includes a power-good comparator for the step-up converter . The non-inverting input of the compara-tor is internally connected to a 1.08V reference and the inverting input is connected to the FBB pin. The open-drain MOSFET on PGDB will turn on when the output voltage is typically within 6% of the programmed output voltage.Output sequencing can be achieved by connecting PGDB to the LDO enable pin (ENLDO). This would allow the user to keep the LDO off until the step-up converter is regulating. The N-channel MOSFET is forced on in shutdown.LDO POWER-GOOD INDICATORThe L TC3537 includes a power-good comparator for the LDO. The non-inverting input of the comparator is internally connected to a 540mV reference and the inverting input is connected to the FBL pin. The open-drain MOSFET on the PGDL pin will turn on when the output voltage is typically within 4% of the programmed output voltage.Output sequencing can be achieved by connecting PGDL to the boost enable pin (ENBST). This would allow the user to keep the step-up converter off until the LDO is regulating. The N-channel MOSFET is forced on in shutdown.143537faA PPLICATIONS INFORMATION V INB > V OUTB OPERATIONThe L TC3537 step-up converter will maintain voltage regu-lation even when the input voltage is above the desired output voltage. Note that the effi ciency is much lower in this mode, and the maximum output current capability will be less. Refer to the Typical Performance Characteristics.STEP-UP SHORT-CIRCUIT PROTECTIONThe L TC3537 output disconnect feature provides output short circuit protection. To reduce power dissipation under short-circuit conditions, the peak switch current limit is reduced to 400mA (typical).SCHOTTKY DIODEAlthough it is not required, adding a Schottky diode fromSW to V OUTB will improve efficiency by about 4%. Note that this defeats the output disconnect and short-circuit protection features.PCB LAYOUT GUIDELINESThe high speed operation of the L TC3537 demands careful attention to board layout. A careless layout will result in reduced performance. Figure 1 shows the recommended component placement. A large ground pin copper areawill help to lower the die temperature. A multilayer board with a separate ground plane is ideal, but not absolutely necessary.COMPONENT SELECTION Inductor SelectionThe L TC3537 can utilize small surface mount chip induc-tors due to its fast 2.2MHz switching frequency. Inductor values between 1μH and 4.7μH are suitable for most ap-plications. Larger values of inductance will allow slightly greater output current capability (and lower the Burst Mode threshold) by reducing the inductor ripple current. Increasing the inductance above 10μH will increase size while providing little improvement in output current capa-bility. The minimum inductance value is given by: L >V INB(MIN)•V OUTB(MAX)−V INB(MIN)()Ripple •V OUTB(MAX)where:Ripple = Allowable inductor current ripple (amps peak-peak)V INB(MIN) = Minimum converter input voltage V OUTB(MAX) = Maximum output voltageThe inductor current ripple is typically set for 20% to 40% of the maximum inductor current. High frequency ferrite core inductor materials reduce frequency dependent power losses compared to cheaper powdered iron types, improving effi ciency. The inductor should have low ESR (series resistance of the windings) to reduce the I 2R power losses, and must be able to support the peak inductor current without saturating. Molded chokes and some chip inductors usually do not have enough core area to support the peak inductor currents of 750mA seen on the L TC3537. To minimize radiated noise, use a shielded inductor . See Table 1 for suggested components and suppliers.Figure 1TO INNER GROUND LAYERS。
ltc2954的用法
ltc2954的用法摘要:1.简介2.特性3.应用领域4.使用方法4.1 接线4.2 配置4.3 操作5.常见问题及解决方案6.总结正文:【简介】LTC2954 是德州仪器(Texas Instruments)公司生产的一款高精度、低漂移的电压基准芯片,具有4 路输出,广泛应用于各种电子设备中,提供精确稳定的电压参考。
【特性】LTC2954 具有以下特性:1.4 路输出,输出电压分别为2.5V、1.25V、0.625V 和0.313V;2.低漂移,典型值为±2ppm/°C;3.高精度,典型值为±0.02%;4.低噪声,典型值为1μVp-p;5.宽工作电压范围,1.8V 至5.5V;6.紧凑型5 引脚SC70 封装。
【应用领域】LTC2954 电压基准芯片广泛应用于通信、工业控制、医疗设备、仪器仪表等领域,为这些设备提供精确稳定的电压参考。
【使用方法】【接线】使用时,将LTC2954 的VCC 引脚连接到1.8V 至5.5V 电源,GND 引脚连接到地,然后将输出引脚连接到需要提供电压参考的电路。
【配置】LTC2954 无需外部元件即可工作,但在某些应用场景下,可以通过外接电阻调整输出电压。
例如,通过连接一个电阻到OUT1 引脚,可以调整OUT1 的输出电压。
【操作】LTC2954 在接通电源后即可正常工作,无需额外的操作。
但在实际应用中,建议对电路进行适当的设计和布局,以降低噪声和干扰。
【常见问题及解决方案】1.输出电压不准确:可能是由于电源电压波动或负载电流变化导致的,可以通过使用稳压电源和使用合适的负载电阻来解决;2.温度漂移较大:可能是由于环境温度变化或电路布局不合理导致的,可以通过改善电路散热条件或使用散热片来解决。
【总结】LTC2954 是一款性能优异的电压基准芯片,具有高精度、低漂移、低噪声等优点,广泛应用于各种电子设备中。
BF992中文资料
1
VG2-S = 4 V; Tj = 25 °C.
VDS = 10 V; Tj = 25 °C.
Fig.3 Output characteristics; typical values.
Fig.4 Transfer characteristics; typical values.
handbook, halfpage
1999 Aug 11
2
元器件交易网
Philips Semiconductors
Product specification
Silicon N-channel dual gate MOS-FET
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDS ID IG1 IG2 Ptot Tstg Tj Note 1. Device mounted on a ceramic substrate, 8 mm × 10 mm × 0.7 mm. PARAMETER drain-source voltage drain current gate 1 current gate 2 current total power dissipation storage temperature operating junction temperature Tamb ≤ 60 °C; see Fig.2; note 1 CONDITIONS − − − − − −65 − MIN. MAX. 20 40 ±10 ±10 200 +150 150
VDS = 10 V; VG2-S = 4 V; ID = 15 mA; Tamb = 25 °C.
逆变器用到的IC
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LTC4213 1 4213f 电子电路保护器说明书
2µs/DIV4213 TA01b124213fBias Supply Voltage (V CC )...........................–0.3V to 9V Input VoltagesON, SENSEP, SENSEN.............................–0.3V to 9V I SEL ..........................................–0.3V to (V CC + 0.3V)Output VoltagesGATE .....................................................–0.3V to 15V READY.....................................................–0.3V to 9V Operating Temperature RangeLTC4213C ...............................................0°C to 70°C LTC4213I.............................................–40°C to 85°C Storage Temperature Range.................–65°C to 150°C Lead Temperature (Soldering, 10sec)...................300°CORDER PART NUMBER DDB PART*MARKING T JMAX = 125°C, θJA = 250°C/WEXPOSED PAD (PIN 9)PCB CONNECTION OPTIONALConsult LTC Marketing for parts specified with wider operating temperature ranges.*The temperature grade is identified by a label on the shipping container.LBHVLTC4213CDDB LTC4213IDDB ABSOLUTE AXI U RATI GSW W WU PACKAGE/ORDER I FOR ATIOUUW (Note 1)ELECTRICAL CHARACTERISTICSThe ● denotes the specifications which apply over the full operatingtemperature range, otherwise specifications are at T A = 25°C. V CC = 5V, I SEL = 0 unless otherwise noted. (Note 2)SYMBOL PARAMETER CONDITIONSMIN TYP MAX UNITSV CC Bias Supply Voltage ● 2.36V V SENSEP SENSEP Voltage ●06V I CC V CC Supply Current●1.63mA V CC(UVLR)V CC Undervoltage Lockout Release V CC Rising● 1.8 2.07 2.23V ∆V CC(UVHYST)V CC Undervoltage Lockout Hysteresis ●30100160mV I SENSEP SENSEP Input Current V SENSEP = V SENSEN = 5V, Normal Mode 154080µA V SENSEP = V SENSEN = 0, Normal Mode –1±15µA I SENSENSENSEN Input CurrentV SENSEP = V SENSEN = 5V, Normal Mode 154080µA V SENSEP = V SENSEN = 0, Normal Mode –1±15µA V SENSEP = V SENSEN = 5V,50280µAReset Mode or Fault ModeV CBCircuit Breaker Trip Voltage I SEL = 0, V SENSEP = V CC●22.52527.5mV V CB = V SENSEP – V SENSEN I SEL = Floated, V SENSEP = V CC ●455055mV I SEL = V CC, V SENSEP = V CC ●90100110mV V CB(FAST)Fast Circuit Breaker Trip Voltage I SEL = 0, V SENSEP = V CC●63100115mV V CB(FAST)= V SENSEP – V SENSEN I SEL = Floated, V SENSEP = V CC ●126175200mV I SEL = V CC, V SENSEP = V CC ●252325371mV I GATE(UP)GATE Pin Pull Up Current V GATE = 0V●–50–100–150µA I GATE(DN)GATE Pin Pull Down Current ∆V SENSEP – V SENSEN = 200mV, V GATE = 8V ●1040mA ∆V GSMAX External N-Channel Gate Drive V SENSEN = 0, V CC ≥ 2.97V, I GATE = –1µA ● 4.8 6.58V V SENSEN = 0, V CC = 2.3V, I GATE = –1µA ● 2.65 4.38V ∆V GSARMV GS Voltage to Arm Circuit BreakerV SENSEN = 0, V CC ≥ 2.97V ● 4.4 5.47.6V V SENSEN = 0, V CC = 2.3V●2.53.57VTOP VIEWDDB PACKAGE8-LEAD (3mm × 2mm) PLASTIC DFN567894321READY ON I SEL GND V CC SENSEP SENSEN GATE34213f∆V GSMAX – ∆V GSARM Difference Between ∆V GSMAX and V SENSEN = 0, V CC ≥ 2.97V ●0.3 1.1V ∆V GSARMV SENSEN = 0, V CC = 2.3V●0.150.8VV READY(OL)READY Pin Output Low Voltage I READY = 1.6mA, Pull Down Device On ●0.20.4V I READY(LEAK)READY Pin Leakage Current V READY = 5V, Pull Down Device Off ●0±1µA V ON(TH)ON Pin High Threshold ON Rising, GATE Pulls Up ●0.760.80.84V ∆V ON(HYST)ON Pin Hysteresis ON Falling, GATE Pulls Down104090mV V ON(RST)ON Pin Reset Threshold ON Falling, Fault Reset, GATE Pull Down ●0.360.40.44V I ON(IN)ON Pin Input Current V ON = 1.2V●0±1µA ∆V OV Overvoltage Threshold ●0.410.7 1.1V ∆V OV = V SENSEP – V CCt OVOvervoltage Protection Trip Time V SENSEP = V SENSEN = Step 5V to 6.2V 2565160µs t FAULT(SLOW)V CB Trips to GATE Discharging ∆V SENSE Step 0mV to 50mV,●71627µs V SENSEN Falling, V CC = V SENSEP = 5V t FAULT(FAST)V CB(FAST) Trips to GATE Discharging ∆V SENSE Step 0V to 0.3V, V SENSEN Falling,●12.5µs V SENSEP = 5Vt DEBOUNCE Startup De-Bounce Time V ON = 0V to 2V Step to Gate Rising,2760130µs (Exiting Reset Mode)t READY READY Delay Time V GATE = 0V to 8V Step to READY Rising,2250115µs V SENSEP = V SENSEN = 0t OFF Turn-Off Time V ON = 2V to 0.6V Step to GATE Discharging 1.5510µs t ON Turn-On Time V ON = 0.6V to 2V Step to GATE Rising,4816µs (Normal Mode)t RESETReset TimeV ON Step 2V to 0V2080150µsNote 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.ELECTRICAL CHARACTERISTICSThe ● denotes the specifications which apply over the full operatingtemperature range, otherwise specifications are at T A = 25°C. V CC = 5V, I SEL = 0 unless otherwise noted. (Note 2)SYMBOLPARAMETERCONDITIONSMIN TYP MAX UNITSNote 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified.4564213ft RESET vs Temperaturet FAULT(SLOW) vs V CCt FAULT(SLOW) vs Temperaturet FAULT(FAST) vs V CCt FAULT(FAST) vs TemperatureTYPICAL PERFOR A CE CHARACTERISTICSU WSpecifications are at T A = 25°C. V CC = 5Vunless otherwise noted.t F A U L T (F A S T ) (µs )4213 G230.90.80.71.01.11.21.3TEMPERATURE (°C)–50050100125–252575BIAS SUPPLY VOLTAGE (V)2.010t F A U L T (S L O W ) (µs )14121618 3.0 4.0 5.0 6.04213 G202022 2.53.54.55.5TEMPERATURE (°C)–500501001254213 G21–25257510t F A U L T (S L O W ) (µs )141216182022TEMPERATURE (°C)–500501001254213 G19–252575t R E S E T (µs )60708090100BIAS SUPPLY VOLTAGE (V)2.0t F A U L T (F A S T ) (µs )3.04.05.06.04213 G222.53.54.55.50.90.80.71.01.11.21.374213fPI FU CTIO SU U UREADY (Pin 1): READY Status Output. Open drain output that goes high impedance when the external MOSFET is on and the circuit breaker is armed. Otherwise this pin pulls low.ON (Pin 2): ON Control Input. The LTC4213 is in reset mode when the ON pin is below 0.4V. When the ON pin increases above 0.8V, the device starts up and the GATE pulls up with a 100µA current source. When the ON pin drops below 0.76V, the GATE pulls down. To reset a circuit breaker fault, the ON pin must go below 0.4V.I SEL (Pin 3): Threshold Select Input. With the I SEL pin grounded, float or tied to V CC the V CB is set to 25mV, 50mV or 100mV, respectively. The corresponding V CB(FAST)values are 100mV, 175mV and 325mV.GND (Pin 4): Device Ground.GATE (P in 5): GATE D rive Output. An internal charge pump supplies 100µA pull-up current to the gate of the external N-channel MOSFET. Internal circuitry limits thevoltage between the GATE and SENSEN pins to a safe gate drive voltage of less than 8V. When the circuit breaker trips, the GATE pin abruptly pulls to GND.SENSEN (Pin 6): Circuit Breaker Negative Sense Input.Connect this pin to the source of the external MOSFET.During reset or fault mode, the SENSEN pin discharges the output to ground with 280µA.SENSEP (P in 7): Circuit Breaker Positive Sense Input.Connect this pin to the drain of external N-channel MOSFET.The circuit breaker trips when the voltage across SENSEP and SENSEN exceeds V CB . The input common mode range of the circuit breaker is from ground to V CC + 0.2V when V CC < 2.5V. For V CC ≥ 2.5V, the input common mode range is from ground to V CC + 0.4V.V CC (Pin 8): Bias Supply Voltage Input. Normal operation is between 2.3V and 6V. An internal under-voltage lockout circuit disables the device when V CC < 2.07V.Exposed Pad (Pin 9): Exposed pad may be left open or connected to device ground.8910114213fsupply transient dips below 1.97V of less than 80µs are ignored.ON FunctionWhen V ON is below comparator COMP1’s threshold of 0.4V for 80µs, the device resets. The system leaves reset mode if the ON pin rises above comparator COMP2’s threshold of 0.8V and the UVLO condition is met. Leaving reset mode, the GATE pin starts up after a t DEBOUNCE delay of 60µs. When ON goes below 0.76V, the GATE shuts off after a 5µs glitch filter delay. The output is discharged by the external load when V ON is in between 0.4V to 0.8V. At this state, the ON pin can re-enable the GATE if V ON exceeds 0.8V for more than 8µs. Alternatively, the device resets if the ON pin is brought below 0.4V for 80µs. Once reset, the GATE pin restarts only after the t DEBOUNCE 60µs delay at V ON rising above 0.8V. To protect the ON pin from overvoltage stress due to supply transients, a series resistor of greater than 10k is recommended when the ON pin is connected directly to the supply. An external resis-tive divider at the ON pin can be used with COMP2 to set a supply undervoltage lockout value higher than the inter-nal UVLO circuit. An RC filter can be implemented at the ON pin to increase the powerup delay time beyond the internal 60µs delay.Gate FunctionThe GATE pin is held low in reset mode. 60µs after leaving reset mode, the GATE pin is charged up by an internal 100µA current source. The circuit breaker arms when V GATE > V SENSEN + ∆V GSARM . In normal mode operation,the GATE peak voltage is internally clamped to ∆V GSMAX above the SENSEN pin. When the circuit breaker trips, an internal MOSFET shorts the GATE pin to GND, turning off the external MOSFET.READY StatusThe READY pin is held low during reset and at startup. It is pulled high by an external pullup resistor 50µs after the circuit breaker arms. The READY pin pulls low if the circuit breaker trips or the ON pin is pulled below 0.76V, or V CC drops below undervoltage lockout.∆V GSARM and V GSMAXEach MOSFET has a recommended V GS drive voltage where the channel is deemed fully enhanced and R DSON is minimized. Driving beyond this recommended V GS volt-age yields a marginal decrease in R DSON . At startup, the gate voltage starts at ground potential. The GATE ramps past the MOSFET threshold and the load current begins to flow. When V GS exceeds ∆V GSARM , the circuit breaker is armed and enabled. The chosen MOSFET should have a recommended minimum V GS drive level that is lower than ∆V GSARM . Finally, V GS reaches a maximum at ∆V GSMAX.Trip and Reset Circuit BreakerFigure 2 shows the timing diagram of V GATE and V READY after a fault condition. A tripped circuit breaker can be reset either by cycling the V CC bias supply below UVLO thresh-old or pulling ON below 0.4V for >t RESET . Figure 3 shows the timing diagram for a tripped circuit breaker being reset by the ON pin.Calculating Current LimitThe fault current limit is determined by the R DSON of the MOSFET and the circuit breaker voltage V CB .I V R LIMIT CB DSON=()2The R DSON value depends on the manufacturer’s distribu-tion, V GS and junction temperature. Short Kelvin-sense connections between the MOSFET drain and source to the LTC4213 SENSEP and SENSEN pins are strongly recommended.For a selected MOSFET, the nominal load limit current is given by:I V R LIMIT NOM CB NOM DSON NOM ()()()()=3The minimum load limit current is given by:I V R LIMIT MIN CB MIN DSON MAX ()()()()=4APPLICATIO S I FOR ATIOW UUU1213144213fOperating temperature of 0° to 70°C.R DSON @ 25°C = 100%R DSON @ 0°C = 90%R DSON @ 70°C = 120%MOSFET resistance variation:R DSON(NOM) = 15m • 0.82 = 12.3m ΩR DSON(MAX) = 15m • 1.333 • 0.93 • 1.2 = 15m • 1.488= 22.3m ΩR DSON(MIN) = 15m • 0.667 • 0.80 • 0.90 = 15m • 0.480= 7.2m ΩV CB variation:NOM V CB = 25mV = 100%MIN V CB = 22.5mV = 90%MAX V CB = 27.5mV = 110%The current limits are:I LIMIT(NOM) = 25mV/12.3m Ω = 2.03A I LIMIT(MIN) = 22.5mV/22.3m Ω = 1.01A I LIMIT(MAX) = 27.5mV/7.2m Ω = 3.82AFor proper operation, the minimum current limit must exceed the circuit maximum operating load current with margin. So this system is suitable for operating load current up to 1A. From this calculation, we can start with the general rule for MOSFET R DSON by assuming maxi-mum operating load current is roughly half of the I LIMIT(NOM). Equation 7 shows the rule of thumb.I V R OPMAX CB NOM DSON NOM =()()•()27Note that the R DSON(NOM) is at the LTC4213 nominal operating ∆V GSMAX rather than at typical vendor spec.Table 1 gives the nominal operating ∆V GSMAX at the various operating V CC . From this table users can refer to the MOSFET’s data sheet to obtain the R DSON(NOM) value.Table 1. Nominal Operating ∆V GSMAX for Typical Bias Supply VoltageV CC (V)∆V GSMAX (V)2.3 4.32.5 5.02.7 5.63.0 6.53.37.05.07.06.07.0Load Supply Power-Up after Circuit Breaker Armed Figure 4 shows a normal power-up sequence for the circuit in Figure 1 where the V IN load supply power-up after circuit breaker is armed. V CC is first powered up by an auxiliary bias supply. V CC rises above 2.07V at time point 1. V ON exceeds 0.8V at time point 2. After a 60µs debounce delay, the GATE pin starts ramping up at time point 3. The external MOSFET starts conducting at time point 4. At time point 5, V GATE exceed ∆V GSARM and the circuit breaker is armed. After 50µs (t READY delay), READY pulls high by an external resistor at time point 6. READY signals the V IN load supply module to start its ramp. The load supply begins soft-start ramp at time point 7. The load supply ramp rate must be slow to prevent circuit breaker tripping as in equation (8).∆∆V t I I C IN OPMAX LOADLOAD<−()8Where I OPMAX is the maximum operating current defined by equation 7.For illustration, V CB = 25mV and R DSON = 3.5m Ω at the nominal operating ∆V GSMAX . The maximum operating current is 3.5A (refer to equation 7). Assuming the load can draw a current of 2A at power-up, there is a margin of 1.5A available for C LOAD of 100µF and V IN ramp rate should be <15V/ms. At time point 8, the current through the MOSFET reduces after C LOAD is fully charged.APPLICATIO S I FOR ATIOW UUU1516174213fThe selected MOSFET V GS absolute maximum rating should meet the LTC4213 maximum ∆V GSMAX of 8V.Other MOSFET criteria such as V BDSS , I DMAX , and R DSON should be reviewed. Spikes and ringing above maximum operating voltage should be considered when choosing V BDSS . I DMAX should be greater than the current limit. The maximum operating load current is determined by the R DSON value. See the section on “Calculating Current Limit” for details.Supply RequirementsThe LTC4213 can be powered from a single supply or dual supply system. The load supply is connected to the SENSEP pin and the drain of the external MOSFET. In the single supply case, the V CC pin is connected to the load supply, preferably with an RC filter. With dual supplies,V CC is connected to an auxiliary bias supply V AUX where V AUX voltage should be greater or equal to the load supply voltage. The load supply voltage must be capable of sourcing more current than the circuit breaker limit. If the load supply current limit is below the circuit breaker trip current, the LTC4213 may not react when the output overloads. Furthermore, output overloads may trigger UVLO if the load supply has foldback current limit in a single supply system.V IN Transient and Overvoltage ProtectionInput transient spikes are commonly observed whenever the LTC4213 responds to overload. These spikes can be large in amplitude, especially given that large decoupling capacitors are absent in hot swap environments. These short spikes can be clipped with a transient suppressor of adequate voltage and power rating. In addition, the LTC4213can detect a prolonged overvoltage condition. WhenAPPLICATIO S I FOR ATIOW UUU point 6 should be within the circuit breaker limits. Other-wise, the system fails to start and the circuit breaker trips immediately after arming. In most applications additional external gate capacitance is not required unless C LOAD is large and startup becomes problematic. If an external gate capacitor is employed, its capacitance value should not be excessive unless it is used with a series resistor. This is because a big gate capacitor without resistor slows down the GATE turn off during a fault. An alternative method would be a stepped I SEL pin to allow a higher current limit during startup.In the event of output short circuit or a severe overload, the load supply can collapse during GATE ramp up due to load supply current limit. The chosen MOSFET must withstand this possible brief short circuit condition before time point 6 where the circuit breaker is allowed to trip. Bench short circuit evaluation is a practical verification of a reliable design. To have current limit while powering a MOSFET into short circuit conditions, it is preferred that the load supply sequences to turn on after the circuit breaker is armed as described in an earlier section.Power-Off CycleThe system can be powered off by toggling the ON pin low.When ON is brought below 0.76V for 5µs, the GATE and READY pins are pulled low. The system resets when ON is brought below 0.4V for 80µs.MOSFET SelectionThe LTC4213 is designed to be used with logic (5V) and sub-logic (3V) MOSFETs for V CC potentials above 2.97V with ∆V GSMAX exceeding 4.5V. For a V CC supply range between 2.3V and 2.97V, sub-logic MOSFETs should be used as the minimum ∆V GSMAX is less than 4.5V.1819Information furnished by Linear Technology Corporation is believed to be accurate and reliable.However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.201630 McCarthy Blvd., Milpitas, CA 95035-7417(408) 432-1900 ● FAX: (408) 434-0507 ● © LINEAR TECHNOLOGY CORPORA TION 2005LT/TP 0405 500 • PRINTED IN USA。
LTC5509 RF电源检测器演示板快速使用指南说明书
February 14, 2003DC539B DEMO BOARD QUICK START GUIDEINTRODUCTIONThe DC539B demo board is used to evaluate the LTC5509, RF power detector with integrated output buffer and voltage reference. The LTC5509 converts an RF input signal at pin 6 (RF) to a DC voltage at pin 3 (Vout). The RF input frequency range is 300 MHz to 3000 MHz. Maximum input power is8 dBm. The output voltage at Vout will start at an initial DC value of typically 250mV. When the RF signal is applied the output voltage will increase.The optional 68Ω (R1) termination resistor is not placed on PCB. The optional C5 shunt capacitor is not installed. R2 and C5 form a low pass filter at Vout. Capacitor C1 is 33 pF for high frequency tests and evaluations at 1000 to 3000 MHz. For frequencies at 300 to 1000 MHz a 51 pF value is suggested.A logic high at pin 1 enables the part. It is controlled by a jumper JP1.The DC539B demo board is easily set up for evaluating the LTC5509 RF power detector performance. Follow the procedures outlined below and connections on the attached diagram for proper operation. 1.Connect the input DC power supply (2.7V to 6V) to Vcc pin (E1). Connect the power supply groundto ground pin (E3 or E5). Connect RF input (SMA connector J1) to the RF signal generator output via coaxial cable. It is common practice to include a 3dB pad at the RF input of the demo board to minimize reflections back into the signal generator.2.The part can be shutdown via jumper switch JP1. When JP1 is connected to ground the part will bein shutdown. When JP1 is connected to VCC via the 22k resistor the part will be enabled. The shutdown terminal E4 can also be controlled externally by a pulse from function generator, tocharacterize enable times from the shutdown state. When external shutdown signal is used, set JP1 to the enable position. External 50Ω termination from E4 to ground is recommended for timing measurements when signal source with 50Ω output impedance is used. Connect a pulse generator to E4 via a coaxial cable.3.With JP1 set to the enable position, apply an RF input signal (-35 to +9dBm) and measure the VoutDC voltage at E2.DC539B Demo Board Connection Diagram。
利特尔比特ltc4059 ltc4059a-900ma-线性锂离子电池充电器用热控制在2-2 dfn
124059fbInput Supply Voltage (V CC )...................... –0.3V to 10V BAT, PROG, EN, Li CC, ACPR ................... –0.3V to 10V BAT Short-Circuit Duration...........................Continuous BAT Pin Current............................................... 1000mA PROG Pin Current............................................. 1000µA Junction Temperature.......................................... 125°C Operating Temperature Range (Note 2)..–40°C to 85°C Storage Temperature Range.................–65°C to 125°CORDER PART NUMBER Consult LTC Marketing for parts specified with wider operating temperature ranges.LTC4059EDC LTC4059AEDC ABSOLUTE AXI U RATI GSW W WU PACKAGE/ORDER I FOR ATIOUUW (Note 1)T JMAX = 125°C, θJA = 60°C/W TO 85°C/W (NOTE 3)*Li CC PIN 2 ON LTC4059EDC,ACPR PIN 2 ON LTC4059AEDC EXPOSED PAD (PIN 7) IS GND MUST BE SOLDERED TO PCBTOP VIEW7DC6 PACKAGE6-LEAD (2mm × 2mm) PLASTIC DFN456321GND BAT EN PROG V CCLi CC/ACPR*DC6 PART MARKING LAFU LBJHELECTRICAL CHARACTERISTICSThe ● denotes the specifications which apply over the full operatingtemperature range, otherwise specifications are at T A = 25°C. V CC = 5V unless otherwise noted.SYMBOL PARAMETERCONDITIONSMIN TYP MAX UNITSV CC V CC Supply Voltage●3.758V I CC Quiescent V CC Supply Current V BAT = 4.5V (Forces I BAT and I PROG = 0)●2560µA I CCMS V CC Supply Current in Shutdown V EN = V CC●1025µA I CCUV V CC Supply Current in Undervoltage V CC < V BAT ; V CC = 3.5V, V BAT = 4V ●410µA LockoutV FLOAT V BAT Regulated Output Voltage I BAT = 2mA4.175 4.2 4.225V 4.5V < V CC < 8V, I BAT = 2mA● 4.158 4.2 4.242V I BAT BAT Pin CurrentR PROG = 2.43k, Current Mode, V BAT = 3.8V ●475500525mA R PROG = 12.1k, Current Mode, V BAT = 3.8V ●94100106mA I BMS Battery Drain Current in Shutdown V EN = V CC , V CC > V BAT ●0±1µA I BUV Battery Drain Current in Undervoltage V CC < V BAT , V BAT = 4V●014µA LockoutV UV V CC – V BAT Undervoltage Lockout V CC from Low to High, V BAT = 3.7V ●100150200mV ThresholdV CC from High to Low, V BAT = 3.7V ●03580mV V PROG PROG Pin VoltageR PROG = 2.43k, I PROG = 500µA ● 1.18 1.21 1.24V R PROG = 12.1k, I PROG = 100µA ● 1.18 1.21 1.24V V MS Manual Shutdown Threshold V EN Increasing ●0.30.92 1.2V V MSHYS Manual Shutdown Hysteresis V EN Decreasing 85mV R EN EN Pin Input ResistanceV EN = 5V●1 1.853M ΩV Li CC Voltage Mode Disable Threshold V Li CC Increasing (LTC4059 Only)●0.30.92 1.2V V Li CCHYS Voltage Mode Disable Hysteresis V Li CC Decreasing (LTC4059 Only)85mV V ACPR ACPR Pin Output Low Voltage I ACPR = 300µA (LTC4059A Only)0.250.5V t LIM Junction Temperature In Constant 115°C Temperature ModeR ONPower FET “ON” Resistance I BAT = 150mA (Note 4)8001200m Ω(Between V CC and BAT)Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.Note 2: The LTC4059E/LTC4059AE are guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls.Note 3: Failure to solder the exposed backside of the package to the PC board ground plane will result in a thermal resistance much higher than 60°C/W.Note 4: The FET on-resistance is guaranteed by correlation to wafer level measurements.3454059fbPI FU CTIO SU U UGND (P ins 1, 7): Ground/Exposed Pad. The exposed package pad is ground and must be soldered to the PC board for maximum heat transfer.Li CC (Pin 2, LTC4059): Li-Ion/Constant Current Input Pin. Pulling this pin above V Li CC disables voltage mode thereby providing a constant current to the BAT pin. This feature is useful for charging Nickel chemistry batteries.Tie to GND if unused.ACP R (P in 2, LTC4059A): Open-Drain Power Supply Status Output. When V CC is greater than the undervoltage lockout threshold, the ACPR pin will pull to ground;otherwise the pin is forced to a high impedance state.BAT (P in 3): Charge Current Output. Provides charge current to the battery and regulates the final float voltage to 4.2V. An internal precision resistor divider from this pin sets this float voltage and is disconnected in shutdown mode.V CC (P in 4): Positive Input Supply Voltage. This pin provides power to the charger. V CC can range from 3.75V to 8V. This pin should be bypassed with at least a 1µF capacitor. When V CC is within 35mV of the BAT pin voltage, the LTC4059 enters shutdown mode, dropping I BAT to less than 4µA.PROG (Pin 5): Charge Current Program and Charge Cur-rent Monitor Pin. Connecting a resistor, R PROG , to ground programs the charge current. When charging in constant-current mode, this pin servos to 1.21V. In all modes, the voltage on this pin can be used to measure the charge current using the following formula:I V R BAT PROGPROG=•1000EN (Pin 6): Enable Input Pin. Pulling this pin above the manual shutdown threshold (V MS is typically 0.92V) puts the LTC4059 in shutdown mode, thus terminating a charge cycle. In shutdown mode, the LTC4059 has less than 25µA supply current and less than 1µA battery drain current.Enable is the default state, but the pin should be tied to GND if unused.674059fbOPERATIOUThe LTC4059/LTC4059A are linear battery chargers de-signed primarily for charging single cell lithium-ion bat-teries. Featuring an internal P-channel power MOSFET,the chargers use a constant-current/constant-voltage charge algorithm with programmable current. Charge current can be programmed up to 900mA with a final float voltage accuracy of ±0.6%. No blocking diode or external sense resistor is required; thus, the basic charger circuit requires only two external components. The ACPR pin (LTC4059A) monitors the status of the input voltage with an open-drain output. The Li C C pin (LTC4059) disables constant-voltage operation and turns the LTC4059 into a precision current source capable of charging Nickel chem-istry batteries. Furthermore, the LTC4059/LTC4059A are designed to operate from a USB power source.An internal thermal limit reduces the programmed charge current if the die temperature attempts to rise above a preset value of approximately 115°C. This feature protects the LTC4059/LTC4059A from excessive temperature, and allows the user to push the limits of the power handling capability of a given circuit board without risk of damaging the LTC4059/LTC4059A or external components. Anotherbenefit of the thermal limit is that charge current can be set according to typical, not worst-case, ambient tempera-tures for a given application with the assurance that the charger will automatically reduce the current in worst-case conditions.The charge cycle begins when the voltage at the V CC pin rises approximately 150mV above the BAT pin voltage, a program resistor is connected from the PROG pin to ground, and the EN pin is pulled below the shutdown threshold (typically 0.92V).If the BAT pin voltage is below 4.2V, or the Li CC pin is pulled above V Li CC (LTC4059 only), the LTC4059 will charge the battery with the programmed current. This is constant-current mode. When the BAT pin approaches the final float voltage (4.2V), the LTC4059 enters constant-voltage mode and the charge current begins to decrease.To terminate the charge cycle the EN should be pulled above the shutdown threshold. Alternatively, reducing the input voltage below the BAT pin voltage will also terminate the charge cycle.APPLICATIO S I FOR ATIOW UUU Programming Charge CurrentThe charge current is programmed using a single resistor from the PROG pin to ground. The battery charge current is 1000 times the current out of the PROG pin. The program resistor and the charge current are calculated using the following equations:R V I I VR PROG CHG CHG PROG==10001211000121•.,•.For best stability over temperature and time, 1% metal-film resistors are recommended.The charge current out of the BAT pin can be determinedat any time by monitoring the PROG pin voltage and using the following equation:I V R BAT PROGPROG=•1000Undervoltage Lockout (UVLO)An internal undervoltage lockout circuit monitors the input voltage and keeps the charger in undervoltage lockout until V CC rises approximately 150mV above the BAT pin voltage.The UVLO circuit has a built-in hysteresis of 115mV. If the BAT pin voltage is below approximately 2.75V, then the charger will remain in undervoltage lockout until V CC rises above approximately 3V. During undervoltage lockout conditions, maximum battery drain current is 4µA.Power Supply Status Indicator (ACPR, LTC4059A Only)The power supply status output has two states: pull-down and high impedance. The pull-down state indicates that V CC is above the undervoltage lockout threshold (see Undervoltage Lockout). When this condition is not met,the ACPR pin is high impedance indicating that the LTC4059A is unable to charge the battery.894059fbPower DissipationThe conditions that cause the LTC4059/LTC4059A to reduce charge current through thermal feedback can be approximated by considering the power dissipated in the IC. For high charge currents, the LTC4059 power dissipa-tion is approximately:P D = (V CC – V BAT ) • I BATwhere P D is the power dissipated, V CC is the input supply voltage, V BAT is the battery voltage and I BAT is the charge current. It is not necessary to perform any worst-case power dissipation scenarios because the LTC4059/LTC4059A will automatically reduce the charge current to maintain the die temperature at approximately 115°C.However, the approximate ambient temperature at which the thermal feedback begins to protect the IC is:T A = 115°C – P D θJAT A = 115°C – (V CC – V BAT ) • I BAT • θJAExample: Consider an LTC4059 operating from a 5V wall adapter providing 900mA to a 3.7V Li-Ion battery. The ambient temperature above which the LTC4059/LTC4059A begin to reduce the 900mA charge current is approximately:T A = 115°C – (5V – 3.7V) • (900mA) • 50°C/W T A = 115°C – 1.17W • 50°C/W = 115°C – 59°C T A = 56°CThe LTC4059 can be used above 56°C, but the charge current will be reduced from 900mA. The approximate current at a given ambient temperature can be calculated:I C T V V BAT A CC BAT JA=°()115––•θUsing the previous example with an ambient temperature of 65°C, the charge current will be reduced to approximately:I C C V V C W CC AI mABAT BAT =°°()°=°°=11565537505065770––.•//F urthermore, the voltage at the PROG pin will change proportionally with the charge current as discussed in the Programming Charge Current section.It is important to remember that LTC4059/LTC4059A applications do not need to be designed for worst-case thermal conditions since the IC will automatically reduce power dissipation when the junction temperature reaches approximately 115°C.Board Layout ConsiderationsIn order to be able to deliver maximum charge current under all conditions, it is critical that the exposed metal pad on the backside of the LTC4059/LTC4059A package is soldered to the PC board ground. Correctly soldered to a 2500mm 2 double sided 1oz copper board the LTC4059/LTC4059A have a thermal resistance of approximately 60°C/W. F ailure to make thermal contact between the exposed pad on the backside of the package and the copper board will result in thermal resistances far greater than 60°C/W. As an example, a correctly soldered LTC4059/LTC4059A can deliver over 900mA to a battery from a 5V supply at room temperature. Without a backside thermal connection, this number could drop to less than 500mA.Stability ConsiderationsThe LTC4059 contains two control loops: constant voltage and constant current. The constant-voltage loop is stable without any compensation when a battery is connected with low impedance leads. Excessive lead length, how-ever, may add enough series inductance to require a bypass capacitor of at least 1µF from BAT to GND. Further-more, a 4.7µF capacitor with a 0.2Ω to 1Ω series resistor from BAT to GND is required to keep ripple voltage low when the battery is disconnected.High value capacitors with very low ESR (especially ce-ramic) reduce the constant-voltage loop phase margin.Ceramic capacitors up to 22µF may be used in parallel with a battery, but larger ceramics should be decoupled with 0.2Ω to 1Ω of series resistance.I n constant-current mode, the PROG pin is in the feedback loop, not the battery. Because of the additional pole created by PROG pin capacitance, capacitance on this pin must be kept to a minimum. With no additional capaci-tance on the PROG pin, the charger is stable with program resistor values as high as 12k. However, additional ca-pacitance on this node reduces the maximum allowedAPPLICATIO S I FOR ATIOW UUUFigure 5. Photo of Typical Circuit (2.5mm × 2.7mm) 1011Information furnished by Linear Technology Corporation is believed to be accurate and reliable.However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.121630 McCarthy Blvd., Milpitas, CA 95035-7417(408) 432-1900 ● FAX: (408) 434-0507 ● © LINEAR TECHNOLOGY CORPORA TION 2003LT/LT 0505 REV B • PRINTED IN USA。
综述:用于LTCC的低损耗介电材料
《low loss dielectric materials for LTCC applications: a review》《综述:用于LTCC的低损耗介电材料》A、摘要。
随着无线通讯系统和微波器件的电子消费品市场的快速增长,微型、轻便、多功能化的电子元件正吸引人们越来越多的关注。
因此、器件生产商把注意力投向了更先进的集成、封装和连接技术领域,其中一种好的解决方案就是低温共烧陶瓷(LTCC)技术。
LTCC技术能在三维上设计陶瓷模块,使其具有低介电损耗并能同时嵌入银电极。
在过去的15年里,研究人员已开发出了大量的用于高频条件使用的LTCC;在LTCC及相关技术领域发表了大约1000篇论文及约500篇的专利。
尽管如此,这些材料的技术数据却很分散,所以本文的一个主要目的就是集中论述和比较相关材料的理论及数据,这对全世界的LTCC研究者和技术人员都是非常有帮助的。
文章列出了商用LTCC、低损耗玻璃相和已在研究中的新型材料的相关性能参数。
另外,还把他们的高频性能及热性能与其它一些基质材料(如高温烧结陶瓷、聚合物)的相关性能进行了比较。
最后讨论了如何进一步提升材料性能。
B、介绍。
传统微波装置常由金属来加工,而同轴RF连接采用的连接件缺点是:成本昂贵、过于笨重且封装庞大。
这些金属封装都不能满足移动的、低价的、具有多层外部输入输出接口的模块的市场要求。
另外、如今的移动设备产业、电子娱乐业和远程通讯等所用的电子线路都需要在尽可能小的空间里集成尽可能多的功能。
所以在开发复杂的微电路方面,引入了柔性玻璃陶瓷带,即所谓的LTCC瓷带,它作为一种基础材料,扮演了非常重要的角色。
LTCC面世15年来,已经成为开发各种模块和基底的重要材料。
LTCC技术原理是:组合了许多陶瓷和导体的薄层,成为多层模块,大量地使用在设计三维布线时(使用低介电组分,通常εr≈4~9)。
另外还可以将多功能的、混合使用的被动式微波元件如:带状传输线、电介质条状线、天线、滤波器、谐振器、电容、电感、移相器、分频器等和整个母块一起设计,这在常规的氧化铝或其它软基底上是无法实现的。
LTC1592资料
1.0 0.8 0.6 0.4 0.20–0.2–0.4–0.6–0.8–1.0V REF = 5VALL OUTPUT RANGES1LTC1588/LTC1589/LTC159223LTC1588/LTC1589/LTC159245LTC1588/LTC1589/LTC15921588992faTYPICAL PERFOR A CE CHARACTERISTICSU W(LTC1588)Integral NonlinearityDifferential NonlinearityDIGITAL INPUT CODEI N T E G R A L N O N L I N E A R I T Y (L S B )0.20.61.01588992 G11–0.2–0.600.40.8–0.4–0.8–1.08001600240032004095DIGITAL INPUT CODED I F FE R E N T I A L N O N L I N E A R I T Y (L S B )0.20.61.01588992 G12–0.2–0.600.40.8–0.4–0.8–1.08001600240032004095(LTC1589)Integral NonlinearityDifferential NonlinearityDIGITAL INPUT CODEI N T E G R A L N O N L I N E A R I T Y (L S B )0.20.61.01588992 G13–0.2–0.600.40.8–0.4–0.8–1.0411282241233616383DIGITAL INPUT CODED I F FE R E N T I A L N O N L I N E A R I T Y (L S B )0.20.61.01588992 G14–0.2–0.600.40.8–0.4–0.8–1.0411282241233616383Integral Nonlinearity vs Reference Voltage in Unipolar ModeREFERENCE VOLTAGE (V)–10I N T E G R A L N O N L I N E A R I T Y (L S B )0.20.61.061588992 G05–0.2–0.600.40.8–0.4–0.8–1.0–6–22–88–40410Integral Nonlinearity (INL)DIGITAL INPUT CODE–1.0I N T E G R A L N O N L I N E A R I T Y (L S B )–0.8–0.4–0.201.00.416384327681588992 G01–0.60.60.80.24915265535DIGITAL INPUT CODE–1.0D I F FE R E N T I A L N O N L I N E A R I T Y (L S B )–0.8–0.4–0.201.00.416384327681588992 G02–0.60.60.80.24915265535Differential Nonlinearity (DNL)(LTC1592)6LTC1588/LTC1589/LTC15921588992faREFERENCE VOLTAGE (V)–10I N T E G R A L N O N L I N E A R I T Y (L S B )0.20.61.061588992 G06–0.2–0.600.40.8–0.4–0.8–1.0–6–22–88–40410Integral Nonlinearityvs Reference Voltage in Bipolar ModeDifferential Nonlinearity vs Reference Voltage in Unipolar ModeREFERENCE VOLTAGE (V)–10D I F F E R E N T I A L N O N L I N E A R I T Y (L S B )0.20.61.061588992 G07–0.2–0.600.40.8–0.4–0.8–1.0–6–22–88–40410TYPICAL PERFOR A CE CHARACTERISTICS U WDifferential Nonlinearity vs Reference Voltage in Bipolar ModeREFERENCE VOLTAGE (V)–10D I F F E R E N T I A L N O N L I N E A R I T Y (L S B )0.20.61.061588992 G08–0.2–0.600.40.8–0.4–0.8–1.0–6–22–88–40410(LTC1592)U U UPI FU CTIO SR COM (Pin 1): Center Tap Point of the Two Bipolar Resis-tors R1 and R2. Normally tied to the inverting input of an external amplifier. When these resistors are not used,connect this pin to ground. The absolute maximum volt-age range on this pin is –0.3V to 12V.R1 (Pin 2): Bipolar Resistor R1. The main reference input V REF , typically 5V. Accepts up to ±15V. Normally tied to R OFS (Pin 3) and the reference input voltage V REF (5V).When not used connect this pin to ground.R OFS (Pin 3): Bipolar Offset Network. This pin provides the offset of the output voltage range for bipolar modes.Accepts up to ±15V. Normally tied to R1 and the reference input voltage V REF (5V). Alternatively, this pin may be driven from a different voltage than V REF .R FB (Pin 4): Feedback Network. Normally tied to the output of the current to voltage converter op amp. Range limited to ±15V.Full-Scale Settling WaveformGATED SETTLING WAVEFORM 500µV/DIVLD PULSE 5V/DIV 500ns/DIV1592 G04USING LT1468 OP AMP C FEEDBACK = 20pF 0V TO 10V STEP7LTC1588/LTC1589/LTC159289LTC1588/LTC1589/LTC15921588992faOPERATIOUSerial InterfaceWhen the CS/LD is brought to a logic low, the data on the SDI input is loaded into the shift register on the rising edge of the clock. A 4-bit command word (C3 C2 C1 C0),followed by four “don’t care” bits and 16 data bits (MSB-first) is the minimum loading sequence required for the LTC1588/LTC1589/LTC1592. When the CS/LD is brought to a logic high, the clock is disabled internally and the command word is executed.If no daisy-chaining is required, the input stream can be 24-bit wide as shown in Figure 1a. The first four bits are the command word, followed by four “don’t care” bits, then a 16-bit data word. The last four bits (LSBs) of this 16-bit data word are don’t cares for the LTC1588. For the LTC1589, the last 2 bits of the 16-bit data word are don’t cares.If daisy-chaining is required or the input needs to be written in two 16-bit wide segments, then the input stream must be 32-bit wide and the first 8 bits loaded are “don’t care” bits. The remaining bits work the same as a 24-bit stream which is described in the previous paragraph. The output of the internal 32-bit shift register is available on the SDO pin 32 clock cycles later.Multiple LTC1588/LTC1589/LTC1592s may be daisy-chained together by connecting the SDO pin to the SDI pin of the next IC. The clock and CS/LD signals should remain common to all ICs in the daisy-chain. The serial data isclocked to all ICs, then the CS/LD signal is pulled high to update all of them simultaneously.Power-On Reset and ClearWhen the power supply is first turned on, the LTC1588/LTC1589/LTC1592 will power up in 5V unipolar mode (C3C2 C1 C0 = 1000). All the internal registers are set to zeros and the DAC is set to zero code.The LTC1588/LTC1589/LTC1592 must first be pro-grammed in either unipolar or bipolar mode. There are six operating modes available and can be software-pro-grammed by the command word. When a CLR signal is brought to low, it clears all internal registers to zero. The DAC output voltage goes to zero volts. If an update DAC command (C3 C2 C1 C0 = 0001) is issued immediately after the CLR signal, the DAC output remains at zero volts.If a CLR signal is given within a 100ns interval immediately after CS/LD goes high, the user should reload the output range.Output Range ProgrammingThere are two output ranges available in unipolar mode and four output ranges available in bipolar mode. See Function Table for details. All output ranges are with re-spect to a 5V reference input. When changing the LTC1588/LTC1589/LTC1592 to a new mode, the command word and data are given at the same time (24 or 32 bit). WhenC3COMMAND DON’T CARE DATA (16 BITS)C2C1C0XXXXD13D14D15D12D11D10D9D8D7D6D5D4D3D2D1D01588992 TD2MSBLSBC3COMMAND DON’T CARE DATA (14 BITS + 2 DON’T-CARE BITS)C2C1C0XXXXD13D12D11D10D9D8D7D6D5D4D3D2D1D0X X1588992 TD3MSBLSBC3COMMAND DON’T CARE DATA (12 BITS + 4 DON’T-CARE BITS)C2C1C0XXXXD11D10D9D8D7D6D5D4D3D2D1D0XXXX1588992 TD4MSBLSBINPUT WORD (LTC1592)INPUT WORD (LTC1589)INPUT WORD (LTC1588)LTC1588/LTC1589/LTC1592101112LTC1588/LTC1589/LTC15921588992faWhile not directly addressed by the simple equations in Tables 2 and 3, temperature effects can be handled just as easily for unipolar and bipolar applications. First, consult an op amp’s data sheet to find the worst-case V OS and I B over temperature. Then, plug these numbers in the V OS and I B equations from Table 3 and calculate the tempera-ture induced effects.For applications where fast settling time is important, Appli-cation Note 74, entitled “Component and MeasurementAdvances Ensure 16-Bit DAC Settling Time ,” offers a thor-ough discussion of 16-bit DAC settling time and op amp selection.Precision Voltage Reference Considerations Much in the same way selecting an operational amplifier for use with the LTC1592 is critical to the performance of the system, selecting a precision voltage reference also requires due diligence. The output voltage of the LTC1592is directly affected by the voltage reference; thus, any voltage reference error will appear as a DAC output voltage error.There are three primary error sources to consider when selecting a precision voltage reference for 16-bit applica-tions: output voltage initial tolerance, output voltage tem-perature coefficient and output voltage noise.Initial reference output voltage tolerance, if uncorrected,generates a full-scale error term. Choosing a referenceAPPLICATIO S I FOR ATIOW UUU Table 4. Partial List of LTC Precision Amplifiers Recommended for Use with the LTC1588/LTC1589/LTC1592,with Relevant SpecificationsAMPLIFIER SPECIFICATIONSVOLTAGE CURRENT SLEW GAIN BANDWIDTHt SETTLING POWER V OS I B A OL NOISE NOISE RATE PRODUCT with LTC1592DISSIPATIONAMPLIFIER µV nA V/mV nV/√Hz pA/√Hz V/µs MHzµsmWLT1001252800100.120.250.812046LT1097500.351000140.0080.20.712011LT1112 (Dual)600.251500140.0080.160.7511510.5/Op Amp LT1124 (Dual)70204000 2.70.3 4.512.51969/Op Amp LT14687510500050.62290 2.5117LT1469 (Dual)12510200050.622902.5123/Op Amp()5VVREF ()5VVREF ()16.5kAVOL1OP AMPV OS1 (mV)I B1 (nA)A VOL1 (V/V)V OS2 (mV)I B2 (mV)A VOL2 (V/V)V OS1 • 2.4 • I B1 • 0.0003 • A1 • 0 0 0INL (LSB)()5VVREF ()5VVREF ()1.5k AVOL1()66k A VOL2()131k A VOL1()131kA VOL1()131kA VOL2()131k A VOL2V OS1 • 0.6 • I B1 • 0.00008 • A2 • 0 0 0DNL (LSB)()5VVREF ()5VVREF V OS1 • 13.2 • I B1 • 0.13 •0 0 0UNIPOLAR OFFSET (LSB)()5VVREF()5V V REF ()5V V REF V OS1 • 13.2 • I B1 • 0.0018 • A5 •V OS2 • 26.2 •I B2 • 0.1 •BIPOLAR GAIN ERROR (LSB)()5V V REF ()5VV REF()()()5V V REF ()5V V REF A3 • V OS1 • 19.8 • I B1 • 0.01 • 0 A4 • V OS2 • 13.1 •A4 • I B2 • 0.05 • A4 • BIPOLAR ZERO ERROR (LSB)UNIPOLAR GAIN ERROR (LSB)()5V V REF ()5V V REF ()5V V REF ()5VV REF()5VV REFV OS1 • 13.2 • I B1 • 0.0018 • A5 •V OS2 • 26.2 •I B2 • 0.1 • Table 3. Easy-to-Use Equations Determine Op Amp Effects on DAC Accuracy in All Output RangesTable 2. Variables for Each Output Range That Adjust the Equations in Table 3OUTPUT RANGEA1A2A3A4A55V 1.12110V 2.23 1.5±5V 22 1.21 1.5±10V 44 1.21 2.5±2.5V 11 1.611–2.5V to 7.5V1.9310.51.513LTC1588/LTC1589/LTC15921588992faAPPLICATIO S I FOR ATIOW UUU with low output voltage initial tolerance, like the LT1236(±0.05%), minimizes the gain error caused by the refer-ence; however, a calibration sequence that corrects for system zero- and full-scale error is always recommended.A reference’s output voltage temperature coefficient af-fects not only the full-scale error, but can also affect the circuit’s INL and DNL performance. If a reference is chosen with a loose output voltage temperature coeffi-cient, then the DAC output voltage along its transfer characteristic will be very dependent on ambient condi-tions. Minimizing the error due to reference temperature coefficient can be achieved by choosing a precision reference with a low output voltage temperature coeffi-cient and/or tightly controlling the ambient temperature of the circuit to minimize temperature gradients.As precision DAC applications move to 16-bit and higher performance, reference output voltage noise may contrib-ute a dominant share of the system’s noise floor. This in turn can degrade system dynamic range and signal-to-noise ratio. Care should be exercised in selecting a voltage reference with as low an output noise voltage as practical for the system resolution desired. Precision voltage refer-ences, like the LT1236, produce low output noise in the 0.1Hz to 10Hz region, well below the 16-bit LSB level in 5V or 10V full-scale systems. However, as the circuit band-widths increase, filtering the output of the reference may be required to minimize output noise.Table 5. Partial List of LTC Precision References Recommended for Use with the LTC1588/LTC1589/LTC1592 with Relevant SpecificationsINITIAL TEMPERATURE0.1Hz to 10Hz REFERENCE TOLERANCE DRIFT NOISE LT1019A-5,±0.05%5ppm/°C 12µV P-P LT1019A-10LT1236A-5,±0.05%5ppm/°C 3µV P-P LT1236A-10LT1460A-5,±0.075%10ppm/°C 20µV P-P LT1460A-10LT1790A-2.5±0.05%10ppm/°C12µV P-PGroundingAs with any high resolution converter, clean grounding is important. A low impedance analog ground plane and star grounding techniques should be used. I OUT2 must be tied to the star ground with as low a resistance as possible.When it is not possible to locate star ground close to I OUT2,a low resistance trace should be used to route this pin to star ground. This minimizes the voltage drop from this pin to ground caused by the code dependent current flowing to ground. When the resistance of this circuit board trace becomes greater than 1Ω, a force/sense amplified con-figuration should be used to drive this pin (see Figure 2).This preserves the excellent accuracy (1LSB INL and DNL)of the LTC1588/LTC1589/LTC1592.An Isolated 16-Bit Subsystem Using the LTC1592The circuit in Figure 4 is a complete example of an optically isolated analog output subsystem that supports most of the legacy ranges that are still common in industrial environments. This circuit uses only two optoisolators,the load pulse (CS/LD) being derived from a series of transitions on the data line (SDI) after the clock (SCK) is halted high. If a single chip microcontroller with an auto-mated SPI interface is to be used, the SPI port can transfer the 24 bits as three bytes. Subsequently, the data output port pin can be reassigned to general purpose port opera-tion and exercised to produce a number of transitions to generate the load pulse. Alternatively, the entire sequence can be programmed bit by bit with a general purpose port.Figure 5 shows the timing.The DC/DC converter, Figure 3 based on the LT ®3439ultralow noise transformer driver provides a compact means of powering this circuit, and allows the output to deliver output current that is only limited by the LT1468capabilities. The output capability of the DC/DC converter itself is 80mA at ±12V and is available as demo board DC511A. This circuit as shown requires approximately 130mA of the 5V supply (no load). The total surface area required is less than 2 square inches.LTC1588/LTC1589/LTC159214Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.1516LTC1588/LTC1589/LTC1592LT/TP 0503 1K REV A • PRINTED IN USA© LINEAR TECHNOLOGY CORPORATION 20011630 McCarthy Blvd., Milpitas, CA 95035-7417(408) 432-1900 q FAX: (408) 434-0507 q 。
电子元器件的质量等级
电子元器件的质量等级汇总整理张增照1元器件质量保证有关标准。
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31。
1规范。
.. 31。
2标准。
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42可靠性表征方式。
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. 52.1元件的失效率等级 (5)2.2产品保证等级..。
63元器件的质量认证 (7)4元器件的质量等级。
.。
. 84。
1用于元器件生产控制、选择和采购的质量等级.。
84。
2用于电子设备可靠性预计的质量等级。
.。
104.3元器件两种质量等级的比较。
.. 105元器件的选用与质量标记。
(19)5。
1元器件的选用 (19)5.2质量标记.。
. 216结束语。
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. 22元器件质量保证有关标准为了保证军用元器件的质量,我国制订了一系列的元器件标准。
在七十年代末期制订的“七专”7905技术协议和八十年代初期制订的“七专"8406技术条件(以下统称“七专"条件),“七专"技术条件是建立我国军用元器件标准的基础,目前按“七专”条件或其加严条件控制生产的元器件仍是航天等部门使用的主要品种。
(注:“七专"指专人、专机、专料、专批、专检、专技、专卡)根据发展的趋势,“七专”条件将逐步向元器件的**军用标准(GJB)过渡。
因此,以下将主要介绍元器件**军用标准的有关情况。
从八十年代开始,我国军用标准化组织参照美国军用标准(MIL)体系建立了GJB 体系,其中元器件的标准有规范、标准、指导性技术文件三种形式:a。
规范-主要包括:元器件的总规范和详细规范,这两种规范统称产品规范。
b。
标准—主要包括:试验和测量标准、质量保证大纲和生产线认证标准、元器件材料和零件标准、型号命名标准、文字和图形符号标准等;c. 指导性技术文件—主要包括:指导正确选择和使用元器件的指南、用于电子设备可靠性预计的手册、元器件系列型谱等。
根据我国的具体情况,军标分为**军用标准、行业军用标准、企业军用标准三个级别。
下面对组成**军用元器件标准体系的三种形式:规范、标准和指导性技术文件分别举例作简要的介绍.1.1规范元器件规范主要包括:元器件的总规范(通用规范)和详细规范两个层次。
LTC1735CF资料
U W U PACKAGE/ORDER I FOR ATIO
TOP VIEW COSC 1 RUN/SS 2 ITH 3 FCB 4 SGND 5 VOSENSE 6 SENSE – 7 SENSE + 8 GN PACKAGE 16-LEAD NARROW PLASTIC SSOP 16 TG 15 BOOST 14 SW 13 VIN 12 INTVCC 11 BG 10 PGND 9 EXTVCC
元器件交易网
FEATURES
s s s s s s s s s
LTC1735 High Efficiency Synchronous Step-Down Switching Regulator DESCRIPTIO
The LTC®1735 is a synchronous step-down switching regulator controller that drives external N-channel power MOSFETs using a fixed frequency architecture. Burst ModeTM operation provides high efficiency at low load currents. The precision 0.8V reference is compatible with future generation microprocessors. OPTI-LOOP compensation allows the transient response to be optimized over a wide range of output capacitance and ESR values. The operating frequency (synchronizable up to 500kHz) is set by an external capacitor allowing maximum flexibility in optimizing efficiency. A forced continuous control pin reduces noise and RF interference and can assist secondary winding regulation by disabling Burst Mode operation when the main output is lightly loaded. Protection features include internal foldback current limiting, output overvoltage crowbar and optional shortcircuit shutdown. Soft-start is provided by an external capacitor that can be used to properly sequence supplies. The operating current level is user-programmable via an external current sense resistor. Wide input supply range allows operation from 4V to 30V (36V maximum).
常用开关电源芯片大全之欧阳美创编
常用开关电源芯片大全第1章DC-DC电源转换器/基准电压源1.1 DC-DC电源转换器1.低噪声电荷泵DC-DC电源转换器AAT3113/AAT31142.低功耗开关型DC-DC电源转换器ADP30003.高效3A开关稳压器AP15014.高效率无电感DC-DC电源转换器FAN56605.小功率极性反转电源转换器ICL76606.高效率DC-DC电源转换控制器IRU30377.高性能降压式DC-DC电源转换器ISL64208.单片降压式开关稳压器L49609.大功率开关稳压器L4970A10.1.5A降压式开关稳压器L497111.2A高效率单片开关稳压器L497812.1A高效率升压/降压式DC-DC电源转换器L597013.1.5A降压式DC-DC电源转换器LM157214.高效率1A降压单片开关稳压器LM1575/LM2575/LM2575HV15.3A降压单片开关稳压器LM2576/LM2576HV16.可调升压开关稳压器LM257717.3A降压开关稳压器LM259618.高效率5A开关稳压器LM267819.升压式DC-DC电源转换器LM2703/LM270420.电流模式升压式电源转换器LM273321.低噪声升压式电源转换器LM275022.小型75V降压式稳压器LM500723.低功耗升/降压式DC-DC电源转换器LT107324.升压式DC-DC电源转换器LT161525.隔离式开关稳压器LT172526.低功耗升压电荷泵LT175127.大电流高频降压式DC-DC电源转换器LT176528.大电流升压转换器LT193529.高效升压式电荷泵LT193730.高压输入降压式电源转换器LT195631.1.5A升压式电源转换器LT196132.高压升/降压式电源转换器LT343333.单片3A升压式DC-DC电源转换器LT343634.通用升压式DC-DC电源转换器LT346035.高效率低功耗升压式电源转换器LT346436.1.1A升压式DC-DC电源转换器LT346737.大电流高效率升压式DC-DC电源转换器LT378238.微型低功耗电源转换器LTC175439.1.5A单片同步降压式稳压器LTC187540.低噪声高效率降压式电荷泵LTC191141.低噪声电荷泵LTC3200/LTC3200-542.无电感的降压式DC-DC电源转换器LTC325143.双输出/低噪声/降压式电荷泵LTC325244.同步整流/升压式DC-DC电源转换器LTC340145.低功耗同步整流升压式DC-DC电源转换器LTC340246.同步整流降压式DC-DC电源转换器LTC340547.双路同步降压式DC-DC电源转换器LTC340748.高效率同步降压式DC-DC电源转换器LTC341649.微型2A升压式DC-DC电源转换器LTC342650.2A两相电流升压式DC-DC电源转换器LTC342851.单电感升/降压式DC-DC电源转换器LTC344052.大电流升/降压式DC-DC电源转换器LTC344253.1.4A同步升压式DC-DC电源转换器LTC345854.直流同步降压式DC-DC电源转换器LTC370355.双输出降压式同步DC-DC电源转换控制器LTC373656.降压式同步DC-DC电源转换控制器LTC377057.双2相DC-DC电源同步控制器LTC380258.高性能升压式DC-DC电源转换器MAX1513/MAX151459.精简型升压式DC-DC电源转换器MAX1522/MAX1523/MAX152460.高效率40V升压式DC-DC电源转换器MAX1553/MAX155461.高效率升压式LED电压调节器MAX1561/MAX159962.高效率5路输出DC-DC电源转换器MAX156563.双输出升压式DC-DC电源转换器MAX1582/MAX1582Y64.驱动白光LED的升压式DC-DC电源转换器MAX158365.高效率升压式DC-DC电源转换器MAX1642/MAX164366.2A降压式开关稳压器MAX164467.高效率升压式DC-DC电源转换器MAX1674/MAX1675/MAX167668.高效率双输出DC-DC电源转换器MAX167769.低噪声1A降压式DC-DC电源转换器MAX1684/MAX168570.高效率升压式DC-DC电源转换器MAX169871.高效率双输出降压式DC-DC电源转换器MAX171572.小体积升压式DC-DC电源转换器MAX1722/MAX1723/MAX172473.输出电流为50mA的降压式电荷泵MAX173074.升/降压式电荷泵MAX175975.高效率多路输出DC-DC电源转换器MAX180076.3A同步整流降压式稳压型MAX1830/MAX183177.双输出开关式LCD电源控制器MAX187878.电流模式升压式DC-DC电源转换器MAX189679.具有复位功能的升压式DC-DC电源转换器MAX194780.高效率PWM降压式稳压器MAX1992/MAX199381.大电流输出升压式DC-DC电源转换器MAX61882.低功耗升压或降压式DC-DC电源转换器MAX62983.PWM升压式DC-DC电源转换器MAX668/MAX66984.大电流PWM降压式开关稳压器MAX724/MAX72685.高效率升压式DC-DC电源转换器MAX756/MAX75786.高效率大电流DC-DC电源转换器MAX761/MAX76287.隔离式DC-DC电源转换器MAX8515/MAX8515A88.高性能24V升压式DC-DC电源转换器MAX872789.升/降压式DC-DC电源转换器MC33063A/MC34063A90.5A升压/降压/反向DC-DC电源转换器MC33167/MC3416791.低噪声无电感电荷泵MCP1252/MCP125392.高频脉宽调制降压稳压器MIC220393.大功率DC-DC升压电源转换器MIC229594.单片微型高压开关稳压器NCP1030/NCP103195.低功耗升压式DC-DC电源转换器NCP1400A96.高压DC-DC电源转换器NCP140397.单片微功率高频升压式DC-DC电源转换器NCP141098.同步整流PFM步进式DC-DC电源转换器NCP142199.高效率大电流开关电压调整器NCP1442/NCP1443/NCP1444/NCP1445100.新型双模式开关稳压器NCP1501101.高效率大电流输出DC-DC电源转换器NCP1550102.同步降压式DC-DC电源转换器NCP1570103.高效率升压式DC-DC电源转换器NCP5008/NCP5009 104.大电流高速稳压器RT9173/RT9173A105.高效率升压式DC-DC电源转换器RT9262/RT9262A 106.升压式DC-DC电源转换器SP6644/SP6645107.低功耗升压式DC-DC电源转换器SP6691108.新型高效率DC-DC电源转换器TPS54350109.无电感降压式电荷泵TPS6050x110.高效率升压式电源转换器TPS6101x111.28V恒流白色LED驱动器TPS61042112.具有LDO输出的升压式DC-DC电源转换器TPS6112x 113.低噪声同步降压式DC-DC电源转换器TPS6200x114.三路高效率大功率DC-DC电源转换器TPS75003115.高效率DC-DC电源转换器UCC39421/UCC39422116.PWM控制升压式DC-DC电源转换器XC6371117.白光LED驱动专用DC-DC电源转换器XC9116118.500mA同步整流降压式DC-DC电源转换器XC9215/XC9216/XC9217119.稳压输出电荷泵XC9801/XC9802120.高效率升压式电源转换器ZXLB16001.2 线性/低压差稳压器121.具有可关断功能的多端稳压器BAXXX122.高压线性稳压器HIP5600123.多路输出稳压器KA7630/KA7631124.三端低压差稳压器LM2937125.可调输出低压差稳压器LM2991126.三端可调稳压器LM117/LM317127.低压降CMOS500mA线性稳压器LP38691/LP38693128.输入电压从12V到450V的可调线性稳压器LR8129.300mA非常低压降稳压器(VLDO)LTC3025130.大电流低压差线性稳压器LX8610131.200mA负输出低压差线性稳压器MAX1735132.150mA低压差线性稳压器MAX8875133.带开关控制的低压差稳压器MC33375134.带有线性调节器的稳压器MC33998135.1.0A低压差固定及可调正稳压器NCP1117136.低静态电流低压差稳压器NCP562/NCP563137.具有使能控制功能的多端稳压器PQxx138.五端可调稳压器SI-3025B/SI-3157B139.400mA低压差线性稳压器SPX2975140.五端线性稳压器STR20xx141.五端线性稳压器STR90xx142.具有复位信号输出的双路输出稳压器TDA8133143.具有复位信号输出的双路输出稳压器TDA8138/TDA8138A144.带线性稳压器的升压式电源转换器TPS6110x145.低功耗50mA低压降线性稳压器TPS760xx146.高输入电压低压差线性稳压器XC6202147.高速低压差线性稳压器XC6204148.高速低压差线性稳压器XC6209F149.双路高速低压差线性稳压器XC64011.3 基准电压源150.新型XFET基准电压源ADR290/ADR291/ADR292/ADR293 151.低功耗低压差大输出电流基准电压源MAX610x152.低功耗1.2V基准电压源MAX6120153.2.5V精密基准电压源MC1403154.2.5V/4.096V基准电压源MCP1525/MCP1541155.低功耗精密低压降基准电压源REF30xx/REF31xx156.精密基准电压源TL431/KA431/TLV431A第2章AC-DC转换器及控制器1.厚膜开关电源控制器DP104C2.厚膜开关电源控制器DP308P3.DPA-Switch系列高电压功率转换控制器DPA423/DPA424/DPA425/DPA4264.电流型开关电源控制器FA13842/FA13843/FA13844/FA138455.开关电源控制器FA5310/FA53116.PWM开关电源控制器FAN75567.绿色环保的PWM开关电源控制器FAN76018.FPS型开关电源控制器FS6M07652R9.开关电源功率转换器FS6Sxx10.降压型单片AC-DC转换器HV-2405E11.新型反激准谐振变换控制器ICE1QS0112.PWM电源功率转换器KA1M088013.开关电源功率转换器KA2S0680/KA2S088014.电流型开关电源控制器KA38xx15.FPS型开关电源功率转换器KA5H0165R16.FPS型开关电源功率转换器KA5Qxx17.FPS型开关电源功率转换器KA5Sxx18.电流型高速PWM控制器L499019.具有待机功能的PWM初级控制器L599120.低功耗离线式开关电源控制器L659021.LINK SWITCH TN系列电源功率转换器LNK304/LNK305/LNK30622.LINK SWITCH系列电源功率转换器LNK500/LNK501/LNK52023.离线式开关电源控制器M51995A24.PWM电源控制器M62281P/M62281FP25.高频率电流模式PWM控制器MAX5021/MAX502226.新型PWM开关电源控制器MC4460427.电流模式开关电源控制器MC4460528.低功耗开关电源控制器MC4460829.具有PFC功能的PWM电源控制器ML482430.液晶显示器背光灯电源控制器ML487631.离线式电流模式控制器NCP120032.电流模式脉宽调制控制器NCP120533.准谐振式PWM控制器NCP120734.低成本离线式开关电源控制电路NCP121535.低待机能耗开关电源PWM控制器NCP123036.STR系列自动电压切换控制开关STR8xxxx37.大功率厚膜开关电源功率转换器STR-F665438.大功率厚膜开关电源功率转换器STR-G865639.开关电源功率转换器STR-M6511/STR-M652940.离线式开关电源功率转换器STR-S5703/STR-S5707/STR-S570841.离线式开关电源功率转换器STR-S6401/STR-S6401F/STR-S6411/STR-S6411F 442.开关电源功率转换器STR-S651343.离线式开关电源功率转换器TC33369~TC3337444.高性能PFC与PWM组合控制集成电路TDA16846/TDA1684745.新型开关电源控制器TDA1685046.“绿色”电源控制器TEA150447.第二代“绿色”电源控制器TEA150748.新型低功耗“绿色”电源控制器TEA153349.开关电源控制器TL494/KA7500/MB375950.Tiny SwitchⅠ系列功率转换器TNY253、TNY254、TNY25551.Tiny SwitchⅡ系列功率转换器TNY264P~TNY268G52.TOP Switch(Ⅱ)系列离线式功率转换器TOP209~TOP22753.TOP Switch-FX系列功率转换器TOP232/TOP233/TOP23454.TOP Switch-GX系列功率转换器TOP242~TOP25055.开关电源控制器UCX84X56.离线式开关电源功率转换器VIPer12AS/VIPer12ADIP57.新一代高度集成离线式开关电源功率转换器VIPer53第3章功率因数校正控制/节能灯电源控制器1.电子镇流器专用驱动电路BL83012.零电压开关功率因数控制器FAN48223.功率因数校正控制器FAN75274.高电压型EL背光驱动器HV8265.EL场致发光背光驱动器IMP525/IMP5606.高电压型EL背光驱动器/反相器IMP8037.电子镇流器自振荡半桥驱动器IR21568.单片荧光灯镇流器IR21579.调光电子镇流器自振荡半桥驱动器IR215910.卤素灯电子变压器智能控制电路IR216111.具有功率因数校正电路的镇流器电路IR216612.单片荧光灯镇流器IR216713.自适应电子镇流器控制器IR252014.电子镇流器专用控制器KA754115.功率因数校正控制器L656116.过渡模式功率因数校正控制器L656217.集成背景光控制器MAX8709/MAX8709A18.功率因数校正控制器MC33262/MC3426219.固定频率电流模式功率因数校正控制器NCP165320.EL场致发光灯高压驱动器SP440321.功率因数校正控制器TDA4862/TDA486322.有源功率因数校正控制器UC385423.高频自振荡节能灯驱动器电路VK05CFL24.大功率高频自振荡节能灯驱动器电路VK06TL第4章充电控制器1.多功能锂电池线性充电控制器AAT36802.可编程快速电池充电控制器BQ20003.可进行充电速率补偿的锂电池充电管理器BQ20574.锂电池充电管理电路BQ2400x5.单片锂电池线性充电控制器BQ2401xB接口单节锂电池充电控制器BQ2402x7.2A同步开关模式锂电池充电控制器BQ241008.集成PWM开关控制器的快速充电管理器BQ29549.具有电池电量计量功能的充电控制器DS277010.锂电池充电控制器FAN7563/FAN756411.2A线性锂/锂聚合物电池充电控制器ISL629212.锂电池充电控制器LA5621M/LA5621V13.1.5A通用充电控制器LT157114.2A恒流/恒压电池充电控制器LT176915.线性锂电池充电控制器LTC173216.带热调节功能的1A线性锂电池充电控制器LTC173317.线性锂电池充电控制器LTC173418.新型开关电源充电控制器LTC198019.开关模式锂电池充电控制器LTC400220.4A锂电池充电器LTC400621.多用途恒压/恒流充电控制器LTC400822.4.2V锂离子/锂聚合物电池充电控制器LTC405223.可由USB端口供电的锂电池充电控制器LTC405324.小型150mA锂电池充电控制器LTC405425.线性锂电池充电控制器LTC405826.单节锂电池线性充电控制器LTC405927.独立线性锂电池充电控制器LTC406128.镍镉/镍氢电池充电控制器M62256FP29.大电流锂/镍镉/镍氢电池充电控制器MAX150130.锂电池线性充电控制器MAX150731.双输入单节锂电池充电控制器MAX1551/MAX155532.单节锂电池充电控制器MAX167933.小体积锂电池充电控制器MAX1736B接口单节锂电池充电控制器MAX181135.多节锂电池充电控制器MAX187336.双路输入锂电池充电控制器MAX187437.单节锂电池线性充电控制器MAX189838.低成本/多种电池充电控制器MAX190839.开关模式单节锂电池充电控制器MAX1925/MAX192640.快速镍镉/镍氢充电控制器MAX2003A/MAX200341.可编程快速充电控制器MAX712/MAX71342.开关式锂电池充电控制器MAX74543.多功能低成本充电控制器MAX846A44.具有温度调节功能的单节锂电池充电控制器MAX8600/MAX860145.锂电池充电控制器MCP73826/MCP73827/MCP7382846.高精度恒压/恒流充电器控制器MCP73841/MCP73842/MCP73843/MCP73844 647.锂电池充电控制器MCP73861/MCP7386248.单节锂电池充电控制器MIC7905049.单节锂电池充电控制器NCP180050.高精度线性锂电池充电控制器VM7205。
LTC2954CDDB-2中文资料
IPB
PB Input Current
VPB(VTH) VPB(VOC) tEN, Lock Out IEN(LKG)
PB Input Threshold PB Open Circuit Voltage EN/EN Lock Out Time (Note 5) EN/EN Leakage Current
●
6
12
µA
● 2.2
2.3
2.5
V
50
400
700
mV
● –1
26.4
V
2954f
元器件交易网
LTC2954
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
Storage Temperature Range DFN Package..................................... – 65°C to 125°C TSOT-23............................................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
TOP VIEW
GND 1
8 INT
ONT 2
7 EN/EN
9
PB 3
6 PDT
VIN 4
5 KILL
DDB PACKAGE 8-LEAD (3mm × 2mm) PLASTIC DFN
The LTC2954 operates over a wide 2.7V to 26.4V input voltage range to accommodate a wide variety of input power supplies. Very low quiescent current (6µA typical) makes the LTC2954 ideally suited for battery powered applications. Two versions of the part are available to accommodate either positive or negative enable polarities.
元器件库存
供应商料号物料描述F6QA2G140M2AM滤波器_SAW/BAW/FBAR滤波器_1109_Single-Filter_BCHQ0603T-2N2B-HU电感_高频电感_2.2 nH_±0.1nH_0201_10000MHz_14_QM23007滤波器_双工器/多工器_1814_Duplexer_B7_31dBm_QM23PMZ600UNE MOS管_MOS管_PMZ600UNE_NXPSDCL0603Q22NHT02B03电感_高频电感_22 nH_±3%_0201_2200MHz_13_SDCL0FPF3380UCX电源类芯片_OVP保护IC_FPF3380UCX_Onsemi WL2836D28-4/TR电源类芯片_LDO_WL2836D28-4/TR_WILL SDCL0603Q5N1BT02B03电感_高频电感_5.1 nH_±0.1nH_0201_5900MHz_13_SWL2836D12-4/TR电源类芯片_LDO_WL2836D12-4/TR_WillSD18-0847R8UUB1滤波器_双工器/多工器_1814_Duplexer_band20_29.5 dAW5005DNRZ射频放大器_低噪声放大器模组_AW5005DNRZ_AwinicET51528YB电源类芯片_LDO_ET51528YB_ETEKPTVSHC2EN4V8UA保护器件_单向TVS管_PTVSHC2EN4V8UA_PRISEMISDCL0603Q6N8HT02B03电感_高频电感_6.8 nH_±3%_0201_5500MHz_13_SDCLGRM155R60J225ME15D电容_普通电容_0402_2.2000000000000_μF_6.3V_±20小五金_屏蔽罩_银色_冲压_audio-cover_Xinchuang_J6A2V270J0201C0G250NAT电容_普通电容_0201_0.33 mm_27_pF_25V_±5%_COG(NGRM033R61A105ME44D电容_普通电容_0201_0.35 mm_1_uF_10V_±20%_X5R_G0402WGF330JTCE电阻_普通电阻_0402WGF330JTCE_Uniohm SDCL0603Q3N3BT02B03电感_高频电感_3.3 nH_±0.1nH_0201_8100MHz_13_SSDCL0603Q0N6BT02B03电感_高频电感_0.6 nH_±0.1nH_0201_20000MHz_13_SDCL0603Q2N2BT02B03电感_高频电感_2.2 nH_±0.1nH_0201_11000MHz_13_V1R8B0201C0G250NAT电容_普通电容_0201_0.33 mm_1.8_pF_25V_±0.1pF_CHQ0603Q10NHT01电感_高频电感_10 nH_±3%_0201_4500MHz_20_HQ060LESD8LL5.0CT5G TVS;5V;0.3pF;1.05*0.65*0.505mmP:SOD882CL03A105MP3NSNC电容_普通电容_0201_0.35 mm_1_μF_10V_±20%_X5R_C0201WMF1500TEE电阻_普通电阻_0201WMF1500TEE_Uniohm HTQL1412FE-R47MSR电感_功率电感_1412_0.65 mm_0.47 uH_35 mΩ_42 mΩV390J0201C0G250NAT电容_普通电容_0201_0.33 mm_39_pF_25V_±5%_COG(NKM3V6001CM-B705存储类IC_eMCP&uMCP_LP4X eMCP_6 GB_128GB_1.RC0201FR-076R2L电阻_普通电阻_0201_0.26 mm_6.2 ohm_±1%_0.05W_20201WMF1103TCE电阻_普通电阻_0201WMF1103TCE_UniohmV6R8C0201C0G250NAT电容_普通电容_0201_0.33 mm_6.8_pF_25V_±0.25pF_BDDL002016101R0MGD电感_功率电感_2016_1.0 mm_1 uH_46 mΩ_50mΩ_4.0WL2836D105-4/TR电源类芯片_LDO_WL2836D105-4/TR_Will 0201WMJ0681TEE电阻_普通电阻_0201WMJ0681TEE_UniohmV820G0201C0G500NAT电容_普通电容_0201_0.33 mm_82_pF_50V_±2%_COG(NV560G0201C0G500NAT电容_普通电容_0201_0.33 mm_56_pF_50V_±2%_COG(NWS7872DA-6/TR射频开关_射频通用开关_SPDT for WLAN_3.3V_GPIO_32V9R0C0201C0G250NAT电容_普通电容_0201_0.33 mm_9_pF_25V_±0.25pF_COCHQ0603T-1N5B-HU电感_高频电感_1.5 nH_±0.1nH_0201_10000MHz_14_CHQ0603T-10NH-HU电感_高频电感_10 nH_±3%_0201_3800MHz_14_CHQ06V100G0201C0G500NAT电容_普通电容_0201_0.33 mm_10_pF_50V_±2%_C0G(NB39202B1262L210滤波器_双工器/多工器_1612_Duplexer_B2_31dBm_B392CHQ0603T-4N3C-HU电感_高频电感_4.3 nH_±3%_0201_6500MHz_14_CHQ0CHQ0603T-2N0B-HU电感_高频电感_2 nH_±0.1nH_0201_10000MHz_14_CHCHQ0603T-4N7C-HU电感_高频电感_4.7 nH_±3%_0201_6400MHz_14_CHQ0CHQ0603T-7N5H-HU电感_高频电感_7.5 nH_±3%_0201_4600MHz_14_CHQ0RC0201FR-07402KL电阻_普通电阻_RC0201FR-07402KL0201WMF4023TEE电阻_普通电阻_0201_0.26 mm_402 Kohm_±1%_1/20W_RC0201FR-07910KL电阻_普通电阻_RC0201FR-07910KL0201WMF9103TEE电阻_普通电阻_0201WMF9103TEE_UniohmLF1005-N1R9NBAT/LF滤波器_LTCC滤波器_LPF_1710-2025MHz_36dBm_LF10PESD5V0G1BL/XM保护器件_ESD保护阵列_PESD5V0G1BL/XM_Presemi0603WAJ0000T5E电阻_普通电阻_0603WAJ0000T5E_UniohmWR04X000 PTLJ电阻_普通电阻_0402_0.4 mm_0 ohm_±5%_1/16W_50V_RC0201FR-071K4L电阻_普通电阻_RC0201FR-071K4L0201WMF1401TEE电阻_普通电阻_0201WMF1401TEE_Uniohm SDCL0603Q2N0BT02B02电感_高频电感_2 nH_±0.1nH_0201_10000MHz_13_SDSDCL0603Q2N2BT02B02电感_高频电感_2.2 nH_±0.1nH_0201_9400MHz_13_SSDCL0603Q3N0BT02B02电感_高频电感_3 nH_±0.1nH_0201_8000MHz_13_SDCSDCL0603Q4N7BT02B02电感_高频电感_4.7 nH_±0.1nH_0201_6400MHz_13_SSDCL0603Q7N5HT02B02电感_高频电感_7.5 nH_±3%_0201_4800MHz_13_SDCLRF1694TR13-5K天线调谐器_天线调谐开关_SP4T_2.85V_GPIO_36_RF1694TMAX98927EWX+T智能音频放大器/smart audio amplifierG6QN2G017M2RF滤波器_SAW/BAW/FBAR滤波器_1511_Dual-Filter_B34HDFB08ARSS-B5滤波器_SAW/BAW/FBAR滤波器_1.1*0.9_Single-FilteV473K0201X5R6R3NAT电容_普通电容_0201_0.33 mm_47_nF_6.3V_±10%_X5RSDCL0603Q10NHT02B02电感_高频电感_10 nH_±3%_0201_4500MHz_11_SDCL0SDCL0603Q15NHT02B02电感_高频电感_15 nH_±3%_0201_3100MHz_11_SDCL0SDCL0603Q3N3BT02B02电感_高频电感_3.3 nH_±0.1nH_0201_7600MHz_13_SSDCL0603Q3N9BT02B02电感_高频电感_3.9 nH_±0.1nH_0201_6800MHz_13_SSDCL0603Q6N8HT02B02电感_高频电感_6.8 nH_±3%_0201_5400MHz_13_SDCLWR04X5R1 JTL电阻_普通电阻_0402_0.4 mm_5.1 ohm_±5%_1/16W_50HDFB05ARSS-B5滤波器_SAW/BAW/FBAR滤波器_1.1*0.9_Single-FilteSDCL0603Q22NHT02B02电感_高频电感_22 nH_±3%_0201_2600MHz_11_SDCL0SDCL0603Q27NHT02B01电感_高频电感_27 nH_±3%_0201_1800MHz_13_SDCL0SDCL0603Q82NHT02B02电感_高频电感_82 nH_±3%_0201_1100MHz_10_SDCL0MPIX201610EFR47M20-LF电感_功率电感_0806_1.0 mm _±20%_MPIX201610EFR4GZ1005U121CTF电感_磁珠_GZ1005U121CTF_SunlordB39262B7503L210滤波器_SAW/BAW/FBAR滤波器_1109_Single-Filter_TPZ1608D102-R80TF电感_磁珠_0603_0.95 mm_1000 Ω_400 Ω_0.25 Ω_8C3J_BB_BASE SHIELD FRAME,C3J,BASE,CPUC3J_BB_BASE SHIELD FRAME,C3J,BASE,CPUC3J_BB_COVER SHIELD FRAME,C3J,COVER,CPUSAFEL1G96AA0F0A滤波器_SAW/BAW/FBAR滤波器_1411_Single-Filter_BRC0201JR-07390KL电阻_普通电阻_0201_0.26 mm_390 Kohm_±5%_1/20W_0201WMJ0394TEE电阻_普通电阻_0201WMJ0394TEE_UniohmRC0402FR-075K1L电阻_普通电阻_0402_0.40 mm_5.1 Kohm_±1%_1/16W_0402WGF5101TCE电阻_普通电阻_0402WGF5101TCE_Uniohm HDFB07RSS-B5滤波器_SAW/BAW/FBAR滤波器_1109_Single-Filter_2F6QA2G655M2QH滤波器_SAW/BAW/FBAR滤波器_1109_Single-Filter_B0201WMF8202TEE电阻_普通电阻_0201WMF8202TEE_Uniohm 0201WMF1873TEE电阻_普通电阻_0201WMF1873TEE_Uniohm 0201WMF2492TEE电阻_普通电阻_0201WMF2492TEE_Uniohm SAPRY1G74BB0B0A滤波器_双工器/多工器_2520_Multiplexer_B1+3 Dual D0201WMF5623TEE电阻_普通电阻_0201_0.26 mm_562 Kohm_±1%_1/20W_RC0201FR-07562KL电阻_普通电阻_0201_0.3 mm_562 Kohm_±1%_1/20W_2WR02X1102FAL电阻_普通电阻_0201_0.26 mm_11 Kohm_±1%_1/20W_2WR04X33R0FTL电阻_普通电阻_0402_0.4 mm_33 ohm_±1%_1/16W_50VWR02X222 JAL电阻_普通电阻_0201_0.26 mm_2.2 Kohm_±5%_1/20W_WR06X000 PTL电阻_普通电阻_0603_0.6 mm_0 ohm_±5%_1/10W_75V_WR04X2R2 JTL电阻_普通电阻_0402_0.4 mm_2.2 ohm_±5%_1/16W_50WR04X100 JTL电阻_普通电阻_0402_0.4 mm_10 ohm_±5%_1/16W_50VWR04X220 JTL电阻_普通电阻_0402_0.4 mm_22 ohm_±5%_1/16W_50VD6DA2G655K2F1滤波器_双工器/多工器_1814_Duplexer_B7_29dBm_D6DA。
LTC4449EDCB#TRMPBF;LTC4449EDCB#TRPBF;LTC4449IDCB#TRMPBF;LTC4449IDCB#TRPBF;中文规格书,Datasheet资料
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
Input Signal (IN)
VIH(TG)
TG Turn-On Input Threshold
VIL(TG)
TG Turn-Off Input Threshold
VIH(BG)
BG Turn-On Input Threshold
FEATURES
n 4V to 6.5V VCC Operating Voltage n 38V Maximum Input Supply Voltage n Adaptive Shoot-Through Protection n Rail-to-Rail Output Drivers n 3.2A Peak Pull-Up Current n 4.5A Peak Pull-Down Current n 8ns TG Rise Time Driving 3000pF Load n 7ns TG Fall Time Driving 3000pF Load n Separate Supply to Match PWM Controller n Drives Dual N-Channel MOSFETs n Undervoltage Lockout n Low Profile (0.75mm) 2mm × 3mm DFN Package
IN = Floating
VCC Rising VCC Falling Hysteresis
4
6.5
V
300
400
μA
l 2.75 3.20 3.65
V
l 2.60 3.04 3.50
V
160
mV
LTC2450IDC#TRMPBF;LTC2450CDC#TRMPBF;LTC2450CDC#TRPBF;LTC2450IDC#TRPBF;中文规格书,Datasheet资料
12450fbFEATURESAPPLICATIONSDESCRIPTION16-Bit ΔΣ ADCThe L TC ®2450 is an ultra-tiny 16-bit analog-to-digital converter . The L TC2450 uses a single 2.7V to 5.5V supply, accepts a single-ended analog input voltage, and commu-nicates through an SPI interface. It includes an integrated oscillator that does not require any external components. It uses a delta-sigma modulator as a converter core and provides single-cycle settling time for multiplexed applica-tions. The converter is available in a 6-pin, 2mm × 2mm DFN package. The internal oscillator does not require any external components. The L TC2450 includes a proprietary input sampling scheme that reduces the average input sampling current several orders of magnitude.The L TC2450 is capable of up to 30 conversions per sec-ond and, due to the very large oversampling ratio, has extremely relaxed antialiasing requirements. The L TC2450 includes continuous internal offset and full-scale calibra-tion algorithms which are transparent to the user , ensuring accuracy over time and over the operating temperature range. The converter uses its power supply voltage as the reference voltage and the single-ended, rail-to-rail input voltage range extends from GND to V CC .Following a conversion, the L TC2450 can automatically enter a sleep mode and reduce its power to less than 200nA. If the user samples the ADC once a second, the L TC2450 consumes an average of less than 50μW from a 2.7V supply.nGND to V CC Single-Ended Input Range n 0.02LSB RMS Noisen 2LSB INL, No Missing Codes n 2LSB Offset Error n 4LSB Full-Scale ErrornSingle Conversion Settling Time for Multiplexed Applicationsn Single Cycle Operation with Auto Shutdown n 350μA Supply Current n 50nA Sleep Currentn 30 Conversions Per Secondn Internal Oscillator—No External Components Requiredn Single Supply, 2.7V to 5.5V Operation n SPI Interface n Ultra-Tiny 2mm × 2mm DFN PackagenSystem Monitoring n E nvironmental MonitoringnDirect Temperature Measurements n Instrumentationn Industrial Process Control n Data Acquisitionn Embedded ADC UpgradesIntegral Nonlinearity, V CC = 3VL , L T , L TC and L TM are registered trademarks of Linear Technology Corporation. East Drive is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 6208279, 6411242, 7088280, 7164378.3-WIRE SPI INTERFACEμFINPUT VOL TAGE (V)–3.0I N L (L S B )–2.0–1.001.03.00.51.0 1.52.02450 G022.53.02.0–2.5–1.5–0.50.52.51.5V CC = V REF = 3VT A = –45°C, 25°C, 90°CT YPICAL APPLICATION /22450fbPIN CONFIGURATIONABSOLUTE MAXIMUM RATINGSSupply Voltage (V CC ) ...................................–0.3V to 6V Analog Input Voltage (V IN ) ............–0.3V to (V CC + 0.3V)Digital Input Voltage ......................–0.3V to (V CC + 0.3V)Digital Output Voltage ...................–0.3V to (V CC + 0.3V)Operating Temperature RangeL TC2450C ................................................0°C to 70°C L TC2450I..............................................–40°C to 85°C Storage Temperature Range ...................–65°C to 150°C Lead Temperature (Soldering, 10sec) ...................300°C(Notes 1, 2)PARAMETERCONDITIONSMIN TYP MAX UNITS Resolution (No missing codes)(Note 3)l 16Bits Integral Nonlinearity (Note 4)l 210LSB Offset Error l28LSB Offset Error Drift 0.02LSB/°C Gain Error l0.010.02% of FS Gain Error Drift 0.02LSB/°C T ransition Noise1.4μV RMSTOP VIEWDC PACKAGE6-LEAD (2mm × 2mm) PLASTIC DFNV CC V IN GND 4576321SDO SCK CST JMAX = 125°C, θJA = 102°C/WEXPOSED PAD (PIN7) IS GND, MUST BE SOLDERED TO PCBThe l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at T A = 25°C. (Note 2)SYMBOL PARAMETER CONDITIONSMIN TYP MAX UNITSV IN Input Voltage Range lV CCC ININ Sampling Capacitance 0.35pFI DC_LEAK (V IN )IN DC Leakage Current V IN = GND (Note 5)V IN = V CC (Note 5)l l–10–10111010nA nA I CONVInput Sampling Current (Note 9)50nAThe l denotes the specifi cations which apply over the full operating temperature range,otherwisespecifi cations are at T A = 25°C.ORDER INFORMATIONELECTRICAL CHARACTERISTICSANALOG INPUT Lead Free FinishTAPE AND REEL (MINI)TAPE AND REEL PART MARKING *PACKAGE DESCRIPTION TEMPERATURE RANGE L TC2450CDC#TRMPBFL TC2450CDC#TRPBFLCTR6-Lead (2mm × 2mm) Plastic DFN0°C to 70°C L TC2450IDC#TRMPBF L TC2450IDC#TRPBF LCTR 6-Lead (2mm × 2mm) Plastic DFN –40°C to 85°CTRM = 500 pieces. *Temperature grades are identifi ed by a label on the shipping container .Consult L TC Marketing for parts specifi ed with wider operating temperature ranges.Consult L TC Marketing for information on lead based fi nish parts.For more information on lead free part marking, go to: http://www.linear .com/leadfree/For more information on tape and reel specifi cations, go to: http://www.linear .com/tapeandreel//32450fbNote 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.Note 2: All voltage values are with respect to GND. V CC = 2.7V to 5.5V unless otherwise specifi ed.Note 3: Guaranteed by design, not subject to test.Note 4: Integral nonlinearity is defi ned as the deviation of a code from a straight line passing through the actual endpoints of the transfer curve. The deviation is measured from the center of the quantization band. Guaranteed by design, test correlation and 3 point transfer curve measurement.SYMBOL PARAMETER CONDITIONSMIN TYP MAX UNITSV CC Supply Voltage l 2.75.5V I CCSupply Current Conversion SleepCS = GND (Note 6)CS = VCC (Note 6)ll3500.056000.5μA μAThe l denotes the specifi cations which apply over the full operating temperature range,otherwise specifi cations are at T A = 25°C. (Note 2)POWER REQUIREMENTSSYMBOL PARAMETERCONDITIONSMIN TYP MAX UNITSV IH High Level Input Voltage l V CC – 0.3V V IL Low Level Input Voltage l 0.3V I IN Digital Input Current l–1010μA C IN Digital Input Capacitance 10pF V OH High Level Output Voltage I O = –800μA l V CC – 0.5VV OL Low Level Output Voltage I O = –1.6mAl 0.4V I OZHi-Z Output Leakage Currentl–1010μAThe l denotes the specifi cations which apply over the full operating temperature range,otherwise specifi cations are at T A = 25°C.The l denotes the specifi cations which apply over the full operating temperature range,otherwise specifi cations are at T A = 25°C.SYMBOL PARAMETER CONDITIONSMIN TYP MAX UNITS t CONV Conversion Time l 2933.342ms f SCK SCK Frequency Range l 2MHz t lSCK SCK Low Period l 250ns t hSCK SCK High Periodl250nst 1CS Falling Edge to SDO Low Z (Notes 7, 8)l 0100ns t 2CS Rising Edge to SDO High Z(Notes 7, 8)l 0100ns t 3CS Falling Edge to SCK Falling Edge l 100ns t KQSCK Falling Edge to SDO Valid(Note 7)l100nsNote 5: CS = V CC . A positive current is fl owing into the DUT pin.Note 6: SCK = V CC or GND. SDO is high impedance.Note 7: See Figure 3.Note 8: See Figure 4.Note 9: Input sampling current is the average input current drawn from the input sampling network while the L TC2450 is actively sampling the input.DIGITAL INPUTS AND DIGITAL OUTPUTS TIMING CHARACTERISTICS/42450fbTYPICAL PERFORMANCE CHARACTERISTICSIntegral Nonlinearity, V CC = 5VIntegral Nonlinearity, V CC = 3VMaximum INL vs TemperatureOffset Error vs TemperatureGain Error vs TemperatureT ransition Noise vs TemperatureINPUT VOL TAGE (V)0–3.0I N L (L S B )–2.0–1.001.03.0 1.5 2.5 3.52450 G014.50.5 1.0 2.0 3.0 4.05.02.0–2.5–1.5–0.50.52.5 1.5V CC = V REF = 5V T A = –45°C, 25°C, 90°CINPUT VOL TAGE (V)–3.0I N L (L S B )–2.0–1.001.03.00.51.0 1.52.02450 G022.53.02.0–2.5–1.5–0.50.52.51.5V CC = V REF = 3VTA = –45°C, 25°C, 90°CTEMPERATURE (°C)–50I N L (L S B )2.05.025751002450 G031.00.54.03.01.54.503.52.5–2550TEMPERATURE (°C)–50O F F S E T (L S B )2.05.025751002450 G041.00.54.03.01.54.503.52.5–2550TEMPERATURE (°C)–50G A I N E R R O R (L S B )2.05.025751002450 G051.00.54.03.01.54.503.52.5–2550TEMPERATURE (°C)–50 T R A N S I T I O N N O I S ER M S (μV )1.503.001070902450 G061.000.250.500.752.502.001.252.7502.251.75–30–103050/52450fbT ransition Noise vs Output CodeConversion Mode Power Supply Current vs TemperatureSleep Mode Power Supply Current vs TemperatureTYPICAL PERFORMANCE CHARACTERISTICSConversion Period vs TemperatureAverage Power Dissipation vs Temperature, V CC = 3VOUTPUT CODE (NORMALIZED TO FULL SCALE)0 T R A N S I T I O N N O I S E R M S (μV )1.503.000.80 1.002450 G071.000.250.500.752.502.001.252.7502.251.750.200.400.60TEMPERATURE (°C)–45–250C O N V E R S I O N C U R R E N T (μA )200500–535552450 G08100400300157595TEMPERATURE (°C)–45–250S L E E P M O D E C U R R E N T (n A )100250–535552450 G0950200150157595TEMPERATURE (°C)–5010A V E R A G E P O W E R D I S S I P A T I O N (μW )100100010000–25025502450 G1075100TEMPERATURE (°C)–45C O N V E R S I O N T I M E (m s )38404215552450 G113634–25–53575953230/62450fbPIN FUNCTIONSV CC (Pin 1): Positive Supply Voltage and Converter Refer-ence Voltage. Bypass to GND (Pin 3) with a 10μF capacitor in parallel with a low series inductance 0.1μF capacitor located as close to the part as possible.V IN (Pin 2): Analog Input Voltage.GND (Pin 3): Ground. Connect to a ground plane through a low impedance connection.CS (Pin 4): Chip Select Active LOW Digital Input. A LOW on this pin enables the SDO digital output. A HIGH on this pin places the SDO output pin in a high impedance state.SDO (Pin 5): Three-State Serial Data Output. SDO is used for serial data output during the DATA OUTPUT state and can be used to monitor the conversion status.SCK (Pin 6): Serial Clock Input. SCK synchronizes the serial data output. While digital data is available (the ADC is not in CONVERT state) and CS is LOW (ADC is not in SLEEP state) a new data bit is produced at the SDO output pin following every falling edge applied to the SCK pin.Exposed Pad (Pin 7): Ground. The Exposed Pad must be soldered to the same point as Pin 3.Figure 1. Functional Block DiagramFUNCTIONAL BLOCK DIAGRAMV V 2450 BD/72450fbCONVERTER OPERATIONConverter Operation Cycle The L TC2450 is a low power , delta-sigma analog-to-digital converter with a simple 3-wire interface (see Figure 1). Its operation is composed of three successive states: CONVERT , SLEEP and DATA OUTPUT . The operat-ing cycle begins with the CONVE RT state, is followed by the SLE E P state and ends with the DATA OUTPUT state (see Figure 2). The 3-wire interface consists of serial data output (SDO), serial clock input (SCK) and the active low chip select input (CS ). The CONVE RT state duration is determined by the L TC2450 conversion time (nominally 33.3 milliseconds). Once started, this operation can not be aborted except by a low power supply condition (V CC < 2.1V) which generates an internal power-on reset signal.After the completion of a conversion, the L TC2450 entersthe SLE E P state and remains here until both the chip select and clock inputs are low (CS = SCK = LOW). Fol-lowing this condition the ADC transitions into the DATA OUTPUT state.Figure 2. L TC2450 State T ransition DiagramAPPLICATIONS INFORMATIONWhile in the SLEEP state, whenever the chip select input is pulled high (CS = HIGH), the L TC2450’s power supplycurrent is reduced to less than 200nA. When the chip select input is pulled low (CS = LOW), and SCK is maintained at a HIGH logic level, the L TC2450 will return to a normal power consumption level. During the SLEEP state, theresult of the last conversion is held indefinitely in a static register .Upon entering the DATA OUTPUT state, SDO outputs the most signifi cant bit (D15) of the conversion result. During this state, the ADC shifts the conversion result serially through the SDO output pin under the control of the SCK input pin. There is no latency in generating this result and it corresponds to the last completed conversion. A new bit of data appears at the SDO pin following each falling edge detected at the SCK input pin. The user can reliablylatch this data on every rising edge of the external serial clock signal driving the SCK pin (see Figure 3).The DATA OUTPUT state concludes in one of two dif-ferent ways. First, the DATA OUTPUT state operation is completed once all 16 data bits have been shifted out andthe clock then goes low, which corresponds to the 16th falling edge of SCK. Second, the DATA OUTPUT state canbe aborted at any time by a LOW-to-HIGH transition on the CS input. Following either one of these two actions,the L TC2450 will enter the CONVERT state and initiate anew conversion cycle.Power-Up SequenceWhen the power supply voltage V CC applied to the con-verter is below approximately 2.1V , the ADC performs a power-on reset. This feature guarantees the integrity of the conversion result.When V CC rises above this critical threshold, the converter generates an internal power-on reset (POR) signal for approximately 0.5ms. The POR signal clears all internal registers. Following the POR signal, the L TC2450 starts a conversion cycle and follows the succession of states described in Figure 2. The fi rst conversion result fol-lowing POR is accurate within the specifi cations of the device if the power supply voltage V CC is restored within the operating range (2.7V to 5.5V) before the end of the POR time interval./82450fbAPPLICATIONS INFORMATIONthis range. Thus the converter resolution remains at 1LSB independent of the reference voltage. INL, offset, and full-scale errors vary with the reference voltage as indicated by the Typical Performance Characteristics graphs. These error terms will decrease with an increase in the reference voltage (as the LSB size in μV increases).Input Voltage RangeThe ADC is capable of digitizing true rail-to-rail input sig-nals. Ignoring offset and full-scale errors, the converter will theoretically output an “all zero” digital result when the input is at ground (a zero scale input) and an “all one” digital result when the input is at V CC (a full-scale input).The converter offset and gain error specifi cations ensure that all 65536 possible codes will be produced within this voltage range. In an under-range condition, for all input voltages less than the voltage corresponding to output code 0, the converter will generate the output code 0. In an over-range condition, for all input voltages greater than the voltage corresponding to output code 65535 the converter will generate the output code 65535.Output Data FormatThe L TC2450 generates a 16-bit direct binary encoded result. It is provided, MSB fi rst, as a 16-bit serial stream through the SDO output pin under the control of the SCK input pin (see Figure 3).Ease of UseThe L TC2450 data output has no latency, fi lter settling delay or redundant results associated with the conversion cycle. There is a one-to-one correspondence between the conver-sion and the output data. Therefore, multiplexing multiple analog input voltages requires no special actions.The L TC2450 performs offset and full-scale calibrations every conversion. This calibration is transparent to the user and has no effect upon the cyclic operation described previously. The advantage of continuous calibration is extreme stability of the ADC performance with respect to time and temperature.The L TC2450 includes a proprietary input sampling scheme that reduces the average input current several orders of magnitude as compared to traditional delta sigma archi-tectures. This allows external fi lter networks to interface directly to the L TC2450. Since the average input sampling current is 50nA, an external RC lowpass fi lter using a 1k Ω and 0.1μF results in <1LSB error .Reference Voltage RangeThe converter uses the power supply voltage (V CC ) as the positive reference voltage (see Figure 1). Thus, the refer-ence range is the same as the power supply range, which extends from 2.7V to 5.5V . The L TC2450’s internal noise level is extremely low so the output peak-to-peak noise remains well below 1LSB for any reference voltage withinFigure 3. Data Output TimingKQlSCKhSCK/92450fbDuring the data output operation the CS input pin must be pulled low (CS = LOW). The data output process starts with the most signifi cant bit of the result being present at the SDO output pin (SDO = D15) once CS goes low. A new data bit appears at the SDO output pin following every falling edge detected at the SCK input pin. The output data can be latched by the user using the rising edge of SCK. Conversion Status MonitorFor certain applications, the user may wish to monitor the L TC2450 conversion status. This can be achieved by holding SCK HIGH during the conversion cycle. In this condition, whenever the CS input pin is pulled low (CS = LOW), the SDO output pin will provide an indication of the conversion status. SDO = HIGH is an indication of a conversion cycle in progress while SDO = LOW is an indication of a completed conversion cycle. An example of such a sequence is shown in Figure 4.Conversion status monitoring, while possible, is not re-quired for L TC2450 as its conversion time is fi xed and equal at approximately 33.3ms (42ms maximum). Therefore, external timing can be used to determine the completion of a conversion cycle. SERIAL INTERFACEThe L TC2450 transmits the conversion result and receives the start of conversion command through a synchronous 3-wire interface. This interface can be used during theAPPLICATIONS INFORMATIONCONVE RT and SLE E P states to assess the conversion status and during the DATA OUTPUT state to read the conversion result, and to trigger a new conversion.Serial Interface Operation ModesThe following are a few of the more common interface operation examples. Many more valid control and serial data output operation sequences can be constructed based upon the above description of the function of the three digital interface pins.The modes of operation can be summarized as follows:1) The L TC2450 functions with SCK idle high (commonly known as CPOL = 1) or idle low (commonly known as CPOL = 0).2) After the 16th bit is read, the user can choose one of two ways to begin a new conversion. First, one can pull CS high (CS = ↑). Second, one can use a high-low transition on SCK (SCK = ↓).3) In a similar vein, at any time during the Data Output state, pulling CS high (CS = ↑) causes the part to leave the I/O state, abort the output and begin a new conver-sion.4) When SCK = HIGH, it is possible to monitor the conver-sion status by pulling CS low and watching for SDO to go low. This feature is available only in the idle-high (CPOL = 1) mode.Figure 4. Conversion Status Monitoring ModeSDOSCK = HICS/102450fbAPPLICATIONS INFORMATIONSerial Clock Idle-High (CPOL = 1) ExamplesIn Figure 5, following a conversion cycle the L TC2450 automatically enters the low power sleep mode. The user can monitor the conversion status at convenient intervals using CS and SDO.CS is pulled low to test whether or not the chip is in the CONVERT state. While in the CONVERT state, SDO is HIGH while CS is LOW . In the SLE E P state, SDO is LOW while CS is LOW . These tests are not required op-erational steps but may be useful for some applications.When the data is available, the user applies 16 clock cycles to transfer the result. The CS rising edge is then used to initiate a new conversion.The operation example of Figure 6 is identical to that of Figure 5, except the new conversion cycle is triggered bythe falling edge of the serial clock (SCK). A 17th clock pulse is used to trigger a new conversion cycle.Serial Clock Idle-Low (CPOL = 0) ExamplesIn Figure 7, following a conversion cycle the L TC2450 automatically enters the low power sleep state. The user determines data availability (and the end of conversion) based upon external timing. The user then pulls CS low (CS = ↓) and uses 16 clock cycles to transfer the result. Following the 16th rising edge of the clock, CS is pulled high (CS = ↑), which triggers a new conversion.The timing diagram in Figure 8 is identical to that of Figure 7, except in this case a new conversion is triggered by SCK. The 16th SCK falling edge triggers a new conversion cycle and the CS signal is subsequently pulled high.Figure 5. Idle-High (CPOL = 1) Serial Clock Operation Example.The Rising Edge of CS Starts a New ConversionFigure 6. Idle-High (CPOL = 1) Clock Operation Example.A 17th Clock Pulse is Used to Trigger a New Conversion Cycle/分销商库存信息:LINEAR-TECHNOLOGYLTC2450IDC#TRMPBF LTC2450CDC#TRMPBF LTC2450CDC#TRPBF LTC2450IDC#TRPBF DC1067A-B DC1067A-A。
LTC3538资料
13538fbTYPICAL APPLICATIONFEATURESAPPLICATIONSDESCRIPTIONThe L TC ®3538 is a highly effi cient, low noise, buck-boost DC/DC converter that operates from input voltages above, below, and equal to the output voltage. The topology incorporated in the IC provides a continuous transfer function through all operating modes, making the product ideal for single Lithium Ion or multicell Alkaline or NiMH applications where the output voltage is within the battery voltage range.The L TC3538 is suited for use in Micro Hard Disk Drive (μH DD) applications with its 800mA current capability. BurstMode ® operation provides high efficiency at light loads.The L TC3538 includes two 0.17Ω N-channel and two0.2Ω P-channel MOSFET switches. Operating frequency is internally set to 1MHz to minimize solution footprint while maximizing effi ciency. Other features include <5μA shutdown current, internal soft-start, short circuit protection and thermal shutdown. The L TC3538 is available in a low profi le (0.75mm), ther-mally enhanced 8-lead (2mm × 3mm) DFN package.Li-Ion/Polymer to 3.3V at 800mA■Regulated Output with Input Voltages Above, Below, or Equal to the Output■ 800mA Continuous Output Current from a Single Lithium-Ion/Polymer Cell ■ Single Inductor ■ 1.8V to 5.25V V OUT Range ■ 2.4V to 5.5V V INRange ■ 1MHz Fixed Frequency Operation ■ Output Disconnect in Shutdown■ 35μA Quiesecent Current in Burst Mode Operation ■ <5μA Shutdown Current ■ Internal Soft-Start■ Small, Thermally Enhanced 8-Lead (2mm x 3mm)DFN package■Miniature Hard Disk Drives ■ MP3 Players ■ Digital Cameras ■ Cellular H andsets ■ PDAs, Handheld PC ■ GPS ReceiversCorporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5481178, 6304066, 6580258, 6166527, 6404251.V IN2.9V TO 4.2VL1V OUT 3.3V 800mAOUTEffi ciency vs V INV IN (V)2.495853.94.93538 TA01b2.93.44.45.49080E F F I C I E N C Y (%)100Buck-BoostDC/DC Converter23538fbPIN CONFIGURATIONELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGSV IN ,V OUT Voltage ..........................................–0.3V to 6V SW1,SW2 Voltage DC ............................................................–0.3V to 6V Pulsed < 100ns ........................................–0.3V to 7V BURST , FB, VC Voltage .................................–0.3V to 6V Operating Temperature (Note 2)...............–40°C to 85°C Maximum Junction Temperature (Note 3).............125°C Storage Temperature Range ...................–65°C to 125°C(Note 1)PARAMETER CONDITIONSMIN TYP MAX UNITSInput Voltage ●2.4 5.5V Feedback Voltage (Note 4)●0.9801.00 1.020V Feedback Input Current(Note 4)150nA V IN Quiescent Current – Shutdown V C = 0V , Not Including Switch Leakage 1.55μA V IN Quiescent Current – Active FB = 0.8V1 1.8mA V IN Quiescent Current – Sleep FB = 1.2V , BURST = V IN 3560μA NMOS Switch Leakage Switches B and C 0.17μA PMOS Switch Leakage Switches A and D 0.110μA NMOS Switch On-Resistance Switches B and C 0.17ΩPMOS Switch On-Resistance Switches A and D0.2ΩInput Current Limit ● 1.42A Reverse Current Limit0.5A Burst Mode Operational Peak Current 0.9A Maximum Duty CycleBoost (%Switch C On)Buck (% Switch A On)Buck (% Switch D On)●●●7010010088%%%TOP VIEWV IN SW1SW2V OUTFB VC GND BURST DCB PACKAGE8-LEAD (2mm × 3mm) PLASTIC DFN934216578T JMAX = 125°CθJA = 75°C/W 4-LAYER BOARD, θJC = 13.5°C/WEXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCBThe ● denotes the specifi cations which apply over the full operatingtemperature range, otherwise specifi cations are at T A = 25°C. V IN = V OUT = 3.6V , BURST = 0V , unless otherwise noted.ORDER INFORMATIONLEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE L TC3538EDCB#PBF L TC3538EDCB#TRPBF LCRB 8-Lead (2mm × 3mm) Plastic DFN –40°C to 85°C LEAD BASED FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE L TC3538EDCBL TC3538EDCB#TRLCRB8-Lead (2mm × 3mm) Plastic DFN–40°C to 85°CConsult L TC Marketing for parts specifi ed with wider operating temperature ranges.For more information on lead free part marking, go to: http://www.linear .com/leadfree/ For more information on tape and reel specifi cations, go to: http://www.linear .com/tapeandreel/33538fbLOAD CURRENT (mA)0.111010010000.11101001000E F F I C I E N C Y (%)POWER LOSS (mW)10080604020090705030103538 G02LOAD CURRENT (mA)0.11101001000E F F I C I E N C Y (%)1008060402010907050303538 G01PARAMETER CONDITIONS MINTYP MAX UNITSMinimum Duty Cycle FB = 1.2V●0%Frequency Accuracy ●0.81 1.2MHz Internal Soft-Start Time 1.5ms Error Amp A VOL80dB Error Amp Source Current V C = 1.5V , FB = OV –13μA Error Amp Sink Current V C = 1.5V , FB = 1.2V 130μAV C Shutdown Threshold (Off)IC is Disabled ●0.25V V C Output Current in Shutdown V C = GND–1–3μA BURST Threshold (High)● 1.4V BURST Threshold (Low)●0.4V BURST Input CurrentV BURST = 3.6V 0.11μANote 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.Note 2: The L TC3538 is guaranteed to meet performance specifi cations from 0°C to 85°C. Specifi cations over –40°C to 85°C operatingtemperature range are assured by design, characterization and correlation with statistical process controls.Note 3: This IC includes over-temperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when over-temperature protection is active.Continuous operation above the specifi ed maximum operating junction temperature may result in device degradation or failure.Note 4: The IC is tested in a feedback loop to make the measurement.TYPICAL PERFORMANCE CHARACTERISTICSLi-Ion to 3.3V Effi ciencyEffi ciency and Power Loss vs Load CurrentSwitch Pins Before Entering Boost ModeELECTRICAL CHARACTERISTICSThe ● denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at T A = 25°C. V IN = V OUT = 3.6V , unless otherwise noted.T A = 25°C unless otherwise noted50ns/DIVSW12V/DIVSW22V/DIV3538 G03V IN = 2.9VV OUT = 3.3V AT 500mA43538fbError Amplifi er Source Current vs TemperatureOscillator Frequency vs TemperatureFeedback Voltage vs TemperatureFeedback Voltage Line RegulationMinimum Start-Up VoltageSwitch Pins Before Entering Buck ModeV OUT Ripple in Buck, Buck-Boost and Boost Modes at 500mA LoadBurst Mode Sleep Current vs TemperatureTYPICAL PERFORMANCE CHARACTERISTICST A = 25°C unless otherwise notedMaximum Output Current Capability vs VIN50ns/DIVSW12V/DIVSW22V/DIV3538 G04V IN = 3.9VV OUT = 3.3V AT 500mATEMPERATURE (°C)–5020B u r s t M o d e S L E E P C U R R E N T (μA )2530354045–25025503538 G1675100TEMPERATURE (°C)–50–15.0V C S O U R C E C U R R E N T (μA )–14.5–14.0–13.5–13.0–12.5–25025503538 G0675100TEMPERATURE (°C)–50975O S C I L L A T O R F R E Q U E N C Y (k H z )10001025–25025503538 G0775100TEMPERATURE (°C)–500.990F B V O L T AG E (V )1.0101.0051.0000.995–25025503538 G0875100V IN (V)2.02.53.03.54.05.04.50O U T P U T C U R R E N T C A P A B I L I T Y (m A )180016001400120010006004002008003538 G175.5V IN (V)2.4–0.2F B L I N E R EG U L A T I O N (%)0.40.20.10–0.10.3 3.44.43538 G095.4TEMPERATURE (°C)–502.30052.30102.30152.30202.30252.30302.30352.3040V I N S T A R T V O L T A G E (V )2.3045–25025503538 G10751001μs/DIV3538 G05V OUT = 3.3V , AC-COUPLED 20mV/DIV C OUT = 22μF I LOAD = 500mAV IN = 2.5VV IN = 3.3VV IN = 4.2V53538fbCurrent Limit vs TemperatureLoad T ransient in Fixed Frequency ModeBurst Mode OperationT ransition From Burst Mode Operation to Fixed FrequencyTYPICAL PERFORMANCE CHARACTERISTICST A = 25°C unless otherwise notedV C On/Off Threshold vs TemperatureTEMPERATURE (°C)–500.40V C O N /O F F T H R E S H O L D (V )0.800.750.700.650.600.550.500.450503538 G10100TEMPERATURE (°C)–501.5C U R R E N T L I M I T (A )2.02.53.04.03.5–25025503538 G1275100100μs/DIVV OUT 100mV/DIVI LOAD 200mA/DIV3538 G13V IN = 3.3V V OUT = 3.3VI LOAD = 0mA TO 500mAC OUT = 22μF X5R CERAMIC10μs/DIVV OUT 50mV/DIVI L500mA/DIV3538 G14V IN = 3.3V V OUT = 3.3V I LOAD= 10mAC OUT = 22μF X5R CERAMIC50μs/DIVV OUT 100mV/DIVBURST 2V/DIV3538 G15V IN = 3.3V V OUT = 3.3V I LOAD = 30mAC OUT = 22μF X5R CERAMICPIN FUNCTIONSFB (Pin 1): Feedback Input to Error Amplifer. Connect resistive divider tap from V OUT to this pin to set the output voltage. The output voltage can be adjusted from 1.8V to 5.25V. Referring to the Block Diagram the output voltage is given by:V OUT = 1V • (1 + R1/R2)V C (Pin 2): Error Amplifi er Output. A frequency compensa-tion network should be connected between this pin and FB to compensate the loop. See Closing the Feedback Loop section of the datasheet for further information. Pulling V C below 0.25V disables the L TC3538.GND (Pin 3): Ground.BURST (Pin 4): Burst Mode Select Input.BURST = Low for fi xed frequency PWM operation BURST = High for Burst Mode operationV OUT (Pin 5): Power Supply Output. This pin should be connected to a low ESR output capacitor. The capacitor should be placed as close to the IC as possible and should have a short return to GND.SW2 (Pin 6): Switch Pin where the Internal Switches C and D are Connected. An optional Schottky diode can be connected from SW2 to V OUT for a moderate effi ciency improvement. Keep the trace length as short as possible to minimize EMI.SW1 (Pin 7): Switch Pin where the Internal Switches A and B are Connected. Connect an inductor from SW1 to SW2. An optional Schottky diode can be connected from SW1 to ground for a moderate effi ciency improvement. Keep the trace length as short as possible to minimize EMI.V IN (Pin 8): Input Supply. This input provides power to the IC and also supplies current to switch A. A ceramic bypass capacitor (4.7μF or larger) is recommended as close to V IN and GND as possible.Exposed Pad (Pin 9): GND. The exposed pad must be electrically connected to the board ground for proper electrical and thermal performance.63538fbBLOCK DIAGRAMV IN2.4V TO 5.5V73538fbOPERATIONThe L TC3538 provides high effi ciency, low noise power for a wide variety of handheld electronic devices. The L TC proprietary topology allows input voltages above, below and equal to the output voltage through proper phasing of the four on-chip MOSFET switches. The error amplifi er output voltage on V C determines the output duty cycle of the switches. Since V C is a fi ltered signal, it provides rejection of frequencies from well below the switching frequency. The low R DS(ON), low gate charge synchronous switches provide high frequency pulse width modulation control at high effi ciency. High effi ciency is achieved at light loads when Burst Mode operation is selected.LOW NOISE FIXED FREQUENCY OPERATION Operating FrequencyThe operating frequency is internally fixed to 1MH z to maximize overall converter effi ciency while minimizing external component size.Error Amplifi erThe error amplifi er controls the duty cycle of the internal switches. The loop compensation components are con-figured around the amplifier to provide converter loop stability. Pulling down the output of the error amplifi er (V C) below 0.25V will disable the L TC3538. In shutdown the L TC3538 will draw only 1.5μA typical from the input supply. During normal operation the V C pin should be allowed to fl oat.Soft-StartThe converter has an internal voltage mode soft-start circuit with a nominal duration of 1.5ms. The converter remains in regulation during soft-start and will therefore respond to output load transients that occur during this time. In addition, the output voltage risetime has minimal dependency on the size of the output capacitor or load. During soft-start, the converter is forced into PWM operation regardless of the state of the BURST pin.Internal Current LimitThere are two current limit circuits in the L TC3538. The fi rst is a high speed peak current limit amplifi er that will shut off switch A once the input current exceeds ~ 3.5A typical. The delay to output of this amplifi er is typically 50ns. The second current limit sources current out of the FB pin to drop the output voltage once the input average current exceeds 2A typical. This method provides a closed loop means of clamping the input current. During conditions when V OUT is near ground, such as during a short circuit or during start-up, this threshold is cut to 1A typical, providing a foldback feature to limit power dissipation. For this current limit feature to be most effective, the Thevenin resistance (typically the parallel combination of R1 and R2) from FB to ground should be greater than 100k. Reverse Current LimitDuring fi xed frequency operation, the L TC3538 operates in forced continuous conduction mode. The reverse current limit comparator monitors the inductor current from the output through switch D. Should this negative inductor current exceed 500mA typical, the L TC3538 shuts off switch D.Four-Switch ControlV V3538 FO1Figure 1. Simplifi ed Diagram of Output Switches Figure 1 shows a simplifi ed diagram of how the four internal switches are connected to the inductor, V IN, V OUT and GND. Figure 2 shows the regions of operation for the L TC3538 as a function of the internal control voltage.83538fb93538fbOPERATIONDepending on the V C voltage, the L TC3538 will operate in either buck, buck-boost or boost mode. The four power switches are properly phased so the transfer between operating modes is continuous, smooth and transparent to the user . When V IN approaches V OUT the buck-boost region is entered, where the conduction time of the four-switch region is typically 150ns. Referring to Figures 1 and 2, the various regions of operation will now be described.Buck-Boost or Four Switch (V IN ~ V OUT )When the control voltage, V C , is above voltage V2, switch pair AD remains on for duty cycle D MAX_BUCK , and the switch pair AC begins to phase in. As switch pair AC phases in, switch pair BD phases out accordingly. When V C reaches the edge of the buck-boost range, at voltage V3, the AC switch pair completely phase out the BD pair , and the boost phase begins at duty cycle D4SW . The input voltage, V IN , where the four switch region begins is given by: V IN = V OUT (1 – D4SW ) ≈ 0.85 • V OUTThe point at which the four-switch region ends is given by:V IN =V OUT1−D4SWV ≈1.18•V OUTBoost Region (V IN < V OUT )Switch A is always on and switch B is always off during this mode. When the control voltage, V C , is above volt-age V3, switch pair CD will alternately switch to provide a boosted output voltage. This operation is typical to a synchronous boost regulator . The maximum duty cycle of the converter is limited to 88% typical and is reached when V C is above V4.Burst Mode OPERATIONBurst Mode operation reduces quiescent current consump-tion of the L TC3538 at light loads and improves overall conversion effi ciency, increasing battery life. During Burst Mode operation the L TC3538 delivers energy to the out-put until it is regulated and then goes into a sleep mode where the outputs are off and the quiescent current drops to 35μA. In this mode the output ripple has a variable frequency component that depends upon load current, and will typically be about 2% peak-to-peak. Burst Mode operation ripple can be reduced slightly by using more output capacitance. Another method of reducing Burst Mode operation ripple is to place a small feed-forward capacitor across the upper resistor in the V OUT feedback divider network (as in Type III compensation).D MIN BOOST D MAX BUCKD MAX BOOST0%88%DUTY CYCLEV3 (~1.8V)V2 (~1.7V)V4 (~2.2V)V1 (~1.2V)CONTROL VOL TAGE, V C Figure 2. Switch Control vs Control Voltage, V CBuck Region (V IN > V OUT )Switch D is always on and switch C is always off during this mode. When the control voltage, V C , is above volt-age V1, output A begins to switch. During the off time of switch A, synchronous switch B turns on for the remainder of the period. Switches A and B will alternate similar to a typical synchronous buck regulator . As the control volt-age increases, the duty cycle of switch A increases until the maximum duty cycle of the converter in buck mode reaches D MAX_BUCK , given by: D MAX_BUCK = 100 – D4SW %where D4SW = duty cycle % of the four switch range. D4SW = (150ns • f) • 100 %where f = operating frequency, Hz.Beyond this point the four switch, or buck-boost region is reached.103538fbDuring the period when the L TC3538 is delivering energy to the output, the peak inductor current will be equal to 800mA typical and the inductor current will terminate each cycle at zero current. In Burst Mode operation the maximum average output current that can be delivered while maintaining output regulation is given by: I OUT _BURST(BOOST)=0.25•V INV OUTA; V OUT >V IN I OUT _BURST(BUCK)=0.27A; V OUT <V INThe maximum average Burst Mode output current that can be delivered in the four-switch buck-boost region is limited to the boost equation specifi ed above.INDUCTOR SELECTIONTo achieve high effi ciency, a low ESR inductor should be utilized for the converter . The inductor must have a satura-tion rating greater than the worst case average inductor current plus half the ripple current. The peak-to-peak cur-rent ripple will be larger in buck and boost mode than in the buck-boost region. The peak-to-peak inductor current ripple for each mode can be calculated from the following formulas, where f is the frequency (1MHz typical) and L is the inductance in μH. ΔI L,P-P,BUCK =V OUT •V IN –V OUT ()/V IN f •LAΔI L,P-P,BOOST =V OUT •V OUT –V IN ()/V OUTf •LAwhere f = frequency (1MHz typical), HzL = inductor , HOPERATIONIn addition to affecting output current ripple, the size of the inductor can also affect the stability of the feedback loop. In boost mode, the converter transfer function has a right half plane zero at a frequency that is inversely proportional to the value of the inductor . As a result, a large inductor can move this zero to a frequency low enough to degrade the phase margin of the feedback loop. It is recommended that the inductor value be chosen less than 10μH.For high effi ciency, choose a ferrite inductor with a high frequency core material to reduce core loses. The induc-tor should have low ESR (equivalent series resistance) to reduce the I 2R losses, and must be able to handle the peak inductor current without saturating. Molded chokes or chip inductors usually do not have enough core to support the peak inductor currents in the 1A to 2A region. To minimize radiated noise, use a shielded inductor . See Table 1 for a suggested list of inductor suppliers.Output Capacitor SelectionThe bulk value of the output fi lter capacitor is selected to reduce the ripple due to charge into the capacitor each cycle. The steady state ripple due to charge is given by: ΔV P-P , BOOST = I LOAD • (V OUT – V IN )/(C OUT • V OUT • f)V ΔV P-P ,BUCK = (V IN – V OUT ) • V OUT /(8 • L • V IN • C OUT • f 2)V where C OUT = output fi lter capacitor , F I LOAD = Output load current, ASUPPLIER PHONE FAXWEB SITE Coilcraft (847) 639-6400(847) CoEv Magnetics (800) 227-7040(650) Murata (814) 237-1431(800) 831-9172(814) Sumida USA: (847) 956-0666Japan: 81 (3) 3607-5111USA: (847) 956-0702Japan: 81(3) TDK (847) 803-6100(847) TOKO(847) 297-0070(847) 699-7864Table 1. Inductor Vendor Information113538fbSince the output current is discontinuous in boost mode, the ripple in this mode will generally be much larger than the magnitude of the ripple in buck mode.Minimizing solution size is usually a priority. Please be aware that ceramic capacitors can exhibit a signifi cant reduction in effective capacitance when a bias is applied. The capacitors exhibiting the highest reduction are those packaged in the smallest case size.Input Capacitor SelectionSince V IN is the supply voltage for the IC it is recommended to place at least a 4.7μF , low ESR ceramic bypass capaci-tor close to V IN and GND. It is also important to minimize any stray resistance from the converter to the battery or other power source.Optional Schottky DiodesSchottky diodes across the synchronous switches B and D are not required, but do provide a lower drop during the break-before-make time (typically 15ns), thus improving effi ciency. Use a surface mount Schottky diode such as an MBRM120T3 or equivalent. Do not use ordinary rectifi er diodes since their slow recovery times will compromise effi ciency.Table 2. Capacitor Vendor InformationSUPPLIER PHONE FAXWEB SITEAVX (803) 448-9411(803) Sanyo (619) 661-6322(619) Taiyo Yuden (408) 573-4150(408) TDK(847) 803-6100(847) Shutdown MOSFET SelectionA discrete external N-channel MOSFET , open-drain pull-down device or other suitable means can be used to put the part in shutdown by pulling V C below 0.25V . Since the error amplifi er sources 13μA typically when active and 1.5μA in shutdown, a relatively high resistance pull-down device can be used to pull V C below 0.25V . MoreOPERATIONimportantly, leakage and parasitic capacitance need to be minimized. During start-up, 1.5μA is typically sourced from V C . The leakage of an external pull-down device and compensation components tied to V C , must therefore be minimized to ensure proper start-up. Capacitance from the pull-down device should also be minimized as it can affect converter stability. An N-channel MOSFET such as the FDV301N or similar is recommended if an external discrete N-channel MOSFET is needed.PCB Layout ConsiderationsThe L TC3538 switches large currents at high frequencies. Special care should be given to the PCB layout to ensure stable, noise-free operation. Figure 3 depicts the recom-mended PCB layout to be utilized for the L TC3538. A few key guidelines follow:1. All circulating current paths should be kept as short as possible. This can be accomplished by keeping the routes to all components (except the FB divider network) in Figure 3 as short and as wide as possible. Capacitor ground connections should via down to the ground plane in the shortest route possible. The bypass capacitor on V IN should be placed as close to the IC as possible and should have the shortest possible paths to ground.2. The small signal ground pad (GND) should have a single point connection to the power ground. A convenient way to achieve this is to short this pin directly to the Exposed Pad as shown in Figure3.3. The components in bold and their connections should all be placed over a complete ground plane.4. To prevent large circulating currents from disrupting the output voltage sensing, the ground for the resistor divider should be returned directly to the small signal ground (GND) as shown.5. Use of vias in the attach pad will enhance the thermal environment of the converter especially if the vias extend to a ground plane region on the exposed bottom surface of the PCB.123538fbClosing the Feedback LoopThe L TC3538 incorporates voltage mode PWM control. The control to output gain varies with operation region (buck, boost, buck-boost), but is usually no greater than 15. The output fi lter exhibits a double pole response, as given by: ƒFILTER _POLE(in buck mode)ƒFILTER _POLE(in boost mode)where L is in Henries and C OUT is in Farads.The output fi lter zero is given by:ƒFILTER _ZERO=12•π•R ESR •C OUT Hz where R ESR is the equivalent series resistance of the output capacitor .A troublesome feature in boost mode is the right-half plane zero (RHP), given by:ƒRHPZ =V IN 22•π•I OUT •L •V OUTHzThe loop gain is typically rolled off before the RHP zero frequency.A simple Type I compensation network can be incorporated to stabilize the loop, but at a cost of reduced bandwidth and slower transient response. To ensure proper phase margin using Type I compensation, the loop must be crossed over a decade before the LC double pole. Referring to Figure 4, the unity-gain frequency of the error amplifi er with the Type I compensation is given by:ƒUG =12•π•R1•C P1Hz–+Figure 4. Error Amplifi er with Type I CompensationFigure 3. L TC3538 Recommended PCB LayoutOPERATION133538fbC Z1Figure 5. Error Amplifi er with Type III CompensationOPERATIONMost applications demand an improved transient response to allow a smaller output fi lter capacitor . To achieve a higher bandwidth, Type III compensation is required, providing two zeros to compensate for the double-pole response of the output fi lter . Referring to Figure 5, the location of the poles and zeros are given by:ƒPOLE1≅12•π•32e 3•R1•C P1Hz (which is extremly close to DC)ƒZERO1=12•π•R Z •C P1HzƒZERO2=12•π•R1•C Z1HzƒPOLE2=12•π•R Z •C P2Hzwhere resistance is in Ohms and capacitance is in Farads.143538fbIN C OUT : TAIYO YUDEN JMK325BJ226MM L1: SUMIDA CDRH2D18/HP-3R3NCM1:μP OPEN DRAIN I/O OR FAIRCHILD FDV301NUSB4.35V TO5.25VL1V OUT5V , 500mAOUT TYPICAL APPLICATIONHigh Effi ciency 5V/500mA from USB Input153538fbInformation furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa-tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.PACKAGE DESCRIPTIONNOTE:1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE2. D RAWING NOT TO SCALE3. ALL DIMENSIONS ARE IN MILLIMETERS4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDEMOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGEBOTTOM VIEW—EXPOSED PADRECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDEREDDCB Package8-Lead Plastic DFN (2mm × 3mm)(Reference L TC DWG # 05-08-1718 Rev A)163538fbLinear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear .com© LINEAR TECHNOLOGY CORPORA TION 2007LT 1007 REV B • PRINTED IN USARELATED PARTSPART NUMBER DESCRIPTIONCOMMENTSL TC3407600mA (I OUT ), 1.5MHz Dual Synchronous Step-Up DC/DC ConverterV IN : 2.5V to 5.5V , V OUT(MIN) = 0.8V I Q = 40μA, I SD ≤1μA, SC70 PackageL TC3410300mA (I SW ), 2.25MHz Synchronous Step-Down DC/DC Converter in SC70V IN : 2.5V to 5.5V , V OUT(MIN) = 0.8VI Q = 26μA, I SD ≤1μA, MS Package L TC3411 1.25A (I OUT ), 4MHz Synchronous Step-Down DC/DC Converter V IN : 2.625V to 5.5V , V OUT(MIN) = 0.8V I Q = 62μA, I SD ≤1μA, MS Package L TC3412 2.5A (I OUT ), 4MHz Synchronous Step-Down DC/DC Converter V IN : 2.625V to 5.5V , V OUT(MIN) = 0.8V I Q = 62μA, I SD ≤1μA, TSSOP16E Package L TC34213A (I SW ), 3MHz Synchronous Step-Up DC/DC Converter V IN : 0.5V to 4.5V , V OUT(MAX) = 5.25V I Q = 12μA, I SD <1μA, QFN Package L TC3422 1.5A (I SW ), 3MHz Synchronous Step-Up DC/DC Converter with Output DisconnectV IN : 0.5V to 4.5V , V OUT(MAX) = 5.25V I Q = 25μA, I SD <1μA, DFN Package L TC34255A (I SW ), 8MHz Multiphase Synchronous Step-Up DC/DC Converter V IN : 0.5V to 4.5V , V OUT(MAX) = 5.25V I Q = 12μA, I SD <1μA, QFN Package L TC3427500mA (I SW ), 1.25MHz Step-Up DC/DC Converter with Output Disconnect in 2mm × 2mm DFNV IN : 1.8V to 5V , V OUT(MAX) = 5.25V ,I Q = 350μA, I SD <1μA, DFN Package L TC3429600mA (I SW ), 500KHz Synchronous Step-Up DC/DC Converter V IN : 0.5V to 4.4V , V OUT(MAX) = 5VI Q = 20μA, I SD <1μA, ThinSOT™ Package L TC3440600mA (I OUT ), 2MHz Synchronous Buck-Boost DC/DC ConverterV IN : 2.5V to 5.5V , V OUT : 2.5V to 5.5V I Q = 25μA, I SD <1μA, MS, DFN PackageL TC3441/L TC3443 1.2A (I OUT ), Synchronous Buck-Boost DC/DC Converters, L TC3441(1MHz), L TC3443 (600kHz)V IN : 2.5V to 5.5V , V OUT : 2.4V to 5.25V I Q = 25μA, I SD <1μA, DFN Package L TC3442 1.2A (I OUT ), 2MHz Synchronous Buck-Boost DC/DC Converter V IN : 2.4V to 5.5V , V OUT : 2.4V to 5.25V I Q = 28μA, I SD <1μA, MS PackageL TC3522400mA, Synchronous Buck-Boost and 200mA Buck Converters V IN : 2.4V to 5.5V , V OUT Buck-Boost: 2.2V to 5.25V , I Q = 25μA, I SD <1μA, DFN Package L TC3525400mA (I SW ), Synchronous Step-Up DC/DC Converter with Output DisconnectV IN : 0.5V to 4.5V , V OUT = 3, 3.3, 5V I Q = 7μA, I SD <1μA, SC70 Package L TC3526/L TC3526B 500mA (I SW ), 1MHz Synchronous Step-Up DC/DC Converter with Output Disconnect in 2mm × 2mm DFNV IN : 0.5V to 4.5V , V OUT : 1.6V to 5.25V I Q = 9μA, I SD <1μA, DFN Package L TC3530600mA (I OUT ), 2MHz Synchronous Buck-Boost DC/DC Converter V IN : 1.8V to 5.5V , V OUT : 1.6V to 5.25V I Q = 40μA, I SD <1μA, DFN, MS Packages L TC3531200mA (I OUT ) Synchronous Buck-Boost DC/DC Converter V IN : 1.8V to 5.5V , V OUT : 2V to 5VI Q = 16μA, I SD <1μA, DFN, ThinSOT Packages L TC3532500mA (I OUT ), 2MHz Synchronous Buck-Boost DC/DC Converter V IN : 2.4V to 5.5V , V OUT : 2.2V to 5.25V I Q = 35μA, I SD <1μA, DFN, MS Packages L TC35332A (I OUT ), 2MHz Synchronous Buck-Boost DC/DC ConverterV IN : 1.8V to 5.5V , V OUT : 1.6V to 5.25V I Q = 40μA, I SD <1μA, DFN PackageThinSOT is a trademark of Linear Technology Corporation.。
PL3539
应用:
图 1 典型的恒流/恒压波形 • • • • • 手机/无绳电话充电器 数码相机充电器 小功率电源适配器 LED 驱动 消费类的备用电源
管脚分布图:
V1.0 © 2011
1
Datasheet
1 概述
PL3539
PL3539是款恒流/恒压原边控制的高性能离线反 激式开关电源,其外部仅需少量元件。其内部集 成了包括功率 MOSFET 以及原边控制模块等高 压功率调节器。 PL3539适用于小于5W的AC/DC应用场合。其无 需光耦以及次级控制电路就能实现高精度的恒流 /恒压功能。系统稳态时也无需额外的补偿电路, 从而能够得到精准的电压/电流控制。 PL3539 的复合模式的应用使得芯片能够实现低
5
Datasheet
9 典型应用
PL3539
应用说明:
PL3539 为小功率的适配器/充电器应用提供了很 有效的解决方案, 其新颖的恒流/恒压控制使得系 统不需要次级反馈电路, 并能实现高精度的恒流/ 恒压输出,从而满足更严格的能源损耗要求。
I Spk =
NP • I Ppk NS
(1)
IPpk 为功率管关闭后的原边峰值电流。
9.4 可编程恒流点及输出功率
在小于 5W 的应用中, CS 端不同的采样电阻会 得到不同的恒流点。输出功率的大小可通过调节 CS 端的采样电阻实现,采样电阻越大,恒流点 越小,同时输出功率也越小。
9.6 可编程的输出线补偿
由原边反馈原理可知,输出电压通过辅助绕组采 样得到,这样会影响恒压的精度,为提高负载调 节率,芯片内置了输出线补偿电路,那么系统在 空载和满载状态时,输出电压可保持恒定。 不同的应用中,通过调节连接于 FB 端的分压电 阻可得到不同的线补偿量, FB 端的分压电阻越 大,那么补偿量也越大。
LTC2055HVIDD#PBF资料
LBCW LBCX LBCW LBCX LBCW LBCX
LTC2055CMS8 LTC2055HVCMS8 LTC2055IMS8 LTC2055HVIMS8 LTC2055HMS8 LTC2055HVHMS8
LTBCR LTBCT LTBCR LTBCT LTBCR LTBCT
*The temperature grade (C, I or H) is indicated on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges.
The LTC2054/LTC2055, despite their miniature size, feature uncompromising DC performance. The typical input offset voltage and offset drift are 0.5µV and 25nV/°C. The almost zero DC offset and drift are supported with a power supply rejection ratio (PSRR) and common mode rejection ratio (CMRR) of more than 130dB.
ELECTRICAL CHARACTERISTICS (LTC2054/LTC2055, LTC2054HV/LTC2055HV) The ● denotes the
specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 3V, 5V unless otherwise noted. (Note 3)
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13539fT YPICAL APPLICATIONF EATURESA PPLICATIONSD ESCRIPTION Synchronous Step-Up DC/DC ConvertersThe L TC ®3539/L TC3539-2 are synchronous, 2A step-upDC/DC converters with output disconnect. Synchronous rectifi cation enables high effi ciency in the low profi le 2mm × 3mm DFN package. Battery life is extended with a 700mV start-up voltage and operation down to 500mV once started.A switching frequency of 1MHz (L TC3539) or 2MHz (L TC3539-2) minimizes solution footprint by allowing the use of tiny, low profi le inductors and ceramic capacitors. The current mode PWM design is internally compensated, reducing external parts count. The L TC3539/L TC3539-2 feature a pin-enabled automatic Burst Mode operation at light load conditions. Anti-ring circuitry reduces EMI by damping the inductor in discontinuous mode. Additional features include a low shutdown current of under 1μA and thermal overload protection.The L TC3539/L TC3539-2 are offered in a 2mm × 3mm × 0.75mm DFN package.Wide V IN , High Power 3.3V RegulatornDelivers 3.3V at 900mA From 2 Alkaline/NiMH Cells n Delivers 5V at 900mA From a Lithium-Polymer Batteryn V INStart-Up Voltage: 700mV n 1.5V to 5.25V V OUT Range n Up to 94% Effi ciency n V IN > V OUT Operationn 1MHz (L TC3539) or 2MHz (L TC3539-2) Fixed Frequency Operation n Output Disconnectn Selectable Burst Mode ® or PWM Operation n 10μA Quiescent Currentn Logic Controlled Shutdown: <1μA n Requires Only 6 External Components n Low Profi le (2mm × 3mm × 0.75mm) DFN PackagenMedical Instrumentsn Portable Bar Code Scanners n Noise Canceling Headphones n Portable GPS Navigation n Handheld PCsL , L T , L TC, L TM and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.I LOAD AVERAGE (mA)0.111010010000.11101001000E F F I C I E N C Y (%)POWER LOSS (mW)10080604020090705030103539 TA01bEffi ciency and Power Loss vsLoad CurrentV OUT 3.3V 600mA V23539fP IN CONFIGURATIONA BSOLUTE MAXIMUM RATINGS V IN Voltage ...................................................–0.3V to 6V SW Voltage DC ............................................................–0.3V to 6V Pulsed <100ns .........................................–0.3V to 7V SHDN , FB, MODE Voltage ............................–0.3V to 6V V OUT .............................................................–0.3V to 6V Operating Temperature (Notes 2, 5) .........–40°C to 85°C Storage Temperature Range ...................–65°C to 125°C(Note 1)TOP VIEWV OUT MODE FB SHDNSW PGND GND V IN DCB PACKAGE8-LEAD (2mm s 3mm) PLASTIC DFN934216578T JMAX = 125°C, θJA = 60°C/W TO 85°C/W (NOTE 6)EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCBORDER INFORMATIONE LECTRICAL CHARACTERISTICS PARAMETER CONDITIONS MIN TYP MAX UNITSInput Voltage Range After Start-Up 0.55V Minimum Start-Up Voltage I LOAD = 1mA, V OUT = 0V0.70.88V Output Voltage Adjust Range l 1.5 5.25V Feedback Voltage l1.1701.200 1.230V Feedback Input Current V FB = 1.2V150nA Quiescent Current - Shutdown V SHDN = 0V , Not Including Switch Leakage, V OUT = 0V 0.011μA Quiescent Current - Active Measured on V OUT , Non-Switching 300500μA Quiescent Current - BurstMeasured on V OUT , FB >1.230V 1018μA N-Channel MOSFET Switch Leakage Current V SW = 5V0.110μA P-Channel MOSFET Switch Leakage Current V SW = 5V , V OUT = 0V 0.120μA N-Channel MOSFET Switch On Resistance V OUT = 3.3V 0.09ΩP-Channel MOSFET Switch On Resistance V OUT = 3.3V0.125ΩN-Channel MOSFET Current Limitl22.6AThe l denotes the specifi cations which apply over the specifi edtemperature range of –40°C to 85°C, otherwise specifi cations are at T A = 25°C. V IN = 1.2V , V OUT = 3.3V , unless otherwise noted.LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE L TC3539EDCB#PBF L TC3539EDCB#TRPBF LDCS 8-Lead (2mm × 3mm) Plastic DFN –40°C to 85°C L TC3539EDCB-2#PBFL TC3539EDCB-2#TRPBFLDPH8-Lead (2mm × 3mm) Plastic DFN–40°C to 85°CConsult L TC Marketing for parts specifi ed with wider operating temperature ranges.Consult L TC Marketing for information on non-standard lead based fi nish parts.For more information on lead free part marking, go to: http://www.linear .com/leadfree/ For more information on tape and reel specifi cations, go to: http://www.linear .com/tapeandreel/33539fE LECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.Note 2: The L TC3539E/L TC3539E-2 is guaranteed to meet performance specifi cations from 0°C to 85°C. Specifi cations over –40°C to 85°Coperating temperature range are assured by design, characterization and correlation with statistical process controls.Note 3: Specifi cation is guaranteed by design and not 100% tested in production.PARAMETER CONDITIONS MIN TYP MAXUNITSMaximum Duty Cycle V FB = 1.15V l 8790%Minimum Duty Cycle V FB = 1.3V l 0%Switching Frequency L TC3539L TC3539-2l l0.71.8121.32.4MHz MHz MODE Input High Voltage 0.88V MODE Input Low Voltage 0.3V MODE Input Current V MODE = 1.2V0.31μA SHDN Input High Voltage 0.88V SHDN Input Low Voltage 0.3V SHDN Input CurrentV SHDN = 1.2VV SHDN = 3.3V0.3112μA μAThe l denotes the specifi cations which apply over the specifi edtemperature range of –40°C to 85°C, otherwise specifi cations are at T A = 25°C. V IN = 1.2V , V OUT = 3.3V , unless otherwise noted.Note 4: Current measurements are made when the output is not switching.Note 5: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specifi ed maximum operating junction temperature may result in device degradation or failure.Note 6: Failure to solder the exposed backside of the package to the PC board ground plane will result in a thermal resistance much higher than 60°C/W .43539fV IN (V)I O U T (m A )20002001800140010006001600120080040003539 G050.5 1.5 2.51.0 2.0 3.5 5.04.53.0 4.0V IN (V)I I N (μA )10010907050308060402003539 G040.51.52.51.02.03.54.53.04.0T YPICAL PERFORMANCE CHARACTERISTICS Effi ciency vs Load Current andV IN , V OUT = 1.8VEffi ciency vs Load Current and V IN , V OUT = 3.3VEffi ciency vs Load Current and V IN , V OUT = 5VNo Load Input Current vs V INMaximum Output Current vs V INLOAD CURRENT (mA)E F F I C I E N C Y (%)1001090705030806040200POWER LOSS (mW)10001001010.10.013539 G010.11001000101LOAD CURRENT (mA)E F F I C I E N C Y (%)10010907050308060402003539 G020.110010001010.11101001000POWER LOSS (mW)0.11101001000POWER LOSS (mW)LOAD CURRENT (mA)E F F I C I E N C Y (%)10010907050308060402003539 G030.11001000101Minimum Load Resistance During Start-Up vs V INBurst Mode Threshold Current vs V IN and V OUT0.650.851.050.750.95 1.15V IN(V)L O A D R E S I S T A N C E (Ω)3539 G06100001000100100.1INPUT VOL TAGE (V)O U T P U T C U R R E N T (m A )60503010402003539 G110.501.52.51.0 2.03.54.53.04.0 (T A = 25°C unless otherwise noted)Normalized Current Limit vs V OUTV OUT (V)N O R M A L I Z E D C U R R E N T LI M I T (A )1.101.050.950.851.000.900.803539 G161.01.52.52.03.5 5.04.53.0 4.053539fTEMPERATURE (°C)V I N (V )0.800.750.650.550.700.600.503539 G10–500–25501002575TEMPERATURE (°C)C H A N G E I N V F B (%)0.500.25–0.25–0.750–0.50–1.003539 G09–60–20–40401008020060V OUT (V)R D S (O N ) (Ω)0.300.250.150.050.200.1003539 G071.52.52.03.5 5.55.04.53.0 4.0TEMPERATURE (°C)N O R M A L I Z E D R D S (O N ) (Ω)1.31.21.00.81.10.90.73539 G08–50–10–303090701050TYPICAL PERFORMANCE CHARACTERISTICSR DS(ON) vs V OUTR DS(ON) Change vs TemperatureV FB vs TemperatureStart-Up Voltage vs TemperatureFixed Frequency SW and I L(AC)Burst Mode SW and I L(AC)Load Step, Fixed Frequency Load Step, Burst Mode Operation500ns/DIVV IN = 2.4VV OUT = 3.3V AT 400mA COUT = 22μFV OUT 20mV/DIV AC-COUPLED INDUCTOR CURRENT 500mA/DIVSW PIN 2V/DIV 3539 G12500μs/DIVV IN = 2.4V V OUT = 3.3V C OUT = 22μFI LOAD = 100mA TO 250mA STEPV OUT 50mV/DIV AC-COUPLED LOAD CURRENT 200mA/DIV3539 G145μs/DIVV IN = 3.3V V OUT = 5V C OUT = 22μFV OUT 20mV/DIV AC-COUPLED INDUCTOR CURRENT 200mA/DIVSW PIN 5V/DIV 3539 G13500μs/DIVV IN = 2.4V V OUT = 3.3V C OUT = 22μFI LOAD = 20mA TO 170mAV OUT 50mV/DIV AC-COUPLED LOAD CURRENT 200mA/DIV3539 G1563539fB LOCK DIAGRAMP IN FUNCTIONS SW (Pin 1): Switch Pin. Connect inductor between SW and V IN . Keep PCB trace lengths as short and wide as pos-sible to reduce EMI. If the inductor current falls to zero, or SHDN is low, an internal anti-ring resistor is connected from SW to V IN to minimize EMI.PGND (Pin 2), GND (Pin 3): Signal and Power Ground. Provide a short direct PCB path between PGND, GND and the (–) side of the input and output capacitors.V IN (Pin 4): Battery Input Voltage. Connect a minimum of 2.2μF ceramic decoupling capacitor from this pin to ground.SHDN (Pin 5): Logic Controlled Shutdown Input. There is an internal 4MΩ pull-down on this pin. SHDN = High: Normal operation.SHDN = Low: Shutdown, quiescent current <1μA.FB (Pin 6): Feedback Input to the g m Error Amplifier . Con-nect resistor divider tap to this pin. The output voltage can be adjusted from 1.5V to 5.25V by: V OUT = 1.20V • [1 + (R2/R1)]MODE (Pin 7): Burst Mode Pin. A logic controlled input to select either automatic Burst Mode operation or forced fi xed frequency operation.MODE = High: Burst Mode operation at light loads MODE = Low: Fixed frequency PWM ModeV OUT (Pin 8): Output Voltage Sense and Drain of the Internal Synchronous Rectifi er . PCB trace length fromV OUT to the output filter capacitor should be as short and wide as possible.Exposed Pad (Pin 9): The exposed pad must be soldered to the PCB ground plane. It serves as another ground connection, and as a means of conducting heat away from the die.BURSTPWM ON OFFO PERATIONDETAILED DESCRIPTIONThe L TC3539 is a high power synchronous boost converter in an 8-lead 2mm × 3mm DFN package. With the ability to start up and operate from inputs of 700mV, the device features fi xed frequency, current mode PWM control for exceptional line and load regulation. The current mode architecture with adaptive slope compensation provides excellent transient load response, requiring minimal output fi ltering. Internal soft-start and internal loop compensa-tion simplifi es the design process while minimizing the number of external components. The switching frequency of the L TC3539 is nominally 1MHz, while the L TC3539-2 switches at 2MHz. Operation of the L TC3539 and L TC3539-2 is identical in all other respects.With its low R DS(ON) and low gate charge internal N-chan-nel MOSFET switch and P-channel MOSFET synchronous rectifi er, the L TC3539 achieves high effi ciency over a wide range of load current. Burst Mode operation maintains high effi ciency at very light loads, reducing the quiescent current to just 10μA.Converter operation can be best understood by referring to the Block Diagram.Low Voltage Start-UpThe L TC3539 includes an independent start-up oscillator designed to start up at an input voltage of 0.7V (typical). Soft-start and inrush current limiting are provided during start-up, as well as normal mode.When either V IN or V OUT exceeds 1.4V typical, the IC enters normal operating mode. Once the output voltage exceeds the input by 0.24V, the IC powers itself from V OUT instead of V IN. At this point the internal circuitry has no dependency on the V IN input voltage, eliminating the requirement for a large input capacitor. The input voltage can drop as low as 0.5V. The limiting factor for the appli-cation becomes the ability of the power source to supply suffi cient energy to the output at the low voltages, and the maximum duty cycle, which is clamped at 90% typical. Note that at low input voltages, small voltage drops due to series resistance become critical, and greatly limit the power delivery capability of the converter.Low Noise Fixed Frequency OperationSoft-Start: The LTC3539/LTC3539-2 contains internal circuitry to provide soft-start operation. The internal soft-start circuitry ramps the peak inductor current from zero to its peak value of 2.6A (typical) in approximately 0.5ms, allowing start-up into heavy loads. The soft-start circuitry is reset in the event of a thermal shutdown or shutdown command.Oscillator: An internal oscillator sets the switching frequency to 1MHz for the L TC3539, and 2MHz for the L TC3539-2.Shutdown: The part is shutdown by pulling the SHDN pin below 0.3V, and activated by pulling the SHDN pin above 0.88V. Note that SHDN can be driven above V IN or V OUT, as long as it is limited to less than the absolute maximum rating.Error Amplifi er: The error amplifi er is a transconductance type. The non-inverting input is internally connected to the 1.2V reference and the inverting input is connected to FB. Clamps limit the minimum and maximum error amp output voltage for improved large signal transient response. Power converter control loop compensation is provided internally. A voltage divider from V OUT to ground programs the output voltage via FB from 1.5V to 5.25V. V OUT = 1.2V • [1 + (R2/R1)].Current Sensing: Lossless current sensing converts the peak current signal of the N-channel MOSFET switch into a voltage which is summed with the internal slope compensation. The summed signal is compared to the error amplifi er output to provide a peak current control command for the PWM.Current Limit: The current limit comparator shuts off the N-channel MOSFET switch once its threshold is reached. Peak switch current is limited to approximately 2.6A, independent of input or output voltage, unless V OUT falls below 0.7V, in which case the current limit is cut in half.73539fO PERATIONZero Current Comparator: The zero current comparator monitors the inductor current to the output and shuts off the synchronous rectifi er once this current reduces to ap-proximately 40mA. This prevents the inductor current from reversing in polarity, improving effi ciency at light loads. Synchronous Rectifi er: The P-channel MOSFET synchro-nous rectifi er is disabled when V OUT is much less than V IN. This is to control inrush current and to prevent inductor current from running awayAnti-ringing Control: The anti-ringing control connects a resistor across the inductor to prevent high frequency ringing on the SW pin during discontinuous current mode operation. The ringing of the resonant circuit formed by L and C SW (capacitance on SW pin) is low energy, but can cause EMI radiation.Output Disconnect: The L TC3539 is designed to allow true output disconnect by eliminating body diode conduction of the internal P-channel MOSFET rectifi er. This allows V OUT to go to zero volts during shutdown, drawing no current from the input source. It also provides inrush current limiting at turn-on, minimizing surge currents seen by the input supply. Note that to obtain the advantages of output disconnect, there must not be an external Schottky diode connected between the SW pin and V OUT. The output disconnect feature also allows V OUT to be pulled high, without any reverse current into a battery on V IN. Thermal Shutdown: If the die temperature exceeds 160°C, the device will go into thermal shutdown. All switches will be turned off and the internal soft-start capacitor will be discharged. The device will be enabled again when the die temperature drops by about 15°C.Burst Mode OperationWhen Burst Mode operation is enabled by bringing the MODE pin above 0.88V, the L TC3539 will automatically enter Burst Mode operation at light load current, then return to fi xed frequency PWM mode when the load in-creases. Refer to the typical performance characteristics to see the output load Burst Mode threshold vs V IN. The load current at which Burst Mode operation is entered can be changed by adjusting the inductor value. Raising the inductor value will lower the load current at which Burst Mode operation is entered.In Burst Mode operation, the L TC3539 still switches at a fi xed frequency, using the same error amplifi er and loop compensation for peak current mode control. This control method eliminates any output transient when switching between modes. In Burst Mode operation, energy is deliv-ered to the output until it reaches the nominal regulation value, then the L TC3539 transitions to Sleep mode where the outputs are off and the L TC3539 consumes only 10μA of quiescent current from V OUT. When the output voltage droops slightly, switching resumes. This maximizes ef-fi ciency at very light loads by minimizing switching and quiescent current losses. Burst Mode output voltage ripple, which is typically 1% peak to peak, can be reduced by using more output capacitance (47μF or greater).As the load increases, the L TC3539 will automatically leave Burst Mode operation. Once the L TC3539 has left Burst Mode operation and returned to normal operation, it will remain there until the output load is reduced below the burst threshold.Burst Mode operation is inhibited during start-up until soft-start is complete and V OUT is at least 0.24V greater than V IN.When the MODE pin is below 0.3V, the L TC3539 features continuous PWM operation. In this mode, at very light loads, the L TC3539 will exhibit pulse-skip operation. If the MODE pin voltage exceeds the greater of V IN or V OUT by 0.5V, the MODE pin will sink additional current.83539f93539fA PPLICATIONS INFORMATION V IN > V OUT OperationThe LTC3539 will maintain output voltage regulation even when the input voltage is above the desired output. Note that the effi ciency and the maximum output current capability are reduced. Refer to Typical Performance Characteristics.Short-Circuit ProtectionThe L TC3539 output disconnect feature allows an output short circuit while maintaining a maximum internally set current limit. To reduce power dissipation under short-circuit conditions, the peak switch current limit is reduced to 1.4A (typical).Schottky DiodeAlthough it is not required, adding a Schottky diode fromSW to V OUT will improve efficiency by about 2%. Note that this defeats the output disconnect, V IN > V OUT operation and short circuit protection features.PCB LAYOUT GUIDELINESThe high speed operation of the L TC3539 demands careful attention to board layout. A careless layout will result in reduced performance. Figure 1 shows the recommended component placement. A large ground pin copper area will help to lower the die temperature. A multilayer board with a separate ground plane is ideal.COMPONENT SELECTION Inductor SelectionThe L TC3539 can utilize small surface mount and chip inductors due to the high switching frequency. Inductor values between 3.3μH and 4.7μH for the L TC3539 and between 1.5μH and 2.5μH for the L TC3539-2 are suitable for most applications*. Larger values of inductance will allow slightly greater output current capability (and lower the Burst Mode threshold) by reducing the inductor ripple current. However , increasing the inductance above 10μH will increase size while providing little improvement in output current capability.The minimum inductance value is given by: L >V V V Ripple V IN MIN OUT MAX IN MIN OU ()()()•()•−T MAX f()•Where:f = 1 for the L TC3539 or 2.2 for the L TC3539-2Ripple = allowable inductor current ripple (Amps peak-to-peak)V IN(MIN) = minimum input voltage V OUT(MAX) = maximum output voltageThe inductor current ripple is typically set for 20% to 40% of the maximum inductor current. High frequency ferrite core inductor materials improve effi ciency by reducing frequency dependent power losses compared to cheaper powdered iron types. The inductor should have low ESR (series resistance of the windings) to reduce the I 2R power losses, and must accomodate the peak inductor current without saturating. Molded chokes and some chip inductors usually do not have enough core area to support the peak inductor current of 2.6A seen on the L TC3539. To minimize radiated noise, use a shielded inductor . See Table 1 for suggested suppliers and representative components.Figure 1. Recommended Component Placement for Single Layer BoardMINIMIZE TRACE ON FB AND SW*Single cell applications (V IN < 1.6V) should use a 2.2μH inductor for the L TC3539103539fA PPLICATIONS INFORMATION Table 1. Representative InductorsVENDOR PART/STYLE Coilcraft(847) MSS5131LPS4018-222MSS6132MOS6020Murata LQH55D LQH66S Sumida(847) CDRH4D22CDRH4D28C CDRH5D28CDR6D23TDK(847) 803-6100 VLF5014STToko(408) D53LC D63LCBWurth(201) WE-TPC Type LH, X WE-PD Type XSOutput and Input Capacitor SelectionThe internal loop compensation of the L TC3539 is designed to be stable with output capacitor values of 10μF or greater . Although ceramic capacitors are recommended, low ESR (equivalent series resistance) tantalum capacitors may be used as well.Low ESR capacitors should be used to minimize the output voltage ripple. Multilayer ceramic capacitors are an excellent choice as they have extremely low ESR and are available in small footprints. A 22μF to 47μF output capacitor is suffi cient for output voltages of 3V or greater .An output capacitor of up to 100μF is required at lower output voltages. Even with V OUT greater than 3V , larger values up to 100μF may be used to obtain extremely low output voltage ripple and improve transient response. X5R and X7R dielectric materials are preferred for their ability to maintain capacitance over wide voltage and temperature ranges. Y5V types should not be used.A small ceramic capacitor in parallel with a larger tantalum capacitor may be used in demanding applications which have large load transients. A feedforward capacitor across the top resistor of the feedback divider (from V OUT to FB) is usually required to improve transient response. A typical value of 22pF will generally suffi ce.Low ESR input capacitors reduce input switching noise and reduce the peak current drawn from the battery. It follows that ceramic capacitors are also a good choice for input decoupling and should be located as close as possible to the device. A 2.2μF input capacitor is suffi cient for most applications. Larger values may be used without limita-tions. Table 2 shows a list of several ceramic capacitor manufacturers. Consult the manufacturers directly for detailed information on their selection of ceramic parts.Table 2. Capacitor Vendor InformationSUPPLIER PHONE WEBSITE AVX (803) Murata (714) Taiyo-Yuden (408) TDK(847) 803-6100T YPICAL APPLICATIONS 1 Cell to 1.8V1 Cell to 3.3VLi-Ion Cell to 5VV OUT 1.8V 500mA VV OUT 3.3V 350mA VV OUT 5V 750mA VLTC3539/LTC3539-2113539fInformation furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa-tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.P ACKAGE DESCRIPTIONNOTE:1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE2. DRAWING NOT TO SCALE3. ALL DIMENSIONS ARE IN MILLIMETERS4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDEMOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGEBOTTOM VIEW—EXPOSED PAD± 0.05° CHAMFER0.05RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDEREDDCB Package8-Lead Plastic DFN (2mm × 3mm)(Reference L TC DWG # 05-08-1718 Rev A)LTC3539/LTC3539-2123539fLinear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear .com© LINEAR TECHNOLOGY CORPORA TION 2008LT 0408 • PRINTED IN USAR ELATED PARTS PART NUMBER DESCRIPTION COMMENTSL TC3400/L TC3400B 600mA I SW , 1.2MHz, Synchronous Step-Up DC/DC Converters92% Effi ciency V IN : 0.85V to 5V , V OUT(MAX) = 5V , I Q = 19μA/300μA, I SD <1μA, ThinSOT™ PackageL TC34011A I SW , 3MHz, Synchronous Step-Up DC/DC Converter 97% Effi ciency V IN : 0.5V to 5V , V OUT(MAX) = 6V , I Q = 38μA, I SD <1μA, 10-LeadMS Package L TC34022A I SW , 3MHz, Synchronous Step-Up DC/DC Converter 97% Effi ciency V IN : 0.5V to 5V , V OUT(MAX) = 6V , I Q = 38μA, I SD <1μA, 10-LeadMS Package L TC34213A I SW , 3MHz, Synchronous Step-Up DC/DC Converter with Output Disconnect 95% Effi ciency V IN : 0.5V to 4.5V , V OUT(MAX) = 5.25V , I Q = 12μA, I SD <1μA, QFN24 Package L TC3422 1.5A I SW , 3MHz Synchronous Step-Up DC/DC Converter with Output Disconnect95% Effi ciency V IN : 0.5V to 4.5V , V OUT(MAX) = 5.25V , I Q = 25μA, I SD <1μA, 3mm × 3mm DFN PackageL TC3423/L TC34241A/2A I SW , 3MHz, Synchronous Step-Up DC/DC Converter95% Effi ciency V IN : 0.5V to 5.5V , V OUT(MAX) = 5.5V , I Q = 38μA, I SD <1μA, 10-Lead MS PackageL TC3426 2A I SW , 1.2MHz, Step-Up DC/DC Converter 92% Effi ciency V IN : 1.6V to 4.3V , V OUT(MAX) = 5V , I SD <1μA, SOT-23 Package L TC3428 500mA I SW , 1.25MHz/2.5MHz, Synchronous Step-UpDC/DC Converters with Output Disconnect 92% Effi ciency V IN : 1.8V to 5V , V OUT(MAX) = 5.25V , I SD <1μA, 3mm × 3mm DFN PackageL TC3429 600mA I SW , 500kHz, Synchronous Step-Up DC/DCConverter with Output Disconnect and Soft-Start 96% Effi ciency V IN : 0.5V to 4.4V , V OUT(MAX) = 5V , I Q = 20μA/300μA,L TC3458 1.4A I SW , 1.5MHz, Synchronous Step-Up DC/DC Converter/Output Disconnect/Burst Mode Operation 93% Effi ciency V IN : 1.5V to 6V , V OUT(MAX) = 7.5V , I Q = 15μA, I SD <1μA, DFN12 PackageL TC3458L1.7A I SW , 1.5MHz, Synchronous Step-Up DC/DC Converter with Output Disconnect, Automatic Burst Mode Operation94% Effi ciency V OUT(MAX) = 6V , I Q = 12μA, DFN12 PackageL TC345970mA I SW , 10V Micropower Synchronous Boost Converter/Output Disconnect/Burst Mode Operation V IN : 1.5V to 5.5V , V OUT(MAX) = 10V , I Q = 10μA, I SD <1μA, ThinSOT Package L TC3525-3/L TC3525-3.3/L TC3525-5400mA Micropower Synchronous Step-Up DC/DC Converter with Output Disconnect95% Effi ciency V IN : 1V to 4.5V , V OUT(MAX) = 3.3V or 5V , I Q = 7μA, I SD <1μA, SC-70 PackageL TC3525L-3400mA Micropower Synchronous Step-Up DC/DC Converter with Output Disconnect95% Effi ciency V IN : 0.88V to 4.5V , V OUT(MAX) = 3V , I Q = 7μA, I SD <1μA, SC-70 PackageL TC3526/L TC3526B 500mA, 1MHz Synchronous Step-Up DC/DC Converter with Output Disconnect94% Effi ciency V IN : 0.85V to 5V , V OUT(MAX) = 5.25V , I Q = 9μA, I SD <1μA,2mm × 2mm DFN-6 Package L TC3526L 550mA, 1MHz Synchronous Step-Up DC/DC Converter with Output Disconnect 94% Effi ciency V IN : 0.68V to 5V , V OUT(MAX) = 5.25V , I Q = 9μA, I SD <1μA,2mm × 2mm DFN-6 Package L TC3527/L TC3527-1Dual 800mA/400mA, 1.2MHz/2.2MHz Synchronous Step-Up DC/DC Converter with Output Disconnect94% Effi ciency V IN : 0.68V to 5V , V OUT(MAX) = 5.25V , I Q = 12μA, I SD <1μA, 3mm × 3mm QFN-16 PackageL TC3528/ L TC3528B1A, 1MHz Synchronous Step-Up DC/DC Converter with Output Disconnect94% Effi ciency V IN : 0.68V to 5V , V OUT(MAX) = 5.25V , I Q = 12μA, I SD <1μA,2mm × 3mm DFN-8 Package ThinSOT is a trademark of Linear Technology Corporation.。