ICS951411YFLFT中文资料
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Integrated Circuit
Systems, Inc.
ICS951411
Pin Configuration
Recommended Application:
A TI RS400 systems using Intel P4TM processors Output Features:• 6 - Pairs of SRC/PCI-Express clocks • 2 - Pairs of ATIG (SRC/PCI Express*) clocks • 3 - Pairs of Intel P4 clocks • 3 - 14.318 MHz REF clocks • 1 - 48MHz US
B clock • 1 - 33 MHz PCI clock seed
Key Specifications:•CPU outputs cycle-cycle jitter < 85ps •SRC output cycle-cycle jitter <125ps •PCI outputs cycle-cycle jitter < 250ps •+/- 300ppm frequency accuracy on CPU & SRC clocks
System Clock Chip for ATI RS400 P4TM -based Systems
Features/Benefits:
•2- Programmable Clock Request pins for SRC clocks •Supports CK410 or CK409 frequency table mapping •Spread Spectrum for EMI reduction •Outputs may be disabled via SMBus •External crystal load capacitors for maximum
frequency accuracy
56-pin SSOP & TSSOP
1. FS_C, FS_B and FS_A are low-threshold inputs. Please see the V IL_FS and V IH_FS specifications in the Input/Supply/Common Output Parameters Table for correct values.
X1156VDDREF X2255GND
VDD48354**FS_A/REF0USB_48MHz
453**FS_B/REF1
GND
552**TEST_SEL/REF2VTT_PWRGD#/PD
651VDDPCI
SCLK 750**CK410#/PCICLK0SDATA 849GNDPCI
**FS_C 948*CPU_STOP#**CLKREQA#1047CPUCLKT0**CLKREQB#1146CPUCLKC0SRCCLKT71245VDDCPU SRCCLKC71344GNDCPU VDDSRC 1443CPUCLKT1GNDSRC 1542CPUCLKC1
SRCCLKT61641CPUCLKT2_ITP SRCCLKC61740CPUCLKC2_ITP SRCCLKT51839VDDA SRCCLKC51938GNDA GNDSRC 2037IREF
VDDSRC 2136GNDSRC SRCCLKT42235VDDSRC SRCCLKC42334SRCCLKT0SRCCLKT32433SRCCLKC0SRCCLKC32532VDDATI GNDSRC 2631GNDATI ATIGCLKT12730ATIGCLKT0ATIGCLKC12829ATIGCLKC0
Note:Pins preceeded by '**' have a 120 Kohm Internal Pull Down resistor
Pins preceeded by '*' have a 120 Kohm Internal Pull Up resistor
I C S 951411
Integrated Circuit
Systems, Inc.
ICS951411
Integrated Circuit
Systems, Inc.
ICS951411
Integrated Circuit
Systems, Inc.
ICS951411
ICS951411 provides a single-chip clocking solution for the ATI RS400-based systems using the latest Intel P4 processors.ICS951411 is driven with a 14.318MHz crystal. It generates CPU outputs up to 400MHz and also provides highly accurate SRC clocks for PCI Express support. Two Clock Request pins are provided for Express-Card TM support.
General Description
Block Diagram
Power Groups
Integrated Circuit
Systems, Inc.
ICS951411
General SMBus serial interface information for the ICS951411How to Write:
•Controller (host) sends a start bit.
•Controller (host) sends the write address D2 (H)•ICS clock will acknowledge
•Controller (host) sends the begining byte location = N •ICS clock will acknowledge
•Controller (host) sends the data byte count = X •ICS clock will acknowledge
•
Controller (host) starts sending Byte N through Byte N + X -1(see Note 2)
•ICS clock will acknowledge each byte one at a time •Controller (host) sends a Stop bit
How to Read:
•Controller (host) will send start bit.
•Controller (host) sends the write address D2 (H)•ICS clock will acknowledge
•Controller (host) sends the begining byte location = N
•ICS clock will acknowledge
•Controller (host) will send a separate start bit.•Controller (host) sends the read address D3 (H)•ICS clock will acknowledge
•ICS clock will send the data byte count = X •ICS clock sends Byte N + X -1
•ICS clock sends Byte 0 through byte X (if X (H)was written to byte 8).
•Controller (host) will need to acknowledge each byte •Controllor (host) will send a not acknowledge bit •
Controller (host) will send a stop bit