CSA940中文资料
RQ940系统用户手册
RQ940系统用户手册LT1112.1.2 系统前面介绍 (16)2.1.3 系统后面介绍 (17)2.1.4 电源模块后面介绍 (18)2.1.5 前面板LED 定义 (18)2.2 系统主要部件拆装 (19)2.2.1 硬盘支架的拆装 (20)2.2.2 硬盘的拆装 (21)2.2.3 电源的拆装 (21)2.2.4 上盖的拆装 (22)2.2.5 风扇模组的拆装 (23)12.2.7 中间支架拆装 (24)2.2.8 热插拔PCIE 卡拆装 (25)2.2.9 非热插拔PCIE 卡的拆装 (26)2.2.10 内存卡的拆装 (26)2.2.11 内存的拆装 (27)2.2.12................................................................................................................................................................................... CPU 散热器的拆装 (28)2.2.13................................................................................................................................................................................... CPU 的拆装 (29)2.2.14................................................................................................................................................................................... I/O 卡的拆装 (31)2.2.15................................................................................................................................................................................... B的拆装 (31)2.2.16................................................................................................................................................................................... supercap 的拆装 (32)2.2.17................................................................................................................................................................................... i bbu 的拆装 (33)2.2.18 导轨组件的拆装(上机柜) (35)第三章系统设置 (36)3.1 主板主要布局 (36)3.2 主板跳线设置及功能描速 (37)3.3主板BIOS 设置 (38)3.3.1 通电自检程序(POST) (38)3.3.2..................................................................................................................................................................................... B IOS 设置操作说明 (39)3.3.3..................................................................................................................................................................................... B IOS 设置项介绍 (39)3.3.4..................................................................................................................................................................................... Main 主菜单 (40)3.3.5..................................................................................................................................................................................... Advanced 主菜单 (41)3.3.6..................................................................................................................................................................................... I ntel RC Setup 主菜单 (60)23.3.7..................................................................................................................................................................................... Server Mgmt 主菜单 (88)3.3.8..................................................................................................................................................................................... BOOT 主菜单 (93)3.3.9..................................................................................................................................................................................... Security 主菜单 (96)3.3.10................................................................................................................................................................................... Save & EXIT 主菜单 (99)3.4 系统管理用户界面介绍 (100)第四章常用操作系统安装指南 (130)4.1 LSI 9270CV-8i 配置 (130)4.1.1Windows Server 2008 Datacenter Edition R2 with SP1 安装指南 (130)4.1.1.1 准备工作 (130)4.1.1.2 安装步骤 (130)4.1.1.3 芯片组驱动的安装 (131)4.1.1.4 网卡驱动的安装 (131)4.1.1.5 板载显卡驱动的安装 (132)4.1.2Windows Server 2012 Datacenter 安装指南 (132)4.1.2.1 准备工作 (132)4.1.2.2 安装步骤 (132)4.1.2.3 芯片组驱动的安装 (133)4.1.2.4 板载显卡驱动的安装 (133)4.1.2.5 网卡驱动程序安装 (133)4.1.3Windows Server Datacenter 2012R2 安装指南 (134)4.1.3.1 准备工作 (134)4.1.3.2 安装步骤 (134)4.1.3.3 芯片组驱动的安装 (134)4.1.3.4 板载显卡驱动的安装 (135)4.1.3.5 网卡驱动程序安装 (135)34.1.4Microsoft Hyper V 2012 安装指南 (135)4.1.4.1 准备工作 (135)4.1.4.2 安装步骤 (135)4.1.4.3 芯片组驱动的安装 (136)4.1.4.4 板载显卡驱动的安装 (136)4.1.4.5 网卡驱动的安装 (136)4.1.5RedHat Enterprise Linux AS 6.5 x64 安装指南 (137)4.1.5.1 安装步骤 (137)44.1.5.2 网卡驱动的安装及配置 (138)4.1.5.3 板载显卡驱动的安装 (138)4.1.6Suse Linux Enterprise Server 11 SP3 x64 安装指南 (139)4.1.6.1 安装步骤 (139)4.1.6.3 网卡驱动程序安装及配置 (140)4.1.6.4 板载显卡驱动的安装 (140)4.1.7VMware 安装指南 (140)4.1.7.1 安装步骤 (140)4.1.8Citrix XenServer Enterprise v6.2 安装指南 (141)4.1.8.1 安装步骤 (141)4.1.9Oracle Solaris 11 安装指南 (142)4.1.9.1 安装步骤 (142)第五章常见问题解答 (143)5.1 系统首次启动不正常 (143)5.2 应用软件运行不正常 (143)5.3 系统运行中的故障 (144)5.4 其他故障及解决方法 (144)5.4.1 显示器无法正常显示 (144)5.4.2 清除系统配置 (144)5.4.3 更换主板电池 (145)5.4.4 存储部件容量说明 (145)附录一服务器相关知识词汇表 (146)5声明感谢您选择联想产品。
DS-940操作手册
8.1 打印机规格 ...................................... 8-1 8.2 接口接头引脚 .................................... 8-4 8.3 字符集 .......................................... 8-8 8.4 控制码摘要表 ................................... 8-14 8.4.1 标准模式和 24 针图像仿真控制码摘要表 ......... 8-14 附录 1:电子信息产品污染控制的说明..................... 9-1
注:只有当产品无任何外接输入电源时,才能实现零能耗。 3. 如果用户需对产品性能升级或更换模块, 请来电咨询, 我们将给您 详细解答。 4. 当您弃置达到使用寿命年限的针式打印机产品时, 我们建议您将废 弃产品返还给本公司或全国各地得实服务网点, 由得实集团作统一 处理,以保护生态环境。
5. 本产品能使用含 50%回收纤维的打印纸进行打印。
安装打印机
1-5
5、将打印头移到中间,略为倾斜色带架,按次序将标识①、②的卡位 安装于机架上,轻按色带盒,使其安装到位;接着把色带芯导入打 印头下侧, 再把标识③色带导架上的卡位安装到打印头罩对应的卡 位上:
6、确保色带已夹在打印头和色带保护片中间,色带盒已固定在机架的 适当位置上,如下图所示。
7、再次旋转色带盒上的旋钮,收紧色带芯,并左右移动字车数次,确 保字车及色带的运动顺畅。 8、将面盖小心盖好。打印机正常工作时,盖上面盖可以隔离灰尘,同 时减低打印时产生的噪音,打开面盖仅是为了更换色带及进行调 整。 安装打印机 1-6
2
安全规范
使 用 注 意 事 项
CSC2073中文资料
CSA940PNP PLASTIC POWER TRANSISTOR CSC2073NPN PLASTIC POWER TRANSISTORPower Amplifier Applications and Vertical Output ApplicationsABSOLUTE MAXIMUM RATINGS Collector-base voltage (open emitter)V CBO max.150V Collector-emitter voltage (open base)V CEO max.150V Collector currentI C max. 1.5A Total power dissipation up to T C = 25°C P tot max.25W Junction temperatureT j max.150°CCollector-emitter saturation voltageI C = 500 mA; I B = 50 mA V CEsat max. 1.5V D.C. current gainI C = 500 mA; V CE = 10 Vh FEmin.40max.140RATINGS (at T A =25°C unless otherwise specified)Limiting valuesCollector-base voltage (open emitter)V CBO max.150V Collector-emitter voltage (open base)V CEO max.150V Emitter-base voltage (open collector)V EBOmax. 5.0VCSA940, CSC2073TO-220 Plastic Package Continental Device India LimitedAn ISO/TS16949 and ISO 9001 Certified CompanyCSA940, CSC2073 Collector current I C max. 1.5A Base current I B max.0.5A Total power dissipation up to T C = 25°C P tot max.25W Total power dissipation up to T A = 25°C P tot max. 1.5W Junction temperature T j max.150ºC Storage temperature T stg–65 to +150ºC CHARACTERISTICST a m b = 25°C unless otherwise specifiedCollector cutoff currentI E = 0; V CB = 120 V I CBO max.10µA Emitter cut-off currentI C = 0; V EB = 5 V I EBO max.10µA Breakdown voltagesI C = 1 mA; I B = 0V CEO min.150VI C = 1 mA; I E = 0V CBO min.150VI E = 1 mA; I C = 0V EBO min. 5.0V Saturation voltagesI C = 500 mA; I B = 50 mA V CEsat max. 1.5V Base emitter on voltageI C = 500 mA; V CE = 10 V V BE(on)min.0.65Vmax.0.85V D.C. current gainI C = 500 mA; V CE = 10 V h FE min.40max.140 Output capacitance at f = 1 MHzI E = 0; V CB = 10 V NPN C o typ.35pFPNP typ.55pF Transition frequencyI C = 500 mA; V CE = 10 V f T typ.4MHzCustomer NotesDisclaimerThe product information and the selection guides facilitate selection of the CDIL's Discrete Semiconductor Device(s) best suited for application in your product(s) as per your requirement. It is recommended that you completely review our Data Sheet(s) so as to confirm that the Device(s) meet functionality parameters for your application. The information furnished on the CDIL Web Site/ CD are believed to be accurate and reliable. CDIL however, does not assume responsibility for inaccuracies or incomplete information. Furthermore, CDIL does not assume liability whatsoever, arising out of the application or use of any CDIL product; neither does it convey any license under its patent rights nor rights of others. These products are not designed for use in life saving/support appliances or systems. CDIL customers selling these products (either as individual Discrete Semiconductor Devices or incorporated in their end products), in any life saving/support appliances or systems or applications do so at their own risk and CDIL will not be responsible for any damages resulting from such sale(s).CDIL strives for continuous improvement and reserves the right to change the specifications of its products without prior notice.CDIL is a registered Trademark ofContinental Device India LimitedC-120 Naraina Industrial Area, New Delhi 110 028, India.Telephone + 91-11-2579 6150, 5141 1112 Fax + 91-11-2579 5290, 5141 1119email@ 。
Lexan 940
L exan* Resin 940A sia Pacific: COMMERCIALOpaque colors, medium viscosity, superior flame retardance.You may also be interested in:Enhanced PropertyData SheetImproved Ductility EXL9330Improved DuctilityEXL9335BR/CL Free945Improved Scratch ResistanceDMX9455Additonal InformationT YPICAL PROPERTIES ¹TYPICAL VALUEUNITSTANDARDM ECHANICALT ensile Stress, yld, Type I, 50 mm/min 62M Pa A STM D 638T ensile Stress, brk, Type I, 50 mm/min 55M Pa A STM D 638T ensile Strain, yld, Type I, 50 mm/min 7%A STM D 638T ensile Strain, brk, Type I, 50 mm/min90%A STM D 638F lexural Stress, yld, 1.3 mm/min, 50 mm span 91M Pa A STM D 790F lexural Modulus, 1.3 mm/min, 50 mm span 2240M Pa A STM D 790H ardness, Rockwell M 70-A STM D 785H ardness, Rockwell R118-A STM D 785T aber Abrasion, CS-17, 1 kg10m g/1000cy A STM D 1044I MPACTIzod Impact, unnotched, 23°C 3204J /m A STM D 4812 Izod Impact, notched, 23°C 640J /m A STM D 256T ensile Impact, Type S525k J/m²A STM D 1822 Falling Dart Impact (D 3029), 23°C169J A STM D 3029T HERMALV icat Softening Temp, Rate B/50151°C A STM D 1525H DT, 0.45 MPa, 6.4 mm, unannealed 137°C A STM D 648H DT, 1.82 MPa, 6.4 mm, unannealed 132°C A STM D 648 CTE, -40°C to 95°C, flow 6.84E-051/°C A STM E 831T hermal Conductivity0.19W /m-°C A STM C 177R elative Temp Index, Elec130°C U L 746B R elative Temp Index, Mech w/impact 120°C U L 746B R elative Temp Index, Mech w/o impact130°CU L 746BPLEASE CONTACT YOUR LOCAL SALES OFFICE FOR AVAILABILITY IN YOUR AREA DISCLAIMER : THE MATERIALS AND PRODUCTS OF THE BUSINESSES MAKING UP THE SABIC INNOVATIVE PLASTICS 1) T ypical values only. Variations within normal tolerances are possible for variose colours.All values are measured at least after 48 hours s torage at 230C/50% relative humidity.All properties, expect the melt volume rate are measured on injection m oulded samples.All samples are prepared according to ISO 294.2) O nly typical data for material selection purpose.Not to be used for p art or tool design.3) T his rating is not intended to reflect hazards presented by this or any o ther material under actual fire conditions.4) O wn measurement according to UL.5) Measurements made from laboratory test coupon. Actual shrinkage may vary outside of range due todifferences in processing conditions, equipment, part geometry and tool design. It is recommended that mold shrinkage studies be performed with surrogate or legacy tooling prior to cutting tools for new molded article.Source, GMD, Last Update:COMPANY, ITS SUBSIDIARIES AND AFFILIATES ("SABIC IP"), ARE SOLD SUBJECT TO SABIC IP' S STANDARD CONDITIONS OF SALE, WHICH ARE INCLUDED IN THE APPLICABLE DISTRIBUTOR OR OTHER SALES AGREEMENT, PRINTED ON THE BACK OF ORDER ACKNOWLEDGMENTS AND INVOICES, AND AVAILABLE UPON REQUEST. ALTHOUGH ANY INFORMATION, RECOMMENDATIONS, OR ADVICECONTAINED HEREIN IS GIVEN IN GOOD FAITH, SABIC IP MAKES NO WARRANTY OR GUARANTEE, EXPRESS OR IMPLIED, (I) THAT THE RESULTS DESCRIBED HEREIN WILL BE OBTAINED UNDER END-USE CONDITIONS, OR (II) AS TO THE EFFECTIVENESS OR SAFETY OF ANY DESIGN INCORPORATING SABIC IP MATERIALS, PRODUCTS, RECOMMENDATIONS OR ADVICE. EXCEPT AS PROVIDED IN SABIC IP' S STANDARD CONDITIONS OF SALE, SABIC IP AND ITS REPRESENTATIVES SHALL IN NO EVENT BE RESPONSIBLE FOR ANY LOSS RESULTING FROM ANY USE OF ITS MATERIALS OR PRODUCTS DESCRIBED HEREIN.Each user bears full responsibility for making its own determination as to the suitability of SABIC IP' s materials, products, recommendations, or advice for its own particular use. Each user must identify and perform all tests and analyses necessary to assure that its finished parts incorporating SABIC IP materials or products will be safe and suitable for use under end-use conditions. Nothing in this or any other document, nor any oralrecommendation or advice, shall be deemed to alter, vary, supersede, or waive any provision of SABIC IP' s Standard Conditions of Sale or this Disclaimer, unless any such modification is specifically agreed to in a writing signed by SABIC IP. No statement contained herein concerning a possible or suggested use of any material, product or design is intended, or should be construed, to grant any license under any patent or other intellectual property right of SABIC Innovative Plastics Company or any of its subsidiaries or affiliates covering such use or design, or as a recommendation for the use of such material, product or design in the infringement of any patent or otherL exan* Resin 940A sia Pacific: COMMERCIALT YPICAL PROPERTIES ¹TYPICAL VALUE UNIT STANDARDP HYSICALS pecific Gravity 1.21-A STM D 792S pecific Volume 0.83c m³/g A STM D 792D ensity1.217g /cm³A STM D 792W ater Absorption, 24 hours0.15%A STM D 570W ater Absorption, equilibrium, 23C 0.35%A STM D 570 Water Absorption, equilibrium, 100°C 0.58%A STM D 570M old Shrinkage, flow, 3.2 mm (5)0.5 - 0.7%S ABIC Method Melt Flow Rate, 300°C/1.2 kgf10g /10 min A STM D 1238E LECTRICALV olume Resistivity>1.E+17O hm-cm A STM D 257D ielectric Strength, in air, 3.2 mm 16.7k V/mm A STM D 149R elative Permittivity, 50/60 Hz 3.01-A STM D 150R elative Permittivity, 1 MHz 2.96-A STM D 150D issipation Factor, 50/60 Hz 0.0009-A STM D 150D issipation Factor, 1 MHz0.01-A STM D 150A rc Resistance, Tungsten {PLC}7P LC Code A STM D 495H ot Wire Ignition {PLC)2P LC Code U L 746A H igh Voltage Arc Track Rate {PLC}3P LC Code U L 746A H igh Ampere Arc Ign, surface {PLC}3P LC Code U L 746A C omparative Tracking Index (UL) {PLC}2P LC Code U L 746A F LAME CHARACTERISTICSU L Recognized, 94V-0 Flame Class Rating (3)1.09m m U L 94O xygen Index (LOI)35%A STM D 2863R adiant Panel ListingY ES-U L TestedSource, GMD, Last Update:PLEASE CONTACT YOUR LOCAL SALES OFFICE FOR AVAILABILITY IN YOUR AREA DISCLAIMER : THE MATERIALS AND PRODUCTS OF THE BUSINESSES MAKING UP THE SABIC INNOVATIVE PLASTICS COMPANY, ITS SUBSIDIARIES AND AFFILIATES ("SABIC IP"), ARE SOLD SUBJECT TO SABIC IP' S STANDARD CONDITIONS OF SALE, WHICH ARE INCLUDED IN THE APPLICABLE DISTRIBUTOR OR OTHER SALES AGREEMENT, PRINTED ON THE BACK OF ORDER ACKNOWLEDGMENTS AND INVOICES, AND AVAILABLE UPON REQUEST. ALTHOUGH ANY INFORMATION, RECOMMENDATIONS, OR ADVICECONTAINED HEREIN IS GIVEN IN GOOD FAITH, SABIC IP MAKES NO WARRANTY OR GUARANTEE, EXPRESS OR IMPLIED, (I) THAT THE RESULTS DESCRIBED HEREIN WILL BE OBTAINED UNDER END-USE CONDITIONS, OR (II) AS TO THE EFFECTIVENESS OR SAFETY OF ANY DESIGN INCORPORATING SABIC IP MATERIALS, PRODUCTS, RECOMMENDATIONS OR ADVICE. EXCEPT AS PROVIDED IN SABIC IP' S STANDARD CONDITIONS OF SALE, SABIC IP AND ITS REPRESENTATIVES SHALL IN NO EVENT BE RESPONSIBLE FOR ANY LOSS RESULTING FROM ANY USE OF ITS MATERIALS OR PRODUCTS DESCRIBED HEREIN.Each user bears full responsibility for making its own determination as to the suitability of SABIC IP' s materials, products, recommendations, or advice for its own particular use. Each user must identify and perform all tests and analyses necessary to assure that its finished parts incorporating SABIC IP materials or products will be safe and suitable for use under end-use conditions. Nothing in this or any other document, nor any oralrecommendation or advice, shall be deemed to alter, vary, supersede, or waive any provision of SABIC IP' s Standard Conditions of Sale or this Disclaimer, unless any such modification is specifically agreed to in a writing signed by SABIC IP. No statement contained herein concerning a possible or suggested use of any material, product or design is intended, or should be construed, to grant any license under any patent or other intellectual property right of SABIC Innovative Plastics Company or any of its subsidiaries or affiliates covering such use or design, or as a recommendation for the use of such material, product or design in the infringement of any patent or other 1) T ypical values only. Variations within normal tolerances are possible for variose colours.All values are measured at least after 48 hours s torage at 230C/50% relative humidity.All properties, expect the melt volume rate are measured on injection m oulded samples.All samples are prepared according to ISO 294.2) O nly typical data for material selection purpose.Not to be used for p art or tool design.3) T his rating is not intended to reflect hazards presented by this or any o ther material under actual fire conditions.4) O wn measurement according to UL.5) Measurements made from laboratory test coupon. Actual shrinkage may vary outside of range due todifferences in processing conditions, equipment, part geometry and tool design. It is recommended that mold shrinkage studies be performed with surrogate or legacy tooling prior to cutting tools for new molded article.L exan* Resin 940A sia Pacific: COMMERCIALT YPICAL PROPERTIES ¹TYPICAL VALUE UNIT STANDARDF LAME CHARACTERISTICSU V-light, water exposure/immersionF 1-U L 746CSource, GMD, Last Update:PLEASE CONTACT YOUR LOCAL SALES OFFICE FOR AVAILABILITY IN YOUR AREA DISCLAIMER : THE MATERIALS AND PRODUCTS OF THE BUSINESSES MAKING UP THE SABIC INNOVATIVE PLASTICS COMPANY, ITS SUBSIDIARIES AND AFFILIATES ("SABIC IP"), ARE SOLD SUBJECT TO SABIC IP' S STANDARD CONDITIONS OF SALE, WHICH ARE INCLUDED IN THE APPLICABLE DISTRIBUTOR OR OTHER SALES AGREEMENT, PRINTED ON THE BACK OF ORDER ACKNOWLEDGMENTS AND INVOICES, AND AVAILABLE UPON REQUEST. ALTHOUGH ANY INFORMATION, RECOMMENDATIONS, OR ADVICECONTAINED HEREIN IS GIVEN IN GOOD FAITH, SABIC IP MAKES NO WARRANTY OR GUARANTEE, EXPRESS OR IMPLIED, (I) THAT THE RESULTS DESCRIBED HEREIN WILL BE OBTAINED UNDER END-USE CONDITIONS, OR (II) AS TO THE EFFECTIVENESS OR SAFETY OF ANY DESIGN INCORPORATING SABIC IP MATERIALS, PRODUCTS, RECOMMENDATIONS OR ADVICE. EXCEPT AS PROVIDED IN SABIC IP' S STANDARD CONDITIONS OF SALE, SABIC IP AND ITS REPRESENTATIVES SHALL IN NO EVENT BE RESPONSIBLE FOR ANY LOSS RESULTING FROM ANY USE OF ITS MATERIALS OR PRODUCTS DESCRIBED HEREIN.Each user bears full responsibility for making its own determination as to the suitability of SABIC IP' s materials, products, recommendations, or advice for its own particular use. Each user must identify and perform all tests and analyses necessary to assure that its finished parts incorporating SABIC IP materials or products will be safe and suitable for use under end-use conditions. Nothing in this or any other document, nor any oralrecommendation or advice, shall be deemed to alter, vary, supersede, or waive any provision of SABIC IP' s Standard Conditions of Sale or this Disclaimer, unless any such modification is specifically agreed to in a writing signed by SABIC IP. No statement contained herein concerning a possible or suggested use of any material, product or design is intended, or should be construed, to grant any license under any patent or other intellectual property right of SABIC Innovative Plastics Company or any of its subsidiaries or affiliates covering such use or design, or as a recommendation for the use of such material, product or design in the infringement of any patent or other 1) T ypical values only. Variations within normal tolerances are possible for variose colours.All values are measured at least after 48 hours s torage at 230C/50% relative humidity.All properties, expect the melt volume rate are measured on injection m oulded samples.All samples are prepared according to ISO 294.2) O nly typical data for material selection purpose.Not to be used for p art or tool design.3) T his rating is not intended to reflect hazards presented by this or any o ther material under actual fire conditions.4) O wn measurement according to UL.5) Measurements made from laboratory test coupon. Actual shrinkage may vary outside of range due todifferences in processing conditions, equipment, part geometry and tool design. It is recommended that mold shrinkage studies be performed with surrogate or legacy tooling prior to cutting tools for new molded article.L exan* Resin 940A sia Pacific: COMMERCIALP ROCESSING PARAMETERSTYPICAL VALUE UNITI njection MoldingD rying Temperature 120°C D rying Time3 - 4h rs D rying Time (Cumulative)48h rs M aximum Moisture Content 0.02%M elt Temperature 295 - 315°C N ozzle Temperature290 - 310°C F ront - Zone 3 Temperature 295 - 315°C M iddle - Zone 2 Temperature 280 - 305°C R ear - Zone 1 Temperature 270 - 295°C M old Temperature 70 - 95°C B ack Pressure 0.3 - 0.7M Pa S crew Speed40 - 70r pm S hot to Cylinder Size 40 - 60%V ent Depth0.025 - 0.076m mSource, GMD, Last Update:PLEASE CONTACT YOUR LOCAL SALES OFFICE FOR AVAILABILITY IN YOUR AREA DISCLAIMER : THE MATERIALS AND PRODUCTS OF THE BUSINESSES MAKING UP THE SABIC INNOVATIVE PLASTICS COMPANY, ITS SUBSIDIARIES AND AFFILIATES ("SABIC IP"), ARE SOLD SUBJECT TO SABIC IP' S STANDARD CONDITIONS OF SALE, WHICH ARE INCLUDED IN THE APPLICABLE DISTRIBUTOR OR OTHER SALES AGREEMENT, PRINTED ON THE BACK OF ORDER ACKNOWLEDGMENTS AND INVOICES, AND AVAILABLE UPON REQUEST. ALTHOUGH ANY INFORMATION, RECOMMENDATIONS, OR ADVICECONTAINED HEREIN IS GIVEN IN GOOD FAITH, SABIC IP MAKES NO WARRANTY OR GUARANTEE, EXPRESS OR IMPLIED, (I) THAT THE RESULTS DESCRIBED HEREIN WILL BE OBTAINED UNDER END-USE CONDITIONS, OR (II) AS TO THE EFFECTIVENESS OR SAFETY OF ANY DESIGN INCORPORATING SABIC IP MATERIALS, PRODUCTS, RECOMMENDATIONS OR ADVICE. EXCEPT AS PROVIDED IN SABIC IP' S STANDARD CONDITIONS OF SALE, SABIC IP AND ITS REPRESENTATIVES SHALL IN NO EVENT BE RESPONSIBLE FOR ANY LOSS RESULTING FROM ANY USE OF ITS MATERIALS OR PRODUCTS DESCRIBED HEREIN.Each user bears full responsibility for making its own determination as to the suitability of SABIC IP' s materials, products, recommendations, or advice for its own particular use. Each user must identify and perform all tests and analyses necessary to assure that its finished parts incorporating SABIC IP materials or products will be safe and suitable for use under end-use conditions. Nothing in this or any other document, nor any oralrecommendation or advice, shall be deemed to alter, vary, supersede, or waive any provision of SABIC IP' s Standard Conditions of Sale or this Disclaimer, unless any such modification is specifically agreed to in a writing signed by SABIC IP. No statement contained herein concerning a possible or suggested use of any material, product or design is intended, or should be construed, to grant any license under any patent or other intellectual property right of SABIC Innovative Plastics Company or any of its subsidiaries or affiliates covering such use or design, or as a recommendation for the use of such material, product or design in the infringement of any patent or other 1) T ypical values only. Variations within normal tolerances are possible for variose colours.All values are measured at least after 48 hours s torage at 230C/50% relative humidity.All properties, expect the melt volume rate are measured on injection m oulded samples.All samples are prepared according to ISO 294.2) O nly typical data for material selection purpose.Not to be used for p art or tool design.3) T his rating is not intended to reflect hazards presented by this or any o ther material under actual fire conditions.4) O wn measurement according to UL.5) Measurements made from laboratory test coupon. Actual shrinkage may vary outside of range due todifferences in processing conditions, equipment, part geometry and tool design. It is recommended that mold shrinkage studies be performed with surrogate or legacy tooling prior to cutting tools for new molded article.。
KANE940手持烟气分析仪使用说明书中文版
KANE940手持烟气分析仪使用指南1.分析仪面板和功能1.1仪器外观和键区1.2仪器外观(背面)1.3标准探针结构1.4分析仪的连接2.安全警报分析仪吸取的相对低浓度的烟气也可能是有毒的。
这些气体从仪器的侧面排出。
仪器只能在良好的通风环境下使用。
使用仪器的相关人员必须是经过培训能胜任,并且了解所有潜在危险的人员。
防电击保护此仪器与Class Ⅲ设备的设计相似,只能与安全特低电压电路相连。
电池充电器设计如下:ClassⅡ设备安装类Ⅱ污染度2仅室内使用高度2000m内环境温度0o C-40o C温度升至31o C,最大相对湿度为80%,40o C时相对湿度线性降低至50%。
主要供应电压的波动不能超过名义电压的10%3.第一次使用电池充电12小时,经过一夜的充电,电池能每天平均高效应用8小时。
主要参数见电池指示器。
KANE940拥有一个可充电的酸性石墨电池,它使用的充电器与其它KANE 分析仪不同。
确保使用正确的充电器,否则仪器将出现故障。
检查你定制的所有项目完整的阅读指南第一次使用分析仪时你需从下面选定:语言选择校准倒数计秒时间CO气体警报NOx浓度计算时间和日期打印标题名和电话号码启动菜单(5.2.5)给出了如何改变以上设置的详细说明。
4.常规开机顺序4.1每次使用分析仪开启前需检查:粒子过滤器是无污染的脱水器和探针内是无水的所有的软管,其它部件,都是连接好的探针取样的是周围洁净的空气设备直立时,脱水器是安装好的烟气温度被连接点击开启按钮开启仪器4.2自动校准分析仪抽取新鲜空气至传感器到允许有毒传感器(如果安装了)被设定为零,氧传感器被设定到20.9%的过程中开启分析仪后将显示标题信息:然后显示倒数计秒屏:校准时间将倒计时至零。
校准时间可能从2-6分钟变化。
见启动菜单(5.25)注意!建议倒数3min使传感器完全稳定。
少于3min会使有毒气体和氧传感器被周围洁净空气冲淡。
为获得引证说明,仪器需在标准压力和温度下标定。
酷派940说明书(版)
精品目录一、写真机主要特点1.1写真机的主要组成部分11.2写真机采用的先进技术21.3连续供墨系统31.4烘干系统41.5打印速度41.5.1四色打印机的打印速度41.5.2六色打印机的打印速度51.6传动系统51.6.1介质收放系统51.6.2介质传送系统61.7电脑配置标准71.8喷头的使用寿命7二、打印机的安装步骤82.1打印机机械部份安装步骤82.2打印机驱动程序安装步骤8三、打印机的软件安装步骤123.1蒙泰软件的安装步骤123.2COTEK软件的安装133.3软件的使用133.4打印结果及错误代码16四、打印机的校准步骤184.1机械部份的校准步骤181精品24.1.1校准导轨的平整度184.1.2光栅尺的调整194.2软件校准步骤21五、数控板的功能简要245.1主控制板的功能简要245.2字车板的功能简要27六、常见问题及解决方法296.1喷头常见故障及解决方法296.2机械部份常见故障及解决方法32七、打印机的日常维护注意事项332精品268.打印机设备必须接上地线;当空气干燥时,静电问题不容忽视,当使用某些背胶和灯片介质时,多带静电电荷(尤其在进纸工作速度很快时);静电电荷可导致机器和墨头安全受损,采取接地线将静电释放是唯一方法。
由于人体本身是一个巨大的静电源,故在带电操作墨头时,确保双手已放电(接触接地金属体或佩带除静电手环),否则易造成墨头个别墨点损坏。
接地要求及方法:接地线线材应采用机械性较强的单股铜线或卷挠线。
接地点不可与建筑物避雷针的地线共用。
线两端应焊接在线销上,一端利用螺栓紧扣在机器控制面板的金底部,另一端则接在建筑物的地线网上或真正埋入地下的水管(注意其导电性是否良好)。
在静电严重情况下,可采取连接多条地线的方法。
9.用裁纸刀裁切介质时应注意不要损伤打印机的主体台,这样会刮花机器台面黑漆,造成介质检测器工作不稳定。
10.墨瓶内的墨量应保持100-400ML左右,墨管中不应有气泡。
CSD-213系列光纤纵联差动保护测控装置说明书(0SF .451.093)_V1.01新
2.5
安全性能 .................................................................................................................................... 3
2.6
热性能(过载能力) ................................................................................................................ 4
7777。 7) 出版号是说明书的版本号,不代表软件版本号。 8) 保护信息点表(含 103、CSC-2000 及 MODBUS 规约)另有相关文
件 ..................................................1
1 概述 ...............................................................1
4.5
事故记录和分析 ........................................................................................................................ 9
4.6
通信.......................................................................................................................................... 11
CPU接口类型
Socket 939
Socket 939是AMD公司2004年6月才推出的64位桌面平台接口标准,目前采用此接口的有高端的Athlon 64以及Athlon 64 FX,具有
939根CPU针脚。Socket 939处理器和与过去的Socket 940插槽是不能混插的,但是,Socket 939仍然使用赏分:10 - 解决时间:2006-5-25 16:45
我想问一下,CPU的接口类型有:LGA775,Socket478,Prescott
这些到底是什么的缩写,什么意思啊。775,478是什么意思啊,是不是CPU芯片的针头数啊,可我记得没这么多啊,好像只有300多根啊,请高手们不要搬书直接的跟我详细说一下,我想了解,谢谢。
Socket 423插槽多是基于Intel 850芯片组主板,支持1.3GHz~1.8GHz的Pentium 4处理器。不过随着DDR内存的流行,英特尔又开发了支
持SDRAM及DDR内存的i845芯片组,CPU插槽也改成了Socket 478,Socket 423接口也就销声匿迹了。
Athlon 64 FX。随着新出的Athlon 64 FX改用Socket 939接口,所以Socket 940将会成为Opteron的专用接口。
Socket 603
Socket 603的用途比较专业,应用于Intel方面高端的服务器/工作站平台,采用此接口的CPU是Xeon MP和早期的Xeon,具有603根
CPU针脚。Socket 603接口的CPU可以兼容于Socket 604插槽。
Socket 604
与Socket 603相仿,Socket 604仍然是应用于Intel方面高端的服务器/工作站平台,采用此接口的CPU是533MHz和800MHz FSB的
W89C940资料
ELANC-PCI (TWISTED-PAIR ETHER-LAN CONTROLLER WITHPCI INTERFACE) GENERAL DESCRIPTIONhe ELANC-PCI (Twisted-pair Ether-LAN Controller with PCI Interface) integrates a W89C902 Serial(ELANC-PCI) LAN Coprocessor for Twisted-Pair (SLCT) and PC/AT PCI bus interface logic into a single chip. The ELANC-PCI provides an easy way of implementing the interface between an IEEE 802.3-compatible Ethernet and a personal computer, ELANC-PCI also provide fast DMA operation to improve the packet transmit and receive performance.The PCI bus is a high performance local bus architecture with low latency random access time. It is a synchronous bus with operation up to 33MHz. The PCI bus interface is designed to provide the registers with the device information required for configuration, recording the status of the lines , control registers, interrupt line and I/O base address registers. It is capable of functioning in a half-duplex environment.The W89C940Fis designed to fully comply with the standard of PCI 2.0 specification. Taking advantage of PCI's nature, W89C940F supports auto-configuration function to free users' depression and confusion on tunning system resources conflict. With extremely high throughput on PCI bus, W89C940F offers a 32 bits data path to highly boost its performance without extra cost. Comparing with LAN card with ISA bus, its improvement is excellent. Besides, it also supports up to 256KB flash memory reserved for various applications, for instance anti-virus, popular drivers, Boot ROM, viewing your PC assets...etc., and what is more, these software are able to be updated on line. This can increase more niche feature on your LAN card, help you get more and bright your company profile. W89C940F is a single chip - build-in PCI bus interface and all necessary circuits - which will let design and board assembly become easy.FEATURES• Fully compatible with IEEE 802.3 standard• Software compatible with Novell NE2000• Complies with PCI Local Bus Specification Revision 2.0•Slave Mode for PCI bus•Fast DMA operation enhancing network access performance•AUI, UTP interface available•Supports one chip 32Kx8 and 16Kx8 SRAM•Supports up to 64KB boot ROM• EEPROM auto-load function after power on reset•EEPROM on-board programming function available•UTP interface polarity auto detection correction function available• UTP/BNC auto media-switching function provided•LED displaying for network segment Link/activity status•Signature register available for device identification•Single 5V power supply with low power consumption•100 Pin PQFPPIN CONFIGURATION505152535455565758596061626364656667686970717273748175767778798082838485868788894948474645444342414039383736353490919293949596979899100123456101178912131415161718192021222324252627282930333231V C C A D 22A D 21A D 20A D 19A D 18A D 17A D 16A D 15CB E #2/F R A M #E I R D Y #T R D Y #D E V S E L #S T O P #G N D V C CP A RC #B E #1A D 14A D 13A D 12A D 11A D 10A D 9A D 8C /B E #0B U S CL KG N D V C CDN G PX T N X T NX R P D C P X R ND C ACT EECSB PC S BR C S B M S A 14\L M S A 13M S A 12MS A 11M S A M M 10S A M S A M S A M S A M S A M S A M S A M S A M S A S A 9876543210V C C X 1X 2G N DTPDP TPDM XRDP XRDM DGND RST#INTA AD31AD30AD29AD28AD27AD26AD25AD24AD23C/BE3#IDSEL DGNDMSWRB MSRDB MSD7MSD6MSD5MSD4MSD3MSD2MSD1MSD0AD0AD1AD2AD3AD4AD5AD6AD7DGND DVCCW89C940(100 PINS)#AVCC D D D D D D D ABLOCK DIAGRAMPIN DESCRIPTIONPCI INTERFACENAME NUMBERTYPE DESCRIPTIONCLK29inClock:Bus clock from PCI bus. All of the PCI signals, except RST#, are synchronized by rising edge of clock.The allowable operating frequency of CLK for W89C940 is from 25MHz to 33MHz.RST#87in Reset:Asynchronous reset signal from PCI bus.AD[31:00]AD31-AD24AD23AD22-AD16AD15-AD8AD7-AD089 - 96992 - 819 - 2633 - 40t/sAddress and Data:Bidirection bus for PCI address and data signals transaction. AD[31:00] is a time division bus. Two phases are used to carry the address and data messages of PCI bus. The address phase is the clock cycle in which FRAME# is aeerted.AD[31:24] contains the most significant byte(MSB) and the AD[7:0] contain the least significant byte(LSB) during the data phase.The data written from host should be stable and valid when IRDY# is asserted. The data driven by W89C940 will be stable and valid when TRDY# is asserted.C/BE[3:0]#C/BE3#C/BE2#C/BE1#C/BE0#9791827t/s inBus Command and Byte Enables:C/BE[3:0]# define the type of bus command during the address phase and the byte enables during the data phase of a transaction. There are 16 types of bus command defined in PCI bus. Four bits of C/BE[3:0]# are used to decode the 16types of bus command. The byte enable determine which byte lanes carry meaningful data.C/BE0# indicate the byte 0(AD[7:0]) is valid. C/BE1# indicate the byte 1(AD[15:8]) is valid. C/BE2# indicate the byte 2(AD[23:16]) is valid. C/BE3# indicate the byte 3(AD[32:24]) is valid.PAR17t/s Parity:Even parity across AD[31:0] and C_BE[3:0]B.W89C940 will drive the PAR in read data phase. The host drives the PAR for address phase and writes data phase. PAR is stable and valid one clock after the address phase. PAR is stable and valid one clock after either IRDY# is asserted on a write transaction or TRDY# is asserted on a read transaction. Once PAR is valid, it remains valid until one clock after the completion of the current data phase.FRAME#10s/t/s inCycle Frame:FRAME# is asserted by host to indicate the beginning of a bus transaction. When FRAME# is deasserted, the transaction is in the final data phase.PCI INTERFACENAME NUMBER TYPE DESCRIPTIONIRDY#11s/t/sin Initiator Ready:Initiator Ready indicates the host's ability to complete the current data phase of transaction. During a write cycle, IRDY# indicates that valid data is presented on AD[31:00]. During a read cycle, it indicates the master is ready to accept the data. The wait cycles are inserted till IRDY# and TRDY# are asserted at the same cycle.TRDY#12s/t/s Target Ready:Target Ready indicates the W89C940's ability to complete the current data phaseof transaction. During a read cycle, TRDY# indicates that valid data is presentedon AD[31:00]. During a write cycle, it indicates the W89C940 is ready to acceptthe data. The wait cycles are inserted till both IRDY# and TRDY# are asserted atthe same cycle.STOP#14s/t/s STOP:Stop indicates W89C940 is requesting the master to stop the current transaction. IDSEL98in Initialization Device Select:IDSEL is used as a chip select during PCI configuration read and writetransaction.DEVSEL#13s/t/s Device Select:DEVSEL# will be asserted when W89C940 decode the correct address.INTA#88o/d Interrupt Request:INTA# is used to request an interrupt service. The interrupt signal can bemasked by the register of IMR( Interrupt Mask Register). INTA# status is kept atISR( Interrupt Status Register).NETWORK INTERFACENAME NUMBER TYPE DESCRIPTIONX1 X25352I/TTLO/TTLCrystal or Oscillator Input.Crystal or oscillator input (X1) and output (X2) pin. If a crystal is used, it shouldbe connected directly to X1 and X2. If an oscillator is selected, X1 is the 20 MHzinput and X2 should be left floating.TXP TXN 7574O/AUIAUI Transmit Output:AUI differential output pair. The data transmitted by DTE will be sent through TXPand TXN in a differential signal with manchest code format. A 270 ohm pull-downresistor is required for each of TXP and TXN. TXP and TXN should be isolatedby a pulse transformer from directly connecting outside loop.NETWORK INTERFACENAME NUMBER TYPE DESCRIPTIONRXP RXN7978I/AUIAUI Receive Input:AUI differential input pair. The data received by network transceiver will be sent back through RXP and RXN in a differential signal format. The RXP and RXN are also should be isolated by a pulse transformer.CDP CDN7776I/AUIAUI Collision Input:AUI differential input pair. The network transceiver will drive a 10MHz differential signal onto CDP and CDN when a collision event is occurred. The CDP and CDN should be isolated by a pulse transformer.XRDP XRDM 8485I/TPITPI Receive Input:10BASE-T receive differential input pair. RXP and RXN should be shunted by a 100 ohms resistor for twisted-pair line impedance matching.TPDP TPDM 8283O/TPITPI Transmit Output:10BASE-T transmit differential output pair. A 1.21K ohm shunt resistor is required across the TXP and TXN for signal pre-equalization.ACT73O/LED Activity Displaying:Network activity displaying. ACT will indicate the network activity status by three types of signals(DC 0 , DC1 and AC 10Hz).DC 0 : indicating "Link Good", if UTP is selected.DC 1 : indicating 1) "Link fail", if UTP is selected.2) "idle", if AUI is selected.AC 10HZ : indicating the DTE is transmitting a packet or the carrier on the network is detected by the transceiver and the carrier sense signal is received by W89C940.The ACT will keep DC 1 if there is an abnormal network collision occurred, f.g.the transceiver collision signal always active.MEMORY INTERFACENAME NUMBER TYPE DESCRIPTIONMSD[7:0]48 - 41B/MOSLocal Memory Data Bus:A bidirection bus for data transfer between the local memory and the W89C940.MSD0 is used as a serial data input pin during the auto configuration duration for hardware reset. The data drove by the DO of EEPROM will clocked into the MSD0 when the EEPROM load operation is active. The Ethernet node ID and optional configuration content will be loaded into chip s registers at this moment.MSD1 is used as a serial data output pin during the auto configuration duration for hardware reset.The command drove by the MSD1 will be clocked into the DI of EEPROM for accessing the content of EEPROM.MSD2 supplies the clock with a period of 1.2 µS for EEPROM during auto configuration duration.MEMORY INTERFACENAME NUMBER TYPE DESCRIPTIONMSRDB 49O/MOS Local Memory Read Enable.An active low signal to enable the local SRAM read.MSWRB 50O/MOS Local Memory Write Enable.An active low signal to enable the local SRAM write.MSA[14:0]69 - 55O/MOSLocal Memory Address B us.Address bus for local memory addressing.The MSA14 will be used as the address strobe signal when the size is larger than 32Kx8. If the ROM size is larger than 32Kx8, B oot ROM address !13-A10 is connected to MSA13-MSA10 and A17-A14 is connected to the latched MSA13-MSA10. The valid address for the higher significant bits(A14,A15,....) will be stable before the BPCSB is active low and should be latched by an external data latch which is triggered by MSA14. The A0 ~ A13 of the B OOT ROM device are connected to MSA0 ~ MSA13 directly no matter the B OOT ROM size is larger than 32Kx8 or not.RCSB 70O/MOS Memory Chip Select:The RCSB is active low.RCSB enables the local memory read/write cycle in conjunction with the MSRDB,MSWRB pins.BPCSB71O/MOS BOOT ROM Chip Select:BPCSB is active low.BPCSB enables the BOOT ROM read cycle during the system booting up.EECS72O/MOS EEPROM Chip Select.The EEPROM read/write operation will be enabled when EECS is active high.POWER PINSNAME NUMBER TYPE DESCRIPTIONDVCC 1, 16, 30,31, 54I Digital Power Supply:5V DC power supply for internal digital logic circuitry.DGND 15, 28, 32,51, 86, 100I Digital Ground:Ground pins for internal digital logic circuitry.AVCC81IAnalog Power Supply:5V DC power supply for internal analog circuitry.POWER PINSNAME NUMBER TYPE DESCRIPTIONAGND80I Analog Ground:Ground pin for internal analog circuitry.It is recommended that there is a decoupling capacitor connected between thepower supply pins and ground pins. A RC low pass filter is also recommended tobe used for analog power supply.Note: Signal Type Definitionin Input is a standard input-only signalout Totem Pole output is a standard active driver.t/s Tri-State is a bi-directional, tri-state input/output pin.s/t/s Sustained Tri-State is an active low tri-state signal owned and driven by one and only one agent at a time. The agent that drives an s/t/s pin low must drive it high for at least one clock beforeletting it float. A new agent cannot start driving a s/t/s signal any sooner than one clock after theprevious owner tri-states it. A pull-up is required to sustain the inactive state until another agentdrives it, and must be provided by the central resource.o/d Open Drain allows multiple devices to share as a wire-OR.FUNCTIONAL DESCRIPTIONIEEE 802.3 MAC FUNCTIONCore Coprocessor (SLCT) OperationThe SLCT core coprocessor has five major logic blocks that control Ethernet operations: the register files,transmit logic, receive logic, FIFO logic, and DMA logic. The relationship between these blocks is depicted in the following block diagram.Register FilesThe register files of the SLCT can be accessed in the same way as the configuration registers. The ELANC-PCI should be in slave mode when the system accesses the register files. The command register (CR) determines the page number of the register file, while the system address SA<0:3> selects one register address from 01H to 0fH. The PCI IO read/write commands are used to activate the I/O operations. Refer to the W89C90 data sheet for more detailed information on the registers.DMA Interface LogicThe SLCT has two types of DMA operations, local DMA and remote DMA.FIFO LogicThe SLCT has a 16-byte FIFO, which acts as an internal buffer to adjust transmission/reception speed differences between DMAs. The FIFO has FIFO threshold pointers to determine the level at which it should initiate a local DMA. The threshold levels are different for reception and transmission. The FIFO threshold levels are defined in the DCR register.The FIFO logic also provides a FIFO overrun and underrun signal for network management purposes. In a case where the receive packets are flooding into the FIFO but the SLCT still does not have the bus authority, the FIFO may be overrun. On the other hand, if a transmission begins before data are fed into the FIFO, it may be underrun. Both cases result in a network error. These types of cases can be prevented by changing the values of the FIFO thresholds.Normally, the data in the FIFO cannot be read; reading FIFO data during normal operation may cause the system to hang. In loopback mode, however, the SLCT allows FIFO data to be read by byte in order to check the correctness of the loopback operation.Receive LogicThe receive logic is responsible for receiving the serial network data and packing the data in byte/word sequence. The receive logic thus has serial to parallel logic in addition to network detection capability.The ELANC-PCI accepts both physical addresses and group addresses (multicast and broadcast addresses).The SLCT extracts the address field from the serial input data. It then determines if the address is acceptable,according to the configurations defined in the receive configuration register (RCR). If the address is not acceptable, the packet reception is aborted. If the address is acceptable, the data packet is sent to the serial to parallel logic before being fed into the FIFO. Data packets can thus be processed either byte or word-wide.After receiving a data packet, the SLCT automatically adds four bytes of data receive status, next packet pointer, and two bytes of receive byte count into the FIFO for network management purposes. The receive status contains the status of the incoming packet, so that the system can determine if the packet is desired. The next packet pointer points to the starting address of the next packet in the local receive ring. The receive byte count is the length of the packet received by the SLCT. Note that the receive byte count may be different from the "length" field specified in the Ethernet packet format. These four bytes of data will be transferred to the local buffer with the last batch of the local DMA. However, these four bytes are stored at the first four addresses before the packet.Transmit LogicThe SLCT must be filled before transmission begins. That is, the local DMA read must begin before the SLCT begins transmission. The SLCT first transmits 62 bits of preamble, then two bits of SFD, and then the data packet. The parallel to serial logic serializes the data from the FIFO into a data packet. After the data packet,the SLCT optionally adds four bytes of cyclic redundancy code (CRC) to the tail of the packet.A protocol PLA determines the network operations of the ELANC-PCI. Collision detection, random backoff, and auto retransmit are implemented in the transmit logic. The protocol PLA ensures that the ELANC-PCI follows IEEE 802.3 protocol.10BASE2 AND 10BASE5 PLS (PHYSICAL LAYER SIGNAL) FUNCTIONSNA OperationFile 1The ELANC-PCI also contains a Serial Network Adapter (SNA), which adapts the Non-Return-to-Zero (NRZ) used in the core processor and host system to Manchester coded network symbols.The SNA contains three blocks: a Phase Locked Loop (PLL), a Manchester encoder/decoder, and a collision decoder, as well as crystal/oscillator logic.The Manchester encoder/decoder handles code interpretation between NRZ signals and Manchester coded signals. The PLL locks the receiving signals with an internal voltage control oscillator (VCO) so that network noise(jitter) can be eliminated before the signals enter the core coprocessor. The collision decoder detects whether the network is in a collision status.10BASE-T MAU FUNCTIONTP Transceiver OperationTransmit DriverThere are two signals for data transmission, TXP and TXN, which connect to the twisted-pair cable via a transmitter filter and an optional common mode choke.Smart SquelchThe main function of this block is to determine when valid data are present on the differential receiving inputs (RXP/RXN). To ensure that impulse noise on the medium will not be taken as a valid datum, this circuit adopts a combination of amplitude and timing measurements to determine the validity of the input signals. To qualify incoming data, the smart squelch circuitry monitors the signals for three peaks of alternating polarity that occur within a 400 nS window. Once this condition has been satisfied, the squelch level is reduced to minimize the noise effect and the chances of causing premature Start Of Idle (SOI) pulse detection. If the receiver detects activity on the receive line while packets are being transmitted, incoming data is qualified on five peaks of alternating polarity so as to prevent false collisions caused by impulse noise. The squelch function returns to its squelch state under any of the following conditions:−A normal Start Of Idle (SOI) signal−An inverted SOI signal−A missing SOI signalA missing SOI signal is assumed when no transitions have occurred on the receiver for 175nS after a packet has arrived. In this case, a normal SOI signal is generated and appended to the data.Collision DetectionA collision occurs when transmit and receive signals occur simultaneously on the twisted pair cable. Collisions will not be reported when the device is in link-fail state. The collision signal is also generated when the transceiver has detected a jabber condition or when the SQE test is being performed.SQE testThe Signal Quality Error (SQE) test is used to test the collision signaling circuitry in the Twisted Pair Transceiver module. After each packet transmission, an SQE signal is sent to the SLCT. The SLCT expects this signal and will flag an error if it does not exist.JabberThe jabber timer monitors the transmitter and disables the transmission if the transmitter is active for greater than 26.2 mS.The jabber will re-enable the transmitter after the SLCT has been idle for at least 420 mS.Link IntegrityDuring periods of inactivity, link pulses are generated and received by both MAUs at either end of the twisted pair to ensure that the cable has not been broken or shorted. A positive, 100 nS Link Integrity signal is generated by the Twisted Pair Transceiver and transmitted on the twisted pair cable every 13 ms during periods of no transmission activity. The ELANC-PCI assumes a link-good state if it senses valid link pulse activity on the Twisted Pair Transceiver receive circuit. If neither receive data nor a link pulse (positive or negative) is detected within 105 mS, the ELANC-PCI enters link-fail state. When a link-fail condition occurs, four consecutive positive link pulses (or eight negative link pulses) must be received before a link-good condition is assumed.LCE CORE ACCESS FUNCTIONLCE core access function (LCE: Lan Controller of Ethernet)The LCE core of the ELANC-PCI can be accessed by programming the register of the LCE core. The ELANC-PCI's register files are mapped into the lower 16 I/O spaces: iobase to iobase+0FH. Any read/write to the ELANC-PCI's registers is an "IN"/"OUT" command to these addresses.Addresses iobase+10H to iobase+17H are mapped to the I/O port for the system to access the contents of the buffer memory. Remote DMA reads and writes correspond to "IN"/"OUT" commands to these addresses.When addresses iobase+18H to +1FH are read a software reset will be issued to the core coprocessor and released about 780nsec later, automatically.The following table summarizes the I/O address mapping:ADDRESS REGISTER OPERATIONiobase+00H - iobase+0FH LCE core's registers Slave register read/writeiobase+10H - iobase+17H I/O Ports Remote DMA read/writeiobase+18H - iobase+1FH Reset Software resetThe buffer memory map for LCE core memory address space is summarized in the following table:NE2000 COMPATIBLE0000H - 001FH ID Registers0020H - 00FFH0100H - 3FFFH Unused4000H - 7FFFH16K X 8 local memory8000H - FFFFH UnusedNODE IDEach node in an Ethernet network has a unique six-byte ID. The node ID is mapped into the memory space of the ELANC-PCI. The ELANC-PCI will load the node ID from the EEPROM after power on reset. The node I.D. should be allocated in the first 3 words(with the address of 00H ~ 02H) of the EEPROM.Bus ArbitrationThe ELANC-PCI handles bus arbitration automatically. The LAN card can operate in four modes: idle state, slave read/write mode, DMA mode, and PCI mode. The ELANC-PCI controls the on-board devices by decoding these modes.At power on, the ELANC-PCI is in idle mode. If a register read/write command is issued, the ELANC-PCI enters the slave read/write mode. If a local DMA or remote DMA is initiated by the ELANC-PCI core coprocessor, the ELANC-PCI enters DMA mode. A PCI command will put the ELANC-PCI into PCI mode. At any given time, the ELANC-PCI can be in only one state. The ELANC-PCI handles state changes automatically. However, two events, such as a DMA command and an PCI command, may be requested at the same time; in this case, the ELANC-PCI allocates the bus on a first-come, first-served basis. No predefined priority is set within the ELANC-PCI.NE2000 MODE DMA FUNCTIONThe ELANC-PCI provides two DMA channels for system access. The remote DMA mode moves data between system memory space and local memory space. The local DMA moves data between the FIFO of the SLCT and local memory space. However, since the SLCT can handle local DMA operations without system intervention (refer to the data sheet for the SLCT), the system has to perform only remote DMA reads/writes.In a transmit operation, the data should be moved to local memory before the system orders the SLCT to start transmission. The remote DMA write moves the data from the PCI bus to the local SRAM. This is simply an "OUT" command on the PC. For a receive operation, the network may feed data constantly and the local memory may become full if the data are not moved out to system memory through a remote DMA read operation. This operation is the "IN" command on the PC.Remote DMAA remote DMA can be performed only in I/O mode. The remote DMA moves data between the host and the local buffers. Unlike a local DMA, the remote DMA is byte or word-wide. Each remote DMA operation transfers four bytes, double-word, depending on the PCI cycle.Since the remote DMA is simply an PCI I/O operation, PCI is sometimes affected by a remote DMA. If the remote DMA is interleaved with other devices, TRDY# is deasserted to force the system to insert wait states. The ELANC-PCI will automatically handle any arbitration necessary.A Double word access on W89C940 from PCI bus is allowed. The buffer memory access will stop when the Remote Byte Counter is decreased to zero. A double word read command will read only three bytes of valid data if remote byte counter is set 3 or two bytes of valid data if the remote byte counter is set 2 respectively. Local DMAThe local DMA transfers data from/to the on-board buffers. To perform data reception or transmission from/to remote nodes in the network, data must be moved from/to the FIFO. To enhance the efficiency of the transmission, the local DMA transfers data in batches: Data are first collected and then moved in a batch. Each transfer can move up to 12 bytes of data at once. This scheme reduces time wasted in requesting the bus.A local DMA begins by requesting the local bus. If the bus is available to the ELANC-PCI, it responds at once by asserting the bus acknowledge; if, on the other hand, the bus is currently authorized to another device, the ELANC-PCI will not assert the bus acknowledge and the SLCT must wait. Note that this sequence will not affect the host system or the PCI bus signals. After each batch is transferred, the SLCT checks the FIFO threshold levels to determine if another batch transfer should be requested.BOOT PROM ACCESS FUNCTIONBoot PROM OperationFor diskless applications, the system requires an on-board boot device. The ELANC-PCI allows the system to use an on-board BOOT PROM as the boot device.The BOOT PROM is essentially a byte-read device. ELANC-PCI will fetch a byte from the BOOT PROM and drive the AD bus of the PCI Interface. If the system do a word read command, the ELANC-PCI will invoke two byte read operation with consecutive address and drove the second byte on another byte of the PCI interface.For double word command, the ELANC-PCI will deassert the TRDY# until four read operation with consecutive address to the BOOT PROM is completed and then the four bytes of data will be drove onto the 32 bits data bus of PCI.W89C940 can support the EPROM and Flash memory with 220nsec access time with the size up to 256KB. In order to support 64KB,128KB and 256KB size with 15-bit address bus, W89C940 use MSA14 to latch the high address bits MSA[17:14] from MSA[13:10]. The structure for address latch is shown as following.74LS373CONFIGURATION PROGRAMMING FUNCTIONELANC-PCI Mode Configuration RegistersMCRA mode configuration register(MCR) is used to program the operation mode of the ELANC-PCI. The address is page 0, 0AH. MCR can be updated by software. Reading this register is the same as reading a register in the SLCT core coprocessor. Writing to these registers is done by first reading the register to be written to and then using a slave write operation to update the configurations.The content of MCR is as following table: BIT SYMBOL DESCRIPTION01PHY0PHY1Physical Layer Interface:These two bits select the type of physical interface which the ELANC-PCI attached on. Both the thin Ehternet and thick Ethernet type use the AUI of ELANC-PCI as the input/output interface. The other two UTP types,then, use the TPI of ELANC-PCI as the input/output interface. The output and input pins of AUI or TPI are idle, when the corresponding type is not selected.PHY1 PHY0 Physical Interface Type0 0 UTP (with 10BASE-T compatible receive squelch level) 0 1 Thin Ethernet1 0 Thick Ethernet (AUI port)1 1 UTP (with reduced receive squelch level)2GDLNKGood Link Status:A read operation on this bit will get the link test status. A "1" indicate that it is link good and a "0" is link fail.The GDLNK do not imply any information if the PHY0 and PHY1 is programmed as Thin or Thick Ethernet.3LNKENLink Test Pulse enable:The network media auto switching function, link integrity test function and the link test pulse generation function will be enabled when LNKEN = "0".Otherwise, all of these functions will be disabled when LNKEN = "1".4SHLSSRAM High/Low Speed Select:High speed SRAM with 20nsec access time is selected if SHLS =1. Low speed SRAM with 70nsec access time is selected if SHLS =0.567BPS0BPS1BPS2BOOT PROM Size:The size of the BOOT PROM is selected by BPS0, BPS1, and BPS2.BPS2 BPS1 BPS0 SIZE 0 0 X No boot PROM 0 1 0 8K 0 1 1 16K 1 0 0 32K 1 0 1 64K 1 1 0 128K 1 1 1 256K。
国外IC厂商中英文对照
A INTECH(美国英特奇公司)A100A-INTECH(美国英特奇公司)A-99AC TEXAS INSTRUMENTS[T1] (美国德克萨斯仪器公司)AC5944AD ANALOG DEVICES (美国模拟器件公司)AD7118AM ADVANCED MICRO DEVICES (美国先进微电子器件公司)AM626AM DATA-INTERSIL (美国戴特-英特锡尔公司AM4902A AN PANASONIC(日本松下电器公司)AN5132AY GENGERAL INSTRUMENTS[G1](美国通用仪器公司)AY3-8118 BA ROHM (日本东洋电具制作所)(日本罗姆公司)BA328BX SONY(日本索尼公司)BX1303CA RCA(美国无线电公司)CA3123CA PHILIPS(荷 兰菲利浦公司)CA3046CA SIGNETICS(美国西格尼蒂克公司)CA3089 CAW RCA(美国无线电公司)CAW8033 CD FAIRCHILD(美国仙童公司)CD74N00 CD RCA(美国无线电公司)CD4081BE CICCM SOLITRON(美国索利特罗器件公司)CM4001AD CS CHERRY SEMICONDUCTOR(美国切瑞半导体器件公司)CS263CT PLESSEY(英国普利西半导体公司)CT1010CX SONY(日本索尼公司)CX108CXA SONY(日本索尼公司)CXA1034 CXD SONY(日本索尼公司)CXD1050A CXK SONY(日本索尼公司)CXK1202S DBL DAEWOO(韩国大宇电子公司)DBL1047 DN PANASONIC(日本松下电器公司)DN74LS73P D…C AECO(日本阿伊阔公司)D4CEA GTE(美国通用电话电子公司微电路部)EA3178 EEA SIGNETICS(美国西格尼蒂克公司)EEA5550 EF THOMSON-CSF(法国汤姆逊半导体公司)FF4443 EFB THOMSON-CSF(法国汤姆逊半导体公司)EFB7510 EGC PHILIPS(荷 兰菲利浦公司)EGC1237 ESM THOMSON-CSF(法国汤姆逊半导体公司)ESM523F FAIRCHILD(美国仙童公司)F4001 FCM FAIRCHILD(美国仙童公司)FCM7040G GTE(美国微电路公司)G157GD GOLD STAR[韩国金星(高尔达)电子公司]GD4001B GL GOLD STAR[韩国金星(高尔达)电子公司]GL1130GM GOLD STAR[韩国金星(高尔达)电子公司]GM3043HA HITACHI(日本日立公司)HA1361HD HITACHI(日本日立公司)HD74LS02 HEF PHILIPS(荷 兰菲利浦公司)HEF4001 HM HITACHI(日本日立公司)HM742114AP HZICL INTERSIL(美国英特锡尔公司)ICL8063CIGIR SHARP[日本夏普(声宝)公司]IR9393IXITT ITT(德国ITT半导体公司)ITT3064 JUKA SAMSUNG(韩国三星电子公司)KA2101 KBKC SONY(日本索尼公司)KC583 KDA SAMSUNG(韩国三星电子公司)KDA0313 KIA KEC(韩国电子公司)KIA6268P KIDKM SAMSUNG(韩国三星电子公司)KM7245P KS SAMSUNG(韩国三星电子公司)KS5806L SGS-ATES SEMICONDUCTOR(意大利SGS-亚特斯半导体公司)L7805ACV L SANYO(日本三洋电气公司)LA SANYO(日本三洋电气公司)LA4102LB SANYO(日本三洋电气公司)LB1405 LC SANYO(日本三洋电气公司)LC4001B LC GENERAL INSTRUMENTS(GI)(美国通用仪器公司)LC1352P LF PHILIPS(荷 兰菲利浦公司)LF198LF NATIONAL SEMICONDUCTOR (美国国家半导体公司)LF357T LH NATIONAL SEMICONDUCTOR (美国国家半导体公司)LH2108A LH SHARP[日本夏普(声宝)公司]LH5003 LM SANYO(日本三洋电气公司)LM8523 LM NATIONAL SEMICONDUCTOR (美国国家半导体公司)LM1800A LM SIGNETICS(美国西格尼蒂克公司)LM387LM FAIRCHILD(美国仙童公司)LM1014A LM SGS-ATES SEMICONDUCTOR(意大利SGS-亚特斯半导体公司)LM317LM PHILIPS(荷 兰菲利浦公司)LM2904 LM MOTOROLA(美国摩托罗拉半导体产品公司)LM833LM SAMSUNG(韩国三星电子公司)LM386LP NATIONAL SEMICONDUCTOR (美国国家半导体公司)LP63JLR SHARP[日本夏普(声宝)公司]LR40992 LSCM SGS-ATES SEMICONDUCTOR(意大利SGS-亚特斯半导体公司)M192M MITSUBISHI(日本三菱电机公司)M51393P MA ANALOG SYSTEMS(美国模拟系统公司)MA106MB FUJITSU(日本富士通公司)MB74LS00P MBM FUJITSU(日本富士通公司)MBM100470 MC MOTOROLA(美国摩托罗拉半导体产品公司)MC13007 MC PHILIPS(荷 兰菲利浦公司)MC3303 MC ANALOG SYSTEMS(美国模拟系统公司)MC114MF MITSUBISHI(日本三菱电机公司)MF1071 MK MOSTEK(美国莫斯特卡公司)MK4116 ML PLESSEY(英国普利西半导体公司)ML231B ML MITEL SEMICONDUCTOR(美国国家半导体公司)ML8804 MLM MOTOROLA(美国摩托罗拉半导体公司)MLM301AGMM NATIONAL SEMICONDUCTOR (美国国家半导体公司)MM5430MN PANASONIC(日本松下电器公司)MN3207MN MICRO NETWORK(美国微网路公司)MH3000HB MP MICRO POWER SYSTEMS(美国微功耗系统公司)MP5071 MPS MICRO POWER SYSTEMS(美国微功耗系统公司)MPS5003 MSM OKI(美国OKI半导体公司)MSM5525 MSM OKI(日本冲电气有限公司)MSM4001RSN SIGNETICS(美国西格尼蒂克公司)N74LS123 NANC NITRON(美国NITRON公司)NC33NE SIGNETICS(美国西格尼蒂克公司)NE540NE PHILIPS(荷 兰菲利浦公司)NE541PHA NE MULLARD(英国麦拉迪公司)NE541PHA NE SGS-ATES SEMICONDUCTOR(意大利SGS-亚特斯半导体公司)NE555NJM NEW JAPAN RADIO(JRC)(新日本无线电公司)NJM387OM PANASONIC(日本松下电器公司)OM200OM SIGNETICS(美国西格尼蒂克公司)OM200PAQGRC RAYTHEON(美国雷声公司)RC4194TK RM RAYTHEON(美国雷声公司)RM5015RH-IX SHARP[日本夏普(声宝)公司]RH-IX0212CE S SIEMENS(德国西门子公司)S572S AMERICAN MICROSYSTEMS(美国微系统公司)S2743SA PHILIPS(荷 兰菲利浦公司)SA532SAA PHILIPS(荷 兰菲利浦公司)SAA1045 SAA SIGNETICS(美国西格尼蒂克公司)SAA1070 SAA GENERAL INSTRUMENTS(GI)(美国通用仪器公司)SAA1025-01 SAA ITT(德国ITT-半导体公司)SAA1173 SAB SIGNETICS(美国西格尼蒂克公司)SAB2024 SAB AEG-TELEFUNKEN(德国德律风根公司)SAB2010 SAF SIGNETICS(美国西格尼蒂克公司)SAF1032 SAK PHILIPS(荷兰菲利浦公司)SAK150BT SAS HITACHI(日本日立公司)SAS560SAS AEG-TELEFUNKEN(德国德律风根公司)SAS6600 SAS SIEMENS(德国西门子公司)SAS5800 SDA SIEMENS(德国西门子公司)SDA5680SC SIGNETICS(美国西格尼蒂克公司)SE SIGNETICS(美国西格尼蒂克公司)SE540SE PHILIPS(荷 兰菲利浦公司)SE5560SFCSG SILICON GENERAL(美国通用硅片公司)SG3731SG MOTOROLA(美国摩托罗拉半导体产品公司)SG3524SG PHILIPS(荷 兰菲利浦公司)SG2524GSH FAIRCHILD(美国仙童公司)SH741SI SANKEN(日本三肯电子公司)SI-1030SK RCA(美国无线电公司)SK9199SL PLESSEY(英国普利西半导体公司)SL624C SN MOTOROLA(美国摩托罗拉半导体产品公司)SN75172 SN TEXAS INSTRUMENTS(TI)(美国德克萨斯仪器公司)SN76635 SND SSS(美国固体科学公司)SND5027 SO SIEMENS(德国西门子公司)SO41ESP PLESSEY(英国普利西半导体公司)SP8735P STK SANYO(日本三洋电气公司)STK040A STR SANKEN(日本三肯电子公司)STR4090A SW PLESSEY(英国普利西半导体公司)SW450T TOSHIBA(日本东芝公司)T1400T GENERAL INSTRUMENTS(GI)(美国通用仪器公司)T1102TA TOSHIBA(日本东芝公司)TA7628 TAA SIGNETICS(美国西格尼蒂克公司)TAA370 TAA SIEMENS(德国西门子公司)TAA991D TAA SGS-ATES SEMICONDUCTOR(意大利SGS-亚特斯半导体公司)TAA611 TAA PRO ELECTRON(欧洲电子联盟)TAA630 TAA PHILIPS(荷 兰菲利浦公司)TAA630S TAA PLESSEY(英国普利西半导体公司)TAA570 TAA MULLARD(英国麦拉迪公司)TAA570 TBA FAIRCHILD(美国仙童公司)TBA641 TBA SIGNETICS(美国西格尼蒂克公司)TBA700 TBA SGS-ATES SEMICONDUCTOR(意大利SGS-亚特斯半导体公司)TBA800 TBA HITACHI(日本日立公司)TBA810 TBA NEC EIECTRON(日本电气公司)TBA810S TBA ITT(德ITT半导体公司)TBA940 TBA AEG-TELEFUNKEN(德国德律风根公司)TBA540 TBA PRO ELECTRON(欧洲电子联盟)TBA810 TBA SIEMENS(德国西门子公司)TBA120SA TBA PLESSEY(英国普利西半导体公司)TBA750 TBA NATIONAL SEMICONDUCTOR (美国国家半导体公司)TBA970 TBA THOMSON-CSF(法国汤姆逊半导体公司)TBA790NSD TBA PHILIPS(荷 兰菲利浦公司)TBA570A TBA MULLARD(英国麦拉迪公司)TBA530 TC TOSHIBA(日本东芝公司)TC9121 TCA ITT(德国ITT半导体公司)TCA270S TCA SIGNETICS(美国西格尼蒂克公司)TCA770 TCA SPRAGUE ELECTRIC(美国史普拉格电子公司)TCA3089 TCA MOTOROLA(美国摩托罗拉半导体产品公司)TCA4500 TCA PRO ELECTRON(欧洲电子联盟)TCA440 TCA PLESSEY(英国普利西半导体公司)TCA800 TCA SGS-ATES SEMICONDUCTOR(意大利SGS-亚特斯半导体公司)TCA3189 TCA MULLARD(英国麦拉迪公司)TCA770SQ TCA PHILIPS(荷 兰菲利浦公司)TCA750Q TCA AEG-TELEFUNKEN(德国德律风根公司)TCA270 TCA SIEMENS(德国西门子公司)TCA440 TCM TEXAS INSTRUMENTS[TI](美国德克萨斯仪器公司)TCM2912B TDTDA SIGNETICS(美国西格尼蒂克公司)TDA1580 TDA SPRAGUE ELECTRIC(美国史普拉格电子公司)TDA1051 TDA MOTOROLA(美国摩托罗拉半导体产品公司)TDA3090P TDA PRO ELECTRON(欧洲电子联盟)TDA1440 TDA NATIONAL SEMICONDUCTOR (美国国家半导体公司)TDA2590 TDA PLESSEY(英国普利西半导体公司)TDA2560 TDA SIEMENS(德国西门子公司)TDA1048 TDA NEC ELECTRON(日本电气公司)TDA1051 TDA AEG-TELEFUNKEN(德国德律风根公司)TDA1083 TDA ITT(德国ITT半导体公司)TDA1950 TDA HITACHI(日本日立公司)TDA2002 TDA SGS-ATES SEMICONDUCTOR(意大利SGS-亚特斯半导体公司)TDA1910 TDA PROELECTRON(欧洲电子联盟)TDA1000 TDA PHILIPS(荷 兰菲利浦公司)TDA4500 TDA RCA(美国无线电公司)TDA1170A TDA MULLARD(英国麦拉迪公司)TDA1051 TDA THOMSON-CSF(法国汤姆逊半导体公司)TDA2540 TDB THOMSON-CSF(法国汤姆逊半导体公司)TDC TRW LSI PRODUCTS(美国TRW大规模集成电路公司)TDC010 TEA THOMSON-CSF(法国汤姆逊半导体公司)TEA5620 TEA PHILIPS(荷 兰菲利浦公司)TEA2026T TEKTBA SIEMENS(德国西门子公司)TBA120SA TBA PLESSEY(英国普利西半导体公司)TBA750 TBA NATIONAL SEMICONDUCTOR (美国国家半导体公司)TBA970 TBA THOMSON-CSF(法国汤姆逊半导体公司)TBA790NSD TBA PHILIPS(荷 兰菲利浦公司)TBA570A TBA MULLARD(英国麦拉迪公司)TBA530 TC TOSHIBA(日本东芝公司)TC9121 TCA ITT(德国ITT半导体公司)TCA270S TCA SIGNETICS(美国西格尼蒂克公司)TCA770 TCA SPRAGUE ELECTRIC(美国史普拉格电子公司)TCA3089 TCA MOTOROLA(美国摩托罗拉半导体产品公司)TCA4500 TCA PRO ELECTRON(欧洲电子联盟)TCA440 TCA PLESSEY(英国普利西半导体公司)TCA800 TCA SGS-ATES SEMICONDUCTOR(意大利SGS-亚特斯半导体公司)TCA3189 TCA MULLARD(英国麦拉迪公司)TCA770SQ TCA PHILIPS(荷 兰菲利浦公司)TCA750Q TCA AEG-TELEFUNKEN(德国德律风根公司)TCA270 TCA SIEMENS(德国西门子公司)TCA440 TCM TEXAS INSTRUMENTS[TI](美国德克萨斯仪器公司)TCM2912B TDTDA SIGNETICS(美国西格尼蒂克公司)TDA1580 TDA SPRAGUE ELECTRIC(美国史普拉格电子公司)TDA1051 TDA MOTOROLA(美国摩托罗拉半导体产品公司)TDA3090P TDA PRO ELECTRON(欧洲电子联盟)TDA1440 TDA NATIONAL SEMICONDUCTOR (美国国家半导体公司)TDA2590TDA PLESSEY(英国普利西半导体公司)TDA2560 TDA SIEMENS(德国西门子公司)TDA1048 TDA NEC ELECTRON(日本电气公司)TDA1051 TDA AEG-TELEFUNKEN(德国德律风根公司)TDA1083 TDA ITT(德国ITT半导体公司)TDA1950 TDA HITACHI(日本日立公司)TDA2002 TDA SGS-ATES SEMICONDUCTOR(意大利SGS-亚特斯半导体公司)TDA1910 TDA PROELECTRON(欧洲电子联盟)TDA1000 TDA PHILIPS(荷 兰菲利浦公司)TDA4500 TDA RCA(美国无线电公司)TDA1170A TDA MULLARD(英国麦拉迪公司)TDA1051 TDA THOMSON-CSF(法国汤姆逊半导体公司)TDA2540 TDB THOMSON-CSF(法国汤姆逊半导体公司)TDC TRW LSI PRODUCTS(美国TRW大规模集成电路公司)TDC010 TEA THOMSON-CSF(法国汤姆逊半导体公司)TEA5620 TEA PHILIPS(荷 兰菲利浦公司)TEA2026T TL TEXAS INSTRUMENTS(TI)(美国德克萨斯仪器公司)TL489TL MOTOROLA(美国摩托罗拉半导体产品公司)TL061TM TOSHIBA(日本东芝公司)TM4503 TMM TOSHIBA(日本东芝公司)TMM841P TMS TEXAS INSTRUMENTS(TI)(美国德克萨斯仪器公司)TMS1976 TOBTP TEXAS INSTRUMENTS(TI)(美国德克萨斯仪器公司)TP4011B TP NATIONAL SEMICONDUCTOR (美国国家半导体公司)TP4011B TPA SIEMENS(德国西门子公司)TPA1047 TRYTUA SIEMENS(德国西门子公司)TUA1000 TVCMU AEG-TELEFUNKEN(德国德律风根公司)U416 UDNUAA SIEMENS(德国西门子公司)UAA190 UC SOLITRON(美国索利特罗器件公司)UC558 ULN SPRAGUE EIECTRIC(美国史普拉格电子公司)ULN2204A ULN SIGNETICS(美国西格尼蒂克公司)ULN2209 ULN MOTOROLA(美国摩托罗拉半导体产品公司)ULN2001A ULS SPRAGUE ELECTRIC(美国史普拉格电子公司)ULS2741D ULX SPRAGUE ELECTRIC(美国史普拉格电子公司)ULX2840A WSXR EXAR INTEGRATED SYSTEMS(美国埃克萨集成系统公司)XR4739 YM YAMAHA(日本雅马哈公司)YM7121B YSZTKΜa MOTOROLA(美国摩托罗拉半导体产品公司)μA7584μA SIGNETICS(美国西格尼蒂克公司)μA758μA PHILIPS(荷 兰菲利浦公司)μA741CD μA FAIRCHILD(美国仙童公司)μA1310PC μAA THOMSON-CSF(法国汤姆逊半导体公司)μAA4000μPA NEC ELECTRON(日本电气公司)μPA53C μPB NEC ELECTRON(日本电气公司)μPB8286μPC NEC ELECTRON(日本电气公司)μPC1018C μPD NEC ELECTRON(日本电气公司)μPD4016D μPD NEC-MIRO(美国 NEC电子公司微电脑分部)μPD416D代理商联系方式供货型号。
940说明书
MG400/940–WD型交流电牵引采煤机说明书鸡西煤矿机械有限公司2007年10月目录第一章概述 (1)第二章左牵引部 (8)第三章右牵引部 (13)第四章截割机构 (15)第五章电控部 (24)第六章行走部 (28)第七章喷雾冷却系统 (31)第八章液压传动系统 (37)第九章辅助装置 (41)第十章采煤机的使用要求 (43)附录1 安标配套件明细 (47)附录2 售后服务 (48)第一章概述第一节简介MG400(450)/940(1040)-WD型交流电牵引采煤机是鸡西煤矿机械有限公司在吸取MG400/985-WD型和MG400/920-WD型交流电牵引采煤机的原有先进性的同时又对现有的国内外同类型采煤机进行广泛调研后,自主开发研制的大功率交流电牵引采煤机。
该机主要用于开发厚度2.4~4.1米,倾角小于15°,含有夹矸等硬煤质(f≤4)、中厚煤层的双高综合机械化工作面。
可在周围空气中的甲烷、煤尘、硫化氢、二氧化碳等不超过<<煤矿安全规程>>中所规定的安全含量的矿井中使用。
该机左右牵引部的齿轮传动部分(除一轴外)可与原MG400/920-WD型交流电牵引采煤机通用,整体为多部电机横向布置,电控系统为机载式,采用计算机控制技术,整个机组,在结构、技术、性能、操作和维护等方面,是目前国内双高综采工作面的理想机型。
总装机功率为940kW,截割功率为2×400kW,牵引功率为2×55kW,调高泵站功率为30kW。
牵引型式为销轨式,操作控制点位置设置在机身中间及两端头处,可直接操作按钮或手把,也可根据用户要求采用无线电发射器离机遥控。
通过调整截割电机,改为2x450kW,总装机功率可达1040kW。
强度完全可满足要求。
第二节整机组成及工作原理一、组成:MG400/940-WD型交流电牵引采煤机,属多部电机横向布置形式,无托架,无过轴,无伞齿传动。
整机由六大部件、三大系统及附属组件、零件、油管、水管、电缆等组成。
新代940I雕铣机配机手册
台湾新代科技(苏州)雕铣控制器070905 LP SYNTEC 940I 配机手册by : 新代科技date : 2008-4-16目录录1.控制器硬體介紹 ......................................错误!未定义书签。
1.1.1外觀尺寸 (2)1.1.2背面接頭說明..................................... 错误!未定义书签。
1.1.3右側接頭說明 (4)1.1.4左側接頭說明..................................... 错误!未定义书签。
1.2I/O模組(PIO-5)....................... 错误!未定义书签。
1.2.1外部輸入介面( X1,X2 ) ............................ 错误!未定义书签。
1.2.2外部輸出介面( Y1,Y2 ) ............................ 错误!未定义书签。
1.2.3第二操作面板........................ 错误!未定义书签。
1.2.4(MPG)接頭,DB15P IN (F)................ 错误!未定义书签。
1.2.5(D/A)接頭,綠色歐規端子 .............. 错误!未定义书签。
1.3軸控規格:........................... 错误!未定义书签。
2 I/O定義總表: ...........................................错误!未定义书签。
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4接線圖: .. (12)4接線圖............................... 错误!未定义书签。
4.1控制系統總圖 ......................... 错误!未定义书签。
万通 离子色谱系统 ic940技术参数
万通离子色谱系统IC940是一款高性能的离子色谱仪,在分析化学领域具有重要的应用价值。
下面将就IC940的技术参数进行介绍。
一、IC940主要技术参数1. 柱温控制:IC940采用先进的柱温控制技术,能够精确控制色谱柱的温度,确保色谱分离结果的稳定性和重复性。
2. 流动相控制:IC940配备了高精度的流动相控制系统,能够精确控制流动相的流速和压力,保证色谱分离过程的稳定性和准确性。
3. 检测器:IC940采用高灵敏度检测器,能够实现对不同离子化合物的灵敏检测,满足复杂样品分析的需求。
4. 数据处理系统:IC940配备了先进的数据处理系统,能够实现对色谱分离结果的快速处理和分析,提高实验效率。
5. 色谱柱:IC940支持各种规格和类型的色谱柱,能够满足不同样品分析的需要。
二、IC940的应用领域1. 环境监测:IC940可用于对环境水样中的离子成分进行分析和监测,如水中的阴离子、阳离子、有机酸等的分离和检测。
2. 药品分析:IC940可用于对药品中的离子成分进行分析,如药品中的氨基酸、有机酸、无机阴阳离子等的分离和检测。
3. 食品安全:IC940可用于对食品中的离子性成分进行分析和检测,如食品中的添加剂、防腐剂等的快速分离和准确检测。
4. 生物医学:IC940可用于对生物样品中的离子成分进行分析,如生物样品中的蛋白质、氨基酸等的分离和检测。
三、IC940的优势和特点1. 高灵敏度:IC940具有高灵敏度的检测器和先进的流动相控制系统,能够实现对微量离子成分的快速、准确检测。
2. 高分辨率:IC940采用先进的柱温控制技术和数据处理系统,能够实现对复杂样品中的离子成分的高分辨率分离。
3. 多样性:IC940支持各种规格和类型的色谱柱,能够满足不同样品分析的需要,具有较强的适用性和通用性。
4. 数据处理:IC940配备了先进的数据处理系统,能够实现对色谱分离结果的快速处理和分析,提高实验效率。
IC940作为一款高性能的离子色谱系统,具有高灵敏度、高分辨率、多样性和快速数据处理等优点,能够满足环境监测、药品分析、食品安全和生物医学等领域对离子成分分析的需求,具有重要的应用价值。
KANE940手持烟气分析仪使用说明书中文版
KANE940手持烟气分析仪使用指南1.分析仪面板和功能1.1仪器外观和键区1.2仪器外观(背面)1.3标准探针结构1.4分析仪的连接2.安全警报分析仪吸取的相对低浓度的烟气也可能是有毒的。
这些气体从仪器的侧面排出。
仪器只能在良好的通风环境下使用。
使用仪器的相关人员必须是经过培训能胜任,并且了解所有潜在危险的人员。
防电击保护此仪器与Class Ⅲ设备的设计相似,只能与安全特低电压电路相连。
电池充电器设计如下:ClassⅡ设备安装类Ⅱ污染度2仅室内使用高度2000m内环境温度0o C-40o C温度升至31o C,最大相对湿度为80%,40o C时相对湿度线性降低至50%。
主要供应电压的波动不能超过名义电压的10%3.第一次使用电池充电12小时,经过一夜的充电,电池能每天平均高效应用8小时。
主要参数见电池指示器。
KANE940拥有一个可充电的酸性石墨电池,它使用的充电器与其它KANE 分析仪不同。
确保使用正确的充电器,否则仪器将出现故障。
检查你定制的所有项目完整的阅读指南第一次使用分析仪时你需从下面选定:语言选择校准倒数计秒时间CO气体警报NOx浓度计算时间和日期打印标题名和电话号码启动菜单(5.2.5)给出了如何改变以上设置的详细说明。
4.常规开机顺序4.1每次使用分析仪开启前需检查:粒子过滤器是无污染的脱水器和探针内是无水的所有的软管,其它部件,都是连接好的探针取样的是周围洁净的空气设备直立时,脱水器是安装好的烟气温度被连接点击开启按钮开启仪器4.2自动校准分析仪抽取新鲜空气至传感器到允许有毒传感器(如果安装了)被设定为零,氧传感器被设定到20.9%的过程中开启分析仪后将显示标题信息:然后显示倒数计秒屏:校准时间将倒计时至零。
校准时间可能从2-6分钟变化。
见启动菜单(5.25)注意!建议倒数3min使传感器完全稳定。
少于3min会使有毒气体和氧传感器被周围洁净空气冲淡。
为获得引证说明,仪器需在标准压力和温度下标定。
amd效劳器socket插槽进展里程
Socket 940Socket 940顾名思义,拥有940个接脚,大体上针脚已布满整个插座,但有四点〔共八只脚〕没接触以幸免误插。
刚推出时Socket 940除效劳器一途外,亦有作为高阶AMD Athlon 64 FX系列的用途。
但由于利用Socket 940的处置器必需利用双通道ECC Registered内存,令到组装电脑的整体价钱上升。
另一方面,Socket 754只利用单通道DDR内存,效能又不及对手。
结果AMD需要推出不支援ECC Registered,但支援双通道DDR内存的Socket 939。
而Socket 940亦作效劳器专用。
由于利用双通道ECC Registered内存,其稳固性及准确度而有所提高。
而市场上亦有双插座、四插座、八插座的Socket 940。
另外尽管 Socket AM2、Socket AM2+ 与 Socket AM3 之间有必然的相容性而且和 Socket 940 一样拥有940个接触点,但二者互不相容。
Socket 939ocket 939是AMD公司2004年6月才发布的64位桌面平台插槽标准,具有939个CPU针脚插孔,支持200MHz外频和1000MHz的HyperTransport总线频率,而且支持双通道内存技术。
目前采纳此种插槽的有面向入门级效劳器/工作站市场的部份Opteron 1XX系列和面向桌面市场的Athlon 64和Athlon 64 FX和Athlon 64 X2,除此之外部份专供OEM厂商的Sempron 也采纳了Socket 939插槽。
Socket FSocket F是第二代 AMD Opteron 处置器(型号:22xx、82xx)所利用的插座之一,拥有双核心、1207个脚位,采纳与LGA 775相似的接触点式设计,并已于2006年8月15日推出。
目前推出的标准版本消耗功率为98W,另外还推出了68W的低温、省电、低消耗功率 HE 系列,产品型号为22xxHE、82xxHE。
不同浓度山梨酸钾对树莓果实品质的影响
不同浓度山梨酸钾对树莓果实品质的影响谷鑫鑫;宋维秀【摘要】为了解不同浓度山梨酸钾对树莓果实贮藏品质的影响,试验设常温17~20℃,冷藏(-1.1±0.4)℃两个贮藏条件;并在两种条件下分别设5个处理组,即在树莓果实中添加不同浓度的山梨酸钾,一个空白对照(不添加保鲜剂),测定各处理组的感官品质、好果率、烂果率、可滴定酸含量等指标.结果表明:冷藏条件更有利于树莓果实保鲜期的延长;两种贮藏条件下,山梨酸钾对树莓果实均具有一定的保鲜作用,且各项指标测定结果较好的处理组其山梨酸钾浓度为0.5 mL/kg.用浓度为0.5mL/kg的山梨酸钾对树莓果实进行保鲜,不仅保鲜效果好,还可延长树莓果实的保鲜期.【期刊名称】《青海大学学报(自然科学版)》【年(卷),期】2018(036)001【总页数】6页(P22-27)【关键词】树莓;山梨酸钾;果实品质【作者】谷鑫鑫;宋维秀【作者单位】青海大学农牧学院,青海西宁 810016;青海大学农牧学院,青海西宁810016【正文语种】中文【中图分类】S663.2树莓(Rubus idaeus),又称木莓、马林果、托盘、覆盆子等,为蔷薇科悬钩子属多年生灌木[1]。
对水、热适应性强,土壤不苛求[2]。
王文芝[3]分析引入树莓的四个地方的营养成分,发现树莓果实中的氨基酸含量比苹果,葡萄等水果的高出1.0%。
树莓果色鲜艳,营养丰富,热稳定性高,是理想的水果加工原料[4]。
FAO 推荐其为“生命之果”[5]。
目前,在青海省乐都县、湟源县及大通县都已大面积种植,发展树莓产业对调整农业产业结构、发展农村经济、促进农民增收和改善生态环境也具有重要意义[6]。
通常,树莓在常温下贮藏就失去其商品价值,这在很大程度上限制了鲜树莓的市场供应及推广。
国内外树莓贮藏保鲜方法主要有速冻低温冻藏法[7]、气调贮藏法[8]、化学保鲜法[9]和臭氧保鲜法[10]等。
而山梨酸钾的安全无毒防腐剂是世界各国所公认的[11],对于肉,鱼,蛋,禽制品,饮料等方面均有所探究[12],山梨酸钾对树莓的保鲜具有经济意义。
kenwood tk-840, 940, 941 w kct-19 选项连接器 编程说明 用于金字
Programming Instructions for:Kenwood TK-840, 940, 941W/ KCT-19 Option ConnectorFor use with:Pyramid CommunicationsModel 2017/2012/2016Revision CDecember 3, 2002Introduction (3)Programming the Pyramid 2017 Merlin or 2012 MDT (3)Programming the Pyramid 2016 (4)Programming the Kenwood TK-x40 Series Mobile (5)Programming the Talk Group info. for a 2017 Merlin or 2012 MDT (5)Feature Options (5)Programming the Talk Group information for a 2016 Base (6)Feature Options (6)Understanding Base Channel Change (7)Configuring your 2016 for Voice Channel Change (7)Connecting the Pyramid to the TK-x40 Radio (8)Connecting the 2017 Merlin and 2012 MDT to the TK-x40 radio (8)Jumper Settings in the 2012 (8)Connecting the 2016 base to the TK-x40 radio (8)IntroductionBefore you begin, you will need to have a copy of KPG-25D v3.01 and programming cable available to program the mobile radio. Also, you will need a copy of the Pyramid 2017/2012 programming software and FY-1 programming cable to program the2017/2012.Your TK-940/941 Mobile Radio MUST be programmed with firmware version 3885 for mobile data applications.Your TK-840 Mobile Radio MUST be programmed with firmware version 9C20 for mobile data applications.The Base Radios need to be programmed with the standard off-the-shelf firmware, such as version 8355.Programming the Pyramid 2017 Merlin or 2012 MDTThe mobile data terminal needs to be programmed to accommodate the polarities of signal that the Kenwood mobile will provide it.If you have not already done so, install the programming software on to your PC by following the instructions in the 2017/2012 service manual.Start running the Pyramid 2017/2012 programming software on your PC. From the Data pull down menu, under the System Data screen, program the unit as shown the figure below.+-----------------------------+-2.5) ¦¦ ¦¦ ¦+-----------------------------+From the Data pull down menu, select your Data Format in the Format Screen. There are three signaling format choices. Chose the format to fit your application.More programming instructions are available in the 2017/2012 Service Manual.Programming the Pyramid 2016Programming of the Pyramid 2016 base modem is done through the console interface. Typically, the parameters are set in the Pyramid Console software, and then automatically sent to the 2016. If you are using Manning NavComp Inc’s RasTrac MX software for you console interface, all configuration is done within the RasTrac I/O processor that runs on your PC simultaneously with the RasTrac mapping software. Consult your RasTrac manual for more information.The figure below shows how a typical Pyramid Console software would be set up when connected to a 2016 and TK-x40 series radio. To access the Modem Parameters menu, select Configure from the pull down menu.¦+ See the Pyramid 2016 service manual for further Pyramid Console software information.The figure below shows how a typical RasTrac I/O processor will be set up whenconnected to a 2016 and TK-x40 series radio. To access the I/O configuration, select the Edit pull down menu from the RasTrac I/O Processor. From theInput/Output Configuration screen, select the Protocol to be PYRAMID. Then click Properties toconfigure the 2016.Programming the Kenwood TK-x40 Series MobileTo begin programming your TK-x40 series mobile for use with the Pyramid Communications Model 2012/2016 mobile data terminal system, you will need to first create a new profile using your KPG-25D programming software.Programming the Talk Group info. for a 2017 Merlin or 2012 MDT When using the TK-x40 series radio in mobile operation along with a Pyramid 2017/ 2012, it is desirable to use a separate talk group for data aside from voice communication. In order to do this, it is necessary to add a talk group for data to the system. The figure below depicts a typical talk group configuration.+-------------------------------------------------------------------------+¦ System No. : 1 Format : Trunking ¦¦-------------------------------------------------------------------------¦¦ ID Opt Group ¦¦ F Grp Enc Dec Grp-Name Call Horn Sig Lockout Trnspnd TlkArnd Data ¦¦ 1 58 58 VOICE CH No No No No No No No ¦Feature OptionsFrom the Edit pull down menu, select Feature Option. Enter the Data screen. In this screen you will need to set the Data System/Group to the System/Group of the Data LTR or Conventional ID in the radio.Set Data PTT with QT/DQT = YesExample: Setting system 1 group 2 as the data group for the radio. This setting is global.Data System/GroupSystem: [1] Group:[2]Programming the Talk Group information for a 2016 BaseThe 2016 base modem operates differently than the 2012 mobile unit. As the 2012 changes talk groups for data and voice, the 2016 requires the radio to be only programmed with the data talk group. This makes the base TK-x40 radio in to a stand-alone data radio. No voice is to be used on the base TK-x40 connected to the 2016.To program the talk group data for a 2016 interface simply add one system and one group to the radio, and do not define any talk group for data. The figure below illustrates a typical talk group setup for a 2016 base unit.+-------------------------------------------------------------------------+¦ System No. : 1 Format : Trunking ¦¦-------------------------------------------------------------------------¦¦ ID Opt Group ¦¦ F Grp Enc Dec Grp-Name Call Horn Sig Lockout Trnspnd TlkArnd Data ¦¦ 1 59 59 DATA CH No No No No No No No ¦Feature OptionsFrom the Edit pull down menu, select Feature Option. Enter the Data screen. In this screen you will need to set the Data System/Group to the System/Group of the Voice* LTR or Conventional ID in the radio.Set Data PTT with QT/DQT = YesExample: Setting system 1 group 2 as the data group for the radio. This setting is global.Data System/GroupSystem: [1] Group:[2]* Remember that you are programming the base radio exactly opposite from the mobile radio as far as which group you define as data.Understanding Base Channel ChangeIn order to understand the operation of data channel change you have to realize that the mobile units are using a dedicated LTR ID code for data and a separate LTR ID code(s) for voice communication. When the MDT sends a message, the mobile radio is switched to the defined data LTR ID; after the transmission is complete, the radio reverts back to the voice ID code. The 2016 base unit receives and responds on the data LTR ID code.A problem arises when the dispatcher needs to send an outbound message (e.g. GPS Poll, Text Message, Horn Honk, etc.). At most times, the mobile units are idle and therefore on the voice LTR ID code. When a message from the base is sent, it is sent on the data LTR ID code, thus the targeted mobile unit does not receive the command from the dispatcher because it is listening on a different LTR ID code.To overcome this obstacle, the 2016 can be configured to change to the voice LTR ID code when sending outbound, base originated messages. As with all base modem installations, a dedicated radio is required for the 2016 base modem.Configuring your 2016 for Voice Channel ChangeThere is a simple wiring harness change is needed to enable the 2016 to activate the channel change line out of the 2016 Base Modem. From the 2016 wiring harness, connect the Teal wire ground. This activates the Grey wire as the Voice Channel Select line.Crimp a Molex pin onto the Grey wire from the Pyramid Communications Model 2016 wiring harness and connect to the Kenwood KCT-19 Pin 15. See figure below of Molex pin layout.Connecting the Pyramid to the TK-x40 RadioOnce all of the programming has been completed, it is time to connect the units to the radios.Connecting the 2017 Merlin and 2012 MDT to the TK-x40 radioThe following are the pin outs for the KCT-19 option connector of the TK-x40 series radios. These connections must be made to the corresponding color-coded cable from the 2012. Install the KCT-19 "E" plug into CN-2.Connections:2012Function RadioBlack/Shield Ground KCT-19 Pin 6White Tx Audio Out KCT-19 Pin 9Blue On-Air Detect KCT-19 Pin 13Green PTT Out KCT-19 Pin 8Red Switched B+ KCT-19 Pin 7Yellow Rx Audio In KCT-19 Pin 4Violet COR KCT-19 Pin 11Brown Audio Mute Out N/CGrey Mic Mute/Channel Select N/CJumper Settings in the 2012J1 [Out] Tx audio levelJ2 [Out] Local PTT LoopConnecting the 2016 base to the TK-x40 radioThe following are the pin outs for the KCT-19 option connector of the TK-x40 series radios. These connections must be made to the corresponding color-coded cable from the 2016. Install the KCT-19 "E" plug into CN-2.Connections:2016Function RadioBlack/Shield Ground KCT-19 Pin 6White Tx Audio Out KCT-19 Pin 9Blue On-Air Detect KCT-19 Pin 13Green PTT Out KCT-19 Pin 8Red Switched B+ KCT-19 Pin 7Yellow Rx Audio In KCT-19 Pin 4Violet COR KCT-19 Pin 11Brown Audio Mute Out N/CGrey Mic Mute/Channel Select KCT-19 Pin 5Teal Enable Channel Change KCT-19 Pin 6。
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CSA940PNP PLASTIC POWER TRANSISTOR CSC2073NPN PLASTIC POWER TRANSISTOR
Power Amplifier Applications and Vertical Output Applications
ABSOLUTE MAXIMUM RATINGS Collector-base voltage (open emitter)V CBO max.150V Collector-emitter voltage (open base)V CEO max.150V Collector current
I C max. 1.5A Total power dissipation up to T C = 25°C P tot max.25W Junction temperature
T j max.150°C
Collector-emitter saturation voltage
I C = 500 mA; I B = 50 mA V CEsat max. 1.5V D.C. current gain
I C = 500 mA; V CE = 10 V
h FE
min.40max.
140
RATINGS (at T A =25°C unless otherwise specified)Limiting values
Collector-base voltage (open emitter)V CBO max.150V Collector-emitter voltage (open base)V CEO max.150V Emitter-base voltage (open collector)
V EBO
max. 5.0V
CSA940, CSC2073
TO-220 Plastic Package Continental Device India Limited
An ISO/TS16949 and ISO 9001 Certified Company
CSA940, CSC2073 Collector current I C max. 1.5A Base current I B max.0.5A Total power dissipation up to T C = 25°C P tot max.25W Total power dissipation up to T A = 25°C P tot max. 1.5W Junction temperature T j max.150ºC Storage temperature T stg–65 to +150ºC CHARACTERISTICS
T a m b = 25°C unless otherwise specified
Collector cutoff current
I E = 0; V CB = 120 V I CBO max.10µA Emitter cut-off current
I C = 0; V EB = 5 V I EBO max.10µA Breakdown voltages
I C = 1 mA; I B = 0V CEO min.150V
I C = 1 mA; I E = 0V CBO min.150V
I E = 1 mA; I C = 0V EBO min. 5.0V Saturation voltages
I C = 500 mA; I B = 50 mA V CEsat max. 1.5V Base emitter on voltage
I C = 500 mA; V CE = 10 V V BE(on)min.0.65V
max.0.85V D.C. current gain
I C = 500 mA; V CE = 10 V h FE min.40
max.140 Output capacitance at f = 1 MHz
I E = 0; V CB = 10 V NPN C o typ.35pF
PNP typ.55pF Transition frequency
I C = 500 mA; V CE = 10 V f T typ.4MHz
Customer Notes
Disclaimer
The product information and the selection guides facilitate selection of the CDIL's Discrete Semiconductor Device(s) best suited for application in your product(s) as per your requirement. It is recommended that you completely review our Data Sheet(s) so as to confirm that the Device(s) meet functionality parameters for your application. The information furnished on the CDIL Web Site/ CD are believed to be accurate and reliable. CDIL however, does not assume responsibility for inaccuracies or incomplete information. Furthermore, CDIL does not assume liability whatsoever, arising out of the application or use of any CDIL product; neither does it convey any license under its patent rights nor rights of others. These products are not designed for use in life saving/support appliances or systems. CDIL customers selling these products (either as individual Discrete Semiconductor Devices or incorporated in their end products), in any life saving/support appliances or systems or applications do so at their own risk and CDIL will not be responsible for any damages resulting from such sale(s).
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