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2级能效 挂壁机 苏宁专供 规格参数

2级能效 挂壁机 苏宁专供 规格参数

挂壁机苏宁专供规格参数系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列HP(匹数) 1HP 1HP 1HP 1HP 1.5HP 1.5HP 1.5HP 1.5HP型号室内机FTXS225NCSXFTXS225NCSSFTXS225NCSRFTXS225NCSWFTZS235NCSXFTZS235NCSSFTZS235NCSRFTZS235NCSW室外机RXS225NCSRXS225NCSRXS225NCSRXS225NCSRZS235NCSRZS235NCSRZS235NCSRZS235NCS遥控器ARC466A4 ARC466A4 ARC466A4 ARC466A4 ARC466A4 ARC466A4 ARC466A4 ARC466A4适用面积*1 制冷/制热㎡10~16/8~1510~16/8~1510~16/8~1510~16/8~1514~19/10~1714~19/10~1714~19/10~1714~19/10~17电源单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz制冷量(min-max) kW2.5(1.3~3.2)2.5(1.3~3.2)2.5(1.3~3.2)2.5(1.3~3.2)3.5(1.25~4.0)3.5(1.25~4.0)3.5(1.25~4.0)3.5(1.25~4.0)制热量(min-max) kW3.4(1.3~4.8)3.4(1.3~4.8)3.4(1.3~4.8)3.4(1.3~4.8)4.2(1.4~5.6)4.2(1.4~5.6)4.2(1.4~5.6)4.2(1.4~5.6)APF(全年能源消耗效率)*2 W·h/(W·h)4.26 4.26 4.26 4.26 4.14 4.14 4.14 4.14尺寸(H×W×D) 室内机㎜283×868×21283×868×21283×868×21283×868×21283×868×21283×868×21283×868×21283×868×21室外机㎜550×658×275550×658×275550×658×275550×658×275550×765×305550×765×305550×765×305550×765×305重量室内机/室外机kg 9/31 9/31 9/31 9/31 9/35 9/35 9/35 9/35 *1 适用面积会因房间所在地区、结构、朝向等实际情况有所不同*2 APF依据国家能效标准GB21455-2013的测试方法得出系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列HP(匹数) 1HP 1HP 1HP 1HP 1.5HP 1.5HP 1.5HP 1.5HP 1.5HP 1.5HP 1.5HP 1.5HP型号室内机FTXS225KCSS5FTXS225KCSX5FTXS225KCSR5FTXS225KCSW5FTXS235KCSS5FTXS235KCSX5FTXS235KCSR5FTXS235KCSW5FTZS235KCSS5FTZS235KCSX5FTZS235KCSR5FTZS235KCSW5室外机RXS225KCS5RXS225KCS5RXS225KCS5RXS225KCS5RXS235KCS5RXS235KCS5RXS235KCS5RXS235KCS5RZS235KCS5RZS235KCS5RZS235KCS5RZS235KCS5 遥控器ARC466A4ARC466A4ARC466A4ARC466A4ARC466A4ARC466A4ARC466A4ARC466A4ARC466A4ARC466A4ARC466A4ARC466A4适用面积*1 制冷/制热㎡10~16/8~1510~16/8~1510~16/8~1510~16/8~1514~19/10~1714~19/10~1714~19/10~1714~19/10~1714~20/10~1814~20/10~1814~20/10~1814~20/10~18电源单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz制冷量(min-max) kW2.5(1.3~3.2)2.5(1.3~3.2)2.5(1.3~3.2)2.5(1.3~3.2)3.5(1.3~3.8)3.5(1.3~3.8)3.5(1.3~3.8)3.5(1.3~3.8)3.5(1.4~4.0)3.5(1.4~4.0)3.5(1.4~4.0)3.5(1.4~4.0)制热量(min-max) kW3.4(1.3~4.4)3.4(1.3~4.4)3.4(1.3~4.4)3.4(1.3~4.4)4.2(1.3~5.0)4.2(1.3~5.0)4.2(1.3~5.0)4.2(1.3~5.0)4.2(1.4~5.5)4.2(1.4~5.5)4.2(1.4~5.5)4.2(1.4~5.5)SEER(制冷季节能效比)*25.22 5.22 5.22 5.22 5.48 5.48 5.48 5.48 5.63 5.63 5.63 5.63 SEER(制冷季节能效比)*34.86 4.86 4.86 4.86 4.53 4.53 4.53 4.53 4.83 4.83 4.83 4.83 尺寸(H×W 室内机㎜283×868×210283×868×210283×868×210283×868×210283×868×210283×868×210283×868×210283×868×210283×868×210283×868×210283×868×210283×868×210×D)室外机㎜550×658×275 550×658×275550×658×275550×658×275550×658×275550×658×275550×658×275550×658×275550×765×285550×765×285550×765×285550×765×285重量室内机/室外机kg9/31 9/31 9/31 9/31 9/31 9/31 9/31 9/31 9/34 9/34 9/34 9/34*1 适用面积会因房间所在地区、结构、朝向等实际情况有所不同*2 SEER值依据国家生产标准GB7725-2004的测试方法得出*3 SEER值依据国家能效标准GB21455-2008的测试方法得出系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列苏宁集团专供系列HP(匹数) 1HP 1HP 1HP 1HP 1.5HP 1.5HP 1.5HP 1.5HP 1.5HP 1.5HP 1.5HP 1.5HP型号室内机FTXS225KCSSFTXS225KCSXFTXS225KCSRFTXS225KCSWFTXS235KCSSFTXS235KCSXFTXS235KCSRFTXS235KCSWFTZS235KCSSFTZS235KCSXFTZS235KCSRFTZS235KCSW 室外机RXS225KCSRXS225KCSRXS225KCSRXS225KCSRXS235KCSRXS235KCSRXS235KCSRXS235KCSRZS235KCSRZS235KCSRZS235KCSRZS235KCS 遥控器ARC46ARC46ARC46ARC46ARC46ARC46ARC46ARC46ARC46ARC46ARC46ARC466A4 6A4 6A4 6A4 6A4 6A4 6A4 6A4 6A4 6A4 6A4 6A4适用面积*1制冷/制热㎡10~16/8~1510~16/8~1510~16/8~1510~16/8~1514~19/10~1714~19/10~1714~19/10~1714~19/10~1714~20/10~1814~20/10~1814~20/10~1814~20/10~18 电源单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz单相220V50Hz制冷量(min-max)kW2.5(1.3~3.2)2.5(1.3~3.2)2.5(1.3~3.2)2.5(1.3~3.2)3.5(1.3~3.8)3.5(1.3~3.8)3.5(1.3~3.8)3.5(1.3~3.8)3.5(1.4~4.0)3.5(1.4~4.0)3.5(1.4~4.0)3.5(1.4~4.0)制热量(min-max)kW3.4(1.3~4.4)3.4(1.3~4.4)3.4(1.3~4.4)3.4(1.3~4.4)4.2(1.3~5.0)4.2(1.3~5.0)4.2(1.3~5.0)4.2(1.3~5.0)4.2(1.4~5.5)4.2(1.4~5.5)4.2(1.4~5.5)4.2(1.4~5.5)SEER(季节能效比)*25.22 5.22 5.22 5.22 5.48 5.48 5.48 5.48 5.63 5.63 5.63 5.63SEER(季节能效比)*34.86 4.86 4.86 4.86 4.53 4.53 4.53 4.53 4.83 4.83 4.83 4.83尺寸(H×W ×D) 室内机㎜283×868×210283×868×210283×868×210283×868×210283×868×210283×868×210283×868×210283×868×210283×868×210283×868×210283×868×210283×868×210 室外机㎜550×65550×65550×65550×65550×65550×65550×65550×65550×76550×76550×76550×768×275 8×275 8×275 8×275 8×275 8×275 8×275 8×275 5×285 5×285 5×285 5×285重量室内机/室外机kg9/31 9/31 9/31 9/31 9/31 9/31 9/31 9/31 9/34 9/34 9/34 9/34*1 适用面积会因房间所在地区、结构、朝向等实际情况有所不同*2 SEER值依据国家生产标准GB7725-2004的测试方法得出*3 SEER值依据国家能效标准GB21455-2008的测试方法得出。

Daikin R-410A系列房间风暖式冷气器产品说明书

Daikin R-410A系列房间风暖式冷气器产品说明书

664 56 5002 02 Jan 2011APARTMENT FAN COILSAVAILABLE WITH FACTORY INSTALLED 5, 7, & 11 kW ELECTRIC HEAT,or NO HEATR −410A SYSTEMS1−1/2 THRU 3 TONSFEATURESS TXV metering device factory installed on all models S Upflow onlyS 22” (559mm)wide galvanized steel cabinet fits between studs (24” (610mm) stud spacing)S All electrical and refrigerant lines enter through top of cabinetS Service access through front of cabinetS Primary and secondary drain fittings exit bottom, left,or right side of cabinetS Replaceable Air filter factory supplied with all models S Copper tube / aluminum fin coil S Sweat connectionsS 5 amp automotive type fuse on control board S Time delay relay (TDR)S Wall −hung kit available as accessory S Decorative grille available as accessoryS Field installed electric heater packages from 5 kW − 11 kW available separatelyS Units tested and certified by manufacturer to achieve a 2% or less leakage rate at 1.0 inch water column S 208/230−1−60 supply voltageWARRANTY*S5 year parts limited warrantyUse of the AHRI Certified TM Mark indicates a manufacturer’s participation in the program. For verification of certification for individual products,go to .− With timely registration, an additional 5 year parts limited warranty* Applies to original purchaser/homeowner, some limitations may apply. See Warranty certificate for complete details.Model Tons Heat (kW)Nom. CFM (L/s)Dimensions H x W x D in.(mm)Filter Size in.(mm)Ship. Weight lbs. (kg)FSA4X1800A 1−1/2none 600 (283)38−1/16 x 22−1/8 x 15−3/16(967 x 562 x 386)16 x 20 x 1(406 x 508 x 25)85 (39)FSA4X1805A 1−1/2590 (41)FSA4X1807A 1−1/2790 (41)FSA4X1811A 1−1/21190 (41)FSA4X2400A 2none 800 (378)87 (40)FSA4X2405A 2592 (42)FSA4X2407A 2792 (42)FSA4X2411A 21192 (42)FSA4X3000A 2−1/2none 1000 (472)90 (41)FSA4X3005A 2−1/2595 (43)FSA4X3007A 2−1/2795 (43)FSA4X3011A 2−1/21195 (43)FSA4X3600A 3none 1200 (566)43−3/16 x 22−1/8 x 18−3/8(1097 x 562 x 467)20 x 20 x 1(508 x 508 x 25)105 (48)FSA4X3605A 35110 (50)FSA4X3607A 37110 (50)FSA4X3611A311110 (50)FSA4XProduct SpecificationsPRODUCT SPECIFICATIONS Apartment Fan Coils: FSA4X2664 56 5002 02FAN COIL MODEL NUMBER IDENTIFICATION GUIDEFSA 4X 18**A 1F = Fan Coil S = Standard PSC MOTOR TYPEA = Apartment INSTALLATION TYPE4 = R −410AREFRIGERANTX = TXVMETERING DEVICE18** = 18,000 BTUH = 1−1/2 tons ** = 00 no electric heat24** = 24,000 BTUH = 2 tons ** = 05, 07, or 11 kW electric heat (factory installed)30** = 30,000 BTUH = 2−1/2 tons 36** = 36,000 BTUH = 3 tons NOMINAL CAPACITYSales CodeEngineering RevisionACCESSORY MODEL NUMBER IDENTIFICATION GUIDEAMWK001CKA1A = Accessory C = Cooling H = HeatingM = Multi −use (Cooling and/or Heating)X = Special PRODUCT TYPESeriesProduct IdentifierProduct Identifier (see below)Sales CodeEngineering Revision Product Identifier CodesAH =Auxiliary Heater CK =Cooling Control KitMK =Wall Mounting Brackets Kit WG =Louvered Wall Panel with FramePRODUCT SPECIFICATIONS Apartment Fan Coils: FSA4X664 56 5002 023DIMENSIONAL DATA Inches (English)Model Size A B C D FSA4X1815−3/168−1/42−3/438−1/16FSA4X2415−3/168−1/42−3/438−1/16FSA4X3015−3/168−1/42−3/438−1/16FSA4X3618−3/89−1/4543−3/16PRODUCT SPECIFICATIONS Apartment Fan Coils: FSA4X4664 56 5002 02DIMENSIONAL DATA MM (SI Metric)Model Size A B C DFSA4X1838621070967FSA4X2438621070967FSA4X3038621070967FSA4X364672351271097PRODUCT SPECIFICATIONSApartment Fan Coils: FSA4X664 56 5002 025PHYSICAL DATAModel Size FSA4X18*FSA4X24*FSA4X30*FSA4X36*TXV factory installed, hard shut −off, bi −flow type for heat pump application FSA4X TXV Size 2 ton 3 tonBlower Data (direct drive, 10” dia x 6” wide blower wheel)CFM [nominal] (L/s)600 (283)800 (378)1000 (472)1200 (566)Motor type2−speed, PSC (Permanent Split Capacitor)HP 1/51/51/31/3Filter Data (replaceable filter factory supplied with unit)Filter Size in. (mm)16 x 20 x 1(406 x 508 x 25)20 x 20 x 1(1097 x 562 x 467)Coil Data (all coils Slope type, 3 rows, 14½ fins per inch, wavy lanced bare aluminum fin)face area ft 2 (m 2)2.25 (0.21) 2.75 (0.26)3.47 (0.32)ConnectionsRefrigerant Liquid in. (mm)3/8 (10) sweat Refrigerant Suction in. (mm)3/4 (19) sweatCondensate Drainin. (mm)3/4 (19) female NPT, Primary and SecondaryELECTRICAL DATAModel 208 / 230V, single phase, 60 HzMotor Full Load Amps (FLA)Factory Installed Heater Model Heater Amps208V / 230V Minimum CircuitAmpacity (MCA)208V / 230VMaximum Fuse/CircuitBreaker Amps (MOCP) 208V / 230VFSA4X1800 1.5none 0 2.515FSA4X1805 1.5MAMWK005AH 18.1 / 20.024.5 / 26.925 / 30FSA4X1807 1.5MAMWK007AH 27.1 / 30.035.8 / 39.440 / 40FSA4X1811 1.5MAMWK011AH 39.8 / 44.051.6 / 56.960 / 60FSA4X2400 1.5none 0 2.515FSA4X2405 1.5MAMWK005AH 18.1 / 20.024.5 / 26.925 / 30FSA4X2407 1.5MAMWK007AH 27.1 / 30.035.8 / 39.440 / 40FSA4X2411 1.5MAMWK011AH 39.8 / 44.051.6 / 56.960 / 60FSA4X3000 1.9none 0 2.515FSA4X3005 1.9MAMWK005AH 18.1 / 20.025.0 / 27.430 / 30FSA4X3007 1.9MAMWK007AH 27.1 / 30.036.3 / 39.940 / 40FSA4X3011 1.9MAMWK011AH 39.8 / 44.052.1 / 57.460 / 60FSA4X3600 2.0none 0 2.515FSA4X3605 2.0MAMWK005AH 18.1 / 20.025.1 / 27.530 / 30FSA4X3607 2.0MAMWK007AH 27.1 / 30.036.4 / 40.040 / 40FSA4X36112.0MAMWK011AH 39.8 / 44.052.3 / 57.560 / 60AIRFLOW PERFORMANCE − CFM at a given Speed and Static readingModel Size Blower Speed Measured Static Pressure, inlet to outlet (inches water column)0.100.200.300.400.500.60FSA4X18High 995955910862811−Low 738711678641600−FSA4X24High 950908861810754693Low 732699662621576527FSA4X30High 112810821030973911845Low 10531011964911854791FSA4X36High 140813551295122711521068Low11911157111310611000931NOTES:1.Airflow based on dry coil at 230V with factory approved filter and 2 element electric heater.2.Not recommended for use above 0.60 inches water column external static pressure.3.Shaded cells indicate airflow is greater than 450 CFM per ton.PRODUCT SPECIFICATIONS Apartment Fan Coils: FSA4X6664 56 5002 02STATIC PRESSURE CORRECTION FROM DRY TO WET COIL (inches of water column)AIRFLOW PERFORMANCE chart was developed using fan coils with DRY coils.When taking a static reading across a WET coil, adjust the static pressure numbers in the AIRFLOW PERFORMANCE chart by adding the values in this table.Model SizeCFM5006007008009001000110012001300FSA4X18.034.049.063−−−−−−FSA4X24.021.033.045.056.068−−−−FSA4X30−−−.056.068.079.090−−FSA4X36−−−−−.055.064.073.081STATIC PRESSURE CORRECTION FOR ELECTRIC HEATERS (inches of water column)AIRFLOW PERFORMANCE chart was developed using fan coils with 2−element electric heaters (7.5 kW or 11 kW).When using a 1−element electric heater (5 kW), or no electric heater, adjust the static pressure numbers in the AIRFLOW PERFORMANCE chart by subtracting the values in this table.ElectricHeaterCFM 5006007008009001000110012001300none .012.018.028.050.075.100.130−−5 kW .002.003.003.015.020.030.050−−ELECTRIC HEATERSPart Number DescriptionHeating Capacity (Btuh)208V 230V AMWK005AH 5 kW, single phase, 208 / 230V, 60 Hz 14,30017,200AMWK007AH 7 kW, single phase, 208 / 230V, 60 Hz 20,70025,000AMWK011AH11 kW, single phase, 208 / 230V, 60 Hz29,70036,000ACCESSORIESDescriptionPart NumberCooling Control KitAMWK001CK Louvered Wall Panel (Decorative Grille) with Frame for model sizes 18, 24, 30 (package of 6)AMWK001WG Louvered Wall Panel (Decorative Grille) with Frame for model size 36 (package of 6)AMWK002WG Wall Mounting (Suspended) Brackets KitAMWK001MKInternational Comfort Products, LLC Lewisburg, T ennessee 37091 USA。

06年之前富士宝电磁炉系列维修资料

06年之前富士宝电磁炉系列维修资料

06年富士宝电磁炉系列维修资料2001年以前的主要电压参数九芯线:第一脚:6.5V左右第二脚:6.8V左右第三脚:1.5V左右第四脚:6.8V左右C12:1.5V左右C16:4V左右ZD4:18V ZD3:12V ZD2:5.6V ZD1:4.7V2002年、2003年的主要电压第一脚:6.5V左右第二脚:6.8V左右第三脚:1.5V左右第四脚:2.5V左右C12:1.5V左右、C16:4V左右ZD4:18V,ZD3:12V,ZD2:5.6V,ZD1:3.6V2004年分体电压①339IC(通调压不带线盘)测得数据。

管脚:1 2 3 4 5 6 7 8 9 10 11 12 13 14电压:0 0 18 5 0.45 0 0 2.48 0 0.1 1.5 0 5 0.2②393IC(通高压,不带线盘)测得数据。

管脚:1 2 3 4 5 6 7 8电压:0 0 1.2 0 8 0 1.3 18③339IC(通高压,不带线盘)测得数据(一体2004年)管脚:1 2 3 4 5 6 7 8 9 10 11 12 13 14电压:0 0 18 5 0.45 0 0 0.1 1.6 2.62 0 0 0.26 5④339IC(通高压,不带线盘)测得数据(P350/360/370电磁炉)管脚:1 2 3 4 5 6 7 8 9 10 11 12 13 14电压:0 0 18 5 0.45 0 0 0 1.23 2.6 0 0 0.22 0⑤393IC(通高压,不带线盘)测得数据(P350/360/370电磁炉)管脚:1 2 3 4 5 6 7 8电压:5 0.1 1.5 0 7.7 0 1.3 18注:R42的电压为2.4V左右,R43的电压为2.6V左右,R43的电压一定要高于R42的电压:0.1V~0.2V之间。

2005年主要电压参数R22:1.8V左右J3:1.7V左右C1:2.8V左右J1:2.6V左右注:C1电压要高于J1、R22电压高于J3,如相反,则不能起动。

AO4924中文资料

AO4924中文资料

AO4924Asymmetric Dual N-Channel Enhancement Mode Field Effect TransistorAO4924SymbolMin TypMaxUnits BV DSS 30V V DS =24V, V GS =0V0.010.1T J =125°C510I GSS 0.1µA V GS(th)Gate Threshold Voltage 1.5 1.852.4V I D(ON)40A 1315.8T J =125°C20.025.015.719.5m Ωg FS 64S V SD 0.40.6V I S4.5A C iss 14501885pF C oss 224pF C rss92pF R g 1.6 3 ΩQ g (10V)24.031Q g (4.5V)12.0nC Q gs 3.9nC Q gd 4.2nC t D(on) 5.5ns t r 4.7ns t D(off)24.0ns t f 4.0ns t rr 1013ns Q rr6.8nCTHIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE.Body Diode Reverse Recovery Time Body Diode Reverse Recovery ChargeI F =9A, dI/dt=300A/µsDrain-Source Breakdown Voltage On state drain currentI D =1mA, V GS =0V V GS =4.5V, V DS =5V V GS =10V, I D =9AReverse Transfer CapacitanceI F =9A, dI/dt=300A/µs V DS =V GS I D =250µA FET1 Electrical Characteristics (T J =25°C unless otherwise noted)STATIC PARAMETERS Parameter Conditions I DSS Zero Gate Voltage Drain Current mA V DS =0V, V GS = ±12V Gate-Body leakage current R DS(ON)Static Drain-Source On-ResistanceForward TransconductanceDiode Forward VoltageMaximum Body-Diode + Schottky Continuous CurrentInput Capacitance Output Capacitance DYNAMIC PARAMETERS m ΩV GS =4.5V, I D =7AI S =1A,V GS =0V V DS =5V, I D =9ATurn-On Rise Time Turn-Off DelayTime V GS =10V, V DS =15V, R L =1.7Ω, R GEN =3ΩTurn-Off Fall TimeTurn-On DelayTime Total Gate Charge V GS =10V, V DS =15V, I D =9AGate Drain Charge V GS =0V, V DS =15V, f=1MHzSWITCHING PARAMETERS Total Gate Charge Gate Source Charge Gate resistance V GS =0V, V DS =0V, f=1MHz A: The value of R θJA is measured with the device in a still air environment with T A =25°C. The power dissipation P DSM and current rating I DSM are based on T (J(MAX)=150°C, using t ≤ 10s junction-to-ambient thermal resistance.B: Repetitive rating, pulse width limited by junction temperature T J(MAX)=150°C.C. The R θJA is the sum of the thermal impedence from junction to lead R θJL and lead to ambient.D. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.E. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The SOA curve provides a single pulse rating. Rev0:Sept. 2006AO4924AO4924AO4924AO4924SymbolMin TypMaxUnits BV DSS 30V 1T J =55°C5I GSS 100nA V GS(th)0.711.5V I D(ON)40A 2024T J =125°C283423.529m Ωg FS 26S V SD 0.711V I S4.5A C iss 9001100pF C oss 88pF C rss 65pF R g0.95 1.5ΩQ g 1012nC Q gs 1.8nC Q gd 3.75nC t D(on) 3.2ns t r 3.5ns t D(off)21.5ns t f 2.7ns t rr 16.820ns Q rr812nCTHIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE.Body Diode Reverse Recovery TimeBody Diode Reverse Recovery Charge I F =7.3A, dI/dt=100A/µsDrain-Source Breakdown Voltage On state drain currentI D =250µA, V GS =0V V GS =4.5V, V DS =5V V GS =10V, I D =7.3AReverse Transfer Capacitance FET2 Electrical Characteristics (T J =25°C unless otherwise noted)STATIC PARAMETERS ParameterConditions I DSS µA Gate Threshold Voltage V DS =V GS I D =250µA V DS =24V, V GS =0VV DS =0V, V GS = ±12V Zero Gate Voltage Drain Current Gate-Body leakage current R DS(ON)Static Drain-Source On-ResistanceForward TransconductanceDiode Forward Voltage I F =7.3A, dI/dt=100A/µsV GS =0V, V DS =15V, f=1MHz SWITCHING PARAMETERS Total Gate Charge V GS =4.5V, V DS =15V, I D =7.3AGate Source Charge Gate Drain Charge Turn-On Rise Time Turn-Off DelayTime V GS =10V, V DS =15V, R L =2Ω, R GEN =6ΩTurn-Off Fall TimeMaximum Body-Diode Continuous CurrentInput Capacitance Output Capacitance Turn-On DelayTime DYNAMIC PARAMETERS Gate resistanceV GS =0V, V DS =0V, f=1MHzm ΩV GS =4.5V, I D =6AI S =1A,V GS =0V V DS =5V, I D =7.3AA: The value of R θJA is measured with the device mounted on 1in 2FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The value in any given application depends on the user's specific board design. The current rating is based on the t ≤ 10s thermal resistance rating.B: Repetitive rating, pulse width limited by junction temperature.C. The R θJA is the sum of the thermal impedence from junction to lead R θJL and lead to ambient.D. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.E. These tests are performed with the device mounted on 1 in 2FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The SOA curve provides a single pulse rating. Rev 0 : Sept. 2006AO4924AO4924。

自助打印机主要配置参数

自助打印机主要配置参数
内置电脑参数规格(默认中配)
配置
中配/i3配置
芯片组
Intel芯片组
硬盘
500G
内存
4G
PC接口
USB、RJ45、VGA、MIC
打印机参数规格
产品型号
HP激光黑白打印机
黑白打印速度
27?页/分钟
彩色打印速度
27页/分钟
首页输出
黑白:?9.0?秒???
打印质量
600 x 600 dpi
每月打印负荷
最高50000页
建议每月打印页
750-4000页
纸盒容量
250页
第二纸盒
250页
外设模块
身份证读卡器
读取二代身份证的身份证号码
鼠标&键盘
光学鼠标、金属数字键盘
178°
整机寿命
>50000小时
工作环境要求
温度:+5℃?~ +35℃???湿度:40% ~ 80%(相对,非减压)
电源要求
AC220V±10%?? ?50Hz/60Hz
触摸屏参数规格
触摸安装方式
嵌入式
触摸识别方式
红外感应式
传输速度
12Mbps
触摸精度
<1.5mm(中心区域),<3.2mm(边缘区域)
点击、书写方式
手指、触摸笔或其他直径>8mm非透明物体
触摸屏分辨率
32767×32767
理论触摸点击次数
无限次
透光率
>92%,最高可达100%
响应速度
<16ms
触摸特性
无需对屏体表面直接施加压力,使用可靠不偏移,免维护,抗光干扰,
?防刮、防暴,防尘、防水,性能稳定技术成熟,适应性强。

国产ds1991L-F5 参数说明书

国产ds1991L-F5 参数说明书

SELOCKEY.SOA§ 1,152-bit secure read/write, nonvolatilememory§ Secure memory cannot be decipheredwithout matching 64-bit password§ Memory is partitioned into 3 blocks of 384bits each§ 64-bit password and ID fields for eachmemory block§ 512-bit scratchpad ensures data transferintegrity§ Operating temperature range: -40°C to+70°C§ Over 10 years of data retentionCOMMON Button FEATURES§ Unique, factory-lasered and tested 64-bitregistration number (8-bit family code + 48-bit serial number + 8-bit CRC tester) assures absolute traceability because no two parts are alike§ Multidrop controller for MicroBUS§ Digital identification and information bymomentary contact§ Chip-based data carrier compactly storesinformation§ Data can be accessed while affixed to object § Economically communicates to bus masterwith a single digital signal at 16.3k bits per second§ Standard 16 mm diameter and 1-Busprotocol ensure compatibility with Button family§ Button shape is self-aligning with cup-shaped probes§ Durable stainless steel case engraved withregistration number withstands harsh environments§ Easily affixed with self-stick adhesivebacking, latched by its flange, or locked with a ring pressed onto its rim§ Presence detector acknowledges when readerfirst applies voltageF5 MICROCAN TMAll dimensions shown in millimetersORDERING INFORMATIONTM1991L-F5F5 MicroCanTM1991MultiKey Button TMTM1991 Button DESCRIPTIONThe TM1991 MultiKey Button is a rugged read/write data carrier that acts as three separate electronic keys, offering 1,152 bits of secure, nonvolatile memory. Each key is 384 bits long with distinct 64-bit password and public ID fields (Figure 1). The password field must be matched in order to access the secure memory. Data is transferred serially via the 1-Bus protocol, which requires only a single data lead and a ground return. The 512-bit scratchpad serves to ensure integrity of data transfers to secure memory. Data should first be written to the scratchpad where it can be read back. After the data has been verified, a copy scratchpad command will transfer the data to the secure memory. This process ensures data integrity when modifying the memory. A 48-bit serial number is factory lasered into each TM1991 to provide a guaranteed unique identity which allows for absolute traceability. The family code for the TM1991 is 02h. The durable MicroCan package is highly resistant to environmental hazards such as dirt, moisture and shock. Its compact button-shaped profile is self-aligning with mating receptacles, allowing the TM1991 to be easily used by human operators. Accessories permit the TM1991 to be mounted on plastic key fobs, photo-ID badges, printed-circuit boards or any smooth surface of an object. Applications include secure access control, debit tokens, work-in-progress tracking, electronic travelers and proprietary data.OPERATIONThe TM1991 is accessed via a single data line using the 1-Bus protocol. The bus master must first provide one of the four ROM Function Commands, 1) Read ROM, 2) Match ROM, 3) Search ROM, 4) Skip ROM. These commands operate on the 64-bit lasered ROM portion of each device and can singulate a specific device if many are present on the 1-Bus line as well as indicate to the bus master how many and what types of devices are present. The protocol required for these ROM Function Commands is described in Figure 9. After a ROM Function Command is successfully executed, the memory functions that operate on the secure memory and the scratchpad become accessible and the bus master may issue any one of the six Memory Function Commands specific to the TM1991. The protocol for these Memory Function Commands is described in Figure 5. All data is read and written least significant bit first.64-BIT LASERED ROMEach TM1991 contains a unique ROM code that is 64 bits long. The first eight bits are a 1-Bus family code. The next 48 bits are a unique serial number. The last eight bits are a CRC of the first 56 bits. (Figure 2.) The 1-Bus CRC is generated using a polynomial generator consisting of a shift register and XOR gates as shown in Figure 3. The polynomial is X8 + X5 + X4 + 1. Additional information about the Dallas 1-Bus Cyclic Redundancy Check is available in the Book of TM19xx Button Standards. The shift register bits are initialized to zero. Then starting with the least significant bit of the family code, one bit at a time is shifted in. After the 8th bit of the family code has been entered, then the serial number is entered. After the 48th bit of the serial number has been entered, the shift register contains the CRC value. Shifting in the eight bits of CRC should return the shift register to all zeros.MEMORY FUNCTION COMMANDSThe TM1991 has six device-specific commands. Three scratchpad commands: Write Scratchpad, Read Scratchpad and Copy Scratchpad and three subkey commands: Write Password, Write Subkey and Read Subkey. After the device is selected, the memory function command is written to the TM1991. The command is comprised of three fields, each one byte long. The first byte is the function code field. This field defines the six commands that can be executed. The second byte is the address field. The first six bits of this field define the starting address of the command. The last two bits of this field are the subkey address code. The third byte of the command is a complement of the second byte (Figure 4).TM1991 For the first use, since the passwords actually stored in the device are unknown, the TM1991 needs to be initialized. This is done by directly writing (i. e., not through the scratchpad) the new identifier and password for the selected subkey using the Write Password command. As soon as the new identifier and password are stored in the device, further updates should be done through the scratchpad.MEMORY MAP Figure 1* Each subkey or the scratchpad has its own unique address.64-BIT LASERED ROM Figure 28-Bit CRC Code48-Bit Serial Number8-Bit Family Code (02H) MSB LSB MSB LSB MSB LSB1-BUS CRC GENERATOR Figure 3TM1991 COMMAND STRUCTURE Figure 42nd byte3rd byte Command1st byteB7 B6B5 B4 B3 B2 B1 B0writescratchpad96H readscratchpad69H 1 1any value00H to 3FHcopyscratchpad3CH0 0 0 0 0 0readSubKey66H writeSubKey99Hany value 10H to 3FHwritepassword5AH Sub-KeyNr.:00or01or100 0 0 0 0 0ones complementof 2nd byteSCRATCHPAD COMMANDSThe 64-byte read/write scratchpad of the TM1991 is not password-protected. Its normal use is to build up a data structure to be verified and then copied to a secure subkey.Write Scratchpad [96H]The Write Scratchpad command is used to enter data into the scratchpad. The starting address for the write sequence is specified in the command. Data can be continuously written until the end of the scratchpad is reached or until the TM1991 is reset. The command sequence is shown in Figure 5, first page, left column.Read Scratchpad [69H]The Read Scratchpad command is used to retrieve data from the scratchpad. The starting address is specified in the command word. Data can be continuously read until the end of the scratchpad is reached or until the TM1991 is reset. The command sequence is shown in Figure 5, first page, center column.Copy Scratchpad [3CH]The Copy Scratchpad command is used to transfer specified data blocks from the scratchpad to a selected subkey. This command should be used when data verification is required before storage in a secure subkey. Data can be transferred in single 8-byte blocks or in one large 64-byte block. There are nine valid block selector codes that are used to specify which block is to be transferred (Figure 6). As a further precaution against accidental erasure of secure data, the 8-byte password of the destination subkey must be entered. If the password does not match, the operation is terminated. After the block of data is transferred to the secure subkey, the original data in the corresponding block of the scratchpad is erased. The command sequence is shown in Figure 5, first page, right column.SUBKEY COMMANDSEach of the subkeys within the TM1991 is accessed individually. Transactions to read and write data to a secured subkey start at the address defined in the command and proceed until the device is reset or the end of the subkey is reached.Write Password [5AH]The Write Password command is used to enter the ID and password of the selected subkey. This command will erase all of the data stored in the secure area as well as overwriting the ID and password fields with the new data. The TM1991 has a built-in check to ensure that the proper subkey was selected. The sequence begins by reading the ID field of the selected subkey; the ID of the subkey to be changed is then written into the part. If the IDs do not match, the sequence is terminated. Otherwise, the subkey contents are erased and 64 bits of new ID data are written followed by a new 64-bit password. The command sequence is shown in Figure 5, 2nd page, right column.MEMORY FUNCTIONS FLOW CHART Figure 5TMTMTMTMMEMORY FUNCTIONS FLOW CHART (cont’d) Figure 5 TMTMTM TMBLOCK SELECTOR CODES OF THE TM1991 Figure 6Block Nr.Address Range LS Byte Codes MS Byte0 to 700 to 3FH56567F51575D5A7F0identifier9A9A B39D646E694C1password9A9A4C629B91694C210H to 17H9A65B3629B6E964C318H to 1FH6A6A436D6B616643420H to 27H9595BC92949E99BC528H to 2FH659A4C9D649169B3630H to 37H6565B39D646E96B3738H to 3FH65654C629B9196B3Write SubKey [99H]The Write Subkey command is used to enter data into the selected subkey. Since the subkeys are secure, the correct password is required to access them. The sequence begins by reading the ID field; the password is then written back. If the password is incorrect, the transaction is terminated. Otherwise, the data following is written into the secure area. The starting address for the write sequence is specified in the command word. Data can be continuously written until the end of the secure subkey is reached or until the TM1991 is reset. The command sequence is shown in Figure 5, 2nd page, center column. Read SubKey [66H]The Read Subkey command is used to retrieve data from the selected subkey. Since the subkeys are secure, the correct password is required to access them. The sequence begins by reading the ID field; the password is then written back. If the password is incorrect, the TM1991 will transmit random data. Otherwise the data can be read from the subkey. The starting address is specified in the command. Data can be continuously read until the end of the subkey is reached or until the TM1991 is reset. The command sequence is shown in Figure 5, 2nd page, left column.1-Bus BUS SYSTEMThe 1-Bus bus is a system which has a single bus master and one or more slaves. In all instances, the TM1991 is a slave device. The bus master is typically a micro-controller. The discussion of this bus system is broken down into three topics: hardware configuration, transaction sequence, and 1-Bus signaling (signal types and timing). A 1-Bus protocol defines bus transactions in terms of the bus state during specified time slots that are initiated on the falling edge of sync pulses from the bus master. For a more detailed protocol description, refer to Chapter 4 of the Book of TM19xx Button Standards.HARDWARE CONFIGURATIONThe 1- bus has only a single line by definition; it is important that each device on the bus be able to drive it at the appropriate time. To facilitate this, each device attached to the 1-Bus bus must have an open drain connections or 3-state outputs. The TM1991 is an open drain part with an internal circuit equivalent to that shown in Figure 7. The bus master can be the same equivalent circuit. If a bidirectional pin is not available, separate output and input pins can be tied together.The bus master requires a pullup resistor at the master end of the bus, with the bus master circuit equivalent to the one shown in Figures 8a and 8b. The value of the pullup resistor should be approximately 5 k W for short line lengths.A multidrop bus consists of a 1-Bus bus with multiple slaves attached. The 1-Bus bus has a maximum data rate of 16.3k bits per second. The idle state for the 1-Bus bus is high. If, for any reason a transactionTM1991needs to be suspended, the bus MUST be left in the idle state if the transaction is to resume. If this does not occur, and the bus is left low for more than 120 m s, one or more of the devices on the bus may be reset.EQUIVALENT CIRCUIT Figure 7BUS MASTER CIRCUIT Figure 8TMTMTMTRANSACTION SEQUENCEThe protocol for accessing the TM1991 via the 1-Bus port is as follows:§Initialization§ROM Function Command§Memory Function Command§Transaction/DataINITIALIZATIONAll transactions on the 1-Bus bus begin with an initialization sequence. The initialization sequence consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the slave(s). The presence pulse lets the bus master know that the TM1991 is on the bus and is ready to operate. For more details, see the “1-Bus Signaling” sectionROM FUNCTION COMMANDSOnce the bus master has detected a presence pulse, it can issue one of the four ROM function commands. All ROM function commands are eight bits long. A list of these commands follows (refer to flowchart in Figure 9).Read ROM [33H]This command allows the bus master to read the TM1991’s 8-bit family code, unique 48-bit serial number and 8-bit CRC. This command can be used only if there is a single TM1991 on the bus. If more than one slave is present on the bus, a data collision will occur when all slaves try to transmit at the same time (open drain will produce a wired-AND result).Match ROM [55H]The match ROM command, followed by a 64-bit ROM sequence, allows the bus master to address a specific TM1991 on a multidrop bus. Only the TM1991 that exactly matches the 64-bit ROM sequence will respond to the subsequent memory function command. All slaves that do not match the 64-bit ROM sequence will wait for a reset pulse. This command can be used with a single or multiple devices on the bus.Skip ROM [CCH]This command can save time in a single drop bus system by allowing the bus master to access the memory functions without providing the 64-bit ROM code. If more than one slave is present on the bus and a read command is issued following the Skip ROM command, data collision will occur on the bus as multiple slaves transmit simultaneously (open drain will produce a wired-AND result).Search ROM [F0H]When a system is initially brought up, the bus master might not know the number of devices on the 1-Wire bus or their 64-bit ROM codes. The Search ROM command allows the bus master to use a process of elimination to identify the 64-bit ROM codes of all slave devices on the bus. The ROM search process is the repetition of a simple 3-step routine: read a bit, read the complement of the bit, then write the desired value of that bit. The bus master performs this simple 3-step routine on each bit of the ROM. After one complete pass, the bus master knows the contents of the ROM in one device. The remaining number of devices and their ROM codes may be identified by additional passes. See Chapter 5 of the Book of TM19xx Button Standards for a comprehensive discussion of a search ROM, including an actual example.1-BUS SIGNALINGThe TM1991 requires strict protocols to ensure data integrity. The protocol consists of four types of signaling on one line: Reset Sequence with Reset Pulse and Presence Pulse, Write 0, Write 1 and Read Data. All these signals except presence pulse are initiated by the bus master. The initialization sequence required to begin any communication with the TM1991 is shown in Figure 10. A reset pulse followed by a presence pulse indicates the TM1991 is ready to send or receive data given the correct ROM command and memory function command. The bus master transmits (TX) a reset pulse (t RSTL , minimum 480 m s).The bus master then releases the line and goes into receive mode (RX). The 1-Bus bus is pulled to a high state via the pullup resistor. After detecting the rising edge on the data pin, the TM1991 waits (t PDH , 15-60m s) and then transmits the presence pulse (t PDL , 60-240 m s).ROM FUNCTIONS FLOW CHART Figure 9TMTMTMTM TMTM TMTMTMTMINITIALIZATION PROCEDURE “RESET AND PRESENCE PULSES” Figure 10480 m s £ t RSTL < ¥ *480 m s £ t RSTH < ¥(includes recovery time)15 m s £ t PDH < 60 m s 60 m s £ t PDL < 240 m s* In order not to mask interrupt signaling by other devices on the 1-Bus bus, tRSTL + t R should alwaysbe less than 960 m s.READ/WRITE TIME SLOTSThe definitions of write and read time slots are illustrated in Figure 11. All time slots are initiated by the master driving the data line low. The falling edge of the data line synchronizes the TM1991 to the master by triggering a delay circuit in the TM1991. During write time slots, the delay circuit determines when the TM1991 will sample the data line. For a read data time slot, if a “0” is to be transmitted, the delay circuit determines how long the TM1991 will hold the data line low overriding the 1 generated by the master. If the data bit is a “1”, the Button will leave the read data time slot unchanged.READ/WRITE TIMING DIAGRAM Figure 11Write-One Time Slot60 m s £ t SLOT < 120 m s1 m s £ t LOW1< 15 m s 1 m s £ t REC < ¥TMREAD/WRITE TIMING DIAGRAM (cont’d) Figure 11Write-Zero Time Slot60 m s < t LOW0 < t SLOT < 120 m s 1 m s < t REC < ¥Read-Data Time Slot60 m s £ t SLOT < 120 m s 1 m s £ t LOWR < 15 m s 0 £ t RELEASE < 45 m s 1 m s £ t REC < ¥t RDV = 15 m s t SU < 1 m sTMPHYSICAL SPECIFICATIONSSize See mechanical drawingWeight 3.3 gramsHumidity 90% RH at 50°CAltitude 10,000 feetExpected Service Life 10 years at 25°C (150 million transactions, see note 4) Safety Meets UL#913 (4th Edit.); Intrinsically Safe Apparatus,Approved under Entity Concept for use in Class I, Division1, Group A, B, C and D LocationsABSOLUTE MAXIMUM RATINGS*Voltage on any Pin Relative to Ground -0.5V to +7.0VOperating Temperature -40°C to +70°CStorage Temperature -40°C to +70°C*This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.DC ELECTRICAL CHARACTERISTICS (V PUP *=2.8V to 6.0V; -40°C to +70°C) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Input Logic Low V IL-0.30.8V1 Input Logic High V IH 2.2 6.0VOutput Logic Low @ 4 mA V OL0.4VOutput Logic High V OH V PUP 6.0V1,2 Input Resistance V IL500k W3* V PUP = external pullup voltageAC ELECTRICAL CHARACTERISTICS (-40°C to 70°C) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Time Slot Period t SLOT60120m sWrite 1 Low Time t LOW1115m sWrite 0 Low Time t LOW060120m sRead Data Valid t RDV exactly 15m sRelease Time t RELEASE01545m sRead Data Setup t SU1m s5 Recovery Time t REC1m sReset Low Time t RSTL480m sReset High Time t RSTH480m s4 Presence Detect High t PDH1560m sPresence Detect Low t PDL60240m sNOTES:1.All voltages are referenced to ground.2.V PUP= external pullup voltage to system supply.3.Input pulldown resistance to ground.4.An additional reset or communication sequence cannot begin until the reset high time has expired.5.Read data setup time refers to the time the host must pull the 1-Bus bus low to read a bit. Data isguaranteed to be valid within 1 m s of this falling edge and will remain valid for 14 m s minimum.。

RT9184A型号的双通道CMOS低功耗电源管理器说明书

RT9184A型号的双通道CMOS低功耗电源管理器说明书

1DS9184A-09 April 2011Featuresz Low Quiescent Current (Typically 440μA)z Guaranteed 500mA Output Currentz Low Dropout Voltage : 600mV at 500mAz Wide Operating Voltage Ranges : 2.8V to 5.5V z Ultra-Fast Transient Response z Tight Load and Line Regulation z Current Limiting Protection z Thermal Shutdown ProtectionzOnly low-ESR Ceramic Capacitors Required for Stabilityz Custom Voltage AvailablezRoHS Compliant and 100% Lead (Pb)-FreePin ConfigurationsApplicationsz CD/DVD-ROM, CD/RWz Wireless LAN Card/Keyboard/Mouse z Battery-Powered Equipment zXDSL RouterDual, Ultra-Fast Transient Response, 500mA LDO RegulatorOrdering InformationGeneral DescriptionThe RT9184A series are an efficient, precise dual-channel CMOS LDO regulator optimized for ultra-low-quiescent applications. Both regulator outputs are capable of sourcing 500mA of output current.The RT9184A's performance is optimized for CD/DVD-ROM,CD/RW or wireless communication supply applications.The RT9184A regulators are stable with output capacitors as low as 1μF. The other features include ultra low dropout voltage, high output accuracy, current limiting protection,and high ripple rejection ratio.The RT9184A regulators are available in fused SOP-8package. Key features include current limit, thermal shutdown, fast transient response, low dropout voltage,high output accuracy, current limiting protection, and high ripple rejection ratio.(TOP VIEW)SOP-8Note :zThe output 2 is designated to larger than or equal to output 1 in voltage code order below, i.e. V OUT2 ≥ V OUT1.For example, the part number of RT9184A-FNCS is assigned for 2.5V OUT1/3.3V OUT2, contrary to the part number of RT9184A-NFCS is opposite to the rule and doesn't exist in the system.Voltage Code for Both Outputs :2: 1.2V A: 2.0V K: 3.0V U: 4.0V 3: 1.3V B: 2.1V L: 3.1V V: 4.1V 4: 1.4V C: 2.2V M: 3.2V W: 4.2V : : : :9: 1.9V J: 2.9V T: 3.9V Z: 4.5VRichTek products are :` RoHS compliant and compatible with the current require-ments of IPC/JEDEC J-STD-020.`Suitable for use in SnPb or Pb-free soldering processes.VOUT1VIN1VOUT2VIN2GNDGND GND GND2DS9184A-09 April 2011Function Block DiagramTypical Application CircuitNote: To prevent oscillation, a 1μF minimum X7R or X5R dielectric is strongly recommended if ceramics are used as input/output capacitors. When using the Y5V dielectric,the minimum value of the input/output capacitance that can be used for stable over full operating temperature range is 3.3μF. (see Application Information Section for further details)V V OUT1V IN2V IN1VIN1VOUT1VIN2GNDVOUT23DS9184A-09 April 2011Absolute Maximum Ratings (Note 1)z Supply Input Voltage ------------------------------------------------------------------------------------------------6.5V zPower Dissipation, P D @ T A = 25°CSOP-8------------------------------------------------------------------------------------------------------------------0.625W zPackage Thermal Resistance (Note 2)SOP-8, θJA ------------------------------------------------------------------------------------------------------------160°C/W z Lead Temperature (Soldering, 10 sec.)-------------------------------------------------------------------------260°C z Junction T emperature -----------------------------------------------------------------------------------------------150°Cz Storage Temperature Range ---------------------------------------------------------------------------------------−65°C to 150°C zESD Susceptibility (Note 3)HBM (Human Body Mode)-----------------------------------------------------------------------------------------2kV MM (Machine Mode)------------------------------------------------------------------------------------------------200VElectrical CharacteristicsRecommended Operating Conditions (Note 4)z Supply Input Voltage ------------------------------------------------------------------------------------------------2.8V to 5.5V zJunction T emperature Range --------------------------------------------------------------------------------------−40°C to 125°C(V IN= V OUT + 1V, or V IN = 2.8V whichever is greater, C IN = 1μF, C OUT = 1μF, T A = 25°C , for each LDO unless otherwise specified)4DS9184A-09 April 2011 Note 1. Stresses listed as the above “Absolute Maximum Ratings ” may cause permanent damage to the device. These arefor stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability.Note 2. θJA is measured in the natural convection at T A = 25°C on a low effective thermal conductivity test board ofJEDEC 51-3 thermal measurement standard.Note 3. Devices are ESD sensitive. Handling precaution recommended.Note 4. The device is not guaranteed to function outside its operating conditions.Note 5. Regulation is measured at constant junction temperature by using a 20ms current pulse. Devices are tested for loadregulation in the load range from 1mA to 500mA.Note 6. The dropout voltage is defined as V IN -V OUT , which is measured when V OUT is V OUT(NORMAL) − 100mV.Note 7. Quiescent, or ground current, is the difference between input and output currents. It is defined by I Q = I IN - I OUT under noload condition (I OUT = 0mA). The total current drawn from the supply is the sum of the load current plus the ground pin current.5DS9184A-09 April 2011Typical Operating CharacteristicsOutput Voltage vs. Temperature3.23.253.33.353.4-50-25255075100125Temperature O u t p u tV o l t a g e (V )(°C)-40Quiescent Current vs. Temperature300350400450500-50-25255075100125Temperature Q u i e s c e n tC u r r e n t (u A ) (°C)-40Current Limit vs. Input Voltage70075080085090033.544.555.5Input Voltage (V)C u r r e n t L i m i t (m A )Current Limit vs. Temperature700750800850900-50-25255075100125Temperature C u r r e n t L i m i t (m A )(°C)-40Load Transient RegulationI O U T 1(100m A /D i v )V O U T 1(20m V /D i v )V O U T 2(20m V /D i v )Time (1ms/Div)V IN1 = V IN2 = 5V, C IN1 = C IN2 = 1uF(X7R)C OUT1 = C OUT2 = 1uF(X7R), I OUT2 = 0A≈≈Load Transient RegulationI O U T 2(100m A /D i v )V O U T 1(20m V /D i v )V O U T 2(20m V /D i v )Time (1ms/Div)V IN1 = V IN2 = 5V, C IN1 = C IN2 = 1uF(X7R)C OUT1 = C OUT2 = 1uF(X7R), I OUT1 = 0A≈≈≈≈6DS9184A-09 April 2011 Dropout Voltage vs. Output Current01002003004005006007008000100200300400500Output Current (mA)D r o p o u t V o l t a g e (m A )Range of Stable ESR0.010.1110100100200300400500Output Current (mA)O u t p u t Ca p a c i t o r E S R (Ω)Output NoiseO u t p u t N o i s e S i g n a l (u V )Time (1ms/Div)V IN1 = 5VI LOAD = 100mAC IN1 = 1uF C OUT1 = 1uF3042-2F = 10Hz to 100kHzLine Transient RegulationI n p u t V o l t a g eD e v i a t i o n (V )O u t p u t V ol t ag e D e v i a t i o n (m V )Time (1ms/Div)V IN1 = 3 to 4V V IN2 = 5V C IN1 = 10uF C OUT1 = 10uF3042-2Power Supply Rejection Ratio-60-50-40-30-20-100101001000100001000001000000Frequency (Hz)P S R R (d B )1k 10k 100k 1M7DS9184A-09 April 2011Application InformationLike any low-dropout regulator, the RT9184A requires input and output decoupling capacitors. The device is specifically designed for portable applications requiring minimum board space and smallest components. These capacitors must be correctly selected for good performance (see Capacitor Characteristics Section). Please note that linear regulators with a low dropout voltage have high internal loop gains which require care in guarding against oscillation caused by insufficient decoupling capacitance.Input CapacitorAn input capacitance of ≅1μF is required between the device input pin and ground directly (the amount of the capacitance may be increased without limit). The input capacitor MUST be located less than 1cm from the device to assure input stability (see PCB Layout Section). A lower ESR capacitor allows the use of less capacitance, while higher ESR type (like aluminum electrolytic) require more capacitance.Capacitor types (aluminum, ceramic and tantalum) can be mixed in parallel, but the total equivalent input capacitance/ESR must be defined as above to stable operation.There are no requirements for the ESR on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will be ≅1μF over the entire operating temperature range.Output CapacitorThe RT9184A is designed specifically to work with very small ceramic output capacitors. The recommended minimum capacitance (temperature characteristics X7R or X5R) are 1μF to 4.7μF range with 10m Ω to 50m Ω range ceramic capacitors between each LDO output and GND for transient stability, but it may be increased without limit.Higher capacitance values help to improve transient.The output capacitor's ESR is critical because it forms a zero to provide phase lead which is required for loop stability. (When using the Y5V dielectric, the minimum value of the input/output capacitance that can be used for stable over full operating temperature range is 3.3μF.)No Load StabilityThe device will remain stable and in regulation with no external load. This is specially important in CMOS RAM keep-alive applications.Input-Output (Dropout) VoltageA regulator's minimum input-to-output voltage differential (dropout voltage) determines the lowest usable supply voltage. In battery-powered systems, this determines the useful end-of-life battery voltage. Because the device uses a PMOS, its dropout voltage is a function of drain-to-source on-resistance, R DS(ON), multiplied by the load current :V DROPOUT = V IN − V OUT = R DS(ON) × I OUT Current LimitThe RT9184A monitors and controls the PMOS' gate voltage, limiting the output current to 500mA (min.). The output can be shorted to ground for an indefinite period of time without damaging the part.Short-Circuit ProtectionThe device is short circuit protected and in the event of a peak over-current condition, the short-circuit control loop will rapidly drive the output PMOS pass element off. Once the power pass element shuts down, the control loop will rapidly cycle the output on and off until the average power dissipation causes the thermal shutdown circuit to respond to servo the on/off cycling to a lower frequency.Please refer to the section on thermal information for power dissipation calculations.Capacitor CharacteristicsIt is important to note that capacitance tolerance and variation with temperature must be taken into consideration when selecting a capacitor so that the minimum required amount of capacitance is provided over the full operating temperature range. In general, a good tantalum capacitor will show very little capacitance variation with temperature,but a ceramicmay not be as good (depending on dielectric type).Aluminum electrolytics also typically have large temperature variation of capacitance value.8DS9184A-09 April 2011 Equally important to consider is a capacitor's ESR change with temperature: this is not an issue with ceramics, as their ESR is extremely low. However, it is very important in tantalum and aluminum electrolytic capacitors. Both show increasing ESR at colder temperatures, but the increase in aluminum electrolytic capacitors is so severe they may not be feasible for some applications.Ceramic :For values of capacitance in the 10μF to 100μF range,ceramics are usually larger and more costly than tantalums but give superior AC performance for by-passing high frequency noise because of very low ESR (typically less than 10m Ω). However, some dielectric types do not have good capacitance characteristics as a function of voltage and temperature.Z5U and Y5V dielectric ceramics have capacitance that drops severely with applied voltage. A typical Z5U or Y5V capacitor can lose 60% of its rated capacitance with half of the rated voltage applied to it. The Z5U and Y5V also exhibit a severe temperature effect, losing more than 50%of nominal capacitance at high and low limits of the temperature range.X7R and X5R dielectric ceramic capacitors are strongly recommended if ceramics are used, as they typically maintain a capacitance range within ±20% of nominal over full operating ratings of temperature and voltage. Of course,they are typically larger and more costly than Z5U/Y5U types for a given voltage and capacitance.Tantalum :Solid tantalum capacitors are recommended for use on the output because their typical ESR is very close to the ideal value required for loop compensation. They also work well as input capacitors if selected to meet the ESR requirements previously listed.Tantalums also have good temperature stability: a good quality tantalum will typically show a capacitance value that varies less than 10~15% across the full temperature range of 125°C to -40°C. ESR will vary only about 2X going from the high to low temperature limits.The increasing ESR at lower temperatures can cause oscillations when marginal quality capacitors are used (if the ESR of the capacitor is near the upper limit of the stability range at room temperature).Aluminum :This capacitor type offers the most capacitance for the money. The disadvantages are that they are larger in physical size, not widely available in surface mount, and have poor AC performance (especially at higher frequencies) due to higher ESR and ESL.Compared by size, the ESR of an aluminum electrolytic is higher than either T antalum or ceramic, and it also varies greatly with temperature. A typical aluminum electrolytic can exhibit an ESR increase of as much as 50X when going from 25°C down to -40°C.It should also be noted that many aluminum electrolytics only specify impedance at a frequency of 120Hz, which indicates they have poor high frequency performance. Only aluminum electrolytics that have an impedance specified at a higher frequency (between 20kHz and 100kHz) should be used for the device. Derating must be applied to the manufacturer's ESR specification, since it is typically only valid at room temperature.Any applications using aluminum electrolytics should be thoroughly tested at the lowest ambient operating temperature where ESR is maximum.PCB LayoutGood board layout practices must be used or instability can be induced because of ground loops and voltage drops.The input and output capacitors MUST be directly connected to the input, output, and ground pins of the device using traces which have no other currents flowing through them.The best way to do this is to layout C IN and C OUT near the device with short traces to the V IN , V OUT , and ground pins.The regulator ground pin should be connected to the external circuit ground so that the regulator and its capacitors have a “single point ground ”.9DS9184A-09 April 2011SOP-8 Board LayoutGNDV IN2GNDGNDV IN1V OUT1V OUT2It should be noted that stability problems have been seen in applications where “vias ” to an internal ground plane were used at the ground points of the device and the input and output capacitors. This was caused by varying ground potentials at these nodes resulting from current flowing through the ground plane. Using a single point ground technique for the regulator and it's capacitors fixed the problem. Since high current flows through the traces going into V IN and coming from V OUT , Kelvin connect the capacitor leads to these pins so there is no voltage drop in series with the input and output capacitors.Optimum performance can only be achieved when the device is mounted on a PC board according to the diagram below :10DS9184A-09 April 2011Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.Richtek Technology CorporationHeadquarter5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C.Tel: (8863)5526789 Fax: (8863)5526611Richtek Technology CorporationTaipei Office (Marketing)5F, No. 95, Minchiuan Road, Hsintien City Taipei County, Taiwan, R.O.C.Tel: (8862)86672399 Fax: (8862)86672377Email:*********************Outline DimensionHM8-Lead SOP Plastic Package。

KyOCERa TASKalfa 420i 520i 说明书

KyOCERa TASKalfa 420i 520i 说明书

符号
U 符号表示相关章节含有安全警告。具体注意要点在符号内标出。 .... [ 一般警告 ] .... [ 触电危险警告 ] .... [ 高温警告 ] 符号表示相关章节含有禁止操作的信息。具体禁止操作内容在符号内标出。 .... [ 禁止操作警告 ] .... [ 禁止拆解 ] z 符号表示相关章节含有必须操作的信息。具体要求操作内容在符号内标出。 .... [ 要求操作警示 ] .... [ 拔下电源插头 ] .... [ 本机务必使用有接地连接的插座 ] 若操作手册的安全警告无法辨识,或操作手册遗失,请与维修服务人员联系,向其索要更换 (付费) 。
注:由于本机具有防伪造功能,因此在少数情况下,本机可能无法正确复印类似银行票据的原稿。
操作手册
i
目录
目录
快速指南 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .vi 小心/警告标签 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ix 安装注意事项 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Schneider Electric 产品数据手册:ABLM1A12010 调节电源供应,100-2

Schneider Electric 产品数据手册:ABLM1A12010 调节电源供应,100-2

T h e i n f o r m a t i o n p r o v i d e d i n t h i s d o c u m e n t a t i o n c o n t a i n s g e n e r a l d e s c r i p t i o n s a n d /o r t e c h n i c a l c h a r a c t e r i s t i c s o f t h e p e r f o r m a n c e o f t h e p r o d u c t s c o n t a i n e d h e r e i n .T h i s d o c u m e n t a t i o n i s n o t i n t e n d e d a s a s u b s t i t u t e f o r a n d i s n o t t o b e u s e d f o r d e t e r m i n i n g s u i t a b i l i t y o r r e l i a b i l i t y o f t h e s e p r o d u c t s f o r s p e c i f i c u s e r a p p l i c a t i o n s .I t i s t h e d u t y o f a n y s u c h u s e r o r i n t e g r a t o r t o p e r f o r m t h e a p p r o p r i a t e a n d c o m p l e t e r i s k a n a l y s i s , e v a l u a t i o n a n d t e s t i n g o f t h e p r o d u c t s w i t h r e s p e c t t o t h e r e l e v a n t s p e c i f i c a p p l i c a t i o n o r u s e t h e r e o f .N e i t h e r S c h n e i d e r E l e c t r i c I n d u s t r i e s S A S n o r a n y o f i t s a f f i l i a t e s o r s u b s i d i a r i e s s h a l l b e r e s p o n s i b l e o r l i a b l e f o r m i s u s e o f t h e i n f o r m a t i o n c o n t a i n e d h e r e i n .Product data sheetCharacteristicsABLM1A12010Regulated Power Supply, 100-240V AC, 12V 1A, single phase, ModularMainRange of product Modicon Power Supply Product or component typePower supplyPower supply type Regulated switch mode Variant option Modular Enclosure material PlasticNominal input voltage 100...240 V AC single phase 100...240 V AC 2 phases Input voltage limits 90...264 V AC Kw Rating 12 W Output voltage 12 V DC Power supply output current1 AComplementaryNominal network frequency 50…60 Hz Network system compatibilityTN TT ITMaximum leakage current 0.25 mA 240 V ACInput protection typeIntegrated fuse (not interchangeable) 3.15 AExternal protection (recommended) 20 A Curve B External protection (recommended) 20 A Curve C External protection (recommended) 2 A Curve B External protection (recommended) 2 A Curve C Inrush current 15 A 115 V 30 A 230 V Power factor 0.51 at 115 V AC 0.40 at 230 V AC Efficiency80 % 115 V AC 80 % 230 V AC Power dissipation in W 3 WCurrent consumption < 0.4 A 115 V AC < 0.25 A 230 V AC Turn-on time < 2 sHolding time> 10 ms 115 V AC > 60 ms 230 V AC Startup with capacitive loads 3000 µF Residual ripple< 100 mV Expected capacitor life time 10 year(s)Meantime between failure [MTBF]3000000 H at 77 °F (25 °C), full load 1000000 h at 131 °F (55 °C), 80 % loadOutput protection typeAgainst overload and short-circuits, protection technology: automatic reset Against over temperature, protection technology: manual reset Against overvoltage, protection technology: manual resetConnections - terminalsScrew connection 0.5...1.5 mm², AWG 20...AWG 16) without wire end ferrule input/outputScrew connection 0.5...1 mm², AWG 20...AWG 18) with wire end ferrule input/output Line and load regulation < 0.5 %line < 1 %loadStatus LED Output voltage 1 LED Green)Depth2.19 in (55.6 mm)Height 3.58 in (91 mm)Maximum Width0.71 in (18 mm)Net Weight0.22 lb(US) (0.101 kg)Output coupling SerialMounting support Top hat type TH35-15 rail conforming to IEC 60715Top hat type TH35-7.5 rail conforming to IEC 60715Double-profile DIN railPanel mountingEnvironmentStandards EN 62368-1EN/IEC 61010-1EN 61010-2-201EN/IEC 61204-3EN 61000-6-1EN 61000-6-2EN 61000-6-3EN 61000-6-4EN 61000-3-2EN 61000-3-3UL 62368-1UL 61010-1UL 61010-2-201CSA C22.2 No 62368-1CSA C22.2 No 61010-1CSA C22.2 No 61010-2-201Product certifications CECUL listedCUL recognizedRCMCB SchemeEACKCNEC class 2Operating altitude< 6561.68 ft (2000 m) overvoltage category III2000 m...5000 m overvoltage category IIShock resistance100 m/s² for 11 msIP degree of protection IP20Ambient air temperature for operation-13…131 °F (-25…55 °C) without current derating)131…158 °F (55…70 °C) with current derating of 2.67 % per °C)Ambient air temperature for storage-40…185 °F (-40…85 °C)Relative humidity0…95 % without condensationOvervoltage category IIElectrical shock protection class Class II without PE connectionPollution degree2Vibration resistance 3 mm 2…9 Hz)IEC 60721-3-310 m/s² 9…200 Hz)IEC 60721-3-3Electromagnetic immunity Immunity to electrostatic discharge - test level: 6 kV (contact discharge)conforming to EN/IEC 61000-4-2Immunity to electrostatic discharge - test level: 9 kV (air discharge) conforming toEN/IEC 61000-4-2Electromagnetic field immunity test 10 V/m 80 MHz...2 GHz) EN/IEC 61000-4-3Electromagnetic field immunity test 5 V/m 2...2.7 GHz) EN/IEC 61000-4-3Electromagnetic field immunity test 3 V/m 2.7...6 GHz) EN/IEC 61000-4-3Immunity to fast transients - test level: 4 kV (on input-output) conforming to EN/IEC 61000-4-4Surge immunity test - test level: 3 kV (between power supply and earth)conforming to EN/IEC 61000-4-5Surge immunity test - test level: 1.5 kV (between phases) conforming to EN/IEC61000-4-5Immunity to conducted disturbances 10 Vrms 0.15...80 MHz) EN/IEC 61000-4-6Immunity to magnetic fields - test level: 30 A/m (50...60 Hz) conforming to EN/IEC 61000-4-8Immunity to voltage dips 100 % 1 cycle) EN/IEC 61000-4-11Immunity to voltage dips 60 % 10 cycles) EN/IEC 61000-4-11Immunity to voltage dips 30 % 25 cycles) EN/IEC 61000-4-11Disturbing field emission conforming to EN 55016-2-3Limits for harmonic current emissions conforming to EN 61000-3-2Conducted disturbance emission conforming to EN 55016-1-2Conducted disturbance emission conforming to EN 55016-2-1Electromagnetic emission Conducted emissions conforming to EN 61000-6-3Radiated emissions conforming to EN 61000-6-4Dielectric strength3000 V AC input/outputOrdering and shipping detailsCategory22525 - ABL8 AND ABL7 POWER SUPPLIEDiscount Schedule CP12GTIN00785901699200Nbr. of units in pkg.1Package weight(Lbs)1 lb(US) (0.45 kg)Returnability YesOffer SustainabilitySustainable offer status Green Premium productCalifornia proposition 65WARNING: This product can expose you to chemicals including: Lead andlead compounds, which is known to the State of California to cause cancerand birth defects or other reproductive harm. For more information go toREACh Regulation REACh DeclarationEU RoHS Directive Pro-active compliance (Product out of EU RoHS legal scope)EU RoHSDeclarationMercury free YesRoHS exemption information YesChina RoHS Regulation China RoHS DeclarationEnvironmental Disclosure Product Environmental ProfileCircularity Profile End Of Life InformationWEEE The product must be disposed on European Union markets following specificwaste collection and never end up in rubbish bins.Dimensions DrawingsElectrical Safety●If the unit is use in a manner not specified by the manufacturer, the protection provided by the equipment may be impaired.●For means of disconnection a switch or circuit breaker, located near the product, must be included in the installation. A marking asdisconnecting device for the product is required.●The device has an internal fuse. The unit is tested and approved with branch circuit protective device up to 20A. This circuit breaker canbe used as disconnecting device.●The power supply is only suitable for audio, video, information, communication, industrial and control equipment.DimensionsSide and Rear ViewConnections and SchemaConnections and SchemaSeries Connection(1) :V out1(2) :V out2(3) : 2 x Diode, V RRM > 2 x V out1/2, I F > 2 x I nom1/2(4) :V Load = 2 x V out (5) :LoadConnections and Schema(1) :AmbientPerformance CurvesPerformance CurveX :Ambient Temperature (ºC)Y :Percentage of Max Load (%)1 :Mounting A & B, altitude 2000M 2 :Mounting A & B, altitude 5000MMounting and ClearanceMountingMounting Position AMounting Position BIncorrect Mounting。

艾尔顿199129产品说明书

艾尔顿199129产品说明书

Eaton 199129Eaton Moeller® series Rapid Link - DOL starter, 6.6 A, Sensorinput 4, Actuator output 2, PROFINET, HAN Q4/2, with manualoverride switchGeneral specificationsEaton Moeller® series Rapid Link DOLstarter1991294015081971879120 mm270 mm220 mm 1.83 kgCCCIEC/EN 60947-4-2 UL approval RoHSCEUL 60947-4-2Assigned motor rating: for normal internally and externally ventilated 4 pole, three-phase asynchronous motors with 1500 rpm at 50 Hz or 1800 min at 60 HzRAMO5-D420PNT-412RS1Product Name Catalog NumberEANProduct Length/Depth Product Height Product Width Product Weight Certifications Catalog NotesModel CodeParameterization: FieldbusParameterization: KeypadParameterization: drivesConnect mobile (App) Parameterization: drivesConnectKey switch position OFF/RESETKey switch position HAND2 Actuator outputsThermistor monitoring PTCTwo sensor inputs through M12 sockets (max. 150 mA) for quick stop and interlocked manual operationElectronic motor protectionKey switch position AUTOManual override switchThermo-clickShort-circuit releaseExternal reset possibleTemperature compensated overload protection CLASS 10 AIP65NEMA 12Class A10,000,000 Operations (at AC-3)10,000,000 Operations (at AC-3)Direct starter0.3 A6.6 AIIIMotor starterPROFINET IO4000 VAC voltageCenter-point earthed star network (TN-S network) Phase-earthed AC supply systems are not permitted.DOL starterDCFeatures Fitted with:Functions ClassDegree of protectionElectromagnetic compatibility Lifespan, electricalLifespan, mechanicalModelOverload release current setting - min Overload release current setting - max Overvoltage categoryProduct categoryProtocolRated impulse withstand voltage (Uimp) System configuration typeTypeVoltage typeVertical15 g, Mechanical, According to IEC/EN 60068-2-27, 11 ms, Half-sinusoidal shock 11 ms, 1000 shocks per shaftResistance: 10 - 150 Hz, Oscillation frequencyResistance: 57 Hz, Amplitude transition frequency on accelerationResistance: 6 Hz, Amplitude 0.15 mmResistance: According to IEC/EN 60068-2-6Max. 1000 mMax. 2000 mAbove 1000 m with 1 % performance reduction per 100 m -10 °C55 °C-40 °C70 °CIn accordance with IEC/EN 50178< 95 %, no condensationAdjustable, motor, main circuit0.3 - 6.6 A, motor, main circuit6.6 A (at 150 % Overload)Maximum of one time every 60 seconds 380 - 480 V (-15 %/+10 %, at 50/60 Hz) 20 - 35 ms20 - 35 ms50/60 HzAC-53a47 Hz 3 HP10 kA0 AType 1 coordination via the power bus' feeder unit, Main circuit0 V0 V0 VMounting position Shock resistance Vibration AltitudeAmbient operating temperature - min Ambient operating temperature - max Ambient storage temperature - min Ambient storage temperature - max Climatic proofingCurrent limitationInput currentMains switch-on frequency Mains voltage tolerance Off-delayOn-delayOutput frequency Overload cycleRated frequency - min Rated frequency - max Assigned motor power at 460/480 V, 60 Hz, 3-phaseRated conditional short-circuit current (Iq)Rated conditional short-circuit current (Iq), type 2, 380 V, 400 V, 415 VShort-circuit protection (external output circuits)Rated control supply voltage (Us) at AC, 50 Hz - minRated control supply voltage (Us) at AC, 50 Hz - maxRated control supply voltage (Us) at AC, 60 Hz - min63 Hz6.6 A6.6 A0.09 kW3 kW0 kW3 kW480 V AC, 3-phase400 V AC, 3-phase50/60 Hz, fLN, Main circuitAC voltageCenter-point earthed star network (TN-S network) Phase-earthed AC supply systems are not permitted.0 V0 V0 V24 V DC (-15 %/+20 %, external via AS-Interface® plug) Connections pluggable in power section210 m, Radio interference level, maximum motor cable lengthMeets the product standard's requirements. Meets the product standard's requirements. Meets the product standard's requirements. Meets the product standard's requirements.Rapid Link 5 - brochureDA-SW-drivesConnectDA-SW-Driver DX-CBL-PC-3M0DA-SW-drivesConnect - installation helpDA-SW-USB Driver DX-COM-STICK3-KITDA-SW-drivesConnect - InstallationshilfeDA-SW-USB Driver PC Cable DX-CBL-PC-1M5Material handling applications - airports, warehouses and intra-logistics eaton-bus-adapter-rapidlink-reversing-starter-dimensions-003.epsRated operational current (Ie) at 150% overloadRated operational current (Ie) at AC-3, 380 V, 400 V, 415 V Rated operational power at 380/400 V, 50 Hz - minRated operational power at 380/400 V, 50 Hz - maxRated operational power at AC-3, 220/230 V, 50 HzRated operational power at AC-3, 380/400 V, 50 HzRated operational voltageSupply frequencySystem configuration type Rated control supply voltage (Us) at AC, 60 Hz - max Rated control supply voltage (Us) at DC - minRated control supply voltage (Us) at DC - maxRated control voltage (Uc)ConnectionNumber of auxiliary contacts (normally closed contacts) Number of auxiliary contacts (normally open contacts)Cable length10.2.2 Corrosion resistance10.2.3.1 Verification of thermal stability of enclosures10.2.3.2 Verification of resistance of insulating materials to normal heat10.2.3.3 Resist. of insul. mat. to abnormal heat/fire by internal elect. effects10.2.4 Resistance to ultra-violet (UV) radiation Brochure DisegniMeets the product standard's requirements.Does not apply, since the entire switchgear needs to be evaluated.Does not apply, since the entire switchgear needs to be evaluated.Meets the product standard's requirements.Does not apply, since the entire switchgear needs to be evaluated.Meets the product standard's requirements.Does not apply, since the entire switchgear needs to be evaluated.Does not apply, since the entire switchgear needs to be evaluated.Is the panel builder's responsibility.Is the panel builder's responsibility.Is the panel builder's responsibility.Is the panel builder's responsibility.Is the panel builder's responsibility.The panel builder is responsible for the temperature rise calculation. Eaton will provide heat dissipation data for the devices.Is the panel builder's responsibility. The specifications for the switchgear must be observed.Is the panel builder's responsibility. The specifications for the eaton-bus-adapter-rapidlink-reversing-starter-dimensions-002.eps eaton-bus-adapter-rapidlink-speed-controller-dimensions-002.eps eaton-bus-adapter-rapidlink-speed-controller-dimensions-003.epsETN.RAMO5-D420PNT-412RS1.edzIL034092ZUramo5_v13.stpramo5_v13.dwgGeneration change RAMO4 to RAMO5Generation change from RA-SP to RASP 4.0Generation Change RASP4 to RASP5Generation change from RA-MO to RAMO 4.0Generation Change RA-SP to RASP5Configuration to Rockwell PLC for Rapid LinkDA-DC-00003964.pdfDA-DC-00004184.pdfDA-DC-00004525.pdfDA-DC-00004523.pdf10.2.5 Lifting10.2.6 Mechanical impact10.2.7 Inscriptions10.3 Degree of protection of assemblies10.4 Clearances and creepage distances10.5 Protection against electric shock10.6 Incorporation of switching devices and components 10.7 Internal electrical circuits and connections10.8 Connections for external conductors10.9.2 Power-frequency electric strength10.9.3 Impulse withstand voltage10.9.4 Testing of enclosures made of insulating material 10.10 Temperature rise10.11 Short-circuit rating10.12 Electromagnetic compatibility eCAD modelIstruzioni di installazione mCAD modelNote per l'applicazione Report di certificazioneEaton Corporation plc Eaton House30 Pembroke Road Dublin 4, Ireland © 2023 Eaton. Tutti i diritti riservati. Eaton is a registered trademark.All other trademarks areproperty of their respectiveowners./socialmediaswitchgear must be observed.The device meets the requirements, provided the information in the instruction leaflet (IL) is observed.10.13 Mechanical function。

CA91中文资料

CA91中文资料

DS06-10801-4EFUJITSU SEMICONDUCTORDATA SHEETSemicustomCMOSAccelArray TMCA91 Series■DESCRIPTIONAccelArray TM * is a new structured ASIC family, offering short development time, and low development cost with pre-diffused IP macros into base masters and pre-designed common 3 to 4 metal layers out of 6 to 7 layers.By using 0.11 µm CMOS process technology, the devices can support 6 million logic gates, 4.55 Mbits SRAM and 3.125 Gbps high speed transmission macros. Ultra-high pin count FC-BGA (up to 729 pins to 1681 pins)packages are available.* : AccelArray TM is a trademark of Fujitsu Limited.■FEATURES•High-speed, large scale ASIC produced in short development time:T A T = One third compared with Standard Cell ASICs (target value)•Uses an architecture that simplifies physical design tasks.•Pre-designed common masters with IR-drop free.•Pre-designed test circuit insertion to reduce test synthesis tasks.•Uses a dedicated timing-driven layout tool to reduce development time.•Signal Integrity Free (pre-designed main clock trees without design verifications)•Max built-in gate number : 6,000,000 gates or more•T echnology : 0.11 µm Silicon gate CMOS, 6 to 7-metal layers (wiring material: copper), low-k inter-layer film •Internal cells support high-speed operation•Power supply voltage : +1.2 V ± 0.1 V/2.5 V ± 0.2 V (Dual power supply. Needs 1.5 V power supply during usingHTSL.) .•Operation junction temperature : −40 °C to +125 °C (standard) •Max operating frequency: 333 MHz (internal circuit)•Support for fast interface/macro (200 MHz/400 MHz DDR I/F , 2.5 Gbps PCI Express, 3.125 Gbps XAUI, etc.) •Special interfaces (P-CML,L VDS,PCI,HSTL,SSTL-2, etc.)•Embedded macro : PLL, SRAM•8-channel clock supply system incorporating a PLL •Supports Memory-BIST/Boundary-SCAN •Package : FC-BGA (729 pins to 1681 pins)•ARM core is supported.Note : It contains under planning.CA91 Series2■MACRO LIBRARY1.Unit cell•Flip Flop, with clear/preset (support for Mux-D Scan, with Lock up latch)•Clock Buffer•Other combination circuits (approximately 50 different types)2.APLL•Input frequency : 25 MHz to 800 MHz•Output frequency : 400 MHz to 800 MHz•User frequency : 25 MHz to 800 MHz•Phase shift : 0/90/180/270 deg.3.SRAM•1R1W-SRAM : 32 words × 40 bits•2RW-SRAM : 512 words × 40 bitsBit Select 1 : 1, 2 : 1, 4 : 1, 8 : 11 RW operation accesses specified port bit-width4.I/O•HSTL*1(250 MHz)•2.5 V L VCMOS(200 MHz (input buffer), 75 MHz to 100 MHz (output buffer))•PCML(250 MHz)•L VDS(311 MHz)•SSTL2(250 MHz)•PCI-66 *2(66 MHz)•PCI-X*2(133 MHz)•3.3 V tolerant(200 MHz (input buffer), 75 MHz to 100 MHz (output buffer)) *1 : Needs 1.5 V power supply*2 : As the I/F is 3.3V tolerant, it does not satisfy the PCI standard in some cases. Dedicated for Giga Frame•SPI-4P2 (622 Mbps to 800 Mbps)•XAUI (3.125 Gbps)•Fibre Channel (1.0 Gbps, 2.0 Gbps)•Serial Rapid IO (1.25 Gbps, 2.5 Gbps, 3.125 Gbps)•PCI Express (2.5 Gbps)5.Memory interface•DDR-SDRAM (400 Mbps)•QDR-SDRAM (400 Mbps)•Peer to Peer SDR (200 Mbps)•Peer to Peer DDR (200 Mbps)•SDR-SDRAM (167 Mbps)CA91 Series3■ABSOLUTE MAXIMUM RATINGS(VSS = 0 V)*1 : Different limit values apply for L VDS, etc.*2 : Maximum supply current in normal operation. Supply current depends on the frame or the package.*3 : Maximum output current in normal operation *4 : Required when using HSTL I/O.WARNING:Semiconductor devices can be permanently damaged by application of stress (voltage, current,temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.ParameterSymbolApplicationRating Unit Min Max Power supply voltageVDDVDDI (Core)− 0.5 1.8V VDDE(for 2.5 V CMOS I/Os, 3.3 V Tolerant I/Os) − 0.5 3.6V VDDE (for 1.5 V I/Os*4) − 0.5 3.6V Input voltage *1VI2.5 V CMOS− 0.5VDDE + 0.5( ≤ 3.6) V 3.3 V Tolerant − 0.5VDDE + 3.6( ≤ 4.0) V Output voltageVO2.5 V CMOS− 0.5VDDE + 0.5( ≤ 3.6) V 3.3 V Tolerant (H/L-State) − 0.5VDDE + 0.5( ≤ 4.0)V 3.3 V Tolerant (Z-State)− 0.5 4.0V Storage temperature Tst ⎯ − 55+ 125 °C Operation junction temperature Tj⎯− 40+ 125 °C Power supply pin current *2IDEach VDDE pin⎯180mA Each VDDI pin ⎯200mA Each VSS pin⎯200mA Output current *3IO2.5 V CMOS ⎯±10mA3.3 V Tolerant⎯±7.5mACA91 Series4■RECOMMENDED OPERATING CONDITIONS• Dual power supply (VDDI =+1.2 V ± 0.1 V, VDDE =+2.5 V ± 0.2 V, (+1.5 V ± 0.1 V))(VSS = 0 V)* : Applicable to HSTL I/O.WARNING:The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device isoperated within these ranges.Always use semiconductor devices within their recommended operating condition ranges. Operationoutside these ranges may adversely affect reliability and could result in device failure.No warranty is made with respect to uses, operating conditions, or combinations not represented onthe data sheet. Users considering application outside the listed conditions are advised to contact theirFUJITSU representatives beforehand.Parameter SymbolValueUnitMin Typ MaxPower supplyvoltagePower supply voltagefor coreVDDI 1.1 1.2 1.3V Power supply voltagefor 2.5 V I/OsVDDE 2.3 2.5 2.7V Power supply voltagefor 1.5 V I/Os *VDDE 1.4 1.5 1.6V“H” level inputvoltage2.5 V CMOSVIH1.7⎯VDDE + 0.3V3.3 V Tolerant 1.7⎯ 3.6V “L” level inputvoltage2.5 V CMOSVIL− 0.3⎯0.7V3.3 V Tolerant− 0.3⎯0.7V Operation junction temperature Tj− 40⎯+ 125°CCA91 Series5■ELECTRICAL CHARACTERISTICS1.DC CHARACTERISTICS(VDDI = 1.2 V ± 0.1 V, VDDE = 2.5 V ± 0.2 V, VSS = 0 V, Tj = − 40 °C to + 125 °C)* : The input leak current may exceed the above value if an input buffer with pull-up or pull-down resistor is used.Note : Refer to the application note for details of HSTL I/O.2.AC CHARACTERISTICS*1 : Delay time = propagation delay time, enable time, and disable time.*2 : typ can be estimated from the cell specification.*3 : Measurement conditionNote : Obtains the tpd max corresponding to the maximum junction temperature Tj.■I/O PIN CAPACITANCE(Tj = +25 °C, VDDE = VI = 0 V, f = 1 MHz)Note: The capacity depends on the package, pin positions, and similar.Parameter Symbol Conditions ValueUnitMin Typ Max “H” level output voltage VOH IOH = − 100 µA VDDE − 0.2⎯VDDE V “L” level output voltage VOL IOL = 100 µA0⎯0.2V Input leak current *IL⎯− 10⎯+ 10 µA Pull-up/Pull-down resistorRP2.5 V CMOS pin,VIL = 0 V at pull-up,VIH = VDDE at pull-down 102555k Ω3.3 V Tolerant pin,VIH = 3.0 V to 3.6 V at pull-down123385k ΩParameter Symbol ValueUnit Min Typ Max Delay timetpd *1typ *2 × tmin *3typ *2 × ttyp *3typ *2 × tmax *3nsMeasurement condition tminttyp tmax VDD = 1.2 V ± 0.1 V, VSS = 0 V, Tj = − 40 °C to + 125 °C0.731.001.43ParameterSymbol Value Unit Input pin CIN Max 16pF Output pin COUT Max 16pF I/O pin CI/OMax 16pFCA91 Series6■DESIGN METHODOLOGY•T o make development faster, the number of layers customizable in AccelArray is restricted to 3 to 4. Blocks that do not need to be redesigned for each product can be designed once and then incorporated into the architecture. As only 3 to 4 customizable layers are available for development of each product, the requirements of the layout tool are low. The requirements for timing design, where excessive complexity causes convergence to be slow, are also low. As result, the time required for design work is reduced. Primarily, tools supplied by Fujitsu are used for logic design.•A special-purpose tool is used to determine the pin layout. This produces speedy and reliable results.■SUPPORT TOOL•Frame estimationFUJITSU LIMITED : FEST A•Pin assignmentFUJITSU LIMITED : P ASTEL•Logic synthesisSynopsys, Inc. : Design Compiler, Cadence Design Systems, Inc. : BuildGates•Physical synthesisSynplicity, Inc. : Amplify AccelAllay•Format verificationCadence Design Systems, Inc. : Conformal ASIC, Synopsys, Inc. : FormalityFUJITSU LIMITED : ASSURE•Delay calculationFUJITSU LIMITED : LCADFE•Timing analysisSynopsys, Inc. : PrimeTime, FUJITSU LIMITED : GIST A•SimulationCadence Design Systems, Inc. : NC-Verilog/NC-VHDL, Synopsys, Inc. : VCS,Mentor Graphics Corporation : ModelSim, FUJITSU LIMITED : LCADFE•LayoutFUJITSU LIMITED : AccelBuilder•Power calculationFUJITSU LIMITED : PScope•Power analysisCadence Design Systems, Inc. : VoltageStorm•T est synthesisFUJITSU LIMITED : DFTPlanner•A TPGFUJITSU LIMITED : FANTCAD/X-Pax/TERBAN•ValidationFUJITSU LIMITED : LCADVL•Fault simulationFUJITSU LIMITED : FANSCADNote : The company names and the product names are the trademarks or registered trademarks of their respective owners.CA91 Series■FRAME LINE UP2 groups are provided depending on the I/O transmission speed: Mega Frame (400 Mbps) and Giga Frame(622 Mbps to 3.125 Gbps).*1 : Actual available I/O count varies with the interface type.*2 : ARM9 core is supported.* : Actual available I/O count varies with the interface type.■PACKAGEHigh pin count FC-BGAs using fine solder bump pitch technology are available for high speed data networking applications.7CA91 SeriesFUJITSU LIMITEDAll Rights Reserved.The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering.The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device; Fujitsu does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. Fujitsu assumes no liability for any damages whatsoever arising out of the use of the information.Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of Fujitsu or any third party or does Fujitsu warrant non-infringement of any third-party’s intellectual property right or other right by using such information. Fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein.The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products.Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions.If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan.F0506©2005 FUJITSU LIMITED Printed in Japan。

HP Deskjet 2540 All-in-One 商品说明说明书

HP Deskjet 2540 All-in-One 商品说明说明书

HP Deskjet 2540 All-in-One Printer ​​​​Commercial model number:A9U22A (B1H)Canada model number:A9U22A (B1H)In the box:Black ink cartridgeTri-color ink cartridgeSetup posterPower supplyPower cordUSB cableSoftware on CD-ROMStandard warranty:1 year limited hardware, plus1 year technical phonesupportHP Deskjet 3510 e-All-in-One Printer CZ044A CompareRecommended Care Pack ServicesBusinessPrioritySupport withNext BusinessDay Exchange:3 yearsOptional Care Pack Services BusinessPrioritySupport withNext BusinessDay Exchange:2 yearsBusinessPrioritySupport withNext BusinessDay Exchange:3 yearsBusinessPrioritySupport withNext Business This HP Deskjet makes wireless printing, easy scanning, andq uick copying simple and affordable.1F ree your printing from wires. Print what you need when youneed it from any room in your home, using your smartphone,tablet, and PC—q uickly and easily.2,3Check off your to-do list without writing a big check. Print, scan, andcopy the documents you need, using an all-in-one designed to besimply affordable.Preser v e precious space with a compact all-in-one that fits where v eryou need it—close at hand or out of the way.Conser v e resources without sacrificing performance—this all-in-oneis ENER GY STAR®q ualified. Reduce your impact e v en more withfree, easy cartridge recycling.4Compatible Operating Systems—Standard DesktopWindows XP32-bit (SP3 or higher)Windows Vista®*Windows® 7*Windows® 8*Mac OS Mac OS X v 10.6, 10.7, 10.8Additional Information—Sales Data Sheet A9U22ATechnical Support /supportThird-party solutions Reseller /partners/usServices /go/ser v icesSupplies and accessories Brand Specifications—PRINTERPrint Technology HP Thermal InkjetAIO/MFP Functions Color printing, color copying, color scanning,wirelessPrint Speed Black, Letter:​​ISO/Best Quality Up to 7 ppm laser comparable5Draft Quality Up to 20 ppm5Print Speed Color, Letter:​​ISO/Best Quality Up to 4 ppm laser comparable5Draft Quality Up to 16 ppm5Day Exchange: 4 yearsFirst Page Out As fast as 17 sec from Ready modePaper Trays, Std1Paper Trays, Max1Input Capacity, Std60 sheetsInput Capacity, Max60 sheetsOutput Capacity, Std25 sheetsOutput Capacity, Max25 sheetsEnvelope Input, Std5Envelope Feeder NoTwo-Sided Printing Manual (dri v er support pro v ided)Prints Color Y esPrint Quality, Black Best Up to 600 x 600 rendered dpiPrint Quality, Color Best Up to 4800 x 1200 optimi z ed dpi color (whenprinting from a computer on selected HP photopapers with 1200 input dpi)Print Cartridges 2 (1 each black, tri-color)Print Languages, Std HP PC L 3 G UI, PC L (HP Apps/UPD), UR F(AirPrint)Display Type7 segment + icon L CDSCANNERScan Resolution, Enhanced Up to 1200 dpiScan Resolution, Optical Up to 1200 dpiGrayscale Levels256COPIERCopy Speed, Max, Black Up to 4.5 cpm laser comparableCopy Speed, Max, Color Up to 3 cpm laser comparableCopy Resolution, Black Text Up to 600 x 300 dpiCopy Resolution, Black Graphics Up to 600 x 300 dpiCopy Resolution, Color Text And Graphics Up to 600 x 300 dpiCopier Settings Not a v ailableNumber Of Copies, Max9Copier Reduce/Enlarge Not a v ailableGENERALDuty Cycle, Monthly Up to 1,000 pages6Recommended Monthly Volume300 to 400 pages7ADF Capacity Not applicableMedia Types Paper (brochure, inkjet, plain), photo paper,en v elopes, labels, cards (greeting)Media Sizes, Std L etter, legal, en v elopes (No. 10), 4 x 6 in, 5 x 7in, 8 x 10 inMedia Sizes, Std, Metric A4; B5; A6; D L en v elopeMedia Sizes, Custom Not a v ailableMedia Sizes, Custom, Metric Not a v ailableMedia Weights L etter: 16 to 32 lb; HP en v elopes: 20 to 24 lb;HP cards: up to 110 lb; HP 4 x 6 inch photopaper: up to 145 lbMedia Weights, Metric A4:60 to 90 g/m²; HP en v elopes:75 to 90 g/m²;HP cards: up to 200 g/m²; HP 10 x 15 cm photopaper: up to 300 g/m²Connectivity, Std Hi-Speed USB 2.0, wireless 802.11b/g/n Connectivity, Opt NoneMobile Printing Capability F eatures wireless direct and local W i-F iconnecti v ity to enable mobile printing v ia AppleAirPrint™ as well as other solutions. Supportsprinting from most smartphones and tabletsusing these operating systems: Android, iOS,Blackberry, Symbian, W indows 8, W indows RT. Memory, Std IntegratedMemory, Max IntegratedMemory Card Compatibility Not applicablePower Supply Type ExternalPower Supply Re q uired Input v oltage: 100 to 240 V AC (+/-10%), 50/60H z (+/-3 H z).Power Consumption10 watts8maximum, 10 watts (Acti v e), 0.2 watts(Off), 2.0 watts (Standby), 0.9 watt (Sleep) ENERG Y STAR® Qualified Y esMac Compatible Y esDimensions (W x D x H)16.74 x 21.74 x 9.93 in (maximum), 16.74 x12.04 x 6.17 in (minimum)Weight7.94 lbDimensions, Metric425.23 x 552.19 x 252.19 mm (maximum),425.23 x 305.82 x 156.60 mm (minimum) Weight, Metric3.60 kgShipping Dimensions18.23 x 7.60 x 13.94 inShipping Weight11.49 lbShipping Dimensions, Metric463 x 193 x 354 mmShipping Weight, Metric5.21 kgPallet Dimensions40 x 48 x 102.95 inPallet Dimensions, Metric1016 x 1219.2 x 2615 mmPallet Weight1011 lbPallet Weight, Metric459 kgQuantity Per Pallet84Compatible Supplies—H P Ink SuppliesHP 61 Black Original Ink Cartridge(CH561W N)HP 61 Black Original Ink Cartridge(CH561W C)HP 61 Tri-color Original Ink Cartridge(CH562W N)HP 61 Tri-color Original Ink Cartridge(CH562W C)HP 61 2-pack Black Original Ink Cartridges(CZ073F N)HP 61 2-pack Tri-color Original Ink Cartridges(CZ074F N)HP 61 2-pack Black/Tri-color Original Ink Cartridges(CR259F N)HP 61 2-pack Black/Tri-color Original Ink Cartridges(CR259F C)HP 61XL High Y ield Black Original Ink Cartridge(CH563W N)HP 61XL High Y ield Black Original Ink Cartridge(CH563W C)HP 61XL High Y ield Tri-color Original Ink Cartridge(CH564W N)HP 61XL High Y ield Tri-color Original Ink Cartridge(CH564W C)HP 61XL 2-pack High Y ield Black Original Ink Cartridges(C2P81BN)HP 61XL 2-pack High Y ield Black/61 Tri-color Original Ink Cartridges(CZ138F N)HP 61XL 2-pack High Y ield Black/61 Tri-color Original Ink Cartridges(CZ138F C)HP 61XL 2-pack High Y ield Black/Tri-color Original Ink Cartridges(CR258BN)HP 61XL 2-pack High Y ield Black/Tri-color Original Ink Cartridges(CR258BC) Compatible Paper Products—Top Recommended PapersH P Ink j et Matte Presentation Paper8.5 x 11 in32 lb100D0Z55AH P Ink j et Glossy Brochure Paper8.5 x 11 in48 lb50 sheets C6817AH P Advanced Glossy Photo Paper4 x 6 in, borderless 8.5 x 11 in 66 lb66 lb100 sheets50 sheetsQ6638AQ7853AH P Brochure and Presentation PapersH P Ink j et Matte Presentation Paper8.5 x 11 in32 lb100D0Z55AH P Ink j et Glossy Brochure Paper8.5 x 11 in 8.5 x 11 in 48 lb48 lb50 sheets150 sheetsC6817AQ1987AH P Ink j et Matte Brochure Paper8.5 x 11 in48 lb bond150 sheets CH016AH P Ink j et Glossy Tri-fold Brochure Paper8.5 x 11 in48 lb100 sheets C7020AH P Ink j et Matte Tri-fold Brochure Paper8.5 x 11 in48 lb100 sheets Q 5443AH P Premium Ink j et Transparency Film8.5 x 11 in​​20 sheets C3828AH P Everyday PapersH P Bright White Ink j et Paper8.5 x 11 in24 lb500 sheets HPB1124H P Color Ink j et Paper8.5 x 11 in 8.5 x 11 in 24 lb24 lb500 sheets400 sheets (6 packs)HP K 115HP K 400H P All-in-One Printing Paper8.5 x 11 in 8.5 x 11 in 22 lb22 lb500 sheets2,500 sheetsHPT1122HPT115H P Multipurpose Paper8.5 x 11 in8.5 x 11 in8.5 x 11 in8.5 x 11 in, 3-hole punch 8.5 x 14 in 20 lb20 lb20 lb20 lb20 lb500 sheets5,000 sheets (10 reams)2,500 sheets (5 reams)500 sheets500 sheetsHPM1120RHPM1120CHPM115RCHPM113HHPM1420H P Office Paper8.5 x 11 in8.5 x 11 in8.5 x 11 in, 3-hole punch 8.5 x 14 in8.5 x 11 in 20 lb20 lb20 lb20 lb20 lb2,500 sheets (5 reams)5,000 sheets (10 reams)500 sheets500 sheets500 sheetsHPC115RCHPC8511CHPC3HPHPC8514HPC8511RH P Office Quickpack8.5 x 11 in20 lb2,500 sheets HP2500SH P Recycled Paper8.5 x 11 in 8.5 x 11 in 20 lb20 lb500 sheets5,000 sheets (10 reams)HPE1120RHPE1120CH P Business Copy Paper8.5 x 11 in20 lb500 sheets HPBC11H P Everyday Copy and Print Paper8.5 x 11 in20 lb500 sheets HPA510H P Photo PapersH P Everyday Glossy Photo Paper4 x 6 in4 x 6 in 8.5 x 11 in 8.5 x 11 in 53 lb53 lb53 lb53 lb50 sheets100 sheets25 sheets50 sheetsCR758ACR759AQ5498AQ8723AH P Advanced Glossy Photo Paper8.5 x 11 in 8.5 x 11 in 8.5 x 11 in 66 lb66 lb66 lb25 sheets50 sheets100 sheetsQ7852AQ7853AQ7854AH P Premium Plus Gloss Photo Paper4 x 6 in 8.5 x 11 in 8.5 x 11 in 80 lb80 lb80 lb60 sheets25 sheets50 sheetsCR665ACR670ACR664AH P Premium Plus Soft-gloss Photo Paper4 x 6 in 8.5 x 11 in 8.5 x 11 in 80 lb80 lb80 lb100 sheets25 sheets50 sheetsCR666ACR671ACR667AH P Iron-on Transfers8.5 x 11 in​​12 sheets C6049AThe information contained herein is subject to change without notice. The only warranties for HP products and ser v ices are set forth in the express warranty statements accompanying such products and ser v ices. Nothing herein should be construed as constituting an additional warranty. HP shall not be liable for technical or editorial errors or omissions contained herein.1.Mobile de v ice must be wireless-enabled. Printer and de v ice must be on the same localwireless network or through direct wireless connection.W ireless performance is dependent on physical en v ironment and distance from access point.W ireless operations are compatible with 2.4 G H z routers only.F eature may re q uire dri v er or apps, a v ailable for download at .2.W ireless performance is dependent upon physical en v ironment and distance from accesspoint, and may be limited during acti v e V PN connections.3.HP Auto W ireless Connect may not be a v ailable for all system configurations.W irelessperformance is dependent upon physical en v ironment and distance from access point.F or information on compatibility, v isit /go/autowirelessconnect.4.Program a v ailability v aries. Original HP cartridge return and recycling is currently a v ailable inmore than 50 countries and territories around the world through the HP Planet Partnersprogram.F or more information, or to re q uest return en v elopes and bulk collection boxes, v isit /recycle.5.Measured using ISO/IEC 24734, excludes first set of test documents.F or more informationsee /go/printerclaims. Exact speed v aries depending on the systemconfiguration, software application, dri v er and document complexity.6.Duty cycle is defined as the maximum number of pages per month of imaged output. Thisv alue pro v ides a comparison of product robustness in relation to other HP L aser J et or HP Color L aser J et de v ices, and enables appropriate deployment of printers and M F Ps to satisfy the demands of connected indi v iduals or groups.7.HP recommends that the number of printed pages per month be within the stated range foroptimum de v ice performance, based on factors including supplies replacement inter v als and de v ice life o v er an extended warranty period.8.Power re q uirements are based on the country/region where the printer is sold. Do notcon v ert operating v oltages. This will damage the printer and v oid the product warranty.。

R5F21245SNFP资料

R5F21245SNFP资料

R8C/24 Group, R8C/25 GroupSINGLE-CHIP 16-BIT CMOS MCU1.OverviewThese MCUs are fabricated using a high-performance silicon gate CMOS process, embedding the R8C/Tiny Series CPU core, and are packaged in a 52-pin molded-plastic LQFP or a 64-pin molded-plastic FLGA. It implements sophisticated instructions for a high level of instruction efficiency. With 1 Mbyte of address space, they are capable of executing instructions at high speed.Furthermore, the R8C/25 Group has on-chip data flash (1 KB x 2 blocks).The difference between the R8C/24 Group and R8C/25 Group is only the presence or absence of data flash. Their peripheral functions are the same.1.1ApplicationsElectronic household appliances, office equipment, audio equipment, consumer products, etc.REJ03B0117-0300Rev.3.00Feb 29, 20081.2Performance OverviewTable 1.1 outlines the Functions and Specifications for R8C/24 Group and Table 1.2 outlines the Functions and Specifications for R8C/25 Group.NOTES:1.I 2C bus is a trademark of Koninklijke Philips Electronics N. V.2.Specify the D version if D version functions are to be used.Table 1.1Functions and Specifications for R8C/24 GroupItem SpecificationCPU Number of fundamental instructions89 instructionsMinimum instruction execution time 50 ns (f(XIN) = 20 MHz, VCC = 3.0 to 5.5 V)100 ns (f(XIN) = 10 MHz, VCC = 2.7 to 5.5 V)200 ns (f(XIN) = 5 MHz, VCC = 2.2 to 5.5 V)Operating mode Single-chip Address space 1 Mbyte Memory capacity Refer to Table 1.3 Product Information for R8C/24 GroupPeripheral Functions Ports I/O ports: 41 pins, Input port: 3 pins LED drive ports I/O ports: 8 pinsTimers Timer RA: 8 bits × 1 channelTimer RB: 8 bits × 1 channel(Each timer equipped with 8-bit prescaler)Timer RD: 16 bits × 2 channels(Input capture and output compare circuits)Timer RE: With real-time clock and compare match functionSerial interfaces 2 channels (UART0, UART1)Clock synchronous serial I/O, UARTClock synchronous serial interface 1 channel I 2C bus Interface (1)Clock synchronous serial I/O with chip selectLIN module Hardware LIN: 1 channel (timer RA, UART0)A/D converter 10-bit A/D converter: 1 circuit, 12 channels Watchdog timer 15 bits × 1 channel (with prescaler)Reset start selectableInterrupts Internal: 11 sources, External: 5 sources, Software: 4sources, Priority levels: 7 levelsClock Clock generation circuits 3 circuits•XIN clock generation circuit (with on-chip feedback resistor)•On-chip oscillator (high speed, low speed)High-speed on-chip oscillator has a frequency adjustment function•XCIN clock generation circuit (32 kHz)Real-time clock (timer RE)Oscillation stop detection function XIN clock oscillation stop detection function Voltage detection circuit On-chip Power-on reset circuit On-chipElectrical Characteristics Supply voltage VCC = 3.0 to 5.5 V (f(XIN) = 20 MHz)VCC = 2.7 to 5.5 V (f(XIN) = 10 MHz)VCC = 2.2 to 5.5 V (f(XIN) = 5 MHz)Current consumption Typ. 10 mA (VCC = 5.0 V, f(XIN) = 20 MHz)Typ. 6 mA (VCC = 3.0 V, f(XIN) = 10 MHz)Typ. 2.0 µA (VCC = 3.0 V, wait mode (f(XCIN) = 32 kHz)Typ. 0.7 µA (VCC = 3.0 V, stop mode)Flash Memory Programming and erasure voltage VCC = 2.7 to 5.5 VProgramming and erasure endurance 100 timesOperating Ambient Temperature -20 to 85°C (N version)-40 to 85°C (D version)(2)-20 to 105°C (Y version)(3)Package 52-pin molded-plastic LQFP64-pin molded-plastic FLGATable 1.2Functions and Specifications for R8C/25 GroupNOTES:1.I 2C bus is a trademark of Koninklijke Philips Electronics N. V.2.Specify the D version if D version functions are to be used.Item SpecificationCPU Number of fundamental instructions89 instructionsMinimum instruction execution time 50 ns (f(XIN) = 20 MHz, VCC = 3.0 to 5.5 V)100 ns (f(XIN) = 10 MHz, VCC = 2.7 to 5.5 V)200 ns (f(XIN) = 5 MHz, VCC = 2.2 to 5.5 V)Operating mode Single-chip Address space 1 Mbyte Memory capacity Refer to Table 1.4 Product Information for R8C/25 GroupPeripheral Functions Ports I/O ports: 41 pins, Input port: 3 pins LED drive ports I/O ports: 8 pinsTimers Timer RA: 8 bits × 1 channelTimer RB: 8 bits × 1 channel(Each timer equipped with 8-bit prescaler)Timer RD: 16 bits × 2 channels(Input capture and output compare circuits)Timer RE: With real-time clock and compare match functionSerial interface 2 channels (UART0, UART1)Clock synchronous serial I/O, UARTClock synchronous serial interface 1 channel I 2C bus Interface (1)Clock synchronous serial I/O with chip selectLIN module Hardware LIN: 1 channel (timer RA, UART0)A/D converter 10-bit A/D converter: 1 circuit, 12 channels Watchdog timer 15 bits × 1 channel (with prescaler)Reset start selectableInterrupts Internal: 11 sources, External: 5 sources, Software: 4sources, Priority levels: 7 levelsClock Clock generation circuits 3 circuits•XIN clock generation circuit (with on-chip feedbackresistor)•On-chip oscillator (high speed, low speed)High-speed on-chip oscillator has a frequency adjustment function•XCIN clock generation circuit (32 kHz)Real-time clock (timer RE)Oscillation stop detection function XIN clock oscillation stop detection function Voltage detection circuit On-chip Power-on reset circuit On-chipElectrical Characteristics Supply voltage VCC = 3.0 to 5.5 V (f(XIN) = 20 MHz)VCC = 2.7 to 5.5 V (f(XIN) = 10 MHz)VCC = 2.2 to 5.5 V (f(XIN) = 5 MHz)Current consumption Typ. 10 mA (VCC = 5.0 V, f(XIN) = 20 MHz)Typ. 6 mA (VCC = 3.0 V, f(XIN) = 10 MHz)Typ. 2.0 µA (VCC = 3.0 V, wait mode (f(XCIN) = 32 kHz)Typ. 0.7 µA (VCC = 3.0 V, stop mode)Flash memory Programming and erasure voltage VCC = 2.7 to 5.5 VProgramming and erasure endurance 1,0000 times (data flash)1,000 times (program ROM)Operating Ambient Temperature -20 to 85°C (N version)-40 to 85°C (D version)(2)-20 to 105°C (Y version)(3)Package 52-pin molded-plastic LQFP64-pin molded-plastic FLGA1.3Block DiagramFigure 1.1 shows a Block Diagram.1.4Product InformationTable 1.3 lists the Product Information for R8C/24 Group and Table 1.4 lists the Product Information for R8C/25Group.NOTE:1.The user ROM is programmed before shipment.Table 1.3Product Information for R8C/24 GroupCurrent of Feb. 2008 Type No.ROM Capacity RAM Capacity Package Type Remarks R5F21244SNFP 16 Kbytes 1 Kbyte PLQP0052JA-A N version Blank productR5F21245SNFP 24 Kbytes 2 Kbytes PLQP0052JA-A R5F21246SNFP 32 Kbytes 2 Kbytes PLQP0052JA-A R5F21247SNFP 48 Kbytes 2.5 Kbytes PLQP0052JA-A R5F21248SNFP 64 Kbytes 3 Kbytes PLQP0052JA-A R5F21244SNLG 16 Kbytes 1 Kbyte PTLG0064JA-A R5F21246SNLG 32 Kbytes 2 Kbytes PTLG0064JA-A R5F21244SDFP 16 Kbytes 1 Kbyte PLQP0052JA-A D version Blank productR5F21245SDFP 24 Kbytes 2 Kbytes PLQP0052JA-A R5F21246SDFP 32 Kbytes 2 Kbytes PLQP0052JA-A R5F21247SDFP 48 Kbytes 2.5 Kbytes PLQP0052JA-A R5F21248SDFP64 Kbytes 3 Kbytes PLQP0052JA-A R5F21244SNXXXFP 16 Kbytes 1 Kbyte PLQP0052JA-A N version Factoryprogramming product (1)R5F21245SNXXXFP 24 Kbytes 2 Kbytes PLQP0052JA-A R5F21246SNXXXFP 32 Kbytes 2 Kbytes PLQP0052JA-A R5F21247SNXXXFP 48 Kbytes 2.5 Kbytes PLQP0052JA-A R5F21248SNXXXFP 64 Kbytes 3 Kbytes PLQP0052JA-A R5F21244SNXXXLG 16 Kbytes 1 Kbyte PTLG0064JA-A R5F21246SNXXXLG 32 Kbytes 2 Kbytes PTLG0064JA-A R5F21244SDXXXFP 16 Kbytes 1 Kbyte PLQP0052JA-A D version Factoryprogramming product (1)R5F21245SDXXXFP 24 Kbytes 2 Kbytes PLQP0052JA-A R5F21246SDXXXFP 32 Kbytes 2 Kbytes PLQP0052JA-A R5F21247SDXXXFP 48 Kbytes 2.5 Kbytes PLQP0052JA-A R5F21248SDXXXFP64 Kbytes3 KbytesPLQP0052JA-ANOTE:1.The user ROM is programmed before shipment.Table 1.4Product Information for R8C/25 GroupCurrent of Feb. 2008Type No.ROM CapacityRAMCapacity Package Type Remarks Program ROM Data flash R5F21254SNFP 16 Kbytes 1 Kbyte × 2 1 Kbyte PLQP0052JA-A N version Blank productR5F21255SNFP 24 Kbytes 1 Kbyte × 2 2 Kbytes PLQP0052JA-A R5F21256SNFP 32 Kbytes 1 Kbyte × 2 2 Kbytes PLQP0052JA-A R5F21257SNFP 48 Kbytes 1 Kbyte × 2 2.5 Kbytes PLQP0052JA-A R5F21258SNFP 64 Kbytes 1 Kbyte × 2 3 Kbytes PLQP0052JA-A R5F21254SNLG 16 Kbytes 1 Kbyte × 2 1 Kbyte PTLG0064JA-A R5F21256SNLG 32 Kbytes 1 Kbyte × 2 2 Kbytes PTLG0064JA-A R5F21254SDFP 16 Kbytes 1 Kbyte × 2 1 Kbyte PLQP0052JA-A D version Blank productR5F21255SDFP 24 Kbytes 1 Kbyte × 2 2 Kbytes PLQP0052JA-A R5F21256SDFP 32 Kbytes 1 Kbyte × 2 2 Kbytes PLQP0052JA-A R5F21257SDFP 48 Kbytes 1 Kbyte × 2 2.5 Kbytes PLQP0052JA-A R5F21258SDFP64 Kbytes 1 Kbyte × 2 3 Kbytes PLQP0052JA-A R5F21254SNXXXFP 16 Kbytes 1 Kbyte × 2 1 Kbyte PLQP0052JA-A N version Factoryprogramming product (1)R5F21255SNXXXFP 24 Kbytes 1 Kbyte × 2 2 Kbytes PLQP0052JA-A R5F21256SNXXXFP 32 Kbytes 1 Kbyte × 2 2 Kbytes PLQP0052JA-A R5F21257SNXXXFP 48 Kbytes 1 Kbyte × 2 2.5 Kbytes PLQP0052JA-A R5F21258SNXXXFP 64 Kbytes 1 Kbyte × 2 3 Kbytes PLQP0052JA-A R5F21254SNXXXLG 16 Kbytes 1 Kbyte × 2 1 Kbyte PTLG0064JA-A R5F21256SNXXXLG 32 Kbytes 1 Kbyte × 2 2 Kbytes PTLG0064JA-A R5F21254SDXXXFP 16 Kbytes 1 Kbyte × 2 1 Kbyte PLQP0052JA-A D version Factoryprogramming product (1)R5F21255SDXXXFP 24 Kbytes 1 Kbyte × 2 2 Kbytes PLQP0052JA-A R5F21256SDXXXFP 32 Kbytes 1 Kbyte × 2 2 Kbytes PLQP0052JA-A R5F21257SDXXXFP 48 Kbytes 1 Kbyte × 2 2.5 Kbytes PLQP0052JA-A R5F21258SDXXXFP64 Kbytes 1 Kbyte × 23 KbytesPLQP0052JA-A1.5Pin AssignmentsFigure 1.4 shows PLQP0052JA-A Package Pin Assignments (Top View). Figure 1.5 shows PTLG0064JA-A Package Pin Assignments.1.6Pin FunctionsTable 1.5 lists Pin Functions.I: InputO: OutputI/O: Input and outputTable 1.5Pin FunctionsTypeSymbolI/O TypeDescriptionPower supply input VCC, VSS I Apply 2.2 V to 5.5 V to the VCC pin. Apply 0 V to the VSS pin.Analog power supply input AVCC, AVSS I Power supply for the A/D converter.Connect a capacitor between AVCC and AVSS.Reset input RESET I Input “L” on this pin resets the MCU.MODE MODE I Connect this pin to VCC via a resistor.XIN clock input XIN I These pins are provided for XIN clock generation circuit I/O.Connect a ceramic resonator or a crystal oscillator between the XIN and XOUT pins. To use an external clock, input it to the XIN pin and leave the XOUT pin open.XIN clock output XOUT O XCIN clock input XCIN I These pins are provided for XCIN clock generation circuit I/O.Connect a crystal oscillator between the XCIN and XCOUT pins. To use an external clock, input it to the XCIN pin and leave the XCOUT pin open.XCIN clock output XCOUT O INT interrupt input INT0 to INT3I INT interrupt input pins.INT0 is timer RD input pin. INT1 is timer RA input pin.Key input interrupt KI0 to KI3I Key input interrupt input pins Timer RA TRAIO I/O Timer RA I/O pin TRAO O Timer RA output pin Timer RB TRBOO Timer RB output pin Timer RDTRDIOA0, TRDIOA1,TRDIOB0, TRDIOB1,TRDIOC0, TRDIOC1,TRDIOD0, TRDIOD1I/OTimer RD I/O portsTRDCLK I External clock input pin Timer RE TREO O Divided clock output pin Serial interfaceCLK0, CLK1I/O Transfer clock I/O pin RXD0, RXD1I Serial data input pins TXD0, TXD1O Serial data output pins I 2C bus interfaceSCL I/O Clock I/O pin SDAI/O Data I/O pin Clock synchronous serial I/O with chip selectSSI I/O Data I/O pinSCS I/O Chip-select signal I/O pin SSCKI/O Clock I/O pin SSOI/O Data I/O pinReference voltage input VREF I Reference voltage input pin to A/D converter A/D converter AN0 to AN11I Analog input pins to A/D converterI/O portP0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0, P3_1,P3_3 to P3_5, P3_7, P4_3 to P4_5, P6_0 to P6_7I/OCMOS I/O ports. Each port has an I/O select direction register, allowing each pin in the port to be directed for input or output individually.Any port set to input can be set to use a pull-up resistor or not by a program.P2_0 to P2_7 also function as LED drive ports.Input port P4_2, P4_6, P4_7IInput-only portsNOTE:1.Can be assigned to the pin in parentheses by a program.Table 1.6Pin Name Information by Pin NumberPinNumber Control PinPortI/O Pin Functions for of Peripheral ModulesInterruptTimerSerial Interface ClockSynchronous Serial I/O with Chip Select I 2C busInterfaceA/D Converter2P3_5SSCK SCL 3P3_3SSI4P3_4SCSSDA5MODE 6XCIN P4_37XCOUT P4_48RESET 9XOUT P4_710VSS/AVSS11XIN P4_612VCC/AVCC13P2_7TRDIOD114P2_6TRDIOC115P2_5TRDIOB116P2_4TRDIOA117P2_3TRDIOD018P2_2TRDIOC019P2_1TRDIOB020P2_0TRDIOA0/TRDCLK21P1_7INT1TRAIO22P1_6CLK023P1_5(INT1)(1)(TRAIO)(1)RXD024P1_4TXD025P1_3KI3AN1127P4_5INT0INT028P6_6INT2TXD129P6_7INT3RXD130P1_2KI2AN1031P1_1KI1AN932P1_0KI0AN833P3_1TRBO 34P3_0TRAO35P6_5CLK136P6_437P6_338P0_7AN041P0_6AN142P0_5AN243P0_4AN344VREFP4_245P6_0TREO46P6_247P6_148P0_3AN449P0_2AN550P0_1AN651P0_0AN752P3_7SSO2.Central Processing Unit (CPU)Figure 2.1 shows the CPU Registers. The CPU contains 13 registers. R0, R1, R2, R3, A0, A1, and FB configure a register bank. There are two sets of register bank.2.1Data Registers (R0, R1, R2, and R3)R0 is a 16-bit register for transfer, arithmetic, and logic operations. The same applies to R1 to R3. R0 can be split into high-order bits (R0H) and low-order bits (R0L) to be used separately as 8-bit data registers. R1H and R1L are analogous to R0H and R0L. R2 can be combined with R0 and used as a 32-bit data register (R2R0). R3R1 is analogous to R2R0.2.2Address Registers (A0 and A1)A0 is a 16-bit register for address register indirect addressing and address register relative addressing. It is also used for transfer, arithmetic, and logic operations. A1 is analogous to A0. A1 can be combined with A0 and as a 32-bit address register (A1A0).2.3Frame Base Register (FB)FB is a 16-bit register for FB relative addressing.2.4Interrupt Table Register (INTB)INTB is a 20-bit register that indicates the start address of an interrupt vector table.2.5Program Counter (PC)PC is 20 bits wide and indicates the address of the next instruction to be executed.2.6User Stack Pointer (USP) and Interrupt Stack Pointer (ISP)The stack pointers (SP), USP, and ISP, are each 16 bits wide. The U flag of FLG is used to switch betweenUSP and ISP.2.7Static Base Register (SB)SB is a 16-bit register for SB relative addressing.2.8Flag Register (FLG)FLG is an 11-bit register indicating the CPU state.2.8.1Carry Flag (C)The C flag retains carry, borrow, or shift-out bits that have been generated by the arithmetic and logic unit.2.8.2Debug Flag (D)The D flag is for debugging only. Set it to 0.2.8.3Zero Flag (Z)The Z flag is set to 1 when an arithmetic operation results in 0; otherwise to 0.2.8.4Sign Flag (S)The S flag is set to 1 when an arithmetic operation results in a negative value; otherwise to 0.2.8.5Register Bank Select Flag (B)Register bank 0 is selected when the B flag is 0. Register bank 1 is selected when this flag is set to 1.2.8.6Overflow Flag (O)The O flag is set to 1 when an operation results in an overflow; otherwise to 0.2.8.7Interrupt Enable Flag (I)The I flag enables maskable interrupts.Interrupt are disabled when the I flag is set to 0, and are enabled when the I flag is set to 1. The I flag is set to 0 when an interrupt request is acknowledged.2.8.8Stack Pointer Select Flag (U)ISP is selected when the U flag is set to 0; USP is selected when the U flag is set to 1.The U flag is set to 0 when a hardware interrupt request is acknowledged or the INT instruction of software interrupt numbers 0 to 31 is executed.2.8.9Processor Interrupt Priority Level (IPL)IPL is 3 bits wide and assigns processor interrupt priority levels from level 0 to level 7.If a requested interrupt has higher priority than IPL, the interrupt is enabled.2.8.10Reserved BitIf necessary, set to 0. When read, the content is undefined.3.Memory3.1R8C/24 GroupFigure 3.1 is a Memory Map of R8C/24 Group. The R8C/24 group has 1 Mbyte of address space from addresses 00000h to FFFFFh.The internal ROM is allocated lower addresses, beginning with address 0FFFFh. For example, a 48-Kbyte internal ROM area is allocated addresses 04000h to 0FFFFh.The fixed interrupt vector table is allocated addresses 0FFDCh to 0FFFFh. They store the starting address of each interrupt routine.The internal RAM is allocated higher addresses, beginning with address 00400h. For example, a 2-Kbyte internal RAM area is allocated addresses 00400h to 00BFFh. The internal RAM is used not only for storing data but also for calling subroutines and as stacks when interrupt requests are acknowledged.Special function registers (SFRs) are allocated addresses 00000h to 002FFh. The peripheral function control registers are allocated here. All addresses within the SFR, which have nothing allocated are reserved for future use and cannot be accessed by users.3.2R8C/25 GroupFigure 3.2 is a Memory Map of R8C/25 Group. The R8C/25 group has 1 Mbyte of address space from addresses 00000h to FFFFFh.The internal ROM (program ROM) is allocated lower addresses, beginning with address 0FFFFh. For example, a 48-Kbyte internal ROM area is allocated addresses 04000h to 0FFFFh.The fixed interrupt vector table is allocated addresses 0FFDCh to 0FFFFh. They store the starting address of each interrupt routine.The internal ROM (data flash) is allocated addresses 02400h to 02BFFh.The internal RAM area is allocated higher addresses, beginning with address 00400h. For example, a 2-Kbyte internal RAM is allocated addresses 00400h to 00BFFh. The internal RAM is used not only for storing data but also for calling subroutines and as stacks when interrupt requests are acknowledged.Special function registers (SFRs) are allocated addresses 00000h to 002FFh. The peripheral function control registers are allocated here. All addresses within the SFR, which have nothing allocated are reserved for future use and cannot be accessed by users.4.Special Function Registers (SFRs)An SFR (special function register) is a control register for a peripheral function. Tables 4.1 to 4.7 list the special function registers.Table 4.1SFR Information (1)(1)X: Undefined NOTES:1.The blank regions are reserved. Do not access locations in these regions.2.Software reset, watchdog timer reset, and voltage monitor 1 reset or voltage monitor 2 reset do not affect this register.3.The LVD0ON bit in the OFS register is set to 1 and hardware reset.4.Power-on reset, voltage monitor 0 reset or the LVD0ON bit in the OFS register is set to 0, and hardware reset.5.Software reset, watchdog timer reset, and voltage monitor 1 reset or voltage monitor 2 reset do not affect b2 and b3.6.The CSPROINI bit in the OFS register is set to 0.Address RegisterSymbolAfter reset0000h 0001h 0002h 0003h 0004h Processor Mode Register 0PM000h 0005h Processor Mode Register 1PM100h0006h System Clock Control Register 0CM001101000b 0007h System Clock Control Register 1CM100100000b0008h 0009h 000Ah Protect RegisterPRCR 00h 000Bh 000Ch Oscillation Stop Detection Register OCD 00000100b 000Dh Watchdog Timer Reset Register WDTR XXh 000Eh Watchdog Timer Start Register WDTS XXh000Fh Watchdog Timer Control Register WDC 00X11111b 0010h Address Match Interrupt Register 0RMAD000h 0011h 00h 0012h 00h 0013h Address Match Interrupt Enable Register AIER 00h 0014h Address Match Interrupt Register 1RMAD100h 0015h 00h 0016h 00h0017h 0018h 0019h 001Ah 001Bh 001Ch Count Source Protection Mode Register CSPR00h10000000b (6)001Dh 001Eh 001Fh 0020h 0021h 0022h 0023h High-Speed On-Chip Oscillator Control Register 0FRA000h0024h High-Speed On-Chip Oscillator Control Register 1FRA1When shipping 0025h High-Speed On-Chip Oscillator Control Register 2FRA200h0026h 0027h 0028h Clock Prescaler Reset FlagCPSRF 00h0029h High-Speed On-Chip Oscillator Control Register 4FRA4When shipping 002Ah 002Bh High-Speed On-Chip Oscillator Control Register 6FRA6When shipping 002Ch High-Speed On-Chip Oscillator Control Register 7FRA7When shipping0030h 0031h Voltage Detection Register 1(2)VCA100001000b 0032h Voltage Detection Register 2(2)VCA200h (3)00100000b (4)0033h 0034h 0035h 0036h Voltage Monitor 1 Circuit Control Register (5)VW1C 00001000b 0037h Voltage Monitor 2 Circuit Control Register (5)VW2C 00h0038h Voltage Monitor 0 Circuit Control Register (2)VW0C0000X000b (3)0100X001b (4)0039h 003Ah003Eh 003FhTable 4.2SFR Information (2)(1)Address Register Symbol After reset 0040h0041h0042h0043h0044h0045h0046h0047h0048h Timer RD0 Interrupt Control Register TRD0IC XXXXX000b 0049h Timer RD1 Interrupt Control Register TRD1IC XXXXX000b 004Ah Timer RE Interrupt Control Register TREIC XXXXX000b 004Bh004Ch004Dh Key Input Interrupt Control Register KUPIC XXXXX000b 004Eh A/D Conversion Interrupt Control Register ADIC XXXXX000b 004Fh SSU/IIC Interrupt Control Register(2)SSUIC / IICIC XXXXX000b 0050h0051h UART0 Transmit Interrupt Control Register S0TIC XXXXX000b 0052h UART0 Receive Interrupt Control Register S0RIC XXXXX000b 0053h UART1 Transmit Interrupt Control Register S1TIC XXXXX000b 0054h UART1 Receive Interrupt Control Register S1RIC XXXXX000b 0055h INT2 Interrupt Control Register INT2IC XX00X000b 0056h Timer RA Interrupt Control Register TRAIC XXXXX000b 0057h0058h Timer RB Interrupt Control Register TRBIC XXXXX000b 0059h INT1 Interrupt Control Register INT1IC XX00X000b 005Ah INT3 Interrupt Control Register INT3IC XX00X000b 005Bh005Ch005Dh INT0 Interrupt Control Register INT0IC XX00X000b 005Eh005Fh0060h0061h0062h0063h0064h0065h0066h0067h0068h0069h006Ah006Bh006Ch006Dh006Eh006Fh0070h0071h0072h0073h0074h0075h0076h0077h0078h0079h007Ah007Bh007Ch007Dh007Eh007FhX: UndefinedNOTES:1.The blank regions are reserved. Do not access locations in these regions.2.Selected by the IICSEL bit in the PMR register.Table 4.3SFR Information (3)(1)Address Register Symbol After reset 0080h0081h0082h0083h0084h0085h0086h0087h0088h0089h008Ah008Bh008Ch008Dh008Eh008Fh0090h0091h0092h0093h0094h0095h0096h0097h0098h0099h009Ah009Bh009Ch009Dh009Eh009Fh00A0h UART0 Transmit/Receive Mode Register U0MR00h00A1h UART0 Bit Rate Register U0BRG XXh00A2h UART0 Transmit Buffer Register U0TB XXh00A3h XXh00A4h UART0 Transmit/Receive Control Register 0U0C000001000b 00A5h UART0 Transmit/Receive Control Register 1U0C100000010b 00A6h UART0 Receive Buffer Register U0RB XXh00A7h XXh00A8h UART1 Transmit/Receive Mode Register U1MR00h00A9h UART1 Bit Rate Register U1BRG XXh00AAh UART1 Transmit Buffer Register U1TB XXh00ABh XXh00ACh UART1 Transmit/Receive Control Register 0U1C000001000b 00ADh UART1 Transmit/Receive Control Register 1U1C100000010b 00AEh UART1 Receive Buffer Register U1RB XXh00AFh XXh00B0h00B1h00B2h00B3h00B4h00B5h00B6h00B7h00B8h SS Control Register H / IIC bus Control Register 1(2)SSCRH / ICCR100h00B9h SS Control Register L / IIC bus Control Register 2(2)SSCRL / ICCR201111101b 00BAh SS Mode Register / IIC bus Mode Register(2)SSMR / ICMR00011000b 00BBh SS Enable Register / IIC bus Interrupt Enable Register(2)SSER / ICIER00h00BCh SS Status Register / IIC bus Status Register(2)SSSR / ICSR00h / 0000X000b 00BDh SS Mode Register 2 / Slave Address Register(2)SSMR2 / SAR00h00BEh SS Transmit Data Register / IIC bus Transmit Data Register(2)SSTDR / ICDRT FFh00BFh SS Receive Data Register / IIC bus Receive Data Register(2)SSRDR / ICDRR FFhX: UndefinedNOTES:1.The blank regions are reserved. Do not access locations in these regions.2.Selected by the IICSEL bit in the PMR register.Table 4.4SFR Information (4)(1)Address Register Symbol After reset 00C0h A/D Register AD XXh00C1h XXh00C2h00C3h00C4h00C5h00C6h00C7h00C8h00C9h00CAh00CBh00CCh00CDh00CEh00CFh00D0h00D1h00D2h00D3h00D4h A/D Control Register 2ADCON200h00D5h00D6h A/D Control Register 0ADCON000h00D7h A/D Control Register 1ADCON100h00D8h00D9h00DAh00DBh00DCh00DDh00DEh00DFh00E0h Port P0 Register P0XXh00E1h Port P1 Register P1XXh00E2h Port P0 Direction Register PD000h00E3h Port P1 Direction Register PD100h00E4h Port P2 Register P2XXh00E5h Port P3 Register P3XXh00E6h Port P2 Direction Register PD200h00E7h Port P3 Direction Register PD300h00E8h Port P4 Register P4XXh00E9h00EAh Port P4 Direction Register PD400h00EBh00ECh Port P6 Register P6XXh00EDh00EEh Port P6 Direction Register PD600h00EFh00F0h00F1h00F2h00F3h00F4h Port P2 Drive Capacity Control Register P2DRR00h00F5h UART1 Function Select Register U1SR XXh00F6h00F7h00F8h Port Mode Register PMR00h00F9h External Input Enable Register INTEN00h00FAh INT Input Filter Select Register INTF00h00FBh Key Input Enable Register KIEN00h00FCh Pull-Up Control Register 0PUR000h00FDh Pull-Up Control Register 1PUR1XX00XX00b 00FEh00FFhX: UndefinedNOTE:1.The blank regions are reserved. Do not access locations in these regions.Table 4.5SFR Information (5)(1)Address Register Symbol After reset 0100h Timer RA Control Register TRACR00h0101h Timer RA I/O Control Register TRAIOC00h0102h Timer RA Mode Register TRAMR00h0103h Timer RA Prescaler Register TRAPRE FFh0104h Timer RA Register TRA FFh0105h0106h LIN Control Register LINCR00h0107h LIN Status Register LINST00h0108h Timer RB Control Register TRBCR00h0109h Timer RB One-Shot Control Register TRBOCR00h010Ah Timer RB I/O Control Register TRBIOC00h010Bh Timer RB Mode Register TRBMR00h010Ch Timer RB Prescaler Register TRBPRE FFh010Dh Timer RB Secondary Register TRBSC FFh010Eh Timer RB Primary Register TRBPR FFh010Fh0110h0111h0112h0113h0114h0115h0116h0117h0118h Timer RE Second Data Register / Counter Data Register TRESEC00h0119h Timer RE Minute Data Register / Compare Data Register TREMIN00h011Ah Timer RE Hour Data Register TREHR00h011Bh Timer RE Day of Week Data Register TREWK00h011Ch Timer RE Control Register 1TRECR100h011Dh Timer RE Control Register 2TRECR200h011Eh Timer RE Count Source Select Register TRECSR00001000b 011Fh0120h0121h0122h0123h0124h0125h0126h0127h0128h0129h012Ah012Bh012Ch012Dh012Eh012Fh0130h0131h0132h0133h0134h0135h0136h0137h Timer RD Start Register TRDSTR11111100b 0138h Timer RD Mode Register TRDMR00001110b 0139h Timer RD PWM Mode Register TRDPMR10001000b 013Ah Timer RD Function Control Register TRDFCR10000000b 013Bh Timer RD Output Master Enable Register 1TRDOER1FFh013Ch Timer RD Output Master Enable Register 2TRDOER201111111b 013Dh Timer RD Output Control Register TRDOCR00h013Eh Timer RD Digital Filter Function Select Register 0TRDDF000h013Fh Timer RD Digital Filter Function Select Register 1TRDDF100hX: UndefinedNOTE:1.The blank regions are reserved. Do not access locations in these regions.。

AT91R40008中文资料

AT91R40008中文资料

1732DS–ATARM–03/04Features•Incorporates the ARM7TDMI ® ARM ® Thumb ® Processor Core–High-performance 32-bit RISC Architecture –High-density 16-bit Instruction Set –Leader in MIPS/Watt –Little-endian–Embedded ICE (In-circuit Emulation)•8-, 16- and 32-bit Read and Write Support •256K Bytes of On-chip SRAM –32-bit Data Bus–Single-clock Cycle Access•Fully Programmable External Bus Interface (EBI)–Maximum External Address Space of 64M Bytes –Up to Eight Chip Selects–Software Programmable 8/16-bit External Data Bus•Eight-level Priority, Individually Maskable, Vectored Interrupt Controller–Four External Interrupts, including a High-priority, Low-latency Interrupt Request •32 Programmable I/O Lines•Three-channel 16-bit Timer/Counter –Three External Clock Inputs–Two Multi-purpose I/O Pins per Channel •Two USARTs–Two Dedicated Peripheral Data Controller (PDC) Channels per USART •Programmable Watchdog Timer •Advanced Power-saving Features–CPU and Peripheral Can be Deactivated Individually •Fully Static Operation:–0 Hz to 75 MHz Internal Frequency Range at VDDCORE = 1.8V , 85°C • 2.7V to 3.6V I/O Operating Range• 1.65V to 1.95V Core Operating Range •-40°C to +85°C Temperature Range •Available in 100-lead TQFP PackageDescriptionThe AT91R40008 microcontroller is a member of the Atmel AT91 16/32-bit microcon-troller family, which is based on the ARM7TDMI processor core. This processor has a high-performance, 32-bit RISC architecture with a high-density, 16-bit instruction set and very low power consumption. Furthermore, it features 256K bytes of on-chip SRAM and a large number of internally banked registers, resulting in very fast excep-tion handling, and making the device ideal for real-time control applications.The AT91R40008 microcontroller features a direct connection to off-chip memory,including Flash, through the fully programmable External Bus Interface (EBI). An 8-level priority vectored interrupt controller, in conjunction with the Peripheral Data Con-troller, significantly improves the real-time performance of the device.The device is manufactured using Atmel’s high-density CMOS technology. By combin-ing the ARM7TDMI processor core with a large, on-chip, high-speed SRAM and a wide range of peripheral functions on a monolithic chip, the A T91R40008 is a powerful microcontroller that offers a flexible and high-performance solution to many compute-intensive embedded control applications.AT91 ARM ® Thumb ®Microcontroller AT91R40008SummaryNote: This is a summary document. A complete document is not available at this time. For more information, please contact your local Atmel sales office.2AT91R40008 - Summary1732DS–ATARM–03/04Pin ConfigurationFigure 1. AT91R40008 in 100-lead TQFP PackageP 21/T X D 1/N T R IP 20/S C K 1P 19P 18P 17P 16P 15/R X D 0P 14/T X D 0P 13/S C K 0P 12/F I QG N DP 11/I R Q 2P 10/I R Q 1V D D C O R EP 9/I R Q 0P 8/T I O B 2P 7/T I O A 2P 6/T C L K 2P 5/T I O B 1P 4/T I O A 1P 3/T C L K 1G N DG N DP 2/T I O B 0P1/TIOA0P0/TCLK0D15D14D13D12VDDIO D11D10D9D8D7D6D5GND D4D3D2D1D0P31/A23/CS4P30/A22/CS5VDDIO VDDCORE P29/A21/CS6P22/RXD1NWR1/NUBGND NRST NWDOVF VDDIO MCKI P23P24/BMS P25/MCKOGND GND TMS TDO TCK NRD/NOE NWR0/NWE VDDCOREVDDIO NWAIT NCS0NCS1P26/NCS2P27/NCS3A 0/N L BA 1A 2A 3A 4A 5A 6A 7A 8A 9A 10A 11A 12A 13A 14G N DG N DA 15A 16A 17A 18A 19P 28/A 20/C S 7G N D125234567891011121314151617181920212223242650272829303132333435363738394041424344454647484975517473727170696867666564636261605958575655545352100769998979695949392919089888786858483828180797877TDI V D D I OV D D I O3AT91R40008 - Summary1732DS–ATARM–03/04Pin DescriptionTable 1. AT91R40008 Pin DescriptionModuleName Function Type Active Level Comments EBIA0 - A23Address Bus Output –All valid after resetD0 - D15Data Bus I/O – NCS0 - NCS3Chip Select Output Low CS4 - CS7Chip SelectOutput High A23 - A20 after reset NWR0Lower Byte 0 Write Signal Output Low Used in Byte Write option NWR1Upper Byte 1 Write Signal Output Low Used in Byte Write option NRD Read Signal Output Low Used in Byte Write option NWE Write Enable Output Low Used in Byte Select option NOE Output Enable Output Low Used in Byte Select option NUB Upper Byte Select Output Low Used in Byte Select option NLB Lower Byte Select Output Low Used in Byte Select option NWAIT Wait Input Input Low BMSBoot Mode Select Input –Sampled during reset AICFIQ Fast Interrupt Request Input –PIO-controlled after reset IRQ0 - IRQ2External Interrupt Request Input –PIO-controlled after reset TCTCLK0 - TCLK2Timer External Clock Input –PIO-controlled after reset TIOA0 - TIOA2Multipurpose Timer I/O pin A I/O –PIO-controlled after reset TIOB0 - TIOB2Multipurpose Timer I/O pin B I/O –PIO-controlled after reset USARTSCK0 - SCK1External Serial Clock I/O –PIO-controlled after reset TXD0 - TXD1Transmit Data Output Output –PIO-controlled after reset RXD0 - RXD1Receive Data Input Input –PIO-controlled after reset PIO P0 - P31Parallel IO line I/O –WD NWDOVF Watchdog Overflow Output Low Open-drain ClockMCKI Master Clock Input Input –Schmidt trigger MCKO Master Clock Output Output –ResetNRST Hardware Reset Input Input Low Schmidt trigger NTRI Tri-state Mode Select Input Low Sampled during resetICETMSTest Mode Select Input –Schmidt trigger, internal pull-up TDI Test Data Input Input –Schmidt trigger, internal pull-up TDO Test Data Output Output –TCK Test Clock Input –Schmidt trigger, internal pull-up PowerVDDIOI/O Power Power – 3V nominal supply VDDCORE Core Power Power – 1.8V nominal supply GNDGroundGround–4AT91R40008 - Summary1732DS–ATARM–03/04Block DiagramFigure 2. AT91R40008ARM7TDMI CoreEmbeddedICEReset E B I : E x t e r n a l B u s I n t e r f a c eASB ControllerClockAIC: Advanced Interrupt ControllerAMBA BridgeEBI User InterfaceTC: Timer Counter TC0TC1TC2USART0USART12 PDC Channels2 PDC ChannelsPIO: Parallel I/O ControllerPS: Power SavingChip IDWD: WatchdogTimerAPBASBP I OP I ONRSTD0-D15A1-A19A0/NLB NRD/NOE NWR0/NWE NWR1/NUB NWAIT NCS0NCS1P26/NCS2P27/NCS3P28/A20/CS7P29/A21/CS6P30/A22/CS5P31/A23/CS4P0/TCLK0P3/TCLK1P6/TCLK2P1/TIOA0P2/TIOB0P4/TIOA1P5/TIOB1P7/TIOA2P8/TIOB2NWDOVFTMS TDO TDI TCKMCKIP25/MCKOP12/FIQ P9/IRQ0P10/IRQ1P11/IRQ2P13/SCK0P14/TXD0P15/RXD0P20/SCK1P21/TXD1/NTRIP22/RXD1P16P17P18P19P23P24/BMS256K Bytes RAM5AT91R40008 - Summary1732DS–ATARM–03/04Architectural OverviewThe AT91R40008 microcontroller integrates an ARM7TDMI with embedded ICE inter-face, memories and peripherals. The architecture consists of two main buses: the Advanced System Bus (ASB) and the Advanced Peripheral Bus (APB). Designed for maximum performance and controlled by the memory controller, the ASB interfaces the ARM7TDMI processor with the on-chip 32-bit memories, the External Bus Interface (EBI) and the AMBA ™ Bridge. The AMBA Bridge drives the APB, which is designed for accesses to on-chip peripherals and optimized for low power consumption.The AT91R40008 microcontroller implements the ICE port of the ARM7TDMI processor on dedicated pins, offering a complete, low-cost and easy-to-use debug solution for tar-get debugging.MemoriesThe AT91R40008 microcontroller embeds 256K bytes of internal SRAM. The internal memory is directly connected to the 32-bit data bus and is single-cycle accessible. The AT91R40008 microcontroller features an External Bus Interface (EBI), which enables connection of external memories and application-specific peripherals. The EBI supports 8- or 16-bit devices and can use two 8-bit devices to emulate a single 16-bit device. The EBI implements the early read protocol, enabling faster memory accesses than standard memory interfaces.PeripheralsThe AT91R40008 microcontrollers integrate several peripherals, that are classified as system or user peripherals. All on-chip peripherals are 32-bit accessible by the AMBA Bridge, and can be programmed with a minimum number of instructions. The peripheral register set consists of control, mode, data, status and enable/disable/status registers.An on-chip Peripheral Data Controller (PDC) transfers data between the on-chip USARTs and on- and off-chip memories address space without processor intervention.Most importantly, the PDC removes the processor interrupt handling overhead, making it possible to transfer up to 64K contiguous bytes without reprogramming the start address, thus increasing the performance of the microcontroller and reducing the power consumption.System PeripheralsThe External Bus Interface (EBI) controls the external memory or peripheral devices via an 8- or 16-bit data bus and is programmed through the Advanced Peripheral Bus (APB). Each chip select line has its own programming register.The Power-saving (PS) module implements the Idle mode (ARM7TDMI core clock stopped until the next interrupt) and enables the user to adapt the power consumption of the microcontroller to application requirements (independent peripheral clock control).The Advanced Interrupt Controller (AIC) controls the internal interrupt sources from the internal peripherals and the four external interrupt lines (including the FIQ) to provide an interrupt and/or fast interrupt request to the ARM7TDMI. It integrates an 8-level priority controller and, using the Auto-vectoring feature, reduces the interrupt latency time.The Parallel Input/Output Controller (PIO) controls up to 32 I/O lines. It enables the user to select specific pins for on-chip peripheral input/output functions and general-purpose input/output signal pins. The PIO controller can be programmed to detect an interrupt on a signal change from each line.The Watchdog (WD) can be used to prevent system lock-up if the software becomes trapped in a deadlock.The Special Function (SF) module integrates the Chip ID, the Reset Status and the Pro-tect registers.6AT91R40008 - Summary1732DS–ATARM–03/04User PeripheralsTwo independently configurable USARTs enable communication at a high baud rate in synchronous or asynchronous mode. The format includes start, stop and parity bits and up to 8 data bits. Each USART also features a Time-out and a Time-guard register,facilitating the use of the two dedicated Peripheral Data Controller (PDC) channels.The 3-channel, 16-bit Timer/Counter (TC) is highly programmable and supports capture or waveform modes. Each TC channel can be programmed to measure or generate dif-ferent kinds of waves, and can detect and control two input/output signals. The TC also has three external clock signals.7AT91R40008 - Summary1732DS–ATARM–03/04Associated DocumentationThe A T91R40008 is part of the A T91X40 series of microcontrollers, a member of the Atmel AT91 16/32-bit microcontroller family, which is based on the ARM7TDMI processor core. The table below contains details of associated documentation for further reference.Table 2. Associated DocumentationProductInformationDocument TitleA T91R40008Internal architecture of processor ARM/Thumb instruction sets Embedded in-circuit-emulator ARM7TDMI (Thumb) DatasheetExternal memory interface mapping Peripheral operations Peripheral user interfacesA T91x40 Series DatasheetDC characteristics Power consumptionThermal and reliability considerations AC characteristics A T91R40008 Electrical CharacteristicsProduct overview Ordering information Packaging information Soldering profileA T91R40008 Summary Datasheet (this document)8AT91R40008 - Summary1732DS–ATARM–03/04Product OverviewPower SupplyThe AT91R40008 microcontroller has two types of power supply pins: •VDDCORE pins, which power the chip core (i.e., the ARM7TDMI, embedded memory and the peripherals).•VDDIO pins, which power the I/O lines.An independent I/O supply allows a flexible adaptation to external component signal levels.Input/Output ConsiderationsAfter the reset, the peripheral I/Os are initialized as inputs to provide the user with maxi-mum flexibility. It is recommended that in any application phase, the inputs to the AT91R40008 microcontroller be held at valid logic levels to minimize the power consumption.Master ClockThe AT91R40008 microcontroller has a fully static design and works on the Master Clock (MCK) provided on the MCKI pin from an external source.The Master Clock is also provided as an output of the device on the pin MCKO, which is multiplexed through a general-purpose I/O line. While NRST is active, MCKO remains low. After the reset, the MCKO is valid and outputs an image of the MCK signal. The PIO controller must be programmed to use this pin as standard I/O line.ResetReset restores the default states of the user interface registers (defined in the user inter-face of each peripheral) and forces the ARM7TDMI to perform the next instruction fetch from address zero. Except for the program counter, the ARM7TDMI registers do not have defined reset states.NRST PinNRST is active low-level input. It is asserted asynchronously, but exit from reset is syn-chronized internally to the MCK. The signal presented on MCKI must be active within the specification for a minimum of 10 clock cycles up to the rising edge of NRST to ensure correct operation.The first processor fetch occurs 80 clock cycles after the rising edge of NRST.Watchdog ResetThe Watchdog can be programmed to generate an internal reset. In this case, the reset has the same effect as the NRST pin assertion, but the pins BMS and NTRI are not sampled. Boot Mode and Tri-state Mode are not updated. If the NRST pin is asserted and the Watchdog triggers the internal reset, the NRST pin has priority.Emulation FunctionsTri-state ModeThe AT91R40008 microcontroller provides a tri-state mode, which is used for debug purposes. This enables the connection of an emulator probe to an application board without having to desolder the device from the target board. In tri-state mode, all the out-put pin drivers of the AT91R40008 microcontroller are disabled.To enter tri-state mode, the NTRI pin must be held low during the last 10 clock cycles before the rising edge of NRST. For normal operation, the NTRI pin must be held high during reset by a resistor of up to 400 k Ω.NTRI is multiplexed with I/O line P21 and USART1 serial data transmit line TXD1.Standard RS-232 drivers generally contain internal 400 k Ω pull-up resistors. If TXD1 is connected to a device not including this pull-up, the user must make sure that a high level is tied on NTRI while NRST is asserted.9AT91R40008 - Summary1732DS–ATARM–03/04JTAG/ICE DebugARM standard embedded in-circuit emulation is supported via the JTAG/ICE port. The pins TDI, TDO, TCK and TMS are dedicated to this debug function and can be con-nected to a host computer via the external ICE interface.In ICE Debug mode, the ARM7TDMI core responds with a non-JTAG chip ID that identi-fies the microcontroller. This is not fully IEEE1149.1 compliant.Memory ControllerThe ARM7TDMI processor address space is 4G bytes. The memory controller decodes the internal 32-bit address bus and defines three address spaces:•Internal memories in the four lowest megabytes•Middle space reserved for the external devices (memory or peripherals) controlled by the EBI•Internal peripherals in the four highest megabytesIn any of these address spaces, the ARM7TDMI operates in Little-endian mode only.Internal MemoriesThe AT91R40008 microcontroller integrates 256K bytes of internal SRAM. All internal memories are 32 bits wide and single-clock cycle accessible. Byte (8-bit), half-word (16-bit) or word (32-bit) accesses are supported and are executed within one cycle. Fetching Thumb or ARM instructions is supported and internal memory can store twice as many Thumb instructions as ARM ones.The SRAM is mapped at address 0x0 (after the Remap command), allowing ARM7TDMI exception vectors between 0x0 and 0x20 to be modified by the software. Placing the SRAM on-chip and using the 32-bit data bus bandwidth maximizes the microcontroller performance and minimizes the system power consumption. The 32-bit bus increases the effectiveness of the use of the ARM instruction set and the ability of processing data that is wider than 16-bit, thus making optimal use of the ARM7TDMI advanced performance.Being able to dynamically update application software in the 256-Kbyte SRAM adds an extra dimension to the AT91R40008.Boot Mode SelectThe ARM reset vector is at address 0x0. After the NRST line is released, the ARM7TDMI executes the instruction stored at this address. This means that this address must be mapped in nonvolatile memory after the reset.The input level on the BMS pin during the last 10 clock cycles before the rising edge of the NRST selects the type of boot memory (see Table 3).The BMS pin is multiplexed with the I/O line P24, which can be programmed after reset like any standard PIO line.Table 3. Boot Mode SelectBMS Boot Memory1External 8-bit memory on NCS00External 16-bit memory on NCS010AT91R40008 - Summary1732DS–ATARM–03/04Remap CommandThe ARM vectors (Reset, Abort, Data Abort, Pre-fetch Abort, Undefined Instruction,Interrupt, Fast Interrupt) are mapped from address 0x0 to address 0x20. In order to allow these vectors to be redefined dynamically by the software, the AT91R40008microcontroller uses a Remap command that enables switching between the boot mem-ory and the internal primary SRAM bank addresses. The Remap command is accessible through the EBI User Interface by writing one in RCB of EBI_RCR (Remap Control Register). Performing a Remap command is mandatory if access to the other external devices (connected to chip-selects 1 to 7) is required. The Remap operation can only be changed back by an internal reset or an NRST assertion.Abort ControlThe abort signal providing a Data Abort or a Pre-fetch Abort exception to the ARM7TDMI is asserted when accessing an undefined address in the EBI address space.No abort is generated when reading the internal memory or by accessing the internal peripherals, whether or not the address is defined.External Bus InterfaceThe External Bus Interface handles the accesses between addresses 0x0040 0000 and 0xFFC0 0000. It generates the signals that control access to the external devices, and can be configured from eight 1M byte banks up to four 16M bytes banks. It supports byte-, half-word- and word-aligned accesses.For each of these banks, the user can program:•Number of wait states•Number of data float times (wait time after the access is finished to prevent any bus contention in case the device is too long in releasing the bus)•Data bus width (8-bit or 16-bit)The user can program the EBI to control one 16-bit device (Byte Select Access mode)with a 16-bit wide data bus or two 8-bit devices in parallel that emulate a 16-bit memory (Byte Write Access mode).The External Bus Interface also features the Early Read Protocol, configurable for all the devices, which significantly reduces access time requirements on an external device in the case of single-clock cycle access.11AT91R40008 - Summary1732DS–ATARM–03/04PeripheralsThe AT91R40008 microcontroller peripherals are connected to the 32-bit wide Advanced Peripheral Bus. Peripheral registers are only word accessible – byte and half-word accesses are not supported. If a byte or a half-word access is attempted, the mem-ory controller automatically masks the lowest address bits and generates a word access.Each peripheral has a 16-Kbyte address space allocated (the AIC only has a 4-Kbyte address space).Peripheral RegistersThe following registers are common to all peripherals:•Control Register – write-only register that triggers a command when a one is written to the corresponding position at the appropriate address. Writing a zero has no effect.•Mode Register – read/write register that defines the configuration of the peripheral. Usually has a value of 0x0 after a reset.•Data Registers – read and/or write registers that enable the exchange of data between the processor and the peripheral.•Status Register – read-only register that returns the status of the peripheral.•Enable/Disable/Status Registers are shadow command registers. Writing a one in the Enable Register sets the corresponding bit in the Status Register. Writing a one in the Disable Register resets the corresponding bit and the result can be read in the Status Register. Writing a bit to zero has no effect. This register access method maximizes the efficiency of bit manipulation and enables modification of a register with a single non-interruptible instruction, replacing the costly read-modify-write operation.Unused bits in the peripheral registers are shown as “–” and must be written at 0 for upward compatibility. These bits read 0.Peripheral Interrupt ControlThe Interrupt Control of each peripheral is controlled from the Status Register using the interrupt mask. The Status Register bits are ANDed to their corresponding interrupt mask bits and the result is then ORed to generate the Interrupt Source signal to the Advanced Interrupt Controller.The interrupt mask is read in the Interrupt Mask Register and is modified with the Inter-rupt Enable Register and the Interrupt Disable Register. The enable/disable/status (or mask) makes it possible to enable or disable peripheral interrupt sources with a non-interruptible single instruction. This eliminates the need for interrupt masking at the AIC or Core level in real-time and multi-tasking systems.Peripheral Data ControllerThe AT91R40008 microcontroller has a 4-channel PDC dedicated to the two on-chip USARTs. One PDC channel is dedicated to the receiver and one to the transmitter of each USART.The user interface of a PDC channel is integrated in the memory space of each USART.It contains a 32-bit Address Pointer Register (RPR or TPR) in addition to a 16-bit Trans-fer Counter Register (RCR or TCR). When the programmed number of transfers are performed, a status bit indicating the end of transfer is set in the USART Status Register and an interrupt can be generated.12AT91R40008 - Summary1732DS–ATARM–03/04System PeripheralsPS: Power-savingThe Power-saving feature optimizes power consumption, enabling the software to stop the ARM7TDMI clock (Idle mode), restarting it when the module receives an interrupt (or reset). It also enables on-chip peripheral clocks to be enabled and disabled individually,matching power consumption and application need.AIC: Advanced Interrupt ControllerThe Advanced Interrupt Controller has an 8-level priority, individually maskable, vec-tored interrupt controller, and drives the NIRQ and NFIQ pins of the ARM7TDMI from:•The external fast interrupt line (FIQ)•The three external interrupt request lines (IRQ0 - IRQ2)•The interrupt signals from the on-chip peripheralsThe AIC is extensively programmable offering maximum flexibility, and its vectoring fea-tures reduce the real-time overhead in handling interrupts.The AIC also features a spurious vector, which reduces spurious interrupt handling to a minimum, and a protect mode that facilitates the debug capabilities.PIO: Parallel I/O ControllerThe AT91R40008 microcontroller has 32 programmable I/O lines. Six pins are dedi-cated as general-purpose I/O pins. Other I/O lines are multiplexed with an external signal of a peripheral to optimize the use of available package pins. The PIO controller enables generation of an interrupt on input change on any of the PIO pins.WD: WatchdogThe Watchdog is built around a 16-bit counter and is used to prevent system lock-up if the software becomes trapped in a deadlock. It can generate an internal reset or inter-rupt, or assert an active level on the dedicated pin NWDOVF. All programming registers are password-protected to prevent unintentional programming.SF: Special FunctionThe AT91R40008 microcontroller provides registers that implement the following special functions:•Chip identification •RESET status •Protectmode13AT91R40008 - Summary1732DS–ATARM–03/04User PeripheralsUSART: Universal Synchronous/Asynchronous Receiver TransmitterThe AT91R40008 microcontroller provides two identical, full-duplex, universal synchro-nous/asynchronous receiver/transmitters.Each USART has its own baud rate generator and two dedicated Peripheral Data Con-troller channels. The data format includes a start bit, up to 8 data bits, an optional programmable parity bit and up to 2 stop bits.The USART also features a Receiver Time-out Register, facilitating variable length frame support when it is working with the PDC, and a Time-guard Register, used when interfacing with slow remote equipment.TC: Timer/CounterThe AT91R40008 microcontroller features a Timer/Counter block that includes three identical 16-bit Timer/Counter channels. It is possible to independently program each channel to perform a wide range of functions, including frequency measurement, event counting, interval measurement, pulse generation, delay timing and pulse width modulation.The Timer/Counter can be used in Capture or Waveform mode, and all three counter channels can be started simultaneously and chained together.14AT91R40008 - Summary1732DS–ATARM–03/04Ordering InformationTable 4. Ordering InformationOrdering Code Package Operation Range A T91R40008-66AITQFP 100Industrial (-40°C to 85°C)15AT91R40008 - Summary1732DS–ATARM–03/04Packaging InformationFigure 3. 100-lead Thin Quad Flat Pack Package OutlinePIN 1aaabbbc c 1dddθ2θ3SL1R1R20.25θcccθ116AT91R40008 - Summary1732DS–ATARM–03/04Table 5. Common Dimensions (mm)SymbolMin NomMax c 0.090.2c10.090.16L 0.450.60.75L1 1.00 REFR20.080.2R10.08S 0.2q0° 3.5°7°θ10°θ211°12°13°θ311°12°13°A 1.6A10.050.15A21.351.41.45Tolerances of Form and Positionaaa 0.2bbb0.2Table 6. Lead Count Dimensions (mm)Pin Count D/E BSC D1/E1 BSC bb1 e BSC ccc ddd Min Nom Max Min Nom Max 10016.014.00.170.220.270.170.20.230.500.100.06Table 7. Device and 100-lead TQFP Package Maximum Weight710mgTable 8. 100-lead TQFP Package CharacteristicsMoisture Sensitivity Level317AT91R40008 - Summary1732DS–ATARM–03/04Soldering ProfileTable 9 gives the recommended soldering profile from J-STD-20. Small packages may be subject to higher temperatures if they are reflowed in boards with larger components. In this case, small packages may have to withstand tempera-tures of up to 235°C, not 220°C (IR reflow).Recommended package reflow conditions depend on package thickness and volume.See Table 10.When certain small thin packages are used on boards without larger packages, these small packages may be classified at 220°C instead of 235°C.Notes:1.The packages are qualified by Atmel by using IR reflow conditions, not convection orVPR.2.By default, the package level 1 is qualified at 220°C (unless 235°C is stipulated).3.The body temperature is the most important parameter but other profile parameterssuch as total exposure time to hot temperature or heating rate may also influence component reliability.A maximum of three reflow passes is allowed per component.Table 9. Soldering ProfileConvection or IR/ConvectionVPR Average Ramp-up Rate (183° C to Peak)3°C/sec. max.10°C/sec.Preheat Temperature 125°C ±25°C 120 sec. max Temperature Maintained Above 183°C 60 sec. to 150 sec.Time within 5°C of Actual Peak Temperature 10 sec. to 20 sec.60 sec.Peak T emperature Range 220 +5/-0°C or 235 +5/-0°C 215 to 219°C or 235 +5/-0°C Ramp-down Rate6°C/sec.10°C/sec.Time 25°C to Peak Temperature6 min. maxTable 10. Recommended Package Reflow Conditions (1, 2, 3)Parameter Temperature Convection 235 +5/-0°C VPR235 +5/-0°C IR/Convection235 +5/-0°C。

PD191 单相表用户手册说明书

PD191 单相表用户手册说明书

南京能保电气有限公司版权所有本用户手册适用于PD191型产品V2.*版本程序。

本用户手册和产品今后可能会有小的改动,请注意核对你使用的产品与手册的版本是否相符。

1 说明书单独成册 2015-9-1823更多产品信息,请访问:目录第一章绪论 (1)第一节概述 (1)功能简述 (1)硬件配置 (1)第二节特点及参数 (2)技术特点 (2)技术参数 (2)第三节订货信息 (3)第二章安装 (4)第一节安装须知 (4)过电流保护 (4)浪涌保护 (4)第二节安装尺寸及方法 (4)端子介绍 (5)接线示意图 (6)第三章操作 (8)第一节面板图示 (8)第二节参数设定操作方法 (9)第四章通信 (12)第一节命令格式及示例 (12)第二节电量系数 (13)第三节数据地址 (14)PD191单相表用户手册第一章 绪 论第一节 概述PD191智能配电仪表是一种采集配电信息,具备数据传输的数字仪表,它集数据采集与控制功能为一身。

它可以代替多种仪表、继电器、变送器和其他元件。

PD191智能配电仪表可安装在配电系统内的不同位置。

PD191智能配电仪表,是针对电力系统、工矿企业、公用设施、智能大厦的电力监控需求而设计的配电仪表。

该系列每种产品分别对应测量常规单相电参数,如单相电流、电压、有功、无功功率,功率因数,开关状态等。

它还能接受远方的控制命令,输出相应的出口,完成远方控制功能。

它具有模拟量输出功能,自定义输出的电量。

功能简述硬件配置第二节特点及参数技术特点PD191的设计充分考虑了可靠性、简易性、性价比等方面,现具有以下特点: • 可直接从电流、电压互感器接入信号• 可任意设置PT/CT变比• 2路的开入量(隔离)输入• 2路的开出量(继电器)输出• 1路的模拟量输出4~20mA• 多块仪表可设置不同的通讯地址,多种通信速率供选择• 可通信接入SCADA、PLC系统中• 可与绝大多数PLC相连(GE、Siemens、AB等)• 可与业界多种软件通讯(inTouch、Fix、GMS800、组态王等)技术参数输入信号电压输入•额定电压:100V/380V•过载能力:1.2倍额定值(连续) 2500V/1秒(不连续)•输入负荷:小于0.2VA输入电流•额定电流:5A、1A•过载能力:1.2倍额定值(连续) 100A/1秒(不连续)•输入负荷:小于0.2VA频率输入:45~55 HZ测量精度•电压、电流精度:0.5级•其他电量精度:1级•频率精度:0.1Hz通信•通信接口:RS-485 ,异步半双工,1位起始位,8位数据位,1位停止位,无校验•协议:MODBUS-RTU•波特率:4800~9600 bps工作环境•工作温度:-20℃~60℃• 存储温度:-40℃~75℃•相对湿度:5%~90%不结露信号开入• 接入方式:干接点接入• 光电耦合器隔离:4000VAC.rms信号开出• 输出方式:脉冲输出,遥控脉冲宽度为1秒• 继电器输出容量:5A/250VAC,5A/30VDC外形尺寸和重量• 长宽深:72x72x95mm• 净重:0.25KG电源• 工作电压:AC/DC 60~265V• 最大功耗:≤3W第三节订货信息第二章安装第一节安装须知过电流保护过电流保护建议在装置电源处加入1A的保险丝或空开。

NTE电子有限公司 R51系列自动汽车继电器说明书

NTE电子有限公司 R51系列自动汽车继电器说明书

Electrical Specifications
Contact
Contact Material: AgSnO alloy Contact Rating: See Chart
Coil
Coil voltage: See Chart Coil resistances: See Chart
Operational Characteristics
Байду номын сангаас
1.120 (28.5) Max
.250 (6.3)
.236 (6.0) .630 (16.0) .992 (25.2) Max
.165 (4.2)
1.120 (28.5) Max
.453 (11.5) Max
.250 (6.3) .705 (17.9)
86
.661
87a
(16.8) 30
87
85
.315 (8.0)
DESCRIPTION 4−PIN 5−PIN 4−PIN 5−PIN 4−PIN
4-PIN SPST-NO Weatherproof Socket 5-PIN SPDT Weatherproof socket
NTE TYPE NO. R95−159 (70A ONLY) R95−160 (50A ONLY) R95−189 (50A ONLY) R95−188 (50A ONLY) R95−160A (70A ONLY) R95−190 R95−191
D38a
1.142 (29.0) Max
.866 (22.0) Max
1.670 (42.5) Max
1.043 (26.5) Max
.453 (11.5) Min .709 (18.0) Min

P2419HB 显示器简化服务手册说明书

P2419HB 显示器简化服务手册说明书

Simplified Service Manual–P2419HBVersion: 01Date:2021/02/04Content Index1. General Safety Instructions (3)1.1 SAFETY: General Safety (3)1.2 SAFETY: General Power Safety (5)2. Exploded view diagram with list of items (6)3. Wiring connectivity diagram (7)4. Disassembly and Assembly Procedures (8)4.1 Disassembly SOP (8)4.2 Assembly SOP (11)5. Trouble shooting instructions (14)1. General Safety InstructionsUse the following safety guidelines to help ensure your own personal safety and to help protect your equipment and working environment from potential damage.NOTE: In this section, equipment refers to monitors.IMPORTANT NOTICE FOR USE IN HEALTHCARE ENVIRONMENTS:Dell products are not medical devices and are not listed under UL or IEC 60601 (or equivalent). As a result, they must not be used within 6 feet of a patient or in a manner that directly or indirectly contacts a patient1.1 SAFETY: General SafetyWARNING: To prevent the spread of fire, keep candles or other open flames away from this product at all times.When setting up the equipment for use:⏹Place the equipment on a hard, level surface. Leave 10.2 cm (4 in) minimum of clearance onall vented sides of the computer to permit the airflow required for proper ventilation.⏹Restricting airflow can damage the computer or cause a fire.⏹Do not stack equipment or place equipment so close together that it is subject torecalculated or preheated air.⏹NOTE: Review the weight limits referenced in your computer documentation before placinga monitor or other devices on top of your computer.⏹Ensure that nothing rests on your equipment's cables and that the cables are not locatedwhere they can be stepped on or tripped over.⏹Ensure that all cables are connected to the appropriate connectors. Some connectors havea similar appearance and may be easily confused (for example, do not plug a telephonecable into the network connector).⏹Do not place your equipment in a closed-in wall unit or on a bed, sofa, or rug.⏹Keep your device away from radiators and heat sources.⏹Keep your equipment away from extremely hot or cold temperatures to ensure that it is usedwithin the specified operating range.⏹Do not push any objects into the air vents or openings of your equipment. Doing so cancause fire or electric shock by shorting out interior components.⏹Avoid placing loose papers underneath your device. Do not place your device in a closed-inwall unit, or on a soft, fabric surface such as a bed, sofa, carpet, or a rug.When operating your equipment:⏹Do not use your equipment in a wet environment, for example, near a bath tub, sink, orswimming pool or in a wet basement.⏹Do not use AC powered equipment during an electrical storm. Battery powered devices maybe used if all cables have been disconnected.⏹Do not spill food or liquids on your equipment.⏹Before you clean your equipment, disconnect it from the electrical outlet. Clean your devicewith a soft cloth dampened with water. Do not use liquids or aerosol cleaners, which maycontain flammable substances.⏹Clean the monitor display with a soft, clean cloth and water. Apply the water to the cloth,then stroke the cloth across the display in one direction, moving from the top of the displayto the bottom. Remove moisture from the display quickly and keep the display dry.⏹Long-term exposure to moisture can damage the display. Do not use a commercial windowcleaner to clean your display.⏹If your equipment does not operate normally - in particular, if there are any unusual soundsor smells coming from it - unplug it immediately and contact an authorized dealer or servicecenter.Protecting Against Electrostatic DischargeElectrostatic discharge (ESD) events can harm electronic components inside your equipment. Under certain conditions, ESD may build up on your body or an object, such as a peripheral, and then discharge into another object, such as your computer. To prevent ESD damage, you should discharge static electricity from your body before you interact with any of your equipment’s internal electronic components, such as a memory module. You can protect against ESD by touching a metal grounded object (such as an unpainted metal surface on your computer’s I/O panel) before you interact with anything electronic. When connecting a peripheral (including handheld digital assistants) to your equipment, you should always ground both yourself and the peripheral before connecting it. In addition, as you work inside the equipment, periodically discharge any static charge your body may have accumulated.You can also take the following steps to prevent damage from electrostatic discharge:⏹When unpacking a static-sensitive component from its shipping carton, do not remove thecomponent from the antistatic packing material until you are ready to install the component.Just before un wrapping the antistatic package, be sure to discharge static electricity fromyour body.⏹When transporting a sensitive component, first place it in an antistatic container orpackaging.⏹Handle all electrostatic sensitive components in a static-safe area. If possible, use antistaticfloor pads and work bench pads.1.2 SAFETY: General Power SafetyObserve the following guidelines when connecting your equipment to a power source:⏹Check the voltage rating before you connect the equipment to an electrical outlet to ensurethat the required voltage and frequency match the available power source.⏹Do not plug the equipment power cables into an electrical outlet if the power cable isdamaged⏹Norway and Sweden: If this product is provided with a 3-prong power cable, connect thepower cable to a grounded electrical outlet only.⏹If you use an extension power cable, ensure that the total ampere rating of the productsplugged in to the extension power cable does not exceed the ampere rating of the extension cable.⏹If you must use an extension cable or power strip, ensure the extension cable or power stripis connected to a wall power outlet and not to another extension cable or power strip. Theextension cable or power strip must be designed for grounded plugs and plugged into agrounded wall outlet.⏹If you are using a multiple-outlet power strip, use caution when plugging the power cable intothe power strip. Some power strips may allow you to insert a plug incorrectly. Incorrectinsertion of the power plug could result in permanent damage to your equipment, as well asrisk of electric shock and/or fire. Ensure that the ground prong of the power plug is insertedinto the mating ground contact of the power strip.⏹Be sure to grasp the plug, not the cable, when disconnecting equipment from an electricsocket.If your equipment uses an AC adapter:⏹Use only the Dell provided AC adapter approved for use with this device. Use of another ACadapter may cause a fire or explosion.⏹NOTE: Refer to your system rating label for information on the proper adapter modelapproved for use with your device.⏹Place the AC adapter in a ventilated area, such as a desk top or on the floor, when you useit to run the computer or to charge the battery. Do not cover the AC adapter with papers orother items that will reduce cooling; also, do not use the AC adapter inside a carrying case.⏹The AC adapter may become hot during normal operation of your computer. Use care whenhandling the adapter during or immediately after operation.⏹It is recommended that you lay the adapter on the floor or desk so that the green light isvisible. This will alert you if the adapter should accidentally go off due to external effects. Iffor any reason the green light goes off, disconnect the AC power cord from the wall for aperiod of ten seconds, and then reconnect the power cord.⏹Japan Only: Use only the Dell-provided AC power cable with the AC adapter. Use of anyother power cable may damage the device or AC adapter or may present risk of fire orelectric shock.2. Exploded view diagram with list of itemsItem DescriptionQ'ty Remark1 ASSY BZL CHIN 12Panel13 PCBA CTRL BD 14 BTN PWR 15 MID FRAME 16 PCBA I/F BD 17 PCBA SPS BD 18 ASSY SHD MAIN 19 MYLAR SAFETY 1 10 PCBA USB BD 1 11 ASSY RC 1 12 ASSY CLMN 1 13 ASSY BASE 1 14 Power cable1 15 DisplayPort cable 1 16 VGA cable1 17 USB 3.0 upstream cable 1123456 78910111213141517163. Wiring connectivity diagramFFC 1 Wire 1 FFC 24. Disassembly and Assembly Procedures4.1 Disassembly SOPPreparation before disassemble 1. Clean the room for disassemble 2. Identify the area for monitor3. Check the position that the monitors be placed and the quantity of the monitor; prepare the area for material flow; according to the actual condition plan the disassemble layout4. Prepare the implement, equipment, material as bellow: 1) Working table2) Philips-head screwdriver 3) Hex-head screwdriver 4) Glove5) Cleaning cloth 6) ESD protectionItemPictureOperationToolNotes1To remove the stand:1. Place the monitoron a soft cloth or cushion2. Press and hold thestand release button3. Lift the stand up andaway from the monitor.21. Unlock 4 Rear Cover screws2. Disassemble RearCover and Middle Frame according to the sequence as the picture showed Philips-head screwdriverTorsion of RC screw: 9±1Kgf31. Pull out lamp cablefrom SPS Board42. Pull out USB board cable from I/F Board51. Extract Control Board FFC cable from I/F Board2. Tear off ControlBoard FFC cable from Main Shielding61. Tear off tapes to disassemble Main Shielding2. Pull out LVDS cableand take off Main Shielding71. Disassemble Mylarfrom Main Shielding2. Unlock 6 PCBscrews and 2 hexscrews1. Philips-headscrewdriverTorsion ofPCB screw:8~9kgf2. Hex-headscrewdriverTorsion ofhex screw:5±0.6Kgf81. Take out I/F Boardand SPS Boardfrom Main Shielding 2. Pull out LVDS cableand SPS boardcable from I/F Board4.2 Assembly SOPPreparation before assemble 1. Clean the room for work 2. Identify the area for material3. Prepare the implement, equipment, material as bellow: 1) Working table2) Philips-head screwdriver 3) Hex-head screwdriver 4) Glove5) Cleaning cloth 6) ESD protectionItem Picture OperationTools Notes11. Insert the LVDS cable intoI/F Board.2. Assemble SPS Board inMain Shielding3. Insert the SPS Board cable into I/F Board and then assemble I/F Board into Main Shielding4. Lock 6 PCB screws and 2hex screws1. Philips-headscrewdriverTorsion of PCB screw: 8~9kgf2. Hex-head screwdriverTorsion of hex screw: 5±0.6Kgf21. Assemble Mylar (PasteMylar on Main Shielding like the picture showed)I/F BD31-1 For Samsung/INX/BOE PanelInsert LVDS cable intointerface on panel and paste acetate tape1-2 For LGD PanelInsert LVDS cable intointerface on panel and paste 2 acetate tapes2. Locate Main Shielding on panel and paste 2 tapes to fix Main Shielding41. Insert lamp wire into SPSBoard2. Arrange the Control BoardCable and insert Control Board Cable into I/F Board3. Fix Control Board Cable onthe panel and Main Shielding4. Insert USB Board Cable intoI/F Board51.Assemble Rear Cover andMiddle Frame according tothe sequence as the pictureshowed2. Lock 4 Rear Cover screwsPhilips-headscrewdriverTorsion ofRC screw:9±1Kgf6To attach the monitor stand: 1. Follow the instructions onthe flaps of carton to removethe stand from the topcushion that secures it.2. Insert the stand base blocksfully into the stand slot.3. Lift the screw handle andturn the screw clockwise. 4. After fully tightening thescrew, fold the screw handleflat within the recess.5. Attach the stand assemblyto the monitor.a. Fit the two tabs on theupper part of the stand tothe groove on the back ofthe monitorb. Press the stand down till itsnaps into place5. Trouble shooting instructions- 21 -。

印刷版A1双核4.1.doc.

印刷版A1双核4.1.doc.

使用说明
本机概览 第一章 第一章本机概览
一、本机附带以下配件
配件名称 主 机 充电器 数据线 USB HOST 转接线 用户手册(本手册) 三 包 合格证 【温馨提示】充电器为单独包装。 1 规格 台 个 条 条 本 本 张 数量 1 1 1 1 1 1 1
使用说明
二、本机外观图
USB 接口和高清输出接口为隐形接口, 【注意】HOST 接口、 接口、USB 在使用其中接口进行连接前,请先打开黑色外盖。
1、开机:请长按电源键“ ”,直至出现开机画面。 2、关机:请长按电源键“ ”,弹出“关机”对话框,点按“确定”关闭本机。 【注意】非法关机后,重启会扫描和修复磁盘,开机时间较长,请耐心等待。
三、待机与解锁
: 在系统默认或设定时间内对设备没有任何操作,设备将关闭屏幕,自动进 1、自动待机 自动待机: 入待机状态。 : 短按电源键“ ” 2、手动待机 、手动待机: ,设备将进入待机状态,防止误操作,节约电源。 : 在待机状态下,短按电源键“ ”点亮屏幕,然后在屏幕上点按住 “ ” 3、解除锁屏 解除锁屏: 图标,把它拖动到“ ”图标所在的光圈上,即可解除锁屏。
使用说明
目 录
第一章本机概览............................................................................................................................ 1 第二章 基 本 操 作.................................................................................................................... 4 一、充电操作及电池管理........................................................................................................ 4 二、开机与关机........................................................................................................................4 三、待机与解锁........................................................................................................................4 四、复位功能............................................................................................................................4 五、主界面图标详解和具体操作............................................................................................ 5 六、重力感应............................................................................................................................5 七、输入法的切换.................................................................................................................... 6 八、扩展卡的使用.................................................................................................................... 6 九、电脑连接............................................................................................................................6 第三章 基本设置.......................................................................................................................... 7 第四章 主要应用程序................................................................................................................ 10 七、图 片.................................................................................................................................... 17 附 录............................................................................................................................................ 20
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