ADD-55中文资料
AMZ-55中文资料
15801 Chemical Lane, Huntington Beach, CA 92649-1595Phone: (714) 898-0960 • FAX: (714) 896-0971 • email: sales@RhombusIndustries Inc.For other values & Custom Designs, contact factory.Specifications subject to change without notice.AMZ 9901AMZ & AMY Series Passive 5-T ap DIP/SMD Delay Modules1. Rise Times are measured from 10% to 90% points.2. Delay Times measured at 50% point of leading edge.3. Output (100% Tap) terminated to ground through R L =Z O Low Profile 8-Pin Package for Surface Mount Applications Low Distortion LC Network 5 Equal Delay TapsFast Rise Time -- BW 0.35 / t rStandard Impedances: 50 - 75 - 100 - 200 ΩStable Delay vs. Temperature: 100 ppm/O C Operating Temperature Range -55O C to +125O CAM Y Style Schematic Per table, substitute AMY for AMZ in P/N100%81IN380%20%560%640%7COM42COM 100%81IN320%40%560%680%7COM 42COM AM Z Style Schematic Recommended for New DesignsDimensions in Inches (mm).300(7.62) .285(7.24) MAX..010(0.25) TYP..365(9.27) MAX..505(12.83) MAX..120 MIN.(3.05) MAX..205(5.21).100(2.54) TYP..050(1.27) TYP. .020(0.51) TYP. .020(0.51)TYP.J-SMD .330 (8.38) MAX..020 R (0.51).285(7.24) MAX..285 (7.24).260 (6.60) MAX..215(5.46) .030(0.76) TYP..505(12.83) MAX..100(2.54) TYP..020(0.51) TYP..050(1.27) TYP.To Specify SMD: Add Suffix "J" to P/NG-SMDG-SMD.400 (10.16).430 (10.92) .285(7.24) MAX..030(0.76) TYP. .010(0.25) TYP..008 R (0.20).505(12.83) MAX..205(5.21) MAX..015(0.38) TYP..020(0.51) TYP. .050(1.27) TYP. .100(2.54) TYP.To Specify SMD: Add Suffix "G" to P/NJ-SMDDelay Tolerances 50 Ohm Part NumberRise Time (ns)DCR max.(Ohms)75 Ohm Part NumberRise Time (ns)DCR max.(Ohms)100 Ohm Part NumberRise Time (ns)DCR max.(Ohms)200 Ohm Part NumberRise Time (ns)DCR max.(Ohms)Total (ns)Tap-to-Tap(ns)2.5 ± 0.30.5 ± 0.2AMZ-2.551.50.4AMZ-2.57 1.50.6AMZ-2.51 1.50.6AMZ-2.52 1.50.9 5 ± 0.5 1.0 ± 0.3AMZ-55 2.00.5AMZ-57 2.00.6AMZ-51 2.00.6AMZ-52 2.0 1.1 6 ± 0.5 1.2 ± 0.4AMZ-65 2.30.5AMZ-67 2.30.6AMZ-61 2.40.7AMZ-62 2.6 1.1 7 ± 0.5 1.4 ± 0.4AMZ-75 2.60.6AMZ-77 2.60.6AMZ-71 2.80.8AMZ-72 2.8 1.1 7.5 ± 0.5 1.5 ± 0.5AMZ-7.552.80.6AMZ-7.57 2.80.8AMZ-7.51 2.90.8AMZ-7.52 2.9 1.4 8 ± 0.5 1.6 ± 0.5AMZ-85 3.00.6AMZ-87 3.00.9AMZ-81 3.00.8AMZ-82 3.1 1.4 9 ± 0.5 1.8 ± 0.5AMZ-95 3.30.7AMZ-97 3.40.9AMZ-91 3.40.8AMZ-92 3.4 1.4 10 ± 1.0 2.0 ± 0.5AMZ-105 3.40.7AMZ-107 3.50.9AMZ-101 3.60.9AMZ-102 3.6 1.6 15 ± 1.0 3.0 ± 0.6AMZ-155 5.20.9AMZ-157 5.2 1.7AMZ-151 5.2 1.8AMZ-152 5.2 2.7 20 ± 1.0 4.0 ± 1.0AMZ-205 6.8 1.0AMZ-207 6.8 1.9AMZ-201 6.8 2.0AMZ-202 6.8 2.8 25 ± 1.25 5.0 ± 1.0AMZ-2558.5 1.3AMZ-2578.5 2.1AMZ-2518.5 2.2AMZ-2528.5 3.0 30 ± 1.5 6.0 ± 1.5AMZ-30510.2 1.4AMZ-30710.2 2.2AMZ-30110.2 2.4AMZ-30210.2 3.2 35 ± 1.757.0 ± 1.5AMZ-35511.9 1.5AMZ-35711.9 2.4AMZ-35111.9 2.6AMZ-35211.9 3.4 40 ± 2.08.0 ± 1.8AMZ-40513.6 1.6AMZ-40713.6 2.7AMZ-40113.6 2.8AMZ-40213.6 3.6 50 ± 2.510.0 ± 2.0AMZ-50517.0 2.0AMZ-50717.0 2.9AMZ-50117.0 3.1AMZ-50217.0 5.5 60 ± 3.012.0 ± 2.5AMZ-60520.4 2.2AMZ-60720.4 3.3AMZ-60120.4 3.3AMZ-60220.4 6.2 75 ± 3.7515.0 ± 3.0AMZ-75525.5 2.5AMZ-75725.5 3.6AMZ-75125.5 3.6AMZ-75225.5 6.8 80 ± 4.016.0 ± 3.0AMZ-80527.2 2.6AMZ-80727.2 3.4AMZ-80127.2 5.0AMZ-80227.27.0100 ± 5.020.0 ± 3.0AMZ-100534.0 3.0AMZ-100734.0 3.7AMZ-100134.0 5.8AMZ-100234.07.8Electrical Specifications at 25O C 1, 2, 3 Note: For SMD Package add "G" of "J" as below to P/N in TableOperating Specifications - Passive Delay LinesPulse Overshoot (Pos)................................... 5% to 10%, typical Pulse Distortion (S)..................................................... 3% typical Working Voltage.............................................. 25 VDC maximum Dielectric Strength........................................... 100VDC minimum Insulation Resistance ........................ 1,000 M Ω min. @ 100VDC Temperature Coefficient................................. 70 ppm/O C, typical Bandwidth (f C )....................................................... 0.35/t r approx.Operating Temperature Range............................. -55O to +125O C Storage Temperature Range................................ -65O to +150O C元器件交易网。
EMVY6R3ADA470ME55G中文资料(Nippon Chemi-Con)中文数据手册「EasyDatasheet - 矽搜」
请参考“产品代码指南（表面贴装型）”
◆标记
D55 to JA0 EX) 6.3V100µF
7hY
100 6.3V
KE0 to MN0
EX) 16V1,000µF
0V MVY
1000 16V
(1/2)
芯片中文手册,看全文,戳
表面安装铝电解电容器
1.8
95 EMVY6R3ADA330ME55G
47 E55
1.8
95 EMVY6R3ADA470ME55G
100 F55
1.0
140 EMVY6R3ADA101MF55G
220 F55
1.0
140 EMVY6R3ADA221MF55G
330 F80
0.34
280 EMVY6R3ADA331MF80G
≦The initial specified value
≦The initial specified value
Shelf Life
The following specificationsshall be satisfied when the capacitorsare restored to 20℃ after exposing them for 1,000 hoursat 105℃ without
Lower Z MVE
◆技术指标
Items
特点
Category Temperature Range
-55 to +105℃ (6.3 to 63V dc ) -40 to +105℃ (80 & 100V dc )
Rated Voltage Range 6.3 to 100V dc
EN1T11中文资料
EN1T11中⽂资料FeaturesHarmonic Current Attenuation to EN61000-3-2 EMI Filtering to EN55022, Level B Transient Immunity to EN61000-4-5 575W Rated Power Output Autoranging 115/230Vac Input Microprocessor Control Inrush Current LimitingProduct HighlightsThe ENMods system is a new AC front end solution for compliance to electromagnetic compatibility (EMC) standards. It consists of the MiniHAM — a passive harmonic attenuation module and the FARM3 — an auto ranging AC-DC front end /doc/be6f2843c850ad02de8041d2.html bined with the filtering and hold-up capacitors as specified herein, the ENMods system provides full compliance to:EN61000-3-2 Harmonic CurrentEN55022, Level B Conducted Emissions EN61000-4-5 Surge Immunity EN61000-4-11 Line Disturbances The MiniHAM is the first passive product specifically designed for compliance to EN harmonic current limits. Unlike active PFC solutions, the MiniHAM generates no EMI,greatly simplifying and reducing systemnoise filtering requirements. It is alsoconsiderably smaller and more efficient than active alternatives and improves MTBF by an order of magnitude. Optimized for operation on the DC bus (provided by the FARM3) rather than directly on the AC line,it will provide harmonic current compliance up to 600W of input power at 230Vac. The 115/230Vac input FARM3 is a new member of Vicor’s Filter and Autoranging Module product line that has been optimized for use as the front end for the MiniHAM.Both modules are in Vicor’s standard Mini half-brick package. Together with Vicor’s 1st or 2nd Generation 300V input DC-DC converters, they form the basis of a low noise, high efficiency, rugged, simple and reliable EN compliant power system.Data SheetENModsTMComponent Power Front End System for EN Compliance4Each module:2.28 x 2.2 x 0.5 in 57,9 x 55,9 x 12,7 mmAbsolute MaximumRatingsThermal ResistancePart Numbering*EN1 product includes one each MiniHAM and FARM3 with same product grade, pin and baseplate style.**Pin styles S & N are compatible with the ModuMate interconnect system for socketing and surface mounting.ParameterMin Typ Max Unit NotesOperating input voltage 90115132Vac Autoranging (doubler mode)Operating input voltage 180230264Vac Autoranging (bridge mode)Input undervoltage 90Vac No damageAC line frequency 4763HzC-,T-, H- and M-Grade Power factor 0.680.72Typical line Inrush current 30Amps 264Vac line voltage Efficiency 9496%Full loadAC Bus OK (BOK)Low state resistance 15?To negative output - Bus normal Low state current 50mA Bus normalHigh state voltage 14.815.015.2Vdc Bus abnormal, 27k internal pull up to 15Vdc (see Figure12)BOK true threshold 235240245Vdc Output Bus voltage BOK false threshold 200205210VdcOutput Bus voltageModule Enable (EN)Low state resistance 15?To negative output - Converters disabledLow state current 50mA High state voltage 14.815.015.2Vdc 150k internal pull up to 15Vdc (see Figure 11)Enable threshold 235240Vdc Output bus voltage Disable threshold 185190195Vdc Output bus voltageAC Bus OK - Module Enable, differential error*151720VdcAC Bus OK and Module Enable thresholds track FARM3 MODULE SPECIFICATIONS (see Figure 3 thru Figure 7 for operating characteristics)MINIHAM MODULE SPECIFICATIONS (when used in accordance with Figure 1a)Electrical CharacteristicsElectrical characteristics apply over the full operating range of input voltage, output power and baseplate temperature, unless otherwise specified. All temperatures refer to the operating temperature at the center of the baseplate. Performance specifications are based on the ENMods system as shown in Figure 1a.*Tracking error between BUS OK and Enable thresholdsELECTROMAGNETIC COMPATIBILITY (configured as illustrated in Figures 1a and 1b)Harmonic currents EN61000-3-2, Amendment 1450-625W, 230Vac input 575W output (see Figure 2)Input line disturbances EN61000-4-11Input surge withstand EN61000-4-52kV–50 µs common mode 1kV–50 µs differential mode Conducted emissionsEN55022, Level B(See Figures 8a thru 8c)Electrical Characteristics (continued)MODULE GENERAL SPECIFICATIONSParameter Min Typ Max Unit NotesSafety approvalsFARM3TüV + VDE EN60950, CE Marked (pending) MiniHAM CE Marked (pending)Isolation (in to out)None Isolation provided by DC-DC converter(s) Dielectric withstand (I/O to baseplates)1500Vrms Baseplate earthedLeakage current 2.5mA264VacMTBF>1,000,000Hours25?C, Ground BenignBaseplate material AluminumCover Dupont Zenite / AluminumPin material–Style 1 & 2Copper, Tin/Lead solder dipped–Style S & N (ModuMate compatible)Copper, Nickel/Gold platingWeightFARM3 3.1(88)Ounces (grams)MiniHAM 5.1(145)Ounces (grams)Size 2.25 x 2.2 x 0.5Inches Vicor’s standard mini half-brick package57,9 x 55,9 x 12,7mmStorage temperature(C-, T-Grade)-40+125°C(H-Grade)-55+125°C(M-Grade)-65+125°COperating temperature(C-Grade)-20+100°C Baseplate(T-, H-Grade)-40+100°C Baseplate(M-Grade)-55+100°C BaseplateFigure 1a—ENMods system and DC-DC converter interconnection drawingOperating Characteristics— Input EMI filter for EN55022, Level B complianceFigure 1b ArrayFigure 2 —Measured harmonic current at 230VAC, 575W vs. EN spec limits *Measured values of even harmonics are below 0.01AOperating Characteristics (FARM3)Figure 3—Start-up at 120Vac input Figure 6—Power-down from 240VacFigure 4—Start-up at 240Vac inputVdc outputStrap EngagedI ac input @2A / mVI ac input @2A / mVEnable Enable B OKVdc outputB OKVdc output Enable B OKVdc outputEnableB OKFigure 7—Output overvoltage protection 240Vac rangeVdc outputEnableB OKOperating Characteristics (Conducted emissions relative to EN55022 Reference Figure 1a)Quasi Peak and Average LimitsFigure 8a —Peak detectionFigure 8b —Quasi peak detectionFigure 8c —Average detectionThe ENMods system provides an effective solution for the AC front end of a power supply built with Vicor DC-DC converters.This high performance power system building block satisfies a broad spectrum of requirements and agency standards.The ENMods system provides transient/surge immunity, harmonic current attenuation and EMI filtering, in addition to all of the power switching and control circuitry necessary for autoranging rectification, inrush current limiting, and overvoltage protection.Converter enable and status functions for orderly power up/down control or sequencing are also provided. To complete the AC front end configuration, the user only needs to add hold-up capacitors,a simple EMI filter, and a few discrete components (Fig 1A).Functional Description (F ARM3, see Figures 9 & 10)Power-Up Sequence.Upon application of input power, the hold-up capacitorsbegin to charge. The thermistor limits the charge current,and the exponential time constant is determined by the hold-up capacitor value and the thermistor cold resistance.The slope (dv/dt) of the capacitor voltage versus time approaches zero as the capacitors become charged to the peak of the AC line voltage.The switch that bypasses the inrush limiting PTC (positive temperature coefficient) thermistor is open when power is applied, as is the switch that engages the strap for voltage doubling. In addition, the converter modules are disabled via the Enable (EN) line, and Bus-OK (BOK) is high.If the bus voltage is less than 200V as the slope nearszero, the voltage doubler is activated, and the bus voltage climbs exponentially to twice the peak line voltage. If the bus voltage is greater than 200V , the doubler is not activated.If the bus voltage is greater than 235V as the slopeapproaches zero, the inrush limiting thermistor is bypassed. Below 235V , it is not bypassed.The converters are enabled 50 milliseconds after thethermistor bypass switch is closed.Bus-OK is asserted after an additional 50 milliseconddelay to allow the converter outputs to settle within specification.Power-Down Sequence.When input power is turned off or fails, the following sequence occurs as the bus voltage decays:Bus-OK is deasserted when the bus voltage falls below210Vdc.The converters are disabled when the bus voltage fallsbelow 190Vdc. If power is reapplied after the converters are disabled, the entire power-up sequence is repeated. If a momentary power interruption occurs and power is reestablished before the bus reaches the disable threshold, the power-up sequence is not repeated, i.e., the power conversion system “rides through” the momentary interruption.Application NoteFigure 9—Functional block diagram: FARM3 module Figure 10—Timing diagram: power-up/down sequence1.12.13.14.15.11.22.2Off-Line Power Supply ConfigurationThe ENMods system maintains the DC output bus voltage between 250 and 370Vdc over the entire input voltage range, which is compatible with all Vicor 300V input converters. Autoranging automatically switches to the proper bridge or doubler mode at startup depending on the input voltage, eliminating the possibility of damage due to improper line connection. The ENMods system is rated at 575W output power. These modules can serve as the AC front end for any number and combination of compatible converters as long as the maximum power rating is not exceeded.Pin Descriptions (see Figure 1a)Strap (ST) Pin.In addition to input and output power pin connections, it is necessary to connect the Strap pin to the center junction of the series hold-up capacitors (C1, C2)for proper (autoranging) operation. Varistors V1 and V2 provide capacitor protection. The bleeder resistors (R1, R2)discharge the hold-up capacitors when power is switched off. Capacitors C7 and C8 are recommended if the hold-up capacitors are located more than 3 inches from the output pins.Enable (EN) Pin.The Enable pin must be connected to the PC or Gate-In pin of all converter modules to disable the converters during power-up. Otherwise, the converters would attempt to start while the hold-up capacitors are being charged through the current limiting thermistor,preventing the bus voltage from reaching the thermistor bypass threshold, thus disabling the power supply. The Enable output (the drain of an N channel MOSFET) is internally pulled up to 15V through a 150k?resistor. (see Figure 11)A signal diode should be placed close to and in series with the PC or (Gate-In) pin of each converter to eliminate the possibility of control interference between converters.The Enable pin switches to the high state (15V) with respectto the SR pin to turn on the converters after the power-up inrush is over. The Enable function also provides input overvoltage protection for the converters by turning off the converters if the DC bus voltage exceeds 400Vdc. The thermistor bypass switch opens if this condition occurs, placing the thermistor in series with the input voltage, which reduces the bus voltage to a safe level while limiting input current in case the varistors conduct. The thermistor bypass switch also opens if a fault or overload reduces the bus voltage to less than 180Vdc. (see Figure 9)Bus-OK (BOK) Pin.(see Figure 12)The Bus-OK pin is intended to provide early-warning power fail information and is also referenced to the SR pin.Caution: There is no input to output isolation in the ENMods.It is necessary to monitor Bus-OK via an optoisolator if it is to beused on the secondary (output) side of the converters. A line isolation transformer should be used when performing scope measurements. Scope probes should never be applied simultaneously to the input and output as this will destroy the unit.L, N Pins.Line and neutral input.+, – Pins. Positive and negative outputs.SR Pin. Signal return for BOK and EN outputsFilter(see Figure 1b)The input EMI filter consists of differential and common mode chokes,Y– rated capacitors (line-ground) and X– rated capacitors (line-line). This filter configuration provides sufficient common mode and differential mode insertion loss in the frequency range between 100kHz and 30MHz to comply with the Level B conducted emissions limit, as illustrated in Figures 8a thru 8c.Hold-up CapacitorsHold-up capacitor values should be determined according to output bus voltage ripple, power fail hold-up time, and ride-through time (see Figure 13). Many applications require the power supply to maintain output regulation during a momentary power failure of specified duration, i.e., the converters must hold-up or ride through such an event while maintaining undisturbed output voltage regulation. Similarly, many of these same systems require notification of an impending power failure in order to allow time to perform an orderly shutdown.The energy stored on a capacitor which has been charged to voltage V is:ε= 1/2(CV2) (1) Where:ε= stored energyC = capacitanceV = voltage across the capacitorEnergy is given up by the capacitors as they are discharged by the converters. The energy expended (the power-time product) is:ε= P?t = C(V12–V22) / 2 (2) Where: P = operating powert = discharge intervalV1= capacitor voltage at the beginning of ?tV2= capacitor voltage at the end of ?t Rearranging Equation 2 to solve for the required capacitance:C = 2P?t / (V12–V22) (3)Figure 16—Ripple voltage vs. operating power and bus capacitance, series combination of C1, C2 (see Figure 1a)Figure 15—Ride-through time vs. operating powerFigure 13—Hold-up timeFigure 12—Bus OK (BOK) isolated power status indicatorFigure 11—Enable (EN) functionCalculated values of bus capacitance for various hold-up time,ride-through time, and ripple voltage requirements are given as a function of operating power level in Figures 14, 15, and 16, respectively.ExampleIn this example, the output required from the DC-DC converter at the point of load is 12Vdc at 320W. Therefore, the output power from the ENMods would be 375W (assuming a converter efficiency of 85%). The desired hold-up time is 9ms over an input range of 90 to 264Vac.Determining Required Capacitance for Power Fail Warning.Figure 14 is used to determine capacitance for a given power fail warning time and power level, and shows that the total bus capacitance should be at least 820µF. Since two capacitors are used in series, each capacitor should be at least 1,640µF. Note that warning time is not dependent on line voltage. A hold-up capacitor calculator is available on the Vicor website, at /doc/be6f2843c850ad02de8041d2.html .Determining Ride-through Time.Figure 15 illustrates ride-through time as a function of line voltage and output power,and shows that at a nominal line of 90Vac, ride-through would be 68ms. Ride-through time is a function of linevoltage.Determining Ripple Voltage on the Hold-up Capacitors.Figure 16 is used to determine ripple voltage as a function of operating power and bus capacitance, and shows that the ripple voltage across the hold-up capacitors will be 12V p-p.Determining the Ripple on the Output of theDC-DC Converter.Figure 17 is used to determine the ripple rejection of the DC-DC converter and indicates a ripplerejection of approximately 60 dB for a 12V output. Since the ripple on the bus voltage is 12Vac and the ripple rejection of the converter is 60 dB, the output ripple of the converter due to ripple on its input (primarily 120 Hz) will be 12mV p-p. Note that 2nd Generation converters have greater ripple rejection then either VI-200s or VI-J00s.A variety of hold-up capacitor assemblies (HUBs) areavailable. Please visit the Vicor website @ /doc/be6f2843c850ad02de8041d2.html .For more information about designing an autorangingAC input power supply using the ENMods and Vicor DC-DC converter modules, contact Vicor Applications Engineering at the nearest Vicor Technical Support Center, or send E-mail toapps@/doc/be6f2843c850ad02de8041d2.html .The power fail warning time (?t) is defined as the interval between BOK and converter shutdown (EN) as illustrated in Figure 13. The Bus-OK and Enable thresholds are 205V and 185V, respectively. A simplified relationship between hold-up time, operating power, and bus capacitance is obtained by inserting these constants in equation (3):C = 2P ?t / (2052– 1852)C = 2P ?t / (7,800)It should be noted that the series combination (C1, C2, see Figure 1a)requires each capacitor to be twice the calculated value, but the required voltage rating of each capacitor is reduced to 200V.Allowable ripple voltage on the bus (or ripple current in the capacitors) may define the capacitance requirement. Consideration should be given to converter ripple rejection and resulting output ripple voltage. The ripple rejection (R) of Vicor converters is specified as a function of the input/output voltage ratio:R = 30 + 20log(Vin / Vout)(4)For example, a converter whose output is 15V and nominal input is 300V will provide 56dB ripple rejection, i.e., 10V p-p of input ripple will produce 15mV p-p of output ripple (see Figure 17). Equation 3 is again used to determine the required capacitance. In this case, V 1and V 2are theinstantaneous values of bus voltage at the peaks and valleys (see Figure 13)of the ripple, respectively. The capacitors must holdup the bus voltage for the time interval (?t) between peaks of the rectified line as given by:t = (π– θ) / 2πf(5)Where:f = line frequencyθ= rectifier conduction angleThe approximate conduction angle is given by:θ= Cos -1(V 2/V 1)(6)Another consideration in hold-up capacitor selection is their ripple current rating. The capacitors’ rating must be higher than the maximum operating ripple current. The approximate operating ripple current (rms) is given by:I rms = 2P/V ac (7)Where: P = total output powerV ac = operating line voltageMechanical DiagramINBOARDSOLDER ONBOARD SOLDER ALUMINUM BASEPLA TEVicor’s comprehensive line of power solutions includes modular, high density DC-DC converters and accessory components, configurable power supplies, and custom power systems.Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility isassumed by Vicor for its use. No license is granted by implication or otherwise under any patent or patent rights of Vicor. Vicor components are not designed to be used in applications, such as life support systems,wherein a failure or malfunction could result in injury or death. All sales are subject to Vicor’s Terms and Conditions of Sale, which are available upon request.Specifications are subject to change without notice.Vicor Corporation 25 Frontage Road Andover, MA, USA 01810Tel: 800-735-6200Fax: 978-475-6715EmailVicor Express: vicorexp@/doc/be6f2843c850ad02de8041d2.html Technical Support: apps@/doc/be6f2843c850ad02de8041d2.htmlComponent Solutions for Your Power System4元器件交易⽹/doc/be6f2843c850ad02de8041d2.html。
AZ9831-1A-12D中文资料
COIL
Power At Pickup Voltage (typical) Max. Continuous Dissipation Temperature Rise Temperature 0.80 W 3.2 W at 20°C (68°F) 68°C (122°F) at nominal coil voltage Max.155°C (311°F)
.669 [17.0]
2 x .058 [1.5]
2 x .059 [1.5] 2 x .116 [2.9] 2 x .059 [1.5] 2 x .248 [6.3] 2 x .032 [0.8] 2 x .150 [3.8]
2 x .300 [7.6] 6 x ø .086 ± .003 [ø 2.18 ± .076] .705 [17.90]
MECHANICAL DATA
PC BOARD LAYOUT
1.043 [26.5]
(2X)
2 x ø .076 ± .003 [ø 1.93 ± .076] .335 [8.5]
.331 [8.4] .137 [3.5] .418 [10.6] 2 x .150 [3.8]
0.984 [RMINALS
WIRING DIAGRAMS
6 x .063 [1.6]
86 87 30
2 x .374 [9.5] 2 x .047 [1.2]
85
1 FORM A
VIEWED TOWARD TERMINALS
Dimensions in inches with millimeters in brackets below. Tolerance: ± .010"
GENERAL DATA
ISL6722、ISL6723中文资料
VREF
BG
+ -
VREF 20K 3.0V 1.5V
+ 12K ON BLANKING COMPARATOR + OSCILLATOR COMPARATOR + 3.0V
+ -
OV 2.50V UV 1.45V
+ + -
30K
S
Q Q
VC
RTCT 1mA VREF ON
+
Bi-Directional Synchronization
+ -
VREF
BG
+ -
VREF 20K 3.0V/ 1.5V
+ 12K ON BLANKING COMPARATOR + OSCILLATOR COMPARATOR + 3.0V
+ -
OV 2.50V UV 1.45V
+ + -
30K
S R
Q Q
VC
RTCT 1mA ON
+
GATE
36K
Hale Waihona Puke PGND21
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners
LTC6912IDE-1中文资料
12UUUGAI SETTI GS A D PROPERTIESTable 1. LTC6912-1 GAIN SETTINGS AND PROPERTIESUPPER/LOWER NOMINALNIBBLE VOLTAGE GAIN MAXIMUM LINEAR INPUT RANGE (V P-P)Q7Q6Q5Q4Dual 5V Single 5V Single 3V NOMINAL INPUT NOMINAL OUTPUT Q3Q2Q1Q0Volts/Volt dB Supply Supply Supply IMPEDANCE (kΩ) IMPEDANCE (Ω) 00000–1201053(Open)0.4 0001–101053100.7 0010–265 2.5 1.55 3.4 0011–514210.62 3.4 0100–102010.50.31 3.4 0101–20260.50.250.151 6.4 0110–50340.20.10.06115 0111–100400.10.050.03130 10X X0–1201053(Open)(Open) 11X X Not Used (Note 11)Not UsedTable 2. LTC6912-2 GAIN SETTINGS AND PROPERTIESUPPER/LOWER NOMINALNIBBLE VOLTAGE GAIN MAXIMUM LINEAR INPUT RANGE (V P-P)Q7Q6Q5Q4Dual 5V Single 5V Single 3V NOMINAL INPUT NOMINAL OUTPUT Q3Q2Q1Q0Volts/Volt dB Supply Supply Supply IMPEDANCE (kΩ) IMPEDANCE (Ω) 00000–1201053(Open)0.4 0001–101053100.7 0010–265 2.5 1.55 3.4 0011–412 2.5 1.250.75 2.5 3.4 0100–818.1 1.250.6250.375 1.25 3.4 0101–1624.10.6250.31250.188 1.25 6.4 0110–3230.10.31250.1560.094 1.2515 0111–6436.10.1560.0780.047 1.2530 10X X0–1201053(Open)(Open) 11X X Not Used (Note 11)Not Used36912fa4567891011121314151617181920216912faAPPLICATIO S I FOR ATIOW UUU Offset Voltage vs Gain SettingThe electrical tables list DC offset (error), V OS(OA), at the inputs of the internal op amp (See Figure 1). The electrical tables also show the resulting, gain dependent offset voltage referred to the INA, or INB pins, V OS(IN). The two measures are related through the feedback/input resistor ratio, which equals the nominal gain-magnitude setting,|GAIN|:V OS(IN) = (1 + 1/|GAIN|) V OS(OA)Offset voltages at any gain setting can be inferred from this relationship. For example, an internal amplifier offset V OS(OA) of 1mV will appear referred to the INA, INB pins as 2mV at a gain setting of 1, or 1.5mV at a gain setting of 2.At high gains, V OS(IN) approaches V OS(OA). (Offset voltage is random and can have either polarity centered on 0V).The MOS input circuitry of the internal op amp in Figure 1draws negligible input currents (less than 10µA), so only V OS(OA) and the GAIN affect the overall amplifier’s offset.AC-Coupled OperationAdding capacitors in series with the INA and INB pins converts the LTC6912-X into a dual AC-coupled inverting amplifier, suppressing the input signal’s DC level (and also adding the additional benefit of reducing the offset voltage from the LTC6912-X’s amplifier itself). No further compo-nents are required because the input of the LTC6912-X biases itself correctly when a series capacitor is added.The INA and INB analog input pins connect internally to a resistor whose nominal value varies between 10k Ω and 1k Ω depending on the version of LTC6912 used (see the rightmost column of Tables 1 and 2). Therefore, the low frequency cutoff will vary with capacitor and gain setting.If, for example, a low frequency corner of 1kHz (or lower)on the LTC6912-1 is desired, use a series capacitor of 0.16µF or larger. 0.16µF has a reactance of 1k Ω at 1kHz,giving a 1kHz lower –3dB frequency for gain settings of 10V/V through 100V/V. If the LTC6912-1 is operated at lower gain settings with a 0.16µF capacitor, the higher input resistance will reduce the lower corner frequency down to 100Hz at a gain setting of 1V/V. These frequencies scale inversely with the value of input capacitor used.Note that operating the LTC6912 family in “zero” gain mode (digital state 0000) open circuits both the INA and INB pins and this demands some care if employed with a series AC coupling input capacitor. When the chip enters the zero gain mode, the opened INA or INB pin tends to sample and freeze the voltage across the capacitor to the value it held just before the zero gain state. This can place the INA or INB pin at or near the DC potential of a supply rail. (The INA or INB pin may also drift to a supply potential in this state due to small leakage currents.) To prevent driving the INA or INB pin outside the supply limit and potentially damaging the chip, avoid AC input signals in the zero gain state with an AC coupling capacitor. Also,switching later to a non-zero gain value will cause a transient pulse at the output of the LTC6912-1 (with a time constant set by the capacitor value and the new LTC6912-1input resistance value). This occurs because the INA and INB pins return to the AGND potential forcing transient current sourced by the amplifier output to charge the AC coupling capacitor to its proper DC blocking value.SNR and Dynamic RangeThe term “dynamic range” is much used (and abused)with signal paths. Signal-to-noise (SNR) is an unambigu-ous comparison of signal and noise levels, measured in the same way and under the same operating conditions. In a variable gain amplifier, however, further characterization is useful because both noise and maximum signal level in the amplifier will vary with the gain setting, in general. In the LTC6912-X, maximum output signal is independent of gain (and is near the full power supply voltage, as detailed in the swing sections of the Electrical Characteristics table). The maximum input level falls with increasing gain,and the input-referred noise falls as well (listed also in the table). To summarize the useful signal range in such an amplifier, we define dynamic range (DR) as the ratio of maximum input (at unity gain) to minimum input-referred noise (at maximum gain). This DR has a physical interpre-tation as the range of signal levels that will experience an SNR above unity V/V or 0dB. At a 10V total power supply,DR in the LTC6912-X (gains 0V/V to 100V/V), the DR is typically 115dB (the ratio of 9.9 V P-P , or 3.5V RMS , maxi-mum input to the 6.3µV RMS high gain input noise). The2223Information furnished by Linear Technology Corporation is believed to be accurate and reliable.However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.24Linear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417(408) 432-1900 ● FAX: (408) 434-0507 ● © LINEAR TECHNOLOGY CORPORA TION 2004LT/LT 1005 REV A • PRINTED IN USA。
BS62LV1600FI55中文资料
BS62LV1600FI55中⽂资料Very Low Power CMOS SRAM 2M X 8 bitBS62LV1600Pb-Free and Green package materials are compliant to RoHSn FEATURESWide V CC operation voltage : 2.4V ~ 5.5V Very low power consumption : V CC = 3.0V Operation current : 46mA (Max.) a t 55ns 2mA (Max.) at 1MHz Standby current : 1.5uA (Typ.) at 25 O C V CC = 5.0V Operation current : 115mA (Max.) a t 55ns 10mA (Max.) a t 1MHz Standby current : 6.0uA (Typ.) at 25O C ? High speed access time : -55 55ns (Max.) at V CC :3.0~5.5V -70 70ns (Max.) at V CC : 2.7~5.5V ? Automatic power down when chip is deselected ? Easy expansion with CE1, CE2 and OE options ? Three state outputs and TTL compatible ? Fully static operation ? Data retention supply voltage as low as 1.5V n DESCRIPTIONThe BS62LV1600 is a high performance, very low power CMOS Static Random Access Memory organized as 2048K by 8 bits and operates form a wide range of 2.4V to 5.5V supply voltage.Advanced CMOS technology and circuit techniques provide both high speed and low power features with typical CMOS standby current of 1.5uA at 3.0V/25O C and maximum access time of 55ns at 3.0V/85O C.Easy memory expansion is provided by an active LOW chip enable (CE1), an active HIGH chip enable (CE2), and active LOW output enable (OE) and three-state output drivers.The BS62LV1600 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS62LV1600 is available in JEDEC standard 44-pin TSOP II and 48-ball BGA package.n POWER CONSUMPTIONPOWER DISSIPATIONSTANDBY(I CCSB1, Max)Operating(I CC , Max)V CC =5.0V V CC =3.0V PRODUCT FAMILYOPERATING TEMPERATUREV CC =5.0V V CC =3.0V1MHz10MHzf Max. 1MHz10MHzf Max.PKG TYPEBS62LV1600EC TSOP II-44 BS62LV1600FC Commercial +0O C to +70O C 50uA 8.0uA 9mA 48mA 113mA 1.5mA 19mA 45mABGA-48-0912 BS62LV1600EITSOP II-44 BS62LV1600FIIndustrial -40O C to +85O C100uA 16uA 10mA 50mA 115mA 2mA 20mA 46mABGA-48-0912n PIN CONFIGURATIONSn BLOCK DIAGRAMBrilliance Semiconductor, Inc. reserves the right to change products and specifications without notice.G H F E D C B A 1 2 3 4 5 6 A9 A11 A10 A19A12 A14 A13 A15 WE NC NC NC DQ7 A17 A16 A7 VSS VCC DQ2 DQ1 DQ6 DQ5 NC A5 OE A3 A0 A6 A4 A1A2CE2 NC NC NCCE1 DQ4 NC 48-ball BGA top view NC NC DQ0 VSS VCC DQ3 NC A18 A20 A8n TRUTH TABLEn ABSOLUTE MAXIMUM RATINGS (1)SYMBOL PARAMETER RATING UNITSV TERM Terminal Voltage withRespect to GND-0.5(2) to 7.0 VT BIAS Temperature UnderBias-40 to +125 O CT STG Storage Temperature -60 to +150 O CP T Power Dissipation 1.0 WI OUT DC Output Current 20 mA1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.2. –2.0V in case of AC pulse width less than 30 ns. n OPERATING RANGERANGAMBIENTTEMPERATUREV CC Commercial 0O C to + 70O C 2.4V ~ 5.5VIndustrial -40O C to + 85O C 2.4V ~ 5.5Vn CAPACITANCE (1) (T A = 25O C, f = 1.0MHz) SYMBOL PAMAMETER CONDITIONS MAX. UNITS C INInputCapacitanceV IN = 0V 10 pFC IOInput/OutputCapacitanceV I/O = 0V 12 pF1. This parameter is guaranteed and not 100% tested.n DC ELECTRICAL CHARACTERISTICS (T A =-40O C to +85OC)1. Typical characteristics are at T A =25O C and not 100% tested.2. Undershoot: -1.0V in case of pulse width less than 20 ns.3. Overshoot: V CC +1.0V in case of pulse width less than 20 ns.4. F MAX =1/t RC.5. I CC(MAX.) is 45mA/113mA at V CC =3.0V/5.0V and T A =70O C.6. I CCSB1(MAX.) is 8.0uA/50uA at V CC =3.0V/5.0V and T A =70O C.n DATA RETENTION CHARACTERISTICS (T A = -40O C to +85OC)1. V CC =1.5V, T A =25O C and not 100% tested.2. t RC = Read Cycle Time.3. I CCRD(Max.) is4.0uA at T A =70O C.n LOW V CC DATA RETENTION WAVEFORM (1) (CE1 Controlled)Data Retention Mode V CCt CDRV CC t RV IHV IHCE1≧V CC - 0.2V V DR ≧1.5V CE1V CCn LOW V CC DATA RETENTION WAVEFORM (2) (CE2 Controlled)n AC TEST CONDITIONS (Test Load and Input/Output Reference)Input Pulse Levels Vcc / 0V Input Rise and Fall Times 1V/ns Input and Output Timing Reference Level 0.5Vcc t CLZ , t OLZ , t CHZ , t OHZ , t WHZ C L = 5pF+1TTL Output LoadOthersC L = 30pF+1TTL1. Including jig and scope capacitance.n KEY TO SWITCHING WAVEFORMSn AC ELECTRICAL CHARACTERISTICS (T A = -40O C to +85OC)READ CYCLECE2 Data Retention Mode V CC t CDR V CC t R V ILV IL V CCV DR ≧1.5V CE2≦0.2V 1 TTL ALL INPUT PULSES→← 90%V CC GND Rise Time : 1V/ns Fall Time : 1V/ns90%→← 10%10%n SWITCHING WAVEFORMS (READ CYCLE)READ CYCLE 1 (1,2,4)READ CYCLE 2 (1,3,4)READ CYCLE 3 (1, 4)NOTES:1. WE is high in read Cycle.2. Device is continuously selected when CE1 = V IL and CE2= V IH .3. Address valid prior to or coincident with CE1 transition low and/or CE2 transition high.4. OE = V IL .5. Transition is measured ± 500mV from steady state with C L = 5pF. The parameter is guaranteed but not 100% tested. t RC t OHt AA D OUT ADDRESS t OHD OUTCE2 CE1D OUTCE2 CE1 OE ADDRESSn AC ELECTRICAL CHARACTERISTICS (T A = -40OC to +85OC)WRITE CYCLEn SWITCHING WAVEFORMS (WRITE CYCLE)WRITE CYCLE 1 (1)t WCt WR1(3)t CW(11)t CW(11)t WP(2)t AWt OHZ(4,10)t AS t WR2(3)t DHt DWD IND OUTWECE2CE1OEADDRESS(5)(5)WRITE CYCLE 2 (1,6)NOTES:1. WE must be high during address transitions.2. The internal write time of the memory is defined by the overlap of CE1 and CE2 active and WE low. All signals must be active to initiate a write and any one signal can terminate a write by going inactive. The data input setup and hold timing should be referenced to the second transition edge of the signal that terminates the write.3. t WR is measured from the earlier of CE1 or WE going high or CE2 going low at the end of write cycle.4. During this period, DQ pins are in the output state so that the input signals of opposite phase to the outputs must not be applied.5. If the CE1 low transition or the CE2 high transition occurs simultaneously with the WE low transitions or after the WE transition, output remain in a high impedance state.6. OE is continuously low (OE = V IL ).7. D OUT is the same phase of write data of this write cycle. 8. D OUT is the read data of next address.9. If CE1 is low and CE2 is high during this period, DQ pins are in the output state. Then the data input signals of opposite phase to the outputs must not be applied to them. 10. T ransition is measured ± 500mV from steady state with C L = 5pF. The parameter is guaranteed but not 100% tested. 11. t CW is measured from the later of CE1 going low or CE2 going high to the end of write.D IND OUTWE CE2 CE1ADDRESSn ORDERING INFORMATIONBSI (Brilliance Semiconductor Inc.) assumes no responsibility for the application or use of any product or circuit described herein. BSI does not authorize its products for use as critical components in any application in which the failure of the BSI product may be expected to result in significant injury or death, including life-support systems and critical medical instruments.n PACKAGE DIMENSIONSTSOP II-44n PACKAGE DIMENSIONS (continued)3: SYMBOL "N" IS THE NUMBER OF SOLDER BALLS.1: CONTROLLING DIMENSIONS ARE IN MILLIMETERS. 2: PIN#1 DOT MARKING BY LASER OR PAD PRINT.N EDNOTES:4812.09.0E1D1e3.755.250.75 48 mini-BGA (9mm x 12mm)n Revision HistoryRevision No. History Draft Date Remark2.2 Add Icc1 characteristic parameter Jan. 13, 2006Improve Iccsb1 spec.I-grade from 220uA to 100uA at 5.0V20uA to 16uA at 3.0VC-grade from 110uA to 50uA at 5.0V10uA to 8.0uA at 3.0V2.3 Change I-grade operation temperature range May. 25, 2006 - from –25O C to –40O C。
SMCJ中文资料
6.40 6.40 6.67 6.67 7.22 7.22 7.78 7.78 8.33 8.33 8.89 8.89 9.44 9.44 10.0 10.0 11.1 11.1 12.2 12.2 13.3 13.3 14.4 14.4 15.6 15.6 16.7 16.7 17.8 17.8 18.9 18.9 20.0 20.0 22.2 22.2 24.4 24.4 26.7 26.7 28.9 28.9 31.1 31.1 33.3 33.3 36.7 36.7 40.0 40.0 44.4 44.4 47.8 47.8 50.0 50.0 53.3 53.3 56.7 56.7 60.0 60.0 64.4 64.4
TA, AMBIENT TEMPERATURE ( C)
FIG.3-PULSE WAVE FORM
150 IPPM, PEAK PULSE CURRENT, %
tf=10us Peak Value IPPM TA=25 C Pulse Width (td) is defined as the point where the Peak Current Deacys to 50% of Ipp 10,000
RATINGS
Peak Power Dissipation at TA =25 C, TP=1ms(NOTE 1) Peak Forward Surge Current at 8.3ms Single Half Sine-Wave superimposed on rated load (JEDEC method) (NOTE 3) Maximum Instantenous Forward Voltage at 35.0A for Unidirectional only
ADC0809中文资料
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图 11.19 ADC0808/0809 内部结构框图
（1）IN0～IN7——8 路模拟输入，通过 3 根地址译码线 ADDA、ADDB、ADDC 来选通 一路。
（2）D7～D0——A/D 转换后的数据输出端，为三态可控输出，故可直接和微处理器数 据线连接。8 位排列顺序是 D7 为最高位，D0 为最低位。
1
（2）总的不可调误差： ADC0808 为± 2 LSB,ADC 0809 为±1LSB。
（3）转换时间： 取决于芯片时钟频率，如 CLK=500kHz 时，TCONV=128μs。 （4）单一电源： +5V。 （5）模拟输入电压范围： 单极性 0～5V；双极性±5V,±10V(需外加一定电路)。 （6）具有可控三态输出缓存器。 （7）启动转换控制为脉冲式(正脉冲)，上升沿使所有内部寄存器清零，下降沿使 A/D 转换开始。 （8）使用时不需进行零点和满刻度调节。 2) 内部结构和外部引脚 ADC0808/0809 的内部结构和外部引脚分别如图 11.19 和图 11.20 所示。内部各部分的 作用和工作原理在内部结构图中已一目了然，在此就不再赘述，下面仅对各引脚定义分述如 下：
×
无操作
0
×
0
启动一次 12 位转换
0
×
1
启动一次 8 位转换
1
+5V
×
并行读出 12 位
1
DGND
0
读出高 8 位(A 段和 B 段)
1
DGND
1
读出 C 段低 4 位，并自动后跟 4 个 0
（8）AGND——模拟地。 （9）GND——数字地。 （10）Vi(R)——参考电压输入端。 （11）VEE——负电源，可选加-11.4V～-16.5V 之间的电压。 （12）BIP OFF——双极性偏移端，用于极性控制。单极性输入时接模拟地(AGND)， 双极性输入时接 Vo(R)端。 （13）Vi(10)——单极性 0～＋10V 范围输入端，双极性±5V 范围输入端。 （14）Vi(20)——单极性 0～＋20V 范围输入端，双极性±10V 范围输入端。 （15）STS——转换状态输出端，只在转换进行过程中呈现高电平，转换一结束立即返 回到低电平。可用查询方式检测此端电平变化，来判断转换是否结束，也可利用它的负跳变
电子器件中文资料
下边资料的次序是纳米盘上的自动排列，请需要者自己看着找吧。
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DISK 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SA556中文资料
元器件交易网IMPORTANT NOTICETexas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinueany product or service without notice, and advise customers to obtain the latest version of relevant informationto verify, before placing orders, that information being relied on is current and complete. All products are soldsubject to the terms and conditions of sale supplied at the time of order acknowledgement, including thosepertaining to warranty, patent infringement, and limitation of liability.TI warrants performance of its semiconductor products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extentTI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarilyperformed, except those mandated by government requirements.CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OFDEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICALAPPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, ORWARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHERCRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TOBE FULLY AT THE CUSTOMER’S RISK.In order to minimize risks associated with the customer’s applications, adequate design and operatingsafeguards must be provided by the customer to minimize inherent or procedural hazards.TI assumes no liability for applications assistance or customer product design. TI does not warrant or representthat any license, either express or implied, is granted under any patent right, copyright, mask work right, or otherintellectual property right of TI covering or relating to any combination, machine, or process in which suchsemiconductor products or services might be or are used. TI’s publication of information regarding any thirdparty’s products or services does not constitute TI’s approval, warranty or endorsement thereof.Copyright © 1999, Texas Instruments Incorporated。
TPS54550PWPRG4资料
6,4 mm 55,0 mmFEATURES DESCRIPTIONAPPLICATIONSI- Output Current -AOEfficiency-%EFFICIENCYvsOUTPUT CURRENTSimplified SchematicTPS54550SLVS623A–MARCH2006–REVISED APRIL20064.5-V TO20-V INPUT,6-A OUTPUT SYNCHRONOUS PWMSWITCHER WITH INTEGRATED FET(SWIFT™)•40mΩMOSFET Switch for High Efficiency at The TPS54550is a medium output current 6-A(7.5Peak)Output Current synchronous buck PWM converter with an integratedhigh side MOSFET and a gate driver for an low side •Uses External Lowside MOSFETexternal MOSFET.Features include a high •Output Voltage Adjustable Down to0.891Vperformance voltage error amplifier that enables With1%Accuracy maximum performance under transient conditions•Synchronizes to External Clock and flexibility in choosing the output filter inductorsand capacitors.The TPS54550has an •180°Out of Phase Synchronizationunder-voltage-lockout circuit to prevent start-up until •Wide PWM Frequency–Fixed250kHz,the input voltage reaches4.5V;a slow-start circuit to500kHz or Adjustable250kHz to700kHz limit in-rush currents;and a power good output to •Adjustable Slow Start indicate valid output conditions.The synchronizationfeature is configurable as either an input or an output •Adjustable Undervoltage Lockoutfor easy180°out of phase synchronization.•Load Protected by Peak Current Limit andThe TPS54550device is available in a thermally Thermal Shutdownenhanced16-pin TSSOP(PWP)PowerPAD™•16-Pin TSSOP PowerPAD™Packagepackage.TI provides evaluation modules and the •SWIFT Documentation Application Notes,and SWIFT™Designer software tool to aid in quickly Design Software:/swift achieving high-performance power supply designs tomeet aggressive equipment development cycles.•Industrial and Commercial Low PowerSystems•LCD Monitors and TVs•Computer Peripherals•Point of Load Regulation for HighPerformance DSPs,FPGAs,ASICs andMicroprocessorsPlease be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.SWIFT,PowerPAD are trademarks of Texas Instruments.PRODUCTION DATA information is current as of publication date.Copyright©2006,Texas Instruments Incorporated Products conform to specifications per the terms of the TexasInstruments standard warranty.Production processing does notnecessarily include testing of all parameters.PACKAGE DISSIPATION RATINGS (1)TPS54550SLVS623A–MARCH 2006–REVISED APRIL 2006These devices have limited built-in ESD protection.The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.ORDERING INFORMATIONT jOUTPUT VOLTAGE PACKAGE PART NUMBER (1)-40°C to 125°CAdjustable to 0.891VPlastic HTSSOP (PWP)TPS54550PWP (2)(1)For the most current package and ordering information,see the Package Option Addendum at the end of this document,or see the TI website at .(2)The PWP package is also available taped and reeled.Add an R suffix to the device type (i.e.,TPS54550PWPR).THERMAL IMPEDANCE T A =25°C T A =70°C T A =85°C PACKAGEJUNCTION-TO-AMBIENTPOWER RATINGPOWER RATINGPOWER RATING16-Pin PWP with solder (2)40.1°C/W2.491.371.00(1)See Figure 22for power dissipation curves.(2)Test Board Conditions a.3inch x 3inchb.Thickness:0.062inchc.2PCB layersd.2oz.Coppere.See Figure 26,Figure 27and TPS54550evaluation module user's guide for layout suggestions.2Submit Documentation FeedbackABSOLUTE MAXIMUM RATINGSELECTROSTATIC DISCHARGE RECOMMENDED OPERATING CONDITIONSTPS54550 SLVS623A–MARCH2006–REVISED APRIL2006over operating free-air temperature range unless otherwise noted(1)UNITVIN-0.3V to21.5VVSENSE-0.3V to8.0VUVLO-0.3V to8.0VV I Input voltage rangeSYNC-0.3V to4.0VSSENA-0.3V to4.0VBOOT VI(PH)+8.0VVBIAS-0.3to8.5VLSG-0.3to8.5VSYNC-0.3to4.0VV O Output voltage range RT-0.3to4.0VPWRGD-0.3to6.0VCOMP-0.3to4.0VPH-1.5V to22VPH Internally Limited(A)I O Source current LSG(Steady State Current)10mACOMP,VBIAS3mASYNC5mALSG(Steady State Current)100mAI S Sink current,PH(Steady State Current)500mACOMP3mASSENA,PWRGD10mA Voltage differential AGND to PGND±0.3VT J Junction temperature+150°CT stg Storage temperature-65°C to+150°C Lead temperature1,6mm(1/16inch)from case for10seconds260°C(1)Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device.These are stress ratingsonly,and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.MIN TYP MAX UNIT Human Body Model HBM JESD22-A114 1.5kV Charged Device Model CDM JESD22-C101 1.5kVMIN NOM MAX UNIT V I Input voltage range 4.520VT J Operating junction temperature-40125°C3Submit Documentation FeedbackELECTRICAL CHARACTERISTICSTPS54550SLVS623A–MARCH 2006–REVISED APRIL 2006T J =-40°C to 125°C,VIN =4.5V to 20V (unless otherwise noted)PARAMETERTEST CONDITIOINSMIN TYP MAX UNITSUPPLY CURRENT Operating Current,PH pin open,10.3mA No external low side MOSFET,RT =Hi-Z I QQuiescent current Shutdown,SSENA =0V1.1mA Start threshold voltage4.324.49V VINStop threshold voltage 3.693.97V Hysteresis350mV UNDER VOLTAGE LOCK OUT (UVLO PIN)Start threshold voltage1.201.24V UVLOStop threshold voltage 1.021.10V Hysteresis100mVBIAS VOLTAGE (VBIAS PIN)I VBIAS =1mA,VIN ≥12V 7.57.88.0VBIASOutput voltageVI VBIAS =1mA,VIN =4.5V 4.4 4.47 4.5REFERENCE SYSTEM ACCURACYT J =25°C0.8880.8910.894V Reference voltage0.8820.8910.899VOSCILLATOR (RT PIN)RT Grounded 200250300Internally set PWM switching frequency kHz RT Open400500600Externally set PWM switching frequency RT =100k Ω(1%resistor to AGND)425500575kHz FALLING EDGE TRIGGERED BIDIRECTIONAL SYNC SYSTEM (SYNC PIN)SYNC out low-to-high rise time (10%/90%)(1)25pF to ground 200500ns SYNC out high-to-low fall time (90%/10%)(1)25pF to ground510ns Delay from rising edge to rising edge of Falling edge delay time (1)180°PH pins Minimum input pulsewidth (1)RT =100k Ω100ns Delay (falling edge SYNC to rising edge PH)(1)RT =100k Ω360ns 50k Ωresistor to ground,SYNC out high level voltage 2.5V No pullup resistorSYNC out low level voltage 0.6V SYNC in low level threshold 0.8V SYNC in high level threshold 2.3V Percentage of programmed frequency-10%10%SYNC in frequency range (1)225770kHz FEED-FORWARD MODULATOR (INTERNAL SIGNAL)Modulator gainVIN =12V,T J =25°C8V/VModulator gain variation -25%25%Minimum controllable ON time (1)180nsMaximum duty factor (1)VIN =4.5V80%86%ERROR AMPLIFIER (VSENSE and COMP PINS)Error amplifier open loop voltage gain (1)6080dB Error amplifier unity gain bandwidth (1) 1.02.8MHz Input bias current,VSENSE pin500nA COMPOutput voltage slew rate (symmetric)(1)1.5V/µs (1)Specified by design,not production tested.4Submit Documentation FeedbackTPS54550 SLVS623A–MARCH2006–REVISED APRIL2006ELECTRICAL CHARACTERISTICS(continued)T J=-40°C to125°C,VIN=4.5V to20V(unless otherwise noted)PARAMETER TEST CONDITIOINS MIN TYP MAX UNIT Slow Start/ENABLE(SSENA PIN)Disable low level input voltage0.5Vf s=250kHz,RT=ground(2) 4.6Internal slow-start time(10%to90%)msf s=500kHz,RT=Hi-Z(2) 2.3Pullup current source 1.8510µAPulldown MOSFET II(SSENA)=1mA0.1V POWER GOOD(PWRGD PIN)Power good threshold Rising voltage97%f s=250kHz4Rising edge delay(2)msf s=500kHz2Output saturation voltage I sink=1mA,VIN>4.5V0.05V PWRGD Output saturation voltage I sink=100µA,VIN=0V0.76V Open drain leakage current Voltage on PWRGD=6V3µA CURRENT LIMITCurrent limit VIN=12V7.58.59.5ACurrent limit Hiccup Time(2)f s=500kHz 4.5ms THERMAL SHUTDOWNThermal shutdown trip point165°CThermal shutdown hysteresis(2)7°C LOW SIDE MOSFET DRIVER(LSG PIN)VIN=4.5V,Capacitive load=1000pF15 Turn on rise time,(10%/90%)(2)nsVIN=8V,Capacitive load=1000pF12 Deadtime(2)VIN=12V60nsVIN=4.5V sink/source7.5 Driver ON resistanceΩVIN=12V sink/source5OUTPUT POWER MOSFETS(PH PIN)Phase node voltage when disabled DC conditions and no load,SSENA=0V0.5VVIN=4.5V,Idc=100mA 1.13 1.42 Voltage drop,low side FET and diode VVIN=12V,Idc=100mA 1.08 1.38VIN=4.5V,BOOT-PH=4.5V,I O=0.5A60r DS(ON)High side power MOSFET switch(3)mΩVIN=12V,BOOT-PH=8V,I O=0.5A40(2)Specified by design,not production tested.(3)Resistance from VIN to PH pins.5Submit Documentation FeedbackPIN ASSIGNMENTSVIN VIN UVLO PWRGDRT SYNC SSENA COMPBOOT PH PH LSG VBIAS PGND AGND VSENSEPWP PACKAGE (TOP VIEW)NOTE:If there is not a Pin 1 indicator, turn device to enable reading the symbol from left to right. Pin 1 is at the lower left corner of the device.TPS54550SLVS623A–MARCH 2006–REVISED APRIL 2006Terminal FunctionsTERMINAL DESCRIPTION 1,2VIN Input supply voltage,4.5V to 20V.Must bypass with a low ESR 10-µF ceramic capacitor.3UVLO Undervoltage lockout pin.Connecting an external resistive voltage divider from VIN to the pin will override the internal default VIN start and stop thresholds.4PWRGD Power good output.Open drain output.A low on the pin indicates that the output is less than the desired output voltage.There is an internal rising edge filter on the output of the PWRGD comparator.5RT Frequency setting pin.Connect a resistor from RT to AGND to set the switching frequency.Connecting the RT pin to ground or floating will set the frequency to an internally preselected frequency.6SYNCBidirectional synchronization I/O pin.SYNC pin is an output when the RT pin is floating or connected low.The output is a falling edge signal out of phase with the rising edge of PH.SYNC may be used as an input tosynchronize to a system clock by connecting to a falling edge signal when an RT resistor is used.See 180°Out of Phase Synchronization operation in the Application Information section.7SSENASlow Start/Enable.The SSENA pin is a dual function pin which provides a logic enable/disable and a slow start time set.Below 0.5V,the device stops switching.Float pin to enable.Capacitor to ground adjusts the slow start time.See Extending Slow Start Time section.8COMP Error amplifier output.Connect frequency compensation network from COMP to VSENSE pins.9VSENSE Inverting node error amplifier.10AGND Analog ground—internally connected to the sensitive analog ground circuitry.Connect to PGND and PowerPAD.11PGND Power Ground—Noisy internal ground—Return currents from the LSG driver output return through the PGND pin.Connect to AGND and PowerPAD.12VBIAS Internal 8.0V bias voltage.A 1.0µF ceramic bypass capacitance is required on the VBIAS pin.13LSG Gate drive for low side MOSFET.Connect gate of n-channel MOSFET.14,15PH Phase node—Connect to external L-C filter.16BOOT Bootstrap for high side gate driver.Connect 24Ohm and 0.1µF ceramic capacitor from BOOT to PH pins.17PowerPADPGND and AGND pins must be connected to the exposed pad for proper operation.See Figure 26for an example PCB layout.6Submit Documentation FeedbackFUNCTIONAL BLOCK DIAGRAMPHLSGPWRGDAGNDPGNDVBIASPOWERPADTPS54550SLVS623A–MARCH 2006–REVISED APRIL 20067Submit Documentation FeedbackDETAILED DESCRIPTIONUndervoltage Lockout(UVLO)Slow Start Enable(SSENA)and Internal SlowT SS_INTERNAL(ms) 1.15kƒs(kHz)(3)Input Voltage SupplyExtending Slow Start TimeR1 VIN(start)1k p1.24V)1k p(1)VIN(stop) (R1)1k p) 1.02V1k p(2)TPS54550SLVS623A–MARCH2006–REVISED APRIL2006StartThe undervoltage lockout(UVLO)system has aninternal voltage divider from VIN to AGND.The Once the SSENA pin voltage exceeds0.5V,the defaults for the start/stop values are labeled VIN and TPS54550starts operation.The TPS54550has an given in Table1.The internal UVLO threshold can be internal digital slow start that ramps the reference overridden by placing an external resistor divider from voltage to its final value in1150switching cycles.The VIN to ground.The internal divider values are internal slow start time(10%-90%)is approximated approximately320kΩfor the high side resistor and by the following expression:125kΩfor the low side resistor.The divider ratio(andtherefore the default start/stop values)is quiteaccurate,but the absolute values of the internalresistors may vary as much as15%.If high accuracy Once the TPS54550device is in normal regulation, is required for an externally adjusted UVLO threshold,the SSENA pin is high.If the SSENA pin is pulled select lower value external resistors to set the UVLO below the stop threshold of0.5V,switching stops ing a1-kΩresistor for the low side and the internal slow start resets.If an application resistor R2(see Figure1)is recommended.Under no requires the TPS54550to be disabled,use open circumstances should the UVLO pin be connected drain or open collector output logic to interface to the directly to VIN.SSENA pin(see Figure2).The SSENA pin has aninternal pullup current source.Do not use external Table1.Start/Stop Voltage Threshold pullup resistors.START VOLTAGE STOP VOLTAGETHRESHOLD THRESHOLDVIN(Default) 4.49 3.69UVLO 1.24 1.02Figure2.Interfacing to the SSENA Pin Figure1.Circuit Using External UVLO FunctionThe equations for selecting the UVLO resistors are:In applications that use large values of outputcapacitance there may be a need to extend the slowstart time to prevent the startup current from trippingthe current limit.The current limit circuit is designedto disable the high side MOSFET and reset theinternal voltage reference for a short amount of time For applications which require an undervoltage lockwhen the high side MOSFET current exceeds the out(UVLO)threshold greater than4.49V,externalcurrent limit threshold.If the output capacitance and resistors may be implemented,see Figure1,to adjustload current cause the startup current to exceed the the start voltage threshold.For example,ancurrent limit threshold,the power supply output will application needing an UVLO start voltage ofnot reach the desired output voltage.To extend the approximately7.8V using the equation(1),R1isslow start time and to reduce the startup current,an calculated to the nearest standard resistor value ofexternal capacitor can be added to the SSENA pin.5.36kΩ.Using Equation2,the input voltage stopThe slow start capacitance is calculated using the threshold is calculated as6.48V.following equation:C SS(µF)=5.55x10-3T ss(ms)8Submit Documentation FeedbackSwitching Frequency(RT)RT(k p)46000ƒs(kHz)–35.9(4)V I(SYNC) V O(PH)TPS54550 SLVS623A–MARCH2006–REVISED APRIL2006The TPS54550has an internal oscillator thatoperates at twice the PWM switching frequency.TheThe RT pin controls the SYNC pin functions.If the RT internal oscillator frequency is controlled by the RTpin is floating or grounded,SYNC is an output.If the pin.Grounding the RT pin sets the PWM switchingswitching frequency has been programmed using a frequency to a default frequency of250kHz.Floatingresistor from RT to AGND,then SYNC functions as the RT pin sets the PWM switching frequency toan input.500kHz.The internal voltage ramp charging current increases Connecting a resistor from RT to AGND sets thelinearly with the set frequency and keeps the feed frequency according to Equation4(see Figure13).forward modulator constant(Km=8)regardless ofthe frequency set point.Table2.Switching Frequency,SYNC and RT PinsSWITCHING FREQUENCY SYNC PIN RT PIN250kHz,internally set Generates SYNC output signal AGND500kHz,internally set Generates SYNC output signal Float Externally set to250kHz to700kHz Terminate to quiet ground with10-kΩR=215kΩto69kΩresistor.Externally synchronized frequency Synchronization Signal Use110kΩwhen RT floats and237kΩwhen RT isgrounded and using the sync out signal of anotherTPS54550.Set RT resistor equal to90%to110%ofexternal synchronization frequency.180°Out of Phase Synchronization(SYNC)When operating the two TPS54550devices180°outof phase,the total RMS input current is reduced. The SYNC pin is configurable as an input or as an Thus reducing the amount of input capacitance output,per the description in the previous section.needed and increasing efficiency.When operating as an input,the SYNC pin is afalling-edge triggered signal(see Figure3and When synchronizing a TPS54550to an external Figure4).When operating as an output,the signal's signal,the timing resistor on the RT pin must be set falling edge is approximately180°out of phase with so that the oscillator is programmed to run at90%to the rising edge of the PH pins.Thus,two TPS54550110%of the synchronization frequency.devices operating in a system can share an inputNOTE:Do not use synchronization input for designs capacitor and draw ripple current at twice thewith output voltages>10V.frequency of a single unit.Figure3.SYNC Input Waveform9Submit Documentation FeedbackInternal OscillatorV O(PH)V O(SYNC)Power Good (PWRGD)Bootstrap Voltage (BOOT)Error AmplifierVoltage ReferenceT delay 1000ƒs(kHz)ms (5)Bias Voltage (VBIAS)TPS54550SLVS623A–MARCH 2006–REVISED APRIL 2006Figure 4.SYNC Output WaveformUp to 1mA of current can be drawn for use in anexternal application circuit.The VBIAS pin must have a bypass capacitor value of 1.0µF.X7R or X5R The VSENSE pin is compared to an internal grade dielectric ceramic capacitors are recommended reference signal,if the VSENSE is greater than 97%because of their stable characteristics over and no other faults are present,the PWRGD pin temperature.presents a high impedance.A low on the PWRGD pin indicates a fault.The PWRGD pin has been designed to provide a weak pull-down and indicates a fault even when the device is unpowered.If the TPS54550The BOOT capacitor obtains its charge cycle by cycle has power and has any fault flag set,the TPS54550from the VBIAS capacitor.A capacitor and small indicates the power is not good by driving the value resistor from the BOOT pin to the PH pins is PWRGD pin low.The following events,singly or in required for operation.The bootstrap connection for combination,indicate power is not good:the high side driver must have a bypass capacitor of 0.1µF and resistor 24Ohm.•VSENSE pin out of bounds •Overcurrent•Thermal shutdown The VSENSE pin is the error amplifier inverting input.•UVLO undervoltageThe error amplifier is a true voltage amplifier with 1.5•Input voltage not present (weak pull-down)mA of drive capability with a minimum of 60dB of •Slow-startingopen loop voltage gain and a unity gain bandwidth of •VBIAS voltage is low2MHz.Once the PWRGD pin presents a high impedance (i.e.,power is good),a VSENSE pin out of bounds condition forces PWRGD pin low (i.e.,power is bad)The voltage reference system produces a precision after a time delay.This time delay is a function of the reference signal by scaling the output of a switching frequency and is calculated using temperature stable bandgap circuit.During production Equation 5:testing,the bandgap and scaling circuits are trimmed to produce 0.891V at the output of the error amplifier,with the amplifier connected as a voltage follower.The trim procedure improves the regulation,since it cancels offset errors in the scaling and error amplifier circuits.The VBIAS regulator provides a stable supply for the internal analog circuits and the low side gate driver.10Submit Documentation FeedbackPWM Control and Feed ForwardDeadtime ControlLow Side Gate Driver(LSG)Thermal Shutdown TPS54550SLVS623A–MARCH2006–REVISED APRIL2006reference ramps from0V to0.891V.During theinitial slow-start interval,the internal reference voltage Signals from the error amplifier output,oscillator,and is very small resulting in a couple of skipped pulses current limit circuit are processed by the PWM control because the minimum on time causes the actual logic.Referring to the internal block diagram,the output voltage to be slightly greater than the preset control logic includes the PWM comparator,PWM output voltage until the internal reference ramps up. latch,and the adaptive dead-time control logic.During steady-state operation below the current limitthreshold,the PWM comparator output and oscillatorpulse train alternately reset and set the PWM latch.Adaptive dead time control prevents shoot throughcurrent from flowing in the integrated high-side Once the PWM latch is reset,the low-side driver andMOSFET and the external low-side MOSFET during integrated pull-down MOSFET remain on for athe switching transitions by actively controlling the minimum duration set by the oscillator pulse width.turn on times of the drivers.The high-side driver does During this period,the PWM ramp discharges rapidlynot turn on until the voltage at the gate of the to the valley voltage.When the ramp begins tolow-side MOSFET is below1V.The low-side driver charge back up,the low-side driver turns off and thedoes not turn on until the voltage at the gate of the high-side FET turns on.The peak PWM ramp voltagehigh-side MOSFET is below1V.varies inversely with input voltage to maintain aconstant modulator and power stage gain of8V/V.As the PWM ramp voltage exceeds the error amplifierLSG is the output of the low-side gate driver.The output voltage,the PWM comparator resets the latch,100-mA MOSFET driver is capable of providing gate thus turning off the high-side FET and turning on thedrive for most popular MOSFETs suitable for this low-side FET.The low-side driver remains on untile the SWIFT Designer Software Tool the next oscillator pulse discharges the PWM ramp.to find the most appropriate MOSFET for the During transient conditions,the error amplifier output application.Connect the LSG pin directly to the gate can be below the PWM ramp valley voltage or above of the low-side MOSFET.Do not use a gate resistor the PWM peak voltage.If the error amplifier is high,as the resulting turn-on time may be too slow.the PWM latch is never reset and the high-side FETremains on until the oscillator pulse signals thecontrol logic to turn the high-side FET off and theThe device uses the thermal shutdown to turn off the internal low-side FET and driver on.The deviceMOSFET drivers and controller if the junction operates at its maximum duty cycle until the outputtemperature exceeds165°C.The device is restarted voltage rises to the regulation set point,settingautomatically when the junction temperature VSENSE to approximately the same voltage as thedecreases to7°C below the thermal shutdown trip internal voltage reference.If the error amplifier outputpoint and starts up under control of the slow-start is low,the PWM latch is continually reset and thecircuit.high-side FET does not turn on.The internal low-sideFET and low side driver remain on until the VSENSEvoltage decreases to a range that allows the PWMcomparator to change states.The TPS54550iscapable of sinking current through the external lowside FET until the output voltage reaches theregulation set point.The minimum on time is designed to be180ns.During the internal slow-start interval,the internalOvercurrent ProtectionOutput Voltage LimitationsT HICCUP(ms) 2250ƒs(kHz)(6)Setting the Output VoltageR2 R1 0.891V O )0.891(7)TPS54550SLVS623A–MARCH 2006–REVISED APRIL 2006OUTPUT VOLTAGE (V)R2VALUE (k Ω)1.228.7Overcurrent protection is implemented by sensing the 1.514.7drain-to-source voltage across the high-side 1.89.76MOSFET and compared to a voltage level which represents the overcurrent threshold limit.If the2.5 5.49drain-to-source voltage exceeds the overcurrent3.33.74threshold limit for more than 100ns,the high-side MOSFET is disable,the SSENA pin is pulled low,and the internal digital slow-start is reset to 0V.SSENA is held low for approximately the time that is calculated Due to the internal design of the TPS54550there are by Equation 6:both upper and lower output voltage limits for any given input voltage.Additionally,the lower boundary of the output voltage set point range is also dependent on operating frequency.The upper limit of the output voltage set point is constrained by the Once the hiccup time is complete,the SSENA pin ismaximum duty cycle of the device and is shown in released and the converter initiates the internal Figure 12.The lower limit is constrained by the slow-start.minimum controllable on time which may be as high as 220ns.The approximate minimum output voltage for a given input voltage and range of operating The output voltage of the TPS54550can be set by frequencies is shown in Figure 8while the maximum feeding back a portion of the output to the VSENSE operating frequency versus input voltage for some pin using a resistor divider network.In the application common output voltages is shown in Figure 10.circuit of Figure 29,this divider network is comprised The curves shown in these two figures are valid for of resistors R1and R2.To calculate the resistor output currents greater than 0.5A.As output currents values to generate the required output voltage use decrease towards no load (0A),the minimum output the following equation:voltage decreases.For applications where the load current is less than 100mA,the curves shown in Figure 9and Figure 11are applicable.All of the data plotted in these curves are approximate and take into Start with a fixed value of R1and calculate theaccount a possible 20percent deviation in actual required R2value.Assuming a fixed value of 10k Ωoperating frequency relative to the intended set point.for R1,the following table gives the appropriate R2value for several common output voltages:TYPICAL CHARACTERISTICS0102030405060708090T - Junction Temperature - °CJ O n R e s i s t a n c e - m W0.89120.89100.89080.89060.89040.89020.89000.8898−50−250255075100125150V r e f − I n t e r n a l V o l t a g e R e f e r e n ce − VT J − Junction Temperature − 5CV - Input Voltage - VI C u r r e n t L i m i t -AM i n i m u m O u t p u t V o l t a g e − VV I − Input Voltage − V100200300400500600700800M a x i m u m S w i t c h i n g F r e q u e n c y − k H zV I − Input Voltage − VM i n i m u m O u t p u t V o l t a g e − VV I − Input Voltage − VM a x i m u m S w i t c h i n g F r e q u e n c y − k H zV I − Input Voltage − V5075100125150175200225200300400500600700R T R e s i s t a n c e − k WSwitching Frequency − kHz02468101214510152025− O u t p u t V o l t a g e − VV O V I − Input Voltage − VTPS54550SLVS623A–MARCH 2006–REVISED APRIL 2006ON RESISTANCECURRENT LIMITINTERNAL VOLTAGE REFERENCEvsvsvsJUNCTION TEMPERATUREINPUT VOLTAGEJUNCTION TEMPERATUREFigure 5.Figure 6.Figure 7.MINIMUM OUTPUT VOLTAGEMINIMUM OUTPUT VOLTAGEMAXIMUM SWITCHING FREQUENCYvsvsvsINPUT VOLTAGEINPUT VOLTAGEINPUT VOLTAGEFigure 8.Figure 9.Figure 10.MAXIMUM SWITCHING FREQUENCYMAXIMUM OUTPUT VOLTAGERT RESISTANCEvsvsvsINPUT VOLTAGEINPUT VOLTAGESWITCHING FREQUENCYFigure 11.Figure 12.Figure 13.。
HS00-99557中文资料
Packaging (mm) Hi-Pot Pitch Length Width Height Vrms) 79 mil 79 mil 100 mil 100 mil 50 mil 50 mil 50 mil 50 mil 50 mil 50 mil 50 mil 50 mil 50 mil 50 mil 50 mil 50 mil 50 mil 50 mil 50 mil 50 mil 50 mil 50 mil 50 mil 50 mil 50 mil 100 mil 100 mil 100 mil 100 mil 100 mil 100 mil 100 mil 100 mil 100 mil 100 mil 100 mil 100 mil 100 mil 100 mil 100 mil 100 mil 100 mil 100 mil 14.81 14.81 20.32 20.32 11.81 11.81 11.81 11.81 14.22 14.22 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 25.40 25.40 25.40 25.40 25.40 25.40 25.40 25.40 25.40 25.40 25.40 25.40 25.40 25.40 25.40 25.40 25.40 25.40 14.73 15.20 17.40 17.40 11.43 11.43 11.43 11.43 17.01 17.01 9.30 9.60 9.52 9.65 9.65 9.65 9.35 9.26 9.35 9.53 9.65 9.35 9.65 9.65 9.65 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 12.70 4.88 4.88 2.49 2.39 2.16 2.19 2.16 2.16 2.20 2.20 1.95 2.08 1.98 6.22 6.22 6.22 6.22 6.06 5.08 5.73 5.98 6.22 5.98 6.22 5.98 7.00 7.00 7.00 7.00 5.97 7.00 7.00 7.00 7.00 7.00 7.00 7.00 7.00 7.00 7.00 7.00 6.05 7.00 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500 1500
ADS中文教程第4章55-71
实验四、交流（AC）仿真概述该实验继续amp_1900任务并与上一实验使用相同子电路。
这个练习交流（AC）仿真的基础，包括小信号增益和噪声，也给出了许多数据显示中控制和操作数据的许多细节特性。
任务●进行交流（AC）小信号和噪声仿真●调整引脚/导线符号●变量扫描和建立方程●控制图表，曲线，数据组和交流（AC）源目录1.从一个设计到另一个设计的复制&粘贴（Ctrl+C/ Ctrl+V）操作 (56)2.对复制的电路和引脚符号进行改正 (56)3.层次（push and pop）操作验证子电路 (58)4.设置带噪声的AC仿真 (58)5.对噪声数据仿真并列表 (60)6.控制方程和节点电压的输出 (61)7.无噪声仿真 (63)8.用测量方程写出数据显示方程 (63)9.使用测量和数据显示子方程 (63)10.对AC分析数据绘出相位和群时延图 (65)11.变量信息和what函数 (68)12.选学——Vcc扫描（如同电源电压在减小） (68)步骤1.从一个设计到另一个设计的复制&粘贴（Ctrl+C/ Ctrl+V）操作a. 打开上一设计（dc_net）,并通过在周围区域拖动鼠标复制变亮的电路，这被称为橡皮条（rubber banding）。
当该项目变亮时，通过Ctrl+C键或Edit>Copy命令复制。
推荐使用Ctrl+C，这样可以省去鼠标点击。
b. 用File>New Design命令创建一个新原理图，命名为：ac_sim。
然后，用Ctrl+V键或Edit>Paste并通过点击新原理图插入（ghost镜像）复制内容。
c. 保存ac_sim设计。
你必须保存它，否则它不会被写入数据库。
d. 点击Window>design Open命令。
这个命令可以让你进入那些在内存中但在窗口中未显示或未存在记录中的设计。
出现对话框后，选择dc_net并点击OK，然后用File>Close Design命令关闭dc_net设计（不需要保存改变的设置）。
553-XXXX中文资料
³
ATTENTION
OBSERVE PRECAUTIONS FOR HANDLING ELECTROSTATIC SENSITIVE DEVICES
Reverse Polarity Option 1) Cathode Left
–010 Ordering Code Suffix required ONLY for Reverse Polarity Option
Dialight Corporation • 1501 Route 34 South • Farmingdale, NJ 07727 • TEL: (732) 919-3119 • FAX: (732) 751-5778 •
4-29
元器件交易网
RESISTOR 5 VOLTS - LED TYPE 03
Dimensions in mm [inches]
Standard Polarity shown in drawing: Cathode right
Features
• Multiple CBIs form horizontal LED arrays on 4.45mm (0.175”) center-lines. See page 4-41 and 4-42 for pre-assembled arrays • • • • • • High Contrast, UL 94 V-0 rated, black housing Oxygen index: 32% Polymer content: PBT, 0.343 g Housing stand-offs facilitate PCB cleaning Solderability per MIL-STD-202F, method 208F LEDs are safe for direct viewing per IEC 825-1, EN-60825-1
55ide中文编程
55ide中文编程English Answer:55ide is a powerful Chinese programming environmentthat provides a wide range of features and tools for developing software applications. It includes an integrated development environment (IDE) that provides a user-friendly interface, syntax highlighting, code completion, and debugging tools. 55ide also supports a variety of programming languages, including C++, C#, Java, Python, and JavaScript.55ide is a popular choice for Chinese programmers due to its ease of use, powerful features, and extensive documentation. It is also free to use and open source, making it accessible to a wide range of users.Here are some of the key features of 55ide:Integrated development environment (IDE) with a user-friendly interface.Syntax highlighting, code completion, and debugging tools.Support for a variety of programming languages, including C++, C#, Java, Python, and JavaScript.Extensible with plugins and add-ons.Free to use and open source.中文回答：55ide 是一款功能强大的中文编程环境，它为软件应用程序开发提供了广泛的功能和工具。
P5KE50中文资料
D
Figure 1 10
A
PPP - KW 1.0
Cathode Mark B D
0.1 .1µse
100µsec 10µsec 1msec tP Peak Pulse Power (P ) – versus – Pulse Time (tP ) PP
1µsec
C
Figure 2 - Pulse Waveform tr 100 Peak Value IPP Half Wave IPP /2 50 10 x 1000 Wave as defined by R.E.A.
P5KE5.0 P5KE5.0A P5KE6.0 P5KE6.0A P5KE6.5 P5KE6.5A P5KE7.0 P5KE7.0A P5KE7.5 P5KE7.5A P5KE8.0 P5KE8.0A P5KE8.5 P5KE8.5A P5KE9.0 P5KE9.0A P5KE10 P5KE10A P5KE11 P5KE11A P5KE12 P5KE12A P5KE13 P5KE13A P5KE14 P5KE14A P5KE15 P5KE15A P5KE16 P5KE16A P5KE17 P5KE17A P5KE18 P5KE18A P5KE20 P5KE20A
Maximum Ratings
• • • • Operating Temperature: -55°C to +150°C Storage Temperature: -55°C to +150°C 500 Watt Peak Power Response Time 1 x 10-12 Seconds For Unidirectional and 5 x 10-9 F
Figure 4 - Derating Curve
550C中文资料
Ultra-Ripple, Long Life, Computer GradeThe Ultimate in Ripple and LifeType 550C is the standard for motor drive and other high-ripple, long-life applications. It boasts more than 25% extra ripple capability per can size, but less capacitance than Type 520C. Expected operating life is more than 100,000 hours in typical applications. (See Operating Life) Type 550C is rated for 10,000 hours life with full ripple current, rated voltage, 85 ºC and 100 lfm airflow while mounted horizontally. Horizontal mounting is more severe than vertical mounting. The extended cathode foil of the 550C assures heat flow from the capacitor element to the can in all orientations.Highlights10,000 hour load lifeRipple current to 105 amps ESRs to 7 m Ω•••SpecificationsOperating Temperature:Rated Voltage:Capacitance:Capacitance Tolerance: DCLeakage Current:Cold Impedence:Ripple Current Multipliers:–40 °C to +105 °C 200 to 500 Vdc 91 µF to 35,000 µF –10% +50%≤3√CV µA (4mA max.)–20 °C multiple of 25 °C Z ≤ 3EIA Ripple Life:Life Test:Shelf Life:Vibration:10,000 h at full load @ 85 °C per EIA IS-749 ∆Capacitance ±20%ESR 200% of limit DCL 100% of limit10,000 h at full load @ 105 °C and rated voltage ∆Capacitance ±20% ESR 200% of limit DCL 100% of limit500 h @ 105 °C, Capacitance, ESR and DCL, initial re-quirements.0 to 55 Hz, 0.06” and 10 g max, 1.5 h ea. of 2 axis10 kHz50 Hz 60 Hz 120 Hz 360 Hz 1 kHz 5 kHz & up1 3/8” & 1 3/4” Diameters200 to 350 V 0.770.82 1.00 1.21 1.32 1.37 1.38400 to 500 V 0.730.781.001.331.531.661.683” & 3 1/2” Diameters200 to 350 V 0.80.85 1.00 1.17 1.24 1.28 1.29400 to 500 V0.730.791.001.311.511.631.6545 °C 55 °C 65 °C 75 °C 85 °C 95 ºC 105 ºC 1.661.521.371.201.000.750.36FrequencyAmbient TemperatureComplies with the EU Directive 2002/95/EC requirement restricting the use of Lead (Pb), Mercury (Hg), Cadmium (Cd), Hexavalent chromium (Cr(VI)), PolyBrominated Biphenyls (PBB) and PolyBrominated Diphenyl Ethers (PBDE).Outline DrawingsCase DimensionsUninsulated Case DimensionsFor insulated case, add 0.024”(0.610 mm) to “D”and 0.030”(0.762 mm) to height.Diam. (D)Length (L) Terminals (S) Case ±.031 ±.78 ±.062 ±1.57 ±0.015 ±.38 Typical WeightCode Inchesmm Inches mm Inches mm oz g AK 1.37534.93 1.62541.280.5012.70 1.954 AA 1.37534.93 2.12553.980.5012.70 2.057 AH 1.37534.93 2.62566.680.5012.70 2.777 AB 1.37534.93 3.12579.380.5012.70 3.394 AJ 1.37534.93 3.62592.080.5012.70 3.8108 AC 1.37534.93 4.125104.780.5012.70 4.4125 AD 1.37534.93 4.625117.480.5012.70 5.1145 AE 1.37534.93 5.125130.180.5012.70 6.8193 AF 1.37534.93 5.625142.880.5012.708.1230 EA 1.75044.45 2.12553.980.7519.05 2.776 EH 1.75044.45 2.62566.680.7519.05 3.8108 EB 1.75044.45 3.12579.380.7519.05 5.1145 EJ 1.75044.45 3.62592.080.7519.05 6.8193 EC 1.75044.45 4.125104.780.7519.058.1230 ED 1.75044.45 4.625117.480.7519.059.0255 EE 1.75044.45 5.125130.180.7519.059.5269 EF 1.75044.45 5.625142.880.7519.0510.5298 BA 2.00050.80 2.12553.980.8822.23 5.4153 BH 2.00050.80 2.62566.680.8822.23 6.1173 BB 2.00050.80 3.12579.380.8822.23 6.8193 BJ 2.00050.80 3.62592.080.8822.238.2232 BC 2.00050.80 4.125104.780.8822.239.5269 BD 2.00050.80 4.625117.480.8822.2310.3292 BE 2.00050.80 5.125130.180.8822.2310.7303 BF 2.00050.80 5.625142.880.8822.2313.0369 CH 2.50063.50 2.62566.68 1.1328.589.2261 CB 2.50063.50 3.12579.38 1.1328.5810.4295 CJ 2.50063.50 3.62592.08 1.1328.5812.7361 CC 2.50063.50 4.125104.78 1.1328.5815.0425 CD 2.50063.50 4.625117.48 1.1328.5817.2488 CE 2.50063.50 5.125130.18 1.1328.5819.3547 CF 2.50063.50 5.625142.88 1.1328.5821.4607DB 3.00076.20 3.12579.38 1.2531.7516.7473DJ 3.00076.20 3.62592.08 1.2531.7520.0567 DC 3.00076.20 4.125104.78 1.2531.7522.2629 DD 3.00076.20 4.625117.48 1.2531.7525.5723 DE 3.00076.20 5.125130.18 1.2531.7530.0850 DF 3.00076.20 5.625142.88 1.2531.7531.9904 DP 3.00076.20 5.875149.23 1.2531.7532.8931 DN 3.00076.207.625193.68 1.2531.7539.51119 DG 3.00076.208.625219.08 1.2531.7543.31227 FC 3.50088.90 4.125104.78 1.2531.7530.0850 FD 3.50088.90 4.625117.48 1.2531.7534.4976 FE 3.50088.90 5.125130.18 1.2531.7540.51148 FF 3.50088.90 5.625142.88 1.2531.7543.11221 FP 3.50088.90 5.875149.23 1.2531.7544.31257 FN 3.50088.907.625193.68 1.2531.7553.31512 FG3.50088.908.625219.081.2531.7558.51658NOTE:With the stud-mount feature, a ther-mally-conductive disk can be inserted in the bottom flush with the outer insulating sleeve.This reduces the thermal resistance through the can bottom by 0.3 °C/W. Can Style P.CaseStud P± 0.039” Diam. Thread (±1.0 mm) 1.38M8 0.470” (12.0) 1.75M8 0.470” (12.0) 2.00M12 0.630” (16.0) 2.50M12 0.630” (16.0) 3.00M12 0.630” (16.0) 3.50M120.630” (16.0)Stud DimensionsNOTE: Onlyhigh post and M5 post terminals are available at 550 Vdc as they meet the required creepagedistance.Click here to see Hardware & Mounting OptionsFor CasePost DiameterH maxmin Full ThreadTorqueTerminal Style Diameters Code in mm in mm Thread in mm in·lb N·m Low Post 1⅜ to 3A 0.3148.00.094 2.410–320.218 5.525 2.82High Post 1⅜ to 3B 0.3148.00.2817.110–320.3759.525 2.82High Current, Low 2½ to 3½D 0.68417.40.125 3.2¼–280.3448.760 6.78High Current, High 2½ to 3½E 0.68417.40.2817.1¼–280.46911.960 6.78M5 Post, Small 1⅜ to 2M 0.3148.00.2817.1M50.3759.525 2.82M5 Post 2½ & 3F 0.51213.00.230 5.8M50.3448.725 2.82M6 Low Post 2½ to 3½G 0.68417.40.125 3.2M60.3448.760 6.78M6 High Post 2½ to 3½H 0.68417.40.2817.1M60.46911.960 6.78Type Capacitance Tolerance Voltage Case Code Insulation Terminal Can Style812 = 8100 µF M= ±20% 200 = 200 Vdc 0= None A= Low Post 550 812T 450 FG2D SPart Numbering SystemU= 10%+75% 1= Polyester B= High Post T= 10%+50% 2= PVC D= High Current, Low PostE= High Current, F= M5 PostM= M5 Post, smallG= M6 Low Post H= M6 High Post High Post Standard insulation is 0.008-in PVC sleeve with 0.01-in polypropylene end disk.Typical Performance Curves Blank= Standard CanS= Stud Bottom P= Stud with Thermal Pad Polyester insulation is not available for 3.5 inch diameter units.RatingsCap. (µF)CatalogPart NumberESR Max.@ 25 °C120 Hz(mΩ)Ripple Max.@ 85 °C120 Hz(A)Nominal SizeD x L(inches)Cap.(µF)CatalogPart NumberESR Max.@ 25 °C120 Hz(mΩ)Ripple Max.@ 85 °C120 Hz(A)Nominal SizeD x L(inches) 200 Vdc (250 Vdc Surge) 11000550C113T200DD2B 13.024.5 3 x 4 5/8380550C381T200AK2B 262.0 2.3 1 3/8 x 1 5/8 12000550C123T200DE2B 11.527.0 3 x 5 1/8 690550C691T200AA2B 146.0 3.5 1 3/8 x 2 1/8 13000550C133T200FC2B 15.523.8 3 1/2 x 4 1/8 850550C851T200AH2B 120.0 4.1 1 3/8 x 2 5/8 14000550C143T200DF2B 10.329.4 3 x 5 5/8 1200550C122T200AB2B 88.5 5.1 1 3/8 x 3 1/8 15000550C153T200DP2D 9.830.6 3 x 5 7/8 1200550C122T200EA2B 87.9 5.2 1 3/4 x 2 1/8 16000550C163T200FD2B 13.226.8 3 1/2 x 4 5/8 1200550C122T200BA2B 86.0 5.7 2 x 2 1/8 18000550C183T200FE2B 11.729.4 3 1/2 x 5 1/8 1400550C142T200EH2B 72.0 6.2 1 3/4 x 2 5/8 20000550C203T200FF2D 10.531.9 3 1/2 x 5 5/8 1500550C152T200AJ2B 70.3 6.1 1 3/8 x 3 5/8 21000550C213T200DN2D 8.236.8 3 x 7 5/8 1800550C182T200AC2B 58.57.0 1 3/8 x 4 1/8 22000550C223T200FP2D 10.033.2 3 1/2 x 5 7/8 1800550C182T200BH2B 60.27.4 2 x 2 5/8 24000550C243T200DG2D 7.140.4 3 x 8 5/8 1900550C192T200EB2B 53.17.7 1 3/4 x 3 1/8 30000550C303T200FN2D 8.040.6 3 1/2 x 7 5/8 2100550C212T200AD2B 50.27.9 1 3/8 x 4 5/8 35000550C353T200FG2D 6.844.9 3 1/2x 8 5/8 2400550C242T200AE2B 44.18.8 1 3/8 x 5 1/8 250 Vdc (300 Vdc Surge)2400550C242T200EJ2B 42.29.1 1 3/4 x 3 5/8 280550C281T250AK2B 339.0 2.1 1 3/8 x 1 5/8 2500550C252T200BB2B 43.39.2 2 x 3 1/8 510550C511T250AA2B 186.0 3.1 1 3/8 x 2 1/8 2700550C272T200AF2B 39.49.6 1 3/8 x 5 5/8 620550C621T250AH2B 153.0 3.7 1 3/8 x 2 5/8 2800550C282T200CH2B 39.110.5 2 1/2 x 2 5/8 850550C851T250AB2B 113.0 4.6 1 3/8 x 3 1/8 3000550C302T200EC2B 35.110.4 1 3/4 x 4 1/8 850550C851T250EA2B 120.0 4.5 1 3/4 x 2 1/8 3200550C322T200BJ2B 34.011.0 2 x 3 5/8 910550C911T250BA2B 117.0 4.9 2 x 2 1/8 3500550C352T200ED2B 30.211.7 1 3/4 x 4 5/8 1000550C102T250EH2B 101.0 5.3 1 3/4 x 2 5/8 3900550C392T200BC2B 28.112.6 2 x 4 1/8 1100550C112T250AJ2B 89.3 5.4 1 3/8 x 3 5/8 4000550C402T200EE2B 26.613.0 1 3/4 x 5 1/8 1300550C132T250AC2B 74.1 6.2 1 3/8 x 4 1/8 4000550C402T200CB2B 28.113.2 2 1/2 x 3 1/8 1300550C132T250BH2B 82.1 6.3 2 x 2 5/8 4500550C452T200EF2B 23.814.2 1 3/4 x 5 5/8 1400550C142T250EB2B 71.3 6.6 1 3/4 x 3 1/8 4600550C462T200BD2B 24.014.2 2 x 4 5/8 1500550C152T250AD2B 63.57.0 1 3/8 x 4 5/8 5100550C512T200CJ2B 22.015.6 2 1/2 x 3 5/8 1800550C182T250AE2B 55.07.8 1 3/8 x 5 1/8 5300550C532T200BE2B 21.115.7 2 x 5 1/8 1800550C182T250EJ2B 55.97.9 1 3/4 x 3 5/8 5700550C572T200DB2B 23.416.1 3 x 3 1/8 1800550C182T250BB2B 59.07.9 2 x 3 1/8 6100550C612T200BF2B 18.917.2 2 x 5 5/8 2000550C202T250AF2B 49.78.5 1 3/8 x 5 5/8 6200550C622T200CC2B 17.818.1 2 1/2 x 4 1/8 2100550C212T250CH2B 50.59.3 2 1/2 x 2 5/8 7300550C732T200CD2B 15.220.3 2 1/2 x 4 5/8 2200550C222T250EC2B 45.89.1 1 3/4 x 4 1/8 7300550C732T200DJ2B 18.319.1 3 x 3 5/8 2400550C242T250BJ2B 45.39.5 2 x 3 5/8 8500550C852T200CE2B 13.422.5 2 1/2 x 5 1/8 2600550C262T250ED2B 39.310.3 1 3/4 x 4 5/8 9000550C902T200DC2B 15.221.9 3 x 4 1/8 2900550C292T250EE2B 34.511.4 1 3/4 x 5 1/8 9600550C962T200CF2B 11.924.5 2 1/2 x 5 5/8 2900550C292T250BC2B 37.410.9 2 x 4 1/82900550C292T250CB2B 36.911.5 2 1/2 x 3 1/8 2100550C212T300EE2B 58.78.7 1 3/4 x 5 1/8 3300550C332T250EF2B 30.812.4 1 3/4 x 5 5/8 2200550C222T300CB2B 56.19.3 2 1/2 x 3 1/8 3400550C342T250BD2B 31.912.3 2 x 4 5/8 2400550C242T300EF2B 52.29.6 1 3/4 x 5 5/8 3700550C372T250CJ2B 28.713.7 2 1/2 x 3 5/8 2400550C242T300BD2B 51.79.7 2 x 4 5/8 3900550C392T250BE2B 27.913.6 2 x 5 1/8 2700550C272T300BE2B 45.110.7 2 x 5 1/8 4200550C422T250DB2B 28.914.5 3 x 3 1/8 2800550C282T300CJ2B 43.811.1 2 1/2 x 3 5/8 4500550C452T250BF2B 24.914.9 2 x 5 5/8 3100550C312T300BF2B 40.211.8 2 x 5 5/8 4600550C462T250CC2B 23.415.8 2 1/2 x 4 1/8 3400550C342T300DB2B 37.712.7 3 x 3 1/8 5400550C542T250CD2B 19.917.8 2 1/2 x 4 5/8 3500550C352T300CC2B 35.912.8 2 1/2 x 4 1/8 5400550C542T250DJ2B 22.317.3 3 x 3 5/8 4100550C412T300CD2B 30.614.4 2 1/2 x 4 5/8 6200550C622T250CE2B 17.119.9 2 1/2 x 5 1/8 4400550C442T300DJ2B 29.515.1 3 x 3 5/8 6600550C662T250DC2B 18.519.9 3 x 4 1/8 4700550C472T300CE2B 26.715.9 2 1/2 x 5 1/8 7100550C712T250CF2B 15.221.7 2 1/2 x 5 5/8 5300550C532T300CF2B 23.417.5 2 1/2 x 5 5/8 7800550C782T250DD2B 15.822.3 3 x 4 5/8 5400550C542T300DC2B 24.417.3 3 x 4 1/8 9000550C902T250DE2B 13.924.6 3 x 5 1/8 6400550C642T300DD2B 20.819.4 3 x 4 5/8 9700550C972T250FC2D 16.523.1 3 1/2 x 4 1/8 7200550C722T300FC2D 18.821.7 3 1/2 x 4 1/8 10000550C103T250DF2B 12.426.8 3 x 5 5/8 7400550C742T300DE2B 18.221.5 3 x 5 1/8 11000550C113T250DP2B 11.428.2 3 x 5 7/8 8300550C832T300DF2B 16.223.4 3 x 5 5/8 11000550C113T250FD2D 14.325.8 3 1/2 x 4 5/8 8600550C862T300FD2D 16.024.3 3 1/2 x 4 5/8 13000550C133T250FE2D 12.528.4 3 1/2 x 5 1/8 8800550C882T300DP2B 15.424.3 3 x 5 7/8 15000550C153T250DN2D 9.434.4 3 x 7 5/8 9900550C992T300FE2D 14.026.8 3 1/2 x 5 1/815000550C153T250FF2D 11.031.2 3 1/2 x 5 5/8 11000550C113T300FF2D 12.129.6 3 1/2 x 5 5/8 16000550C163T250FP2D 10.532.3 3 1/2 x 5 7/8 12000550C123T300FP2D 11.530.8 3 1/2 x 5 7/8 17000550C173T250DG2D 7.938.3 3 x 8 5/8 12000550C123T300DN2D 12.430.0 3 x 7 5/8 22000550C223T250FN2D 8.539.5 3 1/2 x 7 5/8 14000550C143T300DG2D 10.533.3 3 x 8 5/8 25000550C253T250FG2D 7.243.7 3 1/2x 8 5/8 16000550C163T300FN2D 9.238.1 3 1/2 x 7 5/8 300 Vdc (350 Vdc Surge) 18000550C183T300FG2D 7.742.3 3 1/2x 8 5/8 200550C201T300AK2B 591.0 1.6 1 3/8 x 1 5/8 350 Vdc (400 Vdc Surge)320550C321T300AA2B 378.0 2.2 1 3/8 x 2 1/8 160550C161T350AK2B 662.0 1.5 1 3/8 x 1 5/8 480550C481T300AH2B 254.0 2.9 1 3/8 x 2 5/8 260550C261T350AA2B 414.0 2.1 1 3/8 x 2 1/8 490550C491T300EA2B 252.0 3.1 1 3/4 x 2 1/8 390550C391T350AH2B 284.0 2.7 1 3/8 x 2 5/8 640550C641T300AB2B 190.0 3.5 1 3/8 x 3 1/8 400550C401T350EA2B 281.0 2.9 1 3/4 x 2 1/8 640550C641T300BA2B 188.0 3.9 2 x 2 1/8 510550C511T350BA2B 209.0 3.7 2 x 2 1/8 710550C711T300EH2B 176.0 4.0 1 3/4 x 2 5/8 520550C521T350AB2B 213.0 3.3 1 3/8 x 3 1/8 800550C801T300AJ2B 156.0 4.1 1 3/8 x 3 5/8 570550C571T350EH2B 196.0 3.8 1 3/4 x 2 5/8 910550C911T300BH2B 131.0 5.0 2 x 2 5/8 640550C641T350AJ2B 175.0 3.9 1 3/8 x 3 5/8 960550C961T300AC2B 131.0 4.7 1 3/8 x 4 1/8 740550C741T350BH2B 146.0 4.7 2 x 2 5/8 990550C991T300EB2B 126.0 5.0 1 3/4 x 3 1/8 770550C771T350AC2B 146.0 4.4 1 3/8 x 4 1/8 1100550C112T300AD2B 110.0 5.3 1 3/8 x 4 5/8 800550C801T350EB2B 141.0 4.7 1 3/4 x 3 1/8 1300550C132T300AE2B 96.9 5.9 1 3/8 x 5 1/8 900550C901T350AD2B 123.0 5.0 1 3/8 x 4 5/8 1300550C132T300EJ2B 96.2 6.0 1 3/4 x 3 5/8 1000550C102T350AE2B 111.0 5.5 1 3/8 x 5 1/8 1300550C132T300BB2B 94.2 6.3 2 x 3 1/8 1000550C102T350EJ2B 110.0 5.6 1 3/4 x 3 5/8 1400550C142T300AF2B 83.4 6.6 1 3/8 x 5 5/8 1000550C102T350BB2B 105.0 5.9 2 x 3 1/8 1600550C162T300EC2B 77.27.0 1 3/4 x 4 1/8 1200550C122T350AF2B 93.1 6.2 1 3/8 x 5 5/8 1600550C162T300BJ2B 73.77.5 2 x 3 5/8 1300550C132T350EC2B 86.0 6.7 1 3/4 x 4 1/8 1600550C162T300CH2B 78.27.4 2 1/2 x 2 5/8 1300550C132T350BJ2B 81.77.1 2 x 3 5/8 1800550C182T300ED2B 67.37.8 1 3/4 x 4 5/8 1300550C132T350CH2B 86.77.1 2 1/2 x 2 5/8 2000550C202T300BC2B 60.78.6 2 x 4 1/8 1500550C152T350ED2B 74.97.4 1 3/4 x 4 5/81600550C162T350BC2B 67.28.2 2 x 4 1/8 1000550C102T400BJ2B 94.2 6.6 2 x 3 5/8 1700550C172T350EE2B 65.38.3 1 3/4 x 5 1/8 1200550C122T400ED2B 82.57.1 1 3/4 x 4 5/8 1800550C182T350CB2B 62.18.8 2 1/2 x 3 1/8 1300550C132T400EE2B 71.97.9 1 3/4 x 5 1/8 1900550C192T350EF2B 58.09.1 1 3/4 x 5 5/8 1300550C132T400BC2B 77.47.6 2 x 4 1/8 1900550C192T350BD2B 57.39.2 2 x 4 5/8 1400550C142T400CB2B 68.28.4 2 1/2 x 3 1/8 2200550C222T350BE2B 50.010.2 2 x 5 1/8 1500550C152T400EF2B 63.88.6 1 3/4 x 5 5/8 2300550C232T350CJ2B 48.510.5 2 1/2 x 3 5/8 1500550C152T400BD2B 64.38.7 2 x 4 5/8 2500550C252T350BF2B 44.411.2 2 x 5 5/8 1700550C172T400BE2B 57.59.5 2 x 5 1/8 2800550C282T350CC2B 40.012.1 2 1/2 x 4 1/8 1800550C182T400CJ2B 53.210.0 2 1/2 x 3 5/8 2800550C282T350DB2B 41.212.2 3 x 3 1/8 2000550C202T400BF2B 48.610.7 2 x 5 5/8 3300550C332T350CD2B 34.013.6 2 1/2 x 4 5/8 2200550C222T400CC2B 43.811.6 2 1/2 x 4 1/8 3600 550C362T350DJ2B 32.214.5 3 x 3 5/8 2200550C222T400DB2B 45.711.6 3 x 3 1/8 3600550C362T350DJ2B 32.214.5 3 x 3 5/8 2600550C262T400CD2B 37.313.0 2 1/2 x 4 5/8 3800550C382T350CE2B 29.715.1 2 1/2 x 5 1/8 2800550C282T400DJ2B 35.713.7 3 x 3 5/8 4300550C432T350CF2B 25.816.7 2 1/2 x 5 5/8 3000550C302T400CE2B 32.514.4 2 1/2 x 5 1/8 4400550C442T350DC2B 26.616.6 3 x 4 1/8 3400550C342T400CF2B 28.915.8 2 1/2 x 5 5/8 5100550C512T350DD2B 22.718.6 3 x 4 5/8 3400550C342T400DC2B 29.315.8 3 x 4 1/8 5800550C582T350FC2D 20.520.8 3 1/2 x 4 1/8 4000550C402T400DD2B 25.017.7 3 x 4 5/8 5900550C592T350DE2B 19.820.6 3 x 5 1/8 4600550C462T400FC2D 22.220.0 3 1/2 x 4 1/8 6700550C672T350DF2B 17.722.4 3 x 5 5/8 4700550C472T400DE2B 21.419.8 3 x 5 1/8 6900550C692T350FD2d 17.523.3 3 1/2 x 4 5/8 5300550C532T400DF2B 19.021.6 3 x 5 5/8 7100550C712T350DP2B 16.823.3 3 x 5 7/8 5400550C542T400FD2D 18.922.4 3 1/2 x 4 5/8 8000550C802T350FE2D 15.325.7 3 1/2 x 5 1/8 5600550C562T400DP2B 18.122.4 3 x 5 7/8 9000550C902T350FF2D 13.228.4 3 1/2 x 5 5/8 6200550C622T400FE2D 16.524.7 3 1/2 x 5 1/8 9500550C952T350FP2D 12.529.6 3 1/2 x 5 7/8 7100550C712T400FF2D 14.327.3 3 1/2 x 5 5/8 9600550C962T350DN2D 13.329.0 3 x 7 5/8 7500550C752T400FP2D 13.528.4 3 1/2 x 5 7/8 11000550C113T350DG2D 11.132.3 3 x 8 5/8 7800550C782T400DN2D 14.627.6 3 x 7 5/8 13000550C133T350FN2D 9.936.6 3 1/2 x 7 5/8 9000550C902T400DG2D 12.430.6 3 x 8 5/8 15000550C153T350FG2D 8.340.7 3 1/2 x 8 5/8 9700550C972T400FN2D 10.934.9 3 1/2 x 7 5/8 400 Vdc (450 Vdc Surge) 11000550C113T400FG2D 9.238.7 3 1/2x 8 5/8 130550C131T400AK2B 733.0 1.4 1 3/8 x 1 5/8 450 Vdc (500 Vdc Surge)200550C201T400AA2B 458.0 2.0 1 3/8 x 2 1/8 90550C900T450AK2B 827.0 1.3 1 3/8 x 1 5/8 300550C301T400AH2B 328.0 2.5 1 3/8 x 2 5/8 140550C141T450AA2B 521.0 1.8 1 3/8 x 2 1/8 310550C311T400EA2B 310.0 2.8 1 3/4 x 2 1/8 210550C211T450AH2B 353.0 2.4 1 3/8 x 2 5/8 400550C401T400AB2B 241.0 3.1 1 3/8 x 3 1/8 220550C221T450EA2B 333.0 2.7 1 3/4 x 2 1/8 400550C401T400BA2B 247.0 3.4 2 x 2 1/8 280550C281T450BA2B 265.0 3.3 2 x 2 1/8 450550C451T400EH2B 216.0 3.6 1 3/4 x 2 5/8 290550C291T450AB2B 260.0 3.0 1 3/8 x 3 1/8 510550C511T400AJ2B 194.0 3.7 1 3/8 x 3 5/8 320550C321T450EH2B 232.0 3.5 1 3/4 x 2 5/8 580550C581T400BH2B 168.0 4.4 2 x 2 5/8 360550C361T450AJ2B 208.0 3.5 1 3/8 x 3 5/8 610550C611T400AC2B 162.0 4.2 1 3/8 x 4 1/8 410550C411T450BH2B 180.0 4.3 2 x 2 5/8 630550C631T400EB2B 155.0 4.5 1 3/4 x 3 1/8 430550C431T450AC2B 174.0 4.1 1 3/8 x 4 1/8 710550C711T400AD2B 139.0 4.7 1 3/8 x 4 5/8 440550C441T450EB2B 166.0 4.3 1 3/4 x 3 1/8 800550C801T400EJ2B 121.0 5.4 1 3/4 x 3 5/8 500550C501T450AD2B 150.0 4.6 1 3/8 x 4 5/8 810550C811T400AE2B 122.0 5.3 1 3/8 x 5 1/8 570550C571T450AE2B 132.0 5.1 1 3/8 x 5 1/8 810550C811T400BB2B 121.0 5.5 2 x 3 1/8 570550C571T450EJ2B 130.0 5.2 1 3/4 x 3 5/8 910550C911T400AF2B 109.0 5.8 1 3/8 x 5 5/8 570550C571T450BB2B 129.0 5.3 2 x 3 1/8 980550C981T400EC2B 99.3 6.2 1 3/4 x 4 1/8 640550C641T450AF2B 118.0 5.6 1 3/8 x 5 5/8 990550C991T400CH2B 95.2 6.7 2 1/2 x 2 5/8 700550C701T450EC2B 107.0 6.0 1 3/4 x 4 1/8Cap. (µF)CatalogPart NumberESR Max.@ 25 °C120 HzRipple Max.@ 85 °C120 HzNominal SizeD x L(inches)Cap.(µF)CatalogPart NumberESR Max.@ 25 °C120 HzRipple Max.@ 85 °C120 HzNominal SizeD x L(inches)700550C701T450CH2B 108.0 6.3 2 1/2 x 2 5/8 410550C411U500BH2B 323.3 3.2 2 x 2 5/8 740550C741T450BJ2B 101.0 6.4 2 x 3 5/8 430550C431U500AC2B 307.4 3.1 1 3/8 x 4 1/8 820550C821T450ED2B 90.7 6.8 1 3/4 x 4 5/8 460550C461U500EB2B 303.7 3.2 1 3/4 x 3 1/8 900550C901T450BC2B 82.97.3 2 x 4 1/8 510550C511U500AD2B 263.9 3.4 1 3/8 x 4 5/8 950550C951T450EE2B 77.17.6 1 3/4 x 5 1/8 580550C581U500BB2B 231.3 4.0 2 x 3 1/8 980550C981T450CB2B 77.37.9 2 1/2 x 3 1/8 580550C581U500AE2B 231.4 3.8 1 3/8 x 5 1/8 1100550C112T450EF2B 68.48.3 1 3/4 x 5 5/8 590550C591U500EJ2B 236.6 3.8 1 3/4 x 3 5/8 1100550C112T450BD2B 68.88.4 2 x 4 5/8 650550C651U500AF2B 206.2 4.2 1 3/8 x 5 5/8 1200550C122T450BE2B 61.59.2 2 x 5 1/8 680550C681U500CH2B 196.9 4.7 2 1/2 x 2 5/8 1300550C132T450CJ2B 57.39.7 2 1/2 x 3 5/8 720550C721U500EC2B 193.9 4.4 1 3/4 x 4 1/8 1400550C142T450BF2B 53.310.2 2 x 5 5/8 740550C741U500BJ2B 180.3 4.8 2 x 3 5/8 1500550C152T450CC2B 49.610.9 2 1/2 x 4 1/8 850550C851U500ED2B 164.5 5.0 1 3/4 x 4 5/8 1500550C152T450DB2B 47.411.3 3 x 3 1/8 910550C911U500BC2B 155.6 5.4 2 x 4 1/8 1800550C182T450CD2B 42.212.2 2 1/2 x 4 5/8 960550C961U500CB2B 140.8 5.9 2 1/2 x 3 1/8 2000550C202T450DJ2B 37.013.5 3 x 3 5/8 980550C981U500EE2B 142.9 5.6 1 3/4 x 5 1/8 2100550C212T450CE2B 34.913.9 2 1/2 x 5 1/8 1100550C112U500BD2B 122.8 6.3 2 x 4 5/8 2400550C242T450CF2B 30.515.3 2 1/2 x 5 5/8 1100550C112U500EF2B 126.4 6.1 1 3/4 x 5 5/8 2400550C242T450DC2B 30.615.5 3 x 4 1/8 1200550C122U500CJ2B 109.17.0 2 1/2 x 3 5/8 2900550C292T450DD2B 26.117.4 3 x 4 5/8 1200550C122U500BE2B 109.1 6.9 2 x 5 1/8 3200550C322T450FC2D 22.919.6 3 1/2 x 4 1/8 1400550C142U500DB2B 86.28.4 3 x 3 1/8 3300550C332T450DE2B 22.719.2 3 x 5 1/8 1400550C142U500BF2B 91.57.8 2 x 5 5/8 3700550C372T450DF2B 20.220.9 3 x 5 5/8 1500550C152U500CC2B 85.38.3 2 1/2 x 4 1/8 3800550C382T450FD2D 19.522.1 3 1/2 x 4 5/8 1800550C182U500CD2B 72.49.3 2 1/2 x 4 5/8 4000550C402T450DP2B 19.221.8 3 x 5 7/8 1900550C192U500DJ2B 66.010.1 3 x 3 5/8 4400550C442T450FE2D 17.024.3 3 1/2 x 5 1/8 2000550C202U500CE2B 66.410.1 2 1/2 x 5 1/8 5000550C502T450FF2D 15.126.5 3 1/2 x 5 5/8 2300550C232U500DC2B 53.911.6 3 x 4 1/8 5300550C532T450FP2D 14.327.6 3 1/2 x 5 7/8 2300550C232U500CF2B 55.711.4 2 1/2 x 5 5/8 5500550C552T450DN2B 15.526.8 3 x 7 5/8 2700550C272U500DD2B 45.213.2 3 x 4 5/8 6400550C642T450DG2B 13.129.8 3 x 8 5/8 3100550C312U500DE2B 38.914.7 3 x 5 1/8 7100550C712T450FN2D 11.334.3 3 1/2 x 7 5/8 3200550C322U500FC2D 38.815.1 3 1/2 x 4 1/8 8100550C812T450FG2D 9.538.2 3 1/2 x 8 5/8 3500550C352U500DF2B 34.516.1 3 x 5 5/8 500 Vdc (550 Vdc Surge) 3700550C372U500DP2B 32.416.8 3 x 5 7/8 91550C910U500AK2B 1482.2 1.0 1 3/8 x 1 5/8 3800550C382U500FD2D 32.317.1 3 1/2 x 4 5/8 150550C151U500AA2B 865.7 1.4 1 3/8 x 2 1/8 4300550C432U500FE2D28.418.8 3 1/2 x 5 1/8 220550C221U500AH2B 612.3 1.8 1 3/8 x 2 5/8 4900550C492U500FF2D 24.320.9 3 1/2 x 5 5/8 230550C231U500EA2B 609.4 2.0 1 3/4 x 2 1/8 5200550C522U500FP2D 23.021.8 3 1/2 x 5 7/8 290550C291U500BA2B 463.9 2.5 2 x 2 1/8 5400550C542U500DN2B 26.120.9 3 x 7 5/8 290550C291U500AB2B 459.7 2.3 1 3/8 x 3 1/8 6000550C602U500DG2B 19.724.2 3 x 8 5/8 330550C331U500EH2B 424.5 2.6 1 3/4 x 2 5/8 7000550C702U500FN2D17.027.9 3 1/2 x 7 5/8 360550C361U500AJ2B 368.3 2.7 1 3/8 x 3 5/8 8400550C842U500FG2D 14.331.0 3 1/2 x 8 5/8。
BTS555中文资料
+
S O
4 5
IS OUT
Maximum Ratings at Tj = 25 °C unless otherwise specified Parameter Supply voltage (overvoltage protection see page 4) Supply voltage for full short circuit protection, resistive load or L < tbd µH Tj,start =-40 ...+150°C: Load current (short circuit current, see page 5) Load dump protection VLoadDump = UA + Vs, UA = 13.5 V RI5) = 2 Ω, RL = 0.1 Ω, td = 200 ms, IN, IS = open or grounded Operating temperature range Storage temperature range Power dissipation (DC), T C ≤ 25 °C Inductive load switch-off energy dissipation, single pulse Vbb = 12V, Tj,start = 150°C, TC = 150°C const., IL = tbd (>=20) A, ZL = tbd mH, 0 Ω, see diagrams on
2
IN
Load
ESD
Logic
I IN
Temperature sensor
IS
I IS
® PROFET
Load GND
2EZ7.5D5中文资料
VZ
@
IZT
ZZT @ IZT
ZZK
@
IZK
IR
@
VR
IZM
IZSM
VOLTS mA OHMS OHMS mA VOLTS mA A μA 4.6 504 1.0 80 1.0 400 5.0 139 3.6 2EZ3.6D5 4.4 468 1.0 30 1.0 400 5.0 128 3.9 2EZ3.9D5 4.1 434 1.0 20 1.0 400 4.5 116 4.3 2EZ4.3D5 3.3 386 1.0 5.0 1.0 550 4.5 106 4.7 2EZ4.7D5 3.5 356 1.0 5.0 1.0 600 3.5 98 5.1 2EZ5.1D5 3.3 324 2.0 5.0 1.0 500 2.5 89.5 5.6 2EZ5.6D5 3.1 292 3.0 5.0 1.0 700 1.5 80.5 6.2 2EZ6.2D5 2.9 266 4.0 5.0 1.0 700 2.0 73.5 6.8 2EZ6.8D5 2.66 242 5.0 5.0 0.5 700 2.0 66.5 7.5 2EZ7.5D5 2.44 220 6.0 5.0 0.5 700 2.3 61 8.2 2EZ8.2D5 2.2 200 7.0 3.0 0.5 700 2.5 55 9.1 2EZ9.1D5 2.0 182 7.6 3.0 0.25 700 3.5 50 10 2EZ10D5 1.82 166 8.4 1.0 0.25 700 4.0 45.5 11 2EZ11D5 1.66 152 9.1 1.0 0.25 700 4.5 41.5 12 2EZ12D5 1.54 138 9.9 0.5 0.25 700 5.0 38.5 13 2EZ13D5 1.43 130 10.6 0.5 0.25 700 5.5 35.7 14 2EZ14D5 1.33 122 11.4 0.5 0.25 700 7.0 33.4 15 2EZ15D5 1.25 114 12.2 0.5 0.25 700 8.0 31.2 16 2EZ16D5 1.18 107 13.0 0.5 0.25 750 9.0 29.4 17 2EZ17D5 1.11 100 13.7 0.5 0.25 750 10 27.8 18 2EZ18D5 1.05 95 14.4 0.5 0.25 750 11 26.3 19 2EZ19D5 1.0 90 15.2 0.5 0.25 750 11 25 20 2EZ20D5 0.91 82 16.7 0.5 0.25 750 12 22.8 22 2EZ22D5 0.83 76 18.2 0.5 0.25 750 13 20.8 24 2EZ24D5 0.74 68 20.6 0.5 0.25 750 18 18.5 27 2EZ27D5 0.67 60 22.5 0.5 0.25 1000 20 16.6 30 2EZ30D5 0.61 55 25.1 0.5 0.25 1000 23 15.1 33 2EZ33D5 0.56 50 27.4 0.5 0.25 1000 25 13.9 36 2EZ36D5 0.51 47 29.7 0.5 0.25 1000 30 12.8 39 2EZ39D5 0.45 43 32.7 0.5 0.25 1500 35 11.6 43 2EZ43D5 0.42 39 35.8 0.5 0.25 1500 40 10.6 47 2EZ47D5 0.39 36 38.8 0.5 0.25 1500 48 9.8 51 2EZ51D5 0.36 32 42.6 0.5 0.25 2000 55 9.0 56 2EZ56D5 0.32 29 47.1 0.5 0.25 2000 60 8.1 62 2EZ62D5 0.29 27 51.7 0.5 0.25 2000 75 7.4 68 2EZ68D5 0.27 24 56 0.5 0.25 2000 90 6.7 75 2EZ75D5 0.24 22 62.2 0.5 0.25 3000 100 6.1 82 2EZ82D5 0.22 20 69.2 0.5 0.25 3000 125 5.5 91 2EZ91D5 0.20 18 76.0 0.5 0.25 3000 175 5.0 100 2EZ100D5 0.18 17 83.6 0.5 0.25 4000 250 4.5 110 2EZ110D5 0.16 15 91.2 0.5 0.25 4500 325 4.2 120 2EZ120D5 0.15 14 98.8 0.5 0.25 5000 400 3.8 130 2EZ130D5 0.14 13 106.4 0.5 0.25 5500 500 3.6 140 2EZ140D5 0.13 12 114 0.5 0.25 6000 575 3.3 150 2EZ150D5 0.12 11 121.6 0.5 0.25 6500 650 3.1 160 2EZ160D5 0.12 11 130.4 0.5 0.25 7000 675 2.9 170 2EZ170D5 0.11 10 136.8 0.5 0.25 7000 725 2.8 180 2EZ180D5 0.10 10 144.8 0.5 0.25 8000 825 2.6 190 2EZ190D5 0.10 9 152 0.5 0.25 8000 900 2.5 200 2EZ200D5 NOTES: 1. Suffix 1 indicates +/-1% tolerance, suffix 2 indicates +/-2% tolerance, suffix 5 indicates +/-5% tolerance. Suffix 10 indicates +/-10%, no suffix indicates +/-20%. 2. The VZ is measured after allowing a 90 second stabilization period when mounted with a 3/8” minimum lead length from body. o o o Ambient temperature, TA = 25 C (+8 C/-2 C). 3. The Zener impedance is derived from 60 cycle ac voltage resulting from an ac current having an rms value equal to 10% of the dc Zener current (IZT or IZK ) is superimposed on IZT or IZK. 4. Maximum Surge Current IZSM is a non-recurrent maximum peak reverse surge with a pulse width of 8.3 ms. Copyright © 2008 11-06-2008 REV C
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SPECIFICATION
MODEL
DC VOLTAGE RATED CURRENT CURRENT RANGE RATED POWER
OUTPUT
VOLTAGE ADJ. RANGE LINE REGULATION LOAD REGULATION SETUP, RISE TIME HOLD UP TIME (Typ.)VOLTAGE RANGE FREQUENCY RANGE
EFFICIENCY (Typ.)INPUT
INRUSH CURRENT (Typ.)LEAKAGE CURRENT SAFETY STANDARDS HARMONIC CURRENT EMS IMMUNITY
WORKING TEMP.
WORKING HUMIDITY
STORAGE TEMP., HUMIDITY
TEMP. COEFFICIENT VIBRATION
MTBF
DIMENSION OTHERS
NOTE
PACKING
OVERLOAD
OVER VOLTAGE
AC CURRENT (Typ.)
800ms, 50ms/230VAC 1600ms, 50ms/115VAC at full load 80ms/230VAC 16ms/115VAC at full load 88 ~ 264VAC 124 ~ 370VDC 47 ~ 63Hz 71%
74%
CH1:28.98 ~ 37.26V 1.6A/115VAC 1A/230VAC
COLD START 20A/115VAC 40A/230VAC <1mA / 240VAC
105 ~ 150%rated output power
CH1:14.49 ~ 18.63V Protection type :Hiccup mode, recovers automatically after fault condition is removed Protection type :Hiccup mode, recovers automatically after fault condition is removed UL60950-1,TUV EN60950-1 approved
Compliance to EN55022 (CISPR22) Class B
Compliance to EN61000-3-2,-3Compliance to EN61000-4-2,3,4,5,6,8,11; ENV50204, EN55024, light industry level, criteria A -10 ~ +60(Refer to output load derating curve)20 ~ 90% RH non-condensing -20 ~ +85
, 10 ~ 95% RH
0.03%/(0 ~ 50) on CH1 output
10 ~ 500Hz, 2G 10min./1cycle, 60min. each along X,Y, Z axes 241.3K hrs min. MIL-HDBK-217F (25)159*97*38mm (L*W*H)
0.57Kg; 24pcs/13.7Kg/0.75CUFT
DC ALARM SIGNAL(OPTIONAL)FUNCTION
Battery low under charge voltage 82.5%2% CN1 PIN1Normal 0.8V max.Abnormal 5V 0.5V
AC fail CN1 PIN2
ADD-55A 13.8V 2.5A 0 ~ 3.5A 52.58W
100mVp-p CH1: 12 ~ 14.5V
1.0%
3.0%1.0%0.5%1.0%
0.5%
5V CH226.5V CH33A 0.16A 0 ~ 4A
--------
150mVp-p --------------------------------ADD-55B 27.6V CH11.3A 0 ~ 2A 55.12W 150mVp-p CH1: 24 ~ 29V 1.0% 3.0%0.5%0.5%
1.0%1.0%
5V CH213.4V CH33A 0.23A 0 ~ 4A
--------100mVp-p --------------------------------Universal AC input / Full range
Protections: Short circuit / Overload / Over voltage Battery low protections Cooling by free air convection 100% full load burn-in test
Fixed switching frequency at 45KHz 2 years warranty
Features :
RIPPLE & NOISE (max.)Note.2VOLTAGE TOLERANCE Note.3WITHSTAND VOLTAGE ISOLATION RESISTANCE
I/P-O/P:3KVAC I/P-FG:1.5KVAC O/P-FG:0.5KVAC
I/P-O/P, I/P-FG, O/P-FG:100M Ohms / 500VDC / 25
/ 70% RH
ENVIRONMENT PROTECTION
EMI CONDUCTION & RADIATION SAFETY &EMC
(Note 4)
1. All parameters NOT specially mentioned are measured at 230VAC input, rated load and 25of ambient temperature.
2. Ripple & noise are measured at 20MHz of bandwidth by using a 12" twisted pair-wire terminated with a 0.1uf & 47uf parallel capacitor.
3. Tolerance : includes set up tolerance, line regulation and load regulation.
4. The power supply is considered a component which will be installed into a final equipment. The final equipment must be re-confirmed that it still meets EMC directives.
CH1OUTPUT NUMBER
Mechanical Specification
Derating Curve Static Characteristics (A)
Case No. 901 Unit:mm
AMBIENT TEMPERATURE ()L O A D (%)
-10010203040506020
4050607080100With 18.2CFM min.(10cm)
NO FAN
INPUT VOLTAGE (V) 60Hz
60
80
100
120
140
160
180
200
220
240
260
300250
200150100
5025
O U T P U T V O L T A G E (V )
O U T P U T R I P P L E (m V p -p )
Ta=25
+5V
+13.8V +5V
+13.8V
148
109131211 4.85.0
5.24.44.64.24.0
(HORIZONTAL)
Block Diagram
fosc : 45KHz
PWM CIRCUIT
DETECTION O.L.P.
EMI FILTER
RECTIFIERS
&FILTER
POWER SWITCHING
FILTER
BACK UP
&&
RECTIFIERS
BAT. CHARGER
+V B+
+5V COM
I/P
CONTROL
FG
REGULATOR
SWITCHING Terminal Pin No.Assignment
Pin No.Pin No.51678234Assignment Assignment DC OUTPUT +V AC/L AC/N FG
BAT. +BAT.-/COM
DC/DC OUTPUT +5V
DC OUTPUT COM 4.5
9
152.5
4.5
7
150
6.5
18.5
3.5
3.578
24
159
22117
9
65
2-M 3
28.5
3.518
3-
M 3
38
97
84.5
3.5
8
76
5432
1
6.5
8.25。