MC74HCT125ADG,MC74HCT125ADTG,MC74HCT125ADR2G,MC74HCT125ADTR2G, 规格书,Datasheet 资料
74CD系列芯片功能列表
系列 电平 延迟 电流 AHC CMOS 8.5ns -8/8mA AHCT COMS/TTL 8.5 -8/8 HC COMS 25 -8/8 HCT COMS/TTL 25 -8/8 ACT COMS/TTL 10 -24/24 F TTL 6.5 -15/64 ALS TTL 10 -15/64 LS TTL 18 -15/247400 与非门7401 OC与非门7402 或非门7403 与非门7404 反向器7406 高输出反向器7408 与门7409 OC与门7410 与非门7411 与门74121 单稳态74132 触发器与非门7414 触发器反向器74153 四选一74155 译码器74180 奇偶发生检验74191 计数器7420 双四输入与非门7426 与非门7427 三输入或非门7430 八输入端与非门7432 二输入或门7438 与非门缓冲器7445 译码驱动器7474 D型触发器7475 双锁存器7476 J-K触发器 7485 四位比较器7486 双端异或门74HC74HC00 双输入与非门74HC02 双输入或非门74HC03 与非门74HC04 六路反向器74HC05 六路反向器74HC08 双输入与门74HC107 J-K触发器74HC109A J-K触发器74HC11 三输入与门74HC112 双J-K触发器74HC113 双JK触发器74HC123A 可重触发单稳74HC125 四个三态门74HC126 六三态门74HC132 施密特触发与非门74HC133 十三输入与非门74HC137 3-8线译码器74HC138 3线至8线译码器74HC139 2线至4线译码器74HC14 六触发反向器74HC147 10-4编码器74HC148 8-3编码器74HC149 8-8编码器74HC151 8通道多路器74HC153 双四输入多路器74HC154 4线至16线译码器74HC155 2线至4线译码器74HC157 四个双端多路器74HC161 二进制计数器74HC163 十进制计数器74HC164 串入并出74HC165 并入串出74HC166 串入并出74HC173 三态D触发器74HC174 六D触发器74HC175 六D触发器74HC181 算术逻辑单元74HC182 进位发生器74HC190 二进制加减计数器74HC191 十进制加减计数器74HC192 十进制加减计数器74HC193 二进制加减计数器74HC194 4位双向移位寄存器74HC195 4位并行移位寄存器74HC20 四个四入与非门74HC221 不可重触发单稳74HC237 地址锁3线至8线译码器74HC242/243 三态收发器74HC244 八个三态缓冲门74HC245 三态收发器74HC251 8路3态多路器74HC253 4路3态多路器74HC257 4路3态多路器74HC258 2路3态多路器74HC259 8位地址锁存译码器74HC266A 异或非74HC27 3输入或非门74HC273 8路D触发器74HC280 奇偶发生器74HC283 四位加法器74HC299 三态移位寄存74HC30 8输入端与非门74HC32 四个双端或门74HC34 非反向器74HC354 8路3态多路器74HC356 8路3态多路器74HC365 六个三态缓冲门74HC366 缓冲反向器74HC367 缓冲反向器74HC368 缓冲反向器74HC373 三态D型锁存器- 1 -74HC374 三态D触发器74HC393 4位二进制计数器74HC4016 四路模拟量开关74HC4020 14输出计数器74HC4017 十进制计数10译码输出端 74HC4040 12出计数器74HC4046 相位监测输出器74HC4049 电平变低器74HC4050 电平变低器74HC4051 8通道多路器74HC4052 4通道多路器74HC4053 2通道多路器74HC4060 14阶BIN计数74HC4066 四通道多路器74HC4075 3输入或门74HC42 BCD转十进制译码器74HC423A 可重触发单稳74HC4511 7段译码器74HC4514 4至16线译码器74HC4538A 可重触发单稳74HC4543 LCD用BCD-7段译码74HC51 与或非门74HC521 判决定路74HC533 三态D锁存器74HC534 三态D型触发器74HC540 三态缓冲器74HC541 三态缓冲反向器74HC58 与或门74HC589 8位移位寄存三态输出 74HC594 8位移位寄存器74HC595 8位移位寄存器出锁存 74HC597 8位移位寄存器入锁存 74HC620 反向3态收发器74HC623 八路三态收发器74HC640 反向3态收发器74HC643 八路三态收发器74HC646 总线收发器74HC648 反向总线收发器 74HC688 8位判决电路74HC7266 异或非门74HC73 双JK触发器74HC74A 双D触发器74HC75 4位双稳锁存器74HC76 双JK触发器74HC85 4位判决电路74HC86 2输入异或门74HC942 300BPS低速调制解调器74HC943 300BPS低速调制解调器74LS74LS00 与非门74LS02 或非门74LS03 与非门74LS04 反向器74LS05 六路反向器74LS08 与门74LS09 OC与门74LS10 与非门74LS109 与门74LS11 与门74LS112 双J-K触发器74LS113 双JK触发器74LS114 负沿J-K触发器74LS122 可重触发单稳74LS123 可重触发单稳74LS125 四个三态门74LS13 4输入与非触发器74LS160 计数器74LS136 异或门74LS138 3线至8线译码器74LS139 2线至4线译码器74LS14 六触发反向器74HC147 10-4编码器74HC148 8-3编码器74HC149 8-8编码器74LS151 8通道多路器74LS153 双四输入多路器74LS155 2线至4线译码器74LS156 2-4译码器74LS157 四个双端多路器74LS158 2-1线多路器74LS160A 二进制计数器74LS161A 二进制计数器74LS162A 二进制计数器74LS163A 十进制计数器74LS164 串入并出74LS168 双向计数器74LS169 四位加减计数器74LS173 三态D触发器74LS174 六D触发器74LS175 六D触发器74LS190 二进制加减计数器74LS191 十进制加减计数器74LS192 十进制加减计数器74LS193 二进制加减计数器74LS194A 4位双向移位寄存器74LS195A 4位并行移位寄存器74LS20 四个四入与非门74LS21 四输入端与门74LS240 八个三态缓冲门74LS244 八个三态缓冲门74LS245 三态收发器74LS253 4路3态多路器74LS256 四位可锁存锁存器74LS257 4路3态多路器74LS258 2路3态多路器74LS27 三输入或非门74LS279 四个RS非锁存器74LS28 四双端或非缓冲74LS283 四位加法器74LS30 八输入端与非门74LS32 二输入或门74LS352 4-1线选择多路器74LS365 六个三态缓冲门74LS367 缓冲反向器- 2 -- 3 -74LS368 缓冲反向器 74LS373 三态输出锁存器 74LS76 2个JK 触发器 74LS379 四个并行寄存器 74LS38 与非门缓冲器 74LS390 2个10进制计数器 74LS393 2个2进制计数器 74LS42 BCD 转十进制译码器 74LS48 BCD-7段译码器 74LS49 BCD-7段译码器 74LS51 与或非门 74LS540 8路缓冲驱动器 74LS541 8路缓冲驱动器 74LS74 D 型触发器 74LS682 8路比较器 74LS684 8路比较器 74LS75 双锁存器 74LS83A 四位加法器 74LS85 4位判决电路 74LS86 2输入异或门 74LS90 十/二进制计数器 74LS95B 4位左右移位寄存 74LS688 8位判决电路 74LS136 2输入异或门 74LS651 总线收发器 74LS653 总线收发器 74LS670 3态4-4寄存器 74LS73A 双JK 触发器CD 系列门电路 CD4000 双3输入端或非门 CD4001 四2输入端或非门 CD4002 双4输入端或非门 CD4007 双互补对加反向器 CD4009 六反向缓冲/变换器 CD4011 四2输入端与非门 CD4012 双4输入端与非门 CD4023 三2输入端与非门 CD4025 三2输入端与非门CD4030 四2输入端异或门 CD4041 四同相/反向缓冲器 CD4048 8输入端可扩展多功能门 CD4049 六反相缓冲/变换器 CD4050 六同相缓冲/变换器 CD4068 8输入端与门/与非门 CD4069 六反相器 CD4070 四2输入异或门 CD4071 四2输入端或门 CD4072 双4输入端或门 CD4073 三3输入端与门 CD4075 三3输入端或门 CD4077 四异或非门CD4078 8输入端与非门/或门 CD4081 四2输入端与门 CD4082 双4输入端与非门 CD4085 双2路2输入端与或非门 CD4086 四2输入端可扩展与或非门 CD40104 TTL 至高电平CMOS 转换器 CD40106 六施密特触发器CD40107 双2输入端与非缓冲/驱动 CD40109 四低-高电平位移器 CD4501 三多输入门CD4052 六反向缓冲器(三态输出) CD4503 六同相缓冲器(三态输出) CD4504 6TTL 或CMOS 同级移相器 CD4506 双可扩展AIO 门 CD4507 四异或门CD4519 4位与/或选择器 CD4530 双5输入多数逻辑门 CD4572 四反向器\二输入或非门 CD4599 8 位可寻址锁存器触发器 CD4013 双D 触发器 CD4027 双JK 触发器 CD4042 四锁存D 型触发器 CD4043 四三态R-S 锁存触发器 CD4044 四三态R-S 锁存触发器CD4047 单稳态触发/无稳多谐振荡器 CD4093 四2输入端施密特触发器 CD4098 双单稳态触发器 CD4099 8位可寻址锁存器 CD4508 双4位锁存触发器 CD4528 双单稳态触发器 CD4538 精密单稳多谐振荡器 CD4583 双施密特触发器 CD4584 六施密特触发器 CD4599 8位可寻址锁存器计数器CD4017 十进制计数/分配器 CD4020 14位二进制串行计数器 CD4022 八进制计数/分配器 CD4024 7位二进制串行计数器/分频 CD4029 预置数可逆计数器 CD4040 12二进制串行计数器 CD4045 12位计数/缓冲器 CD4059 四十进制N 分频器 CD4060 14二进制串行计数器/分频 CD4095 3输入端J-K 触发器 CD4096 3输入端J-K 触发器 CD40110 十进制加减计数/7端译码 CD40160 可预置数BCD 加计数器 CD40161 可预置数4位二进制加计数器 CD40162 可预置数BCD 加计数器 CD40163 可预置数4位二进制加计数器 CD40192 可预置数BCD 加/减计数器 CD40193 可预置4位二进制加/减计数 CD4510 可预置BCD 加/减计数器 CD4516 可预置4位二进制加/减计数 CD4518 双BCD 同步加计数器CD4520 双同步4位二进制加计数器CD4521 24级频率分频器CD4522 可预置BCD 同步1/N 加计数器 CD4526 4位二进制同步1/N 加计数器 CD4534 实时与译码计数器 CD4536 可编程定时器- 4 -CD4541 可编程定时器 CD4553 3数字BCD 计数器CD4568 相位比较器/可编程计数器 CD4569 双可预置BCD/二进制计数器 CD4597 8位总线相容计数/锁存器 CD4598 8位总线相容可建地址锁存器译码器 CD4511 BCD 锁存/7段译码器/驱动器 CD4514 4位锁存/4-16线译码器 CD4515 4位锁存/4-16线译码器 CD4026 十进制计数/7段译码器 CD4028 BCD-十进制译码器 CD4033 十进制计数/7段译码器 CD4054 4位液晶显示驱动 CD4055 BCD-7段码/液晶驱动 CD4056 BCD-7段码/驱动CD40102 8位同步减法计时器(BCD) CD40103 8位同步减法计时器(二进制) CD4513 BCD-锁存/7端译码/驱动器 CD4514 4位锁存/4线—16线译码器 CD4515 4位锁存/4线—16线译码器 CD4543 BCD-锁存/7段译码/驱动器 CD4544 BCD-锁存/7段译码波动闭锁 CD4547 BCD-锁存/7段译码/大电流 CD4555 双二进制4选1译码器/分离 CD4556 双二进制4选1译码器/分离 CD4558 BCD-7段译码CD4555 双二进制4选1译码器/分离器 CD4556 双二进制4选1译码器/分离器移位寄存器 CD4006 18位串入—串出移位寄存器 CD4014 8位串入/并入—串出移位 CD4015 双4位串入—并出移位寄存器 CD4021 8位串入/并入—串出移位 CD4031 64位移位寄存器 CD4034 8位通用总线寄存器 CD4035 4位串/并入—串/并出移位 CD4076 4线D 型寄存器CD4094 8位移位/存储总线寄存器CD40100 32位左移/右移 CD40105 先进先出寄存器 CD40108 4×4多端口寄存器阵列 CD40194 4位并/串入—并/串出移位 CD40195 4位并/串入—并/串出移位 CD4517 64位移位寄存器 CD45490 连续的近似值寄存器 CD4562 128位静态移位寄存器 CD4580 4×4多端寄存器模拟开关和数据选择器 CD4016 四联双向开关 CD4019 四与或选择器 CD4051 单八路模拟开关 CD4052 双4路模拟开关 CD4053 三2路模拟开关 CD4066 四双向模拟开关 CD4067 单十六路模拟开关 CD4097 双八路模拟开关 CD40257 四2选1数据选择器 CD4512 八路数据选择器 CD4529 双四路/单八路模拟开关 CD4539 双四路数据选择器CD4551 四2通道模拟多路传输运算电路 CD4008 4位超前进位全加器CD4019 四与或选择器 CD4527 BCD 比例乘法器 CD4032 三路串联加法器CD4038 三路串联加法器(负逻辑) CD4063 四位量级比较器 CD4070 四2输入异或门 CD4585 4位数值比较器 CD4089 4位二进制比例乘法器 CD40101 9位奇偶发生器/校验器 CD4527 BCD 比例乘法器 CD4531 12位奇偶数 CD4559 逐次近似值码器 CD4560 “N”BCD 加法器 CD4561 “9”求补器 CD4581 4位算术逻辑单元 CD4582 超前进位发生器CD4585 4位数值比较器存储器CD4049 4字×8位随机存取存储器 CD4505 64×1位RAMCD4537 256×1静态随机存取存储器 CD4552 256位RAM特殊电路CD4046 锁相环集成电路 CD4532 8位优先编码器 CD4500 工业控制单元 CD4566 工业时基发生器 CD4573 可预置运算放大器 CD4574 比较器、线性、双对双运放 CD4575 双/双预置运放/比较器CD4597 8位总线相容计数/锁存器 CD4598 8位总线相容可建地址。
74系列芯片详细功能介绍
74系列数数字电路7400、74H00、74L00、74LS00、74S00、74HC00、74C00、74F00、74ALS00四2输入与非门Y=\AB。
7401、74LS01、74HC01、74ALS01四2输入与非门(OCY=\AB。
7402、74L02、74LS02、74S02、74HC02、74C02、74ALS02、74F02四2输入或非门。
Y=/A+B。
7403、74L03、74LS03、74ALS03、74S03、74HC037404、74H04、74L04、74S04、74HC04、74C04、74F04、74ALS04六反相器Y=/A。
7405、74H05、74LS05、74S05、74HC05、74F05、74ALS05六反相器(OCY=/A。
7406、74LS06六反相缓冲器/驱动器(OC、高压输出Y=/A;是7405高耐压输出型,耐压30V。
7407、74LS07、74HC07六缓冲器/驱动器(OC、高压输出Y=A; 30V耐高压输出。
7408、74LS08、74F08、74ALS08、74S08、74HC08、74C08四2输入与门Y=AB。
7409、74LS09、74F09、74ALS09、74S09、74HC09四2输入与门(OC Y=AB。
7410、74H10、74L10、74LS10、74ALS10、74S10、74HC10、74C10 74H11、74LS11、74S11、74F11、74ALS11、74HC11三3输入与门Y=ABC。
7412、74LS12、74ALS12三3输入与非门(OCY=\ABC。
7413、74LS13双4输入与非门Y=\ABCD。
7414、74LS14、74HC14、74C1474H15、74LS15、74ALS15、74S15三3输入与门(OCY=ABC。
7416、74LS16六反相缓冲器/驱动器Y=/A;7417、74LS17六缓冲器/驱动器(OC、高压输出Y=A;15V耐压输出。
SN74HCT125中文资料
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74hc125d
DATA SHEETProduct specificationFile under Integrated Circuits, IC06December 199074HC/HCT125Quad buffer/line driver; 3-stateFor a complete data sheet, please also download:•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications •The IC06 74HC/HCT/HCU/HCMOS Logic Package Information •The IC06 74HC/HCT/HCU/HCMOS Logic Package OutlinesFEATURES•Output capability: bus driver •I CC category: MSI GENERAL DESCRIPTIONThe 74HC/HCT125 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).They are specified in compliance with JEDEC standard no. 7A.The 74HC/HCT125 are four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a HIGH impedance OFF-state.The “125” is identical to the “126” but has active LOW enable inputs.QUICK REFERENCE DATAGND = 0 V; T amb = 25°C; t r = t f = 6 nsNotes1.C PD is used to determine the dynamic power dissipation (P D in µW):P D = C PD ×V CC 2×f i +∑(C L ×V CC 2×f o )where:f i = input frequency in MHz f o = output frequency in MHz C L =output load capacitance in pF V CC =supply voltage in V∑(C L ×V CC 2×f o )= sum of outputs2.For HC the condition is V I = GND to V CCFor HCT the condition is V I = GND to V CC −1.5 V ORDERING INFORMATIONSee “74HC/HCT/HCU/HCMOS Logic Package Information”.SYMBOL PARAMETERCONDITIONS TYPICAL UNIT HCHCTt PHL / t PLH propagation delay nA to nY C L =15pF; V CC =5V912ns C I input capacitance3.5 3.5pF C PD power dissipation capacitance per buffernotes 1 and 22224pFPIN DESCRIPTIONPIN NO.SYMBOL NAME AND FUNCTION1, 4, 10, 131OE to 4OE outputs enable inputs (active LOW)2, 5, 9, 121A to 4A data inputs3, 6, 8, 111Y to 4Y data outputs7GND ground (0V)14V CC positive supply voltageFig.1 Pin configuration.Fig.2 Logic symbol.Fig.3 IEC logic symbol.(a)(b)Fig.4 Functional diagram.Fig.5 Logic diagram (one buffer).FUNCTION TABLENote1.H=HIGH voltage levelL=LOW voltage levelX=don’t careZ=high impedance OFF-state INPUTS OUTPUT nOE nA nYLLHLHXLHZDC CHARACTERISTICS FOR 74HCFor the DC characteristics see“74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: bus driverI CC category: MSIAC CHARACTERISTICS FOR 74HCGND=0V; t r=t f=6ns; C L=50pFSYMBOL PARAMETERT amb (°C)UNITTEST CONDITIONS74HCV CC(V)WAVEFORMS +25−40to +85−40to +125min.typ.max.min.max.min.max.t PHL/ t PLH propagation delaynA to nY 30100125150ns 2.0Fig.6 11202530 4.5 9172126 6.0t PZH/ t PZL3-state output enable timenOE to nY 41125155190ns 2.0Fig.7 15253138 4.5 12212632 6.0t PHZ/ t PLZ3-state output disable timenOE to nY 41125155190ns 2.0Fig.7 15253138 4.5 12212632 6.0t THL/ t TLH output transition time14607590ns 2.0Fig.65121518 4.54101315 6.0DC CHARACTERISTICS FOR 74HCTFor the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.Output capability: bus driver I CC category: MSI Note to HCT typesThe value of additional quiescent supply current (∆I CC ) for a unit load of 1 is given in the family specifications.To determine ∆I CC per input, multiply this value by the unit load coefficient shown in the table below.AC CHARACTERISTICS FOR 74HCT GND =0V; t r =t f =6ns; C L =50pFINPUT UNIT LOAD COEFFICIENT nA, nOE1.00SYMBOLPARAMETERT amb (°C)UNIT TEST CONDITIONS74HCTVCC (V)WAVEFORMS+25−40to +85−40to +125min.typ.max.min.max.min.max.t PHL / t PLH propagation delay nA to nY 15253138ns 4.5Fig.6t PZH / t PZL 3-state output enable time nOE to nY 15283542ns 4.5Fig.7t PHZ / t PLZ 3-state output disable time nOE to nY 15253138ns 4.5Fig.7t THL / t TLHoutput transition time5121518ns4.5Fig.6AC WAVEFORMS(1)HC:V M= 50%; V I=GND to V CC.HCT:V M=1.3V; V I=GND to 3V.Fig.6 Waveforms showing the input (nA) to output (nY) propagation delays and the output transition times.(1)HC:V M= 50%; V I=GND to V CC.HCT:V M=1.3V; V I=GND to 3V.Fig.7 Waveforms showing the 3-state enable and disable times.PACKAGE OUTLINESSee“74HC/HCT/HCU/HCMOS Logic Package Outlines”.。
74VHC125MTC数据手册
74VHC125 — Quad Buffer with 3-STATE OutputsFeatures■ High Speed: t PD = 3.8ns (Typ.) at V CC = 5V ■ Lower power dissipation: I CC = 4 µA (Max.) at T A = 25°C■ High noise immunity: V NIH = V NIL = 28% V CC (Min.) ■ Power down protection is provided on all inputs ■ Low noise: V OLP = 0.8V (Max.)■Pin and function compatible with 74HC125General DescriptionThe VHC125 contains four independent non-inverting buffers with 3-STATE outputs. It is an advanced high-speed CMOS device fabricated with silicon gate CMOS technology and achieves the high-speed operation simi-lar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.An input protection circuit insures that 0V to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery backup. This circuit prevents device destruction due to mismatched supply and input voltages.Ordering InformationDevice also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.All packages are lead free per JEDEC: J-STD-020B standard.Order NumberPackage NumberPackage Description74VHC125M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow74VHC125SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC125MTCMTC1414-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide74VHC125 — Quad Buffer with 3-STATE OutputsPin DescriptionFunction TableH = HIGH Voltage Level L = LOW Voltage Level Z = HIGH Impedance X = ImmaterialPin NamesDescriptionA n ,B n Inputs O nOutputsInputs OutputA nB nO nL L L L H H HXZ74VHC125 — Quad Buffer with 3-STATE OutputsRecommended Operating Conditions (1)The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.Note:1.Unused inputs must be held HIGH or LOW. They may not float.V CC Supply Voltage –0.5V to +7.0V V IN DC Input Voltage –0.5V to +7.0V V OUT DC Output Voltage –0.5V to V CC + 0.5VI IK Input Diode Current –20mA I OK Output Diode Current ±20mA I OUT DC Output Current ±25mA I CC DC V CC /GND Current ±50mAT STG Storage Temperature–65°C to +150°CT LLead Temperature (Soldering, 10 seconds)260°CSymbol ParameterRatingV CC Supply Voltage 2.0V to +5.5V V IN Input Voltage 0V to +5.5V V OUT Output Voltage 0V to V CCT OPR Operating Temperature –40°C to +85°C t r , t fInput Rise and Fall Time, V CC = 3.3V ± 0.3VV CC =5.0V ± 0.5V0ns/V ∼ 100ns/V 0ns/V ∼20ns/V74VHC125 — Quad Buffer with 3-STATE OutputsNoise CharacteristicsNote:2.Parameter guaranteed by design.Voltage3.0–5.50.7 x V CC0.7 x V CCV IL LOW Level Input Voltage 2.00.500.50V3.0–5.50.3 x V CC0.3 x V CCV OHHIGH Level Output Voltage2.0V IN = V IH or V ILI OH = –50µA 1.9 2.0 1.9V 3.0 2.9 3.0 2.94.5 4.4 4.54.43.0I OH = –4mA 2.58 2.484.5I OH = –8mA3.943.80V OLLOW Level Output Voltage2.0V IN = V IH or V ILI OL = 50µA 0.00.10.1V3.00.00.10.14.50.00.10.13.0I OL = 4mA 0.360.444.5I OL = 8mA0.360.44I OZ 3-STATE Output Off-State Current 5.5V IN = V IH or V IL , V OUT = V CC or GND ±0.25±2.5µA I IN Input Leakage Current 0–5.5V IN = 5.5V or GND ±0.1±1.0µA I CCQuiescent Supply Current5.5V IN = V CC or GND4.040.0µASymbolParameterV CC (V)ConditionsT A = 25°CUnitsTyp.LimitsV OLP (2) Quiet Output Maximum Dynamic V OL5.0C L = 50pF 0.50.8V V OLV (2) Quiet Output Minimum Dynamic V OL5.0C L = 50pF –0.5–0.8V V IHD (2) Minimum HIGH Level Dynamic Input Voltage 5.0C L = 50pF 3.5V V ILD (2)Maximum HIGH Level Dynamic Input Voltage5.0C L = 50pF1.5V74VHC125 — Quad Buffer with 3-STATE OutputsNotes:3.Parameter guaranteed by design. t OSLH = |t PLHmax – t PLHmin |; t OSHL = |t PHLmax – t PHLmin |.4.C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: I CC (Opr.) = C PD • V CC • f IN + I CC / 4 (per bit).TimeC L = 50pF 8.111.5 1.013.05.0 ± 0.5C L = 15pF 3.8 5.5 1.0 6.5ns C L = 50pF5.37.5 1.08.5t PZL , t PZH3-STATE Output Enable Time3.3 ± 0.3R L = 1k ΩC L = 15pF5.48.0 1.09.5ns C L = 50pF7.911.5 1.013.05.0 ± 0.5C L = 15pF 3.6 5.1 1.0 6.0ns C L = 50pF5.17.1 1.08.0t PLZ , t PHZ3-STATE Output Disable Time3.3 ± 0.3R L = 1k ΩC L = 50pF 9.513.2 1.015.0ns 5.0 ± 0.5C L = 50pF 6.18.8 1.010.0t OSLH , t OSHL Output to OutputSkew3.3 ± 0.3(3)C L = 50pF 1.5 1.5ns 5.0 ± 0.5C L = 50pF1.01.0C IN Input Capacitance V CC = Open 41010pF C OUT Output Capacitance V CC = 5.0V6pF C PDPower Dissipation Capacitance(4)14pFFigure 1. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" NarrowNOTES:UNLESS OTHERWISE SPECIFIEDA)THIS PACKAGE CONFORMS TO JEDECMS-012,VARIATION AB,ISSUE C,B)ALL DIMENSIONS ARE IN MILLIMETERS.C)DIMENSIONS DO NOT INCLUDE MOLDFLASH OR BURRS.D)LANDPATTERN STANDARD:SOIC127P600X145-14ME)DRAWING CONFORMS TO ASME Y14.5M-1994F)DRAWING FILE NAME:M14AREV138°0°SEATING PLANEDETAIL ASCALE:20:1GAGE PLANE X 45°0.10C CSEE DETAIL A1.75MAX1.501.250.250.100.250.19(1.04)0.900.500.36R0.10R0.100.500.25Figure 2. 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm WidePackage drawings are provided as a service to customers considering Fairchild components. Drawings may change in any mannerFigure 3. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WidePackage drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.C.DIMENSIONS ARE EXCLUSIVE OF BURRS,MOLD FLASH,AND TIE BAR EXTRUSIONSF.DRAWING FILE NAME:MTC14REV6R0.09min12.00°TOP&BOTTOM1.00D.DIMENSIONING AND TOLERANCES PER ANSI Y14.5M,1982R0.09minNDPATTERN STANDARD:SOP65P640X110-14M A.CONFORMS TO JEDEC REGISTRATION MO-153,VARIATION AB,REF NOTE 6B.DIMENSIONS ARE IN MILLIMETERSsubsidiaries,and is not intended to be an exhaustive list of all such trademarks.ACEx ®Build it Now ™CorePLUS ™CROSSVOLT ™CTL™Current Transfer Logic™EcoSPARK ®EZSWITCH™*™®Fairchild®Fairchild Semiconductor ®FACT Quiet Series™FACT ®FAST ®FastvCore ™FlashWriter ®*FPS ™FRFET ®Global Power Resource SM Green FPS ™Green FPS ™e-Series ™GTO ™i-Lo ™IntelliMAX ™ISOPLANAR ™MegaBuck™MICROCOUPLER ™MicroFET ™MicroPak ™MillerDrive™Motion-SPM™OPTOLOGIC ®OPTOPLANAR ®®PDP-SPM™Power220®Power247®POWEREDGE ®Power-SPM ™PowerTrench ®Programmable Active Droop ™QFET ®QS ™QT Optoelectronics ™Quiet Series ™RapidConfigure ™SMART START ™SPM ®STEALTH™SuperFET ™SuperSOT ™-3SuperSOT ™-6SuperSOT ™-8SyncFET™®The Power Franchise ®TinyBoost ™TinyBuck ™TinyLogic ®TINYOPTO ™TinyPower ™TinyPWM ™TinyWire ™µSerDes ™UHC ®Ultra FRFET ™UniFET ™VCX ™*EZSWITCH™and FlashWriter ®are trademarks of System General Corporation,used under license by Fairchild Semiconductor.DISCLAIMERFAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY,FUNCTION,OR DESIGN.FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS,NOR THE RIGHTS OF OTHERS.THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS,SPECIFICALLY THE WARRANTY THEREIN,WHICH COVERS THESE PRODUCTS.LIFE SUPPORT POLICYFAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices or systems which,(a)are intended for surgical implant into the body or (b)support or sustain life,and (c)whose failure to perform when properly used in accordance with instructions for use provided in the labeling,can be reasonably expected to result in a significant injury of the user.2.A critical component in any component of a life support,device,or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system,or to affect its safety or effectiveness.PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status DefinitionAdvance InformationForm First Productionative or In DesignThis datasheet contains the design specifications for productdevelopment.Specifications may change in any manner without notice.PreliminaryThis datasheet contains preliminary data;supplementary data will be published at a later date.Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.74VHC125 — Quad Buffer with 3-STATE Outputs。
SN74AHCT1G125 单路总线缓冲器 线驱动器说明书
SN74AHCT1G125SINGLE BUS BUFFER GATE WITH 3ĆSTATE OUTPUTSCLS378L − AUGUST 1997 − REVISED JUNE 2005D Operating Range of 4.5 V to 5.5 V D Max t pd of 6 ns at 5 V D Low Power Consumption, 10-µA Max I CCD ±8-mA Output Drive at 5 VD Inputs Are TTL-Voltage Compatible D Latch-Up Performance Exceeds 250 mA Per JESD 1732451OE V CC Y A GND DBV PACKAGE(TOP VIEW)DCK PACKAGE(TOP VIEW)32451OEV CC YAGND 32451OE V CC Y A GND DRL PACKAGE (TOP VIEW)See mechanical drawings for dimensions.description/ordering informationThe SN74AHCT1G125 is a single bus buffer gate/line driver with 3-state output. The output is disabled whenthe output-enable (OE) input is high. When OE is low, true data is passed from the A input to the Y output.To ensure the high-impedance state during power up or power down, OE should be tied to V CC through a pullupresistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.ORDERING INFORMATIONT A PACKAGE †ORDERABLE PART NUMBER TOP-SIDE MARKING ‡Reel of 3000SN74AHCT1G125DBVR SOT (SOT-23) − DBVReel of 250SN74AHCT1G125DBVT B25_°°Reel of 3000SN74AHCT1G125DCKR −40C to 85C SOT (SC-70) − DCKReel of 250SN74AHCT1G125DCKT BM_SOT (SOT-553) − DRL Reel of 4000SN74AHCT1G125DRLR BM_†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines areavailable at /sc/package.‡The actual top-side marking has one additional character that designates the assembly/test site.FUNCTION TABLEINPUTSOUTPUT OEA Y LH H LL L H X Zlogic diagram (positive logic)A YOE124Copyright 2005, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date.Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.SN74AHCT1G125SINGLE BUS BUFFER GATEWITH 3ĆSTATE OUTPUTSCLS378L − AUGUST 1997 − REVISED JUNE 2005absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†Supply voltage range, V CC−0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Input voltage range, V I (see Note 1) −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Output voltage range, V O (see Note 1) −0.5 V to V CC+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Input clamp current, I IK(V I< 0) −20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Output clamp current, I OK(V O< 0 or V O > V CC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous output current, I O(V O= 0 to V CC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous current through V CC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Package thermal impedance, θJA (see Note 2):DBV package 206°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .DCK package 252°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .DRL package 142°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Storage temperature range, T stg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.NOTES: 1.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.2.The package thermal impedance is calculated in accordance with JESD 51-7.recommended operating conditions (see Note 3)MIN MAX UNITV CC Supply voltage 4.5 5.5VV IH High-level input voltage2VV IL Low-level input voltage0.8VV I Input voltage0 5.5VV O Output voltage0V CC VI OH High-level output current−8mAI OL Low-level output current8mA∆t/∆v Input transition rise or fall rate20ns/V T A Operating free-air temperature−4085°C NOTE 3:All unused inputs of the device must be held at V CC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)CC T A = 25°CPARAMETER TEST CONDITIONS VMIN TYP MAXMIN MAX UNITV I OH = −50 m A 4.4 4.5 4.4OH IOH = −8 mA 4.5 V3.94 3.8VV I OL = 50 m A0.10.1OL IOL = 8 mA 4.5 V0.360.44VI I V I = 5.5 V or GND0 V to 5.5 V±0.1±1m AI OZ V O = V CC or GND 5.5 V±0.25±2.5m AI CC V I = V CC or GND,I O = 0 5.5 V110m A∆I CC‡One input at 3.4 V,Other input at V CC or GND 5.5 V 1.35 1.5mAC i V I = V CC or GND 5 V41010pFC o V O = V CC or GND 5 V10pF ‡This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or V CC.SN74AHCT1G125SINGLE BUS BUFFER GATE WITH 3ĆSTATE OUTPUTSCLS378L − AUGUST 1997 − REVISED JUNE 2005switching characteristics over recommended operating free-air temperature range,V CC = 5 V ±0.5 V (unless otherwise noted) (see Figure 1)FROM TO LOAD T A = 25°C PARAMETER(INPUT)(OUTPUT)CAPACITANCE MIN TYP MAX MIN MAX UNIT t PLH3.8 5.51 6.5t PHLA Y C L = 15 pF 3.8 5.51 6.5ns t PZH3.6 5.116t PZLOE Y C L = 15 pF 3.6 5.116ns t PHZL 4.6 6.818t PLZOE Y C = 15 pF 4.6 6.818ns t PLH5.37.518.5t PHLA Y C L = 50 pF 5.37.518.5ns t PZH5.17.118t PZLOE Y C L = 50 pF 5.17.118ns t PHZL 6.18.8110t PLZ OE Y C = 50 pF 6.18.8110nsoperating characteristics, V CC = 5 V, T A = 25°CPARAMETERTEST CONDITIONS TYP UNIT C pd Power dissipation capacitance No load, f = 1 MHz 14pFSN74AHCT1G125SINGLE BUS BUFFER GATE WITH 3ĆSTATE OUTPUTSCLS378L − AUGUST 1997 − REVISED JUNE 2005PARAMETER MEASUREMENT INFORMATION50% V CC 3 V3 V 0 V0 Vt h t suVOLTAGE WAVEFORMSSETUP AND HOLD TIMESData Inputt PLH t PHL t PHL t PLH V OH V OH V OL V OL 3 V 0 V 50% V CC50% V CC Input Out-of-Phase Output In-Phase Output Timing Input 50% V CC VOLTAGE WAVEFORMSPROPAGATION DELAY TIMESINVERTING AND NONINVERTING OUTPUTS OutputControlOutput Waveform 1S1 at V CC (see Note B)OutputWaveform 2S1 at GND(see Note B)V OL V OH t PZLt PZHt PLZ t PHZ ≈V CC 0 V 50% V CCV OL + 0.3 V 50% V CC ≈0 V 3 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLINGt PLH /t PHL t PLZ /t PZLt PHZ /t PZHOpen Drain Open V CC GND V CCTEST S13 V 0 V t w VOLTAGE WAVEFORMS PULSE DURATION Input NOTES: A.C L includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics:PRR ≤ 1 MHz, Z O = 50 Ω, t r ≤3 ns, t f ≤ 3 ns.D.The outputs are measured one at a time, with one input transition per measurement.E.All parameters and waveforms are not applicable to all devices.From Output Under Test C L (see Note A)LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTSS1V CC R L = 1 k ΩGND From OutputUnder TestC L (see Note A)Test Point LOAD CIRCUIT FORTOTEM-POLE OUTPUTS OpenV OH − 0.3 V 1.5 V 1.5 V 1.5 V1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V Figure 1. Load Circuit and Voltage WaveformsPACKAGING INFORMATION(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.Addendum-Page 1(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check /productcontent for the latest availability information and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.OTHER QUALIFIED VERSIONS OF SN74AHCT1G125 :•Automotive: SN74AHCT1G125-Q1NOTE: Qualified Version Definitions:•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defectsAddendum-Page 2TAPE AND REEL INFORMATION*All dimensions are nominal Device Package Type Package DrawingPinsSPQ Reel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant SN74AHCT1G125DBVR SOT-23DBV 53000180.09.2 3.17 3.23 1.37 4.08.0Q3SN74AHCT1G125DBVR SOT-23DBV 53000178.09.2 3.3 3.2 1.55 4.08.0Q3SN74AHCT1G125DBVR SOT-23DBV 53000180.08.4 3.23 3.17 1.37 4.08.0Q3SN74AHCT1G125DBVT SOT-23DBV 5250178.09.0 3.23 3.17 1.37 4.08.0Q3SN74AHCT1G125DBVT SOT-23DBV 5250178.09.2 3.3 3.2 1.55 4.08.0Q3SN74AHCT1G125DCKR SC70DCK 53000180.09.2 2.3 2.55 1.2 4.08.0Q3SN74AHCT1G125DCKR SC70DCK 53000178.09.2 2.4 2.4 1.22 4.08.0Q3SN74AHCT1G125DCKT SC70DCK 5250178.09.0 2.4 2.5 1.2 4.08.0Q3SN74AHCT1G125DCKT SC70DCK 5250180.09.2 2.3 2.55 1.2 4.08.0Q3SN74AHCT1G125DCKT SC70DCK 5250178.09.2 2.4 2.4 1.22 4.08.0Q3SN74AHCT1G125DRLR SOTDRL 54000180.08.4 1.98 1.780.69 4.08.0Q3SN74AHCT1G125DRLR SOT DRL 54000180.09.5 1.78 1.780.69 4.08.0Q3*All dimensions are nominalDevice Package Type Package Drawing Pins SPQ Length(mm)Width(mm)Height(mm) SN74AHCT1G125DBVR SOT-23DBV53000205.0200.033.0SN74AHCT1G125DBVR SOT-23DBV53000180.0180.018.0SN74AHCT1G125DBVR SOT-23DBV53000202.0201.028.0SN74AHCT1G125DBVT SOT-23DBV5250180.0180.018.0SN74AHCT1G125DBVT SOT-23DBV5250180.0180.018.0SN74AHCT1G125DCKR SC70DCK53000205.0200.033.0SN74AHCT1G125DCKR SC70DCK53000180.0180.018.0SN74AHCT1G125DCKT SC70DCK5250180.0180.018.0SN74AHCT1G125DCKT SC70DCK5250205.0200.033.0SN74AHCT1G125DCKT SC70DCK5250180.0180.018.0SN74AHCT1G125DRLR SOT DRL54000202.0201.028.0SN74AHCT1G125DRLR SOT DRL54000184.0184.019.0IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,enhancements,improvements and other changes to its semiconductor products and services per JESD46,latest issue,and to discontinue any product or service per JESD48,latest issue.Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All semiconductor products(also referred to herein as“components”)are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its components to the specifications applicable at the time of sale,in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by applicable law,testing of all parameters of each component is not necessarily performed.TI assumes no liability for applications assistance or the design of Buyers’products.Buyers are responsible for their products and applications using TI components.To minimize the risks associated with Buyers’products and applications,Buyers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any patent right,copyright,mask work right,or other intellectual property right relating to any combination,machine,or process in which TI components or services are rmation published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI.Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.TI is not responsible or liable for such altered rmation of third parties may be subject to additional restrictions.Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.Buyer acknowledges and agrees that it is solely responsible for compliance with all legal,regulatory and safety-related requirements concerning its products,and any use of TI components in its applications,notwithstanding any applications-related information or support that may be provided by TI.Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures,monitor failures and their consequences,lessen the likelihood of failures that might cause harm and take appropriate remedial actions.Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications.In some cases,TI components may be promoted specifically to facilitate safety-related applications.With such components,TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements.Nonetheless,such components are subject to these terms.No TI components are authorized for use in FDA Class III(or similar life-critical medical equipment)unless authorized officers of the parties have executed a special agreement specifically governing such use.Only those TI components which TI has specifically designated as military grade or“enhanced plastic”are designed and intended for use in military/aerospace applications or environments.Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk,and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use.TI has specifically designated certain components as meeting ISO/TS16949requirements,mainly for automotive use.In any case of use of non-designated products,TI will not be responsible for any failure to meet ISO/TS16949.Products ApplicationsAudio /audio Automotive and Transportation /automotiveAmplifiers Communications and Telecom /communicationsData Converters Computers and Peripherals /computersDLP®Products Consumer Electronics /consumer-appsDSP Energy and Lighting /energyClocks and Timers /clocks Industrial /industrialInterface Medical /medicalLogic Security /securityPower Mgmt Space,Avionics and Defense /space-avionics-defense Microcontrollers Video and Imaging /videoRFID OMAP Applications Processors /omap TI E2E Community Wireless Connectivity /wirelessconnectivityMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2014,Texas Instruments Incorporated。
HD74HCT125中文资料
HD74HCT125/HD74HCT126Quad. Bus Buffer Gates (with 3-state outputs)DescriptionThe HD74HCT125, HD74HCT126 require the 3-state control input C to be taken high to put the output into the high impedance condition, whereas the HD74HCT125, HD74HCT126 requires the control input to be low to put the output into high impedance.Features• LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility• High Speed Operation: t pd (A to Y) = 12 ns typ (C L = 50 pF)• High Output Current: Fanout of 15 LSTTL Loads• Wide Operating Voltage: V CC = 4.5 to 5.5 V• Low Input Current: 1 µA max• Low Quiescent Supply Current: I CC (static) = 4 µA max (Ta = 25°C)Function TableInputC Output YHCT125HCT126A HD74HCT125HD74HCT126H L X Z ZL H L L LL H H H HNotes:X:IrrelevantZ:Off (High-impedance) state of a 3-state output.HD74HCT125/HD74HCT126 Pin ArrangementHD74HCT125HD74HCT1262HD74HCT125/HD74HCT1263Absolute Maximum RatingsItemSymbol Rating Unit Supply voltage range V CC –0.5 to +7.0V Input voltage V IN –0.5 to V CC + 0.5V Output voltage V OUT –0.5 to V CC + 0.5V Output currentI OUT ±35mA DC current drain per V CC , GND I CC , I GND ±75mA DC input diode current I IK ±20mA DC output diode current I OK ±20mA Power dissipation per package P T 500mW Storage temperatureTstg–65 to +150°CDC CharacteristicsTa = 25°CTa = –40 to +85°CTest Conditions Item Symbol Min Typ Max MinMax Unit V CC (V)Input voltageV IH 2.0——2.0—V 4.5 to 5.5V IL——0.8—0.8V 4.5 to 5.5Output voltageV OH 4.4—— 4.4—V4.5Vin = V IH or V IL I OH = –20 µA4.18——4.13— 4.5I OH = –6 mAV OL——0.1—0.1V 4.5Vin = V IH or V IL I OL = 20 µA——0.26—0.33 4.5I OL = 6 mAOff-state output current I OZ ——±0.5—±5.0µA 5.5Vin = V IH or V IL ,Vout = V CC or GND Input current Iin ——±0.1—±1.0µA 5.5Vin = V CC or GNDQuiescent supply currentI CC——4.0—40µA 5.5Vin = V CC or GND, Iout = 0 µAHD74HCT125/HD74HCT1264AC Characteristics (C L = 50 pF, Input t r = t f = 6 ns)Ta = 25°CTa = –40 to +85°CTest Conditions Item Symbol Min Typ Max MinMax Unit V CC (V)Propagation delay t PHL—1220—25ns4.5timet PLH —1220—25 4.5Output enable t ZL —1230—38ns 4.5timet ZH —1230—38 4.5Output disable t LZ —1530—38ns 4.5timet HZ —1530—38 4.5Output rise/fall t TLH —412—15ns 4.5timet THL —412—15 4.5Input capacitanceCin—510—10pF —Hitachi CodeJEDECEIAJWeight (reference value)DP-14ConformsConforms0.97 gUnit: mm元器件交易网Hitachi CodeJEDECEIAJWeight (reference value)FP-14DA —Conforms 0.23 g*Dimension including the plating thickness Base material dimension° – 8°Hitachi CodeJEDEC EIAJWeight (reference value)FP-14DN Conforms Conforms 0.13 g° – 8°*Pd platingHitachi CodeJEDECEIAJWeight (reference value)TTP-14D ——0.05 g*Dimension including the plating thickness Base material dimensionCautions1.Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,copyright, trademark, or other intellectual property rights for information contained in this document.Hitachi bears no responsibility for problems that may arise with third party’s rights, includingintellectual property rights, in connection with use of the information contained in this document.2.Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use.3.Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,traffic, safety equipment or medical equipment for life support.4.Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installationconditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product.5.This product is not designed to be radiation resistant.6.No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi.7.Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products.Hitachi, Ltd.Semiconductor & Integrated Circuits.Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.Hitachi Asia Pte. Ltd.16 Collyer Quay #20-00Hitachi TowerSingapore 049318Tel: 535-2100Fax: 535-1533URLNorthAmerica : http:/Europe : /hel/ecg Asia (Singapore): .sg/grp3/sicd/index.htm Asia (Taiwan): /E/Product/SICD_Frame.htm Asia (HongKong): /eng/bo/grp3/index.htm Japan : http://www.hitachi.co.jp/Sicd/indx.htmHitachi Asia Ltd.Taipei Branch Office3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105)Tel: <886> (2) 2718-3666Fax: <886> (2) 2718-8180Hitachi Asia (Hong Kong) Ltd.Group III (Electronic Components)7/F., North Tower, World Finance Centre,Harbour City, Canton Road, Tsim Sha Tsui,Kowloon, Hong Kong Tel: <852> (2) 735 9218Fax: <852> (2) 730 0281 Telex: 40815 HITEC HXHitachi Europe Ltd.Electronic Components Group.Whitebrook ParkLower Cookham Road MaidenheadBerkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000Fax: <44> (1628) 778322Hitachi Europe GmbHElectronic components Group Dornacher Stra§e 3D-85622 Feldkirchen, Munich GermanyTel: <49> (89) 9 9180-0Fax: <49> (89) 9 29 30 00Hitachi Semiconductor (America) Inc.179 East Tasman Drive,San Jose,CA 95134 Tel: <1> (408) 433-1990Fax: <1>(408) 433-0223For further information write to:。
74HC_HCT125
7. Limiting values
Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK IOK IO ICC IGND Tstg Ptot Parameter supply voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation DIP14 package SO14 and (T)SSOP14 packages
2 1 5 4 9 10 12 13
1A 1OE 2A 2OE
1Y
3 2 1
3
2Y
6
1 5
EN1
6
4 3A 3OE 4A 4OE
mna228
3Y
8
9 8 10
4Y
11
12 11 13
nA
nY
nOE
mna229 mna227
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
3 of 17
NXP Semiconductors
74HC125; 74HCT125
Quad buffer/line driver; 3-state
8. Recommended operating conditions
74HC系列芯片
7474HC4052 74HC4053 74HC4060 74HC4066 74HC4075 74HC42 74HC423A 74HC4514 74HC4538A 74HC4543 74HC51 74HC521 74HC533 74HC534 74HC540 74HC541 74HC58 74HC589 74HC594 74HC595 74HC597 74HC620 74HC623 74HC640 74HC643 74HC646 74HC648 74HC688 74HC7266 74HC73 74HC74A 74HC75 74HC76 74HC85 74HC86 74HC942 74HC943 74LS00 74LS02 74LS03 74LS04 74LS05 74LS08 74LS09 74LS10 74LS109 74LS11 74LS112 74LS113 74LS114 74LS122 74LS123 74LS125 74LS160 74LS136 74LS138 74LS139 74LS14 74HC147 74HC148 74HC149 74LS151 74LS153 74LS155 74LS156 74LS157 74LS158 74LS160A 74LS161A 74LS162A 74LS163A 74LS164 74LS168 74LS169 74LS173 74LS174 74LS175 74LS190 74LS191 74LS192 74LS193 74LS194A 74LS195A 74LS20 74LS21 74LS240 74LS244 74LS245 74LS253 74LS256 74LS257 74LS258 74LS27 74LS279 74LS28 74LS283 74LS30 74LS32 74LS352 74LS367 74LS368A 74LS373 74LS76 74LS379 74LS38 74LS390 74LS393 74LS42 74LS48 74LS49 74LS51 74LS540 74LS541 74LS74 74LS682 74LS684 74LS75 74LS83A 74LS85 74LS86 74LS90 74LS95B 74LS688 74LS136 74LS651 74LS653 74LS670 74LS73A 74、74HC、74LS系列芯片资料2006-9-22 23:06系列 电平 典型传输延迟ns 最大驱动电流(-Ioh/Lol)mA AHC CMOS 8.5 -8/8AHCT COMS/TTL 8.5 -8/8HC COMS 25 -8/8HCT COMS/TTL 25 -8/8ACT COMS/TTL 10 -24/24F TTL 6.5 -15/64ALS TTL 10 -15/64LS TTL 18 -15/24注:同型号的74系列、74HC系列、74LS系列芯片,逻辑功能上是一样的。
74HC1G14和74HCT1G14高速Si-gate CMOS非门IC数据手册说明书
1. General description74HC1G14 and 74HCT1G14 are high-speed Si-gate CMOS devices. They provide aninverting buffer function with Schmitt trigger action. These devices are capable oftransforming slowly changing input signals into sharply defined, jitter-free output signals.The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V.The HCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.The standard output currents are half of those of the 74HC14 and 74HCT14.2. Features and benefits⏹Symmetrical output impedance ⏹High noise immunity ⏹Low power dissipation⏹Balanced propagation delays⏹SOT353-1 and SOT753 package options ⏹Specified from -40 ︒C to +125 ︒C3. Applications⏹Wave and pulse shapers ⏹Astable multivibrators ⏹Monostable multivibrators4. Ordering information74HC1G14; 74HCT1G14Inverting Schmitt triggerRev. 6 — 27 December 2012Product data sheetTable 1.Ordering informationType numberPackageTemperature rangeName DescriptionVersion 74HC1G14GW -40 ︒C to +125 ︒CTSSOP5plastic thin shrink small outline package;5leads; body width 1.25mmSOT353-174HCT1G14GW 74HC1G14GV -40 ︒C to +125 ︒CSC-74Aplastic surface-mounted package; 5 leadsSOT75374HCT1G14GV5. MarkingTable 2.Marking codesType number Marking code[1]74HC1G14GW HF74HCT1G14GW TF74HC1G14GV H1474HCT1G14GV T14[1]The pin 1 indicator is located on the lower left corner of the device, below the marking code.6. Functional diagram7. Pinning information7.1Pinning7.2Pin descriptionTable 3.Pin descriptionSymbol Pin Descriptionn.c.1not connectedA2data inputGND3ground (0 V)Y4data outputV CC5supply voltage8. Functional descriptionTable 4.Function tableH = HIGH voltage level; L = LOW voltage levelInput OutputA YL HH L9. Limiting valuesTable 5.Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). [1] Symbol Parameter Conditions Min Max UnitV CC supply voltage-0.5+7.0VI IK input clamping current V I <-0.5V or V I>V CC+ 0.5V-±20mAI OK output clamping current V O<-0.5V or V O>V CC+ 0.5V-±20mAI O output current-0.5 V < V O<V CC+0.5V-±12.5mAI CC supply current-25mAI GND ground current-25-mAT stg storage temperature-65+150︒CP tot total power dissipation T amb = -40︒C to+125 ︒C[2]-200mW[1]The input and output voltage ratings may be exceeded if the input and output current ratings are observed.[2]Above 55︒C, the value of P tot derates linearly with 2.5mW/K.10. Recommended operating conditionsTable 6.Recommended operating conditionsVoltages are referenced to GND (ground = 0 V).Symbol Parameter Conditions74HC1G1474HCT1G14UnitMin Typ Max Min Typ MaxV CC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5VV I input voltage0-V CC0-V CC VV O output voltage0-V CC0-V CC VT amb ambient temperature-40+25+125-40+25+125︒C11. Static characteristicsTable 7.Static characteristicsVoltages are referenced to GND (ground = 0 V). All typical values are measured at T amb=25︒C.Symbol Parameter Conditions-40︒C to+85 ︒C-40︒C to+125 ︒C UnitMin Typ Max Min MaxFor type 74HC1G14V OH HIGH-level outputvoltage V I= V T+ or V T-I O= -20μA; V CC=2.0V 1.9 2.0- 1.9-V I O= -20μA; V CC=4.5V 4.4 4.5- 4.4-V I O= -20μA; V CC=6.0V 5.9 6.0- 5.9-V I O= -2.0mA; V CC=4.5V 4.13 4.32- 3.7-V I O= -2.6mA; V CC=6.0V 5.63 5.81- 5.2-VV OL LOW-level outputvoltage V I= V T+ or V T-I O= 20μA; V CC=2.0V-00.1-0.1V I O= 20μA; V CC=4.5V-00.1-0.1V I O= 20μA; V CC=6.0V-00.1-0.1V I O= 2.0mA; V CC=4.5V-0.150.33-0.4V I O= 2.6mA; V CC=6.0V-0.160.33-0.4VI I input leakage current V I=V CC or GND; V CC=6.0V-- 1.0- 1.0μA I CC supply current V I=V CC or GND; I O=0A;V CC=6.0V--10-20μA C I input capacitance- 1.5---pFV T+positive-goingthreshold voltage see Figure7 and Figure8V CC=2.0 V0.7 1.09 1.50.7 1.5V V CC=4.5 V 1.7 2.36 3.15 1.7 3.15V V CC=6.0 V 2.1 3.12 4.2 2.1 4.2VV T-negative-goingthreshold voltage see Figure7 and Figure8V CC=2.0 V0.30.600.90.30.9V V CC=4.5 V0.9 1.53 2.00.9 2.0V V CC=6.0 V 1.2 2.08 2.6 1.2 2.6VV H hysteresis voltage see Figure7 and Figure8V CC=2.0 V0.20.48 1.00.2 1.0VV CC=4.5 V0.40.83 1.40.4 1.4VV CC=6.0 V0.6 1.04 1.60.6 1.6V For type 74HCT1G14V OH HIGH-level outputvoltage V I= V T+ or V T-I O= -20μA; V CC=4.5V 4.4 4.5- 4.4-V I O= -2.0mA; V CC=4.5V 4.13 4.32- 3.7-VV OL LOW-level outputvoltage V I= V T+ or V T-I O= 20μA; V CC=4.5V-00.1-0.1V I O= 2.0mA; V CC=4.5V-0.150.33-0.4VI I input leakage current V I=V CC or GND; V CC=5.5V-- 1.0- 1.0μA12. Dynamic characteristics[1]t pd is the same as t PLH and t PHL .[2]C PD is used to determine the dynamic power dissipation P D (μW).P D =C PD ⨯V CC 2⨯f i +∑(C L ⨯V CC 2⨯f o )where:f i =input frequency in MHz; f o =output frequency in MHz C L =output load capacitance in pF; V CC =supply voltage in Volts ∑(C L ⨯V CC 2⨯f o ) = sum of outputsI CC supply current V I =V CC or GND; I O =0A; V CC =5.5V--10-20μA ∆I CC additional supply currentper input; V CC =4.5V to 5.5V; V I = V CC - 2.1 V; I O =0A--500-850μA C I input capacitance - 1.5---pF V T+positive-going threshold voltagesee Figure 7 and Figure 8V CC =4.5 V 1.2 1.55 1.9 1.2 1.9V V CC =5.5 V1.41.802.11.42.1VV T -negative-going threshold voltagesee Figure 7 and Figure 8V CC =4.5 V 0.50.76 1.20.5 1.2V V CC =5.5 V0.60.901.40.61.4VV Hhysteresis voltagesee Figure 7 and Figure 8V CC =4.5 V 0.40.80-0.4-V V CC =5.5 V0.40.90-0.4-VTable 7.Static characteristics …continuedVoltages are referenced to GND (ground = 0 V). All typical values are measured at T amb =25︒C.Symbol Parameter Conditions-40︒C to +85 ︒C -40︒C to +125 ︒C UnitMin Typ Max Min Max Table 8.Dynamic characteristicsGND = 0 V; t r = t f ≤ 6.0 ns; All typical values are measured at T amb =25︒C. For test circuit see Figure 6Symbol Parameter Conditions -40︒C to +85 ︒C -40︒C to +125 ︒C Unit MinTyp MaxMinMaxFor type 74HC1G14t pdpropagation delay A to Y; see Figure 5[1]V CC = 2.0 V; C L =50pF -25155-190ns V CC = 4.5 V; C L =50pF -1231-38ns V CC = 5.0 V; C L =15pF -10---ns V CC = 6.0 V; C L =50pF-1126-32ns C PDpower dissipation capacitanceV I =GND to V CC [2]-20---pFFor type 74HCT1G14t pdpropagation delay A to Y; see Figure 5[1]V CC = 4.5 V; C L =50pF -1743-51ns V CC = 5.0 V; C L =15pF-15---ns C PDpower dissipation capacitanceV I =GND to V CC -1.5V [2]-22---pF13. WaveformsTable 9.Measurement pointsType number Input OutputV I V M V M74HC1G14GND to V CC0.5 ⨯ V CC0.5 ⨯ V CC 74HCT1G14GND to 3.0 V 1.5 V0.5 ⨯ V CC14. Transfer characteristics waveforms15. Application informationThe slow input rise and fall times cause additional power dissipation, this can becalculated using the following formula:P add=f i⨯(t r⨯∆I CC(AV)+t f⨯∆I CC(AV))⨯V CCWhere:P add=additional power dissipation (μW)f i=input frequency (MHz)t r=rise time (ns); 10% to 90%t f=fall time (ns); 90% to 10%∆I CC(AV)=average additional supply current (μA)∆I CC(AV) differs with positive or negative input transitions, as shown in Figure14 and Figure15.74HC1G14 and 74HCT1G14 used in relaxation oscillator circuit, see Figure16. Remark: All values given are typical unless otherwise specified.16. Package outlineTSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1Fig 18.Package outline SOT353-1 (TSSOP5)Plastic surface-mounted package; 5 leads SOT753Fig 19.Package outline SOT753 (SC-74A)17. Abbreviations18. Revision historyTable 10.AbbreviationsAcronym Description DUT Device Under Test TTLTransistor-Transistor LogicTable 11.Revision historyDocument ID Release date Data sheet status Change notice Supersedes 74HC_HCT1G14 v.620121227Product data sheet -74HC_HCT1G14 v.5Modifications:•Table 3: Pin number Y output changed from 5 to 4 (errata).74HC_HCT1G14 v.520120924Product data sheet-74HC_HCT1G14 v.4Modifications:•Figure 17 added (typical K-factor for relaxation oscillator).•Legal page updated.74HC_HCT1G14 v.420070717Product data sheet -74HC_HCT1G14 v.374HC_HCT1G14 v.320020515Product specification -74HC_HCT1G14 v.274HC_HCT1G14 v.220010302Product specification -74HC_HCT1G14 v.174HC_HCT1G14 v.119980805Product specification--19. Legal information19.1 Data sheet status[1]Please consult the most recently issued document before initiating or completing a design.[2]The term ‘short data sheet’ is explained in section “Definitions”.[3]The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product statusinformation is available on the Internet at URL .19.2 DefinitionsDraft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give anyrepresentations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia salesoffice. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia andcustomer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product isdeemed to offer functions and qualities beyond those described in the Product data sheet.19.3 DisclaimersLimited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes noresponsibility for the content in this document if provided by an information source outside of Nexperia.In no event shall Nexperia be liable for any indirect, incidental,punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia.Right to make changes — Nexperia reserves the right to makechanges to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.Suitability for use — Nexperia products are not designed,authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of a Nexperia product can reasonably be expectedto result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability forinclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperiaaccepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications andproducts planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.Nexperia does not accept any liability related to any default,damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications andthe products or of the application or use by customer’s third partycustomer(s). Nexperia does not accept any liability in this respect.Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.Terms and conditions of commercial sale — Nexperiaproducts are sold subject to the general terms and conditions of commercial sale, as published at /profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects toapplying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer.No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.Document status[1][2]Product status[3]DefinitionObjective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.Product [short] data sheet Production This document contains the product specification.Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities.Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified,the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use ofnon-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of theproduct for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’sown risk, and (c) customer fully indemnifies Nexperia for anyliability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’sstandard warranty and Nexperia’s product specifications.Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.19.4 TrademarksNotice: All referenced brands, product names, service names and trademarks are the property of their respective owners.20. Contact informationFor more information, please visit: For sales office addresses, please send an email to: ***************************21. Contents1 General description. . . . . . . . . . . . . . . . . . . . . . 12 Features and benefits . . . . . . . . . . . . . . . . . . . . 13 Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Ordering information. . . . . . . . . . . . . . . . . . . . . 15 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 27 Pinning information. . . . . . . . . . . . . . . . . . . . . . 27.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 28 Functional description . . . . . . . . . . . . . . . . . . . 39 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 310 Recommended operating conditions. . . . . . . . 311 Static characteristics. . . . . . . . . . . . . . . . . . . . . 412 Dynamic characteristics . . . . . . . . . . . . . . . . . . 513 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 614 Transfer characteristics waveforms. . . . . . . . . 715 Application information. . . . . . . . . . . . . . . . . . . 816 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 1117 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 1318 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 1319 Legal information. . . . . . . . . . . . . . . . . . . . . . . 1419.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 1419.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1419.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 1419.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 1520 Contact information. . . . . . . . . . . . . . . . . . . . . 1521 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16© Nexperia B.V. 2017. All rights reserved For more information, please visit: Forsalesofficeaddresses,pleasesendanemailto:*************************** Date of release:Mouser ElectronicsAuthorized DistributorClick to View Pricing, Inventory, Delivery & Lifecycle Information:N experia:74HC1G14GV,12574HC1G14GW,12574HC1G14GW,16574HCT1G14GV,12574HCT1G14GW,125。
74系列芯片功能大全
74系列芯片功能大全7400 TTL 2输入端四与非门7401 TTL 集电极开路2输入端四与非门7402 TTL 2输入端四或非门7403 TTL 集电极开路2输入端四与非门7404 TTL 六反相器7405 TTL 集电极开路六反相器7406 TTL 集电极开路六反相高压驱动器7407 TTL 集电极开路六正相高压驱动器7408 TTL 2输入端四与门7409 TTL 集电极开路2输入端四与门7410 TTL 3输入端3与非门74107 TTL 带清除主从双J-K触发器74109 TTL 带预置清除正触发双J-K触发器7411 TTL 3输入端3与门74112 TTL 带预置清除负触发双J-K触发器7412 TTL 开路输出3输入端三与非门74121 TTL 单稳态多谐振荡器74122 TTL 可再触发单稳态多谐振荡器74123 TTL 双可再触发单稳态多谐振荡器74125 TTL 三态输出高有效四总线缓冲门74126 TTL 三态输出低有效四总线缓冲门7413 TTL 4输入端双与非施密特触发器74132 TTL 2输入端四与非施密特触发器74133 TTL 13输入端与非门74136 TTL 四异或门74138 TTL 3-8线译码器/复工器74139 TTL 双2-4线译码器/复工器7414 TTL 六反相施密特触发器74145 TTL BCD—十进制译码/驱动器7415 TTL 开路输出3输入端三与门74150 TTL 16选1数据选择/多路开关74151 TTL 8选1数据选择器74153 TTL 双4选1数据选择器74154 TTL 4线—16线译码器74155 TTL 图腾柱输出译码器/分配器74156 TTL 开路输出译码器/分配器74157 TTL 同相输出四2选1数据选择器74158 TTL 反相输出四2选1数据选择器7416 TTL 开路输出六反相缓冲/驱动器74160 TTL 可预置BCD异步清除计数器74161 TTL 可予制四位二进制异步清除计数器74162 TTL 可预置BCD同步清除计数器74163 TTL 可予制四位二进制同步清除计数器74164 TTL 八位串行入/并行输出移位寄存器74165 TTL 八位并行入/串行输出移位寄存器74166 TTL 八位并入/串出移位寄存器74169 TTL 二进制四位加/减同步计数器7417 TTL 开路输出六同相缓冲/驱动器74170 TTL 开路输出4×4寄存器堆74173 TTL 三态输出四位D型寄存器74174 TTL 带公共时钟和复位六D触发器74175 TTL 带公共时钟和复位四D触发器74180 TTL 9位奇数/偶数发生器/校验器74181 TTL 算术逻辑单元/函数发生器74185 TTL 二进制—BCD代码转换器74190 TTL BCD同步加/减计数器74191 TTL 二进制同步可逆计数器74192 TTL 可预置BCD双时钟可逆计数器74193 TTL 可预置四位二进制双时钟可逆计数器74194 TTL 四位双向通用移位寄存器74195 TTL 四位并行通道移位寄存器74196 TTL 十进制/二-十进制可预置计数锁存器74197 TTL 二进制可预置锁存器/计数器7420 TTL 4输入端双与非门7421 TTL 4输入端双与门7422 TTL 开路输出4输入端双与非门74221 TTL 双/单稳态多谐振荡器74240 TTL 八反相三态缓冲器/线驱动器74241 TTL 八同相三态缓冲器/线驱动器74243 TTL 四同相三态总线收发器74244 TTL 八同相三态缓冲器/线驱动器74245 TTL 八同相三态总线收发器74247 TTL BCD—7段15V输出译码/驱动器74248 TTL BCD—7段译码/升压输出驱动器74249 TTL BCD—7段译码/开路输出驱动器74251 TTL 三态输出8选1数据选择器/复工器74253 TTL 三态输出双4选1数据选择器/复工器74256 TTL 双四位可寻址锁存器74257 TTL 三态原码四2选1数据选择器/复工器74258 TTL 三态反码四2选1数据选择器/复工器74259 TTL 八位可寻址锁存器/3-8线译码器7426 TTL 2输入端高压接口四与非门74260 TTL 5输入端双或非门74266 TTL 2输入端四异或非门7427 TTL 3输入端三或非门74273 TTL 带公共时钟复位八D触发器74279 TTL 四图腾柱输出S-R锁存器7428 TTL 2输入端四或非门缓冲器74283 TTL 4位二进制全加器74290 TTL 二/五分频十进制计数器74293 TTL 二/八分频四位二进制计数器74295 TTL 四位双向通用移位寄存器74298 TTL 四2输入多路带存贮开关74299 TTL 三态输出八位通用移位寄存器7430 TTL 8输入端与非门7432 TTL 2输入端四或门74322 TTL 带符号扩展端八位移位寄存器74323 TTL 三态输出八位双向移位/存贮寄存器7433 TTL 开路输出2输入端四或非缓冲器74347 TTL BCD—7段译码器/驱动器74352 TTL 双4选1数据选择器/复工器74353 TTL 三态输出双4选1数据选择器/复工器74365 TTL 门使能输入三态输出六同相线驱动器74365 TTL 门使能输入三态输出六同相线驱动器74366 TTL 门使能输入三态输出六反相线驱动器74367 TTL 4/2线使能输入三态六同相线驱动器74368 TTL 4/2线使能输入三态六反相线驱动器7437 TTL 开路输出2输入端四与非缓冲器74373 TTL 三态同相八D锁存器74374 TTL 三态反相八D锁存器74375 TTL 4位双稳态锁存器74377 TTL 单边输出公共使能八D锁存器74378 TTL 单边输出公共使能六D锁存器74379 TTL 双边输出公共使能四D锁存器7438 TTL 开路输出2输入端四与非缓冲器74380 TTL 多功能八进制寄存器7439 TTL 开路输出2输入端四与非缓冲器74390 TTL 双十进制计数器74393 TTL 双四位二进制计数器7440 TTL 4输入端双与非缓冲器7442 TTL BCD—十进制代码转换器74352 TTL 双4选1数据选择器/复工器74353 TTL 三态输出双4选1数据选择器/复工器74365 TTL 门使能输入三态输出六同相线驱动器74366 TTL 门使能输入三态输出六反相线驱动器74367 TTL 4/2线使能输入三态六同相线驱动器74368 TTL 4/2线使能输入三态六反相线驱动器7437 TTL 开路输出2输入端四与非缓冲器74373 TTL 三态同相八D锁存器74374 TTL 三态反相八D锁存器74375 TTL 4位双稳态锁存器74377 TTL 单边输出公共使能八D锁存器74378 TTL 单边输出公共使能六D锁存器74379 TTL 双边输出公共使能四D锁存器7438 TTL 开路输出2输入端四与非缓冲器74380 TTL 多功能八进制寄存器7439 TTL 开路输出2输入端四与非缓冲器74390 TTL 双十进制计数器74393 TTL 双四位二进制计数器7440 TTL 4输入端双与非缓冲器7442 TTL BCD—十进制代码转换器74447 TTL BCD—7段译码器/驱动器7445 TTL BCD—十进制代码转换/驱动器74450 TTL 16:1多路转接复用器多工器74451 TTL 双8:1多路转接复用器多工器74453 TTL 四4:1多路转接复用器多工器7446 TTL BCD—7段低有效译码/驱动器74460 TTL 十位比较器74461 TTL 八进制计数器74465 TTL 三态同相2与使能端八总线缓冲器74466 TTL 三态反相2与使能八总线缓冲器74467 TTL 三态同相2使能端八总线缓冲器74468 TTL 三态反相2使能端八总线缓冲器74469 TTL 八位双向计数器7447 TTL BCD—7段高有效译码/驱动7448 TTL BCD—7段译码器/内部上拉输出驱动74490 TTL 双十进制计数器74491 TTL 十位计数器74498 TTL 八进制移位寄存器7450 TTL 2-3/2-2输入端双与或非门74502 TTL 八位逐次逼近寄存器74503 TTL 八位逐次逼近寄存器7451 TTL 2-3/2-2输入端双与或非门74533 TTL 三态反相八D锁存器74534 TTL 三态反相八D锁存器7454 TTL 四路输入与或非门74540 TTL 八位三态反相输出总线缓冲器7455 TTL 4输入端二路输入与或非门74563 TTL 八位三态反相输出触发器74564 TTL 八位三态反相输出D触发器74573 TTL 八位三态输出触发器74574 TTL 八位三态输出D触发器74645 TTL 三态输出八同相总线传送接收器74670 TTL 三态输出4×4寄存器堆7473 TTL 带清除负触发双J-K触发器7474 TTL 带置位复位正触发双D触发器7476 TTL 带预置清除双J-K触发器7483 TTL 四位二进制快速进位全加器7485 TTL 四位数字比较器7486 TTL 2输入端四异或门7490 TTL 可二/五分频十进制计数器7493 TTL 可二/八分频二进制计数器7495 TTL 四位并行输入\\输出移位寄存器7497 TTL 6位同步二进制乘法器SN74LSOO 四2输入与非门SN74LSO2 四2输入与非门SN74LS04 六反相器SN74LS06 六反相缓冲器/驱动器SN74LS08 四2输入与非门SN74LS10 三3输入与非门SN74LS12 三3输入与非门SN74LS14 六反相器.斯密特触发SN74LS16 六反相缓冲器/触发器SN74LS20 双4输入与门SN74LS22 双4输入与门SN74LS26 四2输入与非门SN74LS28 四输入端或非缓冲器SN74LS32 四2输入或门SN74LS37 四输入端与非缓冲器SN74LS40 四输入端与非缓冲器SN74LS47 BCD-七段译码驱动器SN74LS49 BCD-七段译码驱动器SN74LS54 四输入与或非门SN74LS63 六电流读出接口门SN74LS74 双D触发器SN74LS76 双J-K触发器SN74LS83 双J-K触发器SN74LS86 四2输入异或门SN74LS90 4位十进制波动计数器SN74LS92 12分频计数器SN74LS96 5位移位寄存器SN74LS109 正沿触发双J-K触发器SN74LS113 双J-K负沿触发器SN74LS121 单稳态多谐振荡器SN74LS123 双稳态多谐振荡器SN74LS125 三态缓冲器SN74LS131 3-8线译码器SN74LS133 13输入与非门SN74LS137 地址锁存3-8线译码器SN74LS139 双2-4线译码-转换器SN74LS147 10-4线优先编码器SN74LS153 双4选1数据选择器SN74LS155 双2-4线多路分配器SN74LS157 四2选1数据选择器SN74LS160 同步BDC十进制计数器SN74LS162 同步BDC十进制计数器SN74LS164 8位串入并出移位寄存SN74LS166 8位移位寄存器SN74LS169 4位可逆同步计数器SN74LS172 16位多通道寄存器堆SN74LS174 6D型触发器SN74LS176 可预置十进制计数器SN74LS182 超前进位发生器SN74LS189 64位随机存储器SN74LS191 二进制同步可逆计数器SN74LS193 二进制可逆计数器SN74LS195 并行存取移位寄存器SN74LS197 可预置二进制计数器SN74LS238 3-8线译码/多路转换器SN74LS241 八缓冲/驱动/接收器SN74LS243 四总线收发器SN74LS245 八总线收发器SN74LS248 BCD-七段译码驱动器SN74LS251 三态8-1数据选择器SN74LS256 双四位选址锁存器SN74LS258 四2选1数据选择器SN74LS260 双5输入或非门SN74LS266 四2输入异或非门SN74LS275 七位树型乘法器SN74LS279 四R-S触发器SN74LS283 4位二进制全加器SN74LS293 4位二进制计数器SN74LS365 六缓冲器带公用启动器SN74LS367 六总线三态输出缓冲器SN74LS373 8D锁存器SN74LS375 4位双稳锁存器SN74LS386 四2输入异或门SN74LS393 双4位二进制计数器SN74LS574 8位D型触发器SN74LS684 8位数字比较器SN74LSO1 四2输入与非门SN74LS03 四2输入与非门SN74LS05 六反相器SN74LS07 六缓冲器/驱动器SN74LS09 四2输入与非门SN74LS11 三3输入与非门SN74LS13 三3输入与非门SN74LS15 三3输入与非门SN74LS17 六反相缓冲器/驱动器SN74LS21 双4输入与门SN74LS25 双4输入与门SN74LS27 三3输入与非门SN74LS30 八输入端与非门SN74LS33 四2输入或门SN74LS38 双2输入与非缓冲器SN74LS42 BCD-十进制译码器SN74LS48 BCD-七段译码驱动器SN74LS51 三3输入双与或非门SN74LS55 四4输入与或非门SN74LS73 双J-K触发器SN74LS75 4位双稳锁存器SN74LS78 双J-K触发器SN74LS85 4位幅度比较器SN74LS88 4位全加器SN74LS91 8位移位寄存器SN74LS93 二进制计数器SN74LS95 4位并入并出寄存器SN74LS107 双J-K触发器SN74LS112 双J-K负沿触发器SN74LS114 双J-K负沿触发器SN74LS122 单稳态多谐振荡器SN74LS124 双压控振荡器SN74LS126 四3态总线缓冲器SN74LS132 二输入与非触发器SN74LS136 四异或门SN74LS138 3-8线译码/转换器SN74LS145 BCD十进制译码/驱动器SN74LS148 8-3线优先编码器SN74LS151 8选1数据选择器SN74LS154 4-16线多路分配器SN74LS156 双2-4线多路分配器SN74LS158 四2选1数据选择器SN74LS161 4位二进制计数器SN74LS163 4位二进制计数器SN74LS165 8位移位寄存器SN74LS168 4位可逆同步计数器SN74LS170 4x4位寄存器堆SN74LS173 4D型寄存器SN74LS175 4D烯触发器SN74LS181 运算器/函数发生器SN74LS183 双进位保存全价器SN74LS190 同步BCD十进制计数器SN74LS192 BCD-同步可逆计数器SN74LS194 双向通用移位寄存器SN74LS196 可预置十进制计数器SN74LS221 双单稳态多谐振荡器SN74LS240 八缓冲/驱动/接收器SN74LS242 四总线收发器SN74LS244 八缓冲/驱动/接收器SN74LS247 BCD-七段译码驱动器SN74LS249 BCD-七段译码驱动器SN74LS253 双三态4-1数据选择器SN74LS257 四3态2-1数据选择器SN74LS259 8位可寻址锁存器SN74LS261 2x4位二进制乘发器SN74LS273 八进制D型触发器SN74LS276 四J-K触发器SN74LS280 9位奇偶数发生校检器SN74LS290 十进制计数器SN74LS295 4位双向通用移位寄存器SN74LS366 六缓冲器带公用启动器SN74LS368 六总线三态输出反相器SN74LS374 8D触发器SN74LS377 8位单输出D型触发器SN74LS390 双十进制计数器SN74LS573 8位三态输出D型锁存器SN74LS670 8位数字比较器SN74HC00 四2输入与非门SN74HC02 四2输入或非门SN74HC03 四2输入或非门SN74HC04 六反相器SN74HC05 六反相器SN74HC08 四2输入与门SN74HC10 三3输入与非门SN74HC11 三3输入与门SN74HC14 六反相器/斯密特触发器SN74HC20 双四输入与门SN74HC21 双四输入与非门SN74HC27 三3输入与非门SN74HC30 八输入端与非门SN74HC32 四2输入或门SN74HC42 BCD十进制译码器SN74HC73 双J-K触发器SN74HC74 双D型触发器SN74HC76 双J-K触发器SN74HC86 四2输入异或门SN74HC107 双J-K触发器SN74HC113 双J-K负沿触发器SN74HC123 双稳态多谐振荡器SN74HC125 三态缓冲器SN74HC126 四三态总线缓冲器SN74HC132 二输入与非缓冲器SN74HC137 二输入与非缓冲器SN74HC138 3-8线译码/解调器SN74HC139 双2-4线译码/解调器SN74HC148 8选1数据选择器SN74HC151 双4选1数据选择器SN74HC154 4-16线多路分配器SN74HC157 四2选1数据选择器SN74HC161 4位二进制计数器SN74HC163 4位二进制计数器SN74HC164 8位串入并出移位寄存器SN74HC165 8位移位寄存器SN74HC173 4D型触发器SN74HC174 6D触发器SN74HC175 4D型触发器SN74HC191 二进制同步可逆计数器SN74HC221 双单稳态多谐振荡器SN74HC238 3-8线译码器SN74HC240 八缓冲器SN74HC244 八总线3态输出缓冲器SN74HC245 八总线收发器SN74HC251 三态8-1数据选择器SN74HC259 8位可寻址锁存器SN74HC266 四2输入异或非门SN74HC273 8D型触发器SN74HC367 六缓冲器/总线驱动器SN74HC368 六缓冲器/总线驱动器SN74HC373 8D锁存器SN74HC374 8D触发器SN74HC393 双4位二进制计数器SN74HC541 8位三态输出缓冲器SN74HC573 8位三态输出D型锁存器SN74HC574 8D型触发器SN74HC595 8位移位寄存器/锁存器SN74HC4028 7级二进制串行加数器SN74HC4046 锁相环SN74HC4050 六同相缓冲器SN74HC4051 8选1模拟开关SN74HC4053 三2选1模拟开关SN74HC4060 14位计数/分频/振荡器SN74HC4066 四双相模拟开关SN74HC4078 3输入端三或门SN74HC4511 7段锁存/译码驱动器SN74HC4520 双二进制加法计数器?>74F00 高速四2输入与非门74F02 高速四2输入或非门74F04 高速六反相器74F08 高速四2输入与门74F10 高速三3输入与门74F14 高速六反相斯密特触发74F32 高速四2输入或门74F38 高速四2输入或门74F74 高速双D型触发器74F86 高速四2输入异或门74F139 高速双2-4线译码/驱动器74F151 高速双2-4线译码/驱动器74F153 高速双4选1数据选择器74F157 高速双4选1数据选择器74F161 高速6D型触发器74F174 高速6D型触发器74F175 高速4D型触发器74F244 高速八总线3态缓冲器74F245 高速八总线收发器74F373 高速8D锁存器SN74HCT04 六反相器?>74ls00 2输入四与非门74ls01 2输入四与非门(oc)74ls02 2输入四或非门74ls03 2输入四与非门(oc)74ls04 六倒相器74ls05 六倒相器(oc)74ls06 六高压输出反相缓冲器/驱动器(oc,30v) 74ls07 六高压输出缓冲器/驱动器(oc,30v)74ls08 2输入四与门74ls09 2输入四与门(oc)74ls10 3输入三与非门74ls11 3输入三与门74ls12 3输入三与非门(oc)74ls13 4输入双与非门(斯密特触发)74ls14 六倒相器(斯密特触发)74ls15 3输入三与门(oc)74ls16 六高压输出反相缓冲器/驱动器(oc,15v) 74ls17 六高压输出缓冲器/驱动器(oc,15v)74ls18 4输入双与非门(斯密特触发)74ls19 六倒相器(斯密特触发)74ls20 4输入双与非门74ls21 4输入双与门74ls22 4输入双与非门(oc)74ls23 双可扩展的输入或非门74ls24 2输入四与非门(斯密特触发)74ls25 4输入双或非门(有选通)74ls26 2输入四高电平接口与非缓冲器(oc,15v) 74ls27 3输入三或非门74ls28 2输入四或非缓冲器74ls30 8输入与非门74ls31 延迟电路74ls32 2输入四或门74ls33 2输入四或非缓冲器(集电极开路输出) 74ls34 六缓冲器74ls35 六缓冲器(oc)74ls36 2输入四或非门(有选通)74ls37 2输入四与非缓冲器74ls38 2输入四或非缓冲器(集电极开路输出) 74ls39 2输入四或非缓冲器(集电极开路输出) 74ls40 4输入双与非缓冲器74ls41 bcd-十进制计数器74ls42 4线-10线译码器(bcd输入)74ls43 4线-10线译码器(余3码输入)74ls44 4线-10线译码器(余3葛莱码输入) 74ls45 bcd-十进制译码器/驱动器74ls46 bcd-七段译码器/驱动器74ls47 bcd-七段译码器/驱动器74ls48 bcd-七段译码器/驱动器74ls49 bcd-七段译码器/驱动器(oc)74ls50 双二路2-2输入与或非门(一门可扩展) 74ls51 双二路2-2输入与或非门74ls51 二路3-3输入,二路2-2输入与或非门74ls52 四路2-3-2-2输入与或门(可扩展)74ls53 四路2-2-2-2输入与或非门(可扩展) 74ls53 四路2-2-3-2输入与或非门(可扩展) 74ls54 四路2-2-2-2输入与或非门74ls54 四路2-3-3-2输入与或非门74ls54 四路2-2-3-2输入与或非门74ls55 二路4-4输入与或非门(可扩展)74ls60 双四输入与扩展74ls61 三3输入与扩展74ls62 四路2-3-3-2输入与或扩展器74ls63 六电流读出接口门74ls64 四路4-2-3-2输入与或非门74ls65 四路4-2-3-2输入与或非门(oc)74ls70 与门输入上升沿jk触发器74ls71 与输入r-s主从触发器74ls72 与门输入主从jk触发器74ls73 双j-k触发器(带清除端)74ls74 正沿触发双d型触发器(带预置端和清除端)74ls75 4位双稳锁存器74ls76 双j-k触发器(带预置端和清除端)74ls77 4位双稳态锁存器74ls78 双j-k触发器(带预置端,公共清除端和公共时钟端) 74ls80 门控全加器74ls81 16位随机存取存储器74ls82 2位二进制全加器(快速进位)74ls83 4位二进制全加器(快速进位)74ls84 16位随机存取存储器74ls85 4位数字比较器74ls86 2输入四异或门74ls87 四位二进制原码/反码/oi单元74ls89 64位读/写存储器74ls90 十进制计数器74ls91 八位移位寄存器74ls92 12分频计数器(2分频和6分频)74ls93 4位二进制计数器74ls94 4位移位寄存器(异步)74ls95 4位移位寄存器(并行io)74ls96 5位移位寄存器74ls97 六位同步二进制比率乘法器74ls100 八位双稳锁存器74ls103 负沿触发双j-k主从触发器(带清除端)74ls106 负沿触发双j-k主从触发器(带预置,清除,时钟) 74ls107 双j-k主从触发器(带清除端)74ls108 双j-k主从触发器(带预置,清除,时钟)74ls109 双j-k触发器(带置位,清除,正触发)74ls110 与门输入j-k主从触发器(带锁定)74ls111 双j-k主从触发器(带数据锁定)74ls112 负沿触发双j-k触发器(带预置端和清除端) 74ls113 负沿触发双j-k触发器(带预置端)74ls114 双j-k触发器(带预置端,共清除端和时钟端)74ls116 双四位锁存器74ls120 双脉冲同步器/驱动器74ls121 单稳态触发器(施密特触发)74ls122 可再触发单稳态多谐振荡器(带清除端) 74ls123 可再触发双单稳多谐振荡器74ls125 四总线缓冲门(三态输出)74ls126 四总线缓冲门(三态输出)74ls128 2输入四或非线驱动器74ls131 3-8译码器74ls132 2输入四与非门(斯密特触发)74ls133 13输入端与非门74ls134 12输入端与门(三态输出)74ls135 四异或/异或非门74ls136 2输入四异或门(oc)74ls137 八选1锁存译码器/多路转换器74ls138 3-8线译码器/多路转换器74ls139 双2-4线译码器/多路转换器74ls140 双4输入与非线驱动器74ls141 bcd-十进制译码器/驱动器74ls142 计数器/锁存器/译码器/驱动器74ls145 4-10译码器/驱动器74ls147 10线-4线优先编码器74ls148 8线-3线八进制优先编码器74ls150 16选1数据选择器(反补输出)74ls151 8选1数据选择器(互补输出)74ls152 8选1数据选择器多路开关74ls153 双4选1数据选择器/多路选择器74ls154 4线-16线译码器74ls155 双2-4译码器/分配器(图腾柱输出)74ls156 双2-4译码器/分配器(集电极开路输出) 74ls157 四2选1数据选择器/多路选择器74ls158 四2选1数据选择器(反相输出)74ls160 可预置bcd计数器(异步清除)74ls161 可预置四位二进制计数器(并清除异步) 74ls162 可预置bcd计数器(异步清除)74ls163 可预置四位二进制计数器(并清除异步) 74ls164 8位并行输出串行移位寄存器74ls165 并行输入8位移位寄存器(补码输出)74ls166 8位移位寄存器74ls167 同步十进制比率乘法器74ls168 4位加/减同步计数器(十进制)74ls169 同步二进制可逆计数器74ls170 4*4寄存器堆74ls171 四d触发器(带清除端)74ls172 16位寄存器堆74ls173 4位d型寄存器(带清除端)74ls174 六d触发器74ls175 四d触发器74ls176 十进制可预置计数器74ls177 2-8-16进制可预置计数器74ls178 四位通用移位寄存器74ls179 四位通用移位寄存器74ls180 九位奇偶产生/校验器74ls181 算术逻辑单元/功能发生器74ls182 先行进位发生器74ls183 双保留进位全加器74ls184 bcd-二进制转换器74ls185 二进制-bcd转换器74ls190 同步可逆计数器(bcd,二进制) 74ls191 同步可逆计数器(bcd,二进制) 74ls192 同步可逆计数器(bcd,二进制) 74ls193 同步可逆计数器(bcd,二进制) 74ls194 四位双向通用移位寄存器74ls195 四位通用移位寄存器74ls196 可预置计数器/锁存器74ls197 可预置计数器/锁存器(二进制)74ls198 八位双向移位寄存器74ls199 八位移位寄存器74ls210 2-5-10进制计数器74ls213 2-n-10可变进制计数器74ls221 双单稳触发器74ls230 八3态总线驱动器74ls231 八3态总线反向驱动器74ls240 八缓冲器/线驱动器/线接收器(反码三态输出) 74ls241 八缓冲器/线驱动器/线接收器(原码三态输出) 74ls242 八缓冲器/线驱动器/线接收器74ls243 4同相三态总线收发器74ls244 八缓冲器/线驱动器/线接收器74ls245 八双向总线收发器74ls246 4线-七段译码/驱动器(30v)74ls247 4线-七段译码/驱动器(15v)74ls248 4线-七段译码/驱动器74ls249 4线-七段译码/驱动器74ls251 8选1数据选择器(三态输出)74ls253 双四选1数据选择器(三态输出)74ls256 双四位可寻址锁存器74ls257 四2选1数据选择器(三态输出)74ls258 四2选1数据选择器(反码三态输出)74ls259 8为可寻址锁存器74ls260 双5输入或非门74ls261 4*2并行二进制乘法器74ls265 四互补输出元件74ls266 2输入四异或非门(oc)74ls270 2048位rom (512位四字节,oc) 74ls271 2048位rom (256位八字节,oc) 74ls273 八d触发器74ls274 4*4并行二进制乘法器74ls275 七位片式华莱士树乘法器74ls276 四jk触发器74ls278 四位可级联优先寄存器74ls279 四s-r锁存器74ls280 9位奇数/偶数奇偶发生器/较验器74ls28174ls283 4位二进制全加器74ls290 十进制计数器74ls291 32位可编程模74ls293 4位二进制计数器74ls294 16位可编程模74ls295 四位双向通用移位寄存器74ls298 四-2输入多路转换器(带选通)74ls299 八位通用移位寄存器(三态输出)74ls348 8-3线优先编码器(三态输出)74ls352 双四选1数据选择器/多路转换器74ls353 双4-1线数据选择器(三态输出)74ls354 8输入端多路转换器/数据选择器/寄存器,三态补码输出74ls355 8输入端多路转换器/数据选择器/寄存器,三态补码输出74ls356 8输入端多路转换器/数据选择器/寄存器,三态补码输出74ls357 8输入端多路转换器/数据选择器/寄存器,三态补码输出74ls365 6总线驱动器74ls366 六反向三态缓冲器/线驱动器74ls367 六同向三态缓冲器/线驱动器74ls368 六反向三态缓冲器/线驱动器74ls373 八d锁存器74ls374 八d触发器(三态同相)74ls375 4位双稳态锁存器74ls377 带使能的八d触发器74ls378 六d触发器74ls379 四d触发器74ls381 算术逻辑单元/函数发生器74ls382 算术逻辑单元/函数发生器74ls384 8位*1位补码乘法器74ls385 四串行加法器/乘法器74ls386 2输入四异或门74ls390 双十进制计数器74ls391 双四位二进制计数器74ls395 4位通用移位寄存器74ls396 八位存储寄存器74ls398 四2输入端多路开关(双路输出) 74ls399 四-2输入多路转换器(带选通) 74ls422 单稳态触发器74ls423 双单稳态触发器74ls440 四3方向总线收发器,集电极开路74ls441 四3方向总线收发器,集电极开路74ls442 四3方向总线收发器,三态输出74ls443 四3方向总线收发器,三态输出74ls444 四3方向总线收发器,三态输出74ls445 bcd-十进制译码器/驱动器,三态输出74ls446 有方向控制的双总线收发器74ls448 四3方向总线收发器,三态输出74ls449 有方向控制的双总线收发器74ls465 八三态线缓冲器74ls466 八三态线反向缓冲器74ls467 八三态线缓冲器74ls468 八三态线反向缓冲器74ls490 双十进制计数器74ls540 八位三态总线缓冲器(反向)74ls541 八位三态总线缓冲器74ls589 有输入锁存的并入串出移位寄存器74ls590 带输出寄存器的8位二进制计数器74ls591 带输出寄存器的8位二进制计数器74ls592 带输出寄存器的8位二进制计数器74ls593 带输出寄存器的8位二进制计数器74ls594 带输出锁存的8位串入并出移位寄存器74ls595 8位输出锁存移位寄存器74ls596 带输出锁存的8位串入并出移位寄存器74ls597 8位输出锁存移位寄存器74ls598 带输入锁存的并入串出移位寄存器74ls599 带输出锁存的8位串入并出移位寄存器74ls604 双8位锁存器74ls605 双8位锁存器74ls606 双8位锁存器74ls607 双8位锁存器74ls620 8位三态总线发送接收器(反相)74ls621 8位总线收发器74ls622 8位总线收发器74ls623 8位总线收发器74ls640 反相总线收发器(三态输出)74ls641 同相8总线收发器,集电极开路74ls642 同相8总线收发器,集电极开路74ls643 8位三态总线发送接收器74ls644 真值反相8总线收发器,集电极开路74ls645 三态同相8总线收发器74ls646 八位总线收发器,寄存器74ls647 八位总线收发器,寄存器74ls648 八位总线收发器,寄存器74ls649 八位总线收发器,寄存器74ls651 三态反相8总线收发器74ls652 三态反相8总线收发器74ls653 反相8总线收发器,集电极开路74ls654 同相8总线收发器,集电极开路74ls668 4位同步加/减十进制计数器74ls669 带先行进位的4位同步二进制可逆计数器74ls670 4*4寄存器堆(三态)74ls671 带输出寄存的四位并入并出移位寄存器74ls672 带输出寄存的四位并入并出移位寄存器74ls673 16位并行输出存储器,16位串入串出移位寄存器74ls674 16位并行输入串行输出移位寄存器74ls681 4位并行二进制累加器74ls682 8位数值比较器(图腾柱输出)74ls683 8位数值比较器(集电极开路)74ls684 8位数值比较器(图腾柱输出)74ls685 8位数值比较器(集电极开路)74ls686 8位数值比较器(图腾柱输出)74ls687 8位数值比较器(集电极开路)74ls688 8位数字比较器(oc输出)74ls689 8位数字比较器74ls690 同步十进制计数器/寄存器(带数选,三态输出,直接清除) 74ls691 计数器/寄存器(带多转换,三态输出)74ls692 同步十进制计数器(带预置输入,同步清除)74ls693 计数器/寄存器(带多转换,三态输出)74ls696 同步加/减十进制计数器/寄存器(带数选,三态输出,直接清除)74ls697 计数器/寄存器(带多转换,三态输出)74ls698 计数器/寄存器(带多转换,三态输出)74ls699 计数器/寄存器(带多转换,三态输出)74ls716 可编程模n十进制计数器74ls718 可编程模n十进制计数器74系列芯片资料反相器驱动器 LS04 LS05 LS06 LS07 LS125 LS240 LS244 LS245与门与非门 LS00 LS08 LS10 LS11 LS20 LS21 LS27 LS30 LS38或门或非门与或非门 LS02 LS32 LS51 LS64 LS65异或门比较器 LS86译码器 LS138 LS139寄存器 LS74 LS175 LS373反相器:Vcc 6A 6Y 5A 5Y 4A 4Y 六非门 74LS04┌┴─┴─┴─┴─┴─┴─┴┐六非门(OC门) 74LS05_ │14 13 12 11 10 9 8│六非门(OC高压输出) 74LS06Y = A )││ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1A 1Y 2A 2Y 3A 3Y GND驱动器:Vcc 6A 6Y 5A 5Y 4A 4Y┌┴─┴─┴─┴─┴─┴─┴┐│14 13 12 11 10 9 8│Y = A )│六驱动器(OC高压输出) 74LS07 │ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1A 1Y 2A 2Y 3A 3Y GNDVcc -4C 4A 4Y -3C 3A 3Y┌┴─┴─┴─┴─┴─┴─┴┐_ │14 13 12 11 10 9 8│Y =A+C )│四总线三态门 74LS125 │ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘-1C 1A 1Y -2C 2A 2Y GNDVcc -G B1 B2 B3 B4 B8 B6 B7 B8┌┴─┴─┴─┴─┴─┴─┴─┴─┴─┴┐ 8位总线驱动器 74LS245│20 19 18 17 16 15 14 13 12 11│)│ DIR=1 A=>B│ 1 2 3 4 5 6 7 8 9 10│ DIR=0 B=>A└┬─┬─┬─┬─┬─┬─┬─┬─┬─┬┘DIR A1 A2 A3 A4 A5 A6 A7 A8 GND页首非门,驱动器与门,与非门或门,或非门异或门,比较器译码器寄存器正逻辑与门,与非门:Vcc 4B 4A 4Y 3B 3A 3Y┌┴─┴─┴─┴─┴─┴─┴┐│14 13 12 11 10 9 8│Y = AB )│ 2输入四正与门 74LS08│ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1A 1B 1Y 2A 2B 2Y GNDVcc 4B 4A 4Y 3B 3A 3Y┌┴─┴─┴─┴─┴─┴─┴┐__ │14 13 12 11 10 9 8│Y = AB )│ 2输入四正与非门 74LS00 │ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1A 1B 1Y 2A 2B 2Y GNDVcc 1C 1Y 3C 3B 3A 3Y┌┴─┴─┴─┴─┴─┴─┴┐___ │14 13 12 11 10 9 8│Y = ABC )│ 3输入三正与非门 74LS10 │ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1A 1B 2A 2B 2C 2Y GNDVcc H G Y┌┴─┴─┴─┴─┴─┴─┴┐│14 13 12 11 10 9 8│)│ 8输入与非门 74LS30│ 1 2 3 4 5 6 7│ ________└┬─┬─┬─┬─┬─┬─┬┘ Y = ABCDEFGHA B C D E F GND。
CD74HC125M高速CMOS逻辑四缓冲,三态
Copyright © Harris Corporation 1997
1
File Number 1771.1
CD74HC125, CD74HCT125
Functional Diagram
1 1OE
2 1A
4 2OE
5 2A
10 3OE
9 3A
13 4OE
12 4A
3 1Y
6 2Y
8 3Y
11 4Y
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC Input Rise and Fall Time 2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max) 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max) 6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
125,74AHC1G06GW,125,74AHC1G06GW,165,74AHC1G06GW,125,74AHCT1G06GW,125, 规格书,Datasheet 资料
OFF-state VI = VIH or VIL; VO = VCC or output current GND; VCC = 5.5 V supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V input capacitance HIGH-level input voltage LOW-level input voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V
2. Features
I I I I High noise immunity Low power dissipation SOT353-1 and SOT753 package options ESD protection: N HBM JESD22-A114E: exceeds 2000 V N MM JESD22-A115-A: exceeds 200 V N CDM JESD22-C101C: exceeds 1000 V I Specified from −40 °C to +125 °C
5. Functional diagram
Y 2 A Y 4 A
mna584
2
4
Y
A GND mna586
mna585
Fig 1. Logic symbol
Fig 2. IEC logic symbol
Fig 3. Logic diagram
6. Pinning information
6.1 Pinning
Conditions
Min −0.5 −0.5
Max +7.0 +7.0 ±20 ±25 +7.0 +7.0 75 +150 250
74系列各个芯片详细介绍
74系列芯片资料程序匠人发表于 2005-10-29 19:20:00 阅读全文(2477) | 回复(0) | 引用通告(0) | 编辑74系列芯片资料反相器驱动器 LS04 LS05 LS06 LS07 LS125 LS240 LS244 LS245与门与非门 LS00 LS08 LS10 LS11 LS20 LS21 LS27 LS30 LS38或门或非门与或非门 LS02 LS32 LS51 LS64 LS65异或门比较器 LS86译码器 LS138 LS139寄存器 LS74 LS175 LS373反相器:Vcc 6A 6Y 5A 5Y 4A 4Y 六非门74LS04 ┌┴─┴─┴─┴─┴─┴─┴┐六非门(OC门) 74LS05_ │1413 12 11 10 9 8│六非门(OC高压输出) 74LS06Y = A )││ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1A 1Y 2A 2Y 3A 3Y GND驱动器:Vcc 6A 6Y 5A 5Y 4A 4Y┌┴─┴─┴─┴─┴─┴─┴┐│1413 12 11 10 9 8│Y = A )│六驱动器(OC高压输出) 7 4LS07│ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1A 1Y 2A 2Y 3A 3Y GNDVcc -4C 4A 4Y -3C 3A 3Y┌┴─┴─┴─┴─┴─┴─┴┐_ │1413 12 11 10 9 8│Y =A+C )│四总线三态门 74LS125 │ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘-1C 1A 1Y -2C 2A 2Y GNDVcc -G B1 B2 B3 B4 B8 B6 B7 B8┌┴─┴─┴─┴─┴─┴─┴─┴─┴─┴┐8位总线驱动器 74LS245│2019 18 17 16 15 14 13 12 11│)│DIR =1 A=>B│ 1 2 3 4 5 6 7 8 9 10│DIR=0 B=>A└┬─┬─┬─┬─┬─┬─┬─┬─┬─┬┘DIR A1 A2 A3 A4 A5 A6 A7 A8 GND页首非门,驱动器与门,与非门或门,或非门异或门,比较器译码器寄存器正逻辑与门,与非门:Vcc 4B 4A 4Y 3B 3A 3Y┌┴─┴─┴─┴─┴─┴─┴┐│1413 12 11 10 9 8│Y = AB )│2输入四正与门 74LS08 │ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1A 1B 1Y 2A 2B 2Y GNDVcc 4B 4A 4Y 3B 3A 3Y┌┴─┴─┴─┴─┴─┴─┴┐__ │1413 12 11 10 9 8│Y = AB )│2输入四正与非门 74LS 00│ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1A 1B 1Y 2A 2B 2Y GNDVcc 1C 1Y 3C 3B 3A 3Y┌┴─┴─┴─┴─┴─┴─┴┐___ │1413 12 11 10 9 8│Y = ABC )│3输入三正与非门 74LS 10│ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1A 1B 2A 2B 2C 2Y GNDVcc H G Y┌┴─┴─┴─┴─┴─┴─┴┐│1413 12 11 10 9 8│)│8输入与非门 74LS30│ 1 2 3 4 5 6 7│________└┬─┬─┬─┬─┬─┬─┬┘Y = ABCDEFGHA B C D E F GND页首非门,驱动器与门,与非门或门,或非门异或门,比较器译码器寄存器正逻辑或门,或非门:Vcc 4B 4A 4Y 3B 3A 3Y┌┴─┴─┴─┴─┴─┴─┴┐2输入四或门 74LS32│1413 12 11 10 9 8│)│Y = A+B│ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1A 1B 1Y 2A 2B 2Y GNDVcc 4Y 4B 4A 3Y 3B 3A┌┴─┴─┴─┴─┴─┴─┴┐2输入四或非门 74LS02│1413 12 11 10 9 8│ ___)│ Y = A+B│ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1Y 1A 1B 2Y 2A 2B GNDVcc 2Y 2B 2A 2D 2E 1F┌┴─┴─┴─┴─┴─┴─┴┐双与或非门 74S51│1413 12 11 10 9 8│ _____)│2Y = AB+DE│ 1 2 3 4 5 6 7│ _______└┬─┬─┬─┬─┬─┬─┬┘1Y = ABC+DEF1Y 1A 1B 1C 1D 1E GNDVcc D C B K J Y┌┴─┴─┴─┴─┴─┴─┴┐4-2-3-2与或非门 74S64 74S65(OC门)│1413 12 11 10 9 8│______________)│Y = ABCD+EF+GHI+JK│ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘A E F G H I GND页首非门,驱动器与门,与非门或门,或非门异或门,比较器译码器寄存器2输入四异或门 74LS86Vcc 4B 4A 4Y 3Y 3B 3A┌┴─┴─┴─┴─┴─┴─┴┐│1413 12 11 10 9 8│)│_ _│ 1 2 3 4 5 6 7│Y=AB+AB└┬─┬─┬─┬─┬─┬─┬┘1A 1B 1Y 2Y 2A 2B GND8*2输入比较器 74LS688_Vcc Y B8 A8 B7 A7 B6 A6 B5 A5┌┴─┴─┴─┴─┴─┴─┴─┴─┴─┴┐8*2输入比较器 74LS688│2019 18 17 16 15 14 13 12 11│)││ 1 2 3 4 5 6 7 8 9 10│└┬─┬─┬─┬─┬─┬─┬─┬─┬─┬┘CE A1 B1 A2 B2 A3 B3 A4 B4 GND_Y=A1⊙B1+A2⊙B2+A3⊙B3+A4⊙B4+A5⊙B5+A6⊙B6+A7⊙B7+A8⊙B8页首非门,驱动器与门,与非门或门,或非门异或门,比较器译码器寄存器3-8译码器 74LS138Vcc -Y0 -Y1 -Y2 -Y3 -Y4 -Y5 -Y6 __ _ _ _ __ _ _ __ _ _ __ _ ┌┴─┴─┴─┴─┴─┴─┴─┴┐Y0=A B C Y1=A B B Y2=A B C Y3=A B C│1615 14 13 12 11 10 9 │)│__ _ _ ___ __ _ __│ 1 2 3 4 5 6 7 8│Y4=A B C Y5=A B C Y6=A B C Y 7=A B C└┬─┬─┬─┬─┬─┬─┬─┬┘A B C -CS0 -CS1 CS2 -Y7 GND双2-4译码器 74LS139Vcc -2G 2A 2B -Y0 -Y1 -Y2 -Y3 __ __ __ __ __ __ __ __┌┴─┴─┴─┴─┴─┴─┴─┴┐Y0=2A 2B Y1=2A 2B Y2=2A 2B Y3=2A 2B│1615 14 13 12 11 10 9 │)│__ __ __ __ __ __ __ __│ 1 2 3 4 5 6 7 8│Y0=1A 1B Y1=1A 1B Y2=1A 1B Y 3=1A 1B└┬─┬─┬─┬─┬─┬─┬─┬┘-1G 1A 1B -Y0 -Y1 -Y2 -Y3 GND8*2输入比较器 74LS688_Vcc Y B8 A8 B7 A7 B6 A6 B5 A5┌┴─┴─┴─┴─┴─┴─┴─┴─┴─┴┐8*2输入比较器 74LS688│2019 18 17 16 15 14 13 12 11│)││ 1 2 3 4 5 6 7 8 9 10│└┬─┬─┬─┬─┬─┬─┬─┬─┬─┬┘CE A1 B1 A2 B2 A3 B3 A4 B4 GND_Y=A1⊙B1+A2⊙B2+A3⊙B3+A4⊙B4+A5⊙B5+A6⊙B6+A7⊙B7+A8⊙B8寄存器:Vcc 2CR 2D 2Ck 2St 2Q -2Q┌┴─┴─┴─┴─┴─┴─┴┐双D触发器 74LS74│1413 12 11 10 9 8 │)││ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1Cr 1D 1Ck 1St 1Q -1Q GNDVcc 8Q 8D 7D 7Q 6Q 6D 5D 5Q ALE┌┴─┴─┴─┴─┴─┴─┴─┴─┴─┴┐8位锁存器 74LS373│2019 18 17 16 15 14 13 12 11│)││ 1 2 3 4 5 6 7 8 9 10│└┬─┬─┬─┬─┬─┬─┬─┬─┬─┬┘-OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND型号器件名称厂牌[数据表]SN7400四2输入端与非门 TI[DATA]SN7401四2输入端与非门(OC) SN7402四2输入端或非门 TI[DATA]SN7403四2输入端与非门(OC)TI[DATA]SN7404六反相器 TI[DATA]SN7405六反相器(O C)TI[DATA]SN7406六高压输出反相器(OC,30V)TI[DATA]SN7407六高压输出缓冲,驱动器(OC,30V)TI[DATA]SN7408四2输入端与门TI[DATA]SN7409四2输入端与门(OC)TI[DATA]SN7410三3输入端与非门 TI[DATA]SN7412三3输入端与非门(OC)TI[DATA]SN7413双4输入端与非门TI[DATA]SN7414六反相器TI[DATA]SN7416六高压输出反相缓冲/驱动器 I[DATA]SN7417六高压输出缓冲/驱动器(OC,15V)TI[DATA]SN7420双4输入端与非门 TI[DATA]SN7422双4输入端与非门(OC)TI[DATA]SN7423可扩展双4输入端或非门 TI[DATA]SN7425双4输入端或非门TI[DATA]SN7426四2输入端高压输出与非缓冲器 [DATA]SN7427三3输入端或非门TI[DATA]SN7428四2输入端或非缓冲器 I[DATA]SN74308输入端与非门TI[DATA]SN7432四2输入端或门。
74系列芯片型号与功能简介
74系列芯片型号与功能介绍74HC01 2输入四与非门 (oc)74HC02 2输入四或非门74HC03 2输入四与非门 (oc)74HC04 六倒相器74HC05 六倒相器(oc)74HC06 六高压输出反相缓冲器/驱动器(oc,30v)74HC07 六高压输出缓冲器/驱动器(oc,30v)74HC08 2输入四与门74HC09 2输入四与门(oc)74HC10 3输入三与非门74HC11 3输入三与门74HC12 3输入三与非门 (oc)74HC13 4输入双与非门 (斯密特触发) 74HC14 六倒相器(斯密特触发) 74HC15 3输入三与门 (oc)74HC16 六高压输出反相缓冲器/驱动器(oc,15v)74HC17 六高压输出缓冲器/驱动器(oc,15v)74HC18 4输入双与非门 (斯密特触发)74HC19 六倒相器(斯密特触发)74HC20 4输入双与非门74HC21 4输入双与门74HC22 4输入双与非门(oc)74HC23 双可扩展的输入或非门74HC24 2输入四与非门(斯密特触发)74HC25 4输入双或非门(有选通)74HC26 2输入四高电平接口与非缓冲器(oc,15v) 74HC27 3输入三或非门74HC28 2输入四或非缓冲器74HC30 8输入与非门74HC31 延迟电路74HC32 2输入四或门74HC33 2输入四或非缓冲器(集电极开路输出) 74HC34 六缓冲器74HC35 六缓冲器(oc)74HC36 2输入四或非门(有选通)74HC37 2输入四与非缓冲器74HC38 2输入四或非缓冲器(集电极开路输出) 74HC39 2输入四或非缓冲器(集电极开路输出) 74HC40 4输入双与非缓冲器74HC41 bcd-十进制计数器74HC42 4线-10线译码器(bcd输入)74HC43 4线-10线译码器(余3码输入)74HC44 4线-10线译码器(余3葛莱码输入)74HC45 bcd-十进制译码器/驱动器74HC46 bcd-七段译码器/驱动器74HC47 bcd-七段译码器/驱动器74HC48 bcd-七段译码器/驱动器74HC49 bcd-七段译码器/驱动器(oc)74HC50 双二路2-2输入与或非门(一门可扩展)74HC51 双二路2-2输入与或非门74HC51 二路3-3输入,二路2-2输入与或非门74HC52 四路2-3-2-2输入与或门(可扩展)74HC53 四路2-2-2-2输入与或非门(可扩展)74HC53 四路2-2-3-2输入与或非门(可扩展)74HC54 四路2-2-2-2输入与或非门74HC54 四路2-3-3-2输入与或非门74HC54 四路2-2-3-2输入与或非门74HC55 二路4-4输入与或非门(可扩展)74HC60 双四输入与扩展74HC61 三3输入与扩展74HC62 四路2-3-3-2输入与或扩展器74HC63 六电流读出接口门74HC64 四路4-2-3-2输入与或非门74HC65 四路4-2-3-2输入与或非门(oc)74HC70 与门输入上升沿jk触发器74HC71 与输入r-s主从触发器74HC72 与门输入主从jk触发器74HC73 双j-k触发器(带清除端)74HC74 正沿触发双d型触发器(带预置端和清除端) 74HC75 4位双稳锁存器74HC76 双j-k触发器(带预置端和清除端)74HC77 4位双稳态锁存器74HC78 双j-k触发器(带预置端,公共清除端和公共时钟端) 74HC80 门控全加器74HC81 16位随机存取存储器74HC82 2位二进制全加器(快速进位)74HC83 4位二进制全加器(快速进位)74HC84 16位随机存取存储器74HC85 4位数字比较器74HC86 2输入四异或门74HC87 四位二进制原码/反码/oi单元74HC89 64位读/写存储器74HC90 十进制计数器74HC91 八位移位寄存器74HC92 12分频计数器(2分频和6分频)74HC93 4位二进制计数器74HC94 4位移位寄存器(异步)74HC157 四2选1数据选择器/多路选择器74HC158 四2选1数据选择器(反相输出)74HC160 可预置bcd计数器(异步清除)74HC161 可预置四位二进制计数器(并清除异步)74HC162 可预置bcd计数器(异步清除)74HC163 可预置四位二进制计数器(并清除异步)74HC164 8位并行输出串行移位寄存器74HC165 并行输入8位移位寄存器(补码输出)74HC167 同步十进制比率乘法器74HC168 4位加/减同步计数器(十进制) 74HC169 同步二进制可逆计数器74HC170 4*4寄存器堆74HC171 四d触发器(带清除端)74HC172 16位寄存器堆74HC173 4位d型寄存器(带清除端)74HC174 六d触发器74HC175 四d触发器74HC176 十进制可预置计数器74HC177 2-8-16进制可预置计数器74HC178 四位通用移位寄存器74HC179 四位通用移位寄存器74HC180 九位奇偶产生/校验器74HC181 算术逻辑单元/功能发生器74HC182 先行进位发生器74HC183 双保留进位全加器74HC184 bcd-二进制转换器74HC185 二进制-bcd转换器74HC190 同步可逆计数器(bcd,二进制) 74HC191 同步可逆计数器(bcd,二进制) 74HC192 同步可逆计数器(bcd,二进制) 74HC193 同步可逆计数器(bcd,二进制)74HC210 2-5-10进制计数器74HC213 2-n-10可变进制计数器74HC221 双单稳触发器74HC230 八3态总线驱动器74HC231 八3态总线反向驱动器74HC240 八缓冲器/线驱动器/线接收器(反码三态输出) 74HC241 八缓冲器/线驱动器/线接收器(原码三态输出) 74HC242 八缓冲器/线驱动器/线接收器74HC243 4同相三态总线收发器74HC244 八缓冲器/线驱动器/线接收器74HC245 八双向总线收发器74HC246 4线-七段译码/驱动器(30v)74HC247 4线-七段译码/驱动器(15v)74HC248 4线-七段译码/驱动器74HC249 4线-七段译码/驱动器74HC251 8选1数据选择器(三态输出)74HC253 双四选1数据选择器(三态输出)74HC256 双四位可寻址锁存器74HC257 四2选1数据选择器(三态输出)74HC258 四2选1数据选择器(反码三态输出)74HC259 8为可寻址锁存器74HC260 双5输入或非门74HC261 4*2并行二进制乘法器74HC265 四互补输出元件74HC266 2输入四异或非门(oc)74HC270 2048位rom (512位四字节,oc)74HC271 2048位rom (256位八字节,oc)74HC273 八d触发器74HC274 4*4并行二进制乘法器74HC275 七位片式华莱士树乘法器74HC276 四jk触发器74HC278 四位可级联优先寄存器74HC279 四s-r锁存器74HC280 9位奇数/偶数奇偶发生器/较验器74HC283 4位二进制全加器74HC290 十进制计数器74HC291 32位可编程模74HC293 4位二进制计数器74HC294 16位可编程模74HC295 四位双向通用移位寄存器74HC298 四-2输入多路转换器(带选通)74HC299 八位通用移位寄存器(三态输出)74HC348 8-3线优先编码器(三态输出)74HC352 双四选1数据选择器/多路转换器74HC353 双4-1线数据选择器(三态输出)74HC354 8输入端多路转换器/数据选择器/寄存器,三态补码输出74HC355 8输入端多路转换器/数据选择器/寄存器,三态补码输出74HC356 8输入端多路转换器/数据选择器/寄存器,三态补码输出74HC357 8输入端多路转换器/数据选择器/寄存器,三态补码输出74HC365 6总线驱动器74HC366 六反向三态缓冲器/线驱动器74HC367 六同向三态缓冲器/线驱动器74HC368 六反向三态缓冲器/线驱动器74HC373 八d锁存器74HC374 八d触发器(三态同相)74HC375 4位双稳态锁存器74HC377 带使能的八d触发器74HC378 六d触发器74HC379 四d触发器74HC381 算术逻辑单元/函数发生器74HC382 算术逻辑单元/函数发生器74HC384 8位*1位补码乘法器74HC385 四串行加法器/乘法器74HC386 2输入四异或门74HC390 双十进制计数器74HC391 双四位二进制计数器74HC395 4位通用移位寄存器74HC396 八位存储寄存器74HC398 四2输入端多路开关(双路输出)74HC399 四-2输入多路转换器(带选通)74HC422 单稳态触发器74HC423 双单稳态触发器74HC440 四3方向总线收发器,集电极开路74HC441 四3方向总线收发器,集电极开路74HC442 四3方向总线收发器,三态输出74HC443 四3方向总线收发器,三态输出74HC444 四3方向总线收发器,三态输出74HC445 bcd-十进制译码器/驱动器,三态输出74HC446 有方向控制的双总线收发器74HC448 四3方向总线收发器,三态输出74HC449 有方向控制的双总线收发器74HC465 八三态线缓冲器74HC466 八三态线反向缓冲器74HC467 八三态线缓冲器74HC468 八三态线反向缓冲器74HC490 双十进制计数器74HC540 八位三态总线缓冲器(反向)74HC541 八位三态总线缓冲器74HC589 有输入锁存的并入串出移位寄存器74HC590 带输出寄存器的8位二进制计数器74HC591 带输出寄存器的8位二进制计数器74HC592 带输出寄存器的8位二进制计数器74HC593 带输出寄存器的8位二进制计数器74HC594 带输出锁存的8位串入并出移位寄存器74HC595 8位输出锁存移位寄存器74HC596 带输出锁存的8位串入并出移位寄存器74HC597 8位输出锁存移位寄存器74HC598 带输入锁存的并入串出移位寄存器74HC599 带输出锁存的8位串入并出移位寄存器74HC604 双8位锁存器74HC605 双8位锁存器74HC606 双8位锁存器74HC607 双8位锁存器74HC620 8位三态总线发送接收器(反相)74HC621 8位总线收发器74HC622 8位总线收发器74HC623 8位总线收发器74HC640 反相总线收发器(三态输出)74HC641 同相8总线收发器,集电极开路74HC642 同相8总线收发器,集电极开路74HC643 8位三态总线发送接收器74HC644 真值反相8总线收发器,集电极开路74HC645 三态同相8总线收发器74HC646 八位总线收发器,寄存器74HC647 八位总线收发器,寄存器74HC648 八位总线收发器,寄存器74HC649 八位总线收发器,寄存器74HC651 三态反相8总线收发器74HC652 三态反相8总线收发器74HC653 反相8总线收发器,集电极开路74HC654 同相8总线收发器,集电极开路74HC668 4位同步加/减十进制计数器74HC669 带先行进位的4位同步二进制可逆计数器74HC670 4*4寄存器堆(三态)74HC671 带输出寄存的四位并入并出移位寄存器74HC672 带输出寄存的四位并入并出移位寄存器74HC673 16位并行输出存储器,16位串入串出移位寄存器74HC674 16位并行输入串行输出移位寄存器74HC681 4位并行二进制累加器74HC682 8位数值比较器(图腾柱输出)74HC683 8位数值比较器(集电极开路)74HC684 8位数值比较器(图腾柱输出)74HC685 8位数值比较器(集电极开路)74HC686 8位数值比较器(图腾柱输出)74HC687 8位数值比较器(集电极开路)74HC688 8位数字比较器(oc输出)74HC689 8位数字比较器74HC690 同步十进制计数器/寄存器(带数选,三态输出,直接清除)。
MC74ACT125DR2G中文资料
MC74AC125, MC74ACT125Quad Buffer with 3−State OutputsFeatures•Outputs Source/Sink•′ACT125 Has TTL Compatible Inputs •Pb −Free Packages are AvailableA 0B 0O 0A 1B 1O 1GND1314121110982134567V CC A 2B 2O 2A 3B 3O 3Figure 1. Pinout: 14−Lead Packages Conductors(Top View)PIN ASSIGNMENTPIN FUNCTION A n , B n Inputs O nOutputsFUNCTION TABLEInputs Output AnB nO n L L L H L H H XZNOTE:H = High Voltage Level;L = Low Voltage Level;Z = High Impedance;X = ImmaterialSee detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.ORDERING INFORMATIONTSSOP −14DT SUFFIX CASE 948GSOEIAJ −14M SUFFIX CASE 965SOIC −14D SUFFIX CASE 751APDIP −14N SUFFIX CASE 646See general marking information in the device marking section on page 5 of this data sheet.DEVICE MARKING INFORMATIONMAXIMUM RATINGSSymbol Parameter Value Unit V CC DC Supply Voltage (Referenced to GND)−0.5 to +7.0V V in DC Input Voltage (Referenced to GND)−0.5 to V CC + 0.5V V out DC Output Voltage (Referenced to GND)−0.5 to V CC + 0.5VI in DC Input Current, per Pin± 20mAI out DC Output Sink/Source Current, per Pin± 50mAI CC DC V CC or GND Current per Output Pin± 50mAT stg Storage Temperature−65 to +150°C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above theRecommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.RECOMMENDED OPERATING CONDITIONSSymbol Parameter Min Typ Max UnitV CC Supply Voltage′AC 2.0 5.0 6.0V ′ACT 4.5 5.0 5.5V in, V out DC Input Voltage, Output Voltage (Ref. to GND)0−V CC Vt r, t f Input Rise and Fall Time (Note 1)′AC Devices except Schmitt Inputs V CC @ 3.0 V−150−V CC @ 4.5 V−40−ns/V V CC @ 5.5 V−25−T J Junction Temperature (PDIP)−−140°C T A Operating Ambient Temperature Range−402585°CI OH Output Current − HIGH−−−24mAI OL Output Current − LOW−−24mA1.V in from 30% to 70% V CC; see individual Data Sheets for devices that differ from the typical input rise and fall times.2.V in from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.DC CHARACTERISTICSSymbol Parameter V CC(V)74AC74ACUnit Conditions T A = +25°CT A =−40°C to+85°CTyp Guaranteed LimitsV IH Minimum High LevelInput Voltage 3.0 1.5 2.1 2.1V OUT = 0.1 V4.5 2.25 3.15 3.15V or V CC− 0.1 V5.5 2.75 3.85 3.85V IL Maximum Low LevelInput Voltage 3.0 1.50.90.9V OUT = 0.1 V4.5 2.25 1.35 1.35V or V CC− 0.1 V5.5 2.75 1.65 1.65V OH Minimum High LevelOutput Voltage 3.0 2.99 2.9 2.9I OUT = −50 m A4.5 4.46 4.4 4.4V5.5 5.49 5.4 5.4V*V IN = V IL or V IH3.0− 2.56 2.46−12 mA4.5− 3.86 3.76I OH−24 mA5.5− 4.86 4.76−24 mAV OL Minimum Low LevelOutput Voltage 3.00.0020.10.1I OUT = 50 m A4.50.0010.10.1V5.50.0010.10.1V*V IN = V IL or V IH3.0−0.360.4412 mA4.5−0.360.44I OL24 mA5.5−0.360.4424 mAI IN Maximum InputLeakage Current 5.5−±0.1±1.0m AV I = V CC, GNDI OZ V I (OE) = V IL, V IHV I = V CC, GND 5.5±0.5±5.0m A V I(OE) = V IL, V IH−V I= V CC, GND V O = V CC , GND V O= V CC, GNDI OLD†Minimum DynamicOutput Current 5.5−−75mA V OLD = 1.65 V MaxI OHD 5.5−−−75mA V OHD = 3.85 V Min I CC Maximum QuiescentSupply Current 5.5−8.080m AV IN = V CC or GND*All outputs loaded; thresholds on input associated with output under test.†Maximum test duration 2.0 ms, one input loaded at a time.NOTE:I IN and I CC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V.AC CHARACTERISTICSSymbol Parameter V CC*(V)74AC74ACUnit T A = +25°CC L = 50 pFT A = −40°Cto +85°CC L = 50 pFMin Max Min Maxt PLH Propagation DelayData to Output 3.3 1.09.0 1.010ns 5.0 1.07.0 1.07.5t PHL Propagation DelayData to Output 3.3 1.09.0 1.010ns 5.0 1.07.0 1.07.5t PZH Output EnableTime 3.3 1.010.5 1.011ns 5.0 1.07.0 1.08.0t PZL Output EnableTime 3.3 1.010 1.011ns 5.0 1.08.0 1.08.5t PHZ Output DisableTime 3.3 1.010 1.010.5ns 5.0 1.09.0 1.09.5t PLZ Output DisableTime 3.3 1.010.5 1.011.5ns 5.0 1.09.0 1.09.5*Voltage Range 3.3 V is 3.3 V ±0.3 V. Voltage Range 5.0 V is 5.0 V ±0.5 V.DC CHARACTERISTICSSymbol Parameter V CC(V)74ACT74ACTUnit Conditions T A = +25°CT A =−40°C to+85°CTyp Guaranteed LimitsV IH Minimum High LevelInput Voltage 4.5 1.5 2.2 2.0VV OUT = 0.1 V 5.5 1.5 2.0 2.0or V CC− 0.1 VV IL Maximum Low LevelInput Voltage 4.5 1.50.80.8VV OUT = 0.1 V 5.5 1.50.80.8or V CC− 0.1 VV OH Minimum High LevelOutput Voltage 4.5 4.49 4.4 4.4VI OUT = −50 m A5.5 5.49 5.4 5.4*V IN = V IL or V IH4.5− 3.86 3.76VI OH−24 mA 5.5− 4.86 4.76−24 mAV OL Minimum Low LevelOutput Voltage 4.50.0010.10.1VI OUT = −50 m A5.50.0010.10.1V*V IN = V IL or V IH4.5−0.360.44I OH−24 mA5.5−0.360.44−24 mAI IN Maximum InputLeakage Current 5.5−±0.1±1.0m AV I = V CC, GNDI OZ V I (OE) = V IL, V IHV I = V CC, GND 5.5±0.5±5.0m A V I(OE) = V IL, V IH−V I= V CC, GND V O = V CC , GND V O= V CC, GND D I CCT Additional Max. I CC/Input 5.50.6− 1.5mA V I = V CC−2.1 VI OLD†Minimum DynamicOutput Current 5.5−−75mA V OLD = 1.65 V MaxI OHD 5.5−−−75mA V OHD = 3.85 V Min I CC Maximum Quiescent Supply Current 5.5−8.080m A V IN = V CC or GND *All outputs loaded; thresholds on input associated with output under test.†Maximum test duration 2.0 ms, one input loaded at a time.AC CHARACTERISTICSSymbol Parameter V CC*(V)74ACT74ACTUnit T A = +25°CC L = 50 pFT A = −40°Cto +85°CC L = 50 pFMin Max Min Maxt PLH Propagation DelayData to Output5.0 1.09.0 1.010nst PHL Propagation DelayData to Output5.0 1.09.0 1.010nst PZH Output EnableTime5.0 1.08.5 1.09.5nst PZL Output EnableTime5.0 1.09.5 1.010.5nst PHZ Output DisableTime5.0 1.09.5 1.010.5nst PLZ Output DisableTime5.0 1.010 1.010.5ns *Voltage Range 5.0 V is 5.0 V ±0.5 V.CAPACITANCESymbol Parameter ValueTyp Unit Test ConditionsC IN Input Capacitance 4.5pF V CC = 5.0 V C PD Power Dissipation Capacitance45pF V CC = 5.0 VORDERING INFORMATIONDevicePackage Shipping †MC74AC125N PDIP −1425 Units / Rail MC74AC125NG PDIP −14(Pb −Free)MC74AC125D SOIC −1455 Units / Rail MC74AC125DG SOIC −14(Pb −Free)MC74AC125DR2SOIC −142500 / Tape & Reel MC74AC125DR2G SOIC −14(Pb −Free)MC74AC125DTR2TSSOP −14*MC74AC125DTR2G TSSOP −14*MC74AC125M SOEIAJ −1450 Units / Rail MC74AC125MG SOEIAJ −14(Pb −Free)MC74AC125MEL SOEIAJ −142000 / Tape & Reel MC74AC125MELG SOEIAJ −14(Pb −Free)MC74ACT125DR2SOIC −142500 / Tape & Reel MC74ACT125DR2G SOIC −14(Pb −Free)MC74ACT125DTR2TSSOP −14*MC74ACT125DTR2G TSSOP −14*MC74ACT125MEL SOEIAJ −142000 / Tape & Reel MC74ACT125MELG SOEIAJ −14(Pb −Free)MC74ACT125N PDIP −1425 Units / Rail MC74ACT125NGPDIP −14(Pb −Free)†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.*This package is inherently Pb −Free.MARKING DIAGRAMSPDIP −14SOIC −14TSSOP −14SOEIAJ −14A = Assembly Location L, WL = Wafer Lot Y , YY = YearW, WW = Work WeekG or G = Pb −Free Package11474AC125ALYWG 11474ACT125ALYWG ACT 125ALYW G G114(Note: Microdot may be in either location)PACKAGE DIMENSIONSPDIP−14CASE 646−06ISSUE PPACKAGE DIMENSIONSSOIC −14CASE 751A −03ISSUE HNOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 (0.006)PER SIDE.5.DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127(0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.DIM MIN MAX MIN MAX INCHESMILLIMETERS A 8.558.750.3370.344B 3.80 4.000.1500.157C 1.35 1.750.0540.068D 0.350.490.0140.019F 0.40 1.250.0160.049G 1.27 BSC 0.050 BSC J 0.190.250.0080.009K 0.100.250.0040.009M 0 7 0 7 P 5.80 6.200.2280.244R0.250.500.0100.019____DIMENSIONS: MILLIMETERS*For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.PACKAGE DIMENSIONSTSSOP −14CASE 948G −01ISSUE BDIM MIN MAX MIN MAX INCHESMILLIMETERS A 4.90 5.100.1930.200B 4.30 4.500.1690.177C −−− 1.20−−−0.047D 0.050.150.0020.006F 0.500.750.0200.030G 0.65 BSC 0.026 BSC H 0.500.600.0200.024J 0.090.200.0040.008J10.090.160.0040.006K 0.190.300.0070.012K10.190.250.0070.010L 6.40 BSC 0.252 BSC M0 8 0 8 NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.4.DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.5.DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBARPROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.6.TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY .7.DIMENSION A AND B ARE TO BEDETERMINED AT DATUM PLANE −W −.____14X REF K14X0.360.65PITCHSOLDERING FOOTPRINT**For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.PACKAGE DIMENSIONSSOEIAJ −14CASE 965−01ISSUE ANOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. 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74VHCT125A中文资料
74VHCT125AQUAD BUS BUFFERS (3-STATE)PRELIMINARY DATA®August 1999PIN CONNECTION AND IEC LOGIC SYMBOLSs HIGH SPEED:t PD =3.8ns (TYP.)at V CC =5V sLOW POWER DISSIPATION:I CC =4µA (MAX.)at T A =25o CsCOMPATIBLEWITH TTL OUTPUTS:V IH =2V (MIN),V IL =0.8V(MAX)sPOWER DOWN PROTECTION ON INPUTS &OUTPUTSsSYMMETRICAL OUTPUT IMPEDANCE:|I OH |=I OL =8mA (MIN)sBALANCED PROPAGATION DELAYS:t PLH ≅t PHLsOPERATING VOLTAGERANGE:V CC (OPR)=4.5V to 5.5VsPIN AND FUNCTION COMPATIBLE WITH 74SERIES 125s IMPROVED LATCH-UP IMMUNITY sLOW NOISE:V OLP =0.8V(Max.)DESCRIPTIONThe 74VHCT125A is an advanced high-speed CMOS QUAD BUS BUFFERS fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology.This device requires the 3-STATE control input G to be set high to place the output into the high impedance state.Power down protection is provided on all inputs and outputs and 0to 7V can be accepted on inputs with no regard to the supply voltage.This device can be used to interface 5V to 3V.All inputs and outputs are equipped with protection circuits against static discharge,giving them 2KV ESD immunity and transient excess voltage.ORDER CODES :74VHCT125AM 74VHCT125AT M(Micro Package)T(TSSOP Package)1/8TRUTH TABLEA G Y X H Z L L L HLHX:”H”or ”L”Z:High ImpadancePIN DESCRIPTIONPIN No SYMBOL NAME AND FUNCTION 1,4,10,131G to 4G Output Enable Inputs 2,5,9,121A to 4A Data Inputs 3,6,8,111Y to 4Y Data Outputs 7GND Ground (0V)14V CCPositive Supply VoltageINPUT EQUIVALENT CIRCUITRECOMMENDED OPERATING CONDITIONSSymbol ParameterValue Unit V CC Supply Voltage 4.5to 5.5V V I Input Voltage0to 5.5V V O Output Voltage (see note 1)0to 5.5V V O Output Voltage (see note 2)0to V CC VT op Operating Temperature-40to +85oCdt/dvInput Rise and Fall Time (see note 3)(V CC =5.0±0.5V)0to 20ns/V1)Output in OFFState 2)High or Low State 3)V IN from0.8V to 2VABSOLUTE MAXIMUM RATINGSSymbol ParameterValue Unit V CC Supply Voltage -0.5to +7.0V V I DC Input Voltage-0.5to +7.0V V O DC Output Voltage (see note 1)-0.5to +7.0V V O DC Output Voltage (see note 2)-0.5to V CC +0.5V I IK DC Input Diode Current -20mA I OK DC Output Diode Current ±20mA I O DC Output Current ±25mA I CC or I GND DC V CC or Ground Current±50mAT stg Storage Temperature -65to +150o C T LLead Temperature (10sec)300oCAbsolute Maximum Ratingsarethose values beyond which dam age to the device may occur.Functional operation un der these condition is not implied.1)Output in OFFState 2)High or Low State74VHCT125A2/8AC ELECTRICAL CHARACTERISTICS (Input t r =t f =3ns)SymbolParameterTest Condition ValueUnitV CC (V)C L (pF)T A =25o C-40to 85o C Min.Typ.Max.Min.Max.t PLHt PHL Propagation Delay Time5.0(*)15R L =1K Ω 3.8 5.51.0 6.5ns 5.0(*)50R L =1K Ω 5.37.5 1.08.5t PLZ t PHZ Output Disable Time 5.0(*)15R L =1K Ω 3.6 5.1 1.0 6.0ns 5.0(*)50R L =1K Ω 5.17.1 1.08.0t PZL t PZHOutput Enable Time5.0(*)50R L =1K Ω6.18.81.010.0ns(*)Voltag e range is 5.0V ±0.5VDC SPECIFICATIONSSymbolParameterTest Conditions ValueUnitV CC (V)T A =25oC -40to 85oC Min.Typ.Max.Min.Max.V IH High Level Input Voltage 4.5to 5.522V V IL Low Level Input Voltage4.5to5.50.80.8V V OH High Level Output Voltage4.5I O =-50µA 4.4 4.54.4V 4.5I O =-8mA 3.943.8V OL Low Level Output Voltage4.5I O =50µA 0.00.10.1V 4.5I O =8mA 0.360.44I OZHigh Impedance Output Leakage Current4.5to5.5V I =V IH or V IL V O =0V to 5.5V ±0.25±2.5µAI I Input Leakage Current 0to 5.5V I =5.5V or GND ±0.1±1.0µA I CC Quiescent Supply Current5.5V I =V CC or GND 440µA ∆I CCAdditional Worst Case Supply Current 5.5One Input at 3.4V,other input at V CC orGND1.351.5mAI OPD Output Leakage Current0V OUT =5.5V0.5 5.0µA74VHCT125A3/8CAPACITIVE CHARACTERISTICSSymbolParameterTest ConditionsValueUnitT A =25oC -40to 85oC Min.Typ.Max.Min.Max.C IN Input Capacitance 41010pF C OUT Output Capacitance 10pF C PDPower Dissipation Capacitance (note 1)14pF1)C PD isdefined as the value of the IC’sinternal equiva lent capacitance which is calculated fromthe operating current consumption without load.(Referto Test Circuit).Average operting curren t can be obtained bythe followingequa tion.I CC (opr)=C PD •V CC •f IN +I CC /4(per circuit)TEST CIRCUITTESTSWITCH t PLH ,t PHL Open t PZL ,t PLZ V CC t PZH ,t PHZGNDC L =15/50pF or equ ivalent (includes jigand probe capacitance)R L =R 1=1K ΩorequivalentR T =Z OU T of pulse generator (typ ically 50Ω)DYNAMIC SWITCHING CHARACTERISTICSSymbolParameterTest Conditions ValueUnitV CC (V)T A =25oC -40to 85oC Min.Typ.Max.Min.Max.V OLP Dynamic Low Voltage Quiet Output (note 1,2) 5.0C L =50pF0.30.8VV OLV -0.8-0.3V IHD Dynamic High Voltage Input (note 1,3) 5.02V ILDDynamic Low Voltage Input (note 1,3)5.00.81)Worst case package.2)Max num ber of outputs defined as (n).Data inputs aredriven 0V to 3.0V,(n -1)outputs switching and one out put at GND.3)Max num ber of data inputs (n)switching.(n-1)switching 0V to3.0V.Inputs under test switching:3.0V to threshold (V ILD ),0V to threshold (V IHD ),f=1MHz.74VHCT125A4/874VHCT125A WAVEFORM1:PROPAGATION DELAYS(f=1MHz;50%duty cycle)WAVEFORM2:OUTPUT ENABLE AND DISABLE TIME(f=1MHz;50%duty cycle)5/8DIM.mm inch MIN.TYP.MAX.MIN.TYP.MAX.A 1.750.068a10.10.20.0030.007a2 1.650.064b 0.350.460.0130.018b10.190.250.0070.010C 0.50.019c145(typ.)D 8.558.750.3360.344E 5.86.20.2280.244e 1.270.050e37.620.300F 3.8 4.00.1490.157G 4.6 5.30.1810.208L 0.5 1.270.0190.050M 0.680.026S8(max.)P013GSO-14MECHANICAL DATA74VHCT125A6/8DIM.mminch MIN.TYP.MAX.MIN.TYP.MAX.A 1.10.433A10.050.100.150.0020.0040.006A20.850.90.950.3350.3540.374b 0.190.300.00750.0118c 0.090.200.00350.0079D 4.95 5.10.1930.1970.201E 6.25 6.4 6.50.2460.2520.256E1 4.34.4 4.480.1690.1730.176e 0.65BSC0.0256BSCK 0o 4o 8o 0o 4o 8o L0.500.600.700.0200.0240.028cEbA2AE1D1PIN 1IDENTIFICATIONA1LKeTSSOP14MECHANICAL DATA74VHCT125A7/874VHCT125AInformation furnished is believed to be accurate and reliable.However,STMicroelectronics assumes no responsibility for the consequence s of use of such information nor for any infringement of patents or other rights of third parties which may result from its use.No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics.Specification mentioned in this publication are subject to change without notice.This publication supersedes and replaces all information previously supplied.STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is a trademark of STMicroelectronics©1999STMicroelectronics–Printed in Italy–All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia-Brazil-Canada-China-France-Germany-Italy-Japan-Korea-Malaysia-Malta-Mexico-Morocco-The Netherlands-Singapore-Spain-Sweden-Switzerland-Taiwan-Thailand-United Kingdom-U.S.A..8/8。
74AHCT125中文资料
SYMBOL
PARAMETER
CONDITIONS
VCC
DC supply voltage
VI
input voltage range
IIK
DC input diode current
VI < −0.5 V; note 1
IOK
DC output diode current
VO < −0.5 V or VO > VCC + 0.5 V; note 1
元器件交易网
INTEGRATED CIRCUITS
DATA SHEET
74AHC125; 74AHCT125 Quad buffer/line driver; 3-state
Product specification Supersedes data of 1999 Jan 11 File under Integrated Circuits, IC06
CODE SOT108-1 SOT402-1 SOT108-1 SOT402-1
1999 Sep 27
3
元器件交易网
Philips Semiconductors
Quad buffer/line driver; 3-state
Product specification
74AHC125; 74AHCT125
• Balanced propagation delays • All inputs have Schmitt-trigger
actions
• Inputs accepts voltages higher than VCC
• For AHC only: operates with CMOS input levels
led显示屏模组常用IC的引脚说明
引脚说明符号引脚描述Q0…Q7 8位并行数据输出,其中Q0为第15脚GND 第8脚地Q7’ 第9脚串行数据输出MR 第10脚主复位(低电平)SHCP 第11脚移位寄存器时钟输入STCP 第12脚存储寄存器时钟输入OE 第13脚输出有效(低电平)DS 第14脚串行数据输入VCC 第16脚电源74HC138是一款高速CMOS器件,74HC138引脚兼容低功耗肖特基TTL(LSTTL)系列。
74HC138译码器可接受3位二进制加权地址输入(A0, A1和A2),并当使能时,提供8个互斥的低有效输出(Y0至Y7)。
74HC138特有3个使能输入端:两个低有效(E1和E2)和一个高有效(E3)。
除非E1和E2置低且E3置高,否则74HC138将保持所有输出为高。
利用这种复合使能特性,仅需4片74HC138芯片和1个反相器,即可轻松实现并行扩展,组合成为一个1-32(5线到32线)译码器。
任选一个低有效使能输入端作为数据输入,而把其余的使能输入端作为选通端,则74HC138亦可充当一个8输出多路分配器,未使用的使能输入端必须保持绑定在各自合适的高有效或低有效状态。
74HC138与74HC238逻辑功能一致,只不过74HC138为反相输出。
编辑本段功能CD74HC138 ,CD74HC238和CD74HCT138 , CD74HCT238是高速硅栅CMOS解码器,适合内存地址解码或数据路由应用。
74HC138 作用原理于高性能的存贮译码或要求传输延迟时间短的数据传输系统,在高性能存贮器系统中,用这种译码器可以提高译码系统的效率。
将快速赋能电路用于高速存贮器时,译码器的延迟时间和存贮器的赋能时间通常小于存贮器的典型存取时间,这就是说由肖特基钳位的系统译码器所引起的有效系统延迟可以忽略不计。
HC138 按照三位二进制输入码和赋能输入条件,从8 个输出端中译出一个低电平输出。
两个低电平有效的赋能输入端和一个高电平有效的赋能输入端减少了扩展所需要的外接门或倒相器,扩展成24 线译码器不需外接门;扩展成32 线译码器,只需要接一个外接倒相器。
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MC74HCT125AQuad 3-State Noninverting Buffer with LSTTL Compatible InputsHigh −Performance Silicon −Gate CMOSThe MC74HCT125A is identical in pinout to the LS125. The device inputs are compatible with standard CMOS and LSTTL outputs.The MC74HCT125A noninverting buffer is designed to be used with 3−state memory address drivers, clock drivers, and other bus −oriented systems. The devices have four separate output enables that are active −low.Features•Output Drive Capability: 15 LSTTL Loads•Outputs Directly Interface to CMOS, NMOS, and TTL •Operating V oltage Range: 2.0 to 6.0 V •Low Input Current: 1.0 m A•High Noise Immunity Characteristic of CMOS Devices•In Compliance with the JEDEC Standard No. 7A Requirements •Chip Complexity: 72 FETs or 18 Equivalent Gates •These are Pb −Free DevicesLOGIC DIAGRAM Active −Low Output EnablesY1Y2Y4A1OE1A2OE2A3OE3A4OE4PIN 14 = V CCPIN 7 = GNDY3FUNCTION TABLEHCT125A Inputs Output A OE Y H L H L L L XHZPIN ASSIGNMENTOE3Y4A4OE4V CC Y3A3OE2Y1A1OE1GNDY2A2MARKING DIAGRAMSA =Assembly Location L, WL =Wafer Lot Y , YY =Year W, WW =Work Week G = Pb −Free Package G = Pb −Free Package(Note: Microdot may be in either location)TSSOP −14DT SUFFIX CASE 948GSOEIAJ −14F SUFFIX CASE 965SOIC −14D SUFFIX CASE 751A11474HCT125A ALYWGHCT 125A ALYW G G114PDIP −14N SUFFIX CASE 646MC74HCT125AN AWLYYWWG114See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet.ORDERING INFORMATIONMAXIMUM RATINGSSymbol Parameter Value Unit V CC DC Supply Voltage (Referenced to GND)– 0.5 to + 7.0V V in DC Input Voltage (Referenced to GND)– 0.5 to V CC + 0.5V V out DC Output Voltage (Referenced to GND)– 0.5 to V CC + 0.5VI in DC Input Current, per Pin±20mAI out DC Output Current, per Pin±35mAI CC DC Supply Current, V CC and GND Pins±75mAP D Power Dissipation in Still Air Plastic DIP†SOIC Package†TSSOP Package†750500450mWT stg Storage Temperature– 65 to + 150_C T L Lead Temperature, 1 mm from Case for 10 Seconds(Plastic DIP, SOIC or TSSOP Package)260_CStresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.†Derating—Plastic DIP: – 10 mW/_C from 65_ to 125_CSOIC Package: – 7 mW/_C from 65_ to 125_CTSSOP Package: – 6.1 mW/_C from 65_ to 125_CRECOMMENDED OPERATING CONDITIONSSymbol Parameter Min Max Unit V CC DC Supply Voltage (Referenced to GND) 2.0 6.0VV in, V out DC Input Voltage, Output Voltage(Referenced to GND)0V CC V T A Operating Temperature, All Package Types– 55+ 125_Ct r, t f Input Rise and Fall Time V CC = 2.0 V (Figure 1)V CC = 4.5 VV CC = 6.0 V 01000500400nsThis device contains protectioncircuitry to guard against damagedue to high static voltages or electricfields. However, precautions mustbe taken to avoid applications of anyvoltage higher than maximum ratedvoltages to this high−impedance cir-cuit. For proper operation, V in andV out should be constrained to therange GND v (V in or V out) v V CC.Unused inputs must always betied to an appropriate logic voltagelevel (e.g., either GND or V CC).Unused outputs must be left open.DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)Guaranteed LimitSymbol Parameter Test Conditions V CCV– 55 to25_C v85_C v 125_C UnitV IH Minimum High−Level Input Voltage V out = V CC – 0.1 V|I out| v 20 m A 4.5 to5.52.0 2.0 2.0VV IL Maximum Low−Level Input Voltage V out = 0.1 V|I out| v 20 m A 4.5 to5.50.80.80.8VV OH Minimum High−Level Output Voltage V in = V IH|I out| v 20 m A4.55.54.45.44.45.44.45.4V V in = V IH|I out| v 6.0 mA 4.5 3.98 3.84 3.7V OL Maximum Low−Level Output Voltage V in = V IL|I out| v 20 m A4.55.50.10.10.10.10.10.1V V in = V IL|I out| v 6.0 mA 4.50.260.330.4I in Maximum Input Leakage Current V in = V CC or GND 5.5±0.1±1.0±1.0m AI OZ Maximum Three−State LeakageCurrent Output in High−Impedance StateV in = V IL or V IHV out = V CC or GND5.5±0.5±5.0±10m AI CC Maximum Quiescent Supply Current(per Package)V in = V CC or GNDI out = 0 m A5.5 4.040160m AAC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = t f = 6.0 ns, V CC = 5.0 V ± 10%)Symbol Parameter V CCVGuaranteed LimitUnit – 55 to25_C v85_C v125_Ct PLH, t PHL Maximum Propagation Delay, Input A to Output Y(Figures 1 and 3)5.0182327nst PLZ, t PHZ Maximum Propagation Delay, Output Enable to Y(Figures 2 and 4)5.0243036nst PZL, t PZH Maximum Propagation Delay, Output Enable to Y(Figures 2 and 4)5.0182327nst TLH, t THL Maximum Output Transition Time, Any Output(Figures 1 and 3)5.0121518nsC in Maximum Input Capacitance−101010pF C out Maximum 3−State Output Capacitance (Output in High−Impedance State)−151515pFC PD Power Dissipation Capacitance (Per Buffer)*Typical @ 25°C, V CC = 5.0 VpF30*Used to determine the no−load dynamic power consumption: P D = C PD V CC f + I CC V CC.ORDERING INFORMATIONDevice Package Shipping†MC74HCT125ANG PDIP−14(Pb−Free)25 Units / RailMC74HCT125ADG SOIC−14(Pb−Free)55 Units / RailMC74HCT125ADR2G2500 / Tape & Reel MC74HCT125ADTG TSSOP−14*96 Units / Rail MC74HCT125ADTR2G TSSOP−14*2500 / Tape & ReelMC74HCT125AFG SOEIAJ−14(Pb−Free)50 Units / RailMC74HCT125AFELG2000 / Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.*This package is inherently Pb−Free.SWITCHING WAVEFORMSFigure 1. Figure 2.OUTPUT YV CC GND HIGHIMPEDANCEV OL V OHOE (V I )*Includes all probe and jig capacitance C L *TEST POINT Figure 3. Test Circuit *Includes all probe and jig capacitanceFigure 4. Test CircuitTEST POINT CONNECT TO V CC WHEN TESTING t PLZ AND t PZL.CONNECT TO GND WHEN TESTING t PHZ and tPZH.HIGHIMPEDANCEV CCGNDINPUT A (V I)(1/4 OF THE DEVICE)OEA V YV I = GND to 3.0 V V M = 1.3 VPDIP−14 CASE 646−06 ISSUE PDIM MIN MAX MIN MAXMILLIMETERSINCHESA0.7150.77018.1619.56B0.2400.260 6.10 6.60C0.1450.185 3.69 4.69D0.0150.0210.380.53F0.0400.070 1.02 1.78G0.100 BSC 2.54 BSCH0.0520.095 1.32 2.41J0.0080.0150.200.38K0.1150.135 2.92 3.43LM−−−10 −−−10N0.0150.0390.38 1.01__NOTES:1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.2.CONTROLLING DIMENSION: INCH.3.DIMENSION L TO CENTER OF LEADS WHENFORMED PARALLEL.4.DIMENSION B DOES NOT INCLUDE MOLD FLASH.5.ROUNDED CORNERS OPTIONAL.KM0.13 (0.005)0.2900.3107.377.87SOIC −14CASE 751A −03ISSUE JNOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 (0.006)PER SIDE.5.DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127(0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.SB M0.25 (0.010)AST SEATING PLANEDIM MIN MAX MIN MAX INCHESMILLIMETERS A 8.558.750.3370.344B 3.80 4.000.1500.157C 1.35 1.750.0540.068D 0.350.490.0140.019F 0.40 1.250.0160.049G 1.27 BSC 0.050 BSC J 0.190.250.0080.009K 0.100.250.0040.009M 0 7 0 7 P 5.80 6.200.2280.244R0.250.500.0100.019____DIMENSIONS: MILLIMETERSSOLDERING FOOTPRINT**For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.TSSOP −14CASE 948G −01ISSUE BDIM MIN MAX MIN MAX INCHES MILLIMETERS A 4.90 5.100.1930.200B 4.30 4.500.1690.177C −−− 1.20−−−0.047D 0.050.150.0020.006F 0.500.750.0200.030G 0.65 BSC 0.026 BSC H 0.500.600.0200.024J 0.090.200.0040.008J10.090.160.0040.006K 0.190.300.0070.012K10.190.250.0070.010L 6.40 BSC 0.252 BSC M0 8 0 8 NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.4.DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.5.DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08(0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.6.TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY .7.DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W −.____14X REF 14X0.360.65PITCHSOLDERING FOOTPRINT**For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOEIAJ −14CASE 965−01ISSUE BDETAIL PDIM MIN MAX MIN MAX INCHES --- 2.05---0.081MILLIMETERS 0.050.200.0020.0080.350.500.0140.0200.100.200.0040.0089.9010.500.3900.4135.10 5.450.2010.2151.27 BSC 0.050 BSC 7.408.200.2910.3230.500.850.0200.0331.10 1.500.0430.0590 0.700.900.0280.035--- 1.42---0.056A 1H E Q 1L E _10 _0 _10 _NOTES: 1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982. 2.CONTROLLING DIMENSION: MILLIMETER. 3.DIMENSIONS D AND E DO NOT INCLUDEMOLD FLASH OR PROTRUSIONS AND AREMEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15(0.006) PER SIDE. 4.TERMINAL NUMBERS ARE SHOWN FORREFERENCE ONLY. 5.THE LEAD WIDTH DIMENSION (b) DOES NOTINCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003)TOTAL IN EXCESS OF THE LEAD WIDTHDIMENSION AT MAXIMUM MATERIAL CONDITION.DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACEBETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018).A b c D E e L M ZON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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