基于FPGA的FIR数字滤波器设计与实现

基于FPGA的FIR数字滤波器设计与实现
佚名
【期刊名称】《现代电子技术》
【年(卷),期】2013(000)014
【摘要】简要介绍了FIR数字滤波器的结构特点和基本原理，提出基于FPGA和DSP Builder的FIR数字滤波器的基本设计流程和实现方案。

在Matlab/Simulink 环境下，采用DSP Builder模块搭建FIR模型，根据FDATool工具对FIR滤波器进行了设计，然后进行系统级仿真和ModelSim功能仿真，其仿真结果表明其数字滤波器的滤波效果良好。

通过SignalCompiler把模型转换成VHDL语言加入到FPGA的硬件设计中，从QuartusⅡ软件中的虚拟逻辑分析工具SignalTapⅡ中得到数字滤波器实时的结果波形图，结果符合预期。

%The structure feature and the basic principle of FIR digital filter is introduced briefly. The basic design process and implementation scheme of the FIR digital filter based on FPGA and DSP Builder is proposed in this paper. FIR model is structured with DSP Builder module in the Matlab/Simulink environment. The FIR digital filter is designed according to the FDA⁃Tool. The system level simulation and ModelSim function simulation were completed. The simulation results show that the filter has excellent effect. The model is converted to VHDL language through SingalCompiler and added to FPGA hardware design. The real⁃time waveform graph of the FIR digital filter was received by the virtual logic analysis tool SignalTapⅡ in QuartusⅡ. The results conform to the expected requirement.
【总页数】4页(P123-126)
【正文语种】中文
【中图分类】TN911-34
【相关文献】
1.基于FPGA的FIR数字滤波器的设计与实现 [J], 蒋小燕;孙晓薇;胡恒阳;钱显毅
2.基于FPGA的FIR数字滤波器的设计与实现 [J], 熊洁;黄蕾
3.基于FPGA的FIR数字滤波器的设计与实现 [J], 杨国庆
4.基于FPGA的FIR数字滤波器的设计与实现 [J], 陈昭明
5.基于FPGA的抗混叠FIR数字滤波器的设计与实现 [J], 金燕; 王明; 葛远香因版权原因，仅展示原文概要，查看原文内容请购买。