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Single chip brief introductionThe monolithic integrated circuit said that the monolithic micro controller, it is not completes some logical function the chip, but integrates a computer system to a chip on. Summary speaking: A chip has become a computer. Its volume is small, the quality is light, and the price cheap, for the study, the application and the development has provided the convenient condition. At the same time, the study use monolithic integrated circuit is understandsthe computer principle and the structure best choice.The monolithic integrated circuit interior also uses with the computer function similar module, for instance CPU, memory, parallel main line, but also has with the hard disk behave identically the memory component7 what is different is its these part performance is opposite our home-use computer weak many, but the price is also low, generally does not surpass 10 Yuan then Made some control electric appliance one kind with it is not the 'very complex work foot, We use now the completely automatic drum washer, the platoon petti-coat pipe: VCD and so on Inside the electrical appliances may see its form! It is mainly takes the control section the core part.It is one kind of online -like real-time control computer, online -like is the scene control, needs to have the strong antijamming ability, the low cost, this is also and the off-line type computer (forinstance home use PC,) main differenceThe monolithic integrated circuit is depending on the procedure, and may revise. Realizes the different function through the different procedure, particularly special unique some functions, this is other component needs to take the very big effort to be able to achieve, some are the flowered big strength is also very difficult to achieve. One is not the very complex function, if develops in the 50s with the US 74 series, or the 60s's CD4000 series these pure hardware do decides, the electric circuit certainly arc a big PCB board ! But if, if succeededin the 70s with the US puts in the market the series monolithic integrated circuit, the result will have the huge difference. Because only the monolithic integrated circuit compiles through you the procedure may realize the high intelligence, high efficiency, as well as redundant reliabilityThe CPU is the key component of a digital computer. Its purpose is to decode instruction received from memory and perform transfers, arithmetic, logic, and control operations with data stored in internal registers, memory, or I/O interface units. Externally, the CPU provides one or more buses for transferring instructions, data, and control information to and from components connected to it. A microcontroller is present in the keyboard and in the monitor in the generic computer; thus these components are also shaded. In such microcontrollers, the CPU may be quite different from those discussed in this chapter. The word lengths may be short, the number of registers small, and the instruction sets limited. Performance, relatively speaking, is poor, but adequate for the task. Most important, the cost of these microcontrollers is very low, making their use cost effective.Because the monolithic integrated circuit to the cost is sensitive, therefore present occupies the dominant status the software is the most preliminary assembly language7 it was except the binary machine code above the most preliminary language, since why were such preliminary must use?Why high-level did the language already achieve the visualization programming level not to use? The reason is very simple, is the monolithic integrated circuit docs not have home computer such CPU, and also has not looked like the hard disk such mass memory equipment. Inside even if a visualization higher order language compilation script only then a button, also will achieve several dozens K the sizes! Does not speak anything regarding the home use PC hard disk, but says regarding the monolithic integrated circuit cannot accept. The monolithic integrated circuit in the hardware source aspect's use factor must very Gao Caixing, therefore assembly, although primitive actually massively is using, Same truth, if attains supercomputer'son operating system and the application software home use PC to come up the movement, home use PC could also not withstand.It can be said that the 20th century surmounted three "the electricity" the time, namely the electrical time, the Electronic Age and already entered computer time. However, this kind of computer, usually refers to the personal computer, is called PC machine. It by the main engine, the keyboard, the monitor and so on is composed. Also has a kind of computer, most people actually not how familiar. This kind of computeris entrusts with the intelligence each kind of mechanical monolithic integrated circuit (also to call micro controller). , This kind of computer's smallest system only has used as the name suggests a piece of integrated circuit, then carries on the simple operation and the control. Because its volume is small, usually hides in is accused the machinery "the belly". It in the entire installment, plays is having like the human brains role, it went wrong, the entire installment paralyzed. Now, this kind of monolithic integrated circuit's use domain already very widespread, like the intelligent measuring appliance, the solid work paid by time control, the communication equipment, the guidance system, the domestic electric appliances and so on, Once each product used the monolithic integrated circuit, could get up causes theeffect which the product turned to a new generation, often before product range crown by adjective ‘ intelligence ' , like intelligence washer and so on. Nowsome factory's technical personnel or other extra-curricular electronic exploiter do certain products, are not the electric circuit are too complex, is the function is too simple, and is imitated extremely easily. Investigates its reason, possibly on card, in the product has not used on the monolithic integrated circuit or other programmable logical component.单片机简介单片机又称单片微控制器，它不是完成某一个逻辑功能的芯片，而是把一个计算机系统集成到一个芯片上。

单片机英文文献资料及翻译

单片机英文文献资料及翻译单片机(英文：Microcontroller)Microcontroller is a small computer on a single integrated circuit that contains a processor core, memory, and programmable input/output peripherals. Microcontrollers are designed for embedded applications, in contrast to the microprocessors used in personal computers or other general purpose applications.A microcontroller's processor core is typically a small, low-power computer dedicated to controlling the operation of the device in which it is embedded. It is often designed to provide efficient and reliable control of simple and repetitive tasks, such as switching on and off lights, or monitoring temperature or pressure sensors.MEMORYMicrocontrollers typically have a limited amount of memory, divided into program memory and data memory. The program memory is where the software that controls the device is stored, and is often a type of Read-Only Memory (ROM). The data memory, on the other hand, is used to store data that is used by the program, and is often volatile, meaning that it loses its contents when power is removed.INPUT/OUTPUTMicrocontrollers typically have a number of programmable input/output (I/O) pins that can be used to interface with external sensors, switches, actuators, and other devices. These pins can be programmed to perform specific functions,such as reading a sensor value, controlling a motor, or generating a signal. Many microcontrollers also support communication protocols like serial, parallel, and USB, allowing them to interface with other devices, including other microcontrollers, computers, and smartphones.APPLICATIONSMicrocontrollers are widely used in a variety of applications, including:- Home automation systems- Automotive electronics- Medical devices- Industrial control systems- Consumer electronics- RoboticsCONCLUSIONIn conclusion, microcontrollers are powerful and versatile devices that have become an essential component in many embedded systems. With their small size, low power consumption, and high level of integration, microcontrollers offer an effective and cost-efficient solution for controlling a wide range of devices and applications.。

单片机英文文献及翻译)

Validation and Testing of Design Hardening for Single Event Effects Using the 8051 MicrocontrollerAbstractWith the dearth of dedicated radiation hardened foundries, new and novel techniques are being developed for hardening designs using non-dedicated foundry services. In this paper, we will discuss the implications of validating these methods for the single event effects (SEE) in the space environment. Topics include the types of tests that are required and the design coverage (i.e., design libraries: do they need validating for each application?). Finally, an 8051 microcontroller core from NASA Institute of Advanced Microelectronics (IAμE) CMOS Ultra Low Power Radiation Tolerant (CULPRiT) design is evaluated for SEE mitigative techniques against two commercial 8051 devices.Index TermsSingle Event Effects, Hardened-By-Design, microcontroller, radiation effects.I. INTRODUCTIONNASA constantly strives to provide the best capture of science while operating in a space radiation environment using a minimum of resources [1,2]. With a relatively limited selection of radiation-hardened microelectronic devices that are often two or more generations of performance behind commercialstate-ofthe-art technologies, NASA’s performance of this task is quite challenging. One method of alleviating this is by the use of commercial foundry alternatives with no or minimally invasive design techniques for hardening. This is often called hardened-by-design (HBD).Building custom-type HBD devices using design libraries and automated design tools may provide NASA the solution it needs to meet stringent science performance specifications in a timely,cost-effective, and reliable manner.However, one question still exists: traditional radiation-hardened devices have lot and/or wafer radiation qualification tests performed; what types of tests are required for HBD validation?II. TESTING HBD DEVICES CONSIDERATIONSTest methodologies in the United States exist to qualify individual devices through standards and organizations such as ASTM, JEDEC, and MIL-STD- 883. Typically, TID (Co-60) and SEE (heavy ion and/or proton) are required for device validation. So what is unique to HBD devices?As opposed to a “regular” commercial-off-the-shelf (COTS) device or application specific integrated circuit (ASIC) where no hardening has been performed, one needs to determine how validated is the design library as opposed to determining the device hardness. That is, by using test chips, can we “qualify” a future device using the same library?Consider if Vendor A has designed a new HBD library portable to foundries B and C. A test chip is designed, tested, and deemed acceptable. Nine months later a NASA flight project enters the mix by designing a new device using Vendor A’s library. Does this device require complete radiation qualification testing? To answer this, other questions must be asked.How complete was the test chip? Was there sufficient statistical coverage of all library elements to validate each cell? If the new NASA design uses a partially or insufficiently characterized portion of the design library, full testing might be required. Of course, if part of the HBD was relying on inherent radiation hardness of a process, some of the tests (like SEL in the earlier example) may be waived.Other considerations include speed of operation and operating voltage. For example, if the test chip was tested statically for SEE at a power supply voltage of 3.3V, is the data applicable to a 100 MHz operating frequency at 2.5V? Dynamic considerations (i.e., nonstatic operation) include the propagated effects of Single Event Transients (SETs). These can be a greater concern at higher frequencies.The point of the considerations is that the design library must be known, the coverage used during testing is known, the test application must be thoroughly understood and the characteristics of the foundry must be known. If all these are applicable or have been validated by the test chip, then no testing may be necessary. A task within NASA’s Electronic Parts and Packaging (NEPP) Program was performed to explore these types of considerations.III. HBD TECHNOLOGY EVALUATION USING THE 8051 MICROCONTROLLERWith their increasing capabilities and lower power consumption, microcontrollers are increasingly being used in NASA and DOD system designs. There are existing NASA and DoD programs that are doing technology development to provide HBD. Microcontrollers are one such vehicle that is being investigated to quantify the radiation hardness improvement. Examples of these programs are the 8051 microcontroller being developed by Mission Research Corporation (MRC) and the IAμE (the focus of this study). As these HBD technologies become available, validation of the technology, in the natural space radiation environment, for NASA’s use in spaceflight systems is required.The 8051 microcontroller is an industry standard architecture that has broad acceptance, wide-ranging applications and development tools available. There are numerous commercial vendors that supply this controller or have it integrated into some type of system-on-a-chip structure. Both MRC and IAμE chose this device to demonstrate two distinctly different technologies for hardening. The MRC example of this is to use temporal latches that require specific timing to ensure that single event effects are minimized. The IAμE technology uses ultra low power, and layout and architecture HBD design rules to achieve their results. These are fundamentally different than the approach by Aeroflex-United Technologies Microelectronics Center (UTMC), the commercial vendor of a radiation–hardened 8051, that built their 8051 microcontroller using radiationhardened processes. This broad range of technology within one device structure makes the 8051an ideal vehicle for performing this technology evaluation.The objective of this work is the technology evaluation of the CULPRiT process [3] from IAμE. The process has been baselined against two other processes, the standard 8051 commercial device from Intel and a version using state-of-the-art processing from Dallas Semiconductor. By performing this side-by-side comparison, the cost benefit, performance, and reliability trade study can be done.In the performance of the technology evaluation, this task developed hardware and software for testing microcontrollers. A thorough process was done to optimize the test process to obtain as complete an evaluation as possible. This included taking advantage of the available hardware and writing software that exercised the microcontroller such that all substructures of the processor were evaluated. This process is also leading to a more complete understanding of how to test complex structures, such as microcontrollers, and how to more efficiently test these structures in the future.IV. TEST DEVICESThree devices were used in this test evaluation. The first is the NASA CULPRiT device, which is the primary device to be evaluated. The other two devices are two versions of a commercial 8051, manufactured by Intel and Dallas Semiconductor, respectively.The Intel devices are the ROMless, CMOS version of the classic 8052 MCS-51 microcontroller. They are rated for operation at +5V, over a temperature range of 0 to 70 °C and at a clock speeds of 3.5 MHz to 24 MHz. They are manufactured in Intel’s P629.0 CHMOS III-E process.The Dallas Semiconductor devices are similar in that they are ROMless 8052 microcontrollers, but they are enhanced in various ways. They are rated for operation from 4.25 to 5.5 Volts over 0 to 70 °C at clock speeds up to 25 MHz. They have a second full serial port built in, seven additional interrupts, a watchdog timer, a power fail reset, dual data pointers and variable speed peripheral access. In addition, the core is redesigned so that the machine cycle is shortened for most instructions, resulting in an effective processing ability that is roughly 2.5 times greater (faster) than the standard 8052 device. None of these features, other than those inherent in the device operation, were utilized in order to maximize the similarity between the Dallas and Intel test codes.The CULPRiT technology device is a version of the MSC-51 family compatible C8051 HDL core licensed from the Ultra Low Power (ULP) process foundry. The CULPRiT technology C8051 device is designed to operate at a supply voltage of 500 mV and includes an on-chip input/output signal level-shifting interface with conventional higher voltage parts. The CULPRiT C8051 device requires two separate supply voltages; the 500 mV and the desired interface voltage. The CULPRiT C8051 is ROMless and is intended to be instruction set compatible with the MSC-51 family.V. TEST HARDWAREThe 8051 Device Under Test (DUT) was tested as a component of a functional computer. Aside from DUT itself, the other componentsof the DUT computer were removed from the immediate area of the irradiation beam.A small card (one per DUT package type) with a unique hard-wired identifier byte contained the DUT, its crystal, and bypass capacitors (and voltage level shifters for the CULPRiT DUTs). This "DUT Board" was connected to the "Main Board" by a short 60-conductor ribbon cable. The Main Board had all other components required to complete the DUT Computer, including some which nominally are not necessary in some designs (such as external RAM, external ROM and address latch). The DUT Computer and the Test Control Computer were connected via a serial cable and communications were established between the two by the Controller (that runs custom designed serial interface software). This Controller software allowed for commanding of the DUT, downloading DUT Code to the DUT, and real-time error collection from the DUT during and post irradiation. A 1 Hz signal source provided an external watchdog timing signal to the DUT, whose watchdog output was monitored via an oscilloscope. The power supply was monitored to provide indication of latchup.VI. TEST SOFTWAREThe 8051 test software concept is straightforward. It was designed to be a modular series of small test programs each exercising a specific part of the DUT. Since each test was stand alone, they were loaded independently of each other for execution on the DUT. This ensured that only the desired portion of the 8051 DUT was exercised during the test and helped pinpoint location of errors that occur during testing. All test programs resided on the controller PC until loaded via the serial interface to the DUT computer. In this way, individual tests could have been modified at any time without the necessity of burning PROMs. Additional tests could have also been developed and added without impacting the overall test design. The only permanent code, which was resident on the DUT, was the boot code and serial code loader routines that established communications between the controller PC and the DUT.All test programs implemented:• An external Universal Asynchronous Receive and Transmit device (UART) for transmission of error information and communication to controller computer.• An external real-time clock for data error tag.•A watchdog routine designed to provide visual verification of 8051 health and restart test code if necessary.• A "foul-up" routine to reset program counter if it wanders out of code space.• An external telemetry data storage memory to provide backup of data in the event of an interruption in data transmission.The brief description of each of the software tests used is given below. It should be noted that for each test, the returned telemetry (including time tag) was sent to both the test controller and the telemetry memory, giving the highest reliability that all data is captured.Interrupt –This test used 4 of 6 available interrupt vectors (Serial, External, Timer0 Overflow, and Timer1 Overflow) to trigger routines that sequentially modified a value in the accumulator which was periodically compared to a known value. Unexpected values were transmitted with register information.Logic –This test performed a series of logic and math computations and provided three types of error identifications: 1) addition/subtraction, 2) logic and 3) multiplication/division. All miscompares of computations and expected results were transmitted with other relevant register information.Memory – This test loaded internal data memory at locations D:0x20 through D:0xff (or D:0x20 through D:0x080 for the CULPRiT DUT), indirectly, with an 0x55 pattern. Compares were performed continuously and miscompares were corrected while error information and register values were transmitted.Program Counter -The program counter was used to continuously fetch constants at various offsets in the code. Constants were compared with known values and miscompares were transmitted along with relevant register information. Registers – This test loaded each of four (0,1,2,3) banks of general-purpose registers with either 0xAA (for banks 0 and 2) or 0x55 (for banks 1 and 3). The pattern was alternated in order to test the Program Status Word (PSW) special function register, which controls general-purpose register bank selection. General-purpose register banks were then compared with their expected values. All miscompares were corrected and error information was transmitted.Special Function Registers (SFR) – This test used learned static values of 12 out 21 available SFRs and then constantly compared the learned value with the current one. Miscompares were reloaded with learned value and error information was transmitted.Stack – This test performed arithmetic by pushing and popping operands on the stack. Unexpected results were attributed to errors on the stack or to the stack pointer itself and were transmitted with relevant register information.VII. TEST METHODOLOGYThe DUT Computer booted by executing the instruction code located at address 0x0000. Initially, the device at this location was an EPROM previously loaded with "Boot/Serial Loader" code. This code initialized the DUT Computer and interface through a serial connection to the controlling computer, the "Test Controller". The DUT Computer downloaded Test Code and put it into Program Code RAM (located on the Main Board of the DUT Computer). It then activated a circuit which simultaneously performed two functions: held the DUT reset line active for some time (~10 ms); and, remapped the Test Code residing in the Program Code RAM to locate it to address 0x0000 (the EPROM will no longer be accessible in the DUT Computer's memory space). Upon awaking from the reset, the DUT computer again booted by executing the instruction code at address 0x0000, except this time that code was not be the Boot/Serial Loader code but the Test Code.The Test Control Computer always retained the ability to force the reset/remap function, regardless of the DUT Computer's functionality. Thus, if the test ran without a Single Event Functional Interrupt (SEFI) either the DUT Computer itselfor the Test Controller could have terminated the test and allowed the post-test functions to be executed. If a SEFI occurred, the Test Controller forced a reboot into Boot/Serial Loader code and then executed the post-test functions. During any test of the DUT, the DUT exercised a portion of its functionality (e.g., Register operations or Internal RAM check, or Timer operations) at the highest utilization possible, while making a minimal periodic report to the Test Control Computer to convey that the DUT Computer was still functional. If this reportceased, the Test Controller knew that a SEFI had occurred. This periodic data was called "telemetry". If the DUT encountered an error that was not interrupting the functionality (e.g., a data register miscompare) it sent a more lengthy report through the serial port describing that error, and continued with the test.VIII.DISCUSSIONA. Single Event LatchupThe main argument for why latchup is not an issue for the CULPRiT devices is that the operating voltage of 0.5 volts should be below the holding voltage required for latchup to occur. In addition to this, the cell library used also incorporates the heavy dual guard-barring scheme [4]. This scheme has been demonstrated multiple times to be very effective in rendering CMOS circuits completely immune to SEL up to test limits of 120 MeV-cm2/mg. This is true in circuits operating at 5, 3.3, and 2.5 Volts, as well as the 0.5 Volt CULPRiT circuits. In one case, a 5 Volt circuit fabricated on noncircuits wafers even exhibited such SEL immunity.B. Single Event UpsetThe primary structure of the storage unit used in the CULPRiT devices is the Single Event Resistant Topology (SERT) [5]. Given the SERT cell topology and a single upset node assumption, it is expected that the SERT cell will be completely immune to SEUs occurring internal to the memory cell itself. Obviously there are other things going on. The CULPRiT 8051 results reported here are quite similar to some resultsobtained with a CULPRiT CCSDS lossless compression chip (USES) [6]. The CULPRiT USES was synthesized using exactly the same tools and library as the CULPRiT 8051.With the CULPRiT USES, the SEU cross section data [7] was taken as a function of frequency at two LET values, 37.6 and 58.5 MeV-cm2/mg. In both cases the data fit well to a linear model where cross section is proportional to clock. In the LET 37.6 case, the zero frequency intercept occurred essentially at the zero cross section point, indicating that virtually all of these SEUs are captured SETs from the combinational logic. The LET 58.5 data indicated that the SET (frequency dependent) component is sitting on top of a "dc-bias" component –presumably a second upset mechanism is occurring internal to the SERT cells only at a second, higher LET threshold.The SET mitigation scheme used in the CULPRiT devices is based on the SERT cell's fault tolerant input property when redundant input data is provided to separate storage nodes. The idea is that the redundant input data is provided through a total duplication of combinational logic (referred to as “dual rail design”) such that a simple SET on one rail cannot produce an upset. Therefore, some other upset mechanism must be happening. It is possible that a single particle strike is placing an SET on both halves of the logic streams, allowing an SET to produce an upset. Care was taken to separate the dual sensitive nodes in the SERT cell layouts but the automated place-and-route of the combinatorial logic paths may have placed dual sensitive nodes close enough.At this point, the theory for the CULPRiT SEU response is that at about an LET of 20, the energy deposition is sufficiently wide enough (and in the right locations) to produce an SET in both halves of the combinatorial logic streams. Increasing LET allows for more regions to be sensitive to this effect, yielding a larger cross section. Further, the second SEU mechanism that starts at an LET of about 40-60 has to do with when the charge collection disturbance cloud gets large enough to effectively upset multiples of the redundant storage nodes within the SERT cell itself. In this 0.35 μm library, the node separation is several microns. However, since it takes less charge to upset a node operating at 0.5 Volts, with transistors having effective thresholds around 70 mV, this is likely the effect being observed. Also the fact that the per-bit memory upset cross section for the CULPRiT devices and the commercial technologies are approximately equal, as shown in Figure 9, indicates that the cell itself has become sensitive to upset.IX. SUMMARYA detailed comparison of the SEE sensitivity of a HBD technology (CULPRiT) utilizing the 8051 microcontroller as a test vehicle has been completed. This paper discusses the test methodology used and presents a comparison of the commercial versus CULPRiT technologies based on the data taken. The CULPRiT devices consistently show significantly higher threshold LETs and an immunity to latchup. In all but the memory test at the highest LETs, the cross section curves for all upset events is one to two orders of magnitude lower than the commercial devices. Additionally, theory is presented, based on the CULPRiT technology, that explain these results.This paper also demonstrates the test methodology for quantifying the level of hardness designed into a HBD technology. By using the HBD technology in a real-world device structure (i.e., not just a test chip), and comparing results to equivalent commercial devices, one can have confidence in the level of hardness that would be available from that HBD technology in any circuit application.ACKNOWLEDGEMENTSThe authors of this paper would like to acknowledge the sponsors of this work. These are the NASA Electronic Parts and Packaging Program (NEPP), NASA Flight Programs, and the Defense Threat Reduction Agency (DTRA).。

单片机外文翻译

中文2623字附录四外文资料翻译A microcontroller (or MCU) is a computer-on-a-chip. It is a type of microprocessor emphasizing self-sufficiency and cost-effectiveness, in contrast to a general-purpose microprocessor (the kind used in a PC).The majority of computer systems in use today are embedded in other machinery, such as telephones, clocks, appliances, vehicles, and infrastructure. An embedded system usually has minimal requirements for memory and program length and may require simple but unusual input/output systems. For example, most embedded systems lack keyboards, screens, disks, printers, or other recognizable I/O devices of a personal computer. They may control electric motors, relays or voltages, and read switches, variable resistors or other electronic devices. Often, the only I/O device readable by a human is a single light-emitting diode, and severe cost or power constraints can even eliminate that.In contrast to general-purpose CPUs, microcontrollers do not have an address bus or a data bus, because they integrate all the RAM and non-volatile memory on the same chip as the CPU. Because they need fewer pins, the chip can be placed in a much smaller, cheaper package.Integrating the memory and other peripherals on a single chip and testing them as a unit increases the cost of that chip, but often results in decreased net cost of the embedded system as a whole. (Even if the cost of a CPU that has integrated peripherals is slightly more than the cost of a CPU + external peripherals, having fewer chips typically allows a smaller and cheaper circuit board, and reduces the labor required to assemble and test the circuit board). This trend leads to design.A microcontroller is a single integrated circuit, commonly with the following features: central processing unit - ranging from small and simple 4-bit processors to sophisticated 32- or 64-bit processors input/output interfaces such as serial ports(UARTs)other serial communications interfaces like I²C, Serial Peripheral Interface and Controller Area Network for system interconnect peripherals such as timers and watchdog RAM for data storage ROM, EPROM, EEPROM or Flash memory for program storage clock generator - often an oscillator for a quartz timing crystal, resonator or RC circuit many include analog-to-digital convertersThis integration drastically reduces the number of chips and the amount of wiring and PCB space that would be needed to produce equivalent systems using separate chips and have proved to be highly popular in embedded systems since their introduction in the 1970s.Some microcontrollers can afford to use a Harvard architecture: separate memory buses for instructions and data, allowing accesses to take place concurrently.The decision of which peripheral to integrate is often difficult. The Microcontroller vendors often trade operating frequencies and system design flexibility against time-to-market requirements from their customers and overall lower system cost. Manufacturers have to balance the need to minimize the chip size against additional functionality.Microcontroller architectures are available from many different vendors in so many varieties that each instruction set architecture could rightly belong to a category of their own. Chief among these are the 8051, Z80 and ARM derivatives.Higher performance with the 80C51：Specifically targeted at high-end 8-bit microprocessor applications requiring low power consumption, the 80C51 has all of the 8051's architectural features, including its enhanced CPU and I/O functions. The on-chip program memory size remains 4 Kbytes, with a full 64-kbyte external range. The 128byte on-chip RAM also is externally expandable to 64kbytes. Also , on board are two 16-bit time counters , a full duplex serial port, and a 1-bit Boolean processor for control functions, Figure 2b shows the 80C51's pinot for both the expanded and the port mode.The 80S52 has a Vcc range of 4 to 6 V and is TTL-compatible between 4.5-5.5V, above 4.5V, the chip operates at clock rates of up to 15 MHz (see the table).the 80S52 offers an idle mode for lower power dissipation .This mode is initiated by setting a bit in a new on-chip register, called the PCON register that resides in previously unused chip area. When the bit is set, the CPU is disabled, but the timer-counter, interrupts, and serial port continue to function normally. A reset or any enabled interrupt terminates the idle mode.If an interrupt ends the idle mode. all register data remain unchanged and the interrupt is serviced. idle is implemented in much the same way as on the 80c49, that is, by splitting the on-chip clocks into two signals, one for the CPU and the other for the active idle circuitry, Using this technique, current drain in the idle mode is about 1 mA at a supply voltage of 6 V and an operating frequency of 15 MHzOther bits of the PCON registers can be set as flags to determine whether an interrupt has been used for its normal function or to terminate the idle mode. These flags permit an interrupt to do double duty, instead of having to dedicate a particular interrupt specifically to this mode.The AT89S2 is a low-power, high-performance CMOS 8-bit microcomputer with 8K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications.The AT89S52 provides the following standard features:8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a six vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power-down Mode saves the RAM contents butfreezes the oscillator disabling all other chip functions until the next hardware reset.Pin DescriptionVCC：Supply voltage.GND：Ground.Port 0：Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs.Port 0 may also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups.Port 0 also receives the code bytes during Flash programming,and outputs the code bytes during programverification. External pullups are required during programverification.Port 1: Port 1 is an 8-bit bi-directional I/O port with internal pullups.The Port 1 output buffers can sink/source four TTL inputs.When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2: Port 2 is an 8-bit bi-directional I/O port with internal pullups.The Port 2 output buffers can sink/source four TTL inputs.When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 2 pins that are externally being pulled low will source current, because of the internal pullups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses. In this application, it uses strong internal pullupswhen emitting 1s. During accesses to external data memory that use 8-bit addresses, Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3: Port 3 is an 8-bit bi-directional I/O port with internal pullups.The Port 3 output buffers can sink/source four TTL inputs.When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs.RST: Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROG: Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSEN: Program Store Enable is the read strobe to external program memory.When the AT89S52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPP: External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.EA should be strapped to VCC for internal program executions.This pin also receives the 12-volt programming enable voltage(VPP) during Flash programming, for parts that require12-volt VPP.XTAL1: Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2: Output from the inverting oscillator amplifier.单片机即单片微型计算机，是把中央处理器、存储器、定时/计数器、输入输出接口都集成在一块集成电路芯片上的微型计算机。

单片机英文文献及翻译

附录A英文文献翻译原文Temperature Control Using a Microcontroller:An Interdisciplinary Undergraduate Engineering Design ProjectJames S. McDonaldDepartment of Engineering ScienceTrinity UniversitySan Antonio, TX 78212AbstractThis paper describes an interdisc iplinary design project which was done under the author’s supervision by a group of four senior students in the Department of Engineering Science at Trinity University. The objective of the project was to develop a temperature control system for an air-filled chamber. The system was to allow entry of a desired chamber temperature in a prescribed range and to exhibit overshoot and steady-state temperature error of less than 1 degree Kelvin in the actual chamber temperature step response. The details of the design developed by this group of students, based on a Motorola MC68HC05 family microcontroller, are described. The pedagogical value of the problem is also discussed through a description of some of the key steps in the design process. It is shown that the solution requires broad knowledge drawn from several engineering disciplines including electrical, mechanical, and control systems engineering.1 IntroductionThe design project which is the subject of this paper originated from a real-world application.A prototype of a microscope slide dryer had been developed around an OmegaTM modelCN-390 temperature controller, and the objective was to develop a custom temperature control system to replace the Omega system. The motivation was that a custom controller targeted specifically for the application should be able to achieve the same functionality at a much lower cost, as the Omega system is unnecessarily versatile and equipped to handle a wide variety of applications.The mechanical layout of the slide dryer prototype is shown in Figure 1. The main element of the dryer is a large, insulated, air-filled chamber in which microscope slides, each with a tissue sample encased in paraffin, can be set on caddies. In order that the paraffin maintain the proper consistency, the temperature in the slide chamber must be maintained at a desired (constant) temperature. A second chamber (the electronics enclosure) houses a resistive heater and the temperature controller, and a fan mounted on the end of the dryer blows air across theheater, carrying heat into the slide chamber. This design project was carried out during academic year 1996–97 by four students under the author’s supervision as a Senior Design project in the Department of Engineering Science at Trinity University. The purpose of this paper isto describe the problem and the students’ solution in some detail, and to discuss some of the pedagogical opportunities offered by an interdisciplinary design project of this type. The students’ own report was presented a t the 1997 National Conference on Undergraduate Research [1]. Section 2 gives a more detailed statement of the problem, including performance specifications, and Section 3 describes the students’ design. Section 4 makes up the bulk of the paper, and discusses in some detail several aspects of the design process which offer unique pedagogical opportunities. Finally, Section 5 offers some conclusions.2 Problem StatementThe basic idea of the project is to replace the relevant parts of the functionality of an Omega CN-390 temperature controller using a custom-designed system. The application dictates that temperature settings are usually kept constant for long periods of time, but it’s nonetheless important that step changes be tracked in a “reasonable” manner. Thus the main requirements boil down to·allowing a chamber temperature set-point to be entered,·displaying both set-point and actual temperatures, and·tracking step changes in set-point temperature with acceptable rise time, steady-state error, and overshoot.Although not explicitly a part of the specifications in Table 1, it was clear that the customer desired digital displays of set-point and actual temperatures, and that set-point temperature entry should be digital as well (as opposed to, say, through a potentiometer setting).3 System DesignThe requirements for digital temperature displays and setpoint entry alone are enough to dictate that a microcontrollerbased design is likely the most appropriate. Figure 2 shows a block diagram of the stude nts’ design.The microcontroller, a MotorolaMC68HC705B16 (6805 for short), is the heart of the system. It accepts inputs from a simple four-key keypad which allow specification of the set-point temperature, and it displays both set-point and measured chamber temperatures using two-digit seven-segment LED displays controlled by a display driver. All these inputs and outputs are accommodated by parallel ports on the 6805. Chamber temperature is sensed using apre-calibrated thermistor and input via one of the 6805’s analog-to-digital inputs. Finally, a pulse-width modulation (PWM) output on the 6805 is used to drive a relay which switches line power to the resistive heater off and on.Figure 3 shows a more detailed schematic of the electronics and their interfacing to the 6805. The keypad, a Storm 3K041103, has four keys which are interfaced to pins PA0{ PA3 of Port A, configured as inputs. One key functions as a mode switch. Two modes are supported: set mode and run mode. In set mode two of the other keys are used to specify the set-point temperature: one increments it and one decrements. The fourth key is unused at present. The LED displays are driven by a Harris Semiconductor ICM7212 display driver interfaced to pins PB0{PB6 of Port B, configured as outputs. The temperature-sensing thermistor drives, through a voltage divider, pin AN0 (one of eight analog inputs). Finally, pin PLMA (one of two PWM outputs) drives the heater relay.Software on the 6805 implements the temperature control algorithm, maintains the temperature displays, and alters the set-point in response to keypad inputs. Because it is not complete at this writing, software will not be discussed in detail in this paper. The control algorithm in particular has not been determined, but it is likely to be a simple proportional controller and certainly not more complex than a PID. Some control design issues will be discussed in Section 4, however.4 The Design ProcessAlthough essentially the project is just to build a thermostat, it presents many nice pedagogical opportunities. The knowledge and experience base of a senior engineering undergraduate are just enough to bring him or her to the brink of a solution to various aspects of the problem. Yet, in each case, realworld considerations complicate the situation significantly.Fortunately these complications are not insurmountable, and the result is a very beneficial design experience. The remainder of this section looks at a few aspects of the problem which present the type of learning opportunity just described. Section 4.1 discusses some of the features of a simplified mathematical model of the thermal properties of the system and how it can beeasily validated experimentally. Section 4.2 describes how realistic control algorithm designs can be arrived at using introductory concepts in control design. Section 4.3 points out some important deficiencies of such a simplified modeling/control design process and how they can be overcome through simulation. Finally, Section 4.4 gives an overview of some of the microcontroller-related design issues which arise and learning opportunities offered.4.1 MathematicalModelLumped-element thermal systems are described in almost any introductory linear control systems text, and just this sort of model is applicable to the slide dryer problem. Figure 4 shows a second-order lumped-element thermal model of the slide dryer. The state variables are the temperatures Ta of the air in the box and Tb of the box itself. The inputs to the system are the power output q(t) of the heater and the ambient temperature T¥. ma and mb are the masses of the air and the box, respectively, and Ca and Cb their specific heats. μ1 and μ2 are heat transfer coefficients from the air to the box and from the box to the external world, respectively.It’s not hard to show that the (linearized) state equationscorresponding to Figure 4 areTaking Laplace transforms of (1) and (2) and solving for Ta(s), which is the output of interest, gives the following open-loop model of the thermal system:where K is a constant and D(s) is a second-order polynomial.K, tz, and the coefficients ofD(s) are functions of the variousparameters appearing in (1) and (2).Of course the various parameters in (1) and (2) are completely unknown, but it’s not hard to show that, regardless of their values, D(s) has two real zeros. Therefore the main transfer function of interest (which isthe one from Q(s), since we’ll assume constant ambient temperature) can be writtenMoreover, it’s not too hard to show that 1=tp1 <1=tz <1=tp2, i.e., that the zero lies between the two poles. Both of these are excellent exercises for the student, and the result is the openloop pole-zero diagram of Figure 5.Obtaining a complete thermal model, then, is reduced to identifying the constant K and the three unknown time constants in (3). Four unknown parameters is quite a few, but simple experiments show that 1=tp1 _ 1=tz;1=tp2 so that tz;tp2 _ 0 are good approximations. Thus the open-loop system is essentially first-order and can therefore be written(where the subscript p1 has been dropped).Simple open-loop step response experiments show that,for a wide range of initial temperatures and heat inputs, K _0:14 _=W and t _ 295 s.14.2 Control System DesignUsing the first-order model of (4) for the open-loop transfer function Gaq(s) and assuming for the moment that linear control of the heater power output q(t) is possible, the block diagram of Figure 6 represents the closed-loop system. Td(s) is the desired, or set-point, temperature,C(s) is the compensator transfer function, and Q(s) is the heater output in watts.Given this simple situation, introductory linear control design tools such as the root locus method can be used to arrive at a C(s) which meets the step response requirements on rise time, steady-state error, and overshoot specified in Table 1. The upshot, of course, is that a proportional controller with sufficient gain can meet all specifications. Overshoot is impossible, and increasing gains decreases both steady-state error and rise time.Unfortunately, sufficient gain to meet the specifications may require larger heat outputs than the heater is capable of producing. This was indeed the case for this system, and the result is that the rise time specification cannot be met. It is quite revealing to the student how useful such an oversimplified model, carefully arrived at, can be in determining overall performance limitations.4.3 Simulation ModelGross performance and its limitations can be determined using the simplified model of Figure 6, but there are a number of other aspects of the closed-loop system whose effects on performance are not so simply modeled. Chief among these are·quantization error in analog-to-digital conversion of the measured temperature and· the use of PWM to control the heater.Both of these are nonlinear and time-varying effects, and the only practical way to study them is through simulation (or experiment, of course).Figure 7 shows a SimulinkTM block diagram of the closed-loop system which incorporates these effects. A/D converter quantization and saturation are modeled using standard Simulink quantizer and saturation blocks. Modeling PWM is more complicated and requires a customS-function to represent it.This simulation model has proven particularly useful in gauging the effects of varying thebasic PWM parameters and hence selecting them appropriately. (I.e., the longer the period, the larger the temperature error PWM introduces. On the other hand, a long period is desirable to avoid excessiv e relay “chatter,” among other things.) PWM is often difficult for students to grasp, and the simulation model allows an exploration of its operation and effects which is quite revealing.4.4 The MicrocontrollerSimple closed-loop control, keypad reading, and display control are some of the classic applications of microcontrollers, and this project incorporates all three. It is therefore an excellent all-around exercise in microcontroller applications. In addition, because the project isto produce an actua l packaged prototype, it won’t do to use a simple evaluation board with theI/O pins jumpered to the target system. Instead, it’s necessary to develop a complete embedded application. This entails the choice of an appropriate part from the broad range offered in a typical microcontroller family and learning to use a fairly sophisticated development environment. Finally, a custom printed-circuit board for the microcontroller and peripherals must be designed and fabricated.Microcontroller Selection. In view of existing local expertise, the Motorola line of microcontrollers was chosen for this project. Still, this does not narrow the choice down much. A fairly disciplined study of system requirements is necessary to specify which microcontroller, out of scores of variants, is required for the job. This is difficult for students, as they generally lack the experience and intuition needed as well as the perseverance to wade through manufacturers’ selection guides.Part of the problem is in choosing methods for interfacing the various peripherals (e.g., what kind of display driver should be used?). A study of relevant Motorola application notes [2, 3, 4] proved very helpful in understandingwhat basic approaches are available, and what microcontroller/peripheral combinations should be considered.The MC68HC705B16 was finally chosen on the basis of its availableA/D inputs and PWMoutputs as well as 24 digital I/O lines. In retrospect this is probably overkill, as only oneA/D channel, one PWM channel, and 11 I/O pins are actually required (see Figure 3). The decision was made to err on the safe side because a complete development system specific to the chosen part was necessary, and the project budget did not permit a second such system to be purchased should the firstprove inadequate.Microcontroller Application Development. Breadboarding of the peripheral hardware, development of microcontroller software, and final debugging and testing of a customprinted-circuit board for the microcontroller and peripherals all require a development environment of some kind. The choice of a development environment, like that of themicrocontroller itself, can be bewildering and requires some faculty expertise. Motorola makes three grades of development environment ranging from simple evaluation boards (at around $100) to full-blown real-time in-circuit emulators (at more like $7500). The middle option was chosen for this project: the MMEVS, which consists of _ a platform board (which supports all 6805-family parts), _ an emulator module (specific to B-series parts), and _ a cable and target head adapter (package-specific). Overall, the system costs about $900 and provides, with some limitations, in-circuit emulation capability. It also comes with the simple but sufficient software development environment RAPID [5].Students find learning to use this type of system challenging, but the experience they gain in real-world microcontroller application development greatly exceeds the typical first-course experience using simple evaluation boards.Printed-Circuit Board. The layout of a simple (though definitely not trivial) printed-circuit board is another practical learning opportunity presented by this project. The final board layout, with package outlines, is shown (at 50% of actual size) in Figure 8. The relative simplicity of the circuit makes manual placement and routing practical—in fact, it likely gives better results than automatic in an application like this—and the student is therefore exposed to fundamental issues of printed-circuit layout and basic design rules. The layout software used was the very nice package pcb,2 and the board was fabricated in-house with the aid of our staff electronics technician.5 ConclusionThe aim of this paper has been to describe an interdisciplinary, undergraduate engineering design project: a microcontroller- based temperature control system with digital set-point entry and set-point/actual temperature display. A particular design of such a system has been described, and a number of design issues which arise—from a variety of engineering disciplines—have been discussed. Resolution of these issues generally requires knowledge beyond that acquired in introductory courses, but realistically accessible to advance undergraduate students, especiallywith the advice and supervision of faculty.Desirable features of the problem, from a pedagogical viewpoint, include the use of a microcontroller with simple peripherals, the opportunity to usefully apply introductorylevel modeling of physical systems and design of closed-loop controls, and the need for relatively simple experimentation (for model validation) and simulation (for detailed performance prediction). Also desirable are some of the technologyrelated aspects of the problem including practical use of resistive heaters and temperature sensors (requiring knowledge of PWM and calibration techniques, respectively), microcontroller selection and use of development systems, and printedcircuit design.AcknowledgementsThe author would like to acknowledge the hard work, dedication, and ability shown by the students involved in this project: Mark Langsdorf, Matt Rall, PamRinehart, and David Schuchmann. It is their project, and credit for its success belongs to them.References[1] M. Langsdorf, M. Rall, D. Schuchmann, and P. Rinehart,“Temperature control of a microscope slide dryer,” in1997 National Conference on Undergraduate Research,(Austin, TX), April 1997. Poster presentation.[2] Motorola, Inc., Phoenix, AZ, Temperature Measurementand Display Using the MC68HC05B4 and the MC14489,1990. Motorola SemiconductorApplicationNote AN431.[3] Motorola, Inc., Phoenix, AZ, HC05 MCU LED DriveTechniques Using the MC68HC705J1A, 1995. MotorolaSemiconductor Application Note AN1238.[4] Motorola, Inc., Phoenix, AZ, HC05MCU Keypad DecodingTechniques Using the MC68HC705J1A, 1995. MotorolaSemiconductor Application Note AN1239.[5] Motorola, Inc., Phoenix, AZ, RAPID Integrated DevelopmentEnvironment User’s Manual, 1993. (RAPID wasdeveloped by P & E Microcomputer Systems, Inc.).附录B英文文献翻译中文单片机温度控制：一个跨学科的本科生工程设计项目JamesS.McDonald工程科学系三一大学德克萨斯州圣安东尼奥市78212摘要本文所描述的是作者领导由四个三一大学高年级学生组成的团队进行的一个跨学科工程项目的设计。

自动化专业单片机相关外文文献英文文献外文翻译中英对照

本科生毕业论文(外文翻译) 译文名称：MCS -51 系列单片机的功能和结构专业：自动化班次：学员：指导教员：评阅人：完成时间：2022 年11 月30 日Structure and function of the MCS-51 series Structure and function of the MCS-51 series one-chip computer is a name ofa piece of one-chip computer series which Intel Company produces. This company introduced 8 top-grade one-chip computers of MCS-51 series in 1980 after introducing 8 one-chip computers of MCS-48 series in 1976. It belong to alot of kinds this line of one-chip computer the chips have,such as 8051, 8031, 8751, 80C51BH, 80C31BH,etc., their basic composition, basic performance and instruction system are all the same. 8051 daily representatives- 51 serial one-chip computers .An one-chip computer system is made up of several following parts: ( 1) One microprocessor of 8 (CPU). ( 2) At slice data memory RAM (128B/256B),it use not depositting not can reading /data that write, such as result not middle of operation, final result and data wanted to show, etc. ( 3) Procedure memory ROM/EPROM (4KB/8KB ), is used to preserve the procedure , some initial data and form in slice. But does not take ROM/EPROM within some one-chip computers, such as 8031 , 8032, 80C ,etc.. ( 4) Four 8 run side by side I/O interface P0 four P3, each mouth can use as introduction , may use as exporting too. ( 5) Two timer / counter, each timer / counter may set up and count in the way, used to count to the external incident, can set up into a timing way too, and can according to count or result of timing realize the control of the computer. ( 6) Five cut off cutting off the control system of the source . ( 7) One all duplexing serial I/O mouth of UART (universal asynchronous receiver/transmitter (UART) ), is it realize one-chip computer or one-chip computer and serial communication of computer to use for. ( 8) Stretch oscillator and clock produce circuit, quartz crystal finely tune electric capacity need outer. Allow oscillation frequency as 12 megahertas now at most. Every the above-mentioned part was joined through the inside data bus .Among them, CPU is a core of the one-chip computer, it is the control of the computer and command centre, made up of such parts as arithmetic unit and controller , etc.. The arithmetic unit can carryon 8 persons of arithmetic operation and unit ALU of logic operation while including one, the 1 storing device temporarilies of 8, storing device 2 temporarily, 8's accumulation device ACC, register B and procedure state register PSW, etc. Person who accumulate ACC count by 2 input ends entered of checking etc. temporarily as one operation often, come from person who store 1 operation is it is it make operation to go on to count temporarily , operation result and loopback ACC with another one. In addition, ACC is often regarded as the transfer station of data transmission on 8051 inside . The same as general microprocessor, it is the busiest register. Help remembering that agreeing with A expresses in the order. The controller includes the procedure counter , the order is depositted, the order decipher, the oscillator and timing circuit, etc. The procedure counter is made up of counter of 8 for two, amounts to 16. It is a byte address counter of the procedure in fact, the content is the next IA that will carried out in PC. The content which changes it can change the direction that the procedure carries out . Shake the circuit in 8051 one-chip computers, only need outer quartz crystal and frequency to finely tune the electric capacity, its frequency range is its 12MHZ of 1.2MHZ. This pulse signal, as 8051 basic beats of working, namely the minimum unit of time. 8051 is the same as other computers, the work in harmony under the control of the basic beat, just like an orchestra according to the beat play that is commanded.There are ROM (procedure memory , can only read ) and RAM in 8051 slices (data memory, can is it can write ) two to read, they have each independent memory address space, dispose way to be the same with general memory of computer. Procedure 8051 memory and 8751 slice procedure memory capacity 4KB, address begin from 0000H, used for preserving the procedure and form constant. Data 8051- 8751 8031 of memory data memory 128B, address false 00FH, use for middle result to deposit operation, the data are stored temporarily and the data are buffered etc.. In RAM of this 128B, there is unit of 32 byteses that can be appointed as the job register, this and generalmicroprocessor is different, 8051 slice RAM and job register rank one formation the same to arrange the location. It is not very the same that the memory of MCS-51 series one-chip computer and general computer disposes the way in addition. General computer for first address space, ROM and RAM can arrangein different space within the range of this address at will, namely the addressesof ROM and RAM, with distributing different address space in a formation. While visiting the memory, corresponding and only an address Memory unit, can ROM, it can be RAM too, and by visiting the order similarly. This kind of memory structure is called the structure of Princeton. 8051 memories are divided into procedure memory space and data memory space on the physics structure, there are four memory spaces in all: The procedure stores in one and data memory space outside data memory and one in procedure memory space and one outside one, the structure forms of this kind of procedure device and data memory separated form data memory, called Harvard structure. But use the angle from users, 8051 memory address space is divided into three kinds: (1) In the slice, arrange blocks of FFFFH , 0000H of location , in unison outside the slice (use 16 addresses). (2) The data memory address space outside one of 64KB, the address is arranged from 0000H 64KB FFFFH (with 16 addresses ) too to the location. (3) Data memory address space of 256B (use 8 addresses). Three above-mentioned memory space addresses overlap, for distinguishing and designing the order symbol of different data transmission in the instruction system of 8051: CPU visit slice, ROM order spend MOVC , visit block RAM order uses MOVX outside the slice, RAM order uses MOV to visit in slice.8051 one-chip computer have four 8 walk abreast I/O port, call P0, P1, P2 and P3. Each port is 8 accurate two-way mouths, accounts for 32 pins altogether. Every one I/O line can be used as introduction and exported independently. Each port includes a latch (namely special function register ), one exports the driver and a introduction buffer . Make data can latch when outputting, data can buffer when making introduction , but four function of passway these self-same.Expand among the system of memory outside having slice, four port these may serve as accurate two-way mouth of I/O in common use. Expand among the system of memory outside having slice, P2 mouth see high 8 address off; P0 mouth is a two-way bus, send the introduction of 8 low addresses and data / export in timesharingThe circuit of 8051 one-chip computers and four I/O ports is very ingenious in design. Familiar with I/O port logical circuit, not only help to use ports correctly and rationally, and will inspire to designing the peripheral logical circuit of one-chip computer to some extent. Load ability and interface of port have certain requirement, because output grade, P0 of mouth and P1 end output, P3 of mouth grade different at structure, so, the load ability and interface of its door demand to have nothing in common with each other. P0 mouth is different from other mouths, its output grade draws the resistance supremly. When using it as the mouth in common use to use, output grade is it leak circuit to turn on, is it is it urge NMOS draw the resistance on taking to be outer with it while inputting toEvery one with P0 mouth can drive 8 Model LS TTL load to export. P1 mouth is an accurate two-way mouth too, used as I/O in common use. Different from P0 mouth output of circuit its, draw load resistance link with power on inside have. In fact, the resistance is that two effects are in charge of FET and together: One FET is in charge of load, its resistance is regular. Another one can is it lead to work with close at two state, make its President resistance value change approximate 0 or group value heavy two situation very. When it is 0 that the resistance is approximate , can draw the pin to the high level fast ; When resistance value is very large, P1 mouth, in order to hinder the introduction state high. Output as P1 mouth high electricity at ordinary times, can is it draw electric current load to offer outwards, draw the resistance on needn't answer and thenning. Here when the port is used as introduction, must write into 1 to the corresponding latch first too, make FET end. Relatively about 20,000 ohmsbecause of the load resistance in scene and because 40,000 ohms, will not exert an influence on the data that are input. The structure of P2 some mouth is similar to P0 mouth, there are MUX switches. Is it similar to mouth partly to urge, but mouth large a conversion controls some than P1. P3 mouth one multi-functionalthese, make her besides accurate two-way function with P1 mouth just, can alsodetermines to be to output data of latch to output second signal of function. Act as W =At 1 o'clock, output Q end signal; Act as Q =At 1 o'clock, can output W line signal . At the time of programming, it is that the first function is still the second function but needn't have software that set up P3 mouth in advance . It hardware not inside is the automatic to have two function outputted when CPU carries on SFR and seeks the location (the location or the byte ) to visit to P3 mouth /at not lasting lining, there are inside hardware latch Qs =1.The operation principle of P3 mouth is similar to P1 mouth.Output grade , P3 of mouth , P1 of P1 , connect with inside have load resistance of drawing , every one of they can drive 4 Model LS TTL load to output. As while inputting the mouth, any TTL or NMOS circuit can drive P1 of 8051 one-chip computers as P3 mouth in a normal way . Because draw resistance on output grade of them have, can open a way collector too or drain-source resistance is it urge to open a way, do not need to have the resistance of drawing outerly . Mouths are all accurate two-way mouths too. When the conduct is input, must write the corresponding port latch with 1 first . As to 80C51 one-chip computer, port can only offer milliampere of output electric currents, is it output mouth go when urging one ordinary basing of transistor to regard as, should contact a resistance among the port and transistor base , in order to the electricity while restraining the high level from exporting P1~P3 Being restored to the throne is the operation of initializing of an one-chip computer. Its main function is to turn PC into 0000H initially , make theone-chip computer begin to hold the conduct procedure from unit 0000H. Except that the ones that enter the system are initialized normally,as because procedure operate it make mistakes or operate there aren't mistake, in order to extricate oneself from a predicament , need to be pressed and restored to the throne the key restarting too. It is an input end which is restored to the throne the signal in 8051 China RST pin. Restore to the throne signal high level effective , should sustain 24 shake cycle (namely 2 machine cycles ) the above its effective times. If 6 of frequency of utilization brilliant to shake, restore to the throne signal duration should exceed 4 delicate to finish restoring to the throne and operating. Produce the logic picture of circuit which is restored to the throne the signal:Restore to the throne the circuit and include two parts outside in the chip entirely. Outside that circuit produce to restore to the throne signal (RST ) hand over to Schmitt's trigger, restore to the throne circuit sample to output , Schmitt of trigger constantly in each S5P2 , machine of cycle in having one more , then just got and restored to the throne and operated the necessary signal insidly. Restore to the throne resistance of circuit generally, electric capacity parameter suitable for 6 brilliant to shake, can is it restore to the throne signal high level duration greater than 2 machine cycles to guarantee. Being restored to the throne in the circuit is simple, its function is very important. Pieces of one-chip computer system could normal running,should first check it can restore to the throne not succeeding. Checking and can pop one's head and monitor the pin with the oscillograph tentatively, push and is restored to the throne the key, the wave form that observes and has enough range is exported (instantaneous), can also through is it restore to the throne circuit group holding value carry on the experiment to change.MCS -51 系列单片机的功能和结构MCS - 51 系列单片机具有一个单芯片电脑的结构和功能，它是英特尔公司生产的系列产品的名称。

单片机外文文献翻译(2024)

引言：单片机（Microcontroller）是一种广泛应用于嵌入式系统中的小型计算机芯片。

它集成了处理器核心、存储器、外设接口和时钟电路等核心部件，可以独立运行。

随着全球化的发展，外文文献对于学习和研究单片机领域来说至关重要。

本文翻译的外文文献《MicrocontrollerbasedTrafficLightControlSystem》详细介绍了基于单片机的交通信号灯控制系统。

概述：交通信号灯控制是现代都市交通系统中至关重要的一环。

传统的交通信号灯控制系统通常由定时器控制，不能根据实际交通情况动态调整信号灯的时间。

而基于单片机的交通信号灯控制系统可以实现根据实时交通流量来动态调整信号灯的时间，优化交通效率。

本文将详细介绍该系统的设计和实现。

正文：一、单片机选型1.1.CPU性能：本文选择了一款高性能的32位单片机作为控制核心，它具有较高的处理能力和较大的存储器容量，可以同时处理多条交通路口的信号控制。

1.2.外设接口：该单片机具有丰富的外设接口，可以与交通信号灯、传感器和通信设备等进行连接，实现信号控制和数据交互。

1.3.低功耗设计：为了节约能源和延长系统寿命，在单片机选型时考虑了低功耗设计，降低系统运行的能耗。

二、硬件设计2.1.交通信号灯：在设计交通信号灯时，考虑了日夜可见性和能耗。

采用了高亮度LED作为信号灯光源，同时添加了光敏传感器控制信号灯的亮度，以满足不同时间段的亮度需求。

2.2.传感器：通过安装车辆感应器和行人感应器等传感器，可以在实时监测交通流量的基础上，智能调整信号灯时间，提高路口的交通效率。

2.3.通信设备：在交通信号灯控制系统中引入了通信设备，可以实现各交通路口之间的信息交互和协调控制，提高整体交通系统的效率。

三、软件设计3.1.程序架构：采用了多任务的实时操作系统，将交通信号灯控制、传感器数据处理和通信设备控制等功能分别封装成不同的任务，实现了系统的高效运行和任务调度。

单片机设计外文文献翻译(含中英文)

附录A 外文翻译——AT89S52/AT89S51技术手册AT89S52译文主要性能与MCS-51单片机产品兼容8K字节在系统可编程Flash存储器1000次擦写周期全静态操作：0Hz～33Hz三级加密程序存储器32个可编程I/O口线三个16位定时器/计数器八个中断源全双工UART串行通道低功耗空闲和掉电模式掉电后中断可唤醒看门狗定时器双数据指针掉电标识符功能特性描述AT89S52是一种低功耗、高性能CMOS8位微控制器，具有8K在系统可编程Flash 存储器。

使用Atmel公司高密度非易失性存储器技术制造，与工业80C51产品指令和引脚完全兼容。

片上Flash 允许程序存储器在系统可编程，亦适于常规编程器。

在单芯片上，拥有灵巧的8位CPU和在系统可编程Flash，使得AT89S52为众多嵌入式控制应用系统提供高灵活、超有效的解决方案。

AT89S52具有以下标准功能：8k字节Flash，256字节RAM，32位I/O口线，看门狗定时器，2个数据指针，三个16位定时器/计数器，一个6向量2级中断结构，全双工串行口，片内晶振及时钟电路。

另外，AT89S52可降至0Hz静态逻辑操作，支持2种软件可选择节电模式。

空闲模式下，CPU停止工作，允许RAM、定时器/计数器、串口、中断继续工作。

掉电保护方式下，RAM内容被保存，振荡器被冻结，单片机一切工作停止，直到下一个中断或硬件复位为止。

引脚结构方框图VCC : 电源GND :地P0口：P0口是一个8位漏极开路的双向I/O口。

作为输出口，每位能驱动8个TTL逻辑电平。

对P0端口写“1”时，引脚用作高阻抗输入。

当访问外部程序和数据存储器时，P0口也被作为低8位地址/数据复用。

在这种模式下，P0具有内部上拉电阻。

在flash编程时，P0口也用来接收指令字节；在程序校验时，输出指令字节。

程序校验时，需要外部上拉电阻。

P1口：P1 口是一个具有内部上拉电阻的8位双向I/O 口，p1 输出缓冲器能驱动4个TTL 逻辑电平。

电气自动化单片机外文文献英文文献外文翻译中英对照

Single-chip1.The definition of a single-chipSingle-chip is an integrated on a single chip a complete computer system .Even though most of his features in a small chip，but it has a need to complete the majority of computer components：CPU，memory，internal and external bus system，most will have the Core.At the same time，such as integrated communication interfaces，timers，real-time clock and other peripheral equipment.And now the most powerful single-chip microcomputer system can even voice ，image，networking，input and output complex system integration on a single chip.Also known as single-chip MCU（Microcontroller），because it was first used in the field of industrial control.Only by the single-chip CPU chip developed from the dedicated processor. The design concept is the first by a large numberof peripherals and CPU in a single chip，the computer system so that smaller，more easily integrated into the complex and demanding on the volume control devices.INTEL the Z80 is one of the first design in accordance with the idea of the processor，From then on，the MCU and the development of a dedicated processor parted ways.Early single-chip 8-bit or all the four.One of the most successful is INTELs 8031，because the performance of a simple and reliable access to a lot of good praise.Since then in 8031to develop a single-chip microcomputer system MCS51 series.based on single-chip microcomputer system of the system is still widely used until now.As the field of industrial control requirements increase in the beginning of a 16-bit single-chip，but not ideal because the price has not been very widely used.After the90s with the big consumer electronics product development，single-chip technology is a huge improvement.INTEL i960 series with subsequent ARM in particular ，a broad range of application，quickly replaced by 32-bit single-chip 16-bit single-chip performance has been the rapid increase in processing power compared to the 80s to raise a few hundred times.At present，the high-end 32-bit single-chip frequency over 300MHz，the performance of the mid-90s close on the heels of a special processor，while the ordinary price of the model dropped to one U.S dollars，the most high-end models，only 10 U.S dollars.Contemporary single-chip microcomputer system is no longer only the bare-metal environment in the development and use of a large number of dedicated embedded operating system is widely used in the full range of single-chip microcomputer.In PDAs and cellphones as the coreprocessing of high-end single-chip or even a dedicated direct access to Windows and Linux operating systems.More than a dedicated single-chip processor suitable for embedded systems，so it was up to the application.In fact the number of single-chip is the worlds largest computer.Modern human life used in almost every piece of electronic and mechanical products will have a single-chip integration.Phone，telephone，calculator，home applicances，electronic toys，handheld computers and computer accessories such as a mouse in the Department are equipped with 1-2 single chip.And personal computers also have a large number of single-chip microcomputer in the workplace.Vehicles equipped with more than 40 Department of the general single-chip ，complex industrial control systems and even single-chip may have hundreds of work at the same time!SCM is not only far exceeds the number of PC and other integrated computing,even more than the number of human beings.2.single-chip introducedSingle-chip,also known as single-chip microcontroller,it is not the completion of a logic function of the chip,but a computer system integrated into a chip.Speaking in general terms: a single chip has become a computer .Its small size,light weight,cheap,for the learning,application and development of facilities provided .At the same time,learning to use the principle of single-chip computer to understand and structure the best choice.Single-chip and computer use is also similar to the module,such as CPU,memory,parallel bus, as well as the role and the same hard memory,is it different from the performance of these components are relatively weak in our home computer a lot,but the price is low ,there is generally no more than 10yuan,,can use it to make some control for a class of electrical work is not very complex is sufficient.We are using automatic drum washing machines, smoke hood,VCD and so on inside the home appliances can see its shadow! It is mainly as part of the core components of the control.It is an online real-time control computer,control-line is at the scene,we need to have a stronger anti-interference ability,low cost,and this is off-line computer(such as home PC)The main difference.By single-chip process,and can be amended.Through different procedures to achieve different functions,in particular the special unique features,this is the need to charge other devices can do a great effort,some of it is also difficult to make great efforts to do so .A function is not very complicated fi the United States the development of the 50s series of 74 or 60 during the CD4000series to get these pure hardware,the circuit must be a big PCB board !However,if the United States if the successful 70s seriesof single-chip market ,the result will be different!Simply because the adoption of single-chip preparation process you can achieve high intelligence,high efficiency and high reliability!Because of cost of single-chip is sensitive,so the dominant software or the lowest level assembly language,which is in addition to the lowest level for more than binary machine code of the language ,since such a low-level so why should we use ?Many of the seniors language has reached a level of visual programming why is it not in use ?The reason is simple ,that is,single-chip computer as there is no home of CPU,also not as hard as the mass storage device.A visualization of small high-level language program,even if there is only one button which will reach the size of dozens of K! For the home PCs hard drive is nothing,but in terms of the single-chip microcomputer is unacceptable.Single-chip in the utilization of hardware resources have to do very high ,so the compilation of the original while still in heavy use .The same token ,if the computer giants operating system and appplications run up to get the home PC,homePCcan not afford to sustain the same.It can be said that the twentieth century across the three “power”of the times,that is ,the electrical era,the electronic age and has now entered the computer age. However ,such a computer,usually refers to a personal computer,or PC.It consisits of the host ,keyboards,displays .And other components.There is also a type of computer,not how most people are familiar with . This computer is smart to give a variety of mechanical single-chip(also known as micro-controller).As the name suggests,these computer systems use only the minimum of an integrated circuit to make a simple calculation and control. Because of its small size,are usually charged with possession of machine in the “belly”in. It in the device,like the human mind plays a role, it is wrong,the entire device was paralyzed .Now,this single chip has a very wide field of use,such as smart meters,real-time industrial control,communications equipment,navigation systems,and household appliances. Once a variety of products with the use of the single-chip ,will be able to play so that the effectiveness of product upgrading,product names often adjective before the word “intelligent”,such as was hing machines and so intelligent.At present,some technical personnel of factories or other amateur electrtonics developers from engaging in certain products ,not the circuit is too complex ,that is functional and easy to be too simple imitation.The reason may be the product not on the cards or the use of single-chip programmable logic device on the other.3.single-chip historysingle-chip 70 was born in the late 20th century,experienced a SCM,MCU,SOC three stages.Single-chip micro-computer 1.SCM that(Single Chip Microcomputer)stage,is mainly a single from to find the best of the best embedded systems architecture.”Innovation model”to be successful,lay the SCM with the general-purpose computers,a completely different path of development . In embedded systems to create an independent development path,Intel Corporation credit.That is 2.MCU microcontroller(Micro Controller Unit)stage,the main direction of technology development: expanding to meet the embedded applications,the target system requirements for the various peripheral circuits and interface circuits,to highlingt the target of intelligent control.It covers all areas related with the objectSystem,therefore,the development of MCU inevitably fall on the heavy electrical,electronics manufacturers. From this point of view ,Intels development gradually MCU has its objective factors.MCU in the development ,the most famous manufacturers when the number of Philips Corporation.Philips in embedded applications for its enormous advantages,the MCS-51 from the rapid deveploment of single-chip micro-computer to the microcontroller.Therefore,when we look back at the path of development of embedded systems,Intel and Philips do not forget the historical merits.3.Single-chip is an independent embedded systems development,to the MCU an important factor in the development stage,is seeking applications to maximize the natural trend .With the mico-electronics technology,IC design,EDA tools development,based on the single-chip SOC design application systems will have greater development. Therefore,the understanding of single-chip micro-computer from a single ,monolithic single-chip microcontroller extends to applications.4.Single-chip applicationsAt present,single-chip microcomputer to infiltrate all areas of our lives,which is very difficult to find the area of almost no traces of single-chip microcomputer.Missile navigation equipment,aircraft control on a variety of instruments,compuer network communications and data transmission,industrial automation,real-time process control and data processing ,are widely used in a variety of smart IC card,limousine civilian security systems,video recorders,cameras,the control of automatic washing machines,as well as program-controllde toys,electronic pet,etc,which are inseparable from the single-chip microcomputer.Not to mention the field of robot automation ,intelligent instrumentation,medical equipment has been. Therefore,the single- chip learning ,development and application to a large number of computer applications and intelligent control of scientists,engineers.Single-chip widely used in instruments and meters,household appliances，medical equipment ,acrospace,specialized equipment and the intellingent management in areas such as process control,generally can be divided into the following areas:1.In the smart application of instrumentationSingle-chip with small size,low power consumption,control,and expansion flexibility , miniaturization and ease of sensors,can be realized,suchvoltage,power,frequency,humidity,temperature,flow,speed,thickness,angle,length,hardness,elemen t,measurement of physical pressure. SCM makes use of digital instrumentation,intelligence,miniaturization and functional than the use of electronic or digital circuitry even stronger.For example,precision measurement equipment(power meter,oscilloscope,and analyzer).2.In the industrial controlMCU can constitute a variety of control systems,data acquisition system.Such as factory assembly line of intelligent management ,intelligent control of the lift ,all kinds of alarm systems ,and computer networks constitute a secondary control system.3.In the applicationof household appliancesIt can be said that almost all home appliances are using the single-chip control,electric rice from favorable,washing machines,refrigerators,air conditioners,color TV and other audio video equipment,and then to the electronic weighing equipment,all kinds ,everywhere.4.On computer networks and communication applications in the field ofGenerally with the modern single-chip communication interface,can be easily carried out with computer carried out with computer data communications,computer networks and in inter-application communications equipment to provide an excellent material conditions,the communications equipment to provide an excellent material condition,from the mobile phone ,telephone , mini-program-controlled switchboards,buiding automated communications system call,the train wireless communications,and then you can see day-to-day work of mobile phones,Mobile communications,such as radios.5.Single-chip in the field of medical equipment applicationsSingle-chip microcomputer in medical devices have a wide range of purpose,such as medical ventilator,various analyzers,monitors,ultrasonic diagnostic equipment and hospital call systems.6.In a variety of large-scale electrical applications of modularSome special single-chip design to achieve a specific function to carry out a variety of modular circuitapplications,without requiring users to understand its internal structure.Integrated single-chip microcomputer such as music ,which seems to be simpleFunctions,a miniature electronic chip in a pure(as distinct from the principle of tape machine),would require a complex similar to the principle of the computer. Such as :music signal to digital form stored in memory(similar to ROM),read out by the microcontroller into analog music signal(similar to the sound card).In large circuits,modular applications that greatly reduces the size ,simplifying the circuit and reduce the damage,error rate ,but also to facilitate the replacement.In addition,single-chip microcomputer in the industrial,commercial,financial,scientific research ,education,defense aerospace and other fields have a wide range of uses.单片机1.单片机定义单片机是一种集成在电路芯片上的完整计算机系统。

基于单片机的外文翻译、中英文翻译

英文原文DescriptionThe at89s52 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash Programmable and Erasable Read Only Memory (PEROM) and 128 bytes RAM. The device is manufactured using Atmel’s high density nonvolatile memory technology and is compatible with the industry standard MCS-51™ instruction set and pinout. The chip combines a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel at89s52 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications.Features:• Compatible with MCS-51™ Products• 4K Bytes of In-System Reprogrammable Flash Memory• Endurance: 1,000 Write/Erase Cycles• Fully Static Operation: 0 Hz to 24 MHz• Three-Level Program Memory Lock• 128 x 8-Bit Internal RAM• 32 Programmable I/O Lines• Two 16-Bit Timer/Counters• Six Interrupt Sources• Programmable Serial Channel• Low Power Idle and Power Down ModesThe at89s52 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the at89s52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power Down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset. Pin Description:VCC Supply voltage.GND Ground.Port 0Port 0 is an 8-bit open drain bidirectional I/O port. As an output port each pin can sink eight TTL inputs. When is are written to port 0 pins, the pins can be used as high impedance inputs.Port 0 may also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups.Port 0 also receives the code bytes during Flash programming, and outputs theduring accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable is the read strobe to external program memory.When the at89s52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.EA should be strapped to VCC for internal program executions.This pin also receives the 12-volt programming enable voltage(VPP) during Flash programming, for parts that require 12-volt VPP.XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2Output from the inverting oscillator amplifier.Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through adivide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.Idle ModeIn idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset.It should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access toport pin or to external memory.RDY/BSY output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY.Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled.Chip Erase: T he entire Flash Programmable and Erasable Read Only Memory array is erased electrically by using the proper combination of control signals and by holding ALE/PROG low for 10 ms. The code array is written with all “1”s. The chip erase operation must be executed before the code memory can be re-programmed.Reading the Signature Bytes: The signature bytes are read by the same procedure as a normal verification of locations 030H, 031H, and 032H, except thatP3.6 and P3.7 must be pulled to a logic low. The values returned are as follows.(030H) = 1EH indicates manufactured by Atmel(031H) = 51H indicates 89C51(032H) = FFH indicates 12V programming(032H) = 05H indicates 5V programmingProgramming InterfaceEvery code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation cycle is selftimed and once initiated, will automatically time itself to completion.中文翻译描述at89s52是美国ATMEL公司生产的低电压，高性能CMOS8位单片机，片内含4Kbytes的快速可擦写的只读程序存储器（PEROM）和128 bytes 的随机存取数据存储器（RAM），器件采用ATMEL公司的高密度、非易失性存储技术生产，兼容标准MCS-51产品指令系统，片内置通用8位中央处理器（CPU）和flish存储单元，功能强大at89s52单片机可为您提供许多高性价比的应用场合，可灵活应用于各种控制领域。

单片机STM32外文文献翻译、中英文翻译

外文翻译英文原文：STM32 MicrocontrollerIntroductionRequirements based STM32 family is designed for high-performance, low-cost, low-power embedded applications designed specifically for ARM Cortex-M3 core. According to the performance into two different series: STM32F103 "Enhanced" series and STM32F101 "Basic" series. Enhanced Series clock frequency of 72MHz, the highest performance of similar products product; basic clock frequency of 36MHz, 16-bit product prices get more than 16 products significantly enhance the performance and is 16 product users the best choice. Both series have built-in 32K to 128K of flash memory, the difference is the maximum capacity of the SRAM and peripheral combinations. At 72MHz, executing from Flash, STM32 power consumption 36mA, are 32 products on the market's lowest power, the equivalent of 0.5mA/MHz.STM32F103 Performance Characteristics1)Kernel. ARM32 bit CPU, the maximum operating frequency of 72MHz,1.25DMIPS/MHz. Single-cycle multiply and hardware divide.2)Memory. Integrated on-chip 32-512KB of Flash memory. 6-64KB SRAM memory.3)Clock, reset, and power management. 2.0-3.6V power supply and I / O interface, the drive voltage. POR, PDR and programmable voltage detector. 4-16MHz crystal. Embedded factory tuned 8MHz RC oscillator circuit. 40 kHz internal RC oscillator circuit. CPU clock for the PLL. With calibration for the RTC 32kHz crystal.4)Low power consumption. Three kinds of low-power mode. Sleep, stop, standby mode. For RTC and backup registers supply VBAT.5)Debug mode. Serial debugging and JTAG interface.6)Direct data storage. 12-channel direct data storage controller. Supported peripherals: timers, ADC, DAC, SPI, IIC and USART.7)Up to a maximum of 112 fast I / O ports. Depending on the model, there are 26,37,51,80, and 112 I / O ports, all ports can be mapped to 16 external interruptvectors. In addition to the analog input, all of them can accept the input of 5V or less.8)Up to a maximum of 11 timers. Four 16-bit timers, each with 4 IC / OC / PWM or pulse counter. 2 16 6-channel advanced control timer: up to 6 channels can be used for PWM output. 2 watchdog timer. Systick timer: 24 down counter. Two 16-bit basic timer for driving DAC.9)Up to a maximum of 13 communication interfaces. 2 IIC interface. 5 USART interfaces. 3 SPI interface, two and IIS reuse. CAN interface. USB 2.0 full-speed interface. SDIO interface.System Function1)Integration of embedded Flash and SRAM memory ARM Cortex-M3 core. And 8/16 equipment compared, ARM Cortex-M3 32-bit RISC processor provides a higher code efficiency. STM32F103xx microcontrollers with an embedded ARM core, so it can be compatible with all ARM tools and software.2)Embedded Flash memory and RAM memory. Built up to 512KB embedded Flash, can be used to store programs and data. Up to 64KB of embedded SRAM clock speed of the CPU can read and write.3)Variable static memory. Variable static memory with 4 chip selects, supports four modes: Flash, RAM, PSRAM, NOR and NAND. After three FSMC interrupt lines connected to the OR after the nested vector interrupt controller. No read / write FIFO, except PCCARD, the code is executed from external memory is not supported Boot, the target frequency is equal to SYSCLK / 2, so the time when the system clock is 72MHz, 36MHz conducted in accordance with external access.4)Nested Vectored Interrupt Controller. Can handle 43 maskable interrupt channels, providing 16 interrupt priority levels. Tightly coupled nested vectored interrupt controller to achieve lower latency interrupt handling directly passed to the kernel interrupt vector table entry address, tightly coupled nested vectored interrupt controller kernel interface, allowing early treatment interruption, the latter to be more high-priority interrupt processing, support tail chain, auto-save processor state terrupts automatically restored on interrupt exit, no instructions intervention.5)External interrupt / event controller. External interrupt / event controller consists for 19 to generate interrupt / event requests edge detector lines. Each line can be individually configured to select the trigger event, it can be individually masked. There is a pending interrupt request registers to maintain state. When an external line appear longer than the internal APB2 clock-cycle pulse, the external interrupt / eventcontroller is able to detect. Up to 112 GPIO connected to the 16 external interrupt lines.6)Clocks and startup. At boot time or to the system clock selection, but the reset when the internal 8MHz crystal oscillator is selected as the CPU clock. Can choose a 4-16MHz external clock, and will be monitored to determine the success. During this time, the interrupt controller is disabled and the software management is subsequently disabled. Also, if there is a need, PLL clock interrupt management fully available. Comparator can be used more pre-configuration of the AHB frequency, including high-speed and low-speed APB APB, APB highest frequency of high-speed 72MHz, low-speed APB highest frequency of 36MHz.Architectural AdvantagesIn addition to the new features Enhanced peripheral interfaces, STM32 series also interconnect with other STM32 microcontrollers offer the same standard interface, such sharing of peripherals to enhance the entire product family, application flexibility, so that developers can a plurality of design reuse the same software. New STM32 standard peripherals include 10 timers, two 12-bit ADC, two 12-bit DAC, two I2C interfaces, five USART interfaces and three SPI ports. There are 12 new products peripherals direct data storage channel, there is a CRC calculation unit, like other STM32 microcontrollers, the supports 96 unique identifier.New series also has followed the STM32 microcontroller family of products low voltage and energy saving are two advantages. 2.0V to 3.6V operating voltage range compatible with the mainstream of battery technologies such as lithium batteries and nickel-metal hydride batteries, the package also features a battery operation mode dedicated pin Vbat. 72MHz frequency to execute code from flash consumes only 27mA current. There are four low-power mode, the current consumption can be reduced to two microamps. Quick Start from low power mode to save energy too; starting circuit using STM32 internally generated 8MHz signal, the microcontroller from stop mode when you wake up with less than 6 microseconds.中文翻译：单片机STM321 STM32的介绍STM32系列基于专为要求高性能、低成本、低功耗的嵌入式应用专门设计的ARM Cortex-M3内核。

单片机毕业设计外文文献翻译

英文原文：80C518051 single-chip micro-computer, referred to as microcontrollers, there are known as micro-controller, a micro-computer re -To branch. SCM is developed in the mid 70s a large-scale integrated circuit chip, a CPU, RAM, ROM, I / O interfaces and interrupt system on the same silicon device. Since the 80s, Microcontroller rapid development, all kinds of new products are constantly emerging, there have been many high-performance of new models now become the field of factory automation and control of the pillar industries.Pin Function:MCS-51 is a standard 40-pin DIP IC chip, pin distribution ---- microcontroller pin diagram please refer to:P0.0 ~ P0.7 P0 port 8-bit bidirectional port lines (in the pin 39 to No. 32 terminal). P1.0 ~ P1.7 P1 port 8-bit bidirectional port line (pin 1 in the No. 8 terminal).P2.0 ~ P2.7 P2 port 8-bit bidirectional port lines (in the pin terminal 21 ~ 28).P3.0 ~ P3.7 P3 port 8-bit bidirectional port lines (in the pin terminal 10 ~ 17).This four I / O port has not exactly the same function, we can get to learn, and other books though, but written in too deep, difficult to understand for beginners, here are according to my own expression to write the I believe that you can understand.P0 port has three functions:1, external expansion memory, as the data bus (Figure 1 in D0 ~ D7 of data bus interface)2, external expansion memory, as the address bus (Figure 1 in A0 ~ A7 to address bus interface)3, is not extended, it can do a general I / O to use, but within the supreme pull-up resistor, as an input or output should be connected to an external pull-up resistor.P1 port Zhizuo I / O port to use: its internal pull-up resistor.P2 port has two functions:1,An extended external memory when used as an address bus2, doing a general I / O port used, and their internal pull-up resistor;P3 port has two functions:As well as I / O using the external (the internal pull-up resistor), there are some special features, from a special register to set the specific features please refer to our explanation behind the pin.Internal EPROM of the microcontroller chip (for example, 8751), for the writing process required to provide specialized programming and programming pulse power, these signals are also provided in the form from the signal pin, and Namely: programming pulse: 30 feet (ALE / PROG)Programming voltage (25V): 31 feet (EA / Vpp)In introducing the four I / O port referred to a "pull-up resistor" Then, pull-up resistor is what Dongdong do? What role does he play? Said the resistance that is of course, is a resistor, when as an input, the pull-up resistor pulled its potential, if the input is low you can provide a current source; Therefore, if the P0 port as long as the input, in the high impedance state, only an external pull-up resistor to be effective. ALE / PROG address latch control signal: in a system is extended, ALE is used to control the P0 port output low 8-bit address latch latch get together in order to achieve low address and data segregation. (In the back on the expansion of the curriculum, we will see the 8051 expansion of EEPROM circuit, the ALE and the 74LS373 in Figure G-latches connected to the external CPU to access when the time to lock the address low address, the P0 port output. ALE may be high may also be low, when the ALE is high, allowing address latch signal when accessing external memory, ALE signals a negative transition (from positive to negative) P0 port on the lower eight address signals into the latch. when ALE is low, when, P0 port on the content and the output latch line. on the latch, and we will be introduced later.In the absence of access to external memory during the period, ALE 1 / 6 oscillator frequency output cycle (ie, frequency of 6 points), when access to external memory to 1 / 12 oscillator cycle, the output (12 min frequency). From here we can see that when the system does not extend when the ALE will be 1 / 6 cycle, fixed frequency oscillator output, so can be used as an external clock, or the use of an external timing pulse.PORG pulse input for the program: In the fifth lesson MCU's internal structure and composition, we know that in 8051 within the a 4KB or 8KB of program memory (ROM), ROM's role is to be used to store user needs implementation of the program, then we are into how to write good programs into this ROM in it? Is actually programmed into the pulse input can be written, this pulse input port is PROG. PSEN external program memory read strobe: In reading an external ROM, PSEN low effective, in order to achieve an external ROM module read.1, the internal ROM reading, PSEN is not action;2, external ROM reading at each machine cycle will move twice;3, external RAM read, the two PSEN pulse is skipped will not be output;4, external ROM, and ROM-foot-phase OE.See Figure 2 - (8051 extension 2KB EEPROM circuit in Figure PSEN and expansion ROM in the OE pin-phase)EA / VPP access and sequence memory control signals1, then high time:CPU reads the internal program memory (ROM)Expansion of the external ROM: When reading the internal program memory than0FFFH (8051) 1FFFH (8052) automatically reads the external ROM.2, then low when: CPU to read external program memory (ROM). In the previous study, we are aware, there is no internal ROM MCU 8031, then 8031 microcontroller in the application, this pin is a low level of direct.3,8751 Shaoxie internal EPROM, to make use of this pin input voltage of 21V forShao Xie.RST Reset signal: when the input signal continuously high for more than two machine cycles when it is effective to complete the MCU reset initialization, when the reset program counter PC = 0000H, ie, after reset from the program memory of the 0000H unit to read the first script.External crystal oscillator pins XTAL1 and XTAL2. When using the chip internal clock, this two-pin for external quartz crystal and fine-tuning capacitor; when using an external clock, used to access an external clock pulse signal.VCC: Power Supply +5 V inputVSS: GND Ground.A VR and the pic are 8051 different structures with 8-bit microcontrollers, because structure is different, so assembly instructions are different, but distinct from the useof CISC instruction set of the 8051, they are RISC instruction set, and only a few dozen instructions, most instructions are single instruction cycle instruction, so in the same crystal frequency, faster than the 8051. Another PIC 8-bit microcontroller in previous years, is the world's largest MCU shipments, followed by Freescale microcontroller.ARM is actually 32-bit microcontroller, its internal resources (registers and peripheral functions) than in 8051 and PIC, A VR should be a lot more, with the computer's CPU chip is very close. Commonly used in mobile phones, routers and so on.DSP is actually a special kind of microcontroller, which from 8-32 are available here. It is specifically used to calculate the digital signals. Operation in some formulas, it's fastest computers than the current home of the CPU even faster. For example, the general 32-bit DSP instruction cycle in an op-End a 32-digit x 32-digit product coupled with a 32-digit. Applied to certain pairs of real-time processing requirements of the higher places中文译文：8051单片微型计算机简称为单片机，又称为微型控制器，是微型计算机的一个重要分支。

单片机STM32外文文献翻译、中英文翻译

外文译英文原文：STM32 MicrocontrollerIntroductionRequirements based STM32 family is designed for high-performance, low-cost, low-power embedded applications designed specifically for ARM Cortex-M3 core. According to the performance into two different series: STM32F103 "Enhanced〞 series and STM32F101 "Basic" series. Enhanced Series clock frequency of 72MHz, the highest performance of similar products product; basic clock frequency of 36MHz, 16-bit product prices get more than 16 products significantly enhance the performance and is 16 product users the best choice. Both series have built-in 32K to 128K of flash memory, the difference is the maximum capacity of the SRAM and peripheral combinations. At 72MHz, executing from Flash, STM32 power consumption 36mA, are 32 products on the market s lowest power, the equivalent of 0.5niA/MHz.STM32F103 Performance Characteristics1)Kernel. ARM32 bit CPU, the maximum operating frequency of 72MHz,1.25DMIPS/MHz. Single-cycle multiply and hardware divide.2)Memory. Integrated on-chip 32-512KB of Flash memory. 6-64KB SRAM memory.3)Clock, reset, and power management. 2.0-3.6V power supply and I/O interface, the drive voltage. POR, PDR and programmable voltage detector. 4-16MHz crystal. Embedded factory tuned 8MHz RC oscillator circuit. 40 kHz internal RC oscillator circuit. CPU clock for the PLL. With calibration for the RTC 32kHz crystal.4)Low power consumption. Three kinds of low-power mode. Sleep, stop, standby mode. For RTC and backup registers supply VBAT.5)Debug mode. Serial debugging and JTAG interface.6)Direct data storage. 12-channel direct data storage controller. Supported peripherals: timers, ADC, DAC, SPI, IIC and USART.7)Up to a maximum of 112 fast I / O ports. Depending on the modeL there are 26,37,51,80, and 112 I/O ports, all ports can be mapped to 16 external interrupt vectors. In addition to the analog input, all of them can accept the input of 5V or less.8)Up to a maximum of 11 timers. Four 16-bit timers, each with 4 IC / OC / PWM orpulse counter. 2 16 6-channel advanced control timer: up to 6 channels can be used for PWM output. 2 watchdog timer. Systick tinier: 24 down counter. Two 16-bit basic timer for driving DAC.9)Up to a maximum of 13 communication interfaces. 2 IIC interface. 5 USART interfaces. 3 SPI interface, two and IIS reuse. CAN interface. USB 2.0 full-speed interface. SDIO interface.System Function1)Integration of embedded Flash and SRAM memory ARM Cortex-M3 core. And 8/16 equipment compared, ARM Cortex-M3 32-bit RISC processor provides a higher code efficiency. STM32F103xx microcontrollers with an embedded ARM core, so it can be compatible with all ARM tools and software.2)Embedded Flash memory and RAM memory. Built up to 512KB embedded Flash, can be used to store programs and data. Up to 64KB of embedded SRAM clock speed of the CPU can read and write.3)Variable static memory. Variable static memory with 4 chip selects, supports four modes: Flash, RAM, PSRAM, NOR and NAND. After three FSMC interrupt lines connected to the OR after the nested vector interrupt controller. No read / write FIFO, except PCCARD, the code is executed from external memory is not supported Boot, the target frequency is equal to SYSCLK / 2, so the time when the system clock is 72MHz, 36MHz conducted in accordance with external access.4)Nested Vectored Internipt Controller. Can handle 43 maskable interrupt channels, providing 16 interrupt priority levels. Tightly coupled nested vectored intenupt controller to achieve lower latency interrupt handling directly passed to the kernel interrupt vector table entry address, tightly coupled nested vectored interrupt controller kernel interface, allowing early treatment interruption, the latter to be more high-priority interrupt processing, support tail chain, auto-save processor state terrupts automatically restored on interrupt exit, no instructions intervention.5)External internipt / event controller. External interrupt / event controller consists for 19 to generate interrupt / event requests edge detector lines. Each line can be individually configured to select the trigger event, it can be individually masked. There is a pending interrupt request registers to maintain state. When an external line appear longer than the internal APB2 clock-cycle pulse, the external interrupt / event controller is able to detect. Up to 112 GPIO connected to the 16 external internipt lines.6)Clocks and startup. At boot time or to the system clock selection, but the reset whenthe internal 8MHz crystal oscillator is selected as the CPU clock. Can choose a 4-16MHz external clock, and will be monitored to determine the success. During this time, the interrupt controller is disabled and the software management is subsequently disabled. Also, if there is a need, PLL clock internipt management fully available. Comparator can be used more pre-configuration of the AHB frequency, including high-speed and low-speed APB APB, APB highest frequency of high-speed 72MHz, low-speed APB highest frequency of 36MHz.Architectural AdvantagesIn addition to the new features Enhanced peripheral interfaces, STM32 series also interconnect with other STM32 microcontrollers offer the same standard interface, such sharing of peripherals to enhance the entire product family, application flexibility, so that developers can a plurality of design reuse the same software. New STM32 standard peripherals include 10 timers, two 12-bit ADC, two 12-bit DAC, two I2C interfaces, five USART interfaces and three SPI ports. There are 12 new products peripherals direct data storage channel, there is a CRC calculation unit, like other STM32 microcontrollers, the supports 96 unique identifier.New series also has followed the STM32 microcontroller family of products low voltage and energy saving are two advantages. 2.0V to 3.6V operating voltage range compatible with the mainstream of battery technologies such as lithium batteries and nickel-metal hydride batteries, the package also features a battery operation mode dedicated pin Vbat. 72MHz frequency to execute code from flash consumes only 27mA current. There are four low-power mode, the current consumption can be reduced to two microamps. Quick Start from low power mode to save energy too; starting circuit using STM32 internally generated 8MHz signal, the microcontroller from stop mode when you wake up with less than 6 microseconds.中文译:单片机STM321STM32的介绍STM32系列基于专为要求高性能、低本钱、低功耗的嵌入式应用专门设计的ARMCortex-M3内核.按性能分成两个不同的系列：STM32F103 “增强型〞系列和STM32F101 “根本型〞系列.增强型系列时钟频率到达72MHz,是同类产品中性能最高的产品；根本型时钟频率为36MHz,以16位产品的价格得到比16位产品大幅提升的性能,是16位产品用户的最正确选择.两个系列都内置32K 到128K 的闪存,不同的是SRAM的最大容量和外设接口的组合.时钟频率72MHz时,从闪存执行代码,STM32功耗36mA,是32位市场上功耗最低的产品,相当于0.5mA/MHz.2STM32F103性能特点1〕内核.ARM32位CPU,最高工作频率72MHz, 1.25DMIPS/MHzo单周期乘法和硬件除法.2〕存储器.片上集成32-512KB的Flash存储器.6-64KB的SRAM存储器.3〕时钟、复位和电源治理.2.0-3.6V的电源供电和I/O接口的驱动电压. POR、PDR和可编程的电压探测器.4-16MHZ的晶振.内嵌出厂前调校的8MHz RC振荡电路.内部40 kHz的RC振荡电路.用于CPU时钟的PLL.带校准用于RTC的32kHz的晶振.4〕低功耗.3种低功耗模式：休眠,停止,待机模式.为RTC和备份存放器供电的VBAT.5〕调试模式.串行调试和JTAG接口.6〕直接数据存储.12通道直接数据存储限制器.支持的外设：定时器,ADC, DAC, SPI, IIC 和USART.7〕最多高达112个的快速I/O端口.根据型号的不同,有26, 37, 51, 80, 和112的I/O端口,所有的端口都可以映射到16个外部中断向量.除了模拟输入,所有的都可以接受5V以内的输入.8〕最多多达11个定时器.4个16位定时器,每个定时器有4个IC/OC/PWM 或者脉冲计数器.2个16位的6通道高级限制定时器:最多6个通道可用于PWM 输出.2个看门狗定时器.Systick定时器：24位倒计数器.2个16位根本定时器用于驱动DACo9〕最多多达13个通信接口.2个HC接口.5个USART接口.3个SPI接口,两个和IIS复用.CAN接口.USB 2.0全速接口.SDIO接口.3系统作用1〕集成嵌入式Hash和SRAM存储器的ARM Cortex-M3内核.和8/16位设备相比,ARM Cortex-M3 32位RISC处理器提供了更高的代码效率. STM32F103xx微限制器带有一个嵌入式的ARM核,所以可以兼容所有的ARM 工具和软件.2〕嵌入式Flash存储器和RAM存储器.内置多达512KB的嵌入式Flash, 可用于存储程序和数据.多达64KB的嵌入式SRAM可以以CPU的时钟速度进行读写.3〕可变静态存储器.可变静态存储器带有4个片选,支持四种模式：Flash, RAM, PSRAM, NOR和NANDo 3个FSMC中断线经过OR后连接到嵌套矢量中断限制器.没有读/写FIFO,除PCCARD之外,代码都是从外部存储器执行, 不支持Boot,目标频率等于SYSCLK/2,所以当系统时钟是72MHz时' 外部访问根据36MHz进行.4〕嵌套矢量中断限制器.可以处理43个可屏蔽中断通道,提供16个中断优先级.紧密耦合的嵌套矢量中断限制器实现了更低的中断处理延迟,直接向内核传递中断入口向量表地址,紧密耦合的嵌套矢量中断限制器内核接口,允许中断提前处理,对后到的更高优先级的中断进行处理,支持尾链,自动保存处理器状态,中断入口在中断退出时自动恢复,不需要指令干预.5〕外部中断/事件限制器.外部中断/事件限制器由用于19条产生中断/事件请求的边沿探测器线组成.每条线可以被单独配置用于选择触发事件,也可以被单独屏蔽.有一个挂起存放器来维护中断请求的状态.当外部线上出现长度超过内部APB2时钟周期的脉冲时,外部中断/事件限制器能够探测到.多达112个GPIO连接到16个外部中断线.6〕时钟和启动.在启动的时候还是要进行系统时钟选择,但复位的时候内部8MHz的晶振被选用作CPU时钟.可以选择一个外部的4-16MHZ的时钟,并且会被监视来判定是否成功.在这期间,限制器被禁止并且软件中断治理也随后被禁止.同时,如果有需要,PLL时钟的中断治理完全可用.多个预比拟器可以用于配置AHB频率,包括高速APB和低速APB,高速APB最高的频率为72MHz, 低速APB最高的频率为36MHzo4架构优势除新增的功能强化型外设接口外,STM32互连系列还提供与其它STM32微限制器相同的标准接口,这种外设共用性提升了整个产品家族的应用灵活性,使开发人员可以在多个设计中重复使用同一个软件.新STM32的标准外设包括10 个定时器、两个12位模数转换器、两个12位数模转换器、两个12c接口、五个USART接口和三个SPI端口.新产品外设共有12条直接数据存储通道,还有一个CRC计算单元,像其它STM32微限制器一样,支持96位唯一标识码.新系列微限制器还沿续了STM32产品家族的低电压和节能两大优点.2.0V 到3.6V的工作电压范围兼容主流的电池技术,如锂电池和银氢电池,封装还设有一个电池工作模式专用引脚Vbato以72MHz频率从闪存执行代码,仅消耗27mA 电流.低功耗模式共有四种,可将电流消耗降至两微安.从低功耗模式快速启动也同样节省电能；启动电路使用STM32内部生成的8MHz信号,将微控制器从停止模式唤醒用时小于6微秒.。

单片机【经典外文翻译】--单片机基础(译文+英文)—-毕业论文设计

Fundamentals of Single-chip MicrocomputerTh e si ng le-ch i p mi cr oc om pu ter is t he c ul mi nat i on o f bo th t h e d ev el op me nt o f th e d ig it al com p ut er an d t he int e gr at ed ci rc ui ta r gu ab ly th e t ow m os t s i gn if ic ant i nv en ti on s o f t h e 20t h c en tury[1].Th es e to w typ e s of a rc hi te ctu r e ar e fo un d i n s in gl e-ch ip m i cr oc om pu te r. So m e em pl oy t he sp l it p ro gr am/d ata me mo ry o f th e H a rv ar d ar ch it ect u re, sh ow n in Fi g.3-5A-1, o th ers fo ll ow t hep h il os op hy, wi del y a da pt ed f or ge n er al-p ur po se co m pu te rs a ndm i cr op ro ce ss or s, of ma ki ng no lo gi c al di st in ct io n be tw ee n p ro gram a n d da ta m em or y a s i n th e Pr in cet o n ar ch it ec tu re,sh ow n inF i g.3-5A-2.In g en er al te r ms a s in gl e-chi p m ic ro co mp ut er i sc h ar ac te ri zed b y the i nc or po ra tio n of al l t he uni t s o f a co mp ut er i n to a s in gl e dev i ce, as s ho w n in Fi g3-5A-3.Fig.3-5A-1 A Harvard typeFig.3-5A-2. A conventional Princeton computerFig3-5A-3. Principal features of a microcomputerRead only memory (ROM).R OM i s u su al ly f or th e p er ma ne nt,n o n-vo la ti le s tor a ge o f an a pp lic a ti on s pr og ra m .M an ym i cr oc om pu te rs an d mi cr oc on tr ol le r s a re in t en de d fo r h ig h-v olume a p pl ic at io ns a nd h en ce t he e co nom i ca l ma nu fa ct ure of t he d ev ic es r e qu ir es t ha t the co nt en ts o f the pr og ra m me mo ry b e co mm it te dp e rm an en tl y d ur in g th e m an uf ac tu re o f c hi ps . Cl ear l y, th is im pl iesa ri g or ou s a pp roa c h t o R OM co de d e ve lo pm en t s in ce c ha ng es ca nnotb e m ad e af te r man u f a ct ur e .T hi s d e ve lo pm en t pr oce s s ma y in vo lv e e m ul at io n us in g a s op hi st ic at ed deve lo pm en t sy st em w i th a ha rd wa re e m ul at io n ca pa bil i ty a s we ll a s th e u se of po we rf ul so ft wa re t oo ls.So me m an uf act u re rs p ro vi de ad d it io na l RO M opt i on s byi n cl ud in g i n th ei r r a ng e de vi ce s wi th (or i nt en de d fo r us e with) u s er pr og ra mm ab le m em or y. Th e s im p le st of th es e i s us ua ll y d evice w h ic h ca n op er ate in a m ic ro pr oce s so r mo de b y usi n g so me o f th e i n pu t/ou tp ut li ne s as a n ad dr es s an d da ta b us f or acc e ss in g e xt er na l m e mo ry. T hi s t ype o f d ev ic e c an b e ha ve fu nc ti on al l y a s t he si ng le c h ip mi cr oc om pu te r fr om wh ic h i t i s de ri ve d a lb eit w it h r es tr ic ted I/O an d a mo di fie d e xt er na l ci rcu i t. T he u se o f t h es e RO Ml es sd e vi ce s is c om mo n e ve n in p ro du ct io n c ir cu it s wh er e t he v ol um e does n o t j u st if y th e d e ve lo pm en t co sts of c us to m on-ch i p RO M[2];t he re c a n st il l b e a si g ni fi ca nt s a vi ng in I/O a nd ot he r c hi ps co mp ared t o a c on ve nt io nal mi cr op ro ce ss or b as ed c ir cu it. M o re e xa ctr e pl ac em en t fo r RO M d ev ic es c an b e o bt ai ne d in t he f o rm o f va ri antsw i th 'pi gg y-ba ck'EP RO M(Er as ab le p ro gr am ma bl e ROM)s oc ke ts o rd e vi ce s w it h EP ROM i ns te ad o f R OM 。

单片机-外文翻译-外文文献-英文文献-基于单片机的超声波测距系统的研究与设计

附录附录A外文翻译the equivalent dc value。

In the analysis of electronic circuits to be considered in a later course, both dc and ac sources of voltage will be applied to the same network。

It will then be necessary to know or determine the dc （or average value）and ac components of the voltage or current in various parts of the system.EXAMPLE 13.13 Determine the average value of the waveforms of Fig。

13.37。

FIG。

13。

37Example 13。

13。

Solutions:a. By inspection， the area above the axis equals the area below over one cycle，resulting in an average value of zero volts.b。

Using Eq。

（13.26):as shown in Fig。

13。

38.In reality, the waveform of Fig. 13。

37（b）is simply the square wave of Fig. 13。

37(a) with a dc shift of 4 V; that is v2 =v1 + 4 VEXAMPLE 13.14 Find the average values of the following waveforms over one full cycle:a.Fig. 13。

单片机的外文文献及中文翻译

单片机的外文文献及中文翻译一、外文文献Title: The Application and Development of SingleChip Microcontrollers in Modern ElectronicsSinglechip microcontrollers have become an indispensable part of modern electronic systems They are small, yet powerful integrated circuits that combine a microprocessor core, memory, and input/output peripherals on a single chip These devices offer significant advantages in terms of cost, size, and power consumption, making them ideal for a wide range of applicationsThe history of singlechip microcontrollers can be traced back to the 1970s when the first microcontrollers were developed Since then, they have undergone significant advancements in technology and performance Today, singlechip microcontrollers are available in a wide variety of architectures and capabilities, ranging from simple 8-bit devices to complex 32-bit and 64-bit systemsOne of the key features of singlechip microcontrollers is their programmability They can be programmed using various languages such as C, Assembly, and Python This flexibility allows developers to customize the functionality of the microcontroller to meet the specific requirements of their applications For example, in embedded systems for automotive, industrial control, and consumer electronics, singlechip microcontrollers can be programmed to control sensors, actuators, and communication interfacesAnother important aspect of singlechip microcontrollers is their low power consumption This is crucial in batterypowered devices and portable electronics where energy efficiency is of paramount importance Modern singlechip microcontrollers incorporate advanced power management techniques to minimize power consumption while maintaining optimal performanceIn addition to their use in traditional electronics, singlechip microcontrollers are also playing a significant role in the emerging fields of the Internet of Things （IoT) and wearable technology In IoT applications, they can be used to collect and process data from various sensors and communicate it wirelessly to a central server Wearable devices such as smartwatches and fitness trackers rely on singlechip microcontrollers to monitor vital signs and perform other functionsHowever, the design and development of systems using singlechip microcontrollers also present certain challenges Issues such as realtime performance, memory management, and software reliability need to be carefully addressed to ensure the successful implementation of the applications Moreover, the rapid evolution of technology requires developers to constantly update their knowledge and skills to keep up with the latest advancements in singlechip microcontroller technologyIn conclusion, singlechip microcontrollers have revolutionized the field of electronics and continue to play a vital role in driving technological innovation Their versatility, low cost, and small form factor make them an attractive choice for a wide range of applications, and their importance is expected to grow further in the years to come二、中文翻译标题：单片机在现代电子领域的应用与发展单片机已成为现代电子系统中不可或缺的一部分。

at89c52单片机中英文资料对照外文翻译文献综述

D.htmlat89c52单片机中英文资料对照外文翻译文献综述at89c52单片机简介中英文资料对照外文翻译文献综述AT89C52 Single-chip microprocessor introductionSelection of Single-chip microprocessor1. Development of Single-chip microprocessorThe main component part of Single-chip microprocessor as a result of by such centralize to be living to obtain on the chip，In immediate future middle processor CPU。

Storage RAM immediately﹑memoy readROM﹑Interrupt system、Timer /'s counter along with I/O's rim electric circuit awaits the main microcomputer section，The lumping is living on the chip。

Although the Single-chip microprocessor r is only a chip，Yet through makes up and the meritorous service be able to on sees，It had haveed the calculating machine system property，calling it for this reason act as Single-chip microprocessor r minisize calculating machine SCMS and abbreviate the Single-chip microprocessor。

单片机英文参考文献

单片机英文参考文献篇一：5-单片机+外文文献+英文文献+外文翻译中英对照AT89C51的介绍（原文出处：http：///resource/）描述AT89C51是一个低电压，高性能CMOS8位单片机带有4K字节的可反复擦写的程序存储器（PENROM）。

和128字节的存取数据存储器（RAM），这种器件采用ATMEL公司的高密度、不容易丢失存储技术生产，并且能够与MCS-51系列的单片机兼容。

片内含有8位中央处理器和闪烁存储单元，有较强的功能的AT89C51单片机能够被应用到控制领域中。

功能特性AT89C51提供以下的功能标准：4K字节闪烁存储器，128字节随机存取数据存储器，32个I/O口，2个16位定时/计数器，1个5向量两级中断结构，1个串行通信口，片内震荡器和时钟电路。

另外，AT89C51还可以进行0HZ的静态逻辑操作，并支持两种软件的节电模式。

闲散方式停止中央处理器的工作，能够允许随机存取数据存储器、定时/计数器、串行通信口及中断系统继续工作。

掉电方式保存随机存取数据存储器中的内容，但震荡器停止工作并禁止其它所有部件的工作直到下一个复位。

引脚描述VCC：电源电压 GND：地 P0口：P0口是一组8位漏极开路双向I/O口，即地址/数据总线复用口。

作为输出口时，每一个管脚都能够驱动8个TTL电路。

当“1”被写入P0口时，每个管脚都能够作为高阻抗输入端。

P0口还能够在访问外部数据存储器或程序存储器时，转换地址和数据总线复用，并在这时激活内部的上拉电阻。

P0口在闪烁编程时，P0口接收指令，在程序校验时，输出指令，需要接电阻。

沈阳航空工业学院电子工程系毕业设计（外文翻译）P1口：P1口一个带内部上拉电阻的8位双向I/O口，P1的输出缓冲级可驱动4个TTL电路。

对端口写“1”，通过内部的电阻把端口拉到高电平，此时可作为输入口。

因为内部有电阻，某个引脚被外部信号拉低时输出一个电流。

闪烁编程时和程序校验时，P1口接收低8位地址。

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