高速的比较器
LM319_高速双比较器
Min. Typ. Max. Min. Typ. Max. Unit
Vio
Input Offset Voltage Tamb = +25oC
(RS
≤
5kΩ)
–
(note
2)
Tmin. ≤ Tamb ≤ Tmax.
0.7
4
7
mV
2
8
10
Iio
Input Offset Current – (note 2) Tamb = +25oC
2/9
LM119
36 25 18 ±5 ±15 500 –55 to +125 –65 to +150
LM219
36 25 18 ±5 ±15 500 –40 to +105 –65 to +150
LM 3 1 9
36 25 18 ±5 ±15 500 0 to +70 –65 to +150
Unit
Package
N
D
•
•
•
•
•
•
PIN CONNECTIONS (top view)
1
2
3
4
+
5
-
6
7
14
13
12
11
-
10
+
9
8
October 1997
1 - N.C. 2 - N.C. 3 - Ground 1 4 - Non-inverting input 1 5 - Inverting input 1 6 - VCC7 - Output 2
LM119 - LM219 - LM319
03 高速比较器
03 高速比较器问：为什么我不能使用高增益或开环结构的标准运算放大器作为电压比较器 ?答：如果可接受的响应时间是几十微秒，可以这样做。
实际上，如果你再要求运算放大器具有低偏置电流、高精度和低失调电压，那么选择运算放大器可能比大多数标准电压比较器更合适。
但是由于大多数运算放大器为了反馈稳定，都具有内部相频补偿，所以使其响应时间达到纳秒级是相当困难的。
然而，低价格通用比较器LM311的响应时间为200 ns。
另外，运算放大器输出与标准逻辑电平不容易匹配。
因为运算放大器没有外部箝位或电平转换电路，它作为比较器工作时输出电压在正、负电源电压范围内有几伏的摆动，所以与标准TTL或CMOS逻辑电平不兼容。
问：我的比较器产生振荡难以控制，为什么出现这种情况?答：请检查一下电源旁路。
印制线路板上即使几英寸长的电源线导电带都会产生不利的直流电阻和电感。
这样，当输出状态改变时产生的瞬态电流会引起电源电压的波动，通过地线和电源线把这种波动反馈到输入端。
所以在安装低漏电电容(0 1 μF陶瓷电容) 时应尽可能靠近比较器的电源引脚，以便在高速切换期间使电容器作为低阻抗能量储存器。
问：我已经安装了旁路电容器，但是仍然不能解决高速比较器的振荡问题。
现在应该怎么办?答：可能是比较器的接地问题。
一定要使接地引线尽可能短并且要接到低阻抗接地平面以减小通过引线电感的耦合作用。
尽可能使用接地平面，避免使用插座。
产生振荡的其它原因可能是相对输入端的信号源高阻抗和杂散电容所致。
甚至是几千欧的源阻抗和几皮法的杂散电容都会产生难以控制的振荡。
所以应该缩短引线，包括示波器探头地线夹的引线。
为得到最佳测试结果，应使用最短接地引线(小于2 5 cm)以使引线电感量最小。
问：我缓慢地改变比较器的输入电压，当它通过阈值电压时，我的比较器输出端似乎出现“震颤”。
为什么我从比较器的输出端得不到一个干净的转变波形?答：比较器的高增益和宽频带通常是这个问题的根源。
AD9696超高速比较器
DIGITAL OUTPUTS Logic “1” Voltage (Source 4 mA) Logic “0” Voltage (Sink 10 mA)
SWITCHING PERFORMANCE Propagation Delay (tPD)5 Input to Output HIGH Input to Output LOW Latch Enable to Output HIGH Latch Enable to Output LOW Delta Delay Between Outputs Propagation Delay Dispersion 20 mV to 100 mV Overdrive 100 mV to 1.0 V Overdrive Rise Time10 Fall Time10 Latch Enable Pulse Width [tPW(E)] Setup Time (tS) Hold Time (tH)
Input Offset Current
Input Capacitance Input Voltage Range
LM119、LM219、LM319高速双比较器数据手册说明书
This is information on a product in full production.March 2013DocID2155 Rev 31/13LM119, LM219, LM319High-speed dual comparatorsDatasheet - production dataFeatures•Two independent comparators •Supply voltage: +5 V to ±15 V •Typically 80 ns response time at ±15 V •Minimum fan-out of two each side•Maximum input current of 1 µA over the operating temperature range •Inputs and outputs can be isolated from system ground •High common-mode slew rateDescriptionThese products are precision high-speed dual comparators designed to operate over a wide range of supply voltages down to a single 5 V logic supply and ground. They feature low input currents and high gains.The open collector of the output stage makes them compatible with transistor-transistor logic (TTL) as well as capable of driving lamps and relays at currents up to 25 mA.Although designed primarily for applications requiring operation from digital logic supplies, these comparators are fully specified for power supplies up to ±15 V.They feature faster response times than the LM111 at the expense of higher currentconsumption. However, the high speed, wide operating voltage range and low package count make the LM119, LM219, and LM319 much more versatile.Contents LM119, LM219, LM319Contents1Schematic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 4 3Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4Typical application diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105.1DIP14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105.2SO-14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 6Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122/13DocID2155 Rev 3LM119, LM219, LM319Schematic diagramdiagram1 SchematicFigure 1. Circuit schematics (1/2 LM119)Absolute maximum ratings and operating conditions LM119, LM219, LM3194/13DocID2155 Rev 32 Absolute maximum ratings and operating conditionsTable 1. Absolute maximum ratings (AMR)SymbolParameterValue UnitV o - V CC -Output to negative supply voltage 36V V CC -Negative supply voltage -25V CC +Positive supply voltage 18V id Differential input voltage ±5V i Input voltage (1)1.For supply voltages lower than ±15 V the absolute maximum input voltage is equal to the supply voltage.±15Output short-circuit to ground Infinite T j Maximum junction temperature 150°C T stg storage temperature range-65 to +150R thjaThermal resistance junction to ambient (2)(3)DIP14 SO-142.Short-circuits can cause excessive heating. Destructive dissipation can result from simultaneous short-circuits on all amplifiers.3.R th are typical values.80105°C/WR thjcThermal resistance junction to case (2)(3)DIP14 SO-143331ESDHBM: human body model (4) MM: machine model (5)CDM: charged device model (6)4.Human body model: 100 pF discharged through a 1.5 k Ω resistor between two pins of the device, done forall couples of pin combinations with other pins floating.5.Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between twopins of the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin combinations with other pins floating.6.Charged device model: all pins and the package are charged together to the specified voltage and thendischarged directly to the ground through only one pin. This is done for all pins.4001001500V Table 2. Operating conditionsSymbol ParameterValue Unit V CCSupply voltage5 to ±15VT operOperating free-air temperature range LM119 LM219 LM319-55 to + 125-45 to + 1050 to + 70°CLM119, LM219, LM319Electrical characteristics 3 ElectricalcharacteristicsTable 3. V CC = ±15 V, T amb = +25 °C (unless otherwise specified)Symbol ParameterLM119, LM219LM319Unit Min.Typ.Max.Min Typ.Max.V io Input offset voltage (R s≤5 kΩ)(1)(2)T min≤ T amb≤ T max0.7472810mVI io Input offset current (1)T min≤ T amb≤ T max307510080200300nAI ib Input bias current (1)T min≤ T amb≤ T max150500100025010001200A vd Large signal voltage gain1040840V/mVI CC+Positive supply currentV CC = ±15 VV CC+ = +5 V, V CC- = 0 V84.311.584.312.5mAI CC-Negative supply current3 4.535V icm Input common mode voltage rangeV CC = ±15 VV CC+ = +5 V, V CC- = 0 V±121±133±121±133VV OL Low level output voltageI o = 25 mAV i ≤ -5 mVV i≤ -10 mVT min≤ T amb≤ T maxV CC+ ≥ +4.5 V, V CC- = 0 V, I o(sink) < 3.2 mAV i≤ -6 mVV i≤ -10 mV0.750.231.50.40.750.31.50.4I OH High level output current (V o = +35 V)V i≥ 5 mVV i≥ 10 mVT min≤ T amb≤ T max, V i≥ 5 mV0.212100.210μAt res Response time (3) 8080ns 1.These specifications apply for V CC = ±15 V, unless otherwise stated.The offset voltage, offset current and bias currentspecifications apply for any supply voltage from a single +5 V up to ±15 V supplies. The offset voltages and offset current given are the maximum values required to drive the output down to 1V or up to +14 V with a 1 mA load current. Thus, these parameters define an error band and take into account the worst case effects of voltage gain and input impedance.2.At output switch point, V o≈ 1.4 V, no load, with V CC from 5 V to ±15 V and over the full input common-mode range.3.The response time specified is for a 100 mV input step with 5 mV overdrive.DocID2155 Rev 35/13Electrical characteristics LM119, LM219, LM3196/13DocID2155 Rev 3Figure 2. Input bias currents (LM119, LM219)Figure 3. Common mode limits (LM119, LM219)Figure 4. Output saturation voltage(LM119, LM219)Figure 5. Supply current (LM119, LM219)Figure 6. Supply current (LM119, LM219)Figure 7. Output limiting characteristics(LM119, LM219)DocID2155 Rev 37/13LM119, LM219, LM319Electrical characteristicsFigure 8. Input bias currents (LM319)Figure 9. Common mode limits (LM319)Figure 10. Output saturation voltage (LM319)Figure 11. Supply current (LM319)Figure 12. Transfer function Figure 13. Input characteristicsElectrical characteristicsLM119, LM219, LM3198/13DocID2155 Rev 3Figure 14. Response time on falling edge,V CC = ±15 VFigure 15. Response time on rising edge,V CC = ±5 VFigure 16. Response time on falling edge,V CC = ±5 V Figure 17. Response time on rising edge,V CC = ±15 VDocID2155 Rev 39/13LM119, LM219, LM319Typical application diagrams4 Typical application diagramsPackage information LM119, LM219, LM31910/13DocID2155 Rev 35 PackageinformationIn order to meet environmental requirements, ST offers these devices in different grades ofECOPACK® packages, depending on their level of environmental compliance. ECOPACK®specifications, grade definitions and product status are available at: .ECOPACK® is an ST trademark.5.1 DIP14 package informationTable 4. DIP14 package mechanical dataRef.DimensionsMillimeters InchesMin.Typ.Max.Min.Typ.Max.a10.510.020B 1.39 1.650.0550.065 b0.50.020b10.250.010D200.787 E8.50.335e 2.540.100e315.240.600F7.10.280 I 5.10.201 L 3.30.130Z 1.27 2.540.0500.100DocID2155 Rev 311/13LM119, LM219, LM319Package information5.2 SO-14 package informationTable 6. SO-14 package mechanical dataRef.DimensionsMillimetersInches Min.Typ.Max.Min.Typ.Max.A 1.750.068a10.10.20.0030.007a2 1.650.064b 0.350.460.0130.018b10.190.250.0070.010C 0.50.019c145° (typ.)D 8.558.750.3360.344E 5.86.20.2280.244e 1.270.050e37.620.300F 3.8 4.00.1490.157G 4.6 5.30.1810.208L 0.5 1.270.0190.050M 0.680.026S8° (max.)Ordering information LM119, LM219, LM31912/13DocID2155 Rev 36 Ordering information7 Revision historyFigure 21. Order codesOrder codeTemperature rangePackage Packaging Marking LM119N -55 °C to +125 °CDIP14Tube LM119N LM119D LM119DT SO-14Tube orTape and reel119LM219N -45 °C to +105 °CDIP14Tube LM219N LM219D LM219DT SO-14Tube or Tape and reel219LM319N 0 °C to +70 °CDIP14Tube LM319N LM319D LM319DTSO-14Tube or Tape and reel319Figure 22. Document revision historyDate RevisionChanges5-Jul-20021Initial release.28-Jan-20072Added ESD, R thja parameters in Table 1: Absolute maximum ratings(AMR).Expanded orderable parts table, see Table 21: Order codes .Updated document format.26-Mar-20133Minimum operating temperature changed from -40 °C to -45 °C.Updated titles of Figure 14, Figure 15, Figure 16, and Figure 17.LM119, LM219, LM319Please Read Carefully:Information in this document is provided solely in connection with ST products. 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All other names are the property of their respective owners.© 2013 STMicroelectronics - All rights reservedSTMicroelectronics group of companiesAustralia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of AmericaDocID2155 Rev 313/13。
高速比较器的分析与设计
本章小结 ............................................................. 29 结 致 论 .................................................................. 30 谢 .................................................................. 31
1.2
国内外发展现状分析
比较器是所有模数转换器的关键模块。其性能，尤其是速度、功耗，对整个模数转 换器的速度和功耗都有着至关重要的影响。但是传统的比较器很难同时满足模数转换器 对速度和功耗的要求，因此需要对传统的电路结构进行更新和改进，以满足应用要求。 传统的预放大锁存比较器有较小的延迟时间和低失调、低回踢噪声，但是这些高指标是 以高损耗和大的芯片面积为代价的；动态比较器虽然具有速度快、功耗低的优点，但是 失调电压和回踢噪声都很大，限制了其在高精度模数转换器中的应用；静态比较器具有 较小的回踢噪声，然而其功耗大，比较速度慢，不适于高速模数转换器。 关于比较器的研究，综合国际和国内模数转换器发展的情况来看，其趋势是高速和
关键词：高速比较器；CMOS；失调电压
I
兰omparator is one of the most important units in ADCs and widely used in electronic systems.The performances of comparators,such as speed, power consumption,noise, and offset,strongly influence the speed,precision and power consumption of ADCs. Voltage detectors,voltage level transformer,voltage-frequency transformer,sampling/track and hold circuit, zero detectors, peak and delay line detectors all utilize comparators. Based on preamplifier-latch theory,this design of the comparator useing pre-amplifier stage with the structure and dynamic latch structure,on the basis of the traditional structure of high-speed comparator circuit switch,application switching operational amplifier technology, improve the resolution and reduce the transmission delay. the comparator includes a preamplifier circuit of fully differential structure,a regenerative latch whose key components are inverters connected end to end,and a simple output stage which is made up of two cross-coupled NMOS transistor and the PMOS common source amplifier.When clock is low, the difference between input signal and reference signal amplified by preamplifier circuit,Preamplifier circuit get a big bandwidth to achieve high gain in the same time,improve the speed of the comparator effectively,Reduces the input offset voltage of the comparator,comparator output corresponding to logic level.When the clock signal is high,the comparator output is latched to high. Key words： high-speed comparator; CMOS; Offset voltag
高速比较器的分析与设计
本章小结 ............................................................. 29 结 致 论 .................................................................. 30 谢 .................................................................. 31
II
兰州交通大学毕业设........................................................... I Abstract ................................................................ II 1. 绪 论 ................................................................ 1 1.1 1.2 1.3 2. 课题背景、目的及意义 ............................................. 1 国内外发展现状分析 ............................................... 1 本文的工作内容和结构安排 ......................................... 2
本章小结 ............................................................. 20 3. MOS 工艺高速比较器电路的设计 ......................................... 21 3.1 3.2 3.3 比较器结构的选择 ................................................ 21 比较器失调的消除 ................................................ 22 MOS 比较器的设计 ................................................ 24 3.3.1 前置放大器的设计 ............................................ 24 3.3.2 判断电路的设计 .............................................. 25 3.3.3 总体设计 .................................................... 25 3.4 电路的仿真 ...................................................... 27
LM319_高速双比较器
Q10
Q13
R23 4k Ω
Q21
R22 60 Ω
R18 1.8k Ω R20 3.6k Ω
Q11
R13 Q14 600 Ω
Q12
Q15
R15 300 Ω
Output Q16
R25 600 Ω
R24 250 Ω
Q20
R19
250 Ω
Q19
R21
Q18
900 Ω
R14 2k Ω
R16 600 Ω
Q17 R17 3Ω
bi as current specif ic ati ons apply for any supply volt age from a si ngle +5V supply up t o ±15V suppli es. T he off set vol tages and offset current gi ven are the maximum val ues required to drive the output dow n to 1V or up to +14V wi th a 1mA load current.
R2 4k Ω
R3 4k Ω
R7 3k Ω
R6 3k Ω
V CC
Q9
Q4 Q8
Inverting Input
Non-inverting Input
Q3 Q7
C1 Q6
18 µF
Q2 R4 3k Ω
Q1
Q22
R5 3k Ω
R10 470k Ω
R8 2k Ω
Q6
R9 18k Ω
R11 13k Ω
R12 13k Ω
8 - Ground 2 9 - Non-inverting input 2 10 - Inverting input 2 11 - VCC+ 12 - Output 1 13 - N.C. 14 - N.C.
MAX913中文资料
M A X912/M A X913————单/双路，超高速，低功耗，精密的TTL比较器1.总体描述MAX913（单）和MAX912（双）高速，低功耗比较器是一个拥有独特设计就是在其线性区域是它的比较是可以防止振荡。
没有要求最低输入转换率。
它是由差分输入和互补的TTL输出。
快速传播延迟（10ns的典型值），具有极低的电源电流和宽共模输入范围，包括负电流使MAX912/MAX913达到的低功耗理想效果，高速，单电源+5V（或±5V）的应用，例如有V/F转换器和开关稳压器。
MAX912/MAX913保持着稳定的线性区域输出。
此功能消除了常见的在输出不稳定时产生高速驱动时具有的比较滞销输入信号。
该MAX912/MAX913可以单一+5V电源供电或±5V的分别供应。
该MAX913是一个改进的LT1016的替代品。
在输入一小能量时它提供了更宽的输入电压范围和等效速度。
在MAX912双比较具有同等性能的MAX913并且包括独立的锁存控制功能。
2.应用过零检测器以太网线接收器开关稳压器高速采样电路高速触发器扩展范围的V/F转换器快速脉冲宽度/高度的判别3.特点超快速（为10ns）单+5V或±5V的双电源供电输入范围扩展至负电源以下低功耗：6毫安（+5V）的每次比较无最小输入信号摆率的要求无电源电流扣球稳定的线性区可投入任一电源低失调电压：0.8mV4.引脚配置顶视图：5.绝对最大额定值：正电源电压 (7V)负电源电压..............................................-7V差分输入电压.......................................±15V输入电压....................................-0.3V至15V锁存引脚电压...................................等于耗材连续输出电流.....................................±20mA连续功耗（TA=70℃）8引脚塑料DIP（减少9.09mW/妹高于70°）......727mW 8引脚SO（减少5.88mW/每高于70°).................471mW 8引脚CERDIP（减少8.00mW/每高于70°).........640mW 16引脚塑料DIP（减少10.53mW/高于70°）.......842mW 16引脚窄的SO（减免8.70mW/高于70°）..........696mW16引脚CERDIP（减免10.00mW/高于70°)..........800mW工作温度范围：MAX91C......................................................0℃至70℃MAX91E....................................................-40℃至85℃MAX91MJ.................................................-55℃至125℃储存温度范围........................................-65°C至150°C焊接温度（10秒）.........................................................300℃注：超越“绝对最大额定值“，即可能造成永久性损坏设备。
ADC中高速比较器的设计文献综述
---------------------------------------------------------------范文最新推荐------------------------------------------------------ ADC中高速比较器的设计+文献综述摘要模数转换器(ADC)作为模拟电路和数字电路之间的转换电路，是众多电子类产品的重要模块。
随着视频、通讯等技术的迅速发展，高速、中分辨率ADC 的需求日益增长。
比较器作为ADC的关键模块，其速度、功耗等性能对整个转换电路的速度和功耗都有着至关重要的影响。
本论文基于预放大再生理论，采用SMIC 1.2V 0.065μm CMOS工艺，设计了一种适用于SAR ADC 的高速低功耗比较器电路，并进行了版图设计。
该比较器由前臵预放大级、锁存级和输出级构成。
前臵放大器的引入提高了比较器的速度，并降低了锁存器的失调电压。
同时采用均衡补偿技术，有效地抑制了回馈噪声。
电路的仿真均是在Cadence环境中进行。
仿真结果显示，在1.2V电源电压条件下，当时钟频率为1GHz1 / 22时，比较器功耗为0.3936mW，失调电压在-0.3mV到0.1mV之间。
比较器能够满足SAR ADC的性能要求。
8668关键词CMOS比较器预放大正反馈锁存器回馈噪声毕业设计说明书（论文）外文摘要TitleDesign of high speed low power comparator for ADCsAbstractAnalog-to-digital converters (ADCs) are important building blocks in many electronic products. The requirements for high-speed, medium-resolution ADC keep growing with the rapid development of video and communication technology. The speed and power consumption of the ADC is critically affected by the speed, power consumption and other properties of the comparator, which is a key module of the ADC.---------------------------------------------------------------范文最新推荐------------------------------------------------------The thesis is based on pre-amplification and regeneration theories. The high speed low power comparator is designed for SAR ADCs. And it's designed in the SMIC 0.065μm CMOS process with a supply voltage of 1.2V. The comparator is formed with a pre-amplifier stage, a latch stage and an output stage. The speed is improved and the offset voltage is reduced both by the pre-amplifier, and the kickback noise is inhibited by the neutralization technique.一般地，电子类产品的控制信号与处理信号是数字信号，而现实世界存在的以及电子产品间的通信信号为连续变化的模拟信号，这就需要将模拟信号转换为可以被处理的数字信号。
TLV3501高速比较器
proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes couldPACKAGING INFORMATION(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-The planned eco-friendly classification:Pb-Free(RoHS),Pb-Free(RoHS Exempt),or Green(RoHS&no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free(RoHS Exempt):This component has a RoHS exemption for either1)lead-based flip-chip solder bumps used between the die and package,or2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free(RoHS compatible)as defined above.Green(RoHS&no Sb/Br):TI defines"Green"to mean Pb-Free(RoHS compatible),and free of Bromine(Br)and Antimony(Sb)based flame retardants(Br or Sb do not exceed0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.OTHER QUALIFIED VERSIONS OF TLV3502:•Automotive:TLV3502-Q1NOTE:Qualified Version Definitions:•Automotive-Q100devices qualified for high-reliability automotive applications targeting zero defectsTAPE AND REEL INFORMATION*All dimensions are nominal Device Package Type Package DrawingPinsSPQ Reel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant TLV3501AIDBVR SOT-23DBV 63000180.08.4 3.2 3.1 1.39 4.08.0Q3TLV3501AIDBVT SOT-23DBV 6250180.08.4 3.2 3.1 1.39 4.08.0Q3TLV3501AIDR SOICD 82500330.012.4 6.4 5.2 2.18.012.0Q1TLV3502AIDCNR SOT-23DCN 83000179.08.4 3.2 3.2 1.4 4.08.0Q3TLV3502AIDCNT SOT-23DCN 8250179.08.4 3.2 3.2 1.4 4.08.0Q3TLV3502AIDR SOIC D 82500330.012.4 6.4 5.2 2.18.012.0Q1*All dimensions are nominalDevice Package Type Package Drawing Pins SPQ Length(mm)Width(mm)Height(mm) TLV3501AIDBVR SOT-23DBV63000190.5212.731.8 TLV3501AIDBVT SOT-23DBV6250190.5212.731.8 TLV3501AIDR SOIC D8*******.0346.029.0 TLV3502AIDCNR SOT-23DCN83000195.0200.045.0 TLV3502AIDCNT SOT-23DCN8250195.0200.045.0 TLV3502AIDR SOIC D8*******.0346.029.0IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make 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高速比较器电路设计
高速比较器电路设计English Answer:High-Speed Comparator Circuit Design.High-speed comparators are essential components in various electronic systems, such as high-speed data converters, communication systems, and instrumentation. They are designed to compare two input signals and produce a digital output that indicates which signal is larger. The performance of a high-speed comparator is characterized by its speed, accuracy, and power consumption.To design a high-speed comparator, several factors need to be considered:1. Amplifier Design: The amplifier stage is the heart of the comparator. It should provide high gain and bandwidth to amplify the input signals and produce a clean digital output. Different amplifier topologies, such asdifferential amplifiers, folded-cascode amplifiers, and telescopic amplifiers, can be used depending on the desired performance.2. Regeneration Circuit: The regeneration circuit converts the amplified signal into a digital output. It typically consists of a positive feedback loop that amplifies the output signal and drives it to one of the two stable states (high or low). Several regeneration circuit topologies, such as latches, flip-flops, and sense amplifiers, can be used.3. Offset Cancellation: Input offset voltage is a critical parameter that affects the accuracy of the comparator. It is caused by mismatches in the amplifier stage and can lead to errors in the output. Various offset cancellation techniques, such as auto-zeroing, chopper stabilization, and correlated double sampling, can be employed to minimize the offset voltage.4. Layout Considerations: The layout of the comparator circuit plays a significant role in its performance. Properrouting of signals, placement of components, and grounding techniques are crucial to minimize parasitic effects and ensure stability.Design Example:As an example, a high-speed comparator circuit using a differential amplifier and a latch-based regeneration circuit can be designed. The differential amplifier provides high gain and bandwidth, while the latch circuit converts the amplified signal into a digital output. The input offset voltage can be minimized using auto-zeroing techniques. The layout can be optimized to minimize parasitic effects and ensure stability.Conclusion:High-speed comparator circuit design requires careful consideration of various factors, including amplifier design, regeneration circuit, offset cancellation, and layout considerations. By optimizing these parameters,high-performance comparators with high speed, accuracy, andlow power consumption can be achieved.中文回答：高速比较器电路设计。
lmv7239 高速单电源电压比较器
LMV7235/LMV7239/ LMV7239Q
5-Pin SC70/SOT23
Top View
10135903
Ordering Information
Package 5-pin SC70 5-pin SOT23
Part Number LMV7235M7 LMV7235M7X LMV7239M7 LMV7239M7X LMV7239QM7 LMV7239QM7X LMV7235M5 LMV7235M5X LMV7239M5 LMV7239M5X
The LMV7235/LMV7239/LMV7239Q have a greater than railto-rail common mode voltage range. The input common mode voltage range extends 200mV below ground and 200mV above supply, allowing both ground and supply sensing.
Symbol
Parameter
Conditions
Min (Note 6)
Typ (Note 5)
Max (Note 6)
Units
VOS
Input Offset Voltage
0.8
6
mV
8
IB
Input Bias Current
30
一种用于非制冷红外探测器的高速比较器
一种用于非制冷红外探测器的高速比较器陈力颖1，2，张博超1，2，李勇3，徐微1，2（1.天津工业大学电子与信息工程学院，天津300387；2.天津工业大学天津市光电检测技术与系统重点实验室，天津300387；3.台州国晶智芯科技有限公司，浙江台州318014）摘要：为了提高红外探测器模数转换的速度与精度，设计了一种用于非制冷红外焦平面阵列探测器片上14位10MSps 逐次逼近型模数转换器的高速比较器。
本比较器采用前置放大器、动态高速度锁存器和新型输出缓冲器的三联级结构，并通过输入、输出失调存储的方式对各级放大器进行失调电压消除，使比较器工作的速度与精度得到提高。
结果表明：基于TSMC 0.18滋m 1P6M 工艺进行设计与仿真，在电源电压为5V 的情况下，该比较器的采样速率为200MSps ，失调电压为32.63V ，传输延时为259ps ，-3dB 带宽为1.11GHz 。
该比较器相较于其他的设计，具有更小的失调电压以及传输延时，满足逐次逼近型模数转换器对其比较器速度与精度的要求。
关键词：非制冷红外探测器；模数转换器；高速比较器；失调电压；非制冷中图分类号：TN432文献标志码：A文章编号：员远苑员原园圆源载（圆园23）园4原园园57原06收稿日期：2022-01-01基金项目：天津市科技计划项目（18ZXCLGX0090）；天津市自然科学基金资助项目（18JCYBJC85400）通信作者：陈力颖（1976—），男，博士，副教授，主要研究方向为射频集成电路、模拟集成电路、数模混合集成电路。
E-mail ：136****************A high-speed comparator for uncooled infrared detectorsCHEN Liying 1，2，ZHANG Bochao 1，2，LI Yong 3，XU Wei 1，2（1.School of Electronics and Information Engineering ，Tiangong University ，Tianjin 300387，China ；2.Tianjin Key Laboratory of Optoelectronic Detection Technology and System ，Tiangong University ，Tianjin 300387，China ；3.Taizhou National Crystal Technology Co.，Ltd.，Taizhou 318014，Zhejiang Province ，China ）Abstract ：In order to improve the speed and accuracy of the infrared detector忆s analog-to-digital conversion袁a high-speedcomparator for the 14-bit 10MSps successive approximation analog-to-digital converter on the uncooled infrared focal plane array detector is designed.The comparator adopts a triple-stage structure of preamplifier袁dynamic high-speed latch and new output buffer袁and eliminates the offset voltage of each amplifier by means of input and output offset storage袁so that the speed and accuracy of the comparator work is improved.The results show that院based on TSMC 0.18滋m 1P6M process design and simulation袁when the power supply voltage is 5V袁the sam鄄pling rate of the comparator is 200MSps袁the offset voltage is 32.63V袁the transmission delay is 259ps袁and the -3dB bandwidth is pared with other designs袁this comparator has a smaller offset voltage andtransmission delay袁which meets the requirements of successive approximation analog-to-digital converters forits comparator speed and accuracy.Key words ：uncooled infrared detector曰analog-to-digital converter曰high-speed comparator曰offset voltage曰uncooled近年来，非制冷红外探测器在工农业、医疗、安防以及军事等多个领域得到了大范围的应用，使非制冷红外探测器进入到快速发展阶段[1]。
MAX9140 MAX9141 MAX9142 MAX9144高速比较器说明书
General DescriptionThe MAX9140/MAX9141 are single and the MAX9142/MAX9144 are dual/quad high-speed comparators optimized for systems powered from a 3V or 5V supply. The MAX9141 features latch enable and device shutdown. These devices combine high speed, low power, and rail-to-rail inputs. Propagation delay is 40ns, while supply current is only 150μA per comparator.The input common-mode range of the devices extends beyond both power-supply rails. The outputs pull to within 0.3V of either supply rail without external pullup circuitry, making these devices ideal for interface with both CMOS and TTL logic. All input and output pins can tolerate a continuous short-circuit fault condition to either rail. Internal hysteresis ensures clean output switching, even with slow-moving input signals.The devices are higher-speed, lower-power, and lower-cost upgrades to industry-standard comparators MAX941/MAX942/MAX944.The MAX9140 are offered in tiny 5-pin SC70 and SOT23 packages. The MAX9141 and MAX9142 are available in 8-pin SOT23 and SO packages, while the MAX9144 is available in both 14-pin SO and TSSOP packages.Applications●Line Receivers●Battery-Powered Systems●Threshold Detectors/Discriminators ●3V/5V Systems●Zero-Crossing Detectors●Sampling CircuitsFeatures●Fast, 40ns Propagation Delay (10mV Overdrive) ●Low Power• 150μA Supply Current Per Comparator (3V) ●Optimized for 3V and 5V Applications ●Rail-to-Rail Input Voltage Range ●Low, 500μV Offset Voltage●Internal Hysteresis for Clean Switching ●Outputs Swing 300mV of Power Rails ●CMOS/TTL-Compatible Outputs ●Output Latch (MAX9141 Only)●Shutdown Function (MAX9141 Only) ●Available in SC70 and SOT23 Packages●AEC-Q100 Qualified (MAX9140AAXK/V+T Only)19-2064; Rev 9; 10/19Click here for production status of specific part numbers.MAX9140/MAX9141/MAX9142/MAX914440ns, Low-Power, 3V/5V, Rail-to-RailSingle-Supply ComparatorsPin ConfigurationsPower-Supply RangesSupply Voltage (V CC to GND) ...........................................+6V IN+, IN- to GND ....................................-0.3V to (V CC + 0.3V) LE Input Voltage (MAX9141 only) ........-0.3V to (V CC + 0.3V) SHDN Input Voltage (MAX9141 only) ..-0.3V to (V CC + 0.3V)Current into Input Pins .....................................................±20mA Input/Output Short-Circuit Duration toV CC or GND ..........................................................Continuous Continuous Power Dissipation (T A = +70°C)5-Pin SC70 (derate 3.1mW/°C above +70°C) .............247mW 5-Pin SOT23 (derate 7.1mW/°C above +70°C) ..........571mW8-Pin SOT23 (derate 9.1mW/°C above +70°C) ..........727mW 8-Pin SO (derate 5.9mW/°C above +70°C) ..............470.6mW 14-Pin TSSOP (derate 9.1mW/°C above +70°C) ........727mW 14-Pin SO (derate 8.33mW/°C above +70°C) ..........666.7mW Operating Temperature RangeE grade ...........................................................-40°C to +85°C A grade .........................................................-40°C to +125°C Junction Temperature ......................................................+150°C Storage Temperature Range ............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C(V CC = 5V, V CM = 0V, SHDN = LE = V CC (MAX9141 only), C L = 15pF, T A = T MIN to T MAX , unless otherwise noted. Typical values are at T A = +25°C.) (Note 1)PARAMETERSYMBOL CONDITIONSMIN TYPMAX UNITS Operating Supply Voltage V CC (Note 2) 2.7 5.5V Input Voltage RangeV CMR (Note 3)-0.2V CC + 0.2VInput Offset Voltage V OS (Note 4)T A = +25°C0.5 2.0mV T A = -40°C to +85°C 4.5MAX9140AA_ _6.0Input Hysteresis V HYST (Note 5) 1.5mV Input Bias Current I B (Note 6)T A = -40°C to +85°C 90320nA MAX9140AA_ _350Input Offset CurrentI OS T A = -40°C to +85°C 8120nA MAX9140AA_ _140Common-Mode Rejection Ratio CMRR V CC = 5.5V (Note 7)T A = -40°C to +85°C 80800µV/V MAX9140AA_ _850Power-Supply Rejection RatioPSRR2.7V ≤ V CC ≤ 5.5V T A = -40°C to +85°C 80750µV/V MAX9140AA_ _800Output High VoltageV OH I SOURCE = 4mA T A = -40°C to +85°C V CC - 0.425V CC - 0.3VMAX9140AA_ _V CC - 0.47Output Low Voltage V OL I SINK = 4mAT A = -40°C to +85°C 0.30.425V MAX9140AA_ _0.45Output Leakage CurrentI LEAKSHDN = GND, MAX9141 only (Note 8)0.041µAMAX9142/MAX9144Single-Supply ComparatorsAbsolute Maximum RatingsStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.Electrical Characteristics(V CC = 5V, V CM = 0V, SHDN = LE = V CC (MAX9141 only), C L = 15pF, T A = T MIN to T MAX , unless otherwise noted. Typical values are at T A = +25°C.) (Note 1)Note 1: All devices are 100% production tested at T A = +25°C. Specifications over temperature are guaranteed by design.Note 2: Inferred from PSRR test.Note 3: Inferred from CMRR test. Note also that either or both inputs can be driven to the absolute maximum limit (0.3V beyondeither supply rail) without damage or false output inversion.Note 4: V OS is defined as the center of the input-referred hysteresis zone. See Figure 1.Note 5: The input-referred trip points are the extremities of the differential input voltage required to make the comparator outputchange state. The difference between the upper and lower trip points is equal to the width of the input-referred hysteresis zone. See Figure 1.Note 6: The polarity of I B reverses direction as V CM approaches either supply rail.Note 7: Specified over the full common-mode voltage range (V CMR ).Note 8: Specification is for current flowing into or out of the output pin for V OUT driven to any voltage from V CC to GND while the partis in shutdown.Note 9: Specified between any two channels in the MAX9142/MAX9144.Note 10: Specified as the difference between t PD+ and t PD- for any one comparator.Note 11: Applies to the MAX9141 only for both SHDN and LE .Note 12: Applies to the MAX9141 only. Comparator is active with LE driven high and is latched with LE driven low (V OD = 10mV). SeeFigure 2.Note 13: Applicable to the MAX9141 only. Comparator is active with the SHDN driven high and is shutdown with SHDN driven low.Shutdown enable time is the delay when the SHDN is driven high to the time the output is valid. Shutdown disable time is the delay when the SHDN is driven low to the time the comparator shuts down.PARAMETERSYMBOLCONDITIONSMINTYP MAX UNITSSupply Current (Per Comparator)I CCV CM = V CC = 3VMAX9141165275µA MAX9140,T A = -40°C to 85°C 150250MAX9140AA_ _360MAX9142/MAX9144150250V CM = V CC = 5VMAX9141200320MAX9140,T A = -40°C to 85°C 165300MAX9140AA_ _400MAX9142/MAX9144165300MAX9141 only, SHDN = GND; V CC = V CM = 3V1230Propagation Delayt PD+, t PD-V CC = 3V, V OD = 10mV 40ns Differential Propagation Delay dt PDV OD = 10mV (Note 9)2ns Propagation Delay Skew V OD = 10mV (Note 10)2ns Logic Input-Voltage High V IH (Note 11)(V CC /2) +0.4V CC /2V Logic Input-Voltage Low V IL (Note 11)V CC /2(V CC /2) -0.4V Logic Input Current I IL , I IH V LOGIC = 0 to V CC (Note 11)210µA Data-to-Latch Setup Time t S (Note 12)16ns Latch-to-Data Hold Time t H (Note 12)16ns Latch Pulse Width t LPW (Note 12)45ns Latch Propagation Delay t LPD (Note 12)60ns Shutdown Enable Time (Note 13)1µs Shutdown Disable Time(Note 13)5µs MAX9142/MAX9144Single-Supply ComparatorsElectrical Characteristics (continued)(V CC = 3.0V, V CM = 0V, C L = 15pF, V OD = 10mV, T A = +25°C, unless otherwise noted.)320322326324328330-400-2020406080100OUTPUT LOW VOLTAGE vs. TEMPERATURETEMPERATURE (°C)V O L (m V )5.005.055.105.155.20-400-2020406080100OUTPUT HIGH VOLTAGE vs. TEMPERATURETEMPERATURE (°C)V O H (V )35404550-400-2020406080100OUTPUT SHORT-CIRCUIT (SINK) CURRENTvs. TEMPERATURETEMPERATURE (°C)O U T P U T S H O R T -C I R C U I T S I N K C U R R E N T (m A)15253545-40-2020406080100OUTPUT SHORT-CIRCUIT (SOURCE) CURRENT vs. TEMPERATURETEMPERATURE (°C)O U T P U T S H O R T -C I R C U I T S O U R C E C U R R E N T (m A )0100502001502503003456MAX9140 SUPPLY CURRENT vs. SUPPLY VOLTAGEV CC (V)I C C (A )40208060120100140-5025-255075100INPUT BIAS CURRENT vs. TEMPERATURETEMPERATURE (°C)I N P U T C U R R E N T (n A )MAX9142/MAX9144Single-Supply ComparatorsTypical Operating Characteristics(V CC = 3.0V, V CM = 0V, C L = 15pF, V OD = 10mV, T A = +25°C, unless otherwise noted.)-500-200-300-400-1000100200300400500-50-25255075100INPUT OFFSET VOLTAGE vs. TEMPERATURETEMPERATURE (°C)V O S (µV )-1.0-0.4-0.6-0.8-0.200.20.40.60.81.0-500-25255075100TRIP POINT vs. TEMPERATURETEMPERATURE (°C)V O S (m V )-110326547-40-2020406080100INPUT VOLTAGE RANGE vs. TEMPERATURETEMPERATURE (°C)I N P U T V O L T A G E R A N G E (V )202535304045040206080100PROPAGATION DELAY vs. INPUT OVERDRIVEINPUT OVERDRIVE (mV)P R O P A G A T I O N D E L A Y (n S )253040354550-50-25255075100PROPAGATION DELAY vs. TEMPERATURETEMPERATURE (°C)P R O P A G A T I O N D E L A Y (n s )2030254035504555154560307590105PROPAGATION DELAY vs. CAPACITIVE LOADCAPACITIVE LOAD (pF)P R O P A G A T I O N D E L A Y (n s )MAX9142/MAX9144Single-Supply ComparatorsTypical Operating Characteristics (continued)(V CC = 3.0V, V CM = 0V, C L = 15pF, V OD = 10mV, T A = +25°C, unless otherwise noted.)PINNAME FUNCTIONMAX9140MAX9141MAX9142MAX9144——11OUTA Comparator A Output ——22INA-Comparator A Inverting Input ——33INA+Comparator A Noninverting Input 5184V CC Positive Supply——55INB+Comparator B Noninverting Input ——66INB-Comparator B Inverting Input ——77OUTB Comparator B Output ———8OUTC Comparator C Output ———9INC-Comparator C Inverting Input ———10INC+Comparator C Noninverting Input 24411GND Ground———12IND+Comparator D Noninverting Input ———13IND-Comparator D Inverting Input ———14OUTD Comparator D Output 32——IN+Noninverting Input 43——IN-Inverting Input—6——SHDN Shutdown: MAX9141 is active when SHDN is driven high; MAX9141 is in shutdown when SHDN is driven low.—5——LE The output is latched when LE is low. The latch is transparent when LE is high.17——OUT Comparator Output—8——N.C.No Connection. Not internally connected.OUTPUT 2V/div INPUT 50mV/divPROPAGATION DELAY (t PD -)10ns/div V OD = 10mV V CC = 5.5VOUTPUT 2V/div INPUT 50mV/divPROPAGATION DELAY (t PD +)10ns/div V OD = 10mVV CC = 5.5VOUTPUT 2V/divINPUT 50mV/divSINUSOID RESPONSE AT 4MHz50ns/divV CC = 5.5VMAX9142/MAX9144Single-Supply ComparatorsPin DescriptionTypical Operating Characteristics (continued)Detailed DescriptionThe MAX9140/MAX9141/MAX9142/MAX9144 single-supply comparators feature internal hysteresis, high speed, and low power. Their outputs are pulled to within 300mV of either supply rail without external pullup or pulldown circuitry. Rail-to-rail input voltage range and low-voltage single-supply operation make these devices ideal for portable equipment. The devices interface directly to CMOS and TTL logic.Most high-speed comparators oscillate in the linear region because of noise or undesired parasitic feedback. This tends to occur when the voltage on one input is at or equal to the voltage on the other input. To counter the parasitic effects and noise, the devices have an internal hysteresis of 1.5mV.The hysteresis in a comparator creates two trip points: one for the rising input voltage and one for the falling input voltage (Figure 1). The difference between the trip points is the hysteresis. The average of the trip points is the offset voltage. When the comparator’s input voltages are equal, the hysteresis effectively causes one comparator input voltage to move quickly past the other, thus taking theinput out of the region where oscillation occurs. Standard comparators require hysteresis to be added with external resistors. The devices’ fixed internal hysteresis eliminates these resistors. To increase hysteresis and noise margin even more, add positive feedback with two resistors as a voltage divider from the output to the noninverting input. Figure 1 illustrates the case where IN- is fixed and IN+ is varied. If the inputs were reversed, the figure would look the same, except the output would be inverted.The MAX9141 includes an internal latch that allows storage of comparison results. The LE pin has a high input impedance. If LE is high, the latch is transparent (i.e., the comparator operates as though the latch is not present). The comparator’s output state is latched when LE is pulled low (Figure 2).Shutdown Mode (MAX9141 Only)The MAX9141 shuts down when the SHDN pin is low. When shut down, the supply current drops to less than 12μA, and the three-state output becomes high impedance. The SHDN pin has a high-input impedance. Connect SHDN to V CC for normal operation. Exit shutdown with LE high (transparent state); otherwise, the output will be indeterminate.Input Stage CircuitryThe devices include internal protection circuitry that prevents damage to the precision input stage from large differential input voltages. This protection circuitry consists of two back-toback diodes between IN+ and IN- as well as two series 4.1kΩ resistors (Figure 3). The diodes limit the differential voltage applied to the internal circuitry of the comparators to be no more than 2V F, where V F is the forward voltage drop of the diode (about 0.7V at +25°C). For a large differential input voltage (exceeding 2V F), this protection circuitry increases the input bias current at IN+ (source) and IN- (sink).F(IN+ - IN-) - 2VInput Current2 4.1k=×ΩInput current with large differential input voltages should not be confused with input bias current (I B). As long as the differential input voltage is less than 2V F, this input current is equal to I B. The output is in the correct logic state if one or both inputs are within the common-mode range. Figure 1. Input and Output Waveform, Noninverting Input VariedMAX9142/MAX9144Single-Supply ComparatorsOutput Stage CircuitryThe MAX9140/MAX9141/MAX9142/MAX9144 contain a current-driven output stage as shown in Figure 4. During an output transition, I SOURCE or I SINK is pushed or pulled to the output pin. The output source or sink current is high during the transition, creating a rapid slew rate. Once the output voltage reaches V OH or V OL , the source or sink current decreases to a small value, capable of maintaining the V OH or V OL static condition. This significant decrease in current conserves power after an output transition has occurred.One consequence of a current-driven output stage is a linear dependence between the slew rate and the load capacitance. A heavy capacitive load will slow down a voltage output transition. This can be useful in noisesensitive applications where fast edges may cause interference.Applications InformationCircuit Layout and BypassingThe high-gain bandwidth of the MAX9140/MAX9141/MAX9142/MAX9144 requires design precautions to real-ize the full high-speed capabilities of these comparators. The recommended precautions are:1) Use a PCB with a good, unbroken, low-inductance ground plane.2) Place a decoupling capacitor (a 0.1μF ceramic capacitor is a good choice) as close to V CC as possible.3) Pay close attention to the decoupling capacitor’s bandwidth, keeping leads short.4) On the inputs and outputs, keep lead lengths short to avoid unwanted parasitic feedback around the comparators.5) Solder the device directly to the PCB instead of using a socket.Figure 2. MAX9141 Timing Diagram with Latch OperatorFigure 3. Input Stage CircuitryMAX9142/MAX9144Single-Supply ComparatorsFigure 4. Output Stage Circuitry Figure 5. 3.3V Digitally Controlled Threshold DetectorFigure 6. Line Receiver ApplicationMAX9142/MAX9144Single-Supply ComparatorsChip InformationPROCESS: BipolarNote: All E-grade devices are specified over the -40°C to +85°C operating temperature range. All A-grade devices are specified over the -40°C to +125°C operating temperature range.+Denotes a lead(Pb)-free/RoHS-compliant package.-Denotes a package containing lead(Pb).T = Tape and reel.Ordering InformationPART*PIN-PACKAGETOP MARK MAX9140AAUK+T 5 SOT23+AFEJ MAX9140AAXK+T 5 SC70+ASW MAX9140AAXK/V+T5 SC70+AUG MAX9140EXK-T 5 SC70ACC MAX9140EUK-T 5 SOT23ADQP MAX9141EKA-T 8 SOT23AAFD MAX9141ESA 8 SO —MAX9142EKA+8 SOT23+AAFE MAX9142EKA+T 8 SOT23+AAFE MAX9142ESA+8 SO —MAX9142ESA+T 8 SO —MAX9142EKA-T 8 SOT23AAFE MAX9142ESA 8 SO —MAX9144EUD 14 TSSOP —MAX9144ESD14 SO—MAX9142/MAX9144Single-Supply Comparators Package InformationFor the latest package outline information and land patterns (footprints), go to /packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.PACKAGE TYPE PACKAGE CODE DOCUMENT ND PATTERN NO.8 SOT23K8-521-007890-01765 SOT23U5-121-005790-01745 SC70X5+121-007690-018814 TSSOP U14-121-006690-01138 SO S8-221-004190-009614 SO S14-121-004190-0112REVISION NUMBERREVISION DATE DESCRIPTIONPAGES CHANGED06/01Initial release—11/07Updated Absolute Maximum Ratings with ±20mA current into input pin.2212/07Added two new automotive grade products.1, 231/10Added automotive qualified part146/14Added Junction Temperature to Absolute Maximum Ratings259/15Removed MAX9140AAXK/V from Ordering Information and edited the Absolute Maximum Ratings1, 2610/15Updated TOC7 and TOC8 in the Typical Operating Characteristics section 6711/17Added AEC statement to Features section and updated Ordering Information table1, 981/19Removed embedded package outline drawings 10–13910/19Updated Ordering Information9Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.MAX9140/MAX9141/MAX9142/MAX914440ns, Low-Power, 3V/5V, Rail-to-RailSingle-Supply Comparators© 2019 Maxim Integrated Products, Inc. │ 11Revision HistoryFor pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https:///en/storefront/storefront.html.。
流水线ADC中高速比较器的设计和分析
流水线ADC中高速比较器的设计和分析在任何一个高速高辨别率的模数转换器中，高精度和迅速总是起着至关重要的作用。
与其它种类的相比，流水线ADC 有着高速、高辨别率的特点。
因此，它在系统中，有着广泛的应用。
流水线ADC由许多子FLASHADC 构成。
流水线ADC 的特性中，特殊是速度，功耗和失调对囫囵有着很重要的影响。
适合流水线的动态比较器主要有三种：分压比较器、差分比较器和差分比较器。
但是他们可能消耗过多的功耗和较大的失调电压。
因此，前置运放锁存比较器的优势体现在3.5 位的子FLASHADC 或者更高辨别率的子FLASHADC 中。
在考虑上面提及的因素后，本文给出了时光延迟、失调电压和比较器的踢回噪声的理论分析，并按照此分析，设计和优化了比较器电路。
2 预放大锁存比较器的工作原理前置增益运放锁存比较器的原理是前置增益运放放大输入信号，被放大后的信号输入到锁存比较器，最后信号通过一个一般的RS 触发器，得到终于比较结果。
这种结构结合了前置增益运放对输入信号负指数响应和锁存比较器对输入信号正指数响应的优点。
因此前置增益运放锁存比较器与其它锁存比较器相比，有较小的传输的延迟。
锁存比较器的失调电压除以预的增益后折算到运放的输入端。
因此，前置增益运放比较器的失调电压主要来自于预放大器。
通过前置增益运放比较器输入端的踢回噪声，在信号的比较阶段混淆了输入信号。
没有隔离电路可能导致采样电路的不稳定性和不精确的比较结果。
因此在锁存比较器输入端和前置增益运放的输出端在之间需要一个隔离电路。
3 电路的结构图1 给出了前置增益运放锁存器的电路结构。
前置增益运放有两个差分对，分离由NM2，NM3，NM4 和NM5 组成。
PM1，PM2，PM3，PM4 交错相连形成一个正反馈回路，并且增大了前置放大器的增益。
NM9，NM10，NM11，PM6，PM11 是开关。
电路的工作流程为：当Clk 为低的时候，锁存比较器被复位，与此同时，Clk1 为高，锁存比较器能够接收到前第1页共5页。
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高速比较器
问：为什么我不能使用高增益或开环结构的标准运算放大器作为电压比较器 ? 答：如果可接受的响应时间是几十微秒，可以这样做。
实际上，如果你再要求运算放大器具有低偏置电流、高精度和低失调电压，那么选择运算放大器可能比大多数标准电压比较器更合适。
但是由于大多数运算放大器为了反馈稳定，都具有内部相频补偿，所以使其响应时间达到纳秒级是相当困难的。
然而，低价格通用比较器LM311的响应时间为200 ns。
另外，运算放大器输出与标准逻辑电平不容易匹配。
因为运算放大器没有外部箝位或电平转换电路，它作为比较器工作时输出电压在正、负电源电压范围内有几伏的摆动，所以与标准TTL或CMOS逻辑电平不兼容。
问：我的比较器产生振荡难以控制，为什么出现这种情况?
答：请检查一下电源旁路。
印制线路板上即使几英寸长的电源线导电带都会产生不利的直流电阻和电感。
这样，当输出状态改变时产生的瞬态电流会引起电源电压的波动，通过地线和电源线把这种波动反馈到输入端。
所以在安装低漏电电容(0 1 μF陶瓷电容) 时应尽可能靠近比较器的电源引脚，以便在高速切换期间使电容器作为低阻抗能量储存器。
问：我已经安装了旁路电容器，但是仍然不能解决高速比较器的振荡问题。
现在应该怎么办?
答：可能是比较器的接地问题。
一定要使接地引线尽可能短并且要接到低阻抗接地平面以减小通过引线电感的耦合作用。
尽可能使用接地平面，避免使用插座。
产生振荡的其它原因可能是相对输入端的信号源高阻抗和杂散电容所致。
甚至是几千欧的源阻抗和几皮法的杂散电容都会产生难以控制的振荡。
所以应该缩短引线，包括示波器探头地线夹的引线。
为得到最佳测试结果，应使用最短接地引线(小于2 5 cm)以使引线电感量最小。
问：我缓慢地改变比较器的输入电压，当它通过阈值电压时，我的比较器输出端似乎出现“震颤”。
为什么我从比较器的输出端得不到一个干净的转变波形? 答：比较器的高增益和宽频带通常是这个问题的根源。
噪声不但被放大而且也像信号一样通过转变区，所以噪声快速响应放大器输出，产生来回跳动。
另外，比较器在转变期间其灵敏度(即增益)比较高，由于反馈增加从而引起振荡。
如果有可能，对信号进行滤波以减小伴随的噪声。
为了克服噪声还可以利用滞后特性，类似齿轮系中的间隙，在输出状态翻转之前对输入变化要求有一定的余量。
例如，AD790，输出由高到低转变之后，其内部的滞后特性要求输入电压(正输入)增加500 μV才产生由低到高的转变。
问：如果我的比较器内部不带延迟电路，能否外加?
答：可以。
利用外部正反馈。
这样做使比较器输出端的一小部分送回到正输入端。
这种方法的简单接线如图3 1所示。
从低转变点(LTP)到高转变点(UTP)的延迟后电压取决于反馈电阻 RF，源阻抗RS，输出低电平VL和输出高电平VH。
其中低转变点和高转变点由下式决定：
VL×RSRS+RF 和VH×RSRS+RF
图3 1 比较器外接延迟电路
图3 2示出由于比较器外接延迟电路可以“清理”比较器的输出波形。
图3 2(a)示出的是没有延迟电路的双极性输出的比较器输出波形。
当三角波输入(波形A)通过转变点(地) 时，比较产生强烈振荡(并且把振荡的一部分耦合到地和信号源)。
图3 2(b)示出的是外接5 mV 延迟特性的同一比较器的响应波形，可以看出转变点比图3 2(a)干净得多。
图3 2 延迟电路有助于清理比较器输出波形
外部延迟电路存在的问题是输出电压取决于电源电压和负载。
这说明延迟电压可根据不同的应用而改变。
虽然这会影响分辨率，但这不是主要问题，因为延迟范围一般很小，而且允许有计算值2或3倍(或更多)的安全裕度(safety margin)。
更换几个比较器可有助于相信这种安全裕度。
还应注意，不要使用线绕电阻用于反馈，因为它产生的电感会带来麻烦。
问：传播延迟和传播延迟离差两者之间的差别如何?这两项技术指标哪一个更重要?
答：传播延迟是指从输入信号跨越转变点到比较器输出状态真正翻转所需要的时间。
传播延迟离差是传播延迟的变化作为过激励电平的函数。
如果在自动测试系统中的引脚驱动电路中使用比较器，那么传播延迟离差将决定其最大边缘分辨率(edge resolution)。
相反，可以把传播延迟看作固定的时间偏移，所以可用其它方法进行补偿。
问：我有一个+5 V电源并且不想外加电源。
我能否在单电源情况下使用比较器? 答：可以。
但是为建立一个阈值电压，使用一个在器件共模范围内旁路性能充分稳定的基准源。
该信号幅度也要相对这个基准源。
问：有时会遇到比较器出现意想不到的现象。
产生这个问题的原因是什么? 答：请检查一下输入信号的共模范围。
与运算放大器不同，它的两个输入端的工作电压通常具有相同的水平。
而比较器的两个输入端具有很大的差分电压摆动。
如果两端输入电压超过器件规定的共模范围(甚至在规定的信号范围以内)，比较器可能错误响应。
为了使比较器正常工作，一定要保证两端输入信号不超过比较器规定的共模范围。
例如，AD790差分输入信号范围为±VS，但其共模范围为-VS至(+VS-2)。
问：当比较器离线时，为了减小漂移，你能提供一个自动调零电路吗?
答：试验电路如图3 3和3 4所示。
在校准方式时，输入断开，比较器的正输入被切换到接地端。
比较器接入一个带有一对极性相反的低压源的环路，这两个低压源根据该比较器的输出状态交替地对一个缓冲电容器充电。
如果比较器的负输入端高于地电位，那么比较器的输出将为低，1 μF缓冲电容器将被接到负电压源(-365 mV)，从而使缓冲放大器输出电压将斜坡式下降直到低于比较器的正输入端(接地)电位为止，即正延迟和偏移，此时比较器翻转。
如果比较器的负输入端低于地电位，那么比较器的输出将为高，缓冲电容器将被接到正电压源(+365 mV)，缓冲放大器输出将斜坡式上升。
在最终状态，(当斜坡或变化超过延迟电压时)每次比较器翻转，电流的极性都改变，因此电容器电压平均为缓冲器和比较器的失调电压。
在校准周期结束时，结型场效应管(JFET)输入开关被断开，缓冲电容器充电电压等于比较器和缓冲器的失调电压±延迟电压。
同时，校准信号变低，禁止极性开关的反馈并且使比较器的输入信号接到比较器的输入端(2脚)。
图3 3 比较器输出、缓冲器输出和比较器输入
图3 4 在校准周期期间自动调零比较器总体输出偏移。