GT8619开发板使用指南V1.0
开发板初次使用指南
山东大学机器人电子强力驱动
打开 USB 驱动.EXE 可以看到如下画面，点击 INSTALL 即可安装（注意，此时请先不要连 接开发板与计算机）
打开检测程序，此时连接开发板与计算机，等待系统发现新硬件，让其自动安装驱动即可， 注意忽略数字认证警告。
如果安装成功既可看到 RoboElc 提示“成功打开 CH341 设备” 。注意一定要正确安装驱动， 否则无法下载程序。
绿色底板 板子跳线已经事先接插正确，当您将 USB 供电插上时，可以看到测试程序（流水灯、蜂鸣 器、数码管、DA 指示灯） 注意：8051 核心板上晶振跳线帽必须接插 以下为 AVR 核心板图片
待学习 AVR（开发板支持 ATMega16 等）时请将 8051 核心板拔下，插入 AVR 核心板，注 意方向朝上。 建议用户首先学习 8051，将内部资源等知识学习扎实再学习 AVR，我们不建议在基础知识 还没有打牢的情况下学习额外知识。 如果用户在学习好 8051 后，可以自己动手制作 STC12 系列增强型 51 核心板用于练习。
山东大学机器人电子强力驱动
螺丝螺母、跳线帽
双头 USB 线
串口延长线
10 根杜邦线
山东大学机器人电子强力驱动
底板视图（绿色）
底板视图（黑色）
软件方面：
（详见光盘） 说明： 1、首先安装 USB 驱动.EXE（USB 驱动程序） 2、然后连接 PC 与开发板，按照 USB 驱动提示操作即可 3、打开 RoboElcX 监控软件，使用该软件进行程序烧写 4、程序所有权归 WCH 公司所有 操作：
山东大学机器人电子强力驱动
RoboElc 51_AVR V1.1 开发板
初次使用指南
尊敬得用户您好！
功能详解图
NVIDIA IGX Orin 开发者主机 用户指南说明书
NVIDIA IGX Orin 开发者主机用户指南文档历史记录DU-11439-003_v1.0目录Chapter 1.简介 (1)Chapter 2.配置 (2)2.1GPU 模式 (2)2.2环境 (2)Chapter 3.系统概述 (3)3.1主要组件 (3)3.2技术规格 (4)3.3I/ O 和外部接口 (5)3.4其他可选显卡的物理安装 (7)Chapter 4.为系统供电 (10)Chapter 5.软件安装 (11)5.1默认设置 (11)5.2交互式安装 Holopack (11)5.2.1检查当前安装的 GPU 堆栈 (14)5.2.2在 iGPU 和 dGPU 堆栈之间切换 (14)5.3重新刷写开发者套件 (15)5.3.1重新刷写选项 1 –使用 NVIDIA SDK Manager (15)5.3.2重新刷写选项 2 - 手动 (21)Chapter 6.安装后配置 (22)6.1设置 SSD 存储 (22)6.1.1创建分区 (22)6.1.2安装分区 (23)6.2在 SSD 上设置 Docker 存储 (24)Chapter 7.使用 BMC (25)7.1访问 BMC (25)7.2通过 BMC 将系统置于恢复模式 (26)Chapter 8.交换机 ConnectX - 7 网络链路类型 (27)Chapter 9.安装 Holoscan SDK (28)Chapter 10.故障排除 (29)Chapter 11.获取帮助 (30)图表列表图3-1。
开发者套件组件 (4)图3-2。
开发者套件前视图 (5)图3-3。
开发者套件背面板 (6)图3-4. 取消封面–第 1 步 (8)图3-5. 取消封面–第 2 步 (9)图5-1. 提示安装 dGPU (12)图5-2. 提示安装 iGPU (13)图5-3. dGPU 堆栈安装截图 (13)图5-4. SDK 管理器目标硬件 (17)图5-5. SDK 管理器硬件配置 (17)图5-6。
浙江联芯物联网科技有限公司NB861型模块硬件应用手册说明书
NB-IoT模块硬件应用手册NB861型版本：Rev1.0日期：2021-08-02法律声明若接收浙江联芯物联网科技有限公司（以下称为“联芯科技”）的此份文档，即表示您已经同意以下条款。
若不同意以下条款，请停止使用本文档。
本文档版权所有浙江联芯物联网科技有限公司，保留任何未在本文档中明示授予的权利。
文档中涉及联芯科技的专有信息。
未经联芯科技事先书面许可，任何单位和个人不得复制、传递、分发、使用和泄漏该文档以及该文档包含的任何图片、表格、数据及其他信息。
本产品符合有关环境保护和人身安全方面的设计要求，产品的存放、使用和弃置应遵照产品手册、相关合同或者相关法律、法规的要求进行。
本公司保留在不预先通知的情况下，对此手册中描述的产品进行修改和改进的权利；同时保留随时修订或收回本手册的权利。
文件修订历史版本修订日期修订日志1.02021-08-02 第一次发布版本适用模块选型序号型号特征符尺寸（mm）工作电压频段eSIM外设状态1NB861 20×16×2.2 2.4-4.2V 多频段- - 小批目录法律声明 (2)文件修订历史 (3)适用模块选型 (4)目录 (5)表格索引 (8)图形索引 (9)1引言 (10)1.1安全须知 (10)2模块综述 (11)2.1模块主要特性 (11)2.2电气特性 (12)2.2.1绝对最大值 (12)2.2.2工作温度 (12)2.2.3耗流 (13)2.3功能框图 (13)2.4评估套件 (14)3应用接口 (15)3.1引脚描述 (15)3.2工作模式 (19)3.3电源设计 (20)3.3.1典型供电电路 (20)3.4模块开机/关机 (21)3.4.1开机 (21)3.4.2关机 (21)3.5省电技术 (22)3.6模块复位 (23)3.7UART通信 (24)3.7.1串口参考设计 (25)3.7.2串口应用 (25)3.8USIM卡接口 (27)3.8.1USIM卡参考设计 (28)3.8.2设计注意事项 (28)3.9其他接口（ADC） (29)3.10网络指示状态* (29)4天线接口 (30)4.1射频参考电路 (30)4.2射频LAYOUT设计指导 (31)4.3天线选型参考 (33)4.4RF输出功率 (34)4.5RF上行最大耦合路损 (34)5机械尺寸 (35)5.1模块机械尺寸 (35)5.2模块俯视图/底视图 (36)5.3推荐PCB设计 (36)6生产及包装信息 (38)6.1过炉方式 (38)6.2回流焊作业指导 (38)6.3不良品维修 (38)6.4储存及包装方式 (40)6.4.1储存要求 (40)6.4.2包装方式 (40)7相关文档及术语缩写 (42)7.1术语缩写 (42)表格索引表 2-1 NB861型模块部分Band说明 (11)表 2-2 绝对最大值 (12)表 2-3 工作温度范围 (12)表 2-4 模块耗流 (13)表 3-2 正常工作模式 (20)表 3-3 电源引脚定义 (20)表 3-4 复位引脚描述 (23)表 3-5 串口引脚定义 (24)表 3-6 串口逻辑电平 (24)表 3-7 外部USIM卡接口引脚定义 (27)表 3-8 ADC接口引脚定义 (29)表 4-1 RF天线引脚定义 (30)表 4-2 RF传导功率 (34)表 4-3 RF上行最大耦合路损 (34)表 7-2 术语缩写 (42)图形索引图 2-1模块功能框图 (13)图 3-1模块引脚分配图(适用NB861系列) (15)图 3-2 VBAT输入参考电路 (21)图 3-3 开机时序图 (21)图 3-4 关机时序 (22)图 3-5 功耗参考示意图 (22)图 3-11 特定电平下的电平转换参考电路 (26)图 3-12 二极管封装图 (27)图 3-13 6PIN外部SIM卡参考电路 (28)图 4-1 射频天线参考电路 (30)图 4-2两层PCB板共面波导结构 (31)图 4-3 四层PCB板共面波导结构（参考地为第三层） (31)图 4-4 四层PCB板共面波导结构（参考地为第四层） (31)图 4-5 50欧姆阻抗的计算方法参考 (32)图 4-6射频走线LAYOUT设计示意图 (32)图 4-7 NB-IoT常规天线类型推荐 (33)图 5-1 66PIN模块机械尺寸图 (35)图 5-2 66PIN模块俯视/底视图 (36)图 5-3 模块推荐焊盘 (37)图 6-1 无铅回流焊作业指导 (39)图 6-2 模块方向指示图 (40)图 6-3模块放置方向载带机械图 (41)1 引言特性、应用方法及其和机械规范等内容。
FIBOCOM软件升级说明
软件升级说明文档版本: VR1.0.8 更新日期: 2013-10-25版权声明版权所有©深圳市广和通实业发展有限公司2013。
保留一切权利。
非经本公司书面许可，任何单位和个人不得擅自摘抄、复制本文档内容的部分或全部，并不得以任何形式传播。
注意由于产品版本升级或其他原因，本文档内容会不定期进行更新。
除非另有约定，本文档仅作为使用指导，本文档中的所有陈述、信息和建议不构成任何明示或暗示的担保。
商标申明为深圳市广和通实业发展有限公司的注册商标，由所有人拥有。
目录1前言 (5)2详细流程说明 (6)2.1升级所需软硬件工具说明 (6)2.1.1软件工具说明 (6)2.1.2硬件工具说明 (6)2.2升级方法及说明 (6)2.2.1搭建环境 (6)2.2.2升级模块程序步骤 (8)2.2.3升级用户程序步骤 (10)1 前言本文档主要说明FIBCOM品牌的G5/G6系列模块的软件升级的方法和说明，主要针对FAE和客户使用。
2 详细流程说明2.1 升级所需软硬件工具说明2.1.1 软件工具说明2.1.2 硬件工具说明2.2 升级方法及说明2.2.1 搭建环境情形1：模块不在转接板上，使用GT8619开发板如果模块不在转接板上：将模块的Uart1_TXD和Uart1_RXD连接到USB转串口（TTL电平）的TXD 和RXD相连。
图2-1情形2：模块不在转接板上，使用GT8629开发板如果模块不在转接板上：将模块的Uart1_TXD和Uart1_RXD连接到USB转串口（TTL电平）的TXD 和RXD相连。
图2-2情形3：模块在转接板上，使用GT8619开发板如果模块在转接板GT8660上：将模块+GT8660安装在GT8619上，使用USB线，连接GT8619到PC。
连接方法见下图：图 2-3情形4：模块在转接板上，使用GT8629开发板如果模块在转接板GT8660上：将模块+GT8660安装在GT8629上，使用USB线连接GT8629到PC。
AVP50G 开发板用户手册说明书
Logos FPGA开发平台用户手册AVP50G开发板2 / 51芯驿电子科技（上海）有限公司文档版本控制目录文档版本控制 (2)一、开发板简介 (6)二、FPGA核心板 (11)(一)简介 (11)(二)FPGA (12)(三)有源晶振 (13)(四)DDR3 (15)(五)QSPI Flash (17)(六)LED灯 (18)(七)扩展接口 (20)(八)电源 (24)(九)结构图 (27)三、扩展板 (28)(一)简介 (28)(二)VGA显示接口 (29)(三)HDMI输出接口 (30)(四)HDMI输入接口 (33)(五)视频输入接口 (35)(六)千兆以太网接口 (37)(七)ARM控制器 (39)1)实时时钟 (40)2)EEPROM (41)3)LED (42)4)USB串口 (43)5)SD卡 (44)(八)摄像头接口 (45)(九)扩展口 (46)(十)JTAG接口 (48)(十一)按键 (49)3 / 514 / 51芯驿电子科技（上海）有限公司(十二) 供电电源 (50)5 / 51专业级紫光同创 FPGA 视频图像处理开发平台（型号：AVP50G ）正式发布了，为了让您对此开发平台可以快速了解，我们编写了此用户手册。
这款FPGA 视频图像处理开发平台具备HDMI 输入，DVI 输出，千兆以太网，CMOS Camera 接口和Micro SD 卡座等外设。
这极大的丰富了视频图像处理板的功能，不仅满足FPGA 视频图像处理的功能，还为视频图像存储，视频图像的网络通信提供了可能。
因此，这款开发平台可以堪称“专业级”和"全能级“。
这样的一款产品非常适合即将从事或者正在从事FPGA 视频图像处理或者视频图像通信及存储的学生、工程师等群体。
6 / 51芯驿电子科技（上海）有限公司一、 开发板简介在这里，对这款紫光同创 FPGA 开发平台进行简单的功能介绍。
开发板的整个结构，继承了我们一贯的核心板+扩展板的模式来设计的。
大彩串口屏物联型86盒4.0寸产品手册V1.0(2019新版)
DC48480W040_20X1_4C,86盒,X数据手册V1.0ISO9001:2015质量体系认证版本记录版本日期修改原因页面撰写人审核人V1.02019/06/13创建文档all林绍佳刘启鑫目录1.硬件介绍 (1)1.1产品外观 (1)1.2硬件配置 (1)1.3调试工具 (2)2.产品规格 (4)3.可靠性测试 (6)4.产品尺寸 (7)5.产品定义 (8)6.包装与物理尺寸 (9)7.产品架构 (10)8.开发软件 (11)8.1什么是虚拟串口屏 (11)8.2Keil与虚拟串口屏绑定调试 (12)9.开发文档 (13)10.免责声明 (14)1.硬件介绍本章节主要介绍产品的一些外观参考图、硬件配置图和调试所需工具。
1.1产品外观以下为该尺寸不同型号的外观参考图，如图1-1和图1-2所示。
注：未涉及到结构工艺修改或布局大改动，硬件可靠性方面的变更迭代，公司不予对外发起变更，具体以收到的实物为准。
图1-1 4.0寸电容触摸白色外观参考图图1-2 4.0寸电容触摸金色外观参考图1.2硬件配置以下为该产品硬件配置参考图，如图1-3和图1-4所示。
图1-3硬件配置图图1-4WIFI配置图1.3调试工具以下为该产品调试工具参考图，如图1-5所示。
图1-5调试工具图2.产品规格◆产品参数产品型号DC48480W040_20W1_4C,86盒,白色（RS485,带WiFi,电容触摸,白色）DC48480W040_20W1_4C,86盒,金色（RS485,带WiFi,电容触摸,金色）DC48480W040_2001_4C,86盒,白色（RS485,无WiFi,电容触摸,白色）DC48480W040_2001_4C,86盒,金色（RS485,无WiFi,电容触摸,金色）产品系列物联型核心处理器*400MHz32位双核处理器操作系统嵌入式实时操作系统（FreeRTOS）协议类型默认大彩组态指令集，上位机可配置运行MODBUS RTU、XGUS协议尺寸 4.0寸分辨率480*480安装方向支持0、90、180和270度旋转安装显示存储空间128Mbit字库内置矢量字体，边缘抗锯齿处理，包含任何大小点阵ASCII、GBK、GB2312、UNICODE 字库，可自定义任意电脑字体显示图片存储支持JPEG、PNG（半透/全透）压缩，支持任意大小图片存储，支持图片旋转、放大、缩小等功能。
串口屏MINIC教程3-各种运算使用说明V1.0
MINIC 教程-运算使用说明 V1.0
1. 适合范围
文档适合广州大彩基本型、经济型、商业型、F 型、物联型、86 盒、485 系列等所有 MODBUS 协议的串口屏产品。
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MINIC 教程-运算使用说明 V1.0
2. 开发环境版本
1. VisualTFT 软件版本：V3.0.0.827 及以上的版本，版本查看方式： (1) 打开 VisualTFT 软件启动页面如图 2- 1 所示，右上角显示的软件版本号；
图 2- 1 软件版本
(2) 打开 VisualTFT，在软件右下角可以查看软件版本图 2- 2 所示，最新版本可登录 大彩官网下载。
图 2- 2 软件版本
2. 串口屏固件版本： 基本型（经济型、商业型）： MB 2.22.912.259 及以上的版本支持； 物联型：V3.0.301.0 及以上的版本支持； F 型：V4.1.66.0 及以上的版本支持。
5. 完整程序清单.................................................................................................17 6. 免责声明.........................................................................................................19
5. 函数：on_variant_upate() 功能：通过串口读写寄存器导致变量更新时，执行此函数。使用“@”操作符判定 某个寄存器是否发送改变，例如 if(@“温度”)。
6. 函数：on_screen_change (int screen_id) 功能：画面切换通知，当前画面 ID 发生变化时执行此函数 参数：screen_id，当前画面 ID
JTouch Plus INF8630AG 86英寸Android平台互动白板产品说明书
INF8630AGCustomizable, open Android platform, 86-inch displayPart #: INF8630AGWith 4K resolution, Total Touch Control™, and the ability to natively run Android apps, the JTouch Plus INF8630AG is a fully customizable, all-in-one collaboration and presentation solution.Currently available only in US & CanadaKey FeaturesNavigate a friendly, easy-for-anyone interface with TotalTouch Control- no need for a remoteBuilt-in whiteboard, browser, media player, and AirPlaycapabilityAnnotate over any application or video inputComment and draw over websites, documents, and moreBrilliant 86-inch, 4K resolution screen with anti-glareAdd any Android appCustomize your whiteboard backgroundOpen Android PlatformExpand and customize your platform with any Android application or game. Simply download and install as you would on your phone.Four Critical ApplicationsAll JTouch Plus models include the four critical applications needed for interactive touch panels. These include Casting, Whiteboarding, Browsing, and File Viewing. Create on a full-featured digital whiteboard, present videos and photos, browse the web, easily connect and share content from your Apple, Windows, or Android devices with wireless casting.Intuitive TouchErase, zoom, and pull up menu options quickly and easily with incredibly intuitive touch gestures on the JTouch Plus. Use one �nger to draw, two �ngers to move, and three �ngers to erase on the whiteboard or when annotating on any screen. A simple swipe gesture on either side of the screen reveals a full menu of further options. Interactive whiteboardDraw, write, and capture notes on a fully customizable, built-in digital whiteboard. Choose any background on a multi-screen canvas with room for free-form drawings, diagrams, and more. Draw using your �nger or one of the provided styli using a complete collection of digital pens, highlighters, shapes, lines, and colors.Multi-input Touch MonitorPlug up to eight devices into your INF8630AG monitor. HDMI-based sources can also connect via �ve separate USB-B ports to access the panel’s touch control. Front access IO ports make it convenient to connect, view, and touch control any user’s PC temporarily with both HDMI and Touch USB.Optional PCTurn your INF8630AG into a fully integrated, powerful all-in-one Windows 10 PC with touch by adding the optional Core i5 OPS PC Module (coming soon).Speci�cations*Display INF8630AGDiagonal Size86"Resolution — Native4K UHD (3840 x 2160) Display Technology Direct-LED backlight Touch Screen Features Multi-touch, Anti-glare Glass Strength4mm thick, heat treated Scratch Resistance7 MohsContrast Ratio1,200:1Display Brightness450 cd/m2Refresh Rate120 HzResponse Time8.0 msPixel Pitch0.429 mmViewing Angle176°Speakers Stereo 10W x 2Display Connectors — Inputs RS232, Component video, Composite video, HDMI x 5, RJ-45 (Ethernet), VGA, USB 3.0 x2, Media USB (Android), PC Audio In (stereo, VGA Audio source), 1/8" Microphone (Mono linked to OPS), USB 2.0 x2, OPS PC USB x2, RCA L/R audioDisplay Connectors — Outputs RS232, 3.5mm PC audio, USB-B x4 for touchscreen control, SPDIF, 3.5mm Headphone, RCA L/R audio Power Standard AC 100 to 240V, 50/60PCPC Hardware OPS BaySystemIncluded Accessories Power cord, Remote, Stylus, HDMI Cable, USB cable, Quick Start Guide, USB WiFi AdapterWireless Collaboration Casting embeddedAudible Noise< 40 dBA at 77°F / 25°COperating Conditions 32 to 104°F at 0 to 10000 ft / 0 to 40°C at 0 to 3048 mMounting Pattern VESA 400x700 with M8 screws Product Warranty 2 yearsProduct Dimensions 47.3 x 78.3 x 4.6 in / 1201.4 x 1988.8 x 116.8 mmProduct Weight184.5 lbs / 83.7 kgShipping Dimensions 58.7 x 86.6 x 14.2 in / 1491 x 2199.6 x 360.7 mmShipping Weight242.5 lbs / 110 kg* Product speci�cations, terms, and o�erings are subject to change at any time without notice.AccessoriesDeluxe Mobile Cart for up to 100-inch Display (INA-MCARTDX)1 Year Extended Warranty for 86-inch JTouch (EPW-86JT1)Extra Large Wall Mount for up to 86-inch Display (INF-WALLMNT3)Mini USB WiFi Adapter (INA-WIFIUSB-3)Remote Control for Mondopad, BigTouch or JTouch (INA-REMOTE2)Extra Large Mobile Cart for up to 86-inch Display (INF-MCART-PL)Mobile Cart for Vertical Lift Mount (Large) (INA-CARTBBXL)Vertical Lift Display Wall Mount (Large) (INA-MNTBB138)VESA Interface Bracket for Vertical Lift Mounts (Large) (INA-VESABBXL)Floor Support for Lift Wall Mount (INA-SUPPORTBB)BigNote Whiteboarding Software (INS-BNOTE1)BigNote, 10 Seat (INS-BNOTE10)Virtual Training Services, 1 Hour (INS-VTRAINING1)Virtual Training Services, 2 Hours (INS-VTRAINING2)2 Year Extended Warranty for 86-inch JTouch (EPW-86JT2)3 Year Extended Warranty for 86-inch JTouch (EPW-86JT3)©2018 InFocus Corporation. All rights reserved. InFocus-INF8630AG-Datasheet-EN_。
开发板使用入门1--CC DEBUGGER的使用
GEC GEC_CC2530_CC2530ZIGBEE 开发板套件GEC_GEC_CCCC Debugger 的安装与使用用户在使用开发板之前，需自行安装好”TI工具软件安装文件”文件夹下的“EW8051_v76”；“Setup_Packet_Sniffer_2.13.2”；“Setup_SmartRF_Studio_7-1.3.1”；“Setup_SmartRFProgr_1.9.0”。
EW8051_v76安装可参考IAR安装和使用手册,如同其他WINDOWS软件的安装步骤一样，此处不再赘述。
CC DEBUGGER的安装与连接GEC_CC第一节GEC_CC Debugger介绍1.1GEC_GEC_CCGEC_CC Debugger与TI公司CC Debugger完全兼容，支持TI公司除CC1010和CC430之外的所有RF SOC系列的仿真调试和程序下载。
PC端调试开发平台支持TI公司SmartRF Flash Programmer、SmartRF Studio和IAR公司的集成开发环境IAR EmbeddedWorkbench For C8051。
1.2CC Debugger连接前的准备在连接GEC_CC Debugger之前，请先确认如下事项：◆目标板提供的电压范围应为1.2V～3.6V（目标板DEBUG插座第二脚）。
◆工作温度应为0℃～85℃。
◆如果目标板需要CC Debugger供电，则电流需求应小于200mA.◆PC端操作系统为：Windows2000Windows XP SP2/SP3Windows Vista(32Bit)Windows7(32Bit)1.3CC Debugger驱动的安装如上图所示，将GEC_CC Debugger与PC通过USB线缆连接起来。
初次使用CC Debugger时需要安装USB驱动，请确保您的PC上已安装过下列软件之一：IAR Embedded Workbench8051；SmartRF Studio；SmartRF Flash Programmer。
Juniper设备常用维护命令手册v1.0
中国科技网
Juniper 设备常用维护命令手册 V1.0（Release）
Maintained By Louis Yang
Juniper Networks
目录
目录
前言 文档目的 使用人员 内容范围 假设与告诫 相关文献
设备运行状态维护命令 show chassis alarms show chassis environment show chassis environment pem show chassis environment sib show chassis environment fpc show chassis sibs show chassis fabric topology show version show chassis hardware detail show chassis fpc show chassis fpc detail show chassis fpc pic-status show chassis pic fpc-slot <fpc> pic-slot <pic> show chassis rouging-engine show chassis feb （只适用于 M120） show chassis feb detail （只适用于 M120） show chassis fpc-feb-connectivity （只适用于 M120） show ntp status
Corporate Headquarters
Juniper Networks ,Inc. 1194 North Mathilda Avenue Sunnyvale, California 94089-1206 USA Phone: 888-JUNIPER (888-586-4737) 1-408-745-2000 Fax: 1-408-745-2100
开发板使用入门教程V1.0
果云ESP8266开发板使用入门教程版本号：V1.1 By：冰点第一章：SDK开发者入门第一步：安装Windows下的开发环境1.1在百度云盘下载对应的CYGWIN压缩包，我们把环境都打包好了，直接解压到任意盘。
PS：32位系统就选32位的，64系统选64位的。
1.2解压后看到Cygwin.bat这个文件，右键编辑，把路径改为你当前解压的磁盘，我的是放在E盘，你解压在C盘就改成C。
第二步：MAKE编译2.1打开Cygwin.Bat2.2进入goouuuSDK/app文件夹2.3make回车，开始编译！2.4编译完成，在firmvare文件夹生成两个bin文件。
第三步：安装CH340USB转串口驱动将开发板USB线和电脑连接USB口，正确安装好CH340驱动第四步：将编译生成的两个bin文件烧录到开发板上4.1我们从8266新手进阶文档可知道，要进入程序烧录模式，上电之前，GPIO15和GPIO0要拉低，GPIO2拉高，也就是模式3。
从我们的底板原理图可以看到，GPIO15接的是K1，GPIO0接的是K2，那我们上电之前把K1拨到ON（接地），K2拨到ON（接地），然后按下自锁开关启动电源。
4.2打开下载好的XTCOM软件，用它来烧录bin文件4.3打开tools，Config Devicd，选择你所在的串口，波特率115200，然后点击open 之后，点击content，提示连接成功。
4.4点击FLASH DOWNLOAD.将0x00000bin文件调进来，地址偏移是0，然后点击下载，将第一个烧进FALSH中，提示成功。
4.5关闭XTCOM软件，关闭重启开发板的电源，再次打开XTCOM，重复4.3和4.4的步骤，将0x40000bin文件调进来烧录，地址偏移填0x40000,点击下载，烧录完成提示成功！4.6程序就算烧录完成了，把K1拨到ON，K2拨到OFF，重新启动电源，程序就会成FLASH中启动了。
NVIDIA Jetson AGX Orin 开发板使用指南说明书
Steps for Flashing Jetson OrinContentsPurpose (3)Tools & Supplies (3)Flashing the Jetson (5)Confirming Jetpack is Successfully Installed on the Jetson (15)Downloading & Installing Cross Compilation Tools (15)Setting Up Environment Variables (15)Downloading Kernel on the Host (16)Modifying and Building Kernel on the Host (17)Flashing Newly Modified Kernel on to the Jetson (19)Complications Faced (20)Table of FiguresFigure 1 - Jetson AGX Orin Dev Kit (3)Figure 2 - Jetson Power Supply (3)Figure 3 - USB Type A to Type C Cable (4)Figure 4 - USB Type A to Micro USB Type-B Cable (4)Figure 5 - Display Port Cable (4)Figure 6 - Connecting Micro USB Type-B Cable to Jetson Micro USB Type-B Port (5)Figure 7 - Connecting USB Type-C to Jetson for Flashing (5)Figure 8 - Recovery & Restart Buttons (6)Figure 9 - SDKManager Icon (6)Figure 10 - SDK Manager (Step 1 Screen) (7)Figure 11 - CONTINUE TO STEP 02 (8)Figure 12 - STEP 02 Configurations Selected (9)Figure 13 - Accepting Terms & Conditions (9)Figure 14 - CONTINUE TO STEP 03 (10)Figure 15 - Create Folders (10)Figure 16 - Enter Password (11)Figure 17 - Verifying System Readiness to Install (11)Figure 18 - Jetson Configurations (prior to making modifications) (12)Figure 19 - Jetson Configurations (after making modifications) (13)Figure 20 - Flash the Jetson (14)Figure 21 - Accepting to Continue Installing Package (14)Figure 22 - STEP 04 SUMMARY FINALIZATION (14)Figure 23 - Finish Installation (15)Figure 24 - Recovery & Restart Buttons (19)PurposeThe purpose of this document is to outline the steps performed for flashing the Jetson Orin as well as modifying and loading a new kernel on the Jetson.Tools & SuppliesThis section lists the hardware and software tools used.•Host Desktop:o Operating System: Ubuntu•Jetson AGX Orin Developer Kit (figure obtained from online) [Figure 1]Figure 1 - Jetson AGX Orin Dev Kit•Jetson Power Supply [Figure 2]o Also need a power adaptor cable to plug into an outlet but that is not pictured in the image belowFigure 2 - Jetson Power Supply•USB Type-A 2.0 to USB Type-C cable (figure obtained from online) [Figure 3]Figure 3 - USB Type A to Type C Cable•USB Type-A 2.0 to Micro USB Type-B cable (figure obtained from online) [Figure 4]Figure 4 - USB Type A to Micro USB Type-B Cable•Display Port Cable (for the Jetson) (figure obtained from online) [Figure 5]Figure 5 - Display Port Cable•Two USB Mouse & Keyboard (one for the Jetson & one for the Host desktop) •Display Cable (for the Host desktop)•Two RJ45 cableo One to connect Host desktop to the networko Second to connect Jetson to the Host desktopFlashing the JetsonThis section outlines the steps performed to flash the Jetson.1.Connected the Micro USB Type-B end of the cable to the Micro USB port on the Jetson [Figure 6]Figure 6 - Connecting Micro USB Type-B Cable to Jetson Micro USB Type-B Port2.Connected the other end of the Micro USB cable (USB Type-A 2.0) to the Host desktop’s USBport3.Connected the USB Type-C cable to the Jetson’s USB Type-C port (designated for flashing)[Figure 7]Figure 7 - Connecting USB Type-C to Jetson for Flashing4.Connected the other end of the USB Type-C cable to the Host desktop’s USB port5.Connected an RJ45 cable to the Jetson and connected the other end to the Host desktop6.Connected the Jetson to its power supply and connected the power supply to a plug outlet7.The next set of steps (steps 8 to 34) were performed on the Host desktop8.Note: Since previously these steps have been performed, the following steps were done first:a.Removed the ~/nvidia folder by entering the command below in the terminalb.Removed the ~/Downloads/nvidia folder by entering the command below in theterminalc.Removed the NVIDIA SDKManager’s databas e file by entering the command below inthe terminal9.Put the Jetson in recovery mode by pushing the “recovery” button then pushing the “restart”button and releasing both at the same time [Figure 8]Figure 8 - Recovery & Restart Buttons10.Entered the command below on the terminal on the Host desktop to confirm the Jetson is inrecovery mode, which it was:a.NOTE: “NVIDIA” device is found, so the Jetson is in recovery mode11.Opened the SDKManager application by finding the application and clicking on it [Figure 9]Figure 9 - SDKManager Icon12.When opened, a login prompt was seen13.Logged in with my username (email) and password14.Then the following window was seen, and selected the following configurations [Figure 10]a.Product Category : Selected Jetsonb.Hardware Configuration : Disabled itc.Target Hardware : Enabled and selected JetsonAGX Orind.Target Operating System : Linux JetPack 5.0.2 (rev. 1)e.Additional SDKS: Disabled DeepStream 6.1.1Figure 10 - SDK Manager (Step 1 Screen)15.Next clicked “CONTINUE TO STEP 02” (circled in the image below) [Figure 11]Figure 11 - CONTINUE TO STEP 0216.In “STEP 02 DETAILS AND LICENSE” page, the “Jetson SDK Components” was disabled while the“Jetson Linux” was enabled as shown below [Figure 12]Figure 12 - STEP 02 Configurations Selected17.Then selected “I accept the terms and conditions of the license agreements” checkbox on thebottom of the screen (circled in the image below) [Figure 13]Figure 13 - Accepting Terms & Conditions18.Then clicked on the “CONTINUE TO STEP 03” button (circled in the image below) [Figure 14]Figure 14 - CONTINUE TO STEP 0319.The following pop up seen, selected “Create” (circled in the image below) [Figure 15]Figure 15 - Create Folders20.Then another popup was displayed requesting for administrative password, entered thepassword then clicked “OK” (circled in the image below) [Figure 16]f.NOTE: The “OK” button turns to light green after entering password in the textboxFigure 16 - Enter Password21.Then a popup is displayed that wrote “SDK Manager is verifying system readiness to install”[Figure 17]Figure 17 - Verifying System Readiness to Install22.After a few minutes, the popup disappeared and progress bars were displayed on theSDKManager’s window on the bottom of the page where the folder paths were23.Waited for a few minutes (could take about 20-30 depending on host configurations)24.After a few minutes, the following window was seen stating the SDK Manager is ready to flashthe Jetson AGX Orin module [Figure 18]Figure 18 - Jetson Configurations (prior to making modifications)25.For the setup mode, selected “Manual Setup –Jetson AGX Orin”26.For the “OEM Configuration”, selected “Pre-Config”27.Entered username and password28.For the “Storage Device”, selected “EMMC (default)”29.Below is an image of the settings selected listed in steps 25 to 28 [Figure 19]Figure 19 - Jetson Configurations (after making modifications)30.Once confirmed proper configurations are selected, clicked on “Flash” (circled in the imagebelow) [Figure 20]Figure 20 - Flash the Jetson31.NOTE: If a popup is seen stating installation is taking longer than expected, select “Yes” (circledin the image below) [Figure 21]Figure 21 - Accepting to Continue Installing Package32.After a while, the “STEP04 SUMMARY FINALIZATION” is reached and it stated the installationcompleted successfully [Figure 22]Figure 22 - STEP 04 SUMMARY FINALIZATION33.Then selected “FINISH AND EXIT” (circled in the image below) [Figure 23]Figure 23 - Finish InstallationConfirming Jetpack is Successfully Installed on the JetsonOn the Jetson, it was confirmed the Jetpack was installed and were able to successfully boot it up and log in to it.Downloading & Installing Cross Compilation ToolsFollowed the instructions in the link below to download, install, and set up the cross compilation tools on the Host desktop:https:///jetson/archives/r34.1/DeveloperGuide/text/AT/JetsonLinuxToolchain.html Setting Up Environment VariablesThe following steps were performed on the Host desktop to set up the environment variables to be used in the proceeding sections:1.Entered the commands below on the terminal to set up environment variables:Downloading Kernel on the HostThe following steps were performed on the Host desktop to download the kernel:1.Entered the command below on the terminal to change directory to the JetPack folder:~/nvidia/nvidia_sdk/JetPack_5.0.2_Linux_Jetson_AGX_ORIN_TARGETS/Linux_for_Tegra/2.Entered the command below on the terminal to create a folder named “sources” and tochange directories to it:~/nvidia/nvidia_sdk/JetPack_5.0.2_Linux_Jetson_AGX_ORIN_TARGETS/Linux_for_Tegra/sources/3.Entered the command below on the terminal to download the sources from NVIDIA:4. Entered the command below on the terminal to extract the contents from thepublic_sources.tbz2 file:5.Entered the command below on the terminal to extract the contents from thekernel_src.tbz2 file:Modifying and Building Kernel on the HostThe following steps were performed on the Host desktop to modify and build the kernel:1.Entered the command below on the terminal to create the ${KERNEL_MODULES_OUT}folder:2.Entered the command below on the terminal to change directory to the kernel folder:~/nvidia/nvidia_sdk/JetPack_5.0.2_Linux_Jetson_AGX_ORIN_TARGETS/Linux_for_Tegra/sources/kernel/ke rnel-5.03.NOTE: Some websites like the one belowhttps:///wiki/index.php/NVIDIA_Jetson_Orin/JetPack_5.0.2/Compiling_ Code/Kernelspecify to make some changes to fix some errors in the kernel. However, that was not needed for this kernel that was downloaded4. Next, the tegra_defconfig file is modified to include “CONFIG_SENSOR_LTC2990=y”in it by entering the command below to open the filea.NOTES:i.Any text editor of choice could be used here, “vi” was used in this caseii.Instructions on how to use “vi” to modify a file and save/close it is beyond the scope of this document5.Entered the command below on the terminal to create the .config file:a.NOTE: The log file could be found in the Jetson_Logs_20221026.zip file (log file name issetup_dflt_cnfg.log)6.Entered the command below on the terminal to create the BSP:bsp.log)7.Entered the command below on the terminal to install the modules:a.NOTE: The log file could be found in the Jetson_Logs_20221026.zip file (log file name ismodules_install.log)8.Entered the commands below on the terminal to create backups of existing files:9.Entered command below on the terminal to change directory to the ${KERNEL_OUT}folder:~/nvidia/nvidia_sdk/JetPack_5.0.2_Linux_Jetson_AGX_ORIN_TARGETS/Linux_for_Tegra/images/10.Entered the commands below on the terminal to copy newly created files to the designatedlocations:11.Entered the command below on the terminal to change directory to the${KERNEL_MODULES_OUT} folder:~/nvidia/nvidia_sdk/JetPack_5.0.2_Linux_Jetson_AGX_ORIN_TARGETS/Linux_for_Tegra/images/modules12.Entered the command below to compress the kernel modules folder:13.Entered the command below to apply the binaries:a.NOTE: The log file could be found in the Jetson_Logs_20221026.zip file (log file name isapply_binaries.log)Flashing Newly Modified Kernel on to the JetsonThe following steps were performed on the Host desktop to flash the newly modified kernel on the Jetson:1.Entered the command below to change directory to the location where the flash.sh script islocated:a.Current folder right now is:~/nvidia/nvidia_sdk/JetPack_5.0.2_Linux_Jetson_AGX_ORIN_TARGETS/2.Entered the command below on the terminal to check if the Jetson is in a recovery mode or not,and confirmed it wasn’t:a.NOTE: No “NVIDIA” device is found, so the Jetson is not in reco very mode3.Pushed the “recovery” button, then pushed the “restart” button and released both at the sametime to place the Jetson in recovery modeFigure 24 - Recovery & Restart Buttons4.Entered the command below on the terminal to confirm the Jetson is in recovery mode which itwas:a.NOTE: “NVIDIA” device is found, so the Jetson is in recovery mode5.Entered the command below on the terminal to flash the kernel on the Jetson:a.Complications FacedOnce the kernel completed loading, the following steps were performed:1.On the Host desktop, opened a terminal window and opened minicom by entering thecommand below:2.When in minicom, hit the enter key on the keyboard a few times which then displayed Linuxinstallation setup prompts3.Went through the setup prompts (selecting time zone, language, etc.)4.Once completed, it attempted to boot up but stopped at the following lines in the boot upmessages (seen from the serial console on minicom):a.NOTE: The log file could be found in the Jetson_Logs_20221026.zip file (log file name isBoot_Up.log)i.NOTE: Noticed a kernel panic occur in this log5.Power cycled the unit, it attempted to boot up and still stopped at the following lines:a.NOTE: NVIDIA Splash screen was displayed on the monitor, but after that, the monitorwent blank6.Attempted Step 5 with the following modifications, but still witnessed same issue:a.Connected the Jetson to the networkb.Disconnected RJ45 cable from the Jetsoni.NOTE: The log file when no RJ45 cable is connected could be found in theJetson_Logs_20221026.zip file (log file name is Second_Attempt_Boot_Up.log)21。
大彩串口屏物联型86盒4.0寸产品手册V1.0(2019新版)
DC48480W040_20X1_4C,86盒,X数据手册V1.0ISO9001:2015质量体系认证版本记录版本日期修改原因页面撰写人审核人V1.02019/06/13创建文档all林绍佳刘启鑫目录1.硬件介绍 (1)1.1产品外观 (1)1.2硬件配置 (1)1.3调试工具 (2)2.产品规格 (4)3.可靠性测试 (6)4.产品尺寸 (7)5.产品定义 (8)6.包装与物理尺寸 (9)7.产品架构 (10)8.开发软件 (11)8.1什么是虚拟串口屏 (11)8.2Keil与虚拟串口屏绑定调试 (12)9.开发文档 (13)10.免责声明 (14)1.硬件介绍本章节主要介绍产品的一些外观参考图、硬件配置图和调试所需工具。
1.1产品外观以下为该尺寸不同型号的外观参考图，如图1-1和图1-2所示。
注：未涉及到结构工艺修改或布局大改动，硬件可靠性方面的变更迭代，公司不予对外发起变更，具体以收到的实物为准。
图1-1 4.0寸电容触摸白色外观参考图图1-2 4.0寸电容触摸金色外观参考图1.2硬件配置以下为该产品硬件配置参考图，如图1-3和图1-4所示。
图1-3硬件配置图图1-4WIFI配置图1.3调试工具以下为该产品调试工具参考图，如图1-5所示。
图1-5调试工具图2.产品规格◆产品参数产品型号DC48480W040_20W1_4C,86盒,白色（RS485,带WiFi,电容触摸,白色）DC48480W040_20W1_4C,86盒,金色（RS485,带WiFi,电容触摸,金色）DC48480W040_2001_4C,86盒,白色（RS485,无WiFi,电容触摸,白色）DC48480W040_2001_4C,86盒,金色（RS485,无WiFi,电容触摸,金色）产品系列物联型核心处理器*400MHz32位双核处理器操作系统嵌入式实时操作系统（FreeRTOS）协议类型默认大彩组态指令集，上位机可配置运行MODBUS RTU、XGUS协议尺寸 4.0寸分辨率480*480安装方向支持0、90、180和270度旋转安装显示存储空间128Mbit字库内置矢量字体，边缘抗锯齿处理，包含任何大小点阵ASCII、GBK、GB2312、UNICODE 字库，可自定义任意电脑字体显示图片存储支持JPEG、PNG（半透/全透）压缩，支持任意大小图片存储，支持图片旋转、放大、缩小等功能。
龙芯1C嵌入式开发板手册说明书
智龙开发板手册——基于龙芯1C的嵌入式开发板版本历史版本日期备注V1.02015-05-30基于智龙V1.0，创建手册V2.02015-10-21结合智龙开发者的经验和龙芯官方1C300B开发板手册编写目录1硬件篇 (7)1.1龙芯1C芯片介绍 (8)1.2智龙开发板介绍 (9)1.3智龙开发板硬件接口 (13)SDRAM控制器 (15)SRAM/NOR FLASH控制器 (15)NAND控制器 (15)时钟发生器 (18)I2S控制器 (19)AC97控制器 (19)LCD控制器 (19)Camera接口 (19)MAC控制器 (19)USB2.0控制器 (20)SPI控制器 (20)I2C控制器 (20)UART控制器 (20)GPIO (21)PWM控制器 (21)RTC (21)CAN控制器 (22)SDIO控制器 (22)ADC控制器 (22)1.4串口调试连接 (22)1.5eJtag调试系统 (27)1.6Flash烧写PMON引导系统 (28)1.7Flash烧写linux系统（附带跑马灯实验） (32)2软件篇 (42)2.2Linux内核裁剪和配置 (44)2.2.1安装图形化配置工具Ncurses (44)2.2.2运行图形化配置界面 (45)2.2.3编译Linux内核 (46)2.2.4开发板各模块驱动源码 (46)2.3配置内核各模块驱动 (48)2.3.1配置网卡驱动 (48)2.3.2配置NFS支持 (51)2.3.3配置UBIFS支持 (54)2.3.4配置串口驱动 (57)2.3.5配置LCD驱动 (59)2.3.6配置按键驱动 (61)2.3.7配置SD卡驱动 (63)2.3.8配置U盘驱动 (65)2.3.9配置USB鼠标和键盘驱动 (68)2.3.10配置USB OTG驱动 (72)2.3.11配置音频驱动 (74)2.3.12配置RTC驱动 (76)2.3.13配置PWM驱动 (78)2.3.14配置红外驱动 (81)2.3.15配置CAN总线驱动 (82)2.3.16配置SPI控制器驱动 (85)2.3.17配置I2C控制器驱动 (87)2.3.18配置ADC驱动 (89)2.3.19配置GPIO驱动 (90)2.3.20配置看门狗驱动 (92)2.3.21配置中星微zc301USB摄像头驱动 (93)2.4Linux、PMON、Rootfs镜像制作 (96)2.5Linux系统的交叉编译环境的搭建 (99)2.5.2新建Ubuntu虚拟机 (101)2.5.3安装Ubuntu系统 (109)2.5.4备份恢复Ubuntu虚拟机 (119)2.6使用Ubuntu12.04 (122)2.6.1Ubuntu终端 (122)2.6.2设置Ubuntu虚拟机网络 (124)2.6.3安装VMware Tools (129)2.6.4更新Ubuntu软件包列表 (131)2.6.5设置Windows和Ubuntu的共享文件夹 (131)2.6.6安装配置minicom串口工具 (133)2.6.7安装配置TFTP服务器 (142)2.6.8安装配置NFS服务器 (146)2.6.9建立交叉编译环境 (149)2.7PMON的配置和编译 (150)2.7.1安装依赖库和编译工具 (150)1连网在线安装 (150)2使用源码包安装 (150)2.7.2配置PMON (152)1配置系统启动方式 (152)2配置串口 (152)2.7.3编译PMON (153)2.8基于linux的根文件系统 (153)2.8.1创建文件系统目录 (153)2.8.2创建系统配置文件 (153)2.8.3拷贝库文件 (156)2.9制作根文件系统镜像 (157)2.9.1安装镜像文件制作工具 (157)2.9.2制作根文件系统镜像文件 (160)2.10基于linux的网络配置 (161)2.11基于linux的交叉编译Helloworld (164)2.12基于linux的Python移植 (170)2.13基于linux的PWM控制LED (171)2.14RT-Thread实时系统移植 (177)2.14基于RTT编写PWM驱动 (177)2.15基于RTT的LED和按键的控制 (177)3应用篇 (177)3.1龙芯wifi小车 (177)3.2英国智龙摩尔电码播放器 (178)3.3俄罗斯方块 (195)3.4智龙连接物联网平台智城云 (200)3.5智龙连接微信公众号 (200)3.63D打印机主板 (200)附录 (200)龙芯1C引脚复用表 (200)Linux常用命令 (200)PMON命令 (200)1硬件篇主要介绍龙芯1C芯片以及智龙开发板相关硬件设计图龙芯1C300A图智龙V2.0开发板1.1龙芯1C芯片介绍龙芯1C300(以下简称1C)芯片是基于LS232处理器核的高性价比单芯片系统，可应用于指纹生物识别、物联传感等领域。
如何使用开发板
注意拿到开发板请看开发板的右下角，有型号的标注。
V2.2、V2.2C 和V3.0，这三款板子的下载电路是一样的。
下面的图片拿V3.0的作为示例，操作方式一致。
当我们拿到普中科技开发板的时候，如何使用呢？下面我们将带领大家一步一步的操作：第一步：首先拿出我们的开发板，开发板整机如图1所示：图1开发板整机第二步：我们在给单片机下载程序的时候，需要做一些准备事项。
1、打开开发板的时候，请首先看下板子的相关的配件。
我们需要用到的是USB的数据线，配的其余配件在相关的实验需要用到：如图2所示：图2Mini USB数据线2、把Mini USB连接到单片机开发板上。
如图3所示：图3USB数据线连接单片机开发板3、我们下载的时候，单片机开发板上需要做一些跳线帽的设置。
如图4上标记的红色框框所示。
图4跳线帽功能设置B线链接到开发板上2.电源的跳线帽短接到右边5V处。
若是想用3.3V的，跳线帽可以短接到左边，注意单片机可能不能正常工作。
3.在使用51单片机的时候，跳线帽短接到右边。
若使用ARM模块的时候，则短接到左边（板子上有51和ARM的标注）。
4.单片机工作和下载需要把晶振接上。
5.在用到USB线下载的时候，这两个跳线帽需要短接到左边。
若是使用9针串口的，请短接到右边（9针串口下载，不能使用普中的，只能使用官方STC-ISP）。
6.复位按键。
跳线帽短接到下面，高电平处。
若是使用avr单片机的，需要短接到上面低电平出。
（开发板有标记H和L）。
7.单片机安装上。
注意，单片机安装时候，要注意缺口朝上。
若安装反了，则会短路烧毁板子。
第三步：打开我们板子的开关电源按钮：如图5所示。
图5开发板工作状态注意：若是打开开关按钮无反应，请自行检查跳线帽是否正确，看回上一个步骤。
第四步：这个时候我们板子的配置已完成。
现在我们需要安装开发板ch340的驱动，安装驱动成功才能下载程序。
打开我们光盘。
光盘资料\步骤2安装单片机开发相关软件\开发板USB转串口CH340驱动。
华风导航系统19入门指南说明书
Navigation System 19Getting StartedThe navigation system uses the driver number (as recognized by the MID) to personalize the navigation system. For example, if Driver 1 unlocks thevehicle, the “Driver 1” Personal addressbook and other navigation settings are automatically loaded when the vehicle is started. There is no way to change from one driver’s settings to the others while driving.dependent on the “Driver number” as displayed on the MID “Welcome” display.When the Keyless Access Remote is deliberately “unlinked,” (as when giving the key to a valet) the MID will display “Welcome.” Then the following occurs:• Some settings (e.g., the “Personal Address Book” and the “Calendar” Information feature), are not selectable (buttons grayed out).• Setup values (like volume,brightness, etc.) may be changed but are not remembered the next time you restart the vehicle.NOTE:The RL Owner’s Manual has additional information regarding “linking” and “unlinking” for the Keyless Access Remotes.Visiting Your DealerIf your need to visit your Acura dealer for a navigation related issue, ensure that you have the “Key Fob” that was in use when the problem occurred. Each driver (1, or 2) can have their ownnavigation and other vehicle settings. In order for the dealer to properly diagnose the problem, the correct key fob is necessary to troubleshoot the issue.NOTE:Please consult the troubleshooting and FAQ section in this manual. It could save you a trip to the dealer.20Navigation SystemGetting StartedMap Screen LegendAcura Dealer School Restaurant A Parking Lot Post OfficeHonda Dealer Hospital Grocery Store Gas Station Hotel/Lodging Parking GarageFreeway exit information If you move the Interface Dial over an area (map features shown above), thename is displayed on the screen.Incident IconWeatherAccident / Incident (other)ConstructionNOTE:See Map Legend on the Information screen for further explanation.GPS Signal Strength: Best Reception : Good Reception(Displays nothing when no Map Menu(see page 61)(Push in on the Interface Dial to view.)(Mile or km per half inch appears only when you zoom in or out by rotating the Interface Dial knob .)。
OTP6126用户手册V1.00 101126
4.3 电气安全信息...............ቤተ መጻሕፍቲ ባይዱ............................................................................. 7
5 设备安装............................................................................................ 7
3 规格特性............................................................................................ 6
3.1 环境要求..................................................................................................... 6 3.2 电源和电池................................................................................................. 6 3.2.1 交流/直流适配器............................................................................ 6 3.2.2 锂离子充电电池............................................................................. 6 3.3 功耗.............................................................................................................6 3.4 尺寸和重量................................................................................................. 6
EFR32xG24 2.4 GHz 10 dBm 无线极度芯片开发板参考手册说明书
EFR32xG24 2.4 GHz 10 dBm Radio Board BRD4186C Reference ManualThe BRD4186C Radio Board is an excellent starting point to get familiar with theEFR32™ Wireless Gecko Wireless System-on-Chip. The board enables developers to develop smart home, lighting, building automation, and AI/ML applications. It is opti-mized for operating in the 2.4 GHz band at 10 dBm output power. Radiated and conduc-ted testing is supported with the on-board printed antenna and UFL connector.The BRD4186C Radio Board is a plug-in board for the Wireless Starter Kit Mainboard (BRD4001A) and the Wireless Gecko Pro Kit Mainboard (BRD4002A) that gives access to debug interface, Virtual COM port, packet trace, display, buttons, LEDs, and addition-al features from expansion boards. With the supporting Simplicity Studio suite of tools, developers can take advantage of graphical wireless application development and visu-al energy profiling and optimization. The board also serves as a reference design for the EFR32xG24 Wireless SoC with matching network and a PCB antenna optimized for op-erating at 10 dBm output power in the 2.4 GHz band.RADIO BOARD FEATURES •Wireless SoC:EFR32MG24B210F1536IM48•CPU core: ARM® Cortex®-M33•Flash memory: 1536 kB•RAM: 256 kB•Operation frequency: 2.4 GHz•Transmit power: 10 dBm•Integrated PCB antenna, UFL connector(optional)•Crystals for LFXO and HFXO: 32.768 kHzand 39 MHz•8 Mbit low-power serial flash for over-the-air updatesThis document contains a brief introduction and description of the BRD4186C RadioBoard features, focusing on the RF sections and performance.Table of Contents1. Introduction (4)2. Radio Board Connector (5)2.1 Introduction (5)2.2 Radio Board Connector Pin Associations (5)3. Radio Board Block Summary (6)3.1 Introduction (6)3.2 Radio Board Block Diagram (6)3.3 Radio Board Block Description (6)3.3.1 Wireless MCU (6)3.3.2 LF Crystal Oscillator (LFXO) (6)3.3.3 HF Crystal Oscillator (HFXO) (6)3.3.4 Matching Network for 2.4 GHz (7)3.3.5 UFL Connector (7)3.3.6 Radio Board Connectors (7)3.3.7 Inverted-F Antenna (7)3.3.8 Serial Flash (7)3.3.9 Serial EEPROM (7)4. RF Section (8)4.1 Introduction (8)4.2 RF Section Schematic (8)4.2.1 2.4 GHz RF Matching Description (8)4.3 Bill of Materials for the 2.4 GHz Matching Network (8)4.4 Inverted-F Antenna (9)5. Mechanical Details (10)6. EMC Compliance (11)6.1 Introduction (11)6.2 EMC Regulations for 2.4 GHz (11)6.2.1 ETSI EN 300-328 Emission Limits for the 2400-2483.5 MHz Band (11)6.2.2 FCC15.247 Emission Limits for the 2400-2483.5 MHz Band (11)6.2.3 Applied Emission Limits for the 2.4 GHz Band (11)7. RF Performance (12)7.1 Conducted Power Measurements (12)7.1.1 Conducted Power Measurements with Unmodulated Carrier (12)7.1.2 Conducted Power Measurements with Modulated Carrier (13)7.2 Radiated Power Measurements (13)7.2.1 Maximum Radiated Power Measurements (14)7.2.2 Antenna Pattern Measurements (14)8. EMC Compliance Recommendations (15)8.1 Recommendations for 2.4 GHz ETSI EN 300-328 Compliance (15)8.2 Recommendations for 2.4 GHz FCC 15.247 Compliance (15)9. Board Revision History (16)10. Errata (17)11. Document Revision History (18)Introduction 1. IntroductionThe BRD4186C Radio Boards provide a development platform (together with the Wireless Starter Kit Mainboard or the Wireless Pro Kit Mainboard) for the Silicon Labs EFR32MG24 Wireless System-on-Chips and serve as reference designs for the matching network of the RF interface.The BRD4186C Radio Board is designed to operate in the 2400-2483.5 MHz band with the RF matching network optimized for operat-ing at 10 dBm output power.To develop and/or evaluate the EFR32 Wireless Gecko, the BRD4186C Radio Board can be connected to the Wireless Starter Kit Mainboard or the Wireless Pro Kit Mainboard to get access to debug interface, Virtual COM port, packet trace, display, buttons, LEDs, and additional features from expansion boards, and also to evaluate the performance of the RF interface.2. Radio Board Connector2.1 IntroductionThe board-to-board connector scheme allows access to all EFR32MG24 GPIO pins as well as the RESETn signal. For more informa-tion on the functions of the available pins, see the EFR32MG24 data sheet.2.2 Radio Board Connector Pin AssociationsThe figure below shows the mapping between the connector and the EFR32MG24 pins and their function on the Wireless Starter Kit Mainboard.GND F9 / PA00 / VCOM_RTS 3v3JOYSTICK* / PD02* / P36P200Upper RowNC / P38NC / P40DBG_TDO_SWO / TRACED0 / PA03 / P42TRACED2 / PA06 / P44DBG_TMS_SWDIO / PA02 / F0DISP_ENABLE / PC09 / F14UIF_BUTTON0 / PB01 / F12UIF_LED0 / PB02 / F10VCOM_CTS / PB05 / F8DBG_RESET / RESETn / F4DBG_TDO_SWO / TRACED0 / PA03 / F2DISP_SI / PC01 / F16VCOM_TX / PA08 / F6PTI_DATA / PD04 / F20DISP_EXTCOMIN / PC06 / F18USB_VBUS5VBoard ID SCLGNDBoard ID SDAUSB_VREG F7 / PA09 / VCOM_RX F5 / PB00 / VCOM_ENABLE F3 / PA04 / DBG_TDI / TRACECLK F1 / PA01 / DBG_TCK_SWCLK P45 / PA07 / TRACED3P43 / PA05 / TRACED1P41 / PA04 / DBG_TDI / TRACECLK P39 / NCP37 / NC F11 / PB04 / UIF_LED1F13 / PB03 / UIF_BUTTON1F15 / PC03 / DISP_SCLK F17 / PC08 / DISP_SCS F19 / PD05 / PTI_SYNC F21 / NC GNDVMCU_INVCOM_CTS / PB05 / P0P201Lower RowVCOM_RTS / PA00 / P2TRACED1 / PA05 / P4JOYSTICK* / PD02* / P6GNDVRF_INP35 / PC04P7 / PC00P5 / PC03 / DISP_SCLK P3 / PC02P1 / PC01 / DISP_SI P33 / PC06 / DISP_EXTCOMIN P31 / PC08 / DISP_SCSP29 / PC09 / DISP_ENABLE P27 / NCP25 / PD04 / PTI_DATA P23 / NCP21 / PB03 / UIF_BUTTON1P19 / PB02 / UIF_LED0P17 / PB01 / UIF_BUTTON0P15 / PB00 / VCOM_ENABLE P13 / PC07P11 / PA09 / VCOM_RX P9 / PA08 / VCOM_TX NC / P34NC / P32NC / P30NC / P28UIF_LED1 / PB04 / P26PTI_SYNC / PD05 / P24NC / P22DBG_TCK_SWCLK / PA01 / P20DBG_TMS_SWDIO / PA02 / P18DBG_TDO_SWO / TRACED0 / PA03 / P16DBG_TDI / TRACECLK / PA04 / P14PC05 / P12TRACED3 / PA07 / P10TRACED2 / PA06 / P8 *Mutually exclusive connections. Default: PD02 to P6.Figure 2.1. BRD4186C Radio Board Connector Pin MappingRadio Board Connector3. Radio Board Block Summary3.1 IntroductionThis section introduces the blocks of the BRD4186C Radio Board.3.2 Radio Board Block DiagramThe block diagram of the BRD4186C Radio Board is shown in the figure below.Figure 3.1. BRD4186C Block Diagram3.3 Radio Board Block Description3.3.1 Wireless MCUThe BRD4186C Radio Board incorporates an EFR32MG24B210F1536IM48 Wireless System-on-Chip featuring 32-bit Cortex®-M33 core, 1536 kB of flash memory, 256 kB of RAM, and a 2.4 GHz band transceiver with output power up to 10 dBm. For additional infor-mation on the EFR32MG24B210F1536IM48, refer to the EFR32MG24 data sheet.3.3.2 LF Crystal Oscillator (LFXO)The BRD4186C Radio Board has a 32.768 kHz crystal mounted. For details regarding the crystal configuration, refer to application note AN0016.2: Oscillator Design Considerations.3.3.3 HF Crystal Oscillator (HFXO)The BRD4186C Radio Board has a 39 MHz crystal mounted. For details regarding the crystal configuration, refer to application note AN0016.2: Oscillator Design Considerations.3.3.4 Matching Network for 2.4 GHzThe BRD4186C Radio Board incorporates a 2.4 GHz matching network which connects the 2.4 GHz RF input/output of the EFR32MG24 to the one on-board printed Inverted-F antenna. The component values were optimized for the 2.4 GHz band RF perform-ance and current consumption with 10 dBm output power.For a detailed description of the matching network, see section 4.2.1 2.4 GHz RF Matching Description.3.3.5 UFL ConnectorTo be able to perform conducted measurements, Silicon Labs added a UFL connector to the Radio Board. The connector allows an external 50 Ohm cable or antenna to be connected during design verification or testing.Note: By default, the output of the matching network is connected to the printed inverted-F antenna by a series 0 Ohm resistor. To support conducted measurements, or the connection of an external antenna, the option to connect the output to the UFL connector is available. If using this option, move the series 0 Ohm resistor to the antenna to the series resistor to the UFL connector (see section 4.2.1 2.4 GHz RF Matching Description for further details). On the layout, the footprints of these two resistors have overlapping pads to prevent simultaneous connection of the antenna and the UFL connector.3.3.6 Radio Board ConnectorsTwo dual-row, 0.05” pitch polarized connectors make up the BRD4186C Radio Board interface to the Wireless Starter Kit Mainboard. For more information on the pin mapping between the EFR32MG24B210F1536IM48 and the connectors, refer to section 2.2 Radio Board Connector Pin Associations.3.3.7 Inverted-F AntennaThe BRD4186C Radio Board includes a printed inverted-F antenna (IFA) tuned to have close to 50 Ohm impedance at the 2.4 GHz band.For a detailed description of the antenna, see section 4.4 Inverted-F Antenna.3.3.8 Serial FlashThe BRD4186C Radio Board is equipped with an 8 Mbit Macronix MX25R SPI flash that is connected directly to the EFR32MG24 to support over-the-air (OTA) updates. For additional information on the pin mapping, see the BRD4186C schematic.3.3.9 Serial EEPROMThe BRD4186C Radio Board is equipped with a serial I2C EEPROM for board identification and to store additional board-related infor-mation.4. RF Section4.1 IntroductionThis section gives a short introduction to the RF section of the BRD4186C Radio Board.4.2 RF Section SchematicBRD4186C Radio Board RF section schematic is shown in the following figure.2.4 GHz Matching Path SelectionInverted-F AntennaAntenna Tuning High Frequency Figure 4.1. BRD4186C RF Section Schematic4.2.1 2.4 GHz RF Matching DescriptionThe 2.4 GHz RF matching connects the 2G4RF1 pin to the on-board printed IFA. The component values were optimized for the 2.4 GHz band RF performance and current consumption with the targeted 10 dBm output power.The matching network consists of a five-element impedance matching and harmonic filter circuitry and a DC blocking capacitor (not required for the 20 dBm part).For conducted measurements, the matching network output can also be connected to the UFL connector by removing the series R1resistor (0 Ohm) between the antenna and the matching network and mounting it to the R2 resistor position between the matching net-work and the UFL connector.4.3 Bill of Materials for the 2.4 GHz Matching NetworkThe bill of materials for the BRD4186C Radio Board 2.4 GHz matching network is shown in the following table.Table 4.1. Bill of Materials for the BRD4186C 2.4 GHz RF Matching Network4.4 Inverted-F AntennaThe BRD4186C Radio Board includes an on-board, printed inverted-F antenna, tuned for the 2.4 GHz band. Due to the design restric-tions of the radio board, the input of the antenna and the output of the matching network can't be placed directly next to each other. Therefore, a 50 Ohm transmission line was necessary to connect them.The resulting impedance that is presented to the matching network output is shown in the following figure. During the measurement, the BRD4186C Radio Board was attached to a Wireless Starter Kit Mainboard.As shown in the figure, the antenna impedace (blue curve) is close to 50 Ohm in the entire 2.4 GHz band, and the reflection (red curve) is under -10 dB.Figure 4.2. Impedance and Reflection of the Inverted-F Antenna of the BRD4186C Board Measured from the Matching Output5. Mechanical DetailsThe BRD4186C Radio Board is illustrated in the figures below.45 mm30 mmFigure 5.1. BRD4186C Top View24 mm5 mm Interface ConnectorInterface ConnectorFigure 5.2. BRD4186C Bottom ViewMechanical DetailsEMC Compliance 6. EMC Compliance6.1 IntroductionBRD4186C Radio Board fundamental and harmonic levels compliance is tested against the following standards:• 2.4 GHz:•ETSI EN 300-328•FCC 15.2476.2 EMC Regulations for 2.4 GHz6.2.1 ETSI EN 300-328 Emission Limits for the 2400-2483.5 MHz BandBased on ETSI EN 300-328, the allowed maximum fundamental power for the 2400-2483.5 MHz band is 20 dBm EIRP. For the unwan-ted emissions in the 1 GHz to 12.75 GHz domain, the specific limit is -30 dBm EIRP.6.2.2 FCC15.247 Emission Limits for the 2400-2483.5 MHz BandFCC 15.247 allows conducted output power up to 1 W (30 dBm) in the 2400-2483.5 MHz band. For spurious emissions, the limit is -20 dBc based on either conducted or radiated measurement, if the emission is not in a restricted band. The restricted bands are speci-fied in FCC 15.205. In these bands, the spurious emission levels must meet the levels set out in FCC 15.209. In the range from 960 MHz to the frequency of the 5th harmonic, it is defined as 0.5 mV/m at 3 m distance, which equals to -41.2 dBm in EIRP.If operating in the 2400-2483.5 MHz band, the 2nd, 3rd, and 5th harmonics can fall into restricted bands. As a result, for those harmon-ics the -41.2 dBm limit should be applied. For the 4th harmonic, the -20 dBc limit should be applied.6.2.3 Applied Emission Limits for the 2.4 GHz BandThe above ETSI limits are applied both for conducted and radiated measurements.The FCC restricted band limits are radiated limits only. In addition, Silicon Labs applies the same restrictions to the conducted spec-trum. By doing so, compliance with the radiated limits can be estimated based on the conducted measurement by assuming the use of an antenna with 0 dB gain at the fundamental and the harmonic frequencies.The overall applied limits are shown in the table below. For the harmonics that fall into the FCC restricted bands, the FCC 15.209 limit is applied. ETSI EN 300-328 limit is applied for the rest.Table 6.1. Applied Limits for Spurious Emissions for the 2.4 GHz Band7. RF Performance7.1 Conducted Power MeasurementsDuring measurements, the BRD4186C Radio Board was attached to a Wireless Starter Kit Mainboard which was supplied by USB. The voltage supply for the radio board (VMCU) was 3.3 V and for the power amlifier (PAVDD), it was 1.8 V.7.1.1 Conducted Power Measurements with Unmodulated CarrierThe transceiver was operated in unmodulated carrier transmission mode. The output power of the radio was set to 10 dBm. The typical output spectrum is shown in the following figure.Figure 7.1. Typical Output Spectrum of the BRD4186C; PAVDD = 1.8 VAs shown in the figure, the fundamental is 10 dBm and all of the unwanted emissions are under the -41.2 dBm limit.Note: The conducted measurement is performed by connecting the on-board UFL connector to a spectrum analyzer through an SMA conversion adapter (P/N: HRMJ-U.FLP(40)). This connection itself introduces approximately 0.3 dB insertion loss.7.1.2 Conducted Power Measurements with Modulated CarrierDepending on the applied modulation scheme and the spectrum analyzer settings specified by the relevant EMC regulations, the meas-ured power levels are usually lower compared to the results with unmodulated carrier. These differences are measured and used as relaxation factors on the results of the radiated measurement performed with unmodulated carrier. This way, the radiated compliance with modulated transmission can be evaluated.In this case, both the ETSI EN 300-328 and the FCC 15.247 regulations define the following spectrum analyzer settings for measuring the unwanted emissions above 1 GHz:•Detector: Average•RBW: 1 MHzThe table below shows the measured differences for the supported modulation schemes.Table 7.1. Measured Relaxation Factors for the Supported Modulation SchemesAs shown, the BLE 125 Kb/s coded modulation scheme has the lowest relaxation factors. These values will be used as the worst case relaxarion factors for the radiated measurements.7.2 Radiated Power MeasurementsDuring measurements, the BRD4186C Radio Board was attached to a Wireless Starter Kit Mainboard which was supplied by USB. The voltage supply for the radio board was 3.3 V, for the power amlifier (PAVDD) it was 1.8 V. The radiated power was measured in an antenna chamber by rotating the board 360 degrees with horizontal and vertical reference antenna polarizations in the XY, XZ, and YZ cuts. The measurement planes are illustrated in the figure below.XZYFigure 7.2. Illustration of Reference Planes with a Radio BoardNote: The radiated measurement results presented in this document were recorded in an unlicensed antenna chamber. Also, the radi-ated power levels may change depending on the actual application (PCB size, used antenna, and so on). Therefore, the absolute levels and margins of the final application are recommended to be verified in a licensed EMC testhouse.7.2.1 Maximum Radiated Power MeasurementsFor the transmitter antenna, the on-board printed inverted-F antenna of the BRD4186C Radio Board was used (the R1 resistor was mounted). The supply for the RF section (RFVDD) and the 2.4 GHz power amplifier (PAVDD) was 1.8 V provided by the on-chip DC-DC converter; for details, see the BRD4186C schematic. The transceiver was operated in unmodulated carrier transmission mode. The output power of the radio was set to 10 dBm based on the conducted measurement.The results are shown in the tables below. The correction factors are applied based on the BLE 125 Kb/s coded modulation, shown in section 7.1.2 Conducted Power Measurements with Modulated Carrier . For the rest of the supported modulation schemes, the correction factors are larger, thus the related calculated margins would be higher compared to the ones shown in the table below. Thus,the margins below can be considered as worst case margins.Table 7.2. Maximums of the Measured Radiated Powers in EIRP [dBm] and the Calculated Modulated Margins in [dB] with theWireless Starter Kit Mainboard; PAVDD = 1.8 VAs shown in the table, with 10 dBm output power, the radiated power of the fundamental is higher than 10 dBm due to the high antenna gain. The 3rd harmonic is very close to the limit with the Wireless Starter Kit Mainboard in case of the unmodulated carrier transmis-sion. But with the relaxation of the supported modulation schemes, the margin is at least 5.1 dB.7.2.2 Antenna Pattern MeasurementsThe measured normalized antenna patterns are shown in the following figures.180°-35-30-25-20180°-35-30180°-35-30-25Figure 7.3. Normalized Antenna Pattern of the BRD4186C with the Wireless Starter Kit MainboardEMC Compliance Recommendations 8. EMC Compliance Recommendations8.1 Recommendations for 2.4 GHz ETSI EN 300-328 ComplianceAs shown in section 7.2 Radiated Power Measurements, the power of the BRD4186C fundamental with 10 dBm output is compliant with the 20 dBm limit of the ETSI EN 300-328 regulation. With the supported modulation schemes, the harmonics are also compliant with the relevant limits. Although the BRD4186C Radio Board has an option for mounting a shielding can, it is not required for compli-ance.8.2 Recommendations for 2.4 GHz FCC 15.247 ComplianceAs shown in section 7.2 Radiated Power Measurements, the power of the BRD4186C fundamental with 10 dBm output is compliant with the 30 dBm limit of the FCC 15.247 regulation. With the supported modulation schemes, the harmonics are also compliant with the relevant limits. Although the BRD4186C Radio Board has an option for mounting a shielding can, it is not required for compliance.9. Board Revision HistoryThe board revision is laser engraved in the Board Info field on the bottom side of the PCB, as outlined in the figure below. The revision printed on the silkscreen is the PCB revision.Board RevisionPCB RevisionBRD4186C Rev. A01P C B 4186C R e v . A 01184500348Figure 9.1. Revision InfoTable 9.1. BRD4186C Radio Board Revision HistoryBoard Revision HistoryErrata 10. ErrataThere are no known errata at present.Document Revision History 11. Document Revision HistoryRevision 1.0April, 2022•Initial document release.IoT Portfolio/IoTSW/HW/simplicityQuality/qualitySupport & Community/communitySilicon Laboratories Inc.400 West Cesar Chavez Austin, TX 78701USADisclaimerSilicon Labs intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Labs products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and “Typical” parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Labs reserves the right to make changes without further notice to the product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Without prior notification, Silicon Labs may update product firmware during the manufacturing process for security or reliability reasons. Such changes will not alter the specifications or the performance of the product. Silicon Labs shall have no liability for the consequences of use of the information supplied in this document. This document does not imply or expressly grant any license to design or fabricate any integrated circuits. The products are not designed or authorized to be used within any FDA Class III devices, applications for which FDA premarket approval is required, or Life Support Systems without the specific written consent of Silicon Labs. A “Life Support System” is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant personal injury or death. Silicon Labs products are not designed or authorized for military applications. Silicon Labs products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, ormissiles capable of delivering such weapons. Silicon Labs disclaims all express and implied warranties and shall not be responsible or liable for any injuries or damages related to use of a Silicon Labs product in such unauthorized applications.Trademark InformationSilicon Laboratories Inc.®, Silicon Laboratories®, Silicon Labs®, SiLabs® and the Silicon Labs logo®, Bluegiga®, Bluegiga Logo®, ClockBuilder®, CMEMS®, DSPLL®, EFM®, EFM32®, EFR, Ember®, Energy Micro, Energy Micro logo and combinations thereof, “the world’s most energy friendly microcontrollers”, Ember®, EZLink®, EZRadio®, EZRadioPRO®, Gecko®, Gecko OS, Gecko OS Studio, ISOmodem®, Precision32®, ProSLIC®, Simplicity Studio®, SiPHY®, Telegesis, the Telegesis Logo®, USBXpress®, Zentri, the Zentri logo and Zentri DMS, Z-Wave®, and others are trademarks or registered trademarks of Silicon Labs. ARM, CORTEX, Cortex-M3 and THUMB are trademarks or registered trademarks of ARM Holdings. Keil is a registered trademark of ARM Limited. Wi-Fi is a registered trademark of the Wi-Fi Alliance. All other products or brand names mentioned herein are trademarks of their respective holders.。
PGL22G FPGA 开发平台 用户手册说明书
Logos FPGA开发平台用户手册PGL22GREV 1.0版芯驿电子科技（上海）有限公司目录一、开发板简介 (5)二、FPGA核心板 (7)(一)简介 (7)(二)FPGA (8)(三)有源晶振 (10)(四)DDR3 (10)(五)QSPI Flash (13)(六)LED灯 (14)(七)复位按键 (16)(八)JTAG接口 (16)(九)电源接口 (17)(十)扩展接口 (17)(十一)电源 (21)(十二)结构图 (24)三、扩展板 (25)(一)简介 (25)(二)千兆以太网接口 (26)(三)HDMI输出接口 (28)(四)USB2.0通信接口 (29)(五)SD卡槽 (31)(六)USB转串口 (32)(七)EEPROM 24LC04 (34)(八)实时时钟DS1302 (35)(九)扩展口 (36)(十)JTAG接口 (38)(十一)摄像头接口 (39)(十二)按键 (40)(十三)LED灯 (41)(十四)供电电源 (42)(十五)结构图 (43)紫光同创Logos系列的FPGA开发平台（型号：PGL22G）正式发布了，为了让您对此开发平台可以快速了解，我们编写了此用户手册。
这款Logos系列FPGA开发平台采用核心板加扩展板的模式，方便用户对核心板的二次开发利用。
在底板设计上我们设计了丰富的外围接口，比如千兆以太网接口，HDMI输出接口，USB2.0通信接口，Uart通信接口，SD卡接口，RTC电路等等。
满足用户各种高速数据传输，视频图像处理和工业控制的要求，是一款"全能级“的FPGA 开发平台。
为高速视频传输，网络和USB通信及数据处理的前期验证和后期应用提供了可能。
相信这样的一款产品非常适合从事FPGA开发的学生、工程师等群体。
一、开发板简介在这里，对这款PGL FPGA开发平台进行简单的功能介绍。
开发板的整个结构，继承了我们一贯的核心板+扩展板的模式来设计的。
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GT8619开发板使用指南V1.0
开发板跳线的设置(见上图,开发板详细解释见G600 GPRS Module Developer Kit User Manual-V1.0.1 .pdf 文档) a. JP12短接（3.3V 电源供电）
b. JM7短接（模块上电自动开机）
c.JP11短接（指示灯供电压选择，有4.0V和3.3V，选择3.3V即可）
d.JM5 短接1、2，短接3、4（1脚为key、3脚为RESET_N）(如果短接1、3则表示上电则需按开机键KM2手动开
机)
e.JI 2 短接（共9个，用于连接串口）
f.JI 1 短接（共5个，用于连接USB）
g.JT1 短接（共7个，用于连接TRACE口）
上电前准备
a.安装SIM卡
b.安装G600模块
c.安装模块的天线
d.连接串口线到电脑
e.将SWP1开关置于中间位置（不向开发板供电）
f.在JP1插入9－15V电源（此时L V40灯会亮）
g.最后将SWP1开关向JP1电源插座方向推（如模块正常启动，则LPG灯会闪烁，其它相应的灯也会亮）
串口的使用（JI 2 需短接, G600为自适应波特率,可更改成其它的波特率）
USB的使用( JI 1 短接, 另需安装PL-2303 Driver Installer_old.exe驱动程序)
TRACE工具的使用( JT 1 需短接, 并先按第3步执行AT+TRACE=1激活TRACE端口)
a.TRACE工具的安装( Mobile_Analyser_V09.02.12_Setup_WINDOWS.exe 约32M )
a1. 双击Mobile_Analyser_V09.02.12_Setup_WINDOWS.exe
a2. 点击Next按钮
a3. 选择安装目录,点击Next(注意: 目录名Mobile_Analyser_V09不可改成其它)
a4. 点击Install
a5. 再点击Finish即可
b.TRACE工具初始化
b1. 到安装目录或开始菜单运行Mobile_Analyser.exe程序,第一次运行将出现如下界面,
点击Apply and Restart按钮即可
b2. 复制Libraries文件夹到Mobile_Analyser.exe的安装目录下(如D:\driver\Mobile_Analyser_V09\lib)
注意: 此Libraries文件夹包含如下两个文件gfs21.38.01_LCG2.zip和mobile_analyser_component_repository.xml文件
c2. 打开菜单Setup -> Options -> Repository (按下图设置)
c3. 打开菜单Setup -> Interface (按下图设置, COM Port按设备管理器中实际端口号)
c4. 打开菜单Repository -> Access (按下图勾选,点击Use按钮即可,此时软件将重新配置,请耐心等候)
c5. 打开菜单File -> New Trace File (如下图,选择TRACE保存目录和文件名)
c6. 打开菜单Control -> Trace 开始抓取模块TRACE数据
注意事项。