KM616V1002CIT-10中文资料

Final
Rev. 3.0
Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
I/O Circuit & Column Select
A0 - A15 WE CS OE LB UB I/O 1 ~ I/O16
WE OE UB LB CS
VCC VSS N.C
-2-
Revision 3.0 March 1999
元器件交易网
KM616V1002C/CL, KM616V1002CI/CLI
* FP-BGA only.
for AT&T CMOS SRAM
64K x 16 Bit High-Speed CMOS Static RAM(3.3V Operating)
GENERAL DESCRIPTION
The KM616V1002C is a 1,048,576-bit high-speed Static Random Access Memory organized as 65,536 words by 16 bits. The KM616V1002C uses 16 common input and output lines and has at output enable pin which operates faster than address access time at read cycle. Also it allows that lower and upper byte access by data byte control (UB, LB). The device is fabricated using SAMSUNG′s advanced CMOS process and designed for high-speed circuit technology. It is particularly well suited for use in high-density high-speed system applications. The KM616V1002C is packaged in a 400mil 44-pin plastic SOJ or TSOP2 forward or 48-Fine pitch BGA.
Previous 85mA 83mA 80mA
Changed 95mA 93mA 90mA Sep. 17. 1998 Nov. 5. 1998 Changed F Final Final
Rev. 2.0 Rev. 2.1
Rev. 2.2
Dec. 10. 1998 Changed I/O9 ~ I/O16 I/O1 ~ I/O8 Mar. 2. 1999 Changed 0.5mA
-1-
Revision 3.0 March 1999
元器件交易网
KM616V1002C/CL, KM616V1002CI/CLI
FEATURES
• Fast Access Time 10*,12,15,20ns(Max.) • Low Power Dissipation Standby (TTL) : 30mA(Max.) (CMOS) : 5mA(Max.) 0.5mA(Max.) L-ver. only Operating KM616V1002C/CL - 10: 105mA(Max.) KM616V1002C/CL - 12: 95mA(Max.) KM616V1002C/CL - 15: 93mA(Max.) KM616V1002C/CL - 20: 90mA(Max.) • Single 3.3±0.3V Power Supply • TTL Compatible Inputs and Outputs • Fully Static Operation - No Clock or Refresh required • Three State Outputs • 2V Minimum Data Retention; L-ver. only • Center Power/Ground Pin Configuration • Data Byte Control: LB: I/O1~ I/O 8, UB: I/O9~ I/O16 • Standard Pin Configuration: KM616V1002CJ: 44-SOJ-400 KM616V1002CT: 44-TSOP2-400F KM616V1002CF: 48-Fine pitch BGA with 0.75 Ball pitch
SOJ/ TSOP2
35 I/O13 34 Vss 33 Vcc 32 I/O12 31 I/O11 30 I/O10 29 I/O9 28 N.C 27 A12 26 A11 25 A10 24 A9 23 N.C
H N.C A8 A9 A10 A11 N.C G I/O8 N.C A12 A13 WE I/O16 F I/O7 I/O6 A14 A15 I/O14 I/O15 E Vcc I/O5 N.C N.C I/O13 Vss
PIN CONFIGURATION(TOP VIEW)
1 2 3
for AT&T CMOS SRAM
4 5 6
A0 A1 A2 A3 A4 CS I/O1 I/O2 I/O3
1 2 3 4 5 6 7 8 9
44 A15 43 A14 42 A13 41 OE 40 UB 39 LB 38 I/O16 37 I/O15 36 I/O14
48-CSP
ABSOLUTE MAXIMUM RATINGS*
Parameter Voltage on Any Pin Relative to V SS Voltage on VCC Supply Relative to VSS Power Dissipation Storage Temperature Operating Temperature Commercial Industrial Symbol VIN, VOUT VCC Pd TSTG TA TA Rating -0.5 to 4.6 -0.5 to 4.6 1 -65 to 150 0 to 70 -40 to 85 Unit V V W °C °C °C
vision History
Rev. No. Rev. 0.0 Rev. 1.0 History Initial release with Preliminary. Release to Final Data Sheet. 1.1. Delete Preliminary. 1.2. Changed DC characteristics. Item ICC 12ns 15ns 20ns Added 48-fine pitch BGA. Changed device part name for FP-BGA. Item Previous Symbol Z ex) KM616V1002CZ -> KM616V1002CF Changed device ball name for FP-BGA. Previous I/O1 ~ I/O8 I/O9 ~ I/O16 1. Added 10ns speed for FP-BGA only. 2. Changed Standby Current. Item Previous Standby Current(Isb1) 0.3mA 3. Added Data Retention Characteristics. Draft Data Aug. 5. 1998 Sep. 7. 1998 Remark Preliminary Final
RECOMMENDED DC OPERATING CONDITIONS* (TA= to 70°C)
Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Symbol VCC VSS VIH VIL Min 3.0 0 2.0 -0.5** Typ 3.3 0 Max 3.6 0 VCC+0.5*** 0.8 Unit V V V V
Pre-Charge Circuit
Row Select
Memory Array 512 Rows 128x16 Columns
PIN FUNCTION
Pin Name Data Cont. Data Cont. Gen. CLK
A9 A10 A11 A12 A13 A14 A15
Pin Function Address Inputs Write Enable Chip Select Output Enable Lower-byte Control(I/O1~I/O8) Upper-byte Control(I/O9~I/O16) Data Inputs/Outputs Power(+3.3V) Ground No Connection
FUNCTIONAL BLOCK DIAGRAM
Clk Gen.
A0 A1 A2 A3 A4 A5 A6 A7 A8 I/O1~I/O8 I/O9 ~I/O16