DS3650中文资料

DS3650Quad Differential Line ReceiversGeneral DescriptionThe DS3650is TTL compatible quad high speed circuits in-tended primarily for line receiver applications.Switching speeds have been enhanced over conventional line receiv-ers by the use of Schottky technology,and TRI-STATE ®strobing is incorporated offering a high impedance output state for bussed organizations.The DS3650has active pull-up outputs and offers a TRI-STATE strobe.Featuresn High speed n TTL compatiblen Input sensitivity:±25mVn TRI-STATE outputs for high speed busses n Standard supply voltages:±5VnPin and function compatible with MC3450Connection DiagramInputStrobeOutput DS3650V D ≥25mVL H H Open −25mV ≤V ID ≤25mV L X H Open V ID ≤−25mVL L HOpenL =Low Logic State Open =TRI-STATE H =High Logic State X =Indeterminate StateTRI-STATE ®is a registered trademark of National Semiconductor Corporation.Dual-In-Line PackageDS005782-1Top ViewOrder Number DS3650M or DS3650N See NS Package Number M16A or N16A For Complete Military 883Specifications,see RETS Data Sheet.Wired “OR”Data Selecting Using TRI-STATE LogicDS005782-3June 1999DS3650Quad Differential Line Receivers©1999National Semiconductor Corporation Absolute Maximum Ratings(Note2)If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.Power Supply VoltagesV CC+7.0V DC V EE−7.0V DC Differential-Mode Input Signal VoltageRange,V IDR±6.0V DC Common-Mode Input Voltage Range,V ICR±5.0V DC Strobe Input Voltage,V I(S) 5.5V DC Storage Temperature Range−65˚C to+150˚C Lead Temperature(Soldering,4seconds)260˚C Maximum Power Dissipation(Note1)at25˚CCavity Package1509mW Molded DIP Package1476mWSO Package1051mW Operating ConditionsMin Max Units Supply Voltage,V CC 4.75 5.25V DC Supply Voltage,V EE−4.75−5.25V DC Operating Temperature,T A0+70˚C Output Load Current,I OL16mA Differential-Mode InputVoltage Range,V IDR−5.0+5.0V DC Common-Mode InputVoltage Range,V ICR−3.0+3.0V DC Input Voltage RangeInput to GND,V IR−5.0+3.0V DC Note1:Derate cavity package10.1mW/˚C above25˚C;derate molded DIP package11.8mW/˚C above25˚C;derate SO package8.41mW/˚C above 25˚C.Electrical Characteristics(Notes3,4)(V CC=5.0V DC,V EE=−5.0V DC,Min≤T A≤Max,unless otherwise noted)Symbol Parameter Conditions Min Typ Max Units V IS Input Sensitivity,(Note6)(Common-Mode Voltage Range=Min≤V CC≤Max±25.0mV−3V≤V IN≤3V)Min≥V EE≥MaxI IH(I)High Level Input Current to(Figure5)75µAReceiver InputI IL(I)Low Level Input Current to(Figure6)−10µAReceiver InputI IH(S)High Level Input Current to Strobe Input(Figure3)V IH(S)=2.4V40µAV IH(S)=V CC1mA I IL(S)Low Level Input Current to Strobe Input V IH(S)=0.4V−1.6mA V OH High Level Output Voltage(Figure1) 2.4V V OL Low Level Output Voltage(Figure1)0.45V I OS Short-Circuit Output Current(Note5)(Figure4)−18−70mA I OFF Output Disable Leakage Current(Figure7)40µA I CCH High Logic Level Supply Current(Figure2)4560mAfrom V CCI EEH High Logic Level Supply Current(Figure2)−17−30mAfrom V EENote2:“Absolute Maximum Ratings”are those values beyond which the safety of the device cannot be guaranteed.Except for“Operating Temperature Range”they are not meant to imply that the devices should be operated at these limits.The table of“Electrical Characteristics”provides conditions for actual device operation.Note3:Unless otherwise specified,min/max limits apply across the0˚C to+70˚C range for the DS3650.All typical values are for T A=25˚C,V CC=5V and V EE=−5V.Note4:All currents into device pins shown as positive,out of device pins as negative,all voltages referenced to ground unless otherwise noted.All values shown as max or min on absolute value basis.Note5:Only one output at a time should be shorted.Note6:A parameter which is of primary concern when designing with line receivers is,what is the minimum differential input voltage required as the receiver input terminals to guarantee a given output logic state.This parameter is commonly referred to as threshold voltage.It is well known that design considerations of threshold voltage are plagued by input offset currents,bias currents,network source resistances,and voltage gain.As a design convenience,the DS3650is specified to a pa-rameter called input sensitivity(V IS).This parameter takes into consideration input offset currents and bias currents and guarantees a minimum input differential volt-age to cause a given output logic state with respect to a maximum source impedance of200Ωat each input.2Switching Characteristics(V CC=5V DC,V EE=−5V DC,T A=25˚C unless otherwise noted)Symbol Parameter Conditions Min Typ Max Unitst PHL(D)High-to-Low Logic Level Propagation2125ns Delay Time(Differential Inputs)(Figure8)t PLH(D)Low-to-High Logic Level Propagation2025ns Delay Time(Differential Inputs)t POH(S)TRI-STATE to High Logic Level1621ns Propagation Delay Time(Strobe)t PHO(S)High Logic Level to TRI-STATE718ns Propagation Delay Time(Strobe)(Figure9)t POL(S)TRI-STATE to Low Logic Level1927ns Propagation Delay Time(Strobe)t PLO(S)Low Logic Level to TRI-STATE1429ns Propagation Delay Time(Strobe)3Electrical Characteristic Test CircuitsDS005782-4V1V2V3V4I1V OH+2.975V+3.0V+3.0V GND−0.4mA−3.0V−2.975V GND−3.0V−0.4mAV OL+3.0V+2.975V GND+3.0V+16mA−2.975V−3.0V−3.0V GND+16mAChannel A shown under test.Other channels are tested similarly.FIGURE1.V OH and V OLDS005782-5FIGURE2.I CCH and I EEH DS005782-6FIGURE3.I IH(S)and I IL(S)4(Continued)DS005782-7Note:Channel A shown under test,other channels are tested similiarly. Only one output shorted at a time.FIGURE4.I OSDS005782-8 Note:Channel A(−)shown under test,other channels are tested similarly.Devices are tested with V1from3V to−3V.FIGURE5.I IHDS005782-9 Note:Channel A(−)shown under test,other channels are tested similarly.Devices are tested with V1from3V to−3V.FIGURE6.I ILDS005782-10 Note:Output of Channel A shown under test,other outputs aretestedsimilarly for V1=0.4V and2.4V.FIGURE7.I OFF 5AC Test Circuits and Switching Time WaveformsDS005782-11Note.Output of Channel B shown under test,other channels are tested similarly.S1at “B”for DS1650/DS3650C L =50pF total for DS3650DS005782-12Note.E IN waveform characteristics:t TLH and t THL ≤10ns measured 10%to 90%PRR =1MHz Duty Cycle =50%FIGURE 8.Receiver Propagation Delay t PLH(D)and t PHL(D) 6(Continued)DS005782-13Note.Output of Channel B shown under test,other channels are tested similiarly.V1V2S1S2C LGND Closed Closed15pFt PLO(S)100mVGND Closed Open50pFt POL(S)100mVClosed Closed15pFt PHO(S)GND100mVOpen Closed50pFt POH(S)GND100mVC L includes jig and probe capacitance.E IN waveform characteristics:t TLH and t THL≤10ns measured10%to90%PRR=1MHzDuty Cycle=50%DS005782-14DS005782-15DS005782-17DS005782-16FIGURE9.Strobe Propagation Delay t PLO(S),t POL(S),t PHO(S)and t POH(S)7Schematic DiagramsDS3650DS005782-20 1/4of circuit shown8Physical Dimensions inches(millimeters)unless otherwise notedSO Package(M)Order Number DS3650MNS Package Number M16AMolded Dual-In-Line Package(N)Order Number DS3650NNS Package Number N16A9NotesLIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices or systems which,(a)are intended for surgical implant into the body,or (b)support or sustain life,and whose failure to perform when properly used in accordance with instructions for use provided in the labeling,can be reasonably expected to result in a significant injury to the user.2.A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system,or to affect its safety or effectiveness.National Semiconductor Corporation AmericasTel:1-800-272-9959Fax:1-800-737-7018Email:support@National Semiconductor EuropeFax:+49(0)180-5308586Email:europe.support@Deutsch Tel:+49(0)180-5308585English Tel:+49(0)180-5327832Français Tel:+49(0)180-5329358Italiano Tel:+49(0)180-5341680National Semiconductor Asia Pacific Customer Response Group Tel:65-2544466Fax:65-2504466Email:sea.support@National Semiconductor Japan Ltd.Tel:81-3-5639-7560Fax:81-3-5639-7507D S 3650Q u a d D i f f e r e n t i a l L i n e R e c e i v e r sNational does not assume any responsibility for use of any circuitry described,no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.。